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99c513f6 | 1 | /* -*- c -*- */ |
4b95cf5c | 2 | /* Copyright (C) 2012-2014 Free Software Foundation, Inc. |
5bf135a7 NC |
3 | Contributed by Red Hat. |
4 | Written by DJ Delorie. | |
5 | ||
6 | This file is part of the GNU opcodes library. | |
7 | ||
8 | This library is free software; you can redistribute it and/or modify | |
9 | it under the terms of the GNU General Public License as published by | |
10 | the Free Software Foundation; either version 3, or (at your option) | |
11 | any later version. | |
12 | ||
13 | It is distributed in the hope that it will be useful, but WITHOUT | |
14 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY | |
15 | or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public | |
16 | License for more details. | |
17 | ||
18 | You should have received a copy of the GNU General Public License | |
19 | along with this program; if not, write to the Free Software | |
20 | Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, | |
21 | MA 02110-1301, USA. */ | |
22 | ||
df7b86aa | 23 | #include "sysdep.h" |
99c513f6 DD |
24 | #include <stdio.h> |
25 | #include <stdlib.h> | |
26 | #include <string.h> | |
99c513f6 DD |
27 | #include "ansidecl.h" |
28 | #include "opcode/rl78.h" | |
29 | ||
30 | static int trace = 0; | |
31 | ||
32 | typedef struct | |
33 | { | |
34 | RL78_Opcode_Decoded * rl78; | |
35 | int (* getbyte)(void *); | |
36 | void * ptr; | |
37 | unsigned char * op; | |
38 | } LocalData; | |
39 | ||
40 | #define ID(x) rl78->id = RLO_##x, rl78->lineno = __LINE__ | |
41 | #define OP(n,t,r,a) (rl78->op[n].type = t, \ | |
42 | rl78->op[n].reg = r, \ | |
43 | rl78->op[n].addend = a ) | |
44 | #define OPX(n,t,r1,r2,a) \ | |
45 | (rl78->op[n].type = t, \ | |
46 | rl78->op[n].reg = r1, \ | |
47 | rl78->op[n].reg2 = r2, \ | |
48 | rl78->op[n].addend = a ) | |
49 | ||
50 | #define W() rl78->size = RL78_Word | |
51 | ||
52 | #define AU ATTRIBUTE_UNUSED | |
53 | #define GETBYTE() (ld->op [ld->rl78->n_bytes++] = ld->getbyte (ld->ptr)) | |
54 | #define B ((unsigned long) GETBYTE()) | |
55 | ||
56 | #define SYNTAX(x) rl78->syntax = x | |
57 | ||
58 | #define UNSUPPORTED() \ | |
59 | rl78->syntax = "*unknown*" | |
60 | ||
61 | #define RB(x) ((x)+RL78_Reg_X) | |
62 | #define RW(x) ((x)+RL78_Reg_AX) | |
63 | ||
64 | #define Fz rl78->flags = RL78_PSW_Z | |
65 | #define Fza rl78->flags = RL78_PSW_Z | RL78_PSW_AC | |
66 | #define Fzc rl78->flags = RL78_PSW_Z | RL78_PSW_CY | |
67 | #define Fzac rl78->flags = RL78_PSW_Z | RL78_PSW_AC | RL78_PSW_CY | |
68 | #define Fa rl78->flags = RL78_PSW_AC | |
69 | #define Fc rl78->flags = RL78_PSW_CY | |
70 | #define Fac rl78->flags = RL78_PSW_AC | RL78_PSW_CY | |
71 | ||
72 | #define IMMU(bytes) immediate (bytes, 0, ld) | |
73 | #define IMMS(bytes) immediate (bytes, 1, ld) | |
74 | ||
75 | static int | |
76 | immediate (int bytes, int sign_extend, LocalData * ld) | |
77 | { | |
78 | unsigned long i = 0; | |
79 | ||
80 | switch (bytes) | |
81 | { | |
82 | case 1: | |
83 | i |= B; | |
84 | if (sign_extend && (i & 0x80)) | |
85 | i -= 0x100; | |
86 | break; | |
87 | case 2: | |
88 | i |= B; | |
89 | i |= B << 8; | |
90 | if (sign_extend && (i & 0x8000)) | |
91 | i -= 0x10000; | |
92 | break; | |
93 | case 3: | |
94 | i |= B; | |
95 | i |= B << 8; | |
96 | i |= B << 16; | |
97 | if (sign_extend && (i & 0x800000)) | |
98 | i -= 0x1000000; | |
99 | break; | |
100 | default: | |
101 | fprintf (stderr, "Programmer error: immediate() called with invalid byte count %d\n", bytes); | |
102 | abort(); | |
103 | } | |
104 | return i; | |
105 | } | |
106 | ||
107 | #define DC(c) OP (0, RL78_Operand_Immediate, 0, c) | |
108 | #define DR(r) OP (0, RL78_Operand_Register, RL78_Reg_##r, 0) | |
109 | #define DRB(r) OP (0, RL78_Operand_Register, RB(r), 0) | |
110 | #define DRW(r) OP (0, RL78_Operand_Register, RW(r), 0) | |
111 | #define DM(r,a) OP (0, RL78_Operand_Indirect, RL78_Reg_##r, a) | |
112 | #define DM2(r1,r2,a) OPX (0, RL78_Operand_Indirect, RL78_Reg_##r1, RL78_Reg_##r2, a) | |
113 | #define DE() rl78->op[0].use_es = 1 | |
114 | #define DB(b) set_bit (rl78->op, b) | |
115 | #define DCY() DR(PSW); DB(0) | |
116 | #define DPUSH() OP (0, RL78_Operand_PreDec, RL78_Reg_SP, 0); | |
117 | ||
118 | #define SC(c) OP (1, RL78_Operand_Immediate, 0, c) | |
119 | #define SR(r) OP (1, RL78_Operand_Register, RL78_Reg_##r, 0) | |
120 | #define SRB(r) OP (1, RL78_Operand_Register, RB(r), 0) | |
121 | #define SRW(r) OP (1, RL78_Operand_Register, RW(r), 0) | |
122 | #define SM(r,a) OP (1, RL78_Operand_Indirect, RL78_Reg_##r, a) | |
123 | #define SM2(r1,r2,a) OPX (1, RL78_Operand_Indirect, RL78_Reg_##r1, RL78_Reg_##r2, a) | |
124 | #define SE() rl78->op[1].use_es = 1 | |
125 | #define SB(b) set_bit (rl78->op+1, b) | |
126 | #define SCY() SR(PSW); SB(0) | |
127 | #define COND(c) rl78->op[1].condition = RL78_Condition_##c | |
128 | #define SPOP() OP (1, RL78_Operand_PostInc, RL78_Reg_SP, 0); | |
129 | ||
130 | static void | |
131 | set_bit (RL78_Opcode_Operand *op, int bit) | |
132 | { | |
133 | op->bit_number = bit; | |
134 | switch (op->type) { | |
135 | case RL78_Operand_Register: | |
136 | op->type = RL78_Operand_Bit; | |
137 | break; | |
138 | case RL78_Operand_Indirect: | |
139 | op->type = RL78_Operand_BitIndirect; | |
140 | break; | |
141 | default: | |
142 | break; | |
143 | } | |
144 | } | |
145 | ||
146 | static int | |
147 | saddr (int x) | |
148 | { | |
149 | if (x < 0x20) | |
150 | return 0xfff00 + x; | |
151 | return 0xffe00 + x; | |
152 | } | |
153 | ||
154 | static int | |
155 | sfr (int x) | |
156 | { | |
157 | return 0xfff00 + x; | |
158 | } | |
159 | ||
160 | #define SADDR saddr (IMMU (1)) | |
161 | #define SFR sfr (IMMU (1)) | |
162 | ||
163 | int | |
164 | rl78_decode_opcode (unsigned long pc AU, | |
165 | RL78_Opcode_Decoded * rl78, | |
166 | int (* getbyte)(void *), | |
167 | void * ptr) | |
168 | { | |
169 | LocalData lds, * ld = &lds; | |
170 | unsigned char op_buf[20] = {0}; | |
171 | unsigned char *op = op_buf; | |
172 | int op0, op1; | |
173 | ||
174 | lds.rl78 = rl78; | |
175 | lds.getbyte = getbyte; | |
176 | lds.ptr = ptr; | |
177 | lds.op = op; | |
178 | ||
179 | memset (rl78, 0, sizeof (*rl78)); | |
180 | ||
181 | start_again: | |
182 | ||
183 | /* Byte registers, not including A. */ | |
184 | /** VARY rba 000 010 011 100 101 110 111 */ | |
185 | /* Word registers, not including AX. */ | |
186 | /** VARY ra 01 10 11 */ | |
187 | ||
188 | /*----------------------------------------------------------------------*/ | |
189 | /* ES: prefix */ | |
190 | ||
191 | /** 0001 0001 es: */ | |
192 | DE(); SE(); | |
193 | op ++; | |
194 | pc ++; | |
195 | goto start_again; | |
196 | ||
197 | /*----------------------------------------------------------------------*/ | |
198 | ||
3d557b4c | 199 | /** 0000 1111 add %0, %e!1 */ |
99c513f6 DD |
200 | ID(add); DR(A); SM(None, IMMU(2)); Fzac; |
201 | ||
3d557b4c | 202 | /** 0000 1101 add %0, %e1 */ |
99c513f6 DD |
203 | ID(add); DR(A); SM(HL, 0); Fzac; |
204 | ||
3d557b4c | 205 | /** 0110 0001 1000 000 add %0, %e1 */ |
99c513f6 DD |
206 | ID(add); DR(A); SM2(HL, B, 0); Fzac; |
207 | ||
3d557b4c | 208 | /** 0000 1110 add %0, %e1 */ |
99c513f6 | 209 | ID(add); DR(A); SM(HL, IMMU(1)); Fzac; |
3d557b4c DD |
210 | |
211 | /** 0110 0001 1000 0010 add %0, %e1 */ | |
99c513f6 DD |
212 | ID(add); DR(A); SM2(HL, C, 0); Fzac; |
213 | ||
214 | /** 0000 1100 add %0, #%1 */ | |
215 | ID(add); DR(A); SC(IMMU(1)); Fzac; | |
216 | ||
217 | /** 0110 0001 0000 1rba add %0, %1 */ | |
218 | ID(add); DR(A); SRB(rba); Fzac; | |
219 | ||
220 | /** 0000 1011 add %0, %1 */ | |
221 | ID(add); DR(A); SM(None, SADDR); Fzac; | |
222 | ||
223 | /** 0110 0001 0000 0reg add %0, %1 */ | |
224 | ID(add); DRB(reg); SR(A); Fzac; | |
225 | ||
226 | /** 0000 1010 add %0, #%1 */ | |
227 | ID(add); DM(None, SADDR); SC(IMMU(1)); Fzac; | |
228 | ||
229 | /*----------------------------------------------------------------------*/ | |
230 | ||
3d557b4c | 231 | /** 0001 1111 addc %0, %e!1 */ |
99c513f6 DD |
232 | ID(addc); DR(A); SM(None, IMMU(2)); Fzac; |
233 | ||
3d557b4c | 234 | /** 0001 1101 addc %0, %e1 */ |
99c513f6 DD |
235 | ID(addc); DR(A); SM(HL, 0); Fzac; |
236 | ||
3d557b4c | 237 | /** 0110 0001 1001 0000 addc %0, %e1 */ |
99c513f6 DD |
238 | ID(addc); DR(A); SM2(HL, B, 0); Fzac; |
239 | ||
3d557b4c | 240 | /** 0110 0001 1001 0010 addc %0, %e1 */ |
99c513f6 DD |
241 | ID(addc); DR(A); SM2(HL, C, 0); Fzac; |
242 | ||
3d557b4c | 243 | /** 0001 1110 addc %0, %e1 */ |
99c513f6 DD |
244 | ID(addc); DR(A); SM(HL, IMMU(1)); Fzac; |
245 | ||
246 | /** 0001 1100 addc %0, #%1 */ | |
247 | ID(addc); DR(A); SC(IMMU(1)); Fzac; | |
248 | ||
249 | /** 0110 0001 0001 1rba addc %0, %1 */ | |
250 | ID(addc); DR(A); SRB(rba); Fzac; | |
251 | ||
252 | /** 0110 0001 0001 0reg addc %0, %1 */ | |
253 | ID(addc); DRB(reg); SR(A); Fzac; | |
254 | ||
255 | /** 0001 1011 addc %0, %1 */ | |
256 | ID(addc); DR(A); SM(None, SADDR); Fzac; | |
257 | ||
258 | /** 0001 1010 addc %0, #%1 */ | |
259 | ID(addc); DM(None, SADDR); SC(IMMU(1)); Fzac; | |
260 | ||
261 | /*----------------------------------------------------------------------*/ | |
262 | ||
3d557b4c | 263 | /** 0000 0010 addw %0, %e!1 */ |
99c513f6 DD |
264 | ID(add); W(); DR(AX); SM(None, IMMU(2)); Fzac; |
265 | ||
3d557b4c | 266 | /** 0110 0001 0000 1001 addw %0, %e1 */ |
99c513f6 DD |
267 | ID(add); W(); DR(AX); SM(HL, IMMU(1)); Fzac; |
268 | ||
269 | /** 0000 0100 addw %0, #%1 */ | |
270 | ID(add); W(); DR(AX); SC(IMMU(2)); Fzac; | |
271 | ||
272 | /** 0000 0rw1 addw %0, %1 */ | |
273 | ID(add); W(); DR(AX); SRW(rw); Fzac; | |
274 | ||
275 | /** 0000 0110 addw %0, %1 */ | |
276 | ID(add); W(); DR(AX); SM(None, SADDR); Fzac; | |
277 | ||
278 | /** 0001 0000 addw %0, #%1 */ | |
279 | ID(add); W(); DR(SP); SC(IMMU(1)); Fzac; | |
280 | ||
281 | /*----------------------------------------------------------------------*/ | |
282 | ||
3d557b4c | 283 | /** 0101 1111 and %0, %e!1 */ |
99c513f6 DD |
284 | ID(and); DR(A); SM(None, IMMU(2)); Fz; |
285 | ||
3d557b4c | 286 | /** 0101 1101 and %0, %e1 */ |
99c513f6 DD |
287 | ID(and); DR(A); SM(HL, 0); Fz; |
288 | ||
3d557b4c | 289 | /** 0110 0001 1101 0000 and %0, %e1 */ |
99c513f6 DD |
290 | ID(and); DR(A); SM2(HL, B, 0); Fz; |
291 | ||
3d557b4c | 292 | /** 0101 1110 and %0, %e1 */ |
99c513f6 DD |
293 | ID(and); DR(A); SM(HL, IMMU(1)); Fz; |
294 | ||
3d557b4c | 295 | /** 0110 0001 1101 0010 and %0, %e1 */ |
99c513f6 DD |
296 | ID(and); DR(A); SM2(HL, C, 0); Fz; |
297 | ||
298 | /** 0101 1100 and %0, #%1 */ | |
299 | ID(and); DR(A); SC(IMMU(1)); Fz; | |
300 | ||
301 | /** 0110 0001 0101 1rba and %0, %1 */ | |
302 | ID(and); DR(A); SRB(rba); Fz; | |
303 | ||
304 | /** 0110 0001 0101 0reg and %0, %1 */ | |
305 | ID(and); DRB(reg); SR(A); Fz; | |
306 | ||
307 | /** 0101 1011 and %0, %1 */ | |
308 | ID(and); DR(A); SM(None, SADDR); Fz; | |
309 | ||
310 | /** 0101 1010 and %0, #%1 */ | |
311 | ID(and); DM(None, SADDR); SC(IMMU(1)); Fz; | |
312 | ||
313 | /*----------------------------------------------------------------------*/ | |
314 | ||
3d557b4c | 315 | /** 0111 0001 1bit 0101 and1 cy, %e1 */ |
99c513f6 DD |
316 | ID(and); DCY(); SM(HL, 0); SB(bit); |
317 | ||
318 | /** 0111 0001 1bit 1101 and1 cy, %1 */ | |
319 | ID(and); DCY(); SR(A); SB(bit); | |
320 | ||
321 | /** 0111 0001 0bit 1101 and1 cy, %s1 */ | |
322 | ID(and); DCY(); SM(None, SFR); SB(bit); | |
323 | ||
324 | /** 0111 0001 0bit 0101 and1 cy, %s1 */ | |
325 | ID(and); DCY(); SM(None, SADDR); SB(bit); | |
326 | ||
327 | /*----------------------------------------------------------------------*/ | |
328 | ||
329 | /* Note that the branch insns need to be listed before the shift | |
330 | ones, as "shift count of zero" means "branch insn" */ | |
331 | ||
332 | /** 1101 1100 bc $%a0 */ | |
333 | ID(branch_cond); DC(pc+IMMS(1)+2); SR(None); COND(C); | |
334 | ||
335 | /** 1101 1110 bnc $%a0 */ | |
336 | ID(branch_cond); DC(pc+IMMS(1)+2); SR(None); COND(NC); | |
337 | ||
338 | /** 0110 0001 1100 0011 bh $%a0 */ | |
339 | ID(branch_cond); DC(pc+IMMS(1)+3); SR(None); COND(H); | |
340 | ||
341 | /** 0110 0001 1101 0011 bnh $%a0 */ | |
342 | ID(branch_cond); DC(pc+IMMS(1)+3); SR(None); COND(NH); | |
343 | ||
344 | /** 1101 1101 bz $%a0 */ | |
345 | ID(branch_cond); DC(pc+IMMS(1)+2); SR(None); COND(Z); | |
346 | ||
347 | /** 1101 1111 bnz $%a0 */ | |
348 | ID(branch_cond); DC(pc+IMMS(1)+2); SR(None); COND(NZ); | |
349 | ||
350 | /*----------------------------------------------------------------------*/ | |
351 | ||
3d557b4c | 352 | /** 0011 0001 1bit 0101 bf %e1, $%a0 */ |
99c513f6 DD |
353 | ID(branch_cond); DC(pc+IMMS(1)+3); SM(HL,0); SB(bit); COND(F); |
354 | ||
355 | /** 0011 0001 0bit 0101 bf %1, $%a0 */ | |
356 | ID(branch_cond); DC(pc+IMMS(1)+3); SR(A); SB(bit); COND(F); | |
357 | ||
358 | /** 0011 0001 1bit 0100 bf %s1, $%a0 */ | |
359 | ID(branch_cond); SM(None, SFR); SB(bit); DC(pc+IMMS(1)+4); COND(F); | |
360 | ||
361 | /** 0011 0001 0bit 0100 bf %s1, $%a0 */ | |
362 | ID(branch_cond); SM(None, SADDR); SB(bit); DC(pc+IMMS(1)+4); COND(F); | |
363 | ||
364 | /*----------------------------------------------------------------------*/ | |
365 | ||
366 | /** 1110 1100 br !%!a0 */ | |
367 | ID(branch); DC(IMMU(3)); | |
368 | ||
369 | /** 1110 1101 br %!a0 */ | |
370 | ID(branch); DC(IMMU(2)); | |
371 | ||
372 | /** 1110 1110 br $%!a0 */ | |
373 | ID(branch); DC(pc+IMMS(2)+3); | |
374 | ||
375 | /** 1110 1111 br $%a0 */ | |
376 | ID(branch); DC(pc+IMMS(1)+2); | |
377 | ||
378 | /** 0110 0001 1100 1011 br ax */ | |
379 | ID(branch); DR(AX); | |
380 | ||
381 | /*----------------------------------------------------------------------*/ | |
382 | ||
383 | /** 1111 1111 brk1 */ | |
384 | ID(break); | |
385 | ||
386 | /** 0110 0001 1100 1100 brk */ | |
387 | ID(break); | |
388 | ||
389 | /*----------------------------------------------------------------------*/ | |
390 | ||
3d557b4c | 391 | /** 0011 0001 1bit 0011 bt %e1, $%a0 */ |
99c513f6 DD |
392 | ID(branch_cond); DC(pc+IMMS(1)+3); SM(HL,0); SB(bit); COND(T); |
393 | ||
394 | /** 0011 0001 0bit 0011 bt %1, $%a0 */ | |
395 | ID(branch_cond); DC(pc+IMMS(1)+3); SR(A); SB(bit); COND(T); | |
396 | ||
397 | /** 0011 0001 1bit 0010 bt %s1, $%a0 */ | |
398 | ID(branch_cond); SM(None, SFR); SB(bit); DC(pc+IMMS(1)+4); COND(T); | |
399 | ||
400 | /** 0011 0001 0bit 0010 bt %s1, $%a0 */ | |
401 | ID(branch_cond); SM(None, SADDR); SB(bit); DC(pc+IMMS(1)+4); COND(T); | |
402 | ||
403 | /*----------------------------------------------------------------------*/ | |
404 | ||
3d557b4c | 405 | /** 0011 0001 1bit 0001 btclr %e1, $%a0 */ |
99c513f6 DD |
406 | ID(branch_cond_clear); DC(pc+IMMS(1)+3); SM(HL,0); SB(bit); COND(T); |
407 | ||
408 | /** 0011 0001 0bit 0001 btclr %1, $%a0 */ | |
409 | ID(branch_cond_clear); DC(pc+IMMS(1)+3); SR(A); SB(bit); COND(T); | |
410 | ||
411 | /** 0011 0001 1bit 0000 btclr %s1, $%a0 */ | |
412 | ID(branch_cond_clear); SM(None, SFR); SB(bit); DC(pc+IMMS(1)+4); COND(T); | |
413 | ||
414 | /** 0011 0001 0bit 0000 btclr %s1, $%a0 */ | |
415 | ID(branch_cond_clear); SM(None, SADDR); SB(bit); DC(pc+IMMS(1)+4); COND(T); | |
416 | ||
417 | /*----------------------------------------------------------------------*/ | |
418 | ||
419 | /** 1111 1100 call !%!a0 */ | |
420 | ID(call); DC(IMMU(3)); | |
421 | ||
422 | /** 1111 1101 call %!a0 */ | |
423 | ID(call); DC(IMMU(2)); | |
424 | ||
425 | /** 1111 1110 call $%!a0 */ | |
426 | ID(call); DC(pc+IMMS(2)+3); | |
427 | ||
428 | /** 0110 0001 11rg 1010 call %0 */ | |
429 | ID(call); DRW(rg); | |
430 | ||
431 | /** 0110 0001 1nnn 01mm callt [%x0] */ | |
432 | ID(call); DM(None, 0x80 + mm*16 + nnn*2); | |
433 | ||
434 | /*----------------------------------------------------------------------*/ | |
435 | ||
3d557b4c | 436 | /** 0111 0001 0bit 1000 clr1 %e!0 */ |
99c513f6 DD |
437 | ID(mov); DM(None, IMMU(2)); DB(bit); SC(0); |
438 | ||
3d557b4c | 439 | /** 0111 0001 1bit 0011 clr1 %e0 */ |
99c513f6 DD |
440 | ID(mov); DM(HL, 0); DB(bit); SC(0); |
441 | ||
442 | /** 0111 0001 1bit 1011 clr1 %0 */ | |
443 | ID(mov); DR(A); DB(bit); SC(0); | |
444 | ||
445 | /** 0111 0001 1000 1000 clr1 cy */ | |
446 | ID(mov); DCY(); SC(0); | |
447 | ||
448 | /** 0111 0001 0bit 1011 clr1 %s0 */ | |
449 | op0 = SFR; | |
450 | ID(mov); DM(None, op0); DB(bit); SC(0); | |
451 | if (op0 == RL78_SFR_PSW && bit == 7) | |
452 | rl78->syntax = "di"; | |
453 | ||
454 | /** 0111 0001 0bit 0011 clr1 %0 */ | |
455 | ID(mov); DM(None, SADDR); DB(bit); SC(0); | |
456 | ||
457 | /*----------------------------------------------------------------------*/ | |
458 | ||
3d557b4c | 459 | /** 1111 0101 clrb %e!0 */ |
99c513f6 DD |
460 | ID(mov); DM(None, IMMU(2)); SC(0); |
461 | ||
462 | /** 1111 00rg clrb %0 */ | |
463 | ID(mov); DRB(rg); SC(0); | |
464 | ||
465 | /** 1111 0100 clrb %0 */ | |
466 | ID(mov); DM(None, SADDR); SC(0); | |
467 | ||
468 | /*----------------------------------------------------------------------*/ | |
469 | ||
470 | /** 1111 0110 clrw %0 */ | |
471 | ID(mov); DR(AX); SC(0); | |
472 | ||
473 | /** 1111 0111 clrw %0 */ | |
474 | ID(mov); DR(BC); SC(0); | |
475 | ||
476 | /*----------------------------------------------------------------------*/ | |
477 | ||
3d557b4c | 478 | /** 0100 0000 cmp %e!0, #%1 */ |
99c513f6 DD |
479 | ID(cmp); DM(None, IMMU(2)); SC(IMMU(1)); Fzac; |
480 | ||
481 | /** 0100 1010 cmp %0, #%1 */ | |
482 | ID(cmp); DM(None, SADDR); SC(IMMU(1)); Fzac; | |
483 | ||
3d557b4c | 484 | /** 0100 1111 cmp %0, %e!1 */ |
99c513f6 DD |
485 | ID(cmp); DR(A); SM(None, IMMU(2)); Fzac; |
486 | ||
3d557b4c | 487 | /** 0100 1101 cmp %0, %e1 */ |
99c513f6 DD |
488 | ID(cmp); DR(A); SM(HL, 0); Fzac; |
489 | ||
3d557b4c | 490 | /** 0110 0001 1100 0000 cmp %0, %e1 */ |
99c513f6 DD |
491 | ID(cmp); DR(A); SM2(HL, B, 0); Fzac; |
492 | ||
3d557b4c | 493 | /** 0110 0001 1100 0010 cmp %0, %e1 */ |
99c513f6 DD |
494 | ID(cmp); DR(A); SM2(HL, C, 0); Fzac; |
495 | ||
3d557b4c | 496 | /** 0100 1110 cmp %0, %e1 */ |
99c513f6 DD |
497 | ID(cmp); DR(A); SM(HL, IMMU(1)); Fzac; |
498 | ||
499 | /** 0100 1100 cmp %0, #%1 */ | |
500 | ID(cmp); DR(A); SC(IMMU(1)); Fzac; | |
501 | ||
502 | /** 0110 0001 0100 1rba cmp %0, %1 */ | |
503 | ID(cmp); DR(A); SRB(rba); Fzac; | |
504 | ||
505 | /** 0110 0001 0100 0reg cmp %0, %1 */ | |
506 | ID(cmp); DRB(reg); SR(A); Fzac; | |
507 | ||
508 | /** 0100 1011 cmp %0, %1 */ | |
509 | ID(cmp); DR(A); SM(None, SADDR); Fzac; | |
510 | ||
511 | /*----------------------------------------------------------------------*/ | |
512 | ||
3d557b4c | 513 | /** 1101 0101 cmp0 %e!0 */ |
99c513f6 DD |
514 | ID(cmp); DM(None, IMMU(2)); SC(0); Fzac; |
515 | ||
516 | /** 1101 00rg cmp0 %0 */ | |
517 | ID(cmp); DRB(rg); SC(0); Fzac; | |
518 | ||
519 | /** 1101 0100 cmp0 %0 */ | |
520 | ID(cmp); DM(None, SADDR); SC(0); Fzac; | |
521 | ||
522 | /*----------------------------------------------------------------------*/ | |
523 | ||
3d557b4c | 524 | /** 0110 0001 1101 1110 cmps %0, %e1 */ |
99c513f6 DD |
525 | ID(cmp); DR(X); SM(HL, IMMU(1)); Fzac; |
526 | ||
527 | /*----------------------------------------------------------------------*/ | |
528 | ||
3d557b4c | 529 | /** 0100 0010 cmpw %0, %e!1 */ |
99c513f6 DD |
530 | ID(cmp); W(); DR(AX); SM(None, IMMU(2)); Fzac; |
531 | ||
3d557b4c | 532 | /** 0110 0001 0100 1001 cmpw %0, %e1 */ |
99c513f6 DD |
533 | ID(cmp); W(); DR(AX); SM(HL, IMMU(1)); Fzac; |
534 | ||
535 | /** 0100 0100 cmpw %0, #%1 */ | |
536 | ID(cmp); W(); DR(AX); SC(IMMU(2)); Fzac; | |
537 | ||
538 | /** 0100 0ra1 cmpw %0, %1 */ | |
539 | ID(cmp); W(); DR(AX); SRW(ra); Fzac; | |
540 | ||
541 | /** 0100 0110 cmpw %0, %1 */ | |
542 | ID(cmp); W(); DR(AX); SM(None, SADDR); Fzac; | |
543 | ||
544 | /*----------------------------------------------------------------------*/ | |
545 | ||
3d557b4c | 546 | /** 1011 0000 dec %e!0 */ |
99c513f6 DD |
547 | ID(sub); DM(None, IMMU(2)); SC(1); Fza; |
548 | ||
3d557b4c | 549 | /** 0110 0001 0110 1001 dec %e0 */ |
99c513f6 DD |
550 | ID(sub); DM(HL, IMMU(1)); SC(1); Fza; |
551 | ||
552 | /** 1001 0reg dec %0 */ | |
553 | ID(sub); DRB(reg); SC(1); Fza; | |
554 | ||
555 | /** 1011 0100 dec %0 */ | |
556 | ID(sub); DM(None, SADDR); SC(1); Fza; | |
557 | ||
558 | /*----------------------------------------------------------------------*/ | |
559 | ||
3d557b4c | 560 | /** 1011 0010 decw %e!0 */ |
99c513f6 DD |
561 | ID(sub); W(); DM(None, IMMU(2)); SC(1); |
562 | ||
3d557b4c | 563 | /** 0110 0001 1000 1001 decw %e0 */ |
99c513f6 DD |
564 | ID(sub); W(); DM(HL, IMMU(1)); SC(1); |
565 | ||
566 | /** 1011 0rg1 decw %0 */ | |
567 | ID(sub); W(); DRW(rg); SC(1); | |
568 | ||
569 | /** 1011 0110 decw %0 */ | |
570 | ID(sub); W(); DM(None, SADDR); SC(1); | |
571 | ||
572 | /*----------------------------------------------------------------------*/ | |
573 | ||
574 | /** 0110 0001 1110 1101 halt */ | |
575 | ID(halt); | |
576 | ||
577 | /*----------------------------------------------------------------------*/ | |
578 | ||
3d557b4c | 579 | /** 1010 0000 inc %e!0 */ |
99c513f6 DD |
580 | ID(add); DM(None, IMMU(2)); SC(1); Fza; |
581 | ||
3d557b4c | 582 | /** 0110 0001 0101 1001 inc %e0 */ |
99c513f6 DD |
583 | ID(add); DM(HL, IMMU(1)); SC(1); Fza; |
584 | ||
585 | /** 1000 0reg inc %0 */ | |
586 | ID(add); DRB(reg); SC(1); Fza; | |
587 | ||
588 | /** 1010 0100 inc %0 */ | |
589 | ID(add); DM(None, SADDR); SC(1); Fza; | |
590 | ||
591 | /*----------------------------------------------------------------------*/ | |
592 | ||
3d557b4c | 593 | /** 1010 0010 incw %e!0 */ |
99c513f6 DD |
594 | ID(add); W(); DM(None, IMMU(2)); SC(1); |
595 | ||
3d557b4c | 596 | /** 0110 0001 0111 1001 incw %e0 */ |
99c513f6 DD |
597 | ID(add); W(); DM(HL, IMMU(1)); SC(1); |
598 | ||
599 | /** 1010 0rg1 incw %0 */ | |
600 | ID(add); W(); DRW(rg); SC(1); | |
601 | ||
602 | /** 1010 0110 incw %0 */ | |
603 | ID(add); W(); DM(None, SADDR); SC(1); | |
604 | ||
605 | /*----------------------------------------------------------------------*/ | |
606 | ||
3d557b4c | 607 | /** 1100 1111 mov %e!0, #%1 */ |
99c513f6 DD |
608 | ID(mov); DM(None, IMMU(2)); SC(IMMU(1)); |
609 | ||
3d557b4c | 610 | /** 1001 1111 mov %e!0, %1 */ |
99c513f6 DD |
611 | ID(mov); DM(None, IMMU(2)); SR(A); |
612 | ||
3d557b4c | 613 | /** 1001 1001 mov %e0,%1 */ |
99c513f6 DD |
614 | ID(mov); DM(DE, 0); SR(A); |
615 | ||
3d557b4c | 616 | /** 1100 1010 mov %e0, #%1 */ |
99c513f6 DD |
617 | ID(mov); DM(DE, IMMU(1)); SC(IMMU(1)); |
618 | ||
3d557b4c | 619 | /** 1001 1010 mov %e0, %1 */ |
99c513f6 DD |
620 | ID(mov); DM(DE, IMMU(1)); SR(A); |
621 | ||
3d557b4c | 622 | /** 1001 1011 mov %e0,%1 */ |
99c513f6 DD |
623 | ID(mov); DM(HL, 0); SR(A); |
624 | ||
3d557b4c | 625 | /** 0110 0001 1101 1001 mov %e0, %1 */ |
99c513f6 DD |
626 | ID(mov); DM2(HL, B, 0); SR(A); |
627 | ||
3d557b4c | 628 | /** 1100 1100 mov %e0, #%1 */ |
99c513f6 DD |
629 | ID(mov); DM(HL, IMMU(1)); SC(IMMU(1)); |
630 | ||
3d557b4c | 631 | /** 1001 1100 mov %e0, %1 */ |
99c513f6 DD |
632 | ID(mov); DM(HL, IMMU(1)); SR(A); |
633 | ||
3d557b4c | 634 | /** 0110 0001 1111 1001 mov %e0, %1 */ |
99c513f6 DD |
635 | ID(mov); DM2(HL, C, 0); SR(A); |
636 | ||
637 | /** 1100 1000 mov %0, #%1 */ | |
638 | ID(mov); DM(SP, IMMU(1)); SC(IMMU(1)); | |
639 | ||
640 | /** 1001 1000 mov %0, %1 */ | |
641 | ID(mov); DM(SP, IMMU(1)); SR(A); | |
642 | ||
3d557b4c | 643 | /** 1000 1111 mov %0, %e!1 */ |
99c513f6 DD |
644 | ID(mov); DR(A); SM(None, IMMU(2)); |
645 | ||
3d557b4c | 646 | /** 1000 1001 mov %0, %e1 */ |
99c513f6 DD |
647 | ID(mov); DR(A); SM(DE, 0); |
648 | ||
3d557b4c | 649 | /** 1000 1010 mov %0, %e1 */ |
99c513f6 DD |
650 | ID(mov); DR(A); SM(DE, IMMU(1)); |
651 | ||
3d557b4c | 652 | /** 1000 1011 mov %0, %e1 */ |
99c513f6 DD |
653 | ID(mov); DR(A); SM(HL, 0); |
654 | ||
3d557b4c | 655 | /** 1000 1100 mov %0, %e1 */ |
99c513f6 DD |
656 | ID(mov); DR(A); SM(HL, IMMU(1)); |
657 | ||
3d557b4c | 658 | /** 0110 0001 1100 1001 mov %0, %e1 */ |
99c513f6 DD |
659 | ID(mov); DR(A); SM2(HL, B, 0); |
660 | ||
3d557b4c | 661 | /** 0110 0001 1110 1001 mov %0, %e1 */ |
99c513f6 DD |
662 | ID(mov); DR(A); SM2(HL, C, 0); |
663 | ||
3d557b4c | 664 | /** 1000 1000 mov %0, %e1 */ |
99c513f6 DD |
665 | ID(mov); DR(A); SM(SP, IMMU(1)); |
666 | ||
667 | /** 0101 0reg mov %0, #%1 */ | |
668 | ID(mov); DRB(reg); SC(IMMU(1)); | |
669 | ||
670 | /** 0110 0rba mov %0, %1 */ | |
671 | ID(mov); DR(A); SRB(rba); | |
672 | ||
673 | /** 1000 1110 1111 1101 mov %0, %1 */ | |
674 | ID(mov); DR(A); SR(ES); | |
675 | ||
3d557b4c | 676 | /** 0000 1001 mov %0, %e1 */ |
99c513f6 DD |
677 | ID(mov); DR(A); SM(B, IMMU(2)); |
678 | ||
3d557b4c | 679 | /** 0100 1001 mov %0, %e1 */ |
99c513f6 DD |
680 | ID(mov); DR(A); SM(BC, IMMU(2)); |
681 | ||
3d557b4c | 682 | /** 0010 1001 mov %0, %e1 */ |
99c513f6 DD |
683 | ID(mov); DR(A); SM(C, IMMU(2)); |
684 | ||
685 | /** 1000 1110 mov %0, %s1 */ | |
686 | ID(mov); DR(A); SM(None, SFR); | |
687 | ||
688 | /** 1000 1101 mov %0, %1 */ | |
689 | ID(mov); DR(A); SM(None, SADDR); | |
690 | ||
3d557b4c | 691 | /** 1110 1001 mov %0, %e!1 */ |
99c513f6 DD |
692 | ID(mov); DR(B); SM(None, IMMU(2)); |
693 | ||
694 | /** 0111 0rba mov %0, %1 */ | |
695 | ID(mov); DRB(rba); SR(A); | |
696 | ||
697 | /** 1110 1000 mov %0, %1 */ | |
698 | ID(mov); DR(B); SM(None, SADDR); | |
699 | ||
3d557b4c | 700 | /** 1111 1001 mov %0, %e!1 */ |
99c513f6 DD |
701 | ID(mov); DR(C); SM(None, IMMU(2)); |
702 | ||
703 | /** 1111 1000 mov %0, %1 */ | |
704 | ID(mov); DR(C); SM(None, SADDR); | |
705 | ||
3d557b4c | 706 | /** 1101 1001 mov %0, %e!1 */ |
99c513f6 DD |
707 | ID(mov); DR(X); SM(None, IMMU(2)); |
708 | ||
709 | /** 1101 1000 mov %0, %1 */ | |
710 | ID(mov); DR(X); SM(None, SADDR); | |
711 | ||
712 | /** 1001 1110 1111 1100 mov %0, %1 */ | |
713 | ID(mov); DR(CS); SR(A); | |
714 | ||
715 | /** 0100 0001 mov %0, #%1 */ | |
716 | ID(mov); DR(ES); SC(IMMU(1)); | |
717 | ||
718 | /** 1001 1110 1111 1101 mov %0, %1 */ | |
719 | ID(mov); DR(ES); SR(A); | |
720 | ||
721 | /** 0110 0001 1011 1000 mov %0, %1 */ | |
722 | ID(mov); DR(ES); SM(None, SADDR); | |
723 | ||
3d557b4c | 724 | /** 0001 1001 mov %e0, #%1 */ |
99c513f6 DD |
725 | ID(mov); DM(B, IMMU(2)); SC(IMMU(1)); |
726 | ||
3d557b4c | 727 | /** 0001 1000 mov %e0, %1 */ |
99c513f6 DD |
728 | ID(mov); DM(B, IMMU(2)); SR(A); |
729 | ||
3d557b4c | 730 | /** 0011 1001 mov %e0, #%1 */ |
99c513f6 DD |
731 | ID(mov); DM(BC, IMMU(2)); SC(IMMU(1)); |
732 | ||
3d557b4c | 733 | /** 0100 1000 mov %e0, %1 */ |
99c513f6 DD |
734 | ID(mov); DM(BC, IMMU(2)); SR(A); |
735 | ||
3d557b4c | 736 | /** 0011 1000 mov %e0, #%1 */ |
99c513f6 DD |
737 | ID(mov); DM(C, IMMU(2)); SC(IMMU(1)); |
738 | ||
3d557b4c | 739 | /** 0010 1000 mov %e0, %1 */ |
99c513f6 DD |
740 | ID(mov); DM(C, IMMU(2)); SR(A); |
741 | ||
742 | /** 1100 1101 mov %0, #%1 */ | |
743 | ID(mov); DM(None, SADDR); SC(IMMU(1)); | |
744 | ||
745 | /** 1001 1101 mov %0, %1 */ | |
746 | ID(mov); DM(None, SADDR); SR(A); | |
747 | ||
748 | /** 1100 1110 mov %s0, #%1 */ | |
749 | op0 = SFR; | |
750 | op1 = IMMU(1); | |
751 | ID(mov); DM(None, op0); SC(op1); | |
752 | if (op0 == 0xffffb) | |
753 | switch (op1) | |
754 | { | |
755 | case 0x01: | |
756 | rl78->syntax = "mulhu"; ID(mulhu); | |
757 | break; | |
758 | case 0x02: | |
759 | rl78->syntax = "mulh"; ID(mulh); | |
760 | break; | |
761 | case 0x03: | |
762 | rl78->syntax = "divhu"; ID(divhu); | |
763 | break; | |
764 | case 0x04: | |
c7570fcd | 765 | rl78->syntax = "divwu <old-encoding>"; ID(divwu); |
99c513f6 DD |
766 | break; |
767 | case 0x05: | |
768 | rl78->syntax = "machu"; ID(machu); | |
769 | break; | |
770 | case 0x06: | |
771 | rl78->syntax = "mach"; ID(mach); | |
772 | break; | |
151fa98f NC |
773 | case 0x0b: |
774 | rl78->syntax = "divwu"; ID(divwu); | |
775 | break; | |
99c513f6 DD |
776 | } |
777 | ||
778 | /** 1001 1110 mov %0, %1 */ | |
779 | ID(mov); DM(None, SFR); SR(A); | |
780 | ||
781 | /*----------------------------------------------------------------------*/ | |
782 | ||
3d557b4c | 783 | /** 0111 0001 1bit 0001 mov1 %e0, cy */ |
99c513f6 DD |
784 | ID(mov); DM(HL, 0); DB(bit); SCY(); |
785 | ||
3d557b4c | 786 | /** 0111 0001 1bit 1001 mov1 %e0, cy */ |
99c513f6 DD |
787 | ID(mov); DR(A); DB(bit); SCY(); |
788 | ||
3d557b4c | 789 | /** 0111 0001 1bit 0100 mov1 cy, %e1 */ |
99c513f6 DD |
790 | ID(mov); DCY(); SM(HL, 0); SB(bit); |
791 | ||
3d557b4c | 792 | /** 0111 0001 1bit 1100 mov1 cy, %e1 */ |
99c513f6 DD |
793 | ID(mov); DCY(); SR(A); SB(bit); |
794 | ||
795 | /** 0111 0001 0bit 0100 mov1 cy, %1 */ | |
796 | ID(mov); DCY(); SM(None, SADDR); SB(bit); | |
797 | ||
798 | /** 0111 0001 0bit 1100 mov1 cy, %s1 */ | |
799 | ID(mov); DCY(); SM(None, SFR); SB(bit); | |
800 | ||
801 | /** 0111 0001 0bit 0001 mov1 %0, cy */ | |
802 | ID(mov); DM(None, SADDR); DB(bit); SCY(); | |
803 | ||
804 | /** 0111 0001 0bit 1001 mov1 %s0, cy */ | |
805 | ID(mov); DM(None, SFR); DB(bit); SCY(); | |
806 | ||
807 | /*----------------------------------------------------------------------*/ | |
808 | ||
3d557b4c | 809 | /** 0110 0001 1100 1110 movs %e0, %1 */ |
99c513f6 DD |
810 | ID(mov); DM(HL, IMMU(1)); SR(X); Fzc; |
811 | ||
812 | /*----------------------------------------------------------------------*/ | |
813 | ||
3d557b4c | 814 | /** 1011 1111 movw %e!0, %1 */ |
99c513f6 DD |
815 | ID(mov); W(); DM(None, IMMU(2)); SR(AX); |
816 | ||
3d557b4c | 817 | /** 1011 1001 movw %e0, %1 */ |
99c513f6 DD |
818 | ID(mov); W(); DM(DE, 0); SR(AX); |
819 | ||
3d557b4c | 820 | /** 1011 1010 movw %e0, %1 */ |
99c513f6 DD |
821 | ID(mov); W(); DM(DE, IMMU(1)); SR(AX); |
822 | ||
3d557b4c | 823 | /** 1011 1011 movw %e0, %1 */ |
99c513f6 DD |
824 | ID(mov); W(); DM(HL, 0); SR(AX); |
825 | ||
3d557b4c | 826 | /** 1011 1100 movw %e0, %1 */ |
99c513f6 DD |
827 | ID(mov); W(); DM(HL, IMMU(1)); SR(AX); |
828 | ||
829 | /** 1011 1000 movw %0, %1 */ | |
830 | ID(mov); W(); DM(SP, IMMU(1)); SR(AX); | |
831 | ||
3d557b4c | 832 | /** 1010 1111 movw %0, %e!1 */ |
99c513f6 DD |
833 | ID(mov); W(); DR(AX); SM(None, IMMU(2)); |
834 | ||
835 | ||
3d557b4c | 836 | /** 1010 1001 movw %0, %e1 */ |
99c513f6 DD |
837 | ID(mov); W(); DR(AX); SM(DE, 0); |
838 | ||
3d557b4c | 839 | /** 1010 1010 movw %0, %e1 */ |
99c513f6 DD |
840 | ID(mov); W(); DR(AX); SM(DE, IMMU(1)); |
841 | ||
3d557b4c | 842 | /** 1010 1011 movw %0, %e1 */ |
99c513f6 DD |
843 | ID(mov); W(); DR(AX); SM(HL, 0); |
844 | ||
3d557b4c | 845 | /** 1010 1100 movw %0, %e1 */ |
99c513f6 DD |
846 | ID(mov); W(); DR(AX); SM(HL, IMMU(1)); |
847 | ||
848 | /** 1010 1000 movw %0, %1 */ | |
849 | ID(mov); W(); DR(AX); SM(SP, IMMU(1)); | |
850 | ||
851 | /** 0011 0rg0 movw %0, #%1 */ | |
852 | ID(mov); W(); DRW(rg); SC(IMMU(2)); | |
853 | ||
854 | /** 0001 0ra1 movw %0, %1 */ | |
855 | ID(mov); W(); DR(AX); SRW(ra); | |
856 | ||
857 | /** 0001 0ra0 movw %0, %1 */ | |
858 | ID(mov); W(); DRW(ra); SR(AX); | |
859 | ||
3d557b4c | 860 | /** 0101 1001 movw %0, %e1 */ |
99c513f6 DD |
861 | ID(mov); W(); DR(AX); SM(B, IMMU(2)); |
862 | ||
3d557b4c | 863 | /** 0110 1001 movw %0, %e1 */ |
99c513f6 DD |
864 | ID(mov); W(); DR(AX); SM(C, IMMU(2)); |
865 | ||
3d557b4c | 866 | /** 0111 1001 movw %0, %e1 */ |
99c513f6 DD |
867 | ID(mov); W(); DR(AX); SM(BC, IMMU(2)); |
868 | ||
3d557b4c | 869 | /** 0101 1000 movw %e0, %1 */ |
99c513f6 DD |
870 | ID(mov); W(); DM(B, IMMU(2)); SR(AX); |
871 | ||
3d557b4c | 872 | /** 0110 1000 movw %e0, %1 */ |
99c513f6 DD |
873 | ID(mov); W(); DM(C, IMMU(2)); SR(AX); |
874 | ||
3d557b4c | 875 | /** 0111 1000 movw %e0, %1 */ |
99c513f6 DD |
876 | ID(mov); W(); DM(BC, IMMU(2)); SR(AX); |
877 | ||
878 | /** 1010 1101 movw %0, %1 */ | |
879 | ID(mov); W(); DR(AX); SM(None, SADDR); | |
880 | ||
881 | /** 1010 1110 movw %0, %s1 */ | |
882 | ID(mov); W(); DR(AX); SM(None, SFR); | |
883 | ||
3d557b4c | 884 | /** 11ra 1011 movw %0, %e!1 */ |
99c513f6 DD |
885 | ID(mov); W(); DRW(ra); SM(None, IMMU(2)); |
886 | ||
887 | /** 11ra 1010 movw %0, %1 */ | |
888 | ID(mov); W(); DRW(ra); SM(None, SADDR); | |
889 | ||
890 | /** 1100 1001 movw %0, #%1 */ | |
891 | ID(mov); W(); DM(None, SADDR); SC(IMMU(2)); | |
892 | ||
893 | /** 1011 1101 movw %0, %1 */ | |
894 | ID(mov); W(); DM(None, SADDR); SR(AX); | |
895 | ||
896 | /** 1100 1011 movw %0, #%1 */ | |
897 | ID(mov); W(); DM(None, SFR); SC(IMMU(2)); | |
898 | ||
899 | /** 1011 1110 movw %0, %1 */ | |
900 | ID(mov); W(); DM(None, SFR); SR(AX); | |
901 | ||
902 | /*----------------------------------------------------------------------*/ | |
903 | ||
904 | /** 1101 0110 mulu x */ | |
905 | ID(mulu); | |
906 | ||
907 | /*----------------------------------------------------------------------*/ | |
908 | ||
909 | /** 0000 0000 nop */ | |
910 | ID(nop); | |
911 | ||
912 | /*----------------------------------------------------------------------*/ | |
913 | ||
21abe33a DD |
914 | /** 0111 0001 1100 0000 not1 cy */ |
915 | ID(xor); DCY(); SC(1); | |
916 | ||
917 | /*----------------------------------------------------------------------*/ | |
918 | ||
3d557b4c | 919 | /** 1110 0101 oneb %e!0 */ |
99c513f6 DD |
920 | ID(mov); DM(None, IMMU(2)); SC(1); |
921 | ||
922 | /** 1110 00rg oneb %0 */ | |
923 | ID(mov); DRB(rg); SC(1); | |
924 | ||
925 | /** 1110 0100 oneb %0 */ | |
926 | ID(mov); DM(None, SADDR); SC(1); | |
927 | ||
928 | /*----------------------------------------------------------------------*/ | |
929 | ||
930 | /** 1110 0110 onew %0 */ | |
931 | ID(mov); DR(AX); SC(1); | |
932 | ||
933 | /** 1110 0111 onew %0 */ | |
934 | ID(mov); DR(BC); SC(1); | |
935 | ||
936 | /*----------------------------------------------------------------------*/ | |
937 | ||
3d557b4c | 938 | /** 0110 1111 or %0, %e!1 */ |
99c513f6 DD |
939 | ID(or); DR(A); SM(None, IMMU(2)); Fz; |
940 | ||
3d557b4c | 941 | /** 0110 1101 or %0, %e1 */ |
99c513f6 DD |
942 | ID(or); DR(A); SM(HL, 0); Fz; |
943 | ||
3d557b4c | 944 | /** 0110 0001 1110 0000 or %0, %e1 */ |
99c513f6 DD |
945 | ID(or); DR(A); SM2(HL, B, 0); Fz; |
946 | ||
3d557b4c | 947 | /** 0110 1110 or %0, %e1 */ |
99c513f6 DD |
948 | ID(or); DR(A); SM(HL, IMMU(1)); Fz; |
949 | ||
3d557b4c | 950 | /** 0110 0001 1110 0010 or %0, %e1 */ |
99c513f6 DD |
951 | ID(or); DR(A); SM2(HL, C, 0); Fz; |
952 | ||
953 | /** 0110 1100 or %0, #%1 */ | |
954 | ID(or); DR(A); SC(IMMU(1)); Fz; | |
955 | ||
956 | /** 0110 0001 0110 1rba or %0, %1 */ | |
957 | ID(or); DR(A); SRB(rba); Fz; | |
958 | ||
959 | /** 0110 0001 0110 0reg or %0, %1 */ | |
960 | ID(or); DRB(reg); SR(A); Fz; | |
961 | ||
962 | /** 0110 1011 or %0, %1 */ | |
963 | ID(or); DR(A); SM(None, SADDR); Fz; | |
964 | ||
965 | /** 0110 1010 or %0, #%1 */ | |
966 | ID(or); DM(None, SADDR); SC(IMMU(1)); Fz; | |
967 | ||
968 | /*----------------------------------------------------------------------*/ | |
969 | ||
3d557b4c | 970 | /** 0111 0001 1bit 0110 or1 cy, %e1 */ |
99c513f6 DD |
971 | ID(or); DCY(); SM(HL, 0); SB(bit); |
972 | ||
973 | /** 0111 0001 1bit 1110 or1 cy, %1 */ | |
974 | ID(or); DCY(); SR(A); SB(bit); | |
975 | ||
976 | /** 0111 0001 0bit 1110 or1 cy, %s1 */ | |
977 | ID(or); DCY(); SM(None, SFR); SB(bit); | |
978 | ||
979 | /** 0111 0001 0bit 0110 or1 cy, %s1 */ | |
980 | ID(or); DCY(); SM(None, SADDR); SB(bit); | |
981 | ||
982 | /*----------------------------------------------------------------------*/ | |
983 | ||
984 | /** 1100 0rg0 pop %0 */ | |
985 | ID(mov); W(); DRW(rg); SPOP(); | |
986 | ||
987 | /** 0110 0001 1100 1101 pop %s0 */ | |
988 | ID(mov); W(); DR(PSW); SPOP(); | |
989 | ||
990 | /*----------------------------------------------------------------------*/ | |
991 | ||
992 | /** 1100 0rg1 push %1 */ | |
993 | ID(mov); W(); DPUSH(); SRW(rg); | |
994 | ||
995 | /** 0110 0001 1101 1101 push %s1 */ | |
996 | ID(mov); W(); DPUSH(); SR(PSW); | |
997 | ||
998 | /*----------------------------------------------------------------------*/ | |
999 | ||
1000 | /** 1101 0111 ret */ | |
1001 | ID(ret); | |
1002 | ||
1003 | /** 0110 0001 1111 1100 reti */ | |
1004 | ID(reti); | |
1005 | ||
1006 | /** 0110 0001 1110 1100 retb */ | |
1007 | ID(reti); | |
1008 | ||
1009 | /*----------------------------------------------------------------------*/ | |
1010 | ||
1011 | /** 0110 0001 1110 1011 rol %0, %1 */ | |
1012 | ID(rol); DR(A); SC(1); | |
1013 | ||
1014 | /** 0110 0001 1101 1100 rolc %0, %1 */ | |
1015 | ID(rolc); DR(A); SC(1); | |
1016 | ||
1017 | /** 0110 0001 111r 1110 rolwc %0, %1 */ | |
1018 | ID(rolc); W(); DRW(r); SC(1); | |
1019 | ||
1020 | /** 0110 0001 1101 1011 ror %0, %1 */ | |
1021 | ID(ror); DR(A); SC(1); | |
1022 | ||
1023 | /** 0110 0001 1111 1011 rorc %0, %1 */ | |
1024 | ID(rorc); DR(A); SC(1); | |
1025 | ||
1026 | /*----------------------------------------------------------------------*/ | |
1027 | ||
1028 | /* Note that the branch insns need to be listed before the shift | |
1029 | ones, as "shift count of zero" means "branch insn" */ | |
1030 | ||
1031 | /** 0011 0001 0cnt 1011 sar %0, %1 */ | |
1032 | ID(sar); DR(A); SC(cnt); | |
1033 | ||
1034 | /** 0011 0001 wcnt 1111 sarw %0, %1 */ | |
1035 | ID(sar); W(); DR(AX); SC(wcnt); | |
1036 | ||
1037 | /*----------------------------------------------------------------------*/ | |
1038 | ||
1039 | /** 0110 0001 11rb 1111 sel rb%1 */ | |
1040 | ID(sel); SC(rb); | |
1041 | ||
1042 | /*----------------------------------------------------------------------*/ | |
1043 | ||
3d557b4c | 1044 | /** 0111 0001 0bit 0000 set1 %e!0 */ |
99c513f6 DD |
1045 | ID(mov); DM(None, IMMU(2)); DB(bit); SC(1); |
1046 | ||
3d557b4c | 1047 | /** 0111 0001 1bit 0010 set1 %e0 */ |
99c513f6 DD |
1048 | ID(mov); DM(HL, 0); DB(bit); SC(1); |
1049 | ||
1050 | /** 0111 0001 1bit 1010 set1 %0 */ | |
1051 | ID(mov); DR(A); DB(bit); SC(1); | |
1052 | ||
1053 | /** 0111 0001 1000 0000 set1 cy */ | |
1054 | ID(mov); DCY(); SC(1); | |
1055 | ||
1056 | /** 0111 0001 0bit 1010 set1 %s0 */ | |
1057 | op0 = SFR; | |
1058 | ID(mov); DM(None, op0); DB(bit); SC(1); | |
1059 | if (op0 == RL78_SFR_PSW && bit == 7) | |
1060 | rl78->syntax = "ei"; | |
1061 | ||
1062 | /** 0111 0001 0bit 0010 set1 %0 */ | |
1063 | ID(mov); DM(None, SADDR); DB(bit); SC(1); | |
1064 | ||
1065 | /*----------------------------------------------------------------------*/ | |
1066 | ||
1067 | /** 0011 0001 0cnt 1001 shl %0, %1 */ | |
1068 | ID(shl); DR(A); SC(cnt); | |
1069 | ||
1070 | /** 0011 0001 0cnt 1000 shl %0, %1 */ | |
1071 | ID(shl); DR(B); SC(cnt); | |
1072 | ||
1073 | /** 0011 0001 0cnt 0111 shl %0, %1 */ | |
1074 | ID(shl); DR(C); SC(cnt); | |
1075 | ||
1076 | /** 0011 0001 wcnt 1101 shlw %0, %1 */ | |
1077 | ID(shl); W(); DR(AX); SC(wcnt); | |
1078 | ||
1079 | /** 0011 0001 wcnt 1100 shlw %0, %1 */ | |
1080 | ID(shl); W(); DR(BC); SC(wcnt); | |
1081 | ||
1082 | /*----------------------------------------------------------------------*/ | |
1083 | ||
1084 | /** 0011 0001 0cnt 1010 shr %0, %1 */ | |
1085 | ID(shr); DR(A); SC(cnt); | |
1086 | ||
1087 | /** 0011 0001 wcnt 1110 shrw %0, %1 */ | |
1088 | ID(shr); W(); DR(AX); SC(wcnt); | |
1089 | ||
1090 | /*----------------------------------------------------------------------*/ | |
1091 | ||
1092 | /** 0110 0001 1100 1000 sk%c1 */ | |
1093 | ID(skip); COND(C); | |
1094 | ||
1095 | /** 0110 0001 1110 0011 sk%c1 */ | |
1096 | ID(skip); COND(H); | |
1097 | ||
1098 | /** 0110 0001 1101 1000 sk%c1 */ | |
1099 | ID(skip); COND(NC); | |
1100 | ||
1101 | /** 0110 0001 1111 0011 sk%c1 */ | |
1102 | ID(skip); COND(NH); | |
1103 | ||
1104 | /** 0110 0001 1111 1000 sk%c1 */ | |
1105 | ID(skip); COND(NZ); | |
1106 | ||
1107 | /** 0110 0001 1110 1000 sk%c1 */ | |
1108 | ID(skip); COND(Z); | |
1109 | ||
1110 | /*----------------------------------------------------------------------*/ | |
1111 | ||
3d557b4c | 1112 | /** 0110 0001 1111 1101 stop */ |
99c513f6 DD |
1113 | ID(stop); |
1114 | ||
1115 | /*----------------------------------------------------------------------*/ | |
1116 | ||
3d557b4c | 1117 | /** 0010 1111 sub %0, %e!1 */ |
99c513f6 DD |
1118 | ID(sub); DR(A); SM(None, IMMU(2)); Fzac; |
1119 | ||
3d557b4c | 1120 | /** 0010 1101 sub %0, %e1 */ |
99c513f6 DD |
1121 | ID(sub); DR(A); SM(HL, 0); Fzac; |
1122 | ||
3d557b4c | 1123 | /** 0110 0001 1010 000 sub %0, %e1 */ |
99c513f6 DD |
1124 | ID(sub); DR(A); SM2(HL, B, 0); Fzac; |
1125 | ||
3d557b4c | 1126 | /** 0010 1110 sub %0, %e1 */ |
99c513f6 DD |
1127 | ID(sub); DR(A); SM(HL, IMMU(1)); Fzac; |
1128 | ||
3d557b4c | 1129 | /** 0110 0001 1010 0010 sub %0, %e1 */ |
99c513f6 DD |
1130 | ID(sub); DR(A); SM2(HL, C, 0); Fzac; |
1131 | ||
1132 | /** 0010 1100 sub %0, #%1 */ | |
1133 | ID(sub); DR(A); SC(IMMU(1)); Fzac; | |
1134 | ||
1135 | /** 0110 0001 0010 1rba sub %0, %1 */ | |
1136 | ID(sub); DR(A); SRB(rba); Fzac; | |
1137 | ||
1138 | /** 0010 1011 sub %0, %1 */ | |
1139 | ID(sub); DR(A); SM(None, SADDR); Fzac; | |
1140 | ||
1141 | /** 0110 0001 0010 0reg sub %0, %1 */ | |
1142 | ID(sub); DRB(reg); SR(A); Fzac; | |
1143 | ||
1144 | /** 0010 1010 sub %0, #%1 */ | |
1145 | ID(sub); DM(None, SADDR); SC(IMMU(1)); Fzac; | |
1146 | ||
1147 | /*----------------------------------------------------------------------*/ | |
1148 | ||
3d557b4c | 1149 | /** 0011 1111 subc %0, %e!1 */ |
99c513f6 DD |
1150 | ID(subc); DR(A); SM(None, IMMU(2)); Fzac; |
1151 | ||
3d557b4c | 1152 | /** 0011 1101 subc %0, %e1 */ |
99c513f6 DD |
1153 | ID(subc); DR(A); SM(HL, 0); Fzac; |
1154 | ||
3d557b4c | 1155 | /** 0110 0001 1011 0000 subc %0, %e1 */ |
99c513f6 DD |
1156 | ID(subc); DR(A); SM2(HL, B, 0); Fzac; |
1157 | ||
3d557b4c | 1158 | /** 0110 0001 1011 0010 subc %0, %e1 */ |
99c513f6 DD |
1159 | ID(subc); DR(A); SM2(HL, C, 0); Fzac; |
1160 | ||
3d557b4c | 1161 | /** 0011 1110 subc %0, %e1 */ |
99c513f6 DD |
1162 | ID(subc); DR(A); SM(HL, IMMU(1)); Fzac; |
1163 | ||
1164 | /** 0011 1100 subc %0, #%1 */ | |
1165 | ID(subc); DR(A); SC(IMMU(1)); Fzac; | |
1166 | ||
1167 | /** 0110 0001 0011 1rba subc %0, %1 */ | |
1168 | ID(subc); DR(A); SRB(rba); Fzac; | |
1169 | ||
1170 | /** 0110 0001 0011 0reg subc %0, %1 */ | |
1171 | ID(subc); DRB(reg); SR(A); Fzac; | |
1172 | ||
1173 | /** 0011 1011 subc %0, %1 */ | |
1174 | ID(subc); DR(A); SM(None, SADDR); Fzac; | |
1175 | ||
1176 | /** 0011 1010 subc %0, #%1 */ | |
1177 | ID(subc); DM(None, SADDR); SC(IMMU(1)); Fzac; | |
1178 | ||
1179 | /*----------------------------------------------------------------------*/ | |
1180 | ||
3d557b4c | 1181 | /** 0010 0010 subw %0, %e!1 */ |
99c513f6 DD |
1182 | ID(sub); W(); DR(AX); SM(None, IMMU(2)); Fzac; |
1183 | ||
3d557b4c | 1184 | /** 0110 0001 0010 1001 subw %0, %e1 */ |
99c513f6 DD |
1185 | ID(sub); W(); DR(AX); SM(HL, IMMU(1)); Fzac; |
1186 | ||
1187 | /** 0010 0100 subw %0, #%1 */ | |
1188 | ID(sub); W(); DR(AX); SC(IMMU(2)); Fzac; | |
1189 | ||
1190 | /** 0010 0rw1 subw %0, %1 */ | |
1191 | ID(sub); W(); DR(AX); SRW(rw); Fzac; | |
1192 | ||
1193 | /** 0010 0110 subw %0, %1 */ | |
1194 | ID(sub); W(); DR(AX); SM(None, SADDR); Fzac; | |
1195 | ||
1196 | /** 0010 0000 subw %0, #%1 */ | |
1197 | ID(sub); W(); DR(SP); SC(IMMU(1)); Fzac; | |
1198 | ||
1199 | /*----------------------------------------------------------------------*/ | |
1200 | ||
3d557b4c | 1201 | /** 0110 0001 1010 1010 xch %0, %e!1 */ |
99c513f6 DD |
1202 | ID(xch); DR(A); SM(None, IMMU(2)); |
1203 | ||
3d557b4c | 1204 | /** 0110 0001 1010 1110 xch %0, %e1 */ |
99c513f6 DD |
1205 | ID(xch); DR(A); SM(DE, 0); |
1206 | ||
3d557b4c | 1207 | /** 0110 0001 1010 1111 xch %0, %e1 */ |
99c513f6 DD |
1208 | ID(xch); DR(A); SM(DE, IMMU(1)); |
1209 | ||
3d557b4c | 1210 | /** 0110 0001 1010 1100 xch %0, %e1 */ |
99c513f6 DD |
1211 | ID(xch); DR(A); SM(HL, 0); |
1212 | ||
3d557b4c | 1213 | /** 0110 0001 1011 1001 xch %0, %e1 */ |
99c513f6 DD |
1214 | ID(xch); DR(A); SM2(HL, B, 0); |
1215 | ||
3d557b4c | 1216 | /** 0110 0001 1010 1101 xch %0, %e1 */ |
99c513f6 DD |
1217 | ID(xch); DR(A); SM(HL, IMMU(1)); |
1218 | ||
3d557b4c | 1219 | /** 0110 0001 1010 1001 xch %0, %e1 */ |
99c513f6 DD |
1220 | ID(xch); DR(A); SM2(HL, C, 0); |
1221 | ||
1222 | /** 0110 0001 1000 1reg xch %0, %1 */ | |
1223 | /* Note: DECW uses reg == X, so this must follow DECW */ | |
1224 | ID(xch); DR(A); SRB(reg); | |
1225 | ||
1226 | /** 0110 0001 1010 1000 xch %0, %1 */ | |
1227 | ID(xch); DR(A); SM(None, SADDR); | |
1228 | ||
1229 | /** 0110 0001 1010 1011 xch %0, %1 */ | |
1230 | ID(xch); DR(A); SM(None, SFR); | |
1231 | ||
1232 | /** 0000 1000 xch a, x */ | |
1233 | ID(xch); DR(A); SR(X); | |
1234 | ||
1235 | /*----------------------------------------------------------------------*/ | |
1236 | ||
1237 | /** 0011 0ra1 xchw %0, %1 */ | |
1238 | ID(xch); W(); DR(AX); SRW(ra); | |
1239 | ||
1240 | /*----------------------------------------------------------------------*/ | |
1241 | ||
3d557b4c | 1242 | /** 0111 1111 xor %0, %e!1 */ |
99c513f6 DD |
1243 | ID(xor); DR(A); SM(None, IMMU(2)); Fz; |
1244 | ||
3d557b4c | 1245 | /** 0111 1101 xor %0, %e1 */ |
99c513f6 DD |
1246 | ID(xor); DR(A); SM(HL, 0); Fz; |
1247 | ||
3d557b4c | 1248 | /** 0110 0001 1111 0000 xor %0, %e1 */ |
99c513f6 DD |
1249 | ID(xor); DR(A); SM2(HL, B, 0); Fz; |
1250 | ||
3d557b4c | 1251 | /** 0111 1110 xor %0, %e1 */ |
99c513f6 DD |
1252 | ID(xor); DR(A); SM(HL, IMMU(1)); Fz; |
1253 | ||
3d557b4c | 1254 | /** 0110 0001 1111 0010 xor %0, %e1 */ |
99c513f6 DD |
1255 | ID(xor); DR(A); SM2(HL, C, 0); Fz; |
1256 | ||
1257 | /** 0111 1100 xor %0, #%1 */ | |
1258 | ID(xor); DR(A); SC(IMMU(1)); Fz; | |
1259 | ||
1260 | /** 0110 0001 0111 1rba xor %0, %1 */ | |
1261 | ID(xor); DR(A); SRB(rba); Fz; | |
1262 | ||
1263 | /** 0110 0001 0111 0reg xor %0, %1 */ | |
1264 | ID(xor); DRB(reg); SR(A); Fz; | |
1265 | ||
1266 | /** 0111 1011 xor %0, %1 */ | |
1267 | ID(xor); DR(A); SM(None, SADDR); Fz; | |
1268 | ||
1269 | /** 0111 1010 xor %0, #%1 */ | |
1270 | ID(xor); DM(None, SADDR); SC(IMMU(1)); Fz; | |
1271 | ||
1272 | /*----------------------------------------------------------------------*/ | |
1273 | ||
3d557b4c | 1274 | /** 0111 0001 1bit 0111 xor1 cy, %e1 */ |
99c513f6 DD |
1275 | ID(xor); DCY(); SM(HL, 0); SB(bit); |
1276 | ||
1277 | /** 0111 0001 1bit 1111 xor1 cy, %1 */ | |
1278 | ID(xor); DCY(); SR(A); SB(bit); | |
1279 | ||
1280 | /** 0111 0001 0bit 1111 xor1 cy, %s1 */ | |
1281 | ID(xor); DCY(); SM(None, SFR); SB(bit); | |
1282 | ||
1283 | /** 0111 0001 0bit 0111 xor1 cy, %s1 */ | |
1284 | ID(xor); DCY(); SM(None, SADDR); SB(bit); | |
1285 | ||
1286 | /*----------------------------------------------------------------------*/ | |
1287 | ||
1288 | /** */ | |
1289 | ||
1290 | return rl78->n_bytes; | |
1291 | } |