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x86: eliminate ImmExt abuse
[deliverable/binutils-gdb.git] / opcodes / s12z-opc.c
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ef1ad42b
JD		 1/* s12z-decode.c -- Freescale S12Z disassembly
2 Copyright (C) 2018 Free Software Foundation, Inc.
3
4 This file is part of the GNU opcodes library.
5
6 This library is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3, or (at your option)
9 any later version.
10
11 It is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
13 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
14 License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
20
21#include "sysdep.h"
22#include <stdio.h>
23#include <stdint.h>
24#include <stdbool.h>
25#include <assert.h>
26
27#include "opcode/s12z.h"
28
29#include "bfd.h"
30
31#include "s12z-opc.h"
32
33
34typedef int (* insn_bytes_f) (struct mem_read_abstraction_base *);
35
36typedef void (*operands_f) (struct mem_read_abstraction_base *,
37 int *n_operands, struct operand **operand);
38
e5a557ac
JD		 39typedef enum optr (*discriminator_f) (struct mem_read_abstraction_base *,
40 enum optr hint);
ef1ad42b
JD		 41
42enum OPR_MODE
43 {
44 OPR_IMMe4,
45 OPR_REG,
46 OPR_OFXYS,
47 OPR_XY_PRE_INC,
48 OPR_XY_POST_INC,
49 OPR_XY_PRE_DEC,
50 OPR_XY_POST_DEC,
51 OPR_S_PRE_DEC,
52 OPR_S_POST_INC,
53 OPR_REG_DIRECT,
54 OPR_REG_INDIRECT,
55 OPR_IDX_DIRECT,
56 OPR_IDX_INDIRECT,
57 OPR_EXT1,
58 OPR_IDX2_REG,
59 OPR_IDX3_DIRECT,
60 OPR_IDX3_INDIRECT,
61
62 OPR_EXT18,
63 OPR_IDX3_DIRECT_REG,
64 OPR_EXT3_DIRECT,
65 OPR_EXT3_INDIRECT
66 };
67
68struct opr_pb
69{
70 uint8_t mask;
71 uint8_t value;
72 int n_operands;
73 enum OPR_MODE mode;
74};
75
76static const struct opr_pb opr_pb[] = {
77 {0xF0, 0x70, 1, OPR_IMMe4},
78 {0xF8, 0xB8, 1, OPR_REG},
79 {0xC0, 0x40, 1, OPR_OFXYS},
80 {0xEF, 0xE3, 1, OPR_XY_PRE_INC},
81 {0xEF, 0xE7, 1, OPR_XY_POST_INC},
82 {0xEF, 0xC3, 1, OPR_XY_PRE_DEC},
83 {0xEF, 0xC7, 1, OPR_XY_POST_DEC},
84 {0xFF, 0xFB, 1, OPR_S_PRE_DEC},
85 {0xFF, 0xFF, 1, OPR_S_POST_INC},
86 {0xC8, 0x88, 1, OPR_REG_DIRECT},
87 {0xE8, 0xC8, 1, OPR_REG_INDIRECT},
88
89 {0xCE, 0xC0, 2, OPR_IDX_DIRECT},
90 {0xCE, 0xC4, 2, OPR_IDX_INDIRECT},
91 {0xC0, 0x00, 2, OPR_EXT1},
92
93 {0xC8, 0x80, 3, OPR_IDX2_REG},
94 {0xFA, 0xF8, 3, OPR_EXT18},
95
96 {0xCF, 0xC2, 4, OPR_IDX3_DIRECT},
97 {0xCF, 0xC6, 4, OPR_IDX3_INDIRECT},
98
99 {0xF8, 0xE8, 4, OPR_IDX3_DIRECT_REG},
100 {0xFF, 0xFA, 4, OPR_EXT3_DIRECT},
101 {0xFF, 0xFE, 4, OPR_EXT3_INDIRECT},
102};
103
104/* Return the number of bytes in a OPR operand, including the XB postbyte.
105 It does not include any preceeding opcodes. */
106static int
107x_opr_n_bytes (struct mem_read_abstraction_base *mra, int offset)
108{
109 bfd_byte xb;
110 int status = mra->read (mra, offset, 1, &xb);
111 if (status < 0)
112 return status;
113
114 size_t i;
115 for (i = 0; i < sizeof (opr_pb) / sizeof (opr_pb[0]); ++i)
116 {
117 const struct opr_pb *pb = opr_pb + i;
118 if ((xb & pb->mask) == pb->value)
119 {
120 return pb->n_operands;
121 }
122 }
123
124 return 1;
125}
126
127static int
128opr_n_bytes_p1 (struct mem_read_abstraction_base *mra)
129{
130 return 1 + x_opr_n_bytes (mra, 0);
131}
132
133static int
134opr_n_bytes2 (struct mem_read_abstraction_base *mra)
135{
136 int s = x_opr_n_bytes (mra, 0);
137 s += x_opr_n_bytes (mra, s);
138 return s + 1;
139}
140
141enum BB_MODE
142 {
143 BB_REG_REG_REG,
144 BB_REG_REG_IMM,
145 BB_REG_OPR_REG,
146 BB_OPR_REG_REG,
147 BB_REG_OPR_IMM,
148 BB_OPR_REG_IMM
149 };
150
151struct opr_bb
152{
153 uint8_t mask;
154 uint8_t value;
155 int n_operands;
156 bool opr;
157 enum BB_MODE mode;
158};
159
160static const struct opr_bb bb_modes[] =
161 {
162 {0x60, 0x00, 2, false, BB_REG_REG_REG},
163 {0x60, 0x20, 3, false, BB_REG_REG_IMM},
164 {0x70, 0x40, 2, true, BB_REG_OPR_REG},
165 {0x70, 0x50, 2, true, BB_OPR_REG_REG},
166 {0x70, 0x60, 3, true, BB_REG_OPR_IMM},
167 {0x70, 0x70, 3, true, BB_OPR_REG_IMM}
168 };
169
170static int
171bfextins_n_bytes (struct mem_read_abstraction_base *mra)
172{
173 bfd_byte bb;
174 int status = mra->read (mra, 0, 1, &bb);
175 if (status < 0)
176 return status;
177
178 size_t i;
179 const struct opr_bb *bbs = 0;
180 for (i = 0; i < sizeof (bb_modes) / sizeof (bb_modes[0]); ++i)
181 {
182 bbs = bb_modes + i;
183 if ((bb & bbs->mask) == bbs->value)
184 {
185 break;
186 }
187 }
188
189 int n = bbs->n_operands;
190 if (bbs->opr)
191 n += x_opr_n_bytes (mra, n - 1);
192
193 return n;
194}
195
196static int
197single (struct mem_read_abstraction_base *mra ATTRIBUTE_UNUSED)
198{
199 return 1;
200}
201
202static int
203two (struct mem_read_abstraction_base *mra ATTRIBUTE_UNUSED)
204{
205 return 2;
206}
207
208static int
209three (struct mem_read_abstraction_base *mra ATTRIBUTE_UNUSED)
210{
211 return 3;
212}
213
214static int
215four (struct mem_read_abstraction_base *mra ATTRIBUTE_UNUSED)
216{
217 return 4;
218}
219
220static int
221five (struct mem_read_abstraction_base *mra ATTRIBUTE_UNUSED)
222{
223 return 5;
224}
225
226static int
227pcrel_15bit (struct mem_read_abstraction_base *mra)
228{
229 bfd_byte byte;
230 int status = mra->read (mra, 0, 1, &byte);
231 if (status < 0)
232 return status;
233 return (byte & 0x80) ? 3 : 2;
234}
235
236
237\f
238static int
239xysp_reg_from_postbyte (uint8_t postbyte)
240{
241 int reg = -1;
242 switch ((postbyte & 0x30) >> 4)
243 {
244 case 0:
245 reg = REG_X;
246 break;
247 case 1:
248 reg = REG_Y;
249 break;
250 case 2:
251 reg = REG_S;
252 break;
253 default:
254 reg = REG_P;
255 }
256 return reg;
257}
258
259static struct operand * create_immediate_operand (int value)
260{
261 struct immediate_operand *op = malloc (sizeof (*op));
262
263 ((struct operand *)op)->cl = OPND_CL_IMMEDIATE;
264 op->value = value;
265 ((struct operand *)op)->osize = -1;
266
267 return (struct operand *) op;
268}
269
270static struct operand * create_bitfield_operand (int width, int offset)
271{
272 struct bitfield_operand *op = malloc (sizeof (*op));
273
274 ((struct operand *)op)->cl = OPND_CL_BIT_FIELD;
275 op->width = width;
276 op->offset = offset;
277 ((struct operand *)op)->osize = -1;
278
279 return (struct operand *) op;
280}
281
282static struct operand *
283create_register_operand_with_size (int reg, short osize)
284{
285 struct register_operand *op = malloc (sizeof (*op));
286
287 ((struct operand *)op)->cl = OPND_CL_REGISTER;
288 op->reg = reg;
289 ((struct operand *)op)->osize = osize;
290
291 return (struct operand *) op;
292}
293
294static struct operand *
295create_register_operand (int reg)
296{
297 return create_register_operand_with_size (reg, -1);
298}
299
300static struct operand * create_register_all_operand (void)
301{
302 struct register_operand *op = malloc (sizeof (*op));
303
304 ((struct operand *)op)->cl = OPND_CL_REGISTER_ALL;
305 ((struct operand *)op)->osize = -1;
306
307 return (struct operand *) op;
308}
309
310static struct operand * create_register_all16_operand (void)
311{
312 struct register_operand *op = malloc (sizeof (*op));
313
314 ((struct operand *)op)->cl = OPND_CL_REGISTER_ALL16;
315 ((struct operand *)op)->osize = -1;
316
317 return (struct operand *) op;
318}
319
320
321static struct operand *
322create_simple_memory_operand (bfd_vma addr, bfd_vma base, bool relative)
323{
324 struct simple_memory_operand *op = malloc (sizeof (*op));
325
326 ((struct operand *)op)->cl = OPND_CL_SIMPLE_MEMORY;
327 op->addr = addr;
328 op->base = base;
329 op->relative = relative;
330 ((struct operand *)op)->osize = -1;
331
332 assert (relative || base == 0);
333
334 return (struct operand *) op;
335}
336
337static struct operand *
338create_memory_operand (bool indirect, int base, int n_regs, int reg0, int reg1)
339{
340 struct memory_operand *op = malloc (sizeof (*op));
341
342 ((struct operand *)op)->cl = OPND_CL_MEMORY;
343 op->indirect = indirect;
344 op->base_offset = base;
345 op->mutation = OPND_RM_NONE;
346 op->n_regs = n_regs;
347 op->regs[0] = reg0;
348 op->regs[1] = reg1;
349 ((struct operand *)op)->osize = -1;
350
351 return (struct operand *) op;
352}
353
354static struct operand *
355create_memory_auto_operand (enum op_reg_mutation mutation, int reg)
356{
357 struct memory_operand *op = malloc (sizeof (*op));
358
359 ((struct operand *)op)->cl = OPND_CL_MEMORY;
360 op->indirect = false;
361 op->base_offset = 0;
362 op->mutation = mutation;
363 op->n_regs = 1;
364 op->regs[0] = reg;
365 op->regs[1] = -1;
366 ((struct operand *)op)->osize = -1;
367
368 return (struct operand *) op;
369}
370
371\f
372
373static void
374z_ext24_decode (struct mem_read_abstraction_base *mra, int *n_operands, struct operand **operand)
375{
376 uint8_t buffer[3];
377 int status = mra->read (mra, 0, 3, buffer);
378 if (status < 0)
379 return;
380
381 int i;
382 uint32_t addr = 0;
383 for (i = 0; i < 3; ++i)
384 {
385 addr <<= 8;
386 addr |= buffer[i];
387 }
388
389 operand[(*n_operands)++] = create_simple_memory_operand (addr, 0, false);
390}
391
392
393static uint32_t
394z_decode_signed_value (struct mem_read_abstraction_base *mra, int offset, short size)
395{
396 assert (size >0);
397 assert (size <= 4);
398 bfd_byte buffer[4];
399 if (0 > mra->read (mra, offset, size, buffer))
400 {
401 return 0;
402 }
403
404 int i;
405 uint32_t value = 0;
406 for (i = 0; i < size; ++i)
407 {
408 value |= buffer[i] << (8 * (size - i - 1));
409 }
410
411 if (buffer[0] & 0x80)
412 {
413 /* Deal with negative values */
414 value -= 0x1UL << (size * 8);
415 }
416 return value;
417}
418
419static uint32_t
420decode_signed_value (struct mem_read_abstraction_base *mra, short size)
421{
422 return z_decode_signed_value (mra, 0, size);
423}
424
425static void
426x_imm1 (struct mem_read_abstraction_base *mra,
427 int offset,
428 int *n_operands, struct operand **operand)
429{
430 bfd_byte byte;
431 int status = mra->read (mra, offset, 1, &byte);
432 if (status < 0)
433 return;
434
435 operand[(*n_operands)++] = create_immediate_operand (byte);
436}
437
438/* An eight bit immediate operand. */
439static void
440imm1_decode (struct mem_read_abstraction_base *mra,
441 int *n_operands, struct operand **operand)
442{
443 x_imm1 (mra, 0, n_operands, operand);
444}
445
446static void
447trap_decode (struct mem_read_abstraction_base *mra,
448 int *n_operands, struct operand **operand)
449{
450 x_imm1 (mra, -1, n_operands, operand);
451}
452
453
454static struct operand *
455x_opr_decode_with_size (struct mem_read_abstraction_base *mra, int offset,
456 short osize)
457{
458 bfd_byte postbyte;
459 int status = mra->read (mra, offset, 1, &postbyte);
460 if (status < 0)
461 return NULL;
462 offset++;
463
464 enum OPR_MODE mode = -1;
465 size_t i;
466 for (i = 0; i < sizeof (opr_pb) / sizeof (opr_pb[0]); ++i)
467 {
468 const struct opr_pb *pb = opr_pb + i;
469 if ((postbyte & pb->mask) == pb->value)
470 {
471 mode = pb->mode;
472 break;
473 }
474 }
475
476 struct operand *operand = NULL;
477 switch (mode)
478 {
479 case OPR_IMMe4:
480 {
481 int n;
482 uint8_t x = (postbyte & 0x0F);
483 if (x == 0)
484 n = -1;
485 else
486 n = x;
487
488 operand = create_immediate_operand (n);
489 break;
490 }
491 case OPR_REG:
492 {
493 uint8_t x = (postbyte & 0x07);
494 operand = create_register_operand (x);
495 break;
496 }
497 case OPR_OFXYS:
498 {
499 operand = create_memory_operand (false, postbyte & 0x0F, 1,
500 xysp_reg_from_postbyte (postbyte), -1);
501 break;
502 }
503 case OPR_REG_DIRECT:
504 {
505 operand = create_memory_operand (false, 0, 2, postbyte & 0x07,
506 xysp_reg_from_postbyte (postbyte));
507 break;
508 }
509 case OPR_REG_INDIRECT:
510 {
511 operand = create_memory_operand (true, 0, 2, postbyte & 0x07,
512 (postbyte & 0x10) ? REG_Y : REG_X);
513 break;
514 }
515
516 case OPR_IDX_INDIRECT:
517 {
518 uint8_t x1;
519 mra->read (mra, offset, 1, &x1);
520 int idx = x1;
521
522 if (postbyte & 0x01)
523 {
524 /* Deal with negative values */
525 idx -= 0x1UL << 8;
526 }
527
528 operand = create_memory_operand (true, idx, 1,
529 xysp_reg_from_postbyte (postbyte), -1);
530 break;
531 }
532
533 case OPR_IDX3_DIRECT:
534 {
535 uint8_t x[3];
536 mra->read (mra, offset, 3, x);
537 int idx = x[0] << 16 | x[1] << 8 | x[2];
538
539 if (x[0] & 0x80)
540 {
541 /* Deal with negative values */
542 idx -= 0x1UL << 24;
543 }
544
545 operand = create_memory_operand (false, idx, 1,
546 xysp_reg_from_postbyte (postbyte), -1);
547 break;
548 }
549
550 case OPR_IDX3_DIRECT_REG:
551 {
552 uint8_t x[3];
553 mra->read (mra, offset, 3, x);
554 int idx = x[0] << 16 | x[1] << 8 | x[2];
555
556 if (x[0] & 0x80)
557 {
558 /* Deal with negative values */
559 idx -= 0x1UL << 24;
560 }
561
562 operand = create_memory_operand (false, idx, 1, postbyte & 0x07, -1);
563 break;
564 }
565
566 case OPR_IDX3_INDIRECT:
567 {
568 uint8_t x[3];
569 mra->read (mra, offset, 3, x);
570 int idx = x[0] << 16 | x[1] << 8 | x[2];
571
572 if (x[0] & 0x80)
573 {
574 /* Deal with negative values */
575 idx -= 0x1UL << 24;
576 }
577
578 operand = create_memory_operand (true, idx, 1,
579 xysp_reg_from_postbyte (postbyte), -1);
580 break;
581 }
582
583 case OPR_IDX_DIRECT:
584 {
585 uint8_t x1;
586 mra->read (mra, offset, 1, &x1);
587 int idx = x1;
588
589 if (postbyte & 0x01)
590 {
591 /* Deal with negative values */
592 idx -= 0x1UL << 8;
593 }
594
595 operand = create_memory_operand (false, idx, 1,
596 xysp_reg_from_postbyte (postbyte), -1);
597 break;
598 }
599
600 case OPR_IDX2_REG:
601 {
602 uint8_t x[2];
603 mra->read (mra, offset, 2, x);
604 uint32_t idx = x[1] | x[0] << 8 ;
605 idx |= (postbyte & 0x30) << 12;
606
607 operand = create_memory_operand (false, idx, 1, postbyte & 0x07, -1);
608 break;
609 }
610
611 case OPR_XY_PRE_INC:
612 {
613 operand = create_memory_auto_operand (OPND_RM_PRE_INC,
614 (postbyte & 0x10) ? REG_Y: REG_X);
615 break;
616 }
617 case OPR_XY_POST_INC:
618 {
619 operand = create_memory_auto_operand (OPND_RM_POST_INC,
620 (postbyte & 0x10) ? REG_Y: REG_X);
621 break;
622 }
623 case OPR_XY_PRE_DEC:
624 {
625 operand = create_memory_auto_operand (OPND_RM_PRE_DEC,
626 (postbyte & 0x10) ? REG_Y: REG_X);
627 break;
628 }
629 case OPR_XY_POST_DEC:
630 {
631 operand = create_memory_auto_operand (OPND_RM_POST_DEC,
632 (postbyte & 0x10) ? REG_Y: REG_X);
633 break;
634 }
635 case OPR_S_PRE_DEC:
636 {
637 operand = create_memory_auto_operand (OPND_RM_PRE_DEC, REG_S);
638 break;
639 }
640 case OPR_S_POST_INC:
641 {
642 operand = create_memory_auto_operand (OPND_RM_POST_INC, REG_S);
643 break;
644 }
645
646 case OPR_EXT18:
647 {
648 const size_t size = 2;
649 bfd_byte buffer[4];
650 status = mra->read (mra, offset, size, buffer);
651 if (status < 0)
652 operand = NULL;
653
654 uint32_t ext18 = 0;
655 for (i = 0; i < size; ++i)
656 {
657 ext18 <<= 8;
658 ext18 |= buffer[i];
659 }
660
661 ext18 |= (postbyte & 0x01) << 16;
662 ext18 |= (postbyte & 0x04) << 15;
663
664 operand = create_simple_memory_operand (ext18, 0, false);
665 break;
666 }
667
668 case OPR_EXT1:
669 {
670 uint8_t x1 = 0;
671 mra->read (mra, offset, 1, &x1);
672 int16_t addr;
673 addr = x1;
674 addr |= (postbyte & 0x3f) << 8;
675
676 operand = create_simple_memory_operand (addr, 0, false);
677 break;
678 }
679
680 case OPR_EXT3_DIRECT:
681 {
682 const size_t size = 3;
683 bfd_byte buffer[4];
684 status = mra->read (mra, offset, size, buffer);
685 if (status < 0)
686 operand = NULL;
687
688 uint32_t ext24 = 0;
689 for (i = 0; i < size; ++i)
690 {
691 ext24 |= buffer[i] << (8 * (size - i - 1));
692 }
693
694 operand = create_simple_memory_operand (ext24, 0, false);
695 break;
696 }
697
698 case OPR_EXT3_INDIRECT:
699 {
700 const size_t size = 3;
701 bfd_byte buffer[4];
702 status = mra->read (mra, offset, size, buffer);
703 if (status < 0)
704 operand = NULL;
705
706 uint32_t ext24 = 0;
707 for (i = 0; i < size; ++i)
708 {
709 ext24 |= buffer[i] << (8 * (size - i - 1));
710 }
711
712 operand = create_memory_operand (true, ext24, 0, -1, -1);
713 break;
714 }
715
716 default:
717 printf ("Unknown OPR mode #0x%x (%d)", postbyte, mode);
718 abort ();
719 }
720
721 operand->osize = osize;
722
723 return operand;
724}
725
726static struct operand *
727x_opr_decode (struct mem_read_abstraction_base *mra, int offset)
728{
729 return x_opr_decode_with_size (mra, offset, -1);
730}
731
732static void
733z_opr_decode (struct mem_read_abstraction_base *mra,
734 int *n_operands, struct operand **operand)
735{
736 operand[(*n_operands)++] = x_opr_decode (mra, 0);
737}
738
739static void
740z_opr_decode2 (struct mem_read_abstraction_base *mra,
741 int *n_operands, struct operand **operand)
742{
743 int n = x_opr_n_bytes (mra, 0);
744
745 operand[(*n_operands)++] = x_opr_decode (mra, 0);
746 operand[(*n_operands)++] = x_opr_decode (mra, n);
747}
748
749static void
750imm1234 (struct mem_read_abstraction_base *mra, int base,
751 int *n_operands, struct operand **operand)
752{
753 bfd_byte opcode;
754 int status = mra->read (mra, -1, 1, &opcode);
755 if (status < 0)
756 return;
757
758 opcode -= base;
759
760 int size = registers[opcode & 0xF].bytes;
761
762 uint32_t imm = decode_signed_value (mra, size);
763
764 operand[(*n_operands)++] = create_immediate_operand (imm);
765}
766
767
768/* Special case of LD and CMP with register S and IMM operand */
769static void
770reg_s_imm (struct mem_read_abstraction_base *mra, int *n_operands,
771 struct operand **operand)
772{
773 operand[(*n_operands)++] = create_register_operand (REG_S);
774
775 uint32_t imm = decode_signed_value (mra, 3);
776 operand[(*n_operands)++] = create_immediate_operand (imm);
777}
778
779/* Special case of LD, CMP and ST with register S and OPR operand */
780static void
781reg_s_opr (struct mem_read_abstraction_base *mra, int *n_operands,
782 struct operand **operand)
783{
784 operand[(*n_operands)++] = create_register_operand (REG_S);
785 operand[(*n_operands)++] = x_opr_decode (mra, 0);
786}
787
788static void
789z_imm1234_8base (struct mem_read_abstraction_base *mra, int *n_operands,
790 struct operand **operand)
791{
792 imm1234 (mra, 8, n_operands, operand);
793}
794
795static void
796z_imm1234_0base (struct mem_read_abstraction_base *mra, int *n_operands,
797 struct operand **operand)
798{
799 imm1234 (mra, 0, n_operands, operand);
800}
801
802
803static void
804z_tfr (struct mem_read_abstraction_base *mra, int *n_operands,
805 struct operand **operand)
806{
807 bfd_byte byte;
808 int status = mra->read (mra, 0, 1, &byte);
809 if (status < 0)
810 return;
811
812 operand[(*n_operands)++] = create_register_operand (byte >> 4);
813 operand[(*n_operands)++] = create_register_operand (byte & 0x0F);
814}
815
816static void
817z_reg (struct mem_read_abstraction_base *mra, int *n_operands,
818 struct operand **operand)
819{
820 bfd_byte byte;
821 int status = mra->read (mra, -1, 1, &byte);
822 if (status < 0)
823 return;
824
825 operand[(*n_operands)++] = create_register_operand (byte & 0x07);
826}
827
828
829static void
830reg_xy (struct mem_read_abstraction_base *mra,
831 int *n_operands, struct operand **operand)
832{
833 bfd_byte byte;
834 int status = mra->read (mra, -1, 1, &byte);
835 if (status < 0)
836 return;
837
838 operand[(*n_operands)++] =
839 create_register_operand ((byte & 0x01) ? REG_Y : REG_X);
840}
841
842static void
843lea_reg_xys_opr (struct mem_read_abstraction_base *mra,
844 int *n_operands, struct operand **operand)
845{
846 bfd_byte byte;
847 int status = mra->read (mra, -1, 1, &byte);
848 if (status < 0)
849 return;
850
851 int reg_xys = -1;
852 switch (byte & 0x03)
853 {
854 case 0x00:
855 reg_xys = REG_X;
856 break;
857 case 0x01:
858 reg_xys = REG_Y;
859 break;
860 case 0x02:
861 reg_xys = REG_S;
862 break;
863 }
864
865 operand[(*n_operands)++] = create_register_operand (reg_xys);
866 operand[(*n_operands)++] = x_opr_decode (mra, 0);
867}
868
869static void
870lea_reg_xys (struct mem_read_abstraction_base *mra,
871 int *n_operands, struct operand **operand)
872{
873 bfd_byte byte;
874 int status = mra->read (mra, -1, 1, &byte);
875 if (status < 0)
876 return;
877
878 int reg_n = -1;
879 switch (byte & 0x03)
880 {
881 case 0x00:
882 reg_n = REG_X;
883 break;
884 case 0x01:
885 reg_n = REG_Y;
886 break;
887 case 0x02:
888 reg_n = REG_S;
889 break;
890 }
891
892 status = mra->read (mra, 0, 1, &byte);
893 if (status < 0)
894 return;
895
896 operand[(*n_operands)++] = create_register_operand (reg_n);
897 operand[(*n_operands)++] = create_memory_operand (false, (int8_t) byte,
898 1, reg_n, -1);
899}
900
901
902/* PC Relative offsets of size 15 or 7 bits */
903static void
904rel_15_7 (struct mem_read_abstraction_base *mra, int offset,
905 int *n_operands, struct operand **operands)
906{
907 bfd_byte upper;
908 int status = mra->read (mra, offset - 1, 1, &upper);
909 if (status < 0)
910 return;
911
912 bool rel_size = (upper & 0x80);
913
914 int16_t addr = upper;
915 if (rel_size)
916 {
917 /* 15 bits. Get the next byte */
918 bfd_byte lower;
919 status = mra->read (mra, offset, 1, &lower);
920 if (status < 0)
921 return;
922
923 addr <<= 8;
924 addr |= lower;
925 addr &= 0x7FFF;
926
927 bool negative = (addr & 0x4000);
928 addr &= 0x3FFF;
929 if (negative)
930 addr = addr - 0x4000;
931 }
932 else
933 {
934 /* 7 bits. */
935 bool negative = (addr & 0x40);
936 addr &= 0x3F;
937 if (negative)
938 addr = addr - 0x40;
939 }
940
941 operands[(*n_operands)++] =
942 create_simple_memory_operand (addr, mra->posn (mra) - 1, true);
943}
944
945
946/* PC Relative offsets of size 15 or 7 bits */
947static void
948decode_rel_15_7 (struct mem_read_abstraction_base *mra,
949 int *n_operands, struct operand **operand)
950{
951 rel_15_7 (mra, 1, n_operands, operand);
952}
953
954static int shift_n_bytes (struct mem_read_abstraction_base *);
955static int mov_imm_opr_n_bytes (struct mem_read_abstraction_base *);
956static int loop_prim_n_bytes (struct mem_read_abstraction_base *);
957static int bm_rel_n_bytes (struct mem_read_abstraction_base *);
958static int mul_n_bytes (struct mem_read_abstraction_base *);
959static int bm_n_bytes (struct mem_read_abstraction_base *);
960
961static void psh_pul_decode (struct mem_read_abstraction_base *mra, int *n_operands, struct operand **operand);
962static void shift_decode (struct mem_read_abstraction_base *mra, int *n_operands, struct operand **operand);
963static void mul_decode (struct mem_read_abstraction_base *mra, int *n_operands, struct operand **operand);
964static void bm_decode (struct mem_read_abstraction_base *mra, int *n_operands, struct operand **operand);
965static void bm_rel_decode (struct mem_read_abstraction_base *mra, int *n_operands, struct operand **operand);
966static void mov_imm_opr (struct mem_read_abstraction_base *mra, int *n_operands, struct operand **operand);
967static void loop_primitive_decode (struct mem_read_abstraction_base *mra, int *n_operands, struct operand **operands);
968static void bit_field_decode (struct mem_read_abstraction_base *mra, int *n_operands, struct operand **operands);
969static void exg_sex_decode (struct mem_read_abstraction_base *mra, int *n_operands, struct operand **operands);
970
971
e5a557ac
JD		 972static enum optr shift_discrim (struct mem_read_abstraction_base *mra, enum optr hint);
973static enum optr psh_pul_discrim (struct mem_read_abstraction_base *mra, enum optr hint);
974static enum optr mul_discrim (struct mem_read_abstraction_base *mra, enum optr hint);
975static enum optr loop_primitive_discrim (struct mem_read_abstraction_base *mra, enum optr hint);
976static enum optr bit_field_discrim (struct mem_read_abstraction_base *mra, enum optr hint);
977static enum optr exg_sex_discrim (struct mem_read_abstraction_base *mra, enum optr hint);
ef1ad42b
JD		 978
979
980static void
981cmp_xy (struct mem_read_abstraction_base *mra ATTRIBUTE_UNUSED,
982 int *n_operands, struct operand **operand)
983{
984 operand[(*n_operands)++] = create_register_operand (REG_X);
985 operand[(*n_operands)++] = create_register_operand (REG_Y);
986}
987
988static void
989sub_d6_x_y (struct mem_read_abstraction_base *mra ATTRIBUTE_UNUSED,
990 int *n_operands, struct operand **operand)
991{
992 operand[(*n_operands)++] = create_register_operand (REG_D6);
993 operand[(*n_operands)++] = create_register_operand (REG_X);
994 operand[(*n_operands)++] = create_register_operand (REG_Y);
995}
996
997static void
998sub_d6_y_x (struct mem_read_abstraction_base *mra ATTRIBUTE_UNUSED,
999 int *n_operands, struct operand **operand)
1000{
1001 operand[(*n_operands)++] = create_register_operand (REG_D6);
1002 operand[(*n_operands)++] = create_register_operand (REG_Y);
1003 operand[(*n_operands)++] = create_register_operand (REG_X);
1004}
1005
1006static void ld_18bit_decode (struct mem_read_abstraction_base *mra, int *n_operands, struct operand **operand);
1007
e5a557ac
JD		 1008static enum optr
1009mul_discrim (struct mem_read_abstraction_base *mra, enum optr hint)
ef1ad42b
JD		 1010{
1011 uint8_t mb;
1012 int status = mra->read (mra, 0, 1, &mb);
1013 if (status < 0)
1014 return OP_INVALID;
1015
1016 bool signed_op = (mb & 0x80);
1017
1018 switch (hint)
1019 {
1020 case OPBASE_mul:
1021 return signed_op ? OP_muls : OP_mulu;
1022 break;
1023 case OPBASE_div:
1024 return signed_op ? OP_divs : OP_divu;
1025 break;
1026 case OPBASE_mod:
1027 return signed_op ? OP_mods : OP_modu;
1028 break;
1029 case OPBASE_mac:
1030 return signed_op ? OP_macs : OP_macu;
1031 break;
1032 case OPBASE_qmul:
1033 return signed_op ? OP_qmuls : OP_qmulu;
1034 break;
1035 default:
1036 abort ();
1037 }
1038
1039 return OP_INVALID;
1040}
1041
1042struct opcode
1043{
1044 /* The operation that this opcode performs. */
e5a557ac 1045 enum optr operator;
ef1ad42b
JD		 1046
1047 /* The size of this operation. May be -1 if it is implied
1048 in the operands or if size is not applicable. */
1049 short osize;
1050
1051 /* Some operations need this function to work out which operation
1052 is intended. */
1053 discriminator_f discriminator;
1054
1055 /* A function returning the number of bytes in this instruction. */
1056 insn_bytes_f insn_bytes;
1057
1058 operands_f operands;
1059 operands_f operands2;
1060};
1061
1062static const struct opcode page2[] =
1063 {
1064 [0x00] = {OP_ld, -1, 0, opr_n_bytes_p1, reg_s_opr, 0},
1065 [0x01] = {OP_st, -1, 0, opr_n_bytes_p1, reg_s_opr, 0},
1066 [0x02] = {OP_cmp, -1, 0, opr_n_bytes_p1, reg_s_opr, 0},
1067 [0x03] = {OP_ld, -1, 0, four, reg_s_imm, 0},
1068 [0x04] = {OP_cmp, -1, 0, four, reg_s_imm, 0},
1069 [0x05] = {OP_stop, -1, 0, single, 0, 0},
1070 [0x06] = {OP_wai, -1, 0, single, 0, 0},
1071 [0x07] = {OP_sys, -1, 0, single, 0, 0},
1072 [0x08] = {0xFFFF, -1, bit_field_discrim, bfextins_n_bytes, bit_field_decode, 0}, /* BFEXT / BFINS */
1073 [0x09] = {0xFFFF, -1, bit_field_discrim, bfextins_n_bytes, bit_field_decode, 0},
1074 [0x0a] = {0xFFFF, -1, bit_field_discrim, bfextins_n_bytes, bit_field_decode, 0},
1075 [0x0b] = {0xFFFF, -1, bit_field_discrim, bfextins_n_bytes, bit_field_decode, 0},
1076 [0x0c] = {0xFFFF, -1, bit_field_discrim, bfextins_n_bytes, bit_field_decode, 0},
1077 [0x0d] = {0xFFFF, -1, bit_field_discrim, bfextins_n_bytes, bit_field_decode, 0},
1078 [0x0e] = {0xFFFF, -1, bit_field_discrim, bfextins_n_bytes, bit_field_decode, 0},
1079 [0x0f] = {0xFFFF, -1, bit_field_discrim, bfextins_n_bytes, bit_field_decode, 0},
1080 [0x10] = {OP_minu, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1081 [0x11] = {OP_minu, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1082 [0x12] = {OP_minu, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1083 [0x13] = {OP_minu, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1084 [0x14] = {OP_minu, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1085 [0x15] = {OP_minu, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1086 [0x16] = {OP_minu, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1087 [0x17] = {OP_minu, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1088 [0x18] = {OP_maxu, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1089 [0x19] = {OP_maxu, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1090 [0x1a] = {OP_maxu, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1091 [0x1b] = {OP_maxu, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1092 [0x1c] = {OP_maxu, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1093 [0x1d] = {OP_maxu, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1094 [0x1e] = {OP_maxu, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1095 [0x1f] = {OP_maxu, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1096 [0x20] = {OP_mins, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1097 [0x21] = {OP_mins, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1098 [0x22] = {OP_mins, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1099 [0x23] = {OP_mins, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1100 [0x24] = {OP_mins, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1101 [0x25] = {OP_mins, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1102 [0x26] = {OP_mins, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1103 [0x27] = {OP_mins, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1104 [0x28] = {OP_maxs, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1105 [0x29] = {OP_maxs, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1106 [0x2a] = {OP_maxs, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1107 [0x2b] = {OP_maxs, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1108 [0x2c] = {OP_maxs, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1109 [0x2d] = {OP_maxs, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1110 [0x2e] = {OP_maxs, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1111 [0x2f] = {OP_maxs, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1112 [0x30] = {OPBASE_div, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1113 [0x31] = {OPBASE_div, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1114 [0x32] = {OPBASE_div, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1115 [0x33] = {OPBASE_div, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1116 [0x34] = {OPBASE_div, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1117 [0x35] = {OPBASE_div, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1118 [0x36] = {OPBASE_div, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1119 [0x37] = {OPBASE_div, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1120 [0x38] = {OPBASE_mod, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1121 [0x39] = {OPBASE_mod, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1122 [0x3a] = {OPBASE_mod, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1123 [0x3b] = {OPBASE_mod, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1124 [0x3c] = {OPBASE_mod, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1125 [0x3d] = {OPBASE_mod, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1126 [0x3e] = {OPBASE_mod, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1127 [0x3f] = {OPBASE_mod, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1128 [0x40] = {OP_abs, -1, 0, single, z_reg, 0},
1129 [0x41] = {OP_abs, -1, 0, single, z_reg, 0},
1130 [0x42] = {OP_abs, -1, 0, single, z_reg, 0},
1131 [0x43] = {OP_abs, -1, 0, single, z_reg, 0},
1132 [0x44] = {OP_abs, -1, 0, single, z_reg, 0},
1133 [0x45] = {OP_abs, -1, 0, single, z_reg, 0},
1134 [0x46] = {OP_abs, -1, 0, single, z_reg, 0},
1135 [0x47] = {OP_abs, -1, 0, single, z_reg, 0},
1136 [0x48] = {OPBASE_mac, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1137 [0x49] = {OPBASE_mac, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1138 [0x4a] = {OPBASE_mac, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1139 [0x4b] = {OPBASE_mac, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1140 [0x4c] = {OPBASE_mac, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1141 [0x4d] = {OPBASE_mac, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1142 [0x4e] = {OPBASE_mac, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1143 [0x4f] = {OPBASE_mac, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1144 [0x50] = {OP_adc, -1, 0, three, z_reg, z_imm1234_0base},
1145 [0x51] = {OP_adc, -1, 0, three, z_reg, z_imm1234_0base},
1146 [0x52] = {OP_adc, -1, 0, three, z_reg, z_imm1234_0base},
1147 [0x53] = {OP_adc, -1, 0, three, z_reg, z_imm1234_0base},
1148 [0x54] = {OP_adc, -1, 0, two, z_reg, z_imm1234_0base},
1149 [0x55] = {OP_adc, -1, 0, two, z_reg, z_imm1234_0base},
1150 [0x56] = {OP_adc, -1, 0, five, z_reg, z_imm1234_0base},
1151 [0x57] = {OP_adc, -1, 0, five, z_reg, z_imm1234_0base},
1152 [0x58] = {OP_bit, -1, 0, three, z_reg, z_imm1234_8base},
1153 [0x59] = {OP_bit, -1, 0, three, z_reg, z_imm1234_8base},
1154 [0x5a] = {OP_bit, -1, 0, three, z_reg, z_imm1234_8base},
1155 [0x5b] = {OP_bit, -1, 0, three, z_reg, z_imm1234_8base},
1156 [0x5c] = {OP_bit, -1, 0, two, z_reg, z_imm1234_8base},
1157 [0x5d] = {OP_bit, -1, 0, two, z_reg, z_imm1234_8base},
1158 [0x5e] = {OP_bit, -1, 0, five, z_reg, z_imm1234_8base},
1159 [0x5f] = {OP_bit, -1, 0, five, z_reg, z_imm1234_8base},
1160 [0x60] = {OP_adc, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1161 [0x61] = {OP_adc, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1162 [0x62] = {OP_adc, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1163 [0x63] = {OP_adc, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1164 [0x64] = {OP_adc, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1165 [0x65] = {OP_adc, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1166 [0x66] = {OP_adc, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1167 [0x67] = {OP_adc, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1168 [0x68] = {OP_bit, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1169 [0x69] = {OP_bit, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1170 [0x6a] = {OP_bit, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1171 [0x6b] = {OP_bit, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1172 [0x6c] = {OP_bit, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1173 [0x6d] = {OP_bit, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1174 [0x6e] = {OP_bit, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1175 [0x6f] = {OP_bit, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1176 [0x70] = {OP_sbc, -1, 0, three, z_reg, z_imm1234_0base},
1177 [0x71] = {OP_sbc, -1, 0, three, z_reg, z_imm1234_0base},
1178 [0x72] = {OP_sbc, -1, 0, three, z_reg, z_imm1234_0base},
1179 [0x73] = {OP_sbc, -1, 0, three, z_reg, z_imm1234_0base},
1180 [0x74] = {OP_sbc, -1, 0, two, z_reg, z_imm1234_0base},
1181 [0x75] = {OP_sbc, -1, 0, two, z_reg, z_imm1234_0base},
1182 [0x76] = {OP_sbc, -1, 0, five, z_reg, z_imm1234_0base},
1183 [0x77] = {OP_sbc, -1, 0, five, z_reg, z_imm1234_0base},
1184 [0x78] = {OP_eor, -1, 0, three, z_reg, z_imm1234_8base},
1185 [0x79] = {OP_eor, -1, 0, three, z_reg, z_imm1234_8base},
1186 [0x7a] = {OP_eor, -1, 0, three, z_reg, z_imm1234_8base},
1187 [0x7b] = {OP_eor, -1, 0, three, z_reg, z_imm1234_8base},
1188 [0x7c] = {OP_eor, -1, 0, two, z_reg, z_imm1234_8base},
1189 [0x7d] = {OP_eor, -1, 0, two, z_reg, z_imm1234_8base},
1190 [0x7e] = {OP_eor, -1, 0, five, z_reg, z_imm1234_8base},
1191 [0x7f] = {OP_eor, -1, 0, five, z_reg, z_imm1234_8base},
1192 [0x80] = {OP_sbc, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1193 [0x81] = {OP_sbc, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1194 [0x82] = {OP_sbc, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1195 [0x83] = {OP_sbc, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1196 [0x84] = {OP_sbc, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1197 [0x85] = {OP_sbc, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1198 [0x86] = {OP_sbc, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1199 [0x87] = {OP_sbc, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1200 [0x88] = {OP_eor, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1201 [0x89] = {OP_eor, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1202 [0x8a] = {OP_eor, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1203 [0x8b] = {OP_eor, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1204 [0x8c] = {OP_eor, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1205 [0x8d] = {OP_eor, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1206 [0x8e] = {OP_eor, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1207 [0x8f] = {OP_eor, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1208 [0x90] = {OP_rti, -1, 0, single, 0, 0},
1209 [0x91] = {OP_clb, -1, 0, two, z_tfr, 0},
1210 [0x92] = {OP_trap, -1, 0, single, trap_decode, 0},
1211 [0x93] = {OP_trap, -1, 0, single, trap_decode, 0},
1212 [0x94] = {OP_trap, -1, 0, single, trap_decode, 0},
1213 [0x95] = {OP_trap, -1, 0, single, trap_decode, 0},
1214 [0x96] = {OP_trap, -1, 0, single, trap_decode, 0},
1215 [0x97] = {OP_trap, -1, 0, single, trap_decode, 0},
1216 [0x98] = {OP_trap, -1, 0, single, trap_decode, 0},
1217 [0x99] = {OP_trap, -1, 0, single, trap_decode, 0},
1218 [0x9a] = {OP_trap, -1, 0, single, trap_decode, 0},
1219 [0x9b] = {OP_trap, -1, 0, single, trap_decode, 0},
1220 [0x9c] = {OP_trap, -1, 0, single, trap_decode, 0},
1221 [0x9d] = {OP_trap, -1, 0, single, trap_decode, 0},
1222 [0x9e] = {OP_trap, -1, 0, single, trap_decode, 0},
1223 [0x9f] = {OP_trap, -1, 0, single, trap_decode, 0},
1224 [0xa0] = {OP_sat, -1, 0, single, z_reg, 0},
1225 [0xa1] = {OP_sat, -1, 0, single, z_reg, 0},
1226 [0xa2] = {OP_sat, -1, 0, single, z_reg, 0},
1227 [0xa3] = {OP_sat, -1, 0, single, z_reg, 0},
1228 [0xa4] = {OP_sat, -1, 0, single, z_reg, 0},
1229 [0xa5] = {OP_sat, -1, 0, single, z_reg, 0},
1230 [0xa6] = {OP_sat, -1, 0, single, z_reg, 0},
1231 [0xa7] = {OP_sat, -1, 0, single, z_reg, 0},
1232 [0xa8] = {OP_trap, -1, 0, single, trap_decode, 0},
1233 [0xa9] = {OP_trap, -1, 0, single, trap_decode, 0},
1234 [0xaa] = {OP_trap, -1, 0, single, trap_decode, 0},
1235 [0xab] = {OP_trap, -1, 0, single, trap_decode, 0},
1236 [0xac] = {OP_trap, -1, 0, single, trap_decode, 0},
1237 [0xad] = {OP_trap, -1, 0, single, trap_decode, 0},
1238 [0xae] = {OP_trap, -1, 0, single, trap_decode, 0},
1239 [0xaf] = {OP_trap, -1, 0, single, trap_decode, 0},
1240 [0xb0] = {OPBASE_qmul, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1241 [0xb1] = {OPBASE_qmul, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1242 [0xb2] = {OPBASE_qmul, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1243 [0xb3] = {OPBASE_qmul, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1244 [0xb4] = {OPBASE_qmul, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1245 [0xb5] = {OPBASE_qmul, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1246 [0xb6] = {OPBASE_qmul, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1247 [0xb7] = {OPBASE_qmul, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1248 [0xb8] = {OP_trap, -1, 0, single, trap_decode, 0},
1249 [0xb9] = {OP_trap, -1, 0, single, trap_decode, 0},
1250 [0xba] = {OP_trap, -1, 0, single, trap_decode, 0},
1251 [0xbb] = {OP_trap, -1, 0, single, trap_decode, 0},
1252 [0xbc] = {OP_trap, -1, 0, single, trap_decode, 0},
1253 [0xbd] = {OP_trap, -1, 0, single, trap_decode, 0},
1254 [0xbe] = {OP_trap, -1, 0, single, trap_decode, 0},
1255 [0xbf] = {OP_trap, -1, 0, single, trap_decode, 0},
1256 [0xc0] = {OP_trap, -1, 0, single, trap_decode, 0},
1257 [0xc1] = {OP_trap, -1, 0, single, trap_decode, 0},
1258 [0xc2] = {OP_trap, -1, 0, single, trap_decode, 0},
1259 [0xc3] = {OP_trap, -1, 0, single, trap_decode, 0},
1260 [0xc4] = {OP_trap, -1, 0, single, trap_decode, 0},
1261 [0xc5] = {OP_trap, -1, 0, single, trap_decode, 0},
1262 [0xc6] = {OP_trap, -1, 0, single, trap_decode, 0},
1263 [0xc7] = {OP_trap, -1, 0, single, trap_decode, 0},
1264 [0xc8] = {OP_trap, -1, 0, single, trap_decode, 0},
1265 [0xc9] = {OP_trap, -1, 0, single, trap_decode, 0},
1266 [0xca] = {OP_trap, -1, 0, single, trap_decode, 0},
1267 [0xcb] = {OP_trap, -1, 0, single, trap_decode, 0},
1268 [0xcc] = {OP_trap, -1, 0, single, trap_decode, 0},
1269 [0xcd] = {OP_trap, -1, 0, single, trap_decode, 0},
1270 [0xce] = {OP_trap, -1, 0, single, trap_decode, 0},
1271 [0xcf] = {OP_trap, -1, 0, single, trap_decode, 0},
1272 [0xd0] = {OP_trap, -1, 0, single, trap_decode, 0},
1273 [0xd1] = {OP_trap, -1, 0, single, trap_decode, 0},
1274 [0xd2] = {OP_trap, -1, 0, single, trap_decode, 0},
1275 [0xd3] = {OP_trap, -1, 0, single, trap_decode, 0},
1276 [0xd4] = {OP_trap, -1, 0, single, trap_decode, 0},
1277 [0xd5] = {OP_trap, -1, 0, single, trap_decode, 0},
1278 [0xd6] = {OP_trap, -1, 0, single, trap_decode, 0},
1279 [0xd7] = {OP_trap, -1, 0, single, trap_decode, 0},
1280 [0xd8] = {OP_trap, -1, 0, single, trap_decode, 0},
1281 [0xd9] = {OP_trap, -1, 0, single, trap_decode, 0},
1282 [0xda] = {OP_trap, -1, 0, single, trap_decode, 0},
1283 [0xdb] = {OP_trap, -1, 0, single, trap_decode, 0},
1284 [0xdc] = {OP_trap, -1, 0, single, trap_decode, 0},
1285 [0xdd] = {OP_trap, -1, 0, single, trap_decode, 0},
1286 [0xde] = {OP_trap, -1, 0, single, trap_decode, 0},
1287 [0xdf] = {OP_trap, -1, 0, single, trap_decode, 0},
1288 [0xe0] = {OP_trap, -1, 0, single, trap_decode, 0},
1289 [0xe1] = {OP_trap, -1, 0, single, trap_decode, 0},
1290 [0xe2] = {OP_trap, -1, 0, single, trap_decode, 0},
1291 [0xe3] = {OP_trap, -1, 0, single, trap_decode, 0},
1292 [0xe4] = {OP_trap, -1, 0, single, trap_decode, 0},
1293 [0xe5] = {OP_trap, -1, 0, single, trap_decode, 0},
1294 [0xe6] = {OP_trap, -1, 0, single, trap_decode, 0},
1295 [0xe7] = {OP_trap, -1, 0, single, trap_decode, 0},
1296 [0xe8] = {OP_trap, -1, 0, single, trap_decode, 0},
1297 [0xe9] = {OP_trap, -1, 0, single, trap_decode, 0},
1298 [0xea] = {OP_trap, -1, 0, single, trap_decode, 0},
1299 [0xeb] = {OP_trap, -1, 0, single, trap_decode, 0},
1300 [0xec] = {OP_trap, -1, 0, single, trap_decode, 0},
1301 [0xed] = {OP_trap, -1, 0, single, trap_decode, 0},
1302 [0xee] = {OP_trap, -1, 0, single, trap_decode, 0},
1303 [0xef] = {OP_trap, -1, 0, single, trap_decode, 0},
1304 [0xf0] = {OP_trap, -1, 0, single, trap_decode, 0},
1305 [0xf1] = {OP_trap, -1, 0, single, trap_decode, 0},
1306 [0xf2] = {OP_trap, -1, 0, single, trap_decode, 0},
1307 [0xf3] = {OP_trap, -1, 0, single, trap_decode, 0},
1308 [0xf4] = {OP_trap, -1, 0, single, trap_decode, 0},
1309 [0xf5] = {OP_trap, -1, 0, single, trap_decode, 0},
1310 [0xf6] = {OP_trap, -1, 0, single, trap_decode, 0},
1311 [0xf7] = {OP_trap, -1, 0, single, trap_decode, 0},
1312 [0xf8] = {OP_trap, -1, 0, single, trap_decode, 0},
1313 [0xf9] = {OP_trap, -1, 0, single, trap_decode, 0},
1314 [0xfa] = {OP_trap, -1, 0, single, trap_decode, 0},
1315 [0xfb] = {OP_trap, -1, 0, single, trap_decode, 0},
1316 [0xfc] = {OP_trap, -1, 0, single, trap_decode, 0},
1317 [0xfd] = {OP_trap, -1, 0, single, trap_decode, 0},
1318 [0xfe] = {OP_trap, -1, 0, single, trap_decode, 0},
1319 [0xff] = {OP_trap, -1, 0, single, trap_decode, 0},
1320 };
1321
1322static const struct opcode page1[] =
1323 {
1324 [0x00] = {OP_bgnd, -1, 0, single, 0, 0},
1325 [0x01] = {OP_nop, -1, 0, single, 0, 0},
1326 [0x02] = {OP_brclr, -1, 0, bm_rel_n_bytes, bm_rel_decode, 0},
1327 [0x03] = {OP_brset, -1, 0, bm_rel_n_bytes, bm_rel_decode, 0},
1328 [0x04] = {0xFFFF, -1, psh_pul_discrim, two, psh_pul_decode, 0}, /* psh/pul */
1329 [0x05] = {OP_rts, -1, 0, single, 0, 0},
1330 [0x06] = {OP_lea, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1331 [0x07] = {OP_lea, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1332 [0x08] = {OP_lea, -1, 0, opr_n_bytes_p1, lea_reg_xys_opr, 0},
1333 [0x09] = {OP_lea, -1, 0, opr_n_bytes_p1, lea_reg_xys_opr, 0},
1334 [0x0a] = {OP_lea, -1, 0, opr_n_bytes_p1, lea_reg_xys_opr, 0},
1335 [0x0b] = {0xFFFF, -1, loop_primitive_discrim, loop_prim_n_bytes, loop_primitive_decode, 0}, /* Loop primitives TBcc / DBcc */
1336 [0x0c] = {OP_mov, 0, 0, mov_imm_opr_n_bytes, mov_imm_opr, 0},
1337 [0x0d] = {OP_mov, 1, 0, mov_imm_opr_n_bytes, mov_imm_opr, 0},
1338 [0x0e] = {OP_mov, 2, 0, mov_imm_opr_n_bytes, mov_imm_opr, 0},
1339 [0x0f] = {OP_mov, 3, 0, mov_imm_opr_n_bytes, mov_imm_opr, 0},
1340 [0x10] = {0xFFFF, -1, shift_discrim, shift_n_bytes, shift_decode, 0}, /* lsr/lsl/asl/asr/rol/ror */
1341 [0x11] = {0xFFFF, -1, shift_discrim, shift_n_bytes, shift_decode, 0},
1342 [0x12] = {0xFFFF, -1, shift_discrim, shift_n_bytes, shift_decode, 0},
1343 [0x13] = {0xFFFF, -1, shift_discrim, shift_n_bytes, shift_decode, 0},
1344 [0x14] = {0xFFFF, -1, shift_discrim, shift_n_bytes, shift_decode, 0},
1345 [0x15] = {0xFFFF, -1, shift_discrim, shift_n_bytes, shift_decode, 0},
1346 [0x16] = {0xFFFF, -1, shift_discrim, shift_n_bytes, shift_decode, 0},
1347 [0x17] = {0xFFFF, -1, shift_discrim, shift_n_bytes, shift_decode, 0},
1348 [0x18] = {OP_lea, -1, 0, two, lea_reg_xys, NULL},
1349 [0x19] = {OP_lea, -1, 0, two, lea_reg_xys, NULL},
1350 [0x1a] = {OP_lea, -1, 0, two, lea_reg_xys, NULL},
1351 /* 0x1b PG2 */
1352 [0x1c] = {OP_mov, 0, 0, opr_n_bytes2, z_opr_decode2, 0},
1353 [0x1d] = {OP_mov, 1, 0, opr_n_bytes2, z_opr_decode2, 0},
1354 [0x1e] = {OP_mov, 2, 0, opr_n_bytes2, z_opr_decode2, 0},
1355 [0x1f] = {OP_mov, 3, 0, opr_n_bytes2, z_opr_decode2, 0},
1356 [0x20] = {OP_bra, -1, 0, pcrel_15bit, decode_rel_15_7, 0},
1357 [0x21] = {OP_bsr, -1, 0, pcrel_15bit, decode_rel_15_7, 0},
1358 [0x22] = {OP_bhi, -1, 0, pcrel_15bit, decode_rel_15_7, 0},
1359 [0x23] = {OP_bls, -1, 0, pcrel_15bit, decode_rel_15_7, 0},
1360 [0x24] = {OP_bcc, -1, 0, pcrel_15bit, decode_rel_15_7, 0},
1361 [0x25] = {OP_bcs, -1, 0, pcrel_15bit, decode_rel_15_7, 0},
1362 [0x26] = {OP_bne, -1, 0, pcrel_15bit, decode_rel_15_7, 0},
1363 [0x27] = {OP_beq, -1, 0, pcrel_15bit, decode_rel_15_7, 0},
1364 [0x28] = {OP_bvc, -1, 0, pcrel_15bit, decode_rel_15_7, 0},
1365 [0x29] = {OP_bvs, -1, 0, pcrel_15bit, decode_rel_15_7, 0},
1366 [0x2a] = {OP_bpl, -1, 0, pcrel_15bit, decode_rel_15_7, 0},
1367 [0x2b] = {OP_bmi, -1, 0, pcrel_15bit, decode_rel_15_7, 0},
1368 [0x2c] = {OP_bge, -1, 0, pcrel_15bit, decode_rel_15_7, 0},
1369 [0x2d] = {OP_blt, -1, 0, pcrel_15bit, decode_rel_15_7, 0},
1370 [0x2e] = {OP_bgt, -1, 0, pcrel_15bit, decode_rel_15_7, 0},
1371 [0x2f] = {OP_ble, -1, 0, pcrel_15bit, decode_rel_15_7, 0},
1372 [0x30] = {OP_inc, -1, 0, single, z_reg, 0},
1373 [0x31] = {OP_inc, -1, 0, single, z_reg, 0},
1374 [0x32] = {OP_inc, -1, 0, single, z_reg, 0},
1375 [0x33] = {OP_inc, -1, 0, single, z_reg, 0},
1376 [0x34] = {OP_inc, -1, 0, single, z_reg, 0},
1377 [0x35] = {OP_inc, -1, 0, single, z_reg, 0},
1378 [0x36] = {OP_inc, -1, 0, single, z_reg, 0},
1379 [0x37] = {OP_inc, -1, 0, single, z_reg, 0},
1380 [0x38] = {OP_clr, -1, 0, single, z_reg, 0},
1381 [0x39] = {OP_clr, -1, 0, single, z_reg, 0},
1382 [0x3a] = {OP_clr, -1, 0, single, z_reg, 0},
1383 [0x3b] = {OP_clr, -1, 0, single, z_reg, 0},
1384 [0x3c] = {OP_clr, -1, 0, single, z_reg, 0},
1385 [0x3d] = {OP_clr, -1, 0, single, z_reg, 0},
1386 [0x3e] = {OP_clr, -1, 0, single, z_reg, 0},
1387 [0x3f] = {OP_clr, -1, 0, single, z_reg, 0},
1388 [0x40] = {OP_dec, -1, 0, single, z_reg, 0},
1389 [0x41] = {OP_dec, -1, 0, single, z_reg, 0},
1390 [0x42] = {OP_dec, -1, 0, single, z_reg, 0},
1391 [0x43] = {OP_dec, -1, 0, single, z_reg, 0},
1392 [0x44] = {OP_dec, -1, 0, single, z_reg, 0},
1393 [0x45] = {OP_dec, -1, 0, single, z_reg, 0},
1394 [0x46] = {OP_dec, -1, 0, single, z_reg, 0},
1395 [0x47] = {OP_dec, -1, 0, single, z_reg, 0},
1396 [0x48] = {OPBASE_mul, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1397 [0x49] = {OPBASE_mul, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1398 [0x4a] = {OPBASE_mul, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1399 [0x4b] = {OPBASE_mul, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1400 [0x4c] = {OPBASE_mul, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1401 [0x4d] = {OPBASE_mul, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1402 [0x4e] = {OPBASE_mul, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1403 [0x4f] = {OPBASE_mul, -1, mul_discrim, mul_n_bytes, mul_decode, 0},
1404 [0x50] = {OP_add, -1, 0, three, z_reg, z_imm1234_0base},
1405 [0x51] = {OP_add, -1, 0, three, z_reg, z_imm1234_0base},
1406 [0x52] = {OP_add, -1, 0, three, z_reg, z_imm1234_0base},
1407 [0x53] = {OP_add, -1, 0, three, z_reg, z_imm1234_0base},
1408 [0x54] = {OP_add, -1, 0, two, z_reg, z_imm1234_0base},
1409 [0x55] = {OP_add, -1, 0, two, z_reg, z_imm1234_0base},
1410 [0x56] = {OP_add, -1, 0, five, z_reg, z_imm1234_0base},
1411 [0x57] = {OP_add, -1, 0, five, z_reg, z_imm1234_0base},
1412 [0x58] = {OP_and, -1, 0, three, z_reg, z_imm1234_8base},
1413 [0x59] = {OP_and, -1, 0, three, z_reg, z_imm1234_8base},
1414 [0x5a] = {OP_and, -1, 0, three, z_reg, z_imm1234_8base},
1415 [0x5b] = {OP_and, -1, 0, three, z_reg, z_imm1234_8base},
1416 [0x5c] = {OP_and, -1, 0, two, z_reg, z_imm1234_8base},
1417 [0x5d] = {OP_and, -1, 0, two, z_reg, z_imm1234_8base},
1418 [0x5e] = {OP_and, -1, 0, five, z_reg, z_imm1234_8base},
1419 [0x5f] = {OP_and, -1, 0, five, z_reg, z_imm1234_8base},
1420 [0x60] = {OP_add, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1421 [0x61] = {OP_add, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1422 [0x62] = {OP_add, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1423 [0x63] = {OP_add, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1424 [0x64] = {OP_add, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1425 [0x65] = {OP_add, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1426 [0x66] = {OP_add, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1427 [0x67] = {OP_add, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1428 [0x68] = {OP_and, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1429 [0x69] = {OP_and, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1430 [0x6a] = {OP_and, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1431 [0x6b] = {OP_and, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1432 [0x6c] = {OP_and, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1433 [0x6d] = {OP_and, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1434 [0x6e] = {OP_and, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1435 [0x6f] = {OP_and, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1436 [0x70] = {OP_sub, -1, 0, three, z_reg, z_imm1234_0base},
1437 [0x71] = {OP_sub, -1, 0, three, z_reg, z_imm1234_0base},
1438 [0x72] = {OP_sub, -1, 0, three, z_reg, z_imm1234_0base},
1439 [0x73] = {OP_sub, -1, 0, three, z_reg, z_imm1234_0base},
1440 [0x74] = {OP_sub, -1, 0, two, z_reg, z_imm1234_0base},
1441 [0x75] = {OP_sub, -1, 0, two, z_reg, z_imm1234_0base},
1442 [0x76] = {OP_sub, -1, 0, five, z_reg, z_imm1234_0base},
1443 [0x77] = {OP_sub, -1, 0, five, z_reg, z_imm1234_0base},
1444 [0x78] = {OP_or, -1, 0, three, z_reg, z_imm1234_8base},
1445 [0x79] = {OP_or, -1, 0, three, z_reg, z_imm1234_8base},
1446 [0x7a] = {OP_or, -1, 0, three, z_reg, z_imm1234_8base},
1447 [0x7b] = {OP_or, -1, 0, three, z_reg, z_imm1234_8base},
1448 [0x7c] = {OP_or, -1, 0, two, z_reg, z_imm1234_8base},
1449 [0x7d] = {OP_or, -1, 0, two, z_reg, z_imm1234_8base},
1450 [0x7e] = {OP_or, -1, 0, five, z_reg, z_imm1234_8base},
1451 [0x7f] = {OP_or, -1, 0, five, z_reg, z_imm1234_8base},
1452 [0x80] = {OP_sub, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1453 [0x81] = {OP_sub, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1454 [0x82] = {OP_sub, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1455 [0x83] = {OP_sub, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1456 [0x84] = {OP_sub, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1457 [0x85] = {OP_sub, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1458 [0x86] = {OP_sub, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1459 [0x87] = {OP_sub, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1460 [0x88] = {OP_or, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1461 [0x89] = {OP_or, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1462 [0x8a] = {OP_or, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1463 [0x8b] = {OP_or, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1464 [0x8c] = {OP_or, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1465 [0x8d] = {OP_or, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1466 [0x8e] = {OP_or, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1467 [0x8f] = {OP_or, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1468 [0x90] = {OP_ld, -1, 0, three, z_reg, z_imm1234_0base},
1469 [0x91] = {OP_ld, -1, 0, three, z_reg, z_imm1234_0base},
1470 [0x92] = {OP_ld, -1, 0, three, z_reg, z_imm1234_0base},
1471 [0x93] = {OP_ld, -1, 0, three, z_reg, z_imm1234_0base},
1472 [0x94] = {OP_ld, -1, 0, two, z_reg, z_imm1234_0base},
1473 [0x95] = {OP_ld, -1, 0, two, z_reg, z_imm1234_0base},
1474 [0x96] = {OP_ld, -1, 0, five, z_reg, z_imm1234_0base},
1475 [0x97] = {OP_ld, -1, 0, five, z_reg, z_imm1234_0base},
1476 [0x98] = {OP_ld, -1, 0, four, reg_xy, z_imm1234_0base},
1477 [0x99] = {OP_ld, -1, 0, four, reg_xy, z_imm1234_0base},
1478 [0x9a] = {OP_clr, -1, 0, single, reg_xy, 0},
1479 [0x9b] = {OP_clr, -1, 0, single, reg_xy, 0},
1480 [0x9c] = {OP_inc, 0, 0, opr_n_bytes_p1, z_opr_decode, 0},
1481 [0x9d] = {OP_inc, 1, 0, opr_n_bytes_p1, z_opr_decode, 0},
1482 [0x9e] = {OP_tfr, -1, 0, two, z_tfr, NULL},
1483 [0x9f] = {OP_inc, 3, 0, opr_n_bytes_p1, z_opr_decode, 0},
1484 [0xa0] = {OP_ld, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1485 [0xa1] = {OP_ld, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1486 [0xa2] = {OP_ld, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1487 [0xa3] = {OP_ld, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1488 [0xa4] = {OP_ld, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1489 [0xa5] = {OP_ld, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1490 [0xa6] = {OP_ld, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1491 [0xa7] = {OP_ld, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1492 [0xa8] = {OP_ld, -1, 0, opr_n_bytes_p1, reg_xy, z_opr_decode},
1493 [0xa9] = {OP_ld, -1, 0, opr_n_bytes_p1, reg_xy, z_opr_decode},
1494 [0xaa] = {OP_jmp, -1, 0, opr_n_bytes_p1, z_opr_decode, 0},
1495 [0xab] = {OP_jsr, -1, 0, opr_n_bytes_p1, z_opr_decode, 0},
1496 [0xac] = {OP_dec, 0, 0, opr_n_bytes_p1, z_opr_decode, 0},
1497 [0xad] = {OP_dec, 1, 0, opr_n_bytes_p1, z_opr_decode, 0},
1498 [0xae] = {0xFFFF, -1, exg_sex_discrim, two, exg_sex_decode, 0}, /* EXG / SEX */
1499 [0xaf] = {OP_dec, 3, 0, opr_n_bytes_p1, 0, z_opr_decode},
1500 [0xb0] = {OP_ld, -1, 0, four, z_reg, z_ext24_decode},
1501 [0xb1] = {OP_ld, -1, 0, four, z_reg, z_ext24_decode},
1502 [0xb2] = {OP_ld, -1, 0, four, z_reg, z_ext24_decode},
1503 [0xb3] = {OP_ld, -1, 0, four, z_reg, z_ext24_decode},
1504 [0xb4] = {OP_ld, -1, 0, four, z_reg, z_ext24_decode},
1505 [0xb5] = {OP_ld, -1, 0, four, z_reg, z_ext24_decode},
1506 [0xb6] = {OP_ld, -1, 0, four, z_reg, z_ext24_decode},
1507 [0xb7] = {OP_ld, -1, 0, four, z_reg, z_ext24_decode},
1508 [0xb8] = {OP_ld, -1, 0, four, reg_xy, z_ext24_decode},
1509 [0xb9] = {OP_ld, -1, 0, four, reg_xy, z_ext24_decode},
1510 [0xba] = {OP_jmp, -1, 0, four, z_ext24_decode, 0},
1511 [0xbb] = {OP_jsr, -1, 0, four, z_ext24_decode, 0},
1512 [0xbc] = {OP_clr, 0, 0, opr_n_bytes_p1, z_opr_decode, 0},
1513 [0xbd] = {OP_clr, 1, 0, opr_n_bytes_p1, z_opr_decode, 0},
1514 [0xbe] = {OP_clr, 2, 0, opr_n_bytes_p1, z_opr_decode, 0},
1515 [0xbf] = {OP_clr, 3, 0, opr_n_bytes_p1, z_opr_decode, 0},
1516 [0xc0] = {OP_st, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1517 [0xc1] = {OP_st, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1518 [0xc2] = {OP_st, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1519 [0xc3] = {OP_st, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1520 [0xc4] = {OP_st, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1521 [0xc5] = {OP_st, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1522 [0xc6] = {OP_st, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1523 [0xc7] = {OP_st, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1524 [0xc8] = {OP_st, -1, 0, opr_n_bytes_p1, reg_xy, z_opr_decode},
1525 [0xc9] = {OP_st, -1, 0, opr_n_bytes_p1, reg_xy, z_opr_decode},
1526 [0xca] = {OP_ld, -1, 0, three, reg_xy, ld_18bit_decode},
1527 [0xcb] = {OP_ld, -1, 0, three, reg_xy, ld_18bit_decode},
1528 [0xcc] = {OP_com, 0, 0, opr_n_bytes_p1, NULL, z_opr_decode},
1529 [0xcd] = {OP_com, 1, 0, opr_n_bytes_p1, NULL, z_opr_decode},
1530 [0xce] = {OP_andcc, -1, 0, two, imm1_decode, 0},
1531 [0xcf] = {OP_com, 3, 0, opr_n_bytes_p1, NULL, z_opr_decode},
1532 [0xd0] = {OP_st, -1, 0, four, z_reg, z_ext24_decode},
1533 [0xd1] = {OP_st, -1, 0, four, z_reg, z_ext24_decode},
1534 [0xd2] = {OP_st, -1, 0, four, z_reg, z_ext24_decode},
1535 [0xd3] = {OP_st, -1, 0, four, z_reg, z_ext24_decode},
1536 [0xd4] = {OP_st, -1, 0, four, z_reg, z_ext24_decode},
1537 [0xd5] = {OP_st, -1, 0, four, z_reg, z_ext24_decode},
1538 [0xd6] = {OP_st, -1, 0, four, z_reg, z_ext24_decode},
1539 [0xd7] = {OP_st, -1, 0, four, z_reg, z_ext24_decode},
1540 [0xd8] = {OP_st, -1, 0, four, reg_xy, z_ext24_decode},
1541 [0xd9] = {OP_st, -1, 0, four, reg_xy, z_ext24_decode},
1542 [0xda] = {OP_ld, -1, 0, three, reg_xy, ld_18bit_decode},
1543 [0xdb] = {OP_ld, -1, 0, three, reg_xy, ld_18bit_decode},
1544 [0xdc] = {OP_neg, 0, 0, opr_n_bytes_p1, NULL, z_opr_decode},
1545 [0xdd] = {OP_neg, 1, 0, opr_n_bytes_p1, NULL, z_opr_decode},
1546 [0xde] = {OP_orcc, -1, 0, two, imm1_decode, 0},
1547 [0xdf] = {OP_neg, 3, 0, opr_n_bytes_p1, NULL, z_opr_decode},
1548 [0xe0] = {OP_cmp, -1, 0, three, z_reg, z_imm1234_0base},
1549 [0xe1] = {OP_cmp, -1, 0, three, z_reg, z_imm1234_0base},
1550 [0xe2] = {OP_cmp, -1, 0, three, z_reg, z_imm1234_0base},
1551 [0xe3] = {OP_cmp, -1, 0, three, z_reg, z_imm1234_0base},
1552 [0xe4] = {OP_cmp, -1, 0, two, z_reg, z_imm1234_0base},
1553 [0xe5] = {OP_cmp, -1, 0, two, z_reg, z_imm1234_0base},
1554 [0xe6] = {OP_cmp, -1, 0, five, z_reg, z_imm1234_0base},
1555 [0xe7] = {OP_cmp, -1, 0, five, z_reg, z_imm1234_0base},
1556 [0xe8] = {OP_cmp, -1, 0, four, reg_xy, z_imm1234_0base},
1557 [0xe9] = {OP_cmp, -1, 0, four, reg_xy, z_imm1234_0base},
1558 [0xea] = {OP_ld, -1, 0, three, reg_xy, ld_18bit_decode},
1559 [0xeb] = {OP_ld, -1, 0, three, reg_xy, ld_18bit_decode},
1560 [0xec] = {OP_bclr, -1, 0, bm_n_bytes, bm_decode, 0},
1561 [0xed] = {OP_bset, -1, 0, bm_n_bytes, bm_decode, 0},
1562 [0xee] = {OP_btgl, -1, 0, bm_n_bytes, bm_decode, 0},
1563 [0xef] = {OP_INVALID, -1, 0, NULL, NULL, NULL}, /* SPARE */
1564 [0xf0] = {OP_cmp, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1565 [0xf1] = {OP_cmp, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1566 [0xf2] = {OP_cmp, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1567 [0xf3] = {OP_cmp, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1568 [0xf4] = {OP_cmp, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1569 [0xf5] = {OP_cmp, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1570 [0xf6] = {OP_cmp, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1571 [0xf7] = {OP_cmp, -1, 0, opr_n_bytes_p1, z_reg, z_opr_decode},
1572 [0xf8] = {OP_cmp, -1, 0, opr_n_bytes_p1, reg_xy, z_opr_decode},
1573 [0xf9] = {OP_cmp, -1, 0, opr_n_bytes_p1, reg_xy, z_opr_decode},
1574 [0xfa] = {OP_ld, -1, 0, three, reg_xy, ld_18bit_decode},
1575 [0xfb] = {OP_ld, -1, 0, three, reg_xy, ld_18bit_decode},
1576 [0xfc] = {OP_cmp, -1, 0, single, cmp_xy, 0},
1577 [0xfd] = {OP_sub, -1, 0, single, sub_d6_x_y, 0},
1578 [0xfe] = {OP_sub, -1, 0, single, sub_d6_y_x, 0},
1579 [0xff] = {OP_swi, -1, 0, single, 0, 0}
1580 };
1581
1582static const int oprregs1[] =
1583 {
1584 REG_D3, REG_D2, REG_D1, REG_D0, REG_CCL, REG_CCH
1585 };
1586
1587static const int oprregs2[] =
1588 {
1589 REG_Y, REG_X, REG_D7, REG_D6, REG_D5, REG_D4
1590 };
1591
1592
1593\f
1594
1595enum MUL_MODE
1596 {
1597 MUL_REG_REG,
1598 MUL_REG_OPR,
1599 MUL_REG_IMM,
1600 MUL_OPR_OPR
1601 };
1602
1603struct mb
1604{
1605 uint8_t mask;
1606 uint8_t value;
1607 enum MUL_MODE mode;
1608};
1609
1610static const struct mb mul_table[] = {
1611 {0x40, 0x00, MUL_REG_REG},
1612
1613 {0x47, 0x40, MUL_REG_OPR},
1614 {0x47, 0x41, MUL_REG_OPR},
1615 {0x47, 0x43, MUL_REG_OPR},
1616
1617 {0x47, 0x44, MUL_REG_IMM},
1618 {0x47, 0x45, MUL_REG_IMM},
1619 {0x47, 0x47, MUL_REG_IMM},
1620
1621 {0x43, 0x42, MUL_OPR_OPR},
1622};
1623
1624
1625static void
1626mul_decode (struct mem_read_abstraction_base *mra,
1627 int *n_operands, struct operand **operand)
1628{
1629 uint8_t mb;
1630 int status = mra->read (mra, 0, 1, &mb);
1631 if (status < 0)
1632 return;
1633
1634 uint8_t byte;
1635 status = mra->read (mra, -1, 1, &byte);
1636 if (status < 0)
1637 return;
1638
1639 enum MUL_MODE mode = -1;
1640 size_t i;
1641 for (i = 0; i < sizeof (mul_table) / sizeof (mul_table[0]); ++i)
1642 {
1643 const struct mb *mm = mul_table + i;
1644 if ((mb & mm->mask) == mm->value)
1645 {
1646 mode = mm->mode;
1647 break;
1648 }
1649 }
1650 operand[(*n_operands)++] = create_register_operand (byte & 0x07);
1651
1652 switch (mode)
1653 {
1654 case MUL_REG_IMM:
1655 {
1656 int size = (mb & 0x3);
1657 operand[(*n_operands)++] =
1658 create_register_operand_with_size ((mb & 0x38) >> 3, size);
1659 uint32_t imm = z_decode_signed_value (mra, 1, size + 1);
1660 operand[(*n_operands)++] = create_immediate_operand (imm);
1661 }
1662 break;
1663 case MUL_REG_REG:
1664 operand[(*n_operands)++] = create_register_operand ((mb & 0x38) >> 3);
1665 operand[(*n_operands)++] = create_register_operand (mb & 0x07);
1666 break;
1667 case MUL_REG_OPR:
1668 operand[(*n_operands)++] = create_register_operand ((mb & 0x38) >> 3);
1669 operand[(*n_operands)++] = x_opr_decode_with_size (mra, 1, mb & 0x3);
1670 break;
1671 case MUL_OPR_OPR:
1672 {
1673 int first = x_opr_n_bytes (mra, 1);
1674 operand[(*n_operands)++] = x_opr_decode_with_size (mra, 1,
1675 (mb & 0x30) >> 4);
1676 operand[(*n_operands)++] = x_opr_decode_with_size (mra, first + 1,
1677 (mb & 0x0c) >> 2);
1678 break;
1679 }
1680 }
1681}
1682
1683
1684static int
1685mul_n_bytes (struct mem_read_abstraction_base *mra)
1686{
1687 int nx = 2;
1688 uint8_t mb;
1689 int status = mra->read (mra, 0, 1, &mb);
1690 if (status < 0)
1691 return 0;
1692
1693 enum MUL_MODE mode = -1;
1694 size_t i;
1695 for (i = 0; i < sizeof (mul_table) / sizeof (mul_table[0]); ++i)
1696 {
1697 const struct mb *mm = mul_table + i;
1698 if ((mb & mm->mask) == mm->value)
1699 {
1700 mode = mm->mode;
1701 break;
1702 }
1703 }
1704
1705 int size = (mb & 0x3) + 1;
1706
1707 switch (mode)
1708 {
1709 case MUL_REG_IMM:
1710 nx += size;
1711 break;
1712 case MUL_REG_REG:
1713 break;
1714 case MUL_REG_OPR:
1715 nx += x_opr_n_bytes (mra, 1);
1716 break;
1717 case MUL_OPR_OPR:
1718 {
1719 int first = x_opr_n_bytes (mra, nx - 1);
1720 nx += first;
1721 int second = x_opr_n_bytes (mra, nx - 1);
1722 nx += second;
1723 }
1724 break;
1725 }
1726
1727 return nx;
1728}
1729
1730\f
1731/* The NXP documentation is vague about BM_RESERVED0 and BM_RESERVED1,
1732 and contains obvious typos.
1733 However the Freescale tools and experiments with the chip itself
1734 seem to indicate that they behave like BM_REG_IMM and BM_OPR_REG
1735 respectively. */
1736
1737enum BM_MODE
1738{
1739 BM_REG_IMM,
1740 BM_RESERVED0,
1741 BM_OPR_B,
1742 BM_OPR_W,
1743 BM_OPR_L,
1744 BM_OPR_REG,
1745 BM_RESERVED1
1746};
1747
1748struct bm
1749{
1750 uint8_t mask;
1751 uint8_t value;
1752 enum BM_MODE mode;
1753};
1754
1755static const struct bm bm_table[] = {
1756 { 0xC6, 0x04, BM_REG_IMM},
1757 { 0x84, 0x00, BM_REG_IMM},
1758 { 0x06, 0x06, BM_REG_IMM},
1759 { 0xC6, 0x44, BM_RESERVED0},
1760 // 00
1761 { 0x8F, 0x80, BM_OPR_B},
1762 { 0x8E, 0x82, BM_OPR_W},
1763 { 0x8C, 0x88, BM_OPR_L},
1764
1765 { 0x83, 0x81, BM_OPR_REG},
1766 { 0x87, 0x84, BM_RESERVED1},
1767};
1768
1769static void
1770bm_decode (struct mem_read_abstraction_base *mra,
1771 int *n_operands, struct operand **operand)
1772{
1773 uint8_t bm;
1774 int status = mra->read (mra, 0, 1, &bm);
1775 if (status < 0)
1776 return;
1777
1778 size_t i;
1779 enum BM_MODE mode = -1;
1780 for (i = 0; i < sizeof (bm_table) / sizeof (bm_table[0]); ++i)
1781 {
1782 const struct bm *bme = bm_table + i;
1783 if ((bm & bme->mask) == bme->value)
1784 {
1785 mode = bme->mode;
1786 break;
1787 }
1788 }
1789
1790 switch (mode)
1791 {
1792 case BM_REG_IMM:
1793 case BM_RESERVED0:
1794 operand[(*n_operands)++] = create_register_operand (bm & 0x07);
1795 break;
1796 case BM_OPR_B:
1797 operand[(*n_operands)++] = x_opr_decode_with_size (mra, 1, 0);
1798 break;
1799 case BM_OPR_W:
1800 operand[(*n_operands)++] = x_opr_decode_with_size (mra, 1, 1);
1801 break;
1802 case BM_OPR_L:
1803 operand[(*n_operands)++] = x_opr_decode_with_size (mra, 1, 3);
1804 break;
1805 case BM_OPR_REG:
1806 case BM_RESERVED1:
1807 {
1808 uint8_t xb;
1809 mra->read (mra, 1, 1, &xb);
1810 /* Don't emit a size suffix for register operands */
1811 if ((xb & 0xF8) != 0xB8)
1812 operand[(*n_operands)++] =
1813 x_opr_decode_with_size (mra, 1, (bm & 0x0c) >> 2);
1814 else
1815 operand[(*n_operands)++] = x_opr_decode (mra, 1);
1816 }
1817 break;
1818 }
1819
1820 uint8_t imm = 0;
1821 switch (mode)
1822 {
1823 case BM_REG_IMM:
a679f24e 1824 case BM_RESERVED0:
ef1ad42b
JD		 1825 imm = (bm & 0x38) >> 3;
1826 operand[(*n_operands)++] = create_immediate_operand (imm);
1827 break;
1828 case BM_OPR_L:
1829 imm |= (bm & 0x03) << 3;
1830 /* fallthrough */
1831 case BM_OPR_W:
1832 imm |= (bm & 0x01) << 3;
1833 /* fallthrough */
1834 case BM_OPR_B:
1835 imm |= (bm & 0x70) >> 4;
1836 operand[(*n_operands)++] = create_immediate_operand (imm);
1837 break;
1838 case BM_OPR_REG:
1839 case BM_RESERVED1:
1840 operand[(*n_operands)++] = create_register_operand ((bm & 0x70) >> 4);
1841 break;
ef1ad42b
JD		 1842 }
1843}
1844
1845
1846static void
1847bm_rel_decode (struct mem_read_abstraction_base *mra,
1848 int *n_operands, struct operand **operand)
1849{
1850 uint8_t bm;
1851 int status = mra->read (mra, 0, 1, &bm);
1852 if (status < 0)
1853 return;
1854
1855 size_t i;
1856 enum BM_MODE mode = -1;
1857 for (i = 0; i < sizeof (bm_table) / sizeof (bm_table[0]); ++i)
1858 {
1859 const struct bm *bme = bm_table + i;
1860 if ((bm & bme->mask) == bme->value)
1861 {
1862 mode = bme->mode;
1863 break;
1864 }
1865 }
1866
1867 int n = 1;
1868 switch (mode)
1869 {
1870 case BM_REG_IMM:
1871 case BM_RESERVED0:
1872 operand[(*n_operands)++] = create_register_operand (bm & 0x07);
1873 break;
1874 case BM_OPR_B:
1875 operand[(*n_operands)++] = x_opr_decode_with_size (mra, 1, 0);
1876 n = 1 + x_opr_n_bytes (mra, 1);
1877 break;
1878 case BM_OPR_W:
1879 operand[(*n_operands)++] = x_opr_decode_with_size (mra, 1, 1);
1880 n = 1 + x_opr_n_bytes (mra, 1);
1881 break;
1882 case BM_OPR_L:
1883 operand[(*n_operands)++] = x_opr_decode_with_size (mra, 1, 3);
1884 n = 1 + x_opr_n_bytes (mra, 1);
1885 break;
1886 case BM_OPR_REG:
1887 case BM_RESERVED1:
1888 {
1889 uint8_t xb;
1890 mra->read (mra, +1, 1, &xb);
1891 /* Don't emit a size suffix for register operands */
1892 if ((xb & 0xF8) != 0xB8)
1893 {
1894 short os = (bm & 0x0c) >> 2;
1895 operand[(*n_operands)++] = x_opr_decode_with_size (mra, 1, os);
1896 }
1897 else
1898 operand[(*n_operands)++] = x_opr_decode (mra, 1);
1899
1900 }
1901 break;
1902 }
1903
1904 int imm = 0;
1905 switch (mode)
1906 {
1907 case BM_OPR_L:
1908 imm |= (bm & 0x02) << 3;
1909 /* fall through */
1910 case BM_OPR_W:
1911 imm |= (bm & 0x01) << 3;
1912 /* fall through */
1913 case BM_OPR_B:
1914 imm |= (bm & 0x70) >> 4;
1915 operand[(*n_operands)++] = create_immediate_operand (imm);
1916 break;
1917 case BM_RESERVED0:
1918 imm = (bm & 0x38) >> 3;
1919 operand[(*n_operands)++] = create_immediate_operand (imm);
1920 break;
1921 case BM_REG_IMM:
1922 imm = (bm & 0xF8) >> 3;
1923 operand[(*n_operands)++] = create_immediate_operand (imm);
1924 break;
1925 case BM_OPR_REG:
1926 case BM_RESERVED1:
1927 operand[(*n_operands)++] = create_register_operand ((bm & 0x70) >> 4);
1928 n += x_opr_n_bytes (mra, 1);
1929 break;
1930 }
1931
1932 rel_15_7 (mra, n + 1, n_operands, operand);
1933}
1934
1935static int
1936bm_n_bytes (struct mem_read_abstraction_base *mra)
1937{
1938 uint8_t bm;
1939 int status = mra->read (mra, 0, 1, &bm);
1940 if (status < 0)
1941 return status;
1942
1943 size_t i;
1944 enum BM_MODE mode = -1;
1945 for (i = 0; i < sizeof (bm_table) / sizeof (bm_table[0]); ++i)
1946 {
1947 const struct bm *bme = bm_table + i;
1948 if ((bm & bme->mask) == bme->value)
1949 {
1950 mode = bme->mode;
1951 break;
1952 }
1953 }
1954
1955 int n = 2;
1956 switch (mode)
1957 {
1958 case BM_REG_IMM:
1959 case BM_RESERVED0:
1960 break;
1961
1962 case BM_OPR_B:
1963 case BM_OPR_W:
1964 case BM_OPR_L:
1965 n += x_opr_n_bytes (mra, 1);
1966 break;
1967 case BM_OPR_REG:
1968 case BM_RESERVED1:
1969 n += x_opr_n_bytes (mra, 1);
1970 break;
1971 }
1972
1973 return n;
1974}
1975
1976static int
1977bm_rel_n_bytes (struct mem_read_abstraction_base *mra)
1978{
1979 int n = 1 + bm_n_bytes (mra);
1980
1981 bfd_byte rb;
1982 int status = mra->read (mra, n - 2, 1, &rb);
1983 if (status != 0)
1984 return status;
1985
1986 if (rb & 0x80)
1987 n++;
1988
1989 return n;
1990}
1991
1992
1993\f
1994
1995
1996/* shift direction */
1997enum SB_DIR
1998 {
1999 SB_LEFT,
2000 SB_RIGHT
2001 };
2002
2003enum SB_TYPE
2004 {
2005 SB_ARITHMETIC,
2006 SB_LOGICAL
2007 };
2008
2009
2010enum SB_MODE
2011 {
2012 SB_REG_REG_N_EFF,
2013 SB_REG_REG_N,
2014 SB_REG_OPR_EFF,
2015 SB_ROT,
2016 SB_REG_OPR_OPR,
2017 SB_OPR_N
2018 };
2019
2020struct sb
2021{
2022 uint8_t mask;
2023 uint8_t value;
2024 enum SB_MODE mode;
2025};
2026
2027static const struct sb sb_table[] = {
2028 {0x30, 0x00, SB_REG_REG_N_EFF},
2029 {0x30, 0x10, SB_REG_REG_N},
2030 {0x34, 0x20, SB_REG_OPR_EFF},
2031 {0x34, 0x24, SB_ROT},
2032 {0x34, 0x30, SB_REG_OPR_OPR},
2033 {0x34, 0x34, SB_OPR_N},
2034};
2035
2036static int
2037shift_n_bytes (struct mem_read_abstraction_base *mra)
2038{
2039 bfd_byte sb;
2040 int status = mra->read (mra, 0, 1, &sb);
2041 if (status != 0)
2042 return status;
2043
2044 size_t i;
2045 enum SB_MODE mode = -1;
2046 for (i = 0; i < sizeof (sb_table) / sizeof (sb_table[0]); ++i)
2047 {
2048 const struct sb *sbe = sb_table + i;
2049 if ((sb & sbe->mask) == sbe->value)
2050 mode = sbe->mode;
2051 }
2052
2053 switch (mode)
2054 {
2055 case SB_REG_REG_N_EFF:
2056 return 2;
2057 break;
2058 case SB_REG_OPR_EFF:
2059 case SB_ROT:
2060 return 2 + x_opr_n_bytes (mra, 1);
2061 break;
2062 case SB_REG_OPR_OPR:
2063 {
2064 int opr1 = x_opr_n_bytes (mra, 1);
2065 int opr2 = 0;
2066 if ((sb & 0x30) != 0x20)
2067 opr2 = x_opr_n_bytes (mra, opr1 + 1);
2068 return 2 + opr1 + opr2;
2069 }
2070 break;
2071 default:
2072 return 3;
2073 }
2074
2075 /* not reached */
2076 return -1;
2077}
2078\f
2079
2080static int
2081
2082mov_imm_opr_n_bytes (struct mem_read_abstraction_base *mra)
2083{
2084 bfd_byte byte;
2085 int status = mra->read (mra, -1, 1, &byte);
2086 if (status < 0)
2087 return status;
2088
2089 int size = byte - 0x0c + 1;
2090
2091 return size + x_opr_n_bytes (mra, size) + 1;
2092}
2093
2094static void
2095mov_imm_opr (struct mem_read_abstraction_base *mra,
2096 int *n_operands, struct operand **operand)
2097{
2098 bfd_byte byte;
2099 int status = mra->read (mra, -1, 1, &byte);
2100 if (status < 0)
2101 return ;
2102
2103 int size = byte - 0x0c + 1;
2104 uint32_t imm = decode_signed_value (mra, size);
2105
2106 operand[(*n_operands)++] = create_immediate_operand (imm);
2107 operand[(*n_operands)++] = x_opr_decode (mra, size);
2108}
2109
2110\f
2111
2112static void
2113ld_18bit_decode (struct mem_read_abstraction_base *mra,
2114 int *n_operands, struct operand **operand)
2115{
2116 size_t size = 3;
2117 bfd_byte buffer[3];
2118 int status = mra->read (mra, 0, 2, buffer + 1);
2119 if (status < 0)
2120 return ;
2121
2122 status = mra->read (mra, -1, 1, buffer);
2123 if (status < 0)
2124 return ;
2125
2126 buffer[0] = (buffer[0] & 0x30) >> 4;
2127
2128 size_t i;
2129 uint32_t imm = 0;
2130 for (i = 0; i < size; ++i)
2131 {
2132 imm |= buffer[i] << (8 * (size - i - 1));
2133 }
2134
2135 operand[(*n_operands)++] = create_immediate_operand (imm);
2136}
2137
2138\f
2139
2140/* Loop Primitives */
2141
2142enum LP_MODE {
2143 LP_REG,
2144 LP_XY,
2145 LP_OPR
2146};
2147
2148struct lp
2149{
2150 uint8_t mask;
2151 uint8_t value;
2152 enum LP_MODE mode;
2153};
2154
2155static const struct lp lp_mode[] = {
2156 {0x08, 0x00, LP_REG},
2157 {0x0C, 0x08, LP_XY},
2158 {0x0C, 0x0C, LP_OPR},
2159};
2160
2161
2162static int
2163loop_prim_n_bytes (struct mem_read_abstraction_base *mra)
2164{
2165 int mx = 0;
2166 uint8_t lb;
2167 mra->read (mra, mx++, 1, &lb);
2168
2169 enum LP_MODE mode = -1;
2170 size_t i;
2171 for (i = 0; i < sizeof (lp_mode) / sizeof (lp_mode[0]); ++i)
2172 {
2173 const struct lp *pb = lp_mode + i;
2174 if ((lb & pb->mask) == pb->value)
2175 {
2176 mode = pb->mode;
2177 break;
2178 }
2179 }
2180
2181 if (mode == LP_OPR)
2182 {
2183 mx += x_opr_n_bytes (mra, mx) ;
2184 }
2185
2186 uint8_t rb;
2187 mra->read (mra, mx++, 1, &rb);
2188 if (rb & 0x80)
2189 mx++;
2190
2191 return mx + 1;
2192}
2193
2194
2195\f
2196
e5a557ac
JD		 2197static enum optr
2198exg_sex_discrim (struct mem_read_abstraction_base *mra, enum optr hint ATTRIBUTE_UNUSED)
ef1ad42b
JD		 2199{
2200 uint8_t eb;
2201 int status = mra->read (mra, 0, 1, &eb);
2202 if (status < 0)
2203 return OP_INVALID;
2204
2205 struct operand *op0 = create_register_operand ((eb & 0xf0) >> 4);
2206 struct operand *op1 = create_register_operand (eb & 0xf);
2207
66a66a17
NC		 2208 int reg0 = ((struct register_operand *) op0)->reg;
2209 if (reg0 < 0 || reg0 >= S12Z_N_REGISTERS)
2210 return OP_INVALID;
2211
2212 int reg1 = ((struct register_operand *) op1)->reg;
2213 if (reg1 < 0 || reg1 >= S12Z_N_REGISTERS)
2214 return OP_INVALID;
2215
2216 const struct reg *r0 = registers + reg0;
2217 const struct reg *r1 = registers + reg1;
ef1ad42b 2218
e5a557ac 2219 enum optr operator = (r0->bytes < r1->bytes) ? OP_sex : OP_exg;
ef1ad42b
JD		 2220
2221 free (op0);
2222 free (op1);
2223
2224 return operator;
2225}
2226
2227
2228static void
2229exg_sex_decode (struct mem_read_abstraction_base *mra,
2230 int *n_operands, struct operand **operands)
2231{
2232 uint8_t eb;
2233 int status = mra->read (mra, 0, 1, &eb);
2234 if (status < 0)
2235 return;
2236
2237 /* Ship out the operands. */
2238 operands[(*n_operands)++] = create_register_operand ((eb & 0xf0) >> 4);
2239 operands[(*n_operands)++] = create_register_operand (eb & 0xf);
2240}
2241
e5a557ac 2242static enum optr
ef1ad42b 2243loop_primitive_discrim (struct mem_read_abstraction_base *mra,
e5a557ac 2244 enum optr hint ATTRIBUTE_UNUSED)
ef1ad42b
JD		 2245{
2246 uint8_t lb;
2247 int status = mra->read (mra, 0, 1, &lb);
2248 if (status < 0)
2249 return OP_INVALID;
2250
e5a557ac 2251 enum optr opbase = (lb & 0x80) ? OP_dbNE : OP_tbNE;
ef1ad42b
JD		 2252 return opbase + ((lb & 0x70) >> 4);
2253}
2254
2255static void
2256loop_primitive_decode (struct mem_read_abstraction_base *mra,
2257 int *n_operands, struct operand **operands)
2258{
2259 int offs = 1;
2260 uint8_t lb;
2261 int status = mra->read (mra, 0, 1, &lb);
2262 if (status < 0)
2263 return ;
2264
2265 enum LP_MODE mode = -1;
2266 size_t i;
2267 for (i = 0; i < sizeof (lp_mode) / sizeof (lp_mode[0]); ++i)
2268 {
2269 const struct lp *pb = lp_mode + i;
2270 if ((lb & pb->mask) == pb->value)
2271 {
2272 mode = pb->mode;
2273 break;
2274 }
2275 }
2276
2277 switch (mode)
2278 {
2279 case LP_REG:
2280 operands[(*n_operands)++] = create_register_operand (lb & 0x07);
2281 break;
2282 case LP_XY:
2283 operands[(*n_operands)++] =
2284 create_register_operand ((lb & 0x01) + REG_X);
2285 break;
2286 case LP_OPR:
2287 offs += x_opr_n_bytes (mra, 1);
2288 operands[(*n_operands)++] = x_opr_decode_with_size (mra, 1, lb & 0x03);
2289 break;
2290 }
2291
2292 rel_15_7 (mra, offs + 1, n_operands, operands);
2293}
2294
2295
e5a557ac
JD		 2296static enum optr
2297shift_discrim (struct mem_read_abstraction_base *mra, enum optr hint ATTRIBUTE_UNUSED)
ef1ad42b
JD		 2298{
2299 size_t i;
2300 uint8_t sb;
2301 int status = mra->read (mra, 0, 1, &sb);
2302 if (status < 0)
4a90ce95 2303 return OP_INVALID;
ef1ad42b
JD		 2304
2305 enum SB_DIR dir = (sb & 0x40) ? SB_LEFT : SB_RIGHT;
2306 enum SB_TYPE type = (sb & 0x80) ? SB_ARITHMETIC : SB_LOGICAL;
2307 enum SB_MODE mode = -1;
2308 for (i = 0; i < sizeof (sb_table) / sizeof (sb_table[0]); ++i)
2309 {
2310 const struct sb *sbe = sb_table + i;
2311 if ((sb & sbe->mask) == sbe->value)
2312 mode = sbe->mode;
2313 }
2314
2315 if (mode == SB_ROT)
2316 return (dir == SB_LEFT) ? OP_rol : OP_ror;
2317
2318 if (type == SB_LOGICAL)
2319 return (dir == SB_LEFT) ? OP_lsl : OP_lsr;
2320
2321 return (dir == SB_LEFT) ? OP_asl : OP_asr;
2322}
2323
2324
2325static void
2326shift_decode (struct mem_read_abstraction_base *mra, int *n_operands, struct operand **operands)
2327{
2328 size_t i;
2329
2330 uint8_t byte;
2331 int status = mra->read (mra, -1, 1, &byte);
2332 if (status < 0)
2333 return ;
2334
2335 uint8_t sb;
2336 status = mra->read (mra, 0, 1, &sb);
2337 if (status < 0)
2338 return ;
2339
2340 enum SB_MODE mode = -1;
2341 for (i = 0; i < sizeof (sb_table) / sizeof (sb_table[0]); ++i)
2342 {
2343 const struct sb *sbe = sb_table + i;
2344 if ((sb & sbe->mask) == sbe->value)
2345 mode = sbe->mode;
2346 }
2347
2348 short osize = -1;
2349 switch (mode)
2350 {
2351 case SB_REG_OPR_EFF:
2352 case SB_ROT:
2353 case SB_REG_OPR_OPR:
2354 osize = sb & 0x03;
2355 break;
2356 case SB_OPR_N:
2357 {
2358 uint8_t xb;
2359 mra->read (mra, 1, 1, &xb);
2360 /* The size suffix is not printed if the OPR operand refers
2361 directly to a register, because the size is implied by the
2362 size of that register. */
2363 if ((xb & 0xF8) != 0xB8)
2364 osize = sb & 0x03;
2365 }
2366 break;
2367 default:
2368 break;
2369 };
2370
2371 /* Destination register */
2372 switch (mode)
2373 {
2374 case SB_REG_REG_N_EFF:
2375 case SB_REG_REG_N:
2376 operands[(*n_operands)++] = create_register_operand (byte & 0x07);
2377 break;
2378 case SB_REG_OPR_EFF:
2379 case SB_REG_OPR_OPR:
2380 operands[(*n_operands)++] = create_register_operand (byte & 0x07);
2381 break;
2382
2383 case SB_ROT:
2384 operands[(*n_operands)++] = x_opr_decode_with_size (mra, 1, osize);
2385 break;
2386
2387 default:
2388 break;
2389 }
2390
2391 /* Source register */
2392 switch (mode)
2393 {
2394 case SB_REG_REG_N_EFF:
2395 case SB_REG_REG_N:
2396 operands[(*n_operands)++] =
2397 create_register_operand_with_size (sb & 0x07, osize);
2398 break;
2399
2400 case SB_REG_OPR_OPR:
2401 operands[(*n_operands)++] = x_opr_decode_with_size (mra, 1, osize);
2402 break;
2403
2404 default:
2405 break;
2406 }
2407
2408 /* 3rd arg */
2409 switch (mode)
2410 {
2411 case SB_REG_OPR_EFF:
2412 case SB_OPR_N:
2413 operands[(*n_operands)++] = x_opr_decode_with_size (mra, 1, osize);
2414 break;
2415
2416 case SB_REG_REG_N:
2417 {
2418 uint8_t xb;
2419 mra->read (mra, 1, 1, &xb);
2420
2421 /* This case is slightly unusual.
2422 If XB matches the binary pattern 0111XXXX, then instead of
2423 interpreting this as a general OPR postbyte in the IMMe4 mode,
2424 the XB byte is interpreted in s special way. */
2425 if ((xb & 0xF0) == 0x70)
2426 {
2427 if (byte & 0x10)
2428 {
2429 int shift = ((sb & 0x08) >> 3) | ((xb & 0x0f) << 1);
2430 operands[(*n_operands)++] = create_immediate_operand (shift);
2431 }
2432 else
2433 {
2434 /* This should not happen. */
2435 abort ();
2436 }
2437 }
2438 else
2439 {
2440 operands[(*n_operands)++] = x_opr_decode (mra, 1);
2441 }
2442 }
2443 break;
2444 case SB_REG_OPR_OPR:
2445 {
2446 uint8_t xb;
2447 int n = x_opr_n_bytes (mra, 1);
2448 mra->read (mra, 1 + n, 1, &xb);
2449
2450 if ((xb & 0xF0) == 0x70)
2451 {
2452 int imm = xb & 0x0F;
2453 imm <<= 1;
2454 imm |= (sb & 0x08) >> 3;
2455 operands[(*n_operands)++] = create_immediate_operand (imm);
2456 }
2457 else
2458 {
2459 operands[(*n_operands)++] = x_opr_decode (mra, 1 + n);
2460 }
2461 }
2462 break;
2463 default:
2464 break;
2465 }
2466
2467 switch (mode)
2468 {
2469 case SB_REG_REG_N_EFF:
2470 case SB_REG_OPR_EFF:
2471 case SB_OPR_N:
2472 {
2473 int imm = (sb & 0x08) ? 2 : 1;
2474 operands[(*n_operands)++] = create_immediate_operand (imm);
2475 }
2476 break;
2477
2478 default:
2479 break;
2480 }
2481}
2482
e5a557ac 2483static enum optr
ef1ad42b 2484psh_pul_discrim (struct mem_read_abstraction_base *mra,
e5a557ac 2485 enum optr hint ATTRIBUTE_UNUSED)
ef1ad42b
JD		 2486{
2487 uint8_t byte;
2488 int status = mra->read (mra, 0, 1, &byte);
2489 if (status != 0)
2490 return OP_INVALID;
2491
2492 return (byte & 0x80) ? OP_pull: OP_push;
2493}
2494
2495
2496static void
2497psh_pul_decode (struct mem_read_abstraction_base *mra,
2498 int *n_operands, struct operand **operand)
2499{
2500 uint8_t byte;
2501 int status = mra->read (mra, 0, 1, &byte);
2502 if (status != 0)
2503 return;
2504 int bit;
2505 if (byte & 0x40)
2506 {
2507 if ((byte & 0x3F) == 0)
2508 {
2509 operand[(*n_operands)++] = create_register_all16_operand ();
2510 }
2511 else
2512 for (bit = 5; bit >= 0; --bit)
2513 {
2514 if (byte & (0x1 << bit))
2515 {
2516 operand[(*n_operands)++] = create_register_operand (oprregs2[bit]);
2517 }
2518 }
2519 }
2520 else
2521 {
2522 if ((byte & 0x3F) == 0)
2523 {
2524 operand[(*n_operands)++] = create_register_all_operand ();
2525 }
2526 else
2527 for (bit = 5; bit >= 0; --bit)
2528 {
2529 if (byte & (0x1 << bit))
2530 {
2531 operand[(*n_operands)++] = create_register_operand (oprregs1[bit]);
2532 }
2533 }
2534 }
2535}
2536
e5a557ac
JD		 2537static enum optr
2538bit_field_discrim (struct mem_read_abstraction_base *mra, enum optr hint ATTRIBUTE_UNUSED)
ef1ad42b
JD		 2539{
2540 int status;
2541 bfd_byte bb;
2542 status = mra->read (mra, 0, 1, &bb);
2543 if (status != 0)
2544 return OP_INVALID;
2545
2546 return (bb & 0x80) ? OP_bfins : OP_bfext;
2547}
2548
2549static void
2550bit_field_decode (struct mem_read_abstraction_base *mra,
2551 int *n_operands, struct operand **operands)
2552{
2553 int status;
2554
2555 bfd_byte byte2;
2556 status = mra->read (mra, -1, 1, &byte2);
2557 if (status != 0)
2558 return;
2559
2560 bfd_byte bb;
2561 status = mra->read (mra, 0, 1, &bb);
2562 if (status != 0)
2563 return;
2564
2565 enum BB_MODE mode = -1;
2566 size_t i;
2567 const struct opr_bb *bbs = 0;
2568 for (i = 0; i < sizeof (bb_modes) / sizeof (bb_modes[0]); ++i)
2569 {
2570 bbs = bb_modes + i;
2571 if ((bb & bbs->mask) == bbs->value)
2572 {
2573 mode = bbs->mode;
2574 break;
2575 }
2576 }
2577 int reg1 = byte2 & 0x07;
2578 /* First operand */
2579 switch (mode)
2580 {
2581 case BB_REG_REG_REG:
2582 case BB_REG_REG_IMM:
2583 case BB_REG_OPR_REG:
2584 case BB_REG_OPR_IMM:
2585 operands[(*n_operands)++] = create_register_operand (reg1);
2586 break;
2587 case BB_OPR_REG_REG:
2588 operands[(*n_operands)++] = x_opr_decode_with_size (mra, 1,
2589 (bb >> 2) & 0x03);
2590 break;
2591 case BB_OPR_REG_IMM:
2592 operands[(*n_operands)++] = x_opr_decode_with_size (mra, 2,
2593 (bb >> 2) & 0x03);
2594 break;
2595 }
2596
2597 /* Second operand */
2598 switch (mode)
2599 {
2600 case BB_REG_REG_REG:
2601 case BB_REG_REG_IMM:
2602 {
2603 int reg_src = (bb >> 2) & 0x07;
2604 operands[(*n_operands)++] = create_register_operand (reg_src);
2605 }
2606 break;
2607 case BB_OPR_REG_REG:
2608 case BB_OPR_REG_IMM:
2609 {
2610 int reg_src = (byte2 & 0x07);
2611 operands[(*n_operands)++] = create_register_operand (reg_src);
2612 }
2613 break;
2614 case BB_REG_OPR_REG:
2615 operands[(*n_operands)++] = x_opr_decode_with_size (mra, 1,
2616 (bb >> 2) & 0x03);
2617 break;
2618 case BB_REG_OPR_IMM:
2619 operands[(*n_operands)++] = x_opr_decode_with_size (mra, 2,
2620 (bb >> 2) & 0x03);
2621 break;
2622 }
2623
2624 /* Third operand */
2625 switch (mode)
2626 {
2627 case BB_REG_REG_REG:
2628 case BB_OPR_REG_REG:
2629 case BB_REG_OPR_REG:
2630 {
2631 int reg_parm = bb & 0x03;
2632 operands[(*n_operands)++] = create_register_operand (reg_parm);
2633 }
2634 break;
2635 case BB_REG_REG_IMM:
2636 case BB_OPR_REG_IMM:
2637 case BB_REG_OPR_IMM:
2638 {
2639 bfd_byte i1;
2640 mra->read (mra, 1, 1, &i1);
2641 int offset = i1 & 0x1f;
2642 int width = bb & 0x03;
2643 width <<= 3;
2644 width |= i1 >> 5;
2645 operands[(*n_operands)++] = create_bitfield_operand (width, offset);
2646 }
2647 break;
2648 }
2649}
2650
2651
2652/* Decode the next instruction at MRA, according to OPC.
2653 The operation to be performed is returned.
2654 The number of operands, will be placed in N_OPERANDS.
2655 The operands themselved into OPERANDS. */
e5a557ac 2656static enum optr
ef1ad42b
JD		 2657decode_operation (const struct opcode *opc,
2658 struct mem_read_abstraction_base *mra,
2659 int *n_operands, struct operand **operands)
2660{
e5a557ac 2661 enum optr op = opc->operator;
ef1ad42b
JD		 2662 if (opc->discriminator)
2663 op = opc->discriminator (mra, opc->operator);
2664
2665 if (opc->operands)
2666 opc->operands (mra, n_operands, operands);
2667
2668 if (opc->operands2)
2669 opc->operands2 (mra, n_operands, operands);
2670
2671 return op;
2672}
2673
2674int
e5a557ac 2675decode_s12z (enum optr *myoperator, short *osize,
ef1ad42b
JD		 2676 int *n_operands, struct operand **operands,
2677 struct mem_read_abstraction_base *mra)
2678{
2679 int n_bytes = 0;
2680 bfd_byte byte;
2681
2682 int status = mra->read (mra, 0, 1, &byte);
2683 if (status != 0)
2684 return status;
2685
2686 mra->advance (mra);
2687
2688 const struct opcode *opc = page1 + byte;
2689 if (byte == PAGE2_PREBYTE)
2690 {
2691 /* Opcodes in page2 have an additional byte */
2692 n_bytes++;
2693
2694 bfd_byte byte2;
2695 mra->read (mra, 0, 1, &byte2);
2696 mra->advance (mra);
2697 opc = page2 + byte2;
2698 }
2699 *myoperator = decode_operation (opc, mra, n_operands, operands);
2700 *osize = opc->osize;
2701
2702 /* Return the number of bytes in the instruction. */
2703 n_bytes += (opc && opc->insn_bytes) ? opc->insn_bytes (mra) : 0;
2704
2705 return n_bytes;
2706}
2707
GDB Binutils - Deliverables
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