Commit | Line | Data |
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794a16b0 KR |
1 | /* to sanitize this file, grep -v v9 < sparc.h > clean-sparc.h */ |
2 | ||
3 | /* Table of opcodes for the sparc. | |
4 | Copyright 1989, 1991, 1992 Free Software Foundation, Inc. | |
5 | ||
6 | This file is part of the BFD library. | |
7 | ||
8 | BFD is free software; you can redistribute it and/or modify it under | |
9 | the terms of the GNU General Public License as published by the Free | |
10 | Software Foundation; either version 2, or (at your option) any later | |
11 | version. | |
12 | ||
13 | BFD is distributed in the hope that it will be useful, but WITHOUT ANY | |
14 | WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
15 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
16 | for more details. | |
17 | ||
18 | You should have received a copy of the GNU General Public License | |
19 | along with this software; see the file COPYING. If not, write to | |
20 | the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */ | |
21 | ||
794a16b0 KR |
22 | /* FIXME-someday: perhaps the ,a's and such should be embedded in the |
23 | instruction's name rather than the args. This would make gas faster, pinsn | |
24 | slower, but would mess up some macros a bit. xoxorich. */ | |
25 | ||
26 | #include <stdio.h> | |
27 | #include "ansidecl.h" | |
493d3e75 | 28 | #define BFD_EMIT_TABLE |
794a16b0 KR |
29 | #include "opcode/sparc.h" |
30 | ||
794a16b0 KR |
31 | const char *architecture_pname[] = { |
32 | "v6", | |
33 | "v7", | |
34 | "v8", | |
35 | "sparclite", | |
36 | "v9", | |
37 | NULL, | |
38 | }; | |
39 | ||
493d3e75 | 40 | /* v9: This file is correct for SPARC Version 9 Draft 1.0.4. */ |
794a16b0 KR |
41 | |
42 | #define COND(x) (((x)&0xf)<<25) | |
43 | #define MCOND(x,i_or_f) ((((i_or_f)&1)<<18)|(((x)>>11)&(0xf<<14))) /* v9 */ | |
44 | ||
45 | #define CONDA (COND(0x8)) | |
46 | #define CONDCC (COND(0xd)) | |
47 | #define CONDCS (COND(0x5)) | |
48 | #define CONDE (COND(0x1)) | |
49 | #define CONDG (COND(0xa)) | |
50 | #define CONDGE (COND(0xb)) | |
51 | #define CONDGU (COND(0xc)) | |
52 | #define CONDL (COND(0x3)) | |
53 | #define CONDLE (COND(0x2)) | |
54 | #define CONDLEU (COND(0x4)) | |
55 | #define CONDN (COND(0x0)) | |
56 | #define CONDNE (COND(0x9)) | |
57 | #define CONDNEG (COND(0x6)) | |
58 | #define CONDPOS (COND(0xe)) | |
59 | #define CONDVC (COND(0xf)) | |
60 | #define CONDVS (COND(0x7)) | |
61 | ||
62 | #define CONDNZ CONDNE | |
63 | #define CONDZ CONDE | |
64 | #define CONDGEU CONDCC | |
65 | #define CONDLU CONDCS | |
66 | ||
67 | #define FCONDA (COND(0x8)) | |
68 | #define FCONDE (COND(0x9)) | |
69 | #define FCONDG (COND(0x6)) | |
70 | #define FCONDGE (COND(0xb)) | |
71 | #define FCONDL (COND(0x4)) | |
72 | #define FCONDLE (COND(0xd)) | |
73 | #define FCONDLG (COND(0x2)) | |
74 | #define FCONDN (COND(0x0)) | |
75 | #define FCONDNE (COND(0x1)) | |
76 | #define FCONDO (COND(0xf)) | |
77 | #define FCONDU (COND(0x7)) | |
78 | #define FCONDUE (COND(0xa)) | |
79 | #define FCONDUG (COND(0x5)) | |
80 | #define FCONDUGE (COND(0xc)) | |
81 | #define FCONDUL (COND(0x3)) | |
82 | #define FCONDULE (COND(0xe)) | |
83 | ||
84 | #define FCONDNZ FCONDNE | |
85 | #define FCONDZ FCONDE | |
86 | ||
87 | #define ICC (0) /* v9 */ | |
88 | #define XCC (1<<11) /* v9 */ | |
89 | #define FCC(x) (((x)&0x3)<<11) /* v9 */ | |
90 | #define FBFCC(x) (((x)&0x3)<<20) /* v9 */ | |
91 | ||
92 | /* The order of the opcodes in the table is significant: | |
93 | ||
94 | * The assembler requires that all instances of the same mnemonic must | |
95 | be consecutive. If they aren't, the assembler will bomb at runtime. | |
96 | ||
97 | * The disassembler should not care about the order of the opcodes. | |
98 | ||
493d3e75 | 99 | */ |
794a16b0 KR |
100 | |
101 | struct sparc_opcode sparc_opcodes[] = { | |
102 | ||
103 | { "ld", F3(3, 0x00, 0), F3(~3, ~0x00, ~0), "[1+2],d", 0, v6 }, | |
104 | { "ld", F3(3, 0x00, 0), F3(~3, ~0x00, ~0)|RS2_G0, "[1],d", 0, v6 }, /* ld [rs1+%g0],d */ | |
105 | { "ld", F3(3, 0x00, 1), F3(~3, ~0x00, ~1), "[1+i],d", 0, v6 }, | |
106 | { "ld", F3(3, 0x00, 1), F3(~3, ~0x00, ~1), "[i+1],d", 0, v6 }, | |
107 | { "ld", F3(3, 0x00, 1), F3(~3, ~0x00, ~1)|RS1_G0, "[i],d", 0, v6 }, | |
108 | { "ld", F3(3, 0x00, 1), F3(~3, ~0x00, ~1)|SIMM13(~0), "[1],d", 0, v6 }, /* ld [rs1+0],d */ | |
109 | { "ld", F3(3, 0x20, 0), F3(~3, ~0x20, ~0), "[1+2],g", 0, v6 }, | |
110 | { "ld", F3(3, 0x20, 0), F3(~3, ~0x20, ~0)|RS2_G0, "[1],g", 0, v6 }, /* ld [rs1+%g0],d */ | |
111 | { "ld", F3(3, 0x20, 1), F3(~3, ~0x20, ~1), "[1+i],g", 0, v6 }, | |
112 | { "ld", F3(3, 0x20, 1), F3(~3, ~0x20, ~1), "[i+1],g", 0, v6 }, | |
113 | { "ld", F3(3, 0x20, 1), F3(~3, ~0x20, ~1)|RS1_G0, "[i],g", 0, v6 }, | |
114 | { "ld", F3(3, 0x20, 1), F3(~3, ~0x20, ~1)|SIMM13(~0), "[1],g", 0, v6 }, /* ld [rs1+0],d */ | |
493d3e75 KR |
115 | |
116 | { "ld", F3(3, 0x21, 0), F3(~3, ~0x21, ~0)|RD(~0), "[1+2],F", 0, v6 }, | |
117 | { "ld", F3(3, 0x21, 0), F3(~3, ~0x21, ~0)|RS2_G0|RD(~0),"[1],F", 0, v6 }, /* ld [rs1+%g0],d */ | |
118 | { "ld", F3(3, 0x21, 1), F3(~3, ~0x21, ~1)|RD(~0), "[1+i],F", 0, v6 }, | |
119 | { "ld", F3(3, 0x21, 1), F3(~3, ~0x21, ~1)|RD(~0), "[i+1],F", 0, v6 }, | |
120 | { "ld", F3(3, 0x21, 1), F3(~3, ~0x21, ~1)|RS1_G0|RD(~0),"[i],F", 0, v6 }, | |
121 | { "ld", F3(3, 0x21, 1), F3(~3, ~0x21, ~1)|SIMM13(~0)|RD(~0),"[1],F", 0, v6 }, /* ld [rs1+0],d */ | |
122 | ||
123 | /* FIXME These are marked F_ALIAS, so that they won't conflict with new v9 | |
124 | insns when v9 is present. Otherwise, the F_ALIAS flag is ignored. */ | |
125 | { "ld", F3(3, 0x30, 0), F3(~3, ~0x30, ~0), "[1+2],D", F_ALIAS, v6 }, | |
126 | { "ld", F3(3, 0x30, 0), F3(~3, ~0x30, ~0)|RS2_G0, "[1],D", F_ALIAS, v6 }, /* ld [rs1+%g0],d */ | |
127 | { "ld", F3(3, 0x30, 1), F3(~3, ~0x30, ~1), "[1+i],D", F_ALIAS, v6 }, | |
128 | { "ld", F3(3, 0x30, 1), F3(~3, ~0x30, ~1), "[i+1],D", F_ALIAS, v6 }, | |
129 | { "ld", F3(3, 0x30, 1), F3(~3, ~0x30, ~1)|RS1_G0, "[i],D", F_ALIAS, v6 }, | |
130 | { "ld", F3(3, 0x30, 1), F3(~3, ~0x30, ~1)|SIMM13(~0), "[1],D", F_ALIAS, v6 }, /* ld [rs1+0],d */ | |
794a16b0 KR |
131 | { "ld", F3(3, 0x31, 0), F3(~3, ~0x31, ~0), "[1+2],C", 0, v6 }, |
132 | { "ld", F3(3, 0x31, 0), F3(~3, ~0x31, ~0)|RS2_G0, "[1],C", 0, v6 }, /* ld [rs1+%g0],d */ | |
133 | { "ld", F3(3, 0x31, 1), F3(~3, ~0x31, ~1), "[1+i],C", 0, v6 }, | |
134 | { "ld", F3(3, 0x31, 1), F3(~3, ~0x31, ~1), "[i+1],C", 0, v6 }, | |
135 | { "ld", F3(3, 0x31, 1), F3(~3, ~0x31, ~1)|RS1_G0, "[i],C", 0, v6 }, | |
136 | { "ld", F3(3, 0x31, 1), F3(~3, ~0x31, ~1)|SIMM13(~0), "[1],C", 0, v6 }, /* ld [rs1+0],d */ | |
137 | ||
493d3e75 KR |
138 | /* The v9 LDUW is the same as the old 'ld' opcode, it is not the same as the |
139 | 'ld' pseudo-op in v9. */ | |
140 | { "lduw", F3(3, 0x00, 0), F3(~3, ~0x00, ~0), "[1+2],d", F_ALIAS, v9 }, | |
794a16b0 KR |
141 | { "lduw", F3(3, 0x00, 0), F3(~3, ~0x00, ~0)|RS2_G0, "[1],d", F_ALIAS, v9 }, /* ld [rs1+%g0],d */ |
142 | { "lduw", F3(3, 0x00, 1), F3(~3, ~0x00, ~1), "[1+i],d", F_ALIAS, v9 }, | |
143 | { "lduw", F3(3, 0x00, 1), F3(~3, ~0x00, ~1), "[i+1],d", F_ALIAS, v9 }, | |
144 | { "lduw", F3(3, 0x00, 1), F3(~3, ~0x00, ~1)|RS1_G0, "[i],d", F_ALIAS, v9 }, | |
145 | { "lduw", F3(3, 0x00, 1), F3(~3, ~0x00, ~1)|SIMM13(~0), "[1],d", F_ALIAS, v9 }, /* ld [rs1+0],d */ | |
794a16b0 KR |
146 | |
147 | { "ldd", F3(3, 0x03, 0), F3(~3, ~0x03, ~0)|ASI(~0), "[1+2],d", 0, v6 }, | |
148 | { "ldd", F3(3, 0x03, 0), F3(~3, ~0x03, ~0)|ASI_RS2(~0), "[1],d", 0, v6 }, /* ldd [rs1+%g0],d */ | |
149 | { "ldd", F3(3, 0x03, 1), F3(~3, ~0x03, ~1), "[1+i],d", 0, v6 }, | |
150 | { "ldd", F3(3, 0x03, 1), F3(~3, ~0x03, ~1), "[i+1],d", 0, v6 }, | |
151 | { "ldd", F3(3, 0x03, 1), F3(~3, ~0x03, ~1)|RS1_G0, "[i],d", 0, v6 }, | |
152 | { "ldd", F3(3, 0x03, 1), F3(~3, ~0x03, ~1)|SIMM13(~0), "[1],d", 0, v6 }, /* ldd [rs1+0],d */ | |
493d3e75 KR |
153 | { "ldd", F3(3, 0x23, 0), F3(~3, ~0x23, ~0)|ASI(~0), "[1+2],H", 0, v6 }, |
154 | { "ldd", F3(3, 0x23, 0), F3(~3, ~0x23, ~0)|ASI_RS2(~0), "[1],H", 0, v6 }, /* ldd [rs1+%g0],d */ | |
155 | { "ldd", F3(3, 0x23, 1), F3(~3, ~0x23, ~1), "[1+i],H", 0, v6 }, | |
156 | { "ldd", F3(3, 0x23, 1), F3(~3, ~0x23, ~1), "[i+1],H", 0, v6 }, | |
157 | { "ldd", F3(3, 0x23, 1), F3(~3, ~0x23, ~1)|RS1_G0, "[i],H", 0, v6 }, | |
158 | { "ldd", F3(3, 0x23, 1), F3(~3, ~0x23, ~1)|SIMM13(~0), "[1],H", 0, v6 }, /* ldd [rs1+0],d */ | |
159 | /* FIXME These are marked F_ALIAS, so that they won't conflict with new v9 | |
160 | insns when v9 is present. Otherwise, the F_ALIAS flag is ignored. */ | |
161 | { "ldd", F3(3, 0x33, 0), F3(~3, ~0x33, ~0)|ASI(~0), "[1+2],D", F_ALIAS, v6 }, | |
162 | { "ldd", F3(3, 0x33, 0), F3(~3, ~0x33, ~0)|ASI_RS2(~0), "[1],D", F_ALIAS, v6 }, /* ldd [rs1+%g0],d */ | |
163 | { "ldd", F3(3, 0x33, 1), F3(~3, ~0x33, ~1), "[1+i],D", F_ALIAS, v6 }, | |
164 | { "ldd", F3(3, 0x33, 1), F3(~3, ~0x33, ~1), "[i+1],D", F_ALIAS, v6 }, | |
165 | { "ldd", F3(3, 0x33, 1), F3(~3, ~0x33, ~1)|RS1_G0, "[i],D", F_ALIAS, v6 }, | |
166 | { "ldd", F3(3, 0x33, 1), F3(~3, ~0x33, ~1)|SIMM13(~0), "[1],D", F_ALIAS, v6 }, /* ldd [rs1+0],d */ | |
167 | ||
168 | { "ldq", F3(3, 0x22, 0), F3(~3, ~0x22, ~0)|ASI(~0), "[1+2],J", 0, v9 }, | |
169 | { "ldq", F3(3, 0x22, 0), F3(~3, ~0x22, ~0)|ASI_RS2(~0), "[1],J", 0, v9 }, /* ldd [rs1+%g0],d */ | |
170 | { "ldq", F3(3, 0x22, 1), F3(~3, ~0x22, ~1), "[1+i],J", 0, v9 }, | |
171 | { "ldq", F3(3, 0x22, 1), F3(~3, ~0x22, ~1), "[i+1],J", 0, v9 }, | |
172 | { "ldq", F3(3, 0x22, 1), F3(~3, ~0x22, ~1)|RS1_G0, "[i],J", 0, v9 }, | |
173 | { "ldq", F3(3, 0x22, 1), F3(~3, ~0x22, ~1)|SIMM13(~0), "[1],J", 0, v9 }, /* ldd [rs1+0],d */ | |
174 | ||
794a16b0 KR |
175 | { "ldsb", F3(3, 0x09, 0), F3(~3, ~0x09, ~0)|ASI(~0), "[1+2],d", 0, v6 }, |
176 | { "ldsb", F3(3, 0x09, 0), F3(~3, ~0x09, ~0)|ASI_RS2(~0), "[1],d", 0, v6 }, /* ldsb [rs1+%g0],d */ | |
177 | { "ldsb", F3(3, 0x09, 1), F3(~3, ~0x09, ~1), "[1+i],d", 0, v6 }, | |
178 | { "ldsb", F3(3, 0x09, 1), F3(~3, ~0x09, ~1), "[i+1],d", 0, v6 }, | |
179 | { "ldsb", F3(3, 0x09, 1), F3(~3, ~0x09, ~1)|RS1_G0, "[i],d", 0, v6 }, | |
180 | { "ldsb", F3(3, 0x09, 1), F3(~3, ~0x09, ~1)|SIMM13(~0), "[1],d", 0, v6 }, /* ldsb [rs1+0],d */ | |
493d3e75 | 181 | |
794a16b0 KR |
182 | { "ldsh", F3(3, 0x0a, 0), F3(~3, ~0x0a, ~0)|ASI_RS2(~0), "[1],d", 0, v6 }, /* ldsh [rs1+%g0],d */ |
183 | { "ldsh", F3(3, 0x0a, 0), F3(~3, ~0x0a, ~0)|ASI(~0), "[1+2],d", 0, v6 }, | |
184 | { "ldsh", F3(3, 0x0a, 1), F3(~3, ~0x0a, ~1), "[1+i],d", 0, v6 }, | |
185 | { "ldsh", F3(3, 0x0a, 1), F3(~3, ~0x0a, ~1), "[i+1],d", 0, v6 }, | |
186 | { "ldsh", F3(3, 0x0a, 1), F3(~3, ~0x0a, ~1)|RS1_G0, "[i],d", 0, v6 }, | |
187 | { "ldsh", F3(3, 0x0a, 1), F3(~3, ~0x0a, ~1)|SIMM13(~0), "[1],d", 0, v6 }, /* ldsh [rs1+0],d */ | |
493d3e75 | 188 | |
794a16b0 KR |
189 | { "ldstub", F3(3, 0x0d, 0), F3(~3, ~0x0d, ~0)|ASI(~0), "[1+2],d", 0, v6 }, |
190 | { "ldstub", F3(3, 0x0d, 0), F3(~3, ~0x0d, ~0)|ASI_RS2(~0), "[1],d", 0, v6 }, /* ldstub [rs1+%g0],d */ | |
191 | { "ldstub", F3(3, 0x0d, 1), F3(~3, ~0x0d, ~1), "[1+i],d", 0, v6 }, | |
192 | { "ldstub", F3(3, 0x0d, 1), F3(~3, ~0x0d, ~1), "[i+1],d", 0, v6 }, | |
193 | { "ldstub", F3(3, 0x0d, 1), F3(~3, ~0x0d, ~1)|RS1_G0, "[i],d", 0, v6 }, | |
493d3e75 KR |
194 | { "ldstub", F3(3, 0x0d, 1), F3(~3, ~0x0d, ~1)|SIMM13(~0), "[1],d", 0, v6 }, /* ldstub [rs1+0],d */ |
195 | ||
794a16b0 KR |
196 | { "ldsw", F3(3, 0x08, 0), F3(~3, ~0x08, ~0)|ASI(~0), "[1+2],d", 0, v9 }, |
197 | { "ldsw", F3(3, 0x08, 0), F3(~3, ~0x08, ~0)|ASI_RS2(~0), "[1],d", 0, v9 }, /* ldsw [rs1+%g0],d */ | |
198 | { "ldsw", F3(3, 0x08, 1), F3(~3, ~0x08, ~1), "[1+i],d", 0, v9 }, | |
199 | { "ldsw", F3(3, 0x08, 1), F3(~3, ~0x08, ~1), "[i+1],d", 0, v9 }, | |
200 | { "ldsw", F3(3, 0x08, 1), F3(~3, ~0x08, ~1)|RS1_G0, "[i],d", 0, v9 }, | |
201 | { "ldsw", F3(3, 0x08, 1), F3(~3, ~0x08, ~1)|SIMM13(~0), "[1],d", 0, v9 }, /* ldsw [rs1+0],d */ | |
493d3e75 | 202 | |
794a16b0 KR |
203 | { "ldub", F3(3, 0x01, 0), F3(~3, ~0x01, ~0)|ASI(~0), "[1+2],d", 0, v6 }, |
204 | { "ldub", F3(3, 0x01, 0), F3(~3, ~0x01, ~0)|ASI_RS2(~0), "[1],d", 0, v6 }, /* ldub [rs1+%g0],d */ | |
205 | { "ldub", F3(3, 0x01, 1), F3(~3, ~0x01, ~1), "[1+i],d", 0, v6 }, | |
206 | { "ldub", F3(3, 0x01, 1), F3(~3, ~0x01, ~1), "[i+1],d", 0, v6 }, | |
207 | { "ldub", F3(3, 0x01, 1), F3(~3, ~0x01, ~1)|RS1_G0, "[i],d", 0, v6 }, | |
208 | { "ldub", F3(3, 0x01, 1), F3(~3, ~0x01, ~1)|SIMM13(~0), "[1],d", 0, v6 }, /* ldub [rs1+0],d */ | |
493d3e75 | 209 | |
794a16b0 KR |
210 | { "lduh", F3(3, 0x02, 0), F3(~3, ~0x02, ~0)|ASI(~0), "[1+2],d", 0, v6 }, |
211 | { "lduh", F3(3, 0x02, 0), F3(~3, ~0x02, ~0)|ASI_RS2(~0), "[1],d", 0, v6 }, /* lduh [rs1+%g0],d */ | |
212 | { "lduh", F3(3, 0x02, 1), F3(~3, ~0x02, ~1), "[1+i],d", 0, v6 }, | |
213 | { "lduh", F3(3, 0x02, 1), F3(~3, ~0x02, ~1), "[i+1],d", 0, v6 }, | |
214 | { "lduh", F3(3, 0x02, 1), F3(~3, ~0x02, ~1)|RS1_G0, "[i],d", 0, v6 }, | |
215 | { "lduh", F3(3, 0x02, 1), F3(~3, ~0x02, ~1)|SIMM13(~0), "[1],d", 0, v6 }, /* lduh [rs1+0],d */ | |
216 | ||
217 | { "ldx", F3(3, 0x0b, 0), F3(~3, ~0x0b, ~0)|ASI(~0), "[1+2],d", 0, v9 }, | |
218 | { "ldx", F3(3, 0x0b, 0), F3(~3, ~0x0b, ~0)|ASI_RS2(~0), "[1],d", 0, v9 }, /* ldx [rs1+%g0],d */ | |
219 | { "ldx", F3(3, 0x0b, 1), F3(~3, ~0x0b, ~1), "[1+i],d", 0, v9 }, | |
220 | { "ldx", F3(3, 0x0b, 1), F3(~3, ~0x0b, ~1), "[i+1],d", 0, v9 }, | |
221 | { "ldx", F3(3, 0x0b, 1), F3(~3, ~0x0b, ~1)|RS1_G0, "[i],d", 0, v9 }, | |
222 | { "ldx", F3(3, 0x0b, 1), F3(~3, ~0x0b, ~1)|SIMM13(~0), "[1],d", 0, v9 }, /* ldx [rs1+0],d */ | |
493d3e75 KR |
223 | |
224 | { "ldx", F3(3, 0x21, 0)|RD(1), F3(~3, ~0x21, ~0)|RD(~1), "[1+2],F", 0, v9 }, | |
225 | { "ldx", F3(3, 0x21, 0)|RD(1), F3(~3, ~0x21, ~0)|RS2_G0|RD(~1), "[1],F", 0, v9 }, /* ld [rs1+%g0],d */ | |
226 | { "ldx", F3(3, 0x21, 1)|RD(1), F3(~3, ~0x21, ~1)|RD(~1), "[1+i],F", 0, v9 }, | |
227 | { "ldx", F3(3, 0x21, 1)|RD(1), F3(~3, ~0x21, ~1)|RD(~1), "[i+1],F", 0, v9 }, | |
228 | { "ldx", F3(3, 0x21, 1)|RD(1), F3(~3, ~0x21, ~1)|RS1_G0|RD(~1), "[i],F", 0, v9 }, | |
229 | { "ldx", F3(3, 0x21, 1)|RD(1), F3(~3, ~0x21, ~1)|SIMM13(~0)|RD(~1),"[1],F", 0, v9 }, /* ld [rs1+0],d */ | |
230 | ||
231 | { "lda", F3(3, 0x10, 0), F3(~3, ~0x10, ~0), "[1+2]A,d", 0, v6 }, | |
232 | { "lda", F3(3, 0x10, 0), F3(~3, ~0x10, ~0)|RS2_G0, "[1]A,d", 0, v6 }, /* lda [rs1+%g0],d */ | |
233 | { "lda", F3(3, 0x10, 1), F3(~3, ~0x10, ~1), "[1+i]o,d", 0, v9 }, | |
234 | { "lda", F3(3, 0x10, 1), F3(~3, ~0x10, ~1), "[i+1]o,d", 0, v9 }, | |
235 | { "lda", F3(3, 0x10, 1), F3(~3, ~0x10, ~1)|RS1_G0, "[i]o,d", 0, v9 }, | |
236 | { "lda", F3(3, 0x10, 1), F3(~3, ~0x10, ~1)|SIMM13(~0), "[1]o,d", 0, v9 }, /* ld [rs1+0],d */ | |
237 | { "lda", F3(3, 0x30, 0), F3(~3, ~0x30, ~0), "[1+2]A,g", 0, v9 }, | |
238 | { "lda", F3(3, 0x30, 0), F3(~3, ~0x30, ~0)|RS2_G0, "[1]A,g", 0, v9 }, /* lda [rs1+%g0],d */ | |
239 | { "lda", F3(3, 0x30, 1), F3(~3, ~0x30, ~1), "[1+i]o,g", 0, v9 }, | |
240 | { "lda", F3(3, 0x30, 1), F3(~3, ~0x30, ~1), "[i+1]o,g", 0, v9 }, | |
241 | { "lda", F3(3, 0x30, 1), F3(~3, ~0x30, ~1)|RS1_G0, "[i]o,g", 0, v9 }, | |
242 | { "lda", F3(3, 0x30, 1), F3(~3, ~0x30, ~1)|SIMM13(~0), "[1]o,g", 0, v9 }, /* ld [rs1+0],d */ | |
794a16b0 KR |
243 | |
244 | { "ldda", F3(3, 0x13, 0), F3(~3, ~0x13, ~0), "[1+2]A,d", 0, v6 }, | |
245 | { "ldda", F3(3, 0x13, 0), F3(~3, ~0x13, ~0)|RS2_G0, "[1]A,d", 0, v6 }, /* ldda [rs1+%g0],d */ | |
493d3e75 KR |
246 | { "ldda", F3(3, 0x13, 1), F3(~3, ~0x13, ~1), "[1+i]o,d", 0, v9 }, |
247 | { "ldda", F3(3, 0x13, 1), F3(~3, ~0x13, ~1), "[i+1]o,d", 0, v9 }, | |
248 | { "ldda", F3(3, 0x13, 1), F3(~3, ~0x13, ~1)|RS1_G0, "[i]o,d", 0, v9 }, | |
249 | { "ldda", F3(3, 0x13, 1), F3(~3, ~0x13, ~1)|SIMM13(~0), "[1]o,d", 0, v9 }, /* ld [rs1+0],d */ | |
250 | ||
251 | { "ldda", F3(3, 0x33, 0), F3(~3, ~0x33, ~0), "[1+2]A,H", 0, v9 }, | |
252 | { "ldda", F3(3, 0x33, 0), F3(~3, ~0x33, ~0)|RS2_G0, "[1]A,H", 0, v9 }, /* ldda [rs1+%g0],d */ | |
253 | { "ldda", F3(3, 0x33, 1), F3(~3, ~0x33, ~1), "[1+i]o,H", 0, v9 }, | |
254 | { "ldda", F3(3, 0x33, 1), F3(~3, ~0x33, ~1), "[i+1]o,H", 0, v9 }, | |
255 | { "ldda", F3(3, 0x33, 1), F3(~3, ~0x33, ~1)|RS1_G0, "[i]o,H", 0, v9 }, | |
256 | { "ldda", F3(3, 0x33, 1), F3(~3, ~0x33, ~1)|SIMM13(~0), "[1]o,H", 0, v9 }, /* ld [rs1+0],d */ | |
257 | ||
258 | { "ldqa", F3(3, 0x32, 0), F3(~3, ~0x32, ~0), "[1+2]A,J", 0, v9 }, | |
259 | { "ldqa", F3(3, 0x32, 0), F3(~3, ~0x32, ~0)|RS2_G0, "[1]A,J", 0, v9 }, /* ldd [rs1+%g0],d */ | |
260 | { "ldqa", F3(3, 0x32, 1), F3(~3, ~0x32, ~1), "[1+i]o,J", 0, v9 }, | |
261 | { "ldqa", F3(3, 0x32, 1), F3(~3, ~0x32, ~1), "[i+1]o,J", 0, v9 }, | |
262 | { "ldqa", F3(3, 0x32, 1), F3(~3, ~0x32, ~1)|RS1_G0, "[i]o,J", 0, v9 }, | |
263 | { "ldqa", F3(3, 0x32, 1), F3(~3, ~0x32, ~1)|SIMM13(~0), "[1]o,J", 0, v9 }, /* ldd [rs1+0],d */ | |
264 | ||
794a16b0 KR |
265 | { "ldsba", F3(3, 0x19, 0), F3(~3, ~0x19, ~0), "[1+2]A,d", 0, v6 }, |
266 | { "ldsba", F3(3, 0x19, 0), F3(~3, ~0x19, ~0)|RS2_G0, "[1]A,d", 0, v6 }, /* ldsba [rs1+%g0],d */ | |
493d3e75 KR |
267 | { "ldsba", F3(3, 0x19, 1), F3(~3, ~0x19, ~1), "[1+i]o,d", 0, v9 }, |
268 | { "ldsba", F3(3, 0x19, 1), F3(~3, ~0x19, ~1), "[i+1]o,d", 0, v9 }, | |
269 | { "ldsba", F3(3, 0x19, 1), F3(~3, ~0x19, ~1)|RS1_G0, "[i]o,d", 0, v9 }, | |
270 | { "ldsba", F3(3, 0x19, 1), F3(~3, ~0x19, ~1)|SIMM13(~0), "[1]o,d", 0, v9 }, /* ld [rs1+0],d */ | |
271 | ||
794a16b0 KR |
272 | { "ldsha", F3(3, 0x1a, 0), F3(~3, ~0x1a, ~0), "[1+2]A,d", 0, v6 }, |
273 | { "ldsha", F3(3, 0x1a, 0), F3(~3, ~0x1a, ~0)|RS2_G0, "[1]A,d", 0, v6 }, /* ldsha [rs1+%g0],d */ | |
493d3e75 KR |
274 | { "ldsha", F3(3, 0x1a, 1), F3(~3, ~0x1a, ~1), "[1+i]o,d", 0, v9 }, |
275 | { "ldsha", F3(3, 0x1a, 1), F3(~3, ~0x1a, ~1), "[i+1]o,d", 0, v9 }, | |
276 | { "ldsha", F3(3, 0x1a, 1), F3(~3, ~0x1a, ~1)|RS1_G0, "[i]o,d", 0, v9 }, | |
277 | { "ldsha", F3(3, 0x1a, 1), F3(~3, ~0x1a, ~1)|SIMM13(~0), "[1]o,d", 0, v9 }, /* ld [rs1+0],d */ | |
278 | ||
794a16b0 KR |
279 | { "ldstuba", F3(3, 0x1d, 0), F3(~3, ~0x1d, ~0), "[1+2]A,d", 0, v6 }, |
280 | { "ldstuba", F3(3, 0x1d, 0), F3(~3, ~0x1d, ~0)|RS2_G0, "[1]A,d", 0, v6 }, /* ldstuba [rs1+%g0],d */ | |
493d3e75 KR |
281 | { "ldstuba", F3(3, 0x1d, 1), F3(~3, ~0x1d, ~1), "[1+i]o,d", 0, v9 }, |
282 | { "ldstuba", F3(3, 0x1d, 1), F3(~3, ~0x1d, ~1), "[i+1]o,d", 0, v9 }, | |
283 | { "ldstuba", F3(3, 0x1d, 1), F3(~3, ~0x1d, ~1)|RS1_G0, "[i]o,d", 0, v9 }, | |
284 | { "ldstuba", F3(3, 0x1d, 1), F3(~3, ~0x1d, ~1)|SIMM13(~0), "[1]o,d", 0, v9 }, /* ld [rs1+0],d */ | |
285 | ||
286 | { "ldswa", F3(3, 0x18, 0), F3(~3, ~0x18, ~0), "[1+2]A,d", 0, v9 }, | |
794a16b0 | 287 | { "ldswa", F3(3, 0x18, 0), F3(~3, ~0x18, ~0)|RS2_G0, "[1]A,d", 0, v9 }, /* lda [rs1+%g0],d */ |
493d3e75 KR |
288 | { "ldswa", F3(3, 0x18, 1), F3(~3, ~0x18, ~1), "[1+i]o,d", 0, v9 }, |
289 | { "ldswa", F3(3, 0x18, 1), F3(~3, ~0x18, ~1), "[i+1]o,d", 0, v9 }, | |
290 | { "ldswa", F3(3, 0x18, 1), F3(~3, ~0x18, ~1)|RS1_G0, "[i]o,d", 0, v9 }, | |
291 | { "ldswa", F3(3, 0x18, 1), F3(~3, ~0x18, ~1)|SIMM13(~0), "[1]o,d", 0, v9 }, /* ld [rs1+0],d */ | |
292 | ||
794a16b0 KR |
293 | { "lduba", F3(3, 0x11, 0), F3(~3, ~0x11, ~0), "[1+2]A,d", 0, v6 }, |
294 | { "lduba", F3(3, 0x11, 0), F3(~3, ~0x11, ~0)|RS2_G0, "[1]A,d", 0, v6 }, /* lduba [rs1+%g0],d */ | |
493d3e75 KR |
295 | { "lduba", F3(3, 0x11, 1), F3(~3, ~0x11, ~1), "[1+i]o,d", 0, v9 }, |
296 | { "lduba", F3(3, 0x11, 1), F3(~3, ~0x11, ~1), "[i+1]o,d", 0, v9 }, | |
297 | { "lduba", F3(3, 0x11, 1), F3(~3, ~0x11, ~1)|RS1_G0, "[i]o,d", 0, v9 }, | |
298 | { "lduba", F3(3, 0x11, 1), F3(~3, ~0x11, ~1)|SIMM13(~0), "[1]o,d", 0, v9 }, /* ld [rs1+0],d */ | |
299 | ||
794a16b0 KR |
300 | { "lduha", F3(3, 0x12, 0), F3(~3, ~0x12, ~0), "[1+2]A,d", 0, v6 }, |
301 | { "lduha", F3(3, 0x12, 0), F3(~3, ~0x12, ~0)|RS2_G0, "[1]A,d", 0, v6 }, /* lduha [rs1+%g0],d */ | |
493d3e75 KR |
302 | { "lduha", F3(3, 0x12, 1), F3(~3, ~0x12, ~1), "[1+i]o,d", 0, v9 }, |
303 | { "lduha", F3(3, 0x12, 1), F3(~3, ~0x12, ~1), "[i+1]o,d", 0, v9 }, | |
304 | { "lduha", F3(3, 0x12, 1), F3(~3, ~0x12, ~1)|RS1_G0, "[i]o,d", 0, v9 }, | |
305 | { "lduha", F3(3, 0x12, 1), F3(~3, ~0x12, ~1)|SIMM13(~0), "[1]o,d", 0, v9 }, /* ld [rs1+0],d */ | |
306 | ||
794a16b0 KR |
307 | { "lduwa", F3(3, 0x10, 0), F3(~3, ~0x10, ~0), "[1+2]A,d", F_ALIAS, v9 }, /* lduwa === lda */ |
308 | { "lduwa", F3(3, 0x10, 0), F3(~3, ~0x10, ~0)|RS2_G0, "[1]A,d", F_ALIAS, v9 }, /* lda [rs1+%g0],d */ | |
493d3e75 KR |
309 | { "lduwa", F3(3, 0x10, 1), F3(~3, ~0x10, ~1), "[1+i]o,d", F_ALIAS, v9 }, |
310 | { "lduwa", F3(3, 0x10, 1), F3(~3, ~0x10, ~1), "[i+1]o,d", F_ALIAS, v9 }, | |
311 | { "lduwa", F3(3, 0x10, 1), F3(~3, ~0x10, ~1)|RS1_G0, "[i]o,d", F_ALIAS, v9 }, | |
312 | { "lduwa", F3(3, 0x10, 1), F3(~3, ~0x10, ~1)|SIMM13(~0), "[1]o,d", F_ALIAS, v9 }, /* ld [rs1+0],d */ | |
313 | ||
794a16b0 KR |
314 | { "ldxa", F3(3, 0x1b, 0), F3(~3, ~0x1b, ~0), "[1+2]A,d", 0, v9 }, /* lduwa === lda */ |
315 | { "ldxa", F3(3, 0x1b, 0), F3(~3, ~0x1b, ~0)|RS2_G0, "[1]A,d", 0, v9 }, /* lda [rs1+%g0],d */ | |
493d3e75 KR |
316 | { "ldxa", F3(3, 0x1b, 1), F3(~3, ~0x1b, ~1), "[1+i]o,d", 0, v9 }, |
317 | { "ldxa", F3(3, 0x1b, 1), F3(~3, ~0x1b, ~1), "[i+1]o,d", 0, v9 }, | |
318 | { "ldxa", F3(3, 0x1b, 1), F3(~3, ~0x1b, ~1)|RS1_G0, "[i]o,d", 0, v9 }, | |
319 | { "ldxa", F3(3, 0x1b, 1), F3(~3, ~0x1b, ~1)|SIMM13(~0), "[1]o,d", 0, v9 }, /* ld [rs1+0],d */ | |
794a16b0 KR |
320 | |
321 | { "st", F3(3, 0x04, 0), F3(~3, ~0x04, ~0)|ASI(~0), "d,[1+2]", 0, v6 }, | |
322 | { "st", F3(3, 0x04, 0), F3(~3, ~0x04, ~0)|ASI_RS2(~0), "d,[1]", 0, v6 }, /* st d,[rs1+%g0] */ | |
323 | { "st", F3(3, 0x04, 1), F3(~3, ~0x04, ~1), "d,[1+i]", 0, v6 }, | |
324 | { "st", F3(3, 0x04, 1), F3(~3, ~0x04, ~1), "d,[i+1]", 0, v6 }, | |
325 | { "st", F3(3, 0x04, 1), F3(~3, ~0x04, ~1)|RS1_G0, "d,[i]", 0, v6 }, | |
326 | { "st", F3(3, 0x04, 1), F3(~3, ~0x04, ~1)|SIMM13(~0), "d,[1]", 0, v6 }, /* st d,[rs1+0] */ | |
327 | { "st", F3(3, 0x24, 0), F3(~3, ~0x24, ~0)|ASI(~0), "g,[1+2]", 0, v6 }, | |
328 | { "st", F3(3, 0x24, 0), F3(~3, ~0x24, ~0)|ASI_RS2(~0), "g,[1]", 0, v6 }, /* st d[rs1+%g0] */ | |
329 | { "st", F3(3, 0x24, 1), F3(~3, ~0x24, ~1), "g,[1+i]", 0, v6 }, | |
330 | { "st", F3(3, 0x24, 1), F3(~3, ~0x24, ~1), "g,[i+1]", 0, v6 }, | |
331 | { "st", F3(3, 0x24, 1), F3(~3, ~0x24, ~1)|RS1_G0, "g,[i]", 0, v6 }, | |
332 | { "st", F3(3, 0x24, 1), F3(~3, ~0x24, ~1)|SIMM13(~0), "g,[1]", 0, v6 }, /* st d,[rs1+0] */ | |
493d3e75 KR |
333 | /* FIXME These are marked F_ALIAS, so that they won't conflict with new v9 |
334 | insns when v9 is present. Otherwise, the F_ALIAS flag is ignored. */ | |
335 | { "st", F3(3, 0x34, 0), F3(~3, ~0x34, ~0)|ASI(~0), "D,[1+2]", F_ALIAS, v6 }, | |
336 | { "st", F3(3, 0x34, 0), F3(~3, ~0x34, ~0)|ASI_RS2(~0), "D,[1]", F_ALIAS, v6 }, /* st d,[rs1+%g0] */ | |
337 | { "st", F3(3, 0x34, 1), F3(~3, ~0x34, ~1), "D,[1+i]", F_ALIAS, v6 }, | |
338 | { "st", F3(3, 0x34, 1), F3(~3, ~0x34, ~1), "D,[i+1]", F_ALIAS, v6 }, | |
339 | { "st", F3(3, 0x34, 1), F3(~3, ~0x34, ~1)|RS1_G0, "D,[i]", F_ALIAS, v6 }, | |
340 | { "st", F3(3, 0x34, 1), F3(~3, ~0x34, ~1)|SIMM13(~0), "D,[1]", F_ALIAS, v6 }, /* st d,[rs1+0] */ | |
794a16b0 KR |
341 | { "st", F3(3, 0x35, 0), F3(~3, ~0x35, ~0)|ASI(~0), "C,[1+2]", 0, v6 }, |
342 | { "st", F3(3, 0x35, 0), F3(~3, ~0x35, ~0)|ASI_RS2(~0), "C,[1]", 0, v6 }, /* st d,[rs1+%g0] */ | |
343 | { "st", F3(3, 0x35, 1), F3(~3, ~0x35, ~1), "C,[1+i]", 0, v6 }, | |
344 | { "st", F3(3, 0x35, 1), F3(~3, ~0x35, ~1), "C,[i+1]", 0, v6 }, | |
345 | { "st", F3(3, 0x35, 1), F3(~3, ~0x35, ~1)|RS1_G0, "C,[i]", 0, v6 }, | |
346 | { "st", F3(3, 0x35, 1), F3(~3, ~0x35, ~1)|SIMM13(~0), "C,[1]", 0, v6 }, /* st d,[rs1+0] */ | |
347 | ||
348 | { "st", F3(3, 0x25, 0), F3(~3, ~0x25, ~0)|RD_G0|ASI(~0), "F,[1+2]", 0, v6 }, | |
349 | { "st", F3(3, 0x25, 0), F3(~3, ~0x25, ~0)|RD_G0|ASI_RS2(~0), "F,[1]", 0, v6 }, /* st d,[rs1+%g0] */ | |
350 | { "st", F3(3, 0x25, 1), F3(~3, ~0x25, ~1)|RD_G0, "F,[1+i]", 0, v6 }, | |
351 | { "st", F3(3, 0x25, 1), F3(~3, ~0x25, ~1)|RD_G0, "F,[i+1]", 0, v6 }, | |
352 | { "st", F3(3, 0x25, 1), F3(~3, ~0x25, ~1)|RD_G0|RS1_G0, "F,[i]", 0, v6 }, | |
493d3e75 KR |
353 | { "st", F3(3, 0x25, 1), F3(~3, ~0x25, ~1)|RD_G0|SIMM13(~0), "F,[1]", 0, v6 }, /* st d,[rs1+0] */ |
354 | ||
355 | /* The v9 STW/STUW/STSW are the same as the old 'st' opcode, they are not | |
356 | the same as the 'st' psuedo-op in v9. */ | |
357 | { "stw", F3(3, 0x04, 0), F3(~3, ~0x04, ~0)|ASI(~0), "d,[1+2]", F_ALIAS, v9 }, | |
358 | { "stw", F3(3, 0x04, 0), F3(~3, ~0x04, ~0)|ASI_RS2(~0), "d,[1]", F_ALIAS, v9 }, /* st d,[rs1+%g0] */ | |
359 | { "stw", F3(3, 0x04, 1), F3(~3, ~0x04, ~1), "d,[1+i]", F_ALIAS, v9 }, | |
360 | { "stw", F3(3, 0x04, 1), F3(~3, ~0x04, ~1), "d,[i+1]", F_ALIAS, v9 }, | |
361 | { "stw", F3(3, 0x04, 1), F3(~3, ~0x04, ~1)|RS1_G0, "d,[i]", F_ALIAS, v9 }, | |
362 | { "stw", F3(3, 0x04, 1), F3(~3, ~0x04, ~1)|SIMM13(~0), "d,[1]", F_ALIAS, v9 }, /* st d,[rs1+0] */ | |
363 | ||
364 | { "stuw", F3(3, 0x04, 0), F3(~3, ~0x04, ~0)|ASI(~0), "d,[1+2]", F_ALIAS, v9 }, | |
365 | { "stuw", F3(3, 0x04, 0), F3(~3, ~0x04, ~0)|ASI_RS2(~0), "d,[1]", F_ALIAS, v9 }, /* st d,[rs1+%g0] */ | |
366 | { "stuw", F3(3, 0x04, 1), F3(~3, ~0x04, ~1), "d,[1+i]", F_ALIAS, v9 }, | |
367 | { "stuw", F3(3, 0x04, 1), F3(~3, ~0x04, ~1), "d,[i+1]", F_ALIAS, v9 }, | |
368 | { "stuw", F3(3, 0x04, 1), F3(~3, ~0x04, ~1)|RS1_G0, "d,[i]", F_ALIAS, v9 }, | |
369 | { "stuw", F3(3, 0x04, 1), F3(~3, ~0x04, ~1)|SIMM13(~0), "d,[1]", F_ALIAS, v9 }, /* st d,[rs1+0] */ | |
370 | ||
371 | { "stsw", F3(3, 0x04, 0), F3(~3, ~0x04, ~0)|ASI(~0), "d,[1+2]", F_ALIAS, v9 }, /* stsw === st */ | |
372 | { "stsw", F3(3, 0x04, 0), F3(~3, ~0x04, ~0)|ASI_RS2(~0), "d,[1]", F_ALIAS, v9 }, /* st d,[rs1+%g0] */ | |
373 | { "stsw", F3(3, 0x04, 1), F3(~3, ~0x04, ~1), "d,[1+i]", F_ALIAS, v9 }, | |
374 | { "stsw", F3(3, 0x04, 1), F3(~3, ~0x04, ~1), "d,[i+1]", F_ALIAS, v9 }, | |
375 | { "stsw", F3(3, 0x04, 1), F3(~3, ~0x04, ~1)|RS1_G0, "d,[i]", F_ALIAS, v9 }, | |
376 | { "stsw", F3(3, 0x04, 1), F3(~3, ~0x04, ~1)|SIMM13(~0), "d,[1]", F_ALIAS, v9 }, /* st d,[rs1+0] */ | |
794a16b0 KR |
377 | |
378 | { "sta", F3(3, 0x14, 0), F3(~3, ~0x14, ~0), "d,[1+2]A", 0, v6 }, | |
379 | { "sta", F3(3, 0x14, 0), F3(~3, ~0x14, ~0)|RS2(~0), "d,[1]A", 0, v6 }, /* sta d,[rs1+%g0] */ | |
493d3e75 KR |
380 | { "sta", F3(3, 0x14, 1), F3(~3, ~0x14, ~1), "d,[1+i]o", 0, v9 }, |
381 | { "sta", F3(3, 0x14, 1), F3(~3, ~0x14, ~1), "d,[i+1]o", 0, v9 }, | |
382 | { "sta", F3(3, 0x14, 1), F3(~3, ~0x14, ~1)|RS1_G0, "d,[i]o", 0, v9 }, | |
383 | { "sta", F3(3, 0x14, 1), F3(~3, ~0x14, ~1)|SIMM13(~0), "d,[1]o", 0, v9 }, /* st d,[rs1+0] */ | |
384 | ||
385 | { "sta", F3(3, 0x34, 0), F3(~3, ~0x34, ~0), "g,[1+2]A", 0, v9 }, | |
386 | { "sta", F3(3, 0x34, 0), F3(~3, ~0x34, ~0)|RS2(~0), "g,[1]A", 0, v9 }, /* sta d,[rs1+%g0] */ | |
387 | { "sta", F3(3, 0x34, 1), F3(~3, ~0x34, ~1), "g,[1+i]o", 0, v9 }, | |
388 | { "sta", F3(3, 0x34, 1), F3(~3, ~0x34, ~1), "g,[i+1]o", 0, v9 }, | |
389 | { "sta", F3(3, 0x34, 1), F3(~3, ~0x34, ~1)|RS1_G0, "g,[i]o", 0, v9 }, | |
390 | { "sta", F3(3, 0x34, 1), F3(~3, ~0x34, ~1)|SIMM13(~0), "g,[1]o", 0, v9 }, /* st d,[rs1+0] */ | |
794a16b0 KR |
391 | |
392 | { "stwa", F3(3, 0x14, 0), F3(~3, ~0x14, ~0), "d,[1+2]A", F_ALIAS, v9 }, | |
393 | { "stwa", F3(3, 0x14, 0), F3(~3, ~0x14, ~0)|RS2(~0), "d,[1]A", F_ALIAS, v9 }, /* sta d,[rs1+%g0] */ | |
493d3e75 KR |
394 | { "stwa", F3(3, 0x14, 1), F3(~3, ~0x14, ~1), "d,[1+i]o", F_ALIAS, v9 }, |
395 | { "stwa", F3(3, 0x14, 1), F3(~3, ~0x14, ~1), "d,[i+1]o", F_ALIAS, v9 }, | |
396 | { "stwa", F3(3, 0x14, 1), F3(~3, ~0x14, ~1)|RS1_G0, "d,[i]o", F_ALIAS, v9 }, | |
397 | { "stwa", F3(3, 0x14, 1), F3(~3, ~0x14, ~1)|SIMM13(~0), "d,[1]o", F_ALIAS, v9 }, /* st d,[rs1+0] */ | |
794a16b0 KR |
398 | |
399 | { "stswa", F3(3, 0x14, 0), F3(~3, ~0x14, ~0), "d,[1+2]A", F_ALIAS, v9 }, | |
400 | { "stswa", F3(3, 0x14, 0), F3(~3, ~0x14, ~0)|RS2(~0), "d,[1]A", F_ALIAS, v9 }, /* sta d,[rs1+%g0] */ | |
493d3e75 KR |
401 | { "stswa", F3(3, 0x14, 1), F3(~3, ~0x14, ~1), "d,[1+i]o", F_ALIAS, v9 }, |
402 | { "stswa", F3(3, 0x14, 1), F3(~3, ~0x14, ~1), "d,[i+1]o", F_ALIAS, v9 }, | |
403 | { "stswa", F3(3, 0x14, 1), F3(~3, ~0x14, ~1)|RS1_G0, "d,[i]o", F_ALIAS, v9 }, | |
404 | { "stswa", F3(3, 0x14, 1), F3(~3, ~0x14, ~1)|SIMM13(~0), "d,[1]o", F_ALIAS, v9 }, /* st d,[rs1+0] */ | |
794a16b0 KR |
405 | |
406 | { "stuwa", F3(3, 0x14, 0), F3(~3, ~0x14, ~0), "d,[1+2]A", F_ALIAS, v9 }, | |
407 | { "stuwa", F3(3, 0x14, 0), F3(~3, ~0x14, ~0)|RS2(~0), "d,[1]A", F_ALIAS, v9 }, /* sta d,[rs1+%g0] */ | |
493d3e75 KR |
408 | { "stuwa", F3(3, 0x14, 1), F3(~3, ~0x14, ~1), "d,[1+i]o", F_ALIAS, v9 }, |
409 | { "stuwa", F3(3, 0x14, 1), F3(~3, ~0x14, ~1), "d,[i+1]o", F_ALIAS, v9 }, | |
410 | { "stuwa", F3(3, 0x14, 1), F3(~3, ~0x14, ~1)|RS1_G0, "d,[i]o", F_ALIAS, v9 }, | |
411 | { "stuwa", F3(3, 0x14, 1), F3(~3, ~0x14, ~1)|SIMM13(~0), "d,[1]o", F_ALIAS, v9 }, /* st d,[rs1+0] */ | |
794a16b0 KR |
412 | |
413 | { "stb", F3(3, 0x05, 0), F3(~3, ~0x05, ~0)|ASI(~0), "d,[1+2]", 0, v6 }, | |
414 | { "stb", F3(3, 0x05, 0), F3(~3, ~0x05, ~0)|ASI_RS2(~0), "d,[1]", 0, v6 }, /* stb d,[rs1+%g0] */ | |
415 | { "stb", F3(3, 0x05, 1), F3(~3, ~0x05, ~1), "d,[1+i]", 0, v6 }, | |
416 | { "stb", F3(3, 0x05, 1), F3(~3, ~0x05, ~1), "d,[i+1]", 0, v6 }, | |
417 | { "stb", F3(3, 0x05, 1), F3(~3, ~0x05, ~1)|RS1_G0, "d,[i]", 0, v6 }, | |
418 | { "stb", F3(3, 0x05, 1), F3(~3, ~0x05, ~1)|SIMM13(~0), "d,[1]", 0, v6 }, /* stb d,[rs1+0] */ | |
419 | ||
420 | { "stub", F3(3, 0x05, 0), F3(~3, ~0x05, ~0)|ASI(~0), "d,[1+2]", F_ALIAS, v9 }, | |
421 | { "stub", F3(3, 0x05, 0), F3(~3, ~0x05, ~0)|ASI_RS2(~0), "d,[1]", F_ALIAS, v9 }, /* stb d,[rs1+%g0] */ | |
422 | { "stub", F3(3, 0x05, 1), F3(~3, ~0x05, ~1), "d,[1+i]", F_ALIAS, v9 }, | |
423 | { "stub", F3(3, 0x05, 1), F3(~3, ~0x05, ~1), "d,[i+1]", F_ALIAS, v9 }, | |
424 | { "stub", F3(3, 0x05, 1), F3(~3, ~0x05, ~1)|RS1_G0, "d,[i]", F_ALIAS, v9 }, | |
425 | { "stub", F3(3, 0x05, 1), F3(~3, ~0x05, ~1)|SIMM13(~0), "d,[1]", F_ALIAS, v9 }, /* stb d,[rs1+0] */ | |
426 | ||
427 | { "stsb", F3(3, 0x05, 0), F3(~3, ~0x05, ~0)|ASI(~0), "d,[1+2]", F_ALIAS, v9 }, | |
428 | { "stsb", F3(3, 0x05, 0), F3(~3, ~0x05, ~0)|ASI_RS2(~0), "d,[1]", F_ALIAS, v9 }, /* stb d,[rs1+%g0] */ | |
429 | { "stsb", F3(3, 0x05, 1), F3(~3, ~0x05, ~1), "d,[1+i]", F_ALIAS, v9 }, | |
430 | { "stsb", F3(3, 0x05, 1), F3(~3, ~0x05, ~1), "d,[i+1]", F_ALIAS, v9 }, | |
431 | { "stsb", F3(3, 0x05, 1), F3(~3, ~0x05, ~1)|RS1_G0, "d,[i]", F_ALIAS, v9 }, | |
432 | { "stsb", F3(3, 0x05, 1), F3(~3, ~0x05, ~1)|SIMM13(~0), "d,[1]", F_ALIAS, v9 }, /* stb d,[rs1+0] */ | |
433 | ||
434 | { "stba", F3(3, 0x15, 0), F3(~3, ~0x15, ~0), "d,[1+2]A", 0, v6 }, | |
435 | { "stba", F3(3, 0x15, 0), F3(~3, ~0x15, ~0)|RS2(~0), "d,[1]A", 0, v6 }, /* stba d,[rs1+%g0] */ | |
493d3e75 KR |
436 | { "stba", F3(3, 0x15, 1), F3(~3, ~0x15, ~1), "d,[1+i]o", 0, v9 }, |
437 | { "stba", F3(3, 0x15, 1), F3(~3, ~0x15, ~1), "d,[i+1]o", 0, v9 }, | |
438 | { "stba", F3(3, 0x15, 1), F3(~3, ~0x15, ~1)|RS1_G0, "d,[i]o", 0, v9 }, | |
439 | { "stba", F3(3, 0x15, 1), F3(~3, ~0x15, ~1)|SIMM13(~0), "d,[1]o", 0, v9 }, /* stb d,[rs1+0] */ | |
794a16b0 KR |
440 | |
441 | { "stsba", F3(3, 0x15, 0), F3(~3, ~0x15, ~0), "d,[1+2]A", F_ALIAS, v9 }, | |
442 | { "stsba", F3(3, 0x15, 0), F3(~3, ~0x15, ~0)|RS2(~0), "d,[1]A", F_ALIAS, v9 }, /* stba d,[rs1+%g0] */ | |
493d3e75 KR |
443 | { "stsba", F3(3, 0x15, 1), F3(~3, ~0x15, ~1), "d,[1+i]o", F_ALIAS, v9 }, |
444 | { "stsba", F3(3, 0x15, 1), F3(~3, ~0x15, ~1), "d,[i+1]o", F_ALIAS, v9 }, | |
445 | { "stsba", F3(3, 0x15, 1), F3(~3, ~0x15, ~1)|RS1_G0, "d,[i]o", F_ALIAS, v9 }, | |
446 | { "stsba", F3(3, 0x15, 1), F3(~3, ~0x15, ~1)|SIMM13(~0), "d,[1]o", F_ALIAS, v9 }, /* stb d,[rs1+0] */ | |
794a16b0 KR |
447 | |
448 | { "stuba", F3(3, 0x15, 0), F3(~3, ~0x15, ~0), "d,[1+2]A", F_ALIAS, v9 }, | |
449 | { "stuba", F3(3, 0x15, 0), F3(~3, ~0x15, ~0)|RS2(~0), "d,[1]A", F_ALIAS, v9 }, /* stba d,[rs1+%g0] */ | |
493d3e75 KR |
450 | { "stuba", F3(3, 0x15, 1), F3(~3, ~0x15, ~1), "d,[1+i]o", F_ALIAS, v9 }, |
451 | { "stuba", F3(3, 0x15, 1), F3(~3, ~0x15, ~1), "d,[i+1]o", F_ALIAS, v9 }, | |
452 | { "stuba", F3(3, 0x15, 1), F3(~3, ~0x15, ~1)|RS1_G0, "d,[i]o", F_ALIAS, v9 }, | |
453 | { "stuba", F3(3, 0x15, 1), F3(~3, ~0x15, ~1)|SIMM13(~0), "d,[1]o", F_ALIAS, v9 }, /* stb d,[rs1+0] */ | |
794a16b0 KR |
454 | |
455 | { "std", F3(3, 0x07, 0), F3(~3, ~0x07, ~0)|ASI(~0), "d,[1+2]", 0, v6 }, | |
456 | { "std", F3(3, 0x07, 0), F3(~3, ~0x07, ~0)|ASI_RS2(~0), "d,[1]", 0, v6 }, /* std d,[rs1+%g0] */ | |
457 | { "std", F3(3, 0x07, 1), F3(~3, ~0x07, ~1), "d,[1+i]", 0, v6 }, | |
458 | { "std", F3(3, 0x07, 1), F3(~3, ~0x07, ~1), "d,[i+1]", 0, v6 }, | |
459 | { "std", F3(3, 0x07, 1), F3(~3, ~0x07, ~1)|RS1_G0, "d,[i]", 0, v6 }, | |
460 | { "std", F3(3, 0x07, 1), F3(~3, ~0x07, ~1)|SIMM13(~0), "d,[1]", 0, v6 }, /* std d,[rs1+0] */ | |
493d3e75 KR |
461 | /* FIXME These are marked F_ALIAS, so that they won't conflict with new v9 |
462 | insns when v9 is present. Otherwise, the F_ALIAS flag is ignored. */ | |
463 | { "std", F3(3, 0x26, 0), F3(~3, ~0x26, ~0)|ASI(~0), "q,[1+2]", F_ALIAS, v6 }, | |
464 | { "std", F3(3, 0x26, 0), F3(~3, ~0x26, ~0)|ASI_RS2(~0), "q,[1]", F_ALIAS, v6 }, /* std d,[rs1+%g0] */ | |
465 | { "std", F3(3, 0x26, 1), F3(~3, ~0x26, ~1), "q,[1+i]", F_ALIAS, v6 }, | |
466 | { "std", F3(3, 0x26, 1), F3(~3, ~0x26, ~1), "q,[i+1]", F_ALIAS, v6 }, | |
467 | { "std", F3(3, 0x26, 1), F3(~3, ~0x26, ~1)|RS1_G0, "q,[i]", F_ALIAS, v6 }, | |
468 | { "std", F3(3, 0x26, 1), F3(~3, ~0x26, ~1)|SIMM13(~0), "q,[1]", F_ALIAS, v6 }, /* std d,[rs1+0] */ | |
469 | { "std", F3(3, 0x27, 0), F3(~3, ~0x27, ~0)|ASI(~0), "H,[1+2]", 0, v6 }, | |
470 | { "std", F3(3, 0x27, 0), F3(~3, ~0x27, ~0)|ASI_RS2(~0), "H,[1]", 0, v6 }, /* std d,[rs1+%g0] */ | |
471 | { "std", F3(3, 0x27, 1), F3(~3, ~0x27, ~1), "H,[1+i]", 0, v6 }, | |
472 | { "std", F3(3, 0x27, 1), F3(~3, ~0x27, ~1), "H,[i+1]", 0, v6 }, | |
473 | { "std", F3(3, 0x27, 1), F3(~3, ~0x27, ~1)|RS1_G0, "H,[i]", 0, v6 }, | |
474 | { "std", F3(3, 0x27, 1), F3(~3, ~0x27, ~1)|SIMM13(~0), "H,[1]", 0, v6 }, /* std d,[rs1+0] */ | |
475 | /* FIXME These are marked F_ALIAS, so that they won't conflict with new v9 | |
476 | insns when v9 is present. Otherwise, the F_ALIAS flag is ignored. */ | |
477 | { "std", F3(3, 0x36, 0), F3(~3, ~0x36, ~0)|ASI(~0), "Q,[1+2]", F_ALIAS, v6 }, | |
478 | { "std", F3(3, 0x36, 0), F3(~3, ~0x36, ~0)|ASI_RS2(~0), "Q,[1]", F_ALIAS, v6 }, /* std d,[rs1+%g0] */ | |
479 | { "std", F3(3, 0x36, 1), F3(~3, ~0x36, ~1), "Q,[1+i]", F_ALIAS, v6 }, | |
480 | { "std", F3(3, 0x36, 1), F3(~3, ~0x36, ~1), "Q,[i+1]", F_ALIAS, v6 }, | |
481 | { "std", F3(3, 0x36, 1), F3(~3, ~0x36, ~1)|RS1_G0, "Q,[i]", F_ALIAS, v6 }, | |
482 | { "std", F3(3, 0x36, 1), F3(~3, ~0x36, ~1)|SIMM13(~0), "Q,[1]", F_ALIAS, v6 }, /* std d,[rs1+0] */ | |
483 | /* FIXME These are marked F_ALIAS, so that they won't conflict with new v9 | |
484 | insns when v9 is present. Otherwise, the F_ALIAS flag is ignored. */ | |
485 | { "std", F3(3, 0x37, 0), F3(~3, ~0x37, ~0)|ASI(~0), "D,[1+2]", F_ALIAS, v6 }, | |
486 | { "std", F3(3, 0x37, 0), F3(~3, ~0x37, ~0)|ASI_RS2(~0), "D,[1]", F_ALIAS, v6 }, /* std d,[rs1+%g0] */ | |
487 | { "std", F3(3, 0x37, 1), F3(~3, ~0x37, ~1), "D,[1+i]", F_ALIAS, v6 }, | |
488 | { "std", F3(3, 0x37, 1), F3(~3, ~0x37, ~1), "D,[i+1]", F_ALIAS, v6 }, | |
489 | { "std", F3(3, 0x37, 1), F3(~3, ~0x37, ~1)|RS1_G0, "D,[i]", F_ALIAS, v6 }, | |
490 | { "std", F3(3, 0x37, 1), F3(~3, ~0x37, ~1)|SIMM13(~0), "D,[1]", F_ALIAS, v6 }, /* std d,[rs1+0] */ | |
794a16b0 KR |
491 | |
492 | { "stda", F3(3, 0x17, 0), F3(~3, ~0x17, ~0), "d,[1+2]A", 0, v6 }, | |
493 | { "stda", F3(3, 0x17, 0), F3(~3, ~0x17, ~0)|RS2(~0), "d,[1]A", 0, v6 }, /* stda d,[rs1+%g0] */ | |
493d3e75 KR |
494 | { "stda", F3(3, 0x17, 1), F3(~3, ~0x17, ~1), "d,[1+i]o", 0, v9 }, |
495 | { "stda", F3(3, 0x17, 1), F3(~3, ~0x17, ~1), "d,[i+1]o", 0, v9 }, | |
496 | { "stda", F3(3, 0x17, 1), F3(~3, ~0x17, ~1)|RS1_G0, "d,[i]o", 0, v9 }, | |
497 | { "stda", F3(3, 0x17, 1), F3(~3, ~0x17, ~1)|SIMM13(~0), "d,[1]o", 0, v9 }, /* std d,[rs1+0] */ | |
498 | { "stda", F3(3, 0x37, 0), F3(~3, ~0x37, ~0), "H,[1+2]A", 0, v9 }, | |
499 | { "stda", F3(3, 0x37, 0), F3(~3, ~0x37, ~0)|RS2(~0), "H,[1]A", 0, v9 }, /* stda d,[rs1+%g0] */ | |
500 | { "stda", F3(3, 0x37, 1), F3(~3, ~0x37, ~1), "H,[1+i]o", 0, v9 }, | |
501 | { "stda", F3(3, 0x37, 1), F3(~3, ~0x37, ~1), "H,[i+1]o", 0, v9 }, | |
502 | { "stda", F3(3, 0x37, 1), F3(~3, ~0x37, ~1)|RS1_G0, "H,[i]o", 0, v9 }, | |
503 | { "stda", F3(3, 0x37, 1), F3(~3, ~0x37, ~1)|SIMM13(~0), "H,[1]o", 0, v9 }, /* std d,[rs1+0] */ | |
794a16b0 KR |
504 | |
505 | { "sth", F3(3, 0x06, 0), F3(~3, ~0x06, ~0)|ASI(~0), "d,[1+2]", 0, v6 }, | |
506 | { "sth", F3(3, 0x06, 0), F3(~3, ~0x06, ~0)|ASI_RS2(~0), "d,[1]", 0, v6 }, /* sth d,[rs1+%g0] */ | |
507 | { "sth", F3(3, 0x06, 1), F3(~3, ~0x06, ~1), "d,[1+i]", 0, v6 }, | |
508 | { "sth", F3(3, 0x06, 1), F3(~3, ~0x06, ~1), "d,[i+1]", 0, v6 }, | |
509 | { "sth", F3(3, 0x06, 1), F3(~3, ~0x06, ~1)|RS1_G0, "d,[i]", 0, v6 }, | |
510 | { "sth", F3(3, 0x06, 1), F3(~3, ~0x06, ~1)|SIMM13(~0), "d,[1]", 0, v6 }, /* sth d,[+] */ | |
511 | ||
512 | { "stsh", F3(3, 0x06, 0), F3(~3, ~0x06, ~0)|ASI(~0), "d,[1+2]", F_ALIAS, v9 }, | |
513 | { "stsh", F3(3, 0x06, 0), F3(~3, ~0x06, ~0)|ASI_RS2(~0), "d,[1]", F_ALIAS, v9 }, /* sth d,[rs1+%g0] */ | |
514 | { "stsh", F3(3, 0x06, 1), F3(~3, ~0x06, ~1), "d,[1+i]", F_ALIAS, v9 }, | |
515 | { "stsh", F3(3, 0x06, 1), F3(~3, ~0x06, ~1), "d,[i+1]", F_ALIAS, v9 }, | |
516 | { "stsh", F3(3, 0x06, 1), F3(~3, ~0x06, ~1)|RS1_G0, "d,[i]", F_ALIAS, v9 }, | |
517 | { "stsh", F3(3, 0x06, 1), F3(~3, ~0x06, ~1)|SIMM13(~0), "d,[1]", F_ALIAS, v9 }, /* sth d,[rs1+0] */ | |
518 | ||
519 | { "stuh", F3(3, 0x06, 0), F3(~3, ~0x06, ~0)|ASI(~0), "d,[1+2]", F_ALIAS, v9 }, | |
520 | { "stuh", F3(3, 0x06, 0), F3(~3, ~0x06, ~0)|ASI_RS2(~0), "d,[1]", F_ALIAS, v9 }, /* sth d,[rs1+%g0] */ | |
521 | { "stuh", F3(3, 0x06, 1), F3(~3, ~0x06, ~1), "d,[1+i]", F_ALIAS, v9 }, | |
522 | { "stuh", F3(3, 0x06, 1), F3(~3, ~0x06, ~1), "d,[i+1]", F_ALIAS, v9 }, | |
523 | { "stuh", F3(3, 0x06, 1), F3(~3, ~0x06, ~1)|RS1_G0, "d,[i]", F_ALIAS, v9 }, | |
524 | { "stuh", F3(3, 0x06, 1), F3(~3, ~0x06, ~1)|SIMM13(~0), "d,[1]", F_ALIAS, v9 }, /* sth d,[rs1+0] */ | |
525 | ||
526 | { "stha", F3(3, 0x16, 0), F3(~3, ~0x16, ~0), "d,[1+2]A", 0, v6 }, | |
527 | { "stha", F3(3, 0x16, 0), F3(~3, ~0x16, ~0)|RS2(~0), "d,[1]A", 0, v6 }, /* stha ,[+%] */ | |
493d3e75 KR |
528 | { "stha", F3(3, 0x16, 1), F3(~3, ~0x16, ~1), "d,[1+i]o", 0, v9 }, |
529 | { "stha", F3(3, 0x16, 1), F3(~3, ~0x16, ~1), "d,[i+1]o", 0, v9 }, | |
530 | { "stha", F3(3, 0x16, 1), F3(~3, ~0x16, ~1)|RS1_G0, "d,[i]o", 0, v9 }, | |
531 | { "stha", F3(3, 0x16, 1), F3(~3, ~0x16, ~1)|SIMM13(~0), "d,[1]o", 0, v9 }, /* sth d,[+] */ | |
794a16b0 KR |
532 | |
533 | { "stsha", F3(3, 0x16, 0), F3(~3, ~0x16, ~0), "d,[1+2]A", F_ALIAS, v9 }, | |
534 | { "stsha", F3(3, 0x16, 0), F3(~3, ~0x16, ~0)|RS2(~0), "d,[1]A", F_ALIAS, v9 }, /* stha d,[rs1+%g0] */ | |
493d3e75 KR |
535 | { "stsha", F3(3, 0x16, 1), F3(~3, ~0x16, ~1), "d,[1+i]o", F_ALIAS, v9 }, |
536 | { "stsha", F3(3, 0x16, 1), F3(~3, ~0x16, ~1), "d,[i+1]o", F_ALIAS, v9 }, | |
537 | { "stsha", F3(3, 0x16, 1), F3(~3, ~0x16, ~1)|RS1_G0, "d,[i]o", F_ALIAS, v9 }, | |
538 | { "stsha", F3(3, 0x16, 1), F3(~3, ~0x16, ~1)|SIMM13(~0), "d,[1]o", F_ALIAS, v9 }, /* sth d,[+] */ | |
794a16b0 KR |
539 | |
540 | { "stuha", F3(3, 0x16, 0), F3(~3, ~0x16, ~0), "d,[1+2]A", F_ALIAS, v9 }, | |
541 | { "stuha", F3(3, 0x16, 0), F3(~3, ~0x16, ~0)|RS2(~0), "d,[1]A", F_ALIAS, v9 }, /* stha d,[rs1+%g0] */ | |
493d3e75 KR |
542 | { "stuha", F3(3, 0x16, 1), F3(~3, ~0x16, ~1), "d,[1+i]o", F_ALIAS, v9 }, |
543 | { "stuha", F3(3, 0x16, 1), F3(~3, ~0x16, ~1), "d,[i+1]o", F_ALIAS, v9 }, | |
544 | { "stuha", F3(3, 0x16, 1), F3(~3, ~0x16, ~1)|RS1_G0, "d,[i]o", F_ALIAS, v9 }, | |
545 | { "stuha", F3(3, 0x16, 1), F3(~3, ~0x16, ~1)|SIMM13(~0), "d,[1]o", F_ALIAS, v9 }, /* sth d,[+] */ | |
546 | ||
547 | { "stx", F3(3, 0x0e, 0), F3(~3, ~0x0e, ~0)|ASI(~0), "d,[1+2]", 0, v9 }, | |
548 | { "stx", F3(3, 0x0e, 0), F3(~3, ~0x0e, ~0)|ASI_RS2(~0), "d,[1]", 0, v9 }, /* stx d,[rs1+%g0] */ | |
549 | { "stx", F3(3, 0x0e, 1), F3(~3, ~0x0e, ~1), "d,[1+i]", 0, v9 }, | |
550 | { "stx", F3(3, 0x0e, 1), F3(~3, ~0x0e, ~1), "d,[i+1]", 0, v9 }, | |
551 | { "stx", F3(3, 0x0e, 1), F3(~3, ~0x0e, ~1)|RS1_G0, "d,[i]", 0, v9 }, | |
552 | { "stx", F3(3, 0x0e, 1), F3(~3, ~0x0e, ~1)|SIMM13(~0), "d,[1]", 0, v9 }, /* stx d,[rs1+0] */ | |
553 | ||
554 | { "stx", F3(3, 0x25, 0)|RD(1), F3(~3, ~0x25, ~0)|ASI(~0)|RD(~1), "F,[1+2]", 0, v9 }, | |
555 | { "stx", F3(3, 0x25, 0)|RD(1), F3(~3, ~0x25, ~0)|ASI_RS2(~0)|RD(~1),"F,[1]", 0, v9 }, /* st d,[rs1+%g0] */ | |
556 | { "stx", F3(3, 0x25, 1)|RD(1), F3(~3, ~0x25, ~1)|RD(~1), "F,[1+i]", 0, v9 }, | |
557 | { "stx", F3(3, 0x25, 1)|RD(1), F3(~3, ~0x25, ~1)|RD(~1), "F,[i+1]", 0, v9 }, | |
558 | { "stx", F3(3, 0x25, 1)|RD(1), F3(~3, ~0x25, ~1)|RS1_G0|RD(~1), "F,[i]", 0, v9 }, | |
559 | { "stx", F3(3, 0x25, 1)|RD(1), F3(~3, ~0x25, ~1)|SIMM13(~0)|RD(~1),"F,[1]", 0, v9 }, /* st d,[rs1+0] */ | |
794a16b0 KR |
560 | |
561 | { "stxa", F3(3, 0x1e, 0), F3(~3, ~0x1e, ~0), "d,[1+2]A", 0, v9 }, | |
562 | { "stxa", F3(3, 0x1e, 0), F3(~3, ~0x1e, ~0)|RS2(~0), "d,[1]A", 0, v9 }, /* stha d,[rs1+%g0] */ | |
493d3e75 KR |
563 | { "stxa", F3(3, 0x1e, 1), F3(~3, ~0x1e, ~1), "d,[1+i]o", 0, v9 }, |
564 | { "stxa", F3(3, 0x1e, 1), F3(~3, ~0x1e, ~1), "d,[i+1]o", 0, v9 }, | |
565 | { "stxa", F3(3, 0x1e, 1), F3(~3, ~0x1e, ~1)|RS1_G0, "d,[i]o", 0, v9 }, | |
566 | { "stxa", F3(3, 0x1e, 1), F3(~3, ~0x1e, ~1)|SIMM13(~0), "d,[1]o", 0, v9 }, /* stx d,[rs1+0] */ | |
567 | ||
568 | { "stq", F3(3, 0x26, 0), F3(~3, ~0x26, ~0)|ASI(~0), "J,[1+2]", 0, v9 }, | |
569 | { "stq", F3(3, 0x26, 0), F3(~3, ~0x26, ~0)|ASI_RS2(~0), "J,[1]", 0, v9 }, /* st d[rs1+%g0] */ | |
570 | { "stq", F3(3, 0x26, 1), F3(~3, ~0x26, ~1), "J,[1+i]", 0, v9 }, | |
571 | { "stq", F3(3, 0x26, 1), F3(~3, ~0x26, ~1), "J,[i+1]", 0, v9 }, | |
572 | { "stq", F3(3, 0x26, 1), F3(~3, ~0x26, ~1)|RS1_G0, "J,[i]", 0, v9 }, | |
573 | { "stq", F3(3, 0x26, 1), F3(~3, ~0x26, ~1)|SIMM13(~0), "J,[1]", 0, v9 }, /* st d,[rs1+0] */ | |
574 | ||
575 | { "stqa", F3(3, 0x36, 0), F3(~3, ~0x36, ~0)|ASI(~0), "J,[1+2]A", 0, v9 }, | |
576 | { "stqa", F3(3, 0x36, 0), F3(~3, ~0x36, ~0)|ASI_RS2(~0), "J,[1]A", 0, v9 }, /* st d[rs1+%g0] */ | |
577 | { "stqa", F3(3, 0x36, 1), F3(~3, ~0x36, ~1), "J,[1+i]o", 0, v9 }, | |
578 | { "stqa", F3(3, 0x36, 1), F3(~3, ~0x36, ~1), "J,[i+1]o", 0, v9 }, | |
579 | { "stqa", F3(3, 0x36, 1), F3(~3, ~0x36, ~1)|RS1_G0, "J,[i]o", 0, v9 }, | |
580 | { "stqa", F3(3, 0x36, 1), F3(~3, ~0x36, ~1)|SIMM13(~0), "J,[1]o", 0, v9 }, /* st d,[rs1+0] */ | |
794a16b0 KR |
581 | |
582 | { "swap", F3(3, 0x0f, 0), F3(~3, ~0x0f, ~0)|ASI(~0), "[1+2],d", 0, v7 }, | |
583 | { "swap", F3(3, 0x0f, 0), F3(~3, ~0x0f, ~0)|ASI_RS2(~0), "[1],d", 0, v7 }, /* swap [rs1+%g0],d */ | |
584 | { "swap", F3(3, 0x0f, 1), F3(~3, ~0x0f, ~1), "[1+i],d", 0, v7 }, | |
585 | { "swap", F3(3, 0x0f, 1), F3(~3, ~0x0f, ~1), "[i+1],d", 0, v7 }, | |
586 | { "swap", F3(3, 0x0f, 1), F3(~3, ~0x0f, ~1)|RS1_G0, "[i],d", 0, v7 }, | |
587 | { "swap", F3(3, 0x0f, 1), F3(~3, ~0x0f, ~1)|SIMM13(~0), "[1],d", 0, v7 }, /* swap [rs1+0],d */ | |
588 | ||
589 | { "swapa", F3(3, 0x1f, 0), F3(~3, ~0x1f, ~0), "[1+2]A,d", 0, v7 }, | |
590 | { "swapa", F3(3, 0x1f, 0), F3(~3, ~0x1f, ~0)|RS2(~0), "[1]A,d", 0, v7 }, /* swapa [rs1+%g0],d */ | |
493d3e75 KR |
591 | { "swapa", F3(3, 0x1f, 1), F3(~3, ~0x1f, ~1), "[1+i]o,d", 0, v9 }, |
592 | { "swapa", F3(3, 0x1f, 1), F3(~3, ~0x1f, ~1), "[i+1]o,d", 0, v9 }, | |
593 | { "swapa", F3(3, 0x1f, 1), F3(~3, ~0x1f, ~1)|RS1_G0, "[i]o,d", 0, v9 }, | |
594 | { "swapa", F3(3, 0x1f, 1), F3(~3, ~0x1f, ~1)|SIMM13(~0), "[1]o,d", 0, v9 }, /* swap [rs1+0],d */ | |
794a16b0 KR |
595 | |
596 | { "restore", F3(2, 0x3d, 0), F3(~2, ~0x3d, ~0)|ASI(~0), "1,2,d", 0, v6 }, | |
597 | { "restore", F3(2, 0x3d, 0), F3(~2, ~0x3d, ~0)|RD_G0|RS1_G0|ASI_RS2(~0), "", 0, v6 }, /* restore %g0,%g0,%g0 */ | |
598 | { "restore", F3(2, 0x3d, 1), F3(~2, ~0x3d, ~1), "1,i,d", 0, v6 }, | |
599 | { "restore", F3(2, 0x3d, 1), F3(~2, ~0x3d, ~1)|RD_G0|RS1_G0|SIMM13(~0), "", 0, v6 }, /* restore %g0,0,%g0 */ | |
600 | ||
601 | { "rett", F3(2, 0x39, 0), F3(~2, ~0x39, ~0)|RD_G0|ASI(~0), "1+2", F_DELAYED, v6 }, /* rett rs1+rs2 */ | |
602 | { "rett", F3(2, 0x39, 0), F3(~2, ~0x39, ~0)|RD_G0|ASI_RS2(~0), "1", F_DELAYED, v6 }, /* rett rs1,%g0 */ | |
603 | { "rett", F3(2, 0x39, 1), F3(~2, ~0x39, ~1)|RD_G0, "1+i", F_DELAYED, v6 }, /* rett rs1+X */ | |
604 | { "rett", F3(2, 0x39, 1), F3(~2, ~0x39, ~1)|RD_G0, "i+1", F_DELAYED, v6 }, /* rett X+rs1 */ | |
605 | { "rett", F3(2, 0x39, 1), F3(~2, ~0x39, ~1)|RD_G0|RS1_G0,"i", F_DELAYED, v6 }, /* rett X+rs1 */ | |
606 | { "rett", F3(2, 0x39, 1), F3(~2, ~0x39, ~1)|RD_G0|RS1_G0, "i", F_DELAYED, v6 }, /* rett X */ | |
607 | { "rett", F3(2, 0x39, 1), F3(~2, ~0x39, ~1)|RD_G0|SIMM13(~0), "1", F_DELAYED, v6 }, /* rett rs1+0 */ | |
608 | ||
609 | { "save", F3(2, 0x3c, 0), F3(~2, ~0x3c, ~0)|ASI(~0), "1,2,d", 0, v6 }, | |
610 | { "save", F3(2, 0x3c, 1), F3(~2, ~0x3c, ~1), "1,i,d", 0, v6 }, | |
611 | { "save", 0x81e00000, ~0x81e00000, "", F_ALIAS, v6 }, | |
612 | ||
613 | { "ret", F3(2, 0x38, 1)|RS1(0x1f)|SIMM13(8), F3(~2, ~0x38, ~1)|SIMM13(~8), "", F_DELAYED, v6 }, /* jmpl %i7+8,%g0 */ | |
614 | { "retl", F3(2, 0x38, 1)|RS1(0x0f)|SIMM13(8), F3(~2, ~0x38, ~1)|RS1(~0x0f)|SIMM13(~8), "", F_DELAYED, v6 }, /* jmpl %o7+8,%g0 */ | |
615 | ||
616 | { "jmpl", F3(2, 0x38, 0), F3(~2, ~0x38, ~0)|ASI(~0), "1+2,d", F_DELAYED, v6 }, | |
617 | { "jmpl", F3(2, 0x38, 0), F3(~2, ~0x38, ~0)|ASI_RS2(~0), "1,d", F_DELAYED, v6 }, /* jmpl rs1+%g0,d */ | |
618 | { "jmpl", F3(2, 0x38, 1), F3(~2, ~0x38, ~1)|SIMM13(~0), "1,d", F_DELAYED, v6 }, /* jmpl rs1+0,d */ | |
619 | { "jmpl", F3(2, 0x38, 1), F3(~2, ~0x38, ~1)|RS1_G0, "i,d", F_DELAYED, v6 }, /* jmpl %g0+i,d */ | |
620 | { "jmpl", F3(2, 0x38, 1), F3(~2, ~0x38, ~1), "1+i,d", F_DELAYED, v6 }, | |
621 | { "jmpl", F3(2, 0x38, 1), F3(~2, ~0x38, ~1), "i+1,d", F_DELAYED, v6 }, | |
622 | ||
623 | { "done", F3(2, 0x3e, 1)|RD(0), F3(~2, ~0x3e, ~1)|RD(~0)|RS1_G0|SIMM13(~0), "", 0, v9 }, | |
624 | { "retry", F3(2, 0x3e, 1)|RD(1), F3(~2, ~0x3e, ~1)|RD(~1)|RS1_G0|SIMM13(~0), "", 0, v9 }, | |
625 | { "saved", F3(2, 0x31, 1)|RD(0), F3(~2, ~0x31, ~1)|RD(~0)|RS1_G0|SIMM13(~0), "", 0, v9 }, | |
626 | { "restored", F3(2, 0x31, 1)|RD(1), F3(~2, ~0x31, ~1)|RD(~1)|RS1_G0|SIMM13(~0), "", 0, v9 }, | |
627 | { "sigm", F3(2, 0x30, 0)|RD(0xf), F3(~2, ~0x30, ~0)|RD(~0xf)|RS1_G0|SIMM13(~0), "", 0, v9 }, | |
628 | ||
493d3e75 KR |
629 | { "flush", F3(2, 0x3b, 0), F3(~2, ~0x3b, ~0)|ASI(~0), "1+2", 0, v8 }, |
630 | { "flush", F3(2, 0x3b, 0), F3(~2, ~0x3b, ~0)|ASI_RS2(~0), "1", 0, v8 }, /* flush rs1+%g0 */ | |
631 | { "flush", F3(2, 0x3b, 1), F3(~2, ~0x3b, ~1)|SIMM13(~0), "1", 0, v8 }, /* flush rs1+0 */ | |
632 | { "flush", F3(2, 0x3b, 1), F3(~2, ~0x3b, ~1)|RS1_G0, "i", 0, v8 }, /* flush %g0+i */ | |
633 | { "flush", F3(2, 0x3b, 1), F3(~2, ~0x3b, ~1), "1+i", 0, v8 }, | |
634 | { "flush", F3(2, 0x3b, 1), F3(~2, ~0x3b, ~1), "i+1", 0, v8 }, | |
635 | ||
636 | /* IFLUSH was renamed to FLUSH in v8. */ | |
637 | { "iflush", F3(2, 0x3b, 0), F3(~2, ~0x3b, ~0)|ASI(~0), "1+2", F_ALIAS, v6 }, | |
638 | { "iflush", F3(2, 0x3b, 0), F3(~2, ~0x3b, ~0)|ASI_RS2(~0), "1", F_ALIAS, v6 }, /* flush rs1+%g0 */ | |
639 | { "iflush", F3(2, 0x3b, 1), F3(~2, ~0x3b, ~1)|SIMM13(~0), "1", F_ALIAS, v6 }, /* flush rs1+0 */ | |
640 | { "iflush", F3(2, 0x3b, 1), F3(~2, ~0x3b, ~1)|RS1_G0, "i", F_ALIAS, v6 }, | |
641 | { "iflush", F3(2, 0x3b, 1), F3(~2, ~0x3b, ~1), "1+i", F_ALIAS, v6 }, | |
642 | { "iflush", F3(2, 0x3b, 1), F3(~2, ~0x3b, ~1), "i+1", F_ALIAS, v6 }, | |
794a16b0 KR |
643 | |
644 | { "return", F3(2, 0x39, 0), F3(~2, ~0x39, ~0)|ASI(~0), "1+2", 0, v9 }, | |
645 | { "return", F3(2, 0x39, 0), F3(~2, ~0x39, ~0)|ASI_RS2(~0), "1", 0, v9 }, /* return rs1+%g0 */ | |
646 | { "return", F3(2, 0x39, 1), F3(~2, ~0x39, ~1)|SIMM13(~0), "1", 0, v9 }, /* return rs1+0 */ | |
647 | { "return", F3(2, 0x39, 1), F3(~2, ~0x39, ~1)|RS1_G0, "i", 0, v9 }, /* return %g0+i */ | |
648 | { "return", F3(2, 0x39, 1), F3(~2, ~0x39, ~1), "1+i", 0, v9 }, | |
649 | { "return", F3(2, 0x39, 1), F3(~2, ~0x39, ~1), "i+1", 0, v9 }, | |
650 | ||
651 | { "flushw", F3(2, 0x2b, 0), F3(~2, ~0x2b, ~0)|RD_G0|RS1_G0|ASI_RS2(~0), "", 0, v9 }, | |
652 | ||
653 | { "membar", F3(2, 0x28, 1)|RS1(0xf), F3(~2, ~0x28, ~1)|RD_G0|RS1(~0xf)|ASI(~0), "K", 0, v9 }, | |
493d3e75 | 654 | { "stbar", F3(2, 0x28, 0)|RS1(0xf), F3(~2, ~0x28, ~0)|RD_G0|RS1(~0xf)|SIMM13(~0), "", 0, v8 }, |
794a16b0 KR |
655 | |
656 | { "prefetch", F3(3, 0x2d, 0), F3(~3, ~0x2d, ~0), "[1+2],*", 0, v9 }, | |
657 | { "prefetch", F3(3, 0x2d, 0), F3(~3, ~0x2d, ~0)|RS2_G0, "[1],*", 0, v9 }, /* prefetch [rs1+%g0],prefetch_fcn */ | |
658 | { "prefetch", F3(3, 0x2d, 1), F3(~3, ~0x2d, ~1), "[1+i],*", 0, v9 }, | |
659 | { "prefetch", F3(3, 0x2d, 1), F3(~3, ~0x2d, ~1), "[i+1],*", 0, v9 }, | |
660 | { "prefetch", F3(3, 0x2d, 1), F3(~3, ~0x2d, ~1)|RS1_G0, "[i],*", 0, v9 }, | |
661 | { "prefetch", F3(3, 0x2d, 1), F3(~3, ~0x2d, ~1)|SIMM13(~0), "[1],*", 0, v9 }, /* prefetch [rs1+0],prefetch_fcn */ | |
662 | { "prefetcha", F3(3, 0x3d, 0), F3(~3, ~0x3d, ~0), "[1+2]A,*", 0, v9 }, | |
663 | { "prefetcha", F3(3, 0x3d, 0), F3(~3, ~0x3d, ~0)|RS2_G0, "[1]A,*", 0, v9 }, /* prefetcha [rs1+%g0],prefetch_fcn */ | |
493d3e75 KR |
664 | { "prefetcha", F3(3, 0x3d, 1), F3(~3, ~0x3d, ~1), "[1+i]o,d", 0, v9 }, |
665 | { "prefetcha", F3(3, 0x3d, 1), F3(~3, ~0x3d, ~1), "[i+1]o,d", 0, v9 }, | |
666 | { "prefetcha", F3(3, 0x3d, 1), F3(~3, ~0x3d, ~1)|RS1_G0, "[i]o,d", 0, v9 }, | |
667 | { "prefetcha", F3(3, 0x3d, 1), F3(~3, ~0x3d, ~1)|SIMM13(~0), "[1]o,d", 0, v9 }, /* prefetcha [rs1+0],d */ | |
794a16b0 KR |
668 | |
669 | /* The 1<<12 is a long story. It is necessary. For more info, please contact rich@cygnus.com */ | |
670 | { "sll", F3(2, 0x25, 0), F3(~2, ~0x25, ~0)|(1<<12)|ASI(~0), "1,2,d", 0, v6 }, | |
671 | { "sll", F3(2, 0x25, 1), F3(~2, ~0x25, ~1)|(1<<12), "1,i,d", 0, v6 }, | |
672 | { "sra", F3(2, 0x27, 0), F3(~2, ~0x27, ~0)|(1<<12)|ASI(~0), "1,2,d", 0, v6 }, | |
673 | { "sra", F3(2, 0x27, 1), F3(~2, ~0x27, ~1)|(1<<12), "1,i,d", 0, v6 }, | |
674 | { "srl", F3(2, 0x26, 0), F3(~2, ~0x26, ~0)|(1<<12)|ASI(~0), "1,2,d", 0, v6 }, | |
675 | { "srl", F3(2, 0x26, 1), F3(~2, ~0x26, ~1)|(1<<12), "1,i,d", 0, v6 }, | |
676 | ||
794a16b0 KR |
677 | { "sllx", F3(2, 0x25, 0)|(1<<12), F3(~2, ~0x25, ~0)|(ASI(~0)^(1<<12)), "1,2,d", 0, v9 }, |
678 | { "sllx", F3(2, 0x25, 1)|(1<<12), F3(~2, ~0x25, ~1), "1,i,d", 0, v9 }, | |
679 | { "srax", F3(2, 0x27, 0)|(1<<12), F3(~2, ~0x27, ~0)|(ASI(~0)^(1<<12)), "1,2,d", 0, v9 }, | |
680 | { "srax", F3(2, 0x27, 1)|(1<<12), F3(~2, ~0x27, ~1), "1,i,d", 0, v9 }, | |
681 | { "srlx", F3(2, 0x26, 0)|(1<<12), F3(~2, ~0x26, ~0)|(ASI(~0)^(1<<12)), "1,2,d", 0, v9 }, | |
682 | { "srlx", F3(2, 0x26, 1)|(1<<12), F3(~2, ~0x26, ~1), "1,i,d", 0, v9 }, | |
683 | ||
684 | { "mulscc", F3(2, 0x24, 0), F3(~2, ~0x24, ~0)|ASI(~0), "1,2,d", 0, v6 }, | |
685 | { "mulscc", F3(2, 0x24, 1), F3(~2, ~0x24, ~1), "1,i,d", 0, v6 }, | |
686 | ||
687 | { "divscc", F3(2, 0x1d, 0), F3(~2, ~0x1d, ~0)|ASI(~0), "1,2,d", 0, sparclite }, | |
688 | { "divscc", F3(2, 0x1d, 1), F3(~2, ~0x1d, ~1), "1,i,d", 0, sparclite }, | |
689 | ||
690 | { "scan", F3(2, 0x2c, 0), F3(~2, ~0x2c, ~0)|ASI(~0), "1,2,d", 0, sparclite }, | |
691 | { "scan", F3(2, 0x2c, 1), F3(~2, ~0x2c, ~1), "1,i,d", 0, sparclite }, | |
692 | ||
493d3e75 KR |
693 | { "popc", F3(2, 0x2e, 0), F3(~2, ~0x2e, ~0)|RS2_G0|ASI(~0),"2,d", 0, v9 }, |
694 | { "popc", F3(2, 0x2e, 1), F3(~2, ~0x2e, ~1)|RS2_G0, "i,d", 0, v9 }, | |
695 | ||
794a16b0 KR |
696 | { "clr", F3(2, 0x02, 0), F3(~2, ~0x02, ~0)|RD_G0|RS1_G0|ASI_RS2(~0), "d", F_ALIAS, v6 }, /* or %g0,%g0,d */ |
697 | { "clr", F3(2, 0x02, 1), F3(~2, ~0x02, ~1)|RS1_G0|SIMM13(~0), "d", F_ALIAS, v6 }, /* or %g0,0,d */ | |
698 | { "clr", F3(3, 0x04, 0), F3(~3, ~0x04, ~0)|RD_G0|ASI(~0), "[1+2]", F_ALIAS, v6 }, | |
699 | { "clr", F3(3, 0x04, 0), F3(~3, ~0x04, ~0)|RD_G0|ASI_RS2(~0), "[1]", F_ALIAS, v6 }, /* st %g0,[rs1+%g0] */ | |
700 | { "clr", F3(3, 0x04, 1), F3(~3, ~0x04, ~1)|RD_G0, "[1+i]", F_ALIAS, v6 }, | |
701 | { "clr", F3(3, 0x04, 1), F3(~3, ~0x04, ~1)|RD_G0, "[i+1]", F_ALIAS, v6 }, | |
702 | { "clr", F3(3, 0x04, 1), F3(~3, ~0x04, ~1)|RD_G0|RS1_G0, "[i]", F_ALIAS, v6 }, | |
703 | { "clr", F3(3, 0x04, 1), F3(~3, ~0x04, ~1)|RD_G0|SIMM13(~0), "[1]", F_ALIAS, v6 }, /* st %g0,[rs1+0] */ | |
704 | ||
705 | { "clrb", F3(3, 0x05, 0), F3(~3, ~0x05, ~0)|RD_G0|ASI(~0), "[1+2]", F_ALIAS, v6 }, | |
706 | { "clrb", F3(3, 0x05, 0), F3(~3, ~0x05, ~0)|RD_G0|ASI_RS2(~0), "[1]", F_ALIAS, v6 }, /* stb %g0,[rs1+%g0] */ | |
707 | { "clrb", F3(3, 0x05, 1), F3(~3, ~0x05, ~1)|RD_G0, "[1+i]", F_ALIAS, v6 }, | |
708 | { "clrb", F3(3, 0x05, 1), F3(~3, ~0x05, ~1)|RD_G0, "[i+1]", F_ALIAS, v6 }, | |
709 | { "clrb", F3(3, 0x05, 1), F3(~3, ~0x05, ~1)|RD_G0|RS1_G0, "[i]", F_ALIAS, v6 }, | |
493d3e75 | 710 | { "clrb", F3(3, 0x05, 1), F3(~3, ~0x05, ~1)|RD_G0|SIMM13(~0), "[1]", F_ALIAS, v6 }, /* clrb [rs1+0],d */ |
794a16b0 KR |
711 | |
712 | { "clrh", F3(3, 0x06, 0), F3(~3, ~0x06, ~0)|RD_G0|ASI(~0), "[1+2]", F_ALIAS, v6 }, | |
713 | { "clrh", F3(3, 0x06, 0), F3(~3, ~0x06, ~0)|RD_G0|ASI_RS2(~0), "[1]", F_ALIAS, v6 }, /* sth %g0,[rs1+%g0] */ | |
714 | { "clrh", F3(3, 0x06, 1), F3(~3, ~0x06, ~1)|RD_G0, "[1+i]", F_ALIAS, v6 }, | |
715 | { "clrh", F3(3, 0x06, 1), F3(~3, ~0x06, ~1)|RD_G0, "[i+1]", F_ALIAS, v6 }, | |
716 | { "clrh", F3(3, 0x06, 1), F3(~3, ~0x06, ~1)|RD_G0|RS1_G0, "[i]", F_ALIAS, v6 }, | |
493d3e75 | 717 | { "clrh", F3(3, 0x06, 1), F3(~3, ~0x06, ~1)|RD_G0|SIMM13(~0), "[1]", F_ALIAS, v6 }, /* clrb [rs1+0],d */ |
794a16b0 KR |
718 | |
719 | { "orcc", F3(2, 0x12, 0), F3(~2, ~0x12, ~0)|ASI(~0), "1,2,d", 0, v6 }, | |
720 | { "orcc", F3(2, 0x12, 1), F3(~2, ~0x12, ~1), "1,i,d", 0, v6 }, | |
721 | { "orcc", F3(2, 0x12, 1), F3(~2, ~0x12, ~1), "i,1,d", 0, v6 }, | |
722 | ||
493d3e75 | 723 | /* This is not a commutative instruction. */ |
794a16b0 KR |
724 | { "orncc", F3(2, 0x16, 0), F3(~2, ~0x16, ~0)|ASI(~0), "1,2,d", 0, v6 }, |
725 | { "orncc", F3(2, 0x16, 1), F3(~2, ~0x16, ~1), "1,i,d", 0, v6 }, | |
794a16b0 | 726 | |
493d3e75 | 727 | /* This is not a commutative instruction. */ |
794a16b0 KR |
728 | { "orn", F3(2, 0x06, 0), F3(~2, ~0x06, ~0)|ASI(~0), "1,2,d", 0, v6 }, |
729 | { "orn", F3(2, 0x06, 1), F3(~2, ~0x06, ~1), "1,i,d", 0, v6 }, | |
794a16b0 KR |
730 | |
731 | { "tst", F3(2, 0x12, 0), F3(~2, ~0x12, ~0)|RD_G0|ASI_RS2(~0), "1", 0, v6 }, /* orcc rs1, %g0, %g0 */ | |
732 | { "tst", F3(2, 0x12, 0), F3(~2, ~0x12, ~0)|RD_G0|RS1_G0|ASI(~0), "2", 0, v6 }, /* orcc %g0, rs2, %g0 */ | |
733 | { "tst", F3(2, 0x12, 1), F3(~2, ~0x12, ~1)|RD_G0|SIMM13(~0), "1", 0, v6 }, /* orcc rs1, 0, %g0 */ | |
734 | ||
735 | { "wr", F3(2, 0x30, 0), F3(~2, ~0x30, ~0)|ASI(~0), "1,2,m", 0, v8 }, /* wr r,r,%asrX */ | |
736 | { "wr", F3(2, 0x30, 0), F3(~2, ~0x30, ~0)|RD_G0|ASI(~0), "1,2,y", 0, v6 }, /* wr r,r,%y */ | |
737 | { "wr", F3(2, 0x30, 1), F3(~2, ~0x30, ~1), "1,i,m", 0, v8 }, /* wr r,i,%asrX */ | |
738 | { "wr", F3(2, 0x30, 1), F3(~2, ~0x30, ~1)|RD_G0, "1,i,y", 0, v6 }, /* wr r,i,%y */ | |
739 | { "wr", F3(2, 0x31, 0), F3(~2, ~0x31, ~0)|RD_G0|ASI(~0), "1,2,p", 0, v6 }, /* wr r,r,%psr */ | |
740 | { "wr", F3(2, 0x31, 1), F3(~2, ~0x31, ~1)|RD_G0, "1,i,p", 0, v6 }, /* wr r,i,%psr */ | |
741 | { "wr", F3(2, 0x32, 0), F3(~2, ~0x32, ~0)|RD_G0|ASI(~0), "1,2,w", 0, v6 }, /* wr r,r,%wim */ | |
742 | { "wr", F3(2, 0x32, 1), F3(~2, ~0x32, ~1)|RD_G0, "1,i,w", 0, v6 }, /* wr r,i,%wim */ | |
743 | { "wr", F3(2, 0x33, 0), F3(~2, ~0x33, ~0)|RD_G0|ASI(~0), "1,2,t", 0, v6 }, /* wr r,r,%tbr */ | |
794a16b0 KR |
744 | { "wr", F3(2, 0x33, 0), F3(~2, ~0x33, ~0)|RD_G0|ASI(~0), "1,2,o", 0, v9 }, /* wr r,r,%asi */ |
745 | { "wr", F3(2, 0x33, 1), F3(~2, ~0x33, ~1)|RD_G0, "1,i,t", 0, v6 }, /* wr r,i,%tbr */ | |
794a16b0 KR |
746 | { "wr", F3(2, 0x33, 1), F3(~2, ~0x33, ~1)|RD_G0, "1,i,o", 0, v9 }, /* wr r,i,%asi */ |
747 | ||
748 | { "wr", F3(2, 0x30, 0)|RD(0), F3(~2, ~0x30, ~0)|RD(~0)|ASI(~0), "1,2,y", 0, v9 }, | |
749 | { "wr", F3(2, 0x30, 1)|RD(0), F3(~2, ~0x30, ~1)|RD(~0), "1,i,y", 0, v9 }, | |
493d3e75 KR |
750 | { "wr", F3(2, 0x30, 0)|RD(2), F3(~2, ~0x30, ~0)|RD(~2)|ASI(~0), "1,2,E", 0, v9 }, |
751 | { "wr", F3(2, 0x30, 1)|RD(2), F3(~2, ~0x30, ~1)|RD(~2), "1,i,E", 0, v9 }, | |
752 | { "wr", F3(2, 0x30, 0)|RD(3), F3(~2, ~0x30, ~0)|RD(~3)|ASI(~0), "1,2,o", 0, v9 }, | |
753 | { "wr", F3(2, 0x30, 1)|RD(3), F3(~2, ~0x30, ~1)|RD(~3), "1,i,o", 0, v9 }, | |
754 | { "wr", F3(2, 0x30, 0)|RD(6), F3(~2, ~0x30, ~0)|RD(~6)|ASI(~0), "1,2,s", 0, v9 }, | |
755 | { "wr", F3(2, 0x30, 1)|RD(6), F3(~2, ~0x30, ~1)|RD(~6), "1,i,s", 0, v9 }, | |
794a16b0 KR |
756 | |
757 | { "rd", F3(2, 0x28, 0), F3(~2, ~0x28, ~0)|SIMM13(~0), "M,d", 0, v8 }, /* rd %asr1,r */ | |
758 | { "rd", F3(2, 0x28, 0), F3(~2, ~0x28, ~0)|RS1_G0|SIMM13(~0), "y,d", 0, v6 }, /* rd %y,r */ | |
794a16b0 KR |
759 | { "rd", F3(2, 0x29, 0), F3(~2, ~0x29, ~0)|RS1_G0|SIMM13(~0), "p,d", 0, v6 }, /* rd %psr,r */ |
760 | { "rd", F3(2, 0x2a, 0), F3(~2, ~0x2a, ~0)|RS1_G0|SIMM13(~0), "w,d", 0, v6 }, /* rd %wim,r */ | |
493d3e75 KR |
761 | { "rd", F3(2, 0x2b, 0), F3(~2, ~0x2b, ~0)|RS1_G0|SIMM13(~0), "t,d", 0, v6 }, /* rd %tbr,r */ |
762 | ||
763 | { "rd", F3(2, 0x28, 0)|RS1(2), F3(~2, ~0x28, ~0)|RS1(~2)|SIMM13(~0), "E,d", 0, v9 }, /* rd %ccr,r */ | |
764 | { "rd", F3(2, 0x28, 0)|RS1(3), F3(~2, ~0x28, ~0)|RS1(~3)|SIMM13(~0), "o,d", 0, v9 }, /* rd %asi,r */ | |
765 | { "rd", F3(2, 0x28, 0)|RS1(4), F3(~2, ~0x28, ~0)|RS1(~4)|SIMM13(~0), "W,d", 0, v9 }, /* rd %tick,r */ | |
766 | { "rd", F3(2, 0x28, 0)|RS1(5), F3(~2, ~0x28, ~0)|RS1(~5)|SIMM13(~0), "P,d", 0, v9 }, /* rd %pc,r */ | |
767 | { "rd", F3(2, 0x2b, 0)|RS1(6), F3(~2, ~0x2b, ~0)|RS1(~6)|SIMM13(~0), "s,d", 0, v9 }, /* rd %fprs,r */ | |
794a16b0 KR |
768 | |
769 | { "rdpr", F3(2, 0x2a, 0), F3(~2, ~0x2a, ~0)|SIMM13(~0), "?,d", 0, v9 }, /* rdpr %priv_reg,r */ | |
770 | { "wrpr", F3(2, 0x32, 0), F3(~2, ~0x32, ~0)|SIMM13(~0), "1,2,!", 0, v9 }, | |
771 | { "wrpr", F3(2, 0x32, 0), F3(~2, ~0x32, ~0)|SIMM13(~0), "1,!", 0, v9 }, | |
772 | { "wrpr", F3(2, 0x32, 0), F3(~2, ~0x32, ~0)|SIMM13(~0), "!", 0, v9 }, | |
773 | { "wrpr", F3(2, 0x32, 1), F3(~2, ~0x32, ~1), "1,i,!", 0, v9 }, | |
774 | { "wrpr", F3(2, 0x32, 1), F3(~2, ~0x32, ~1), "i,1,!", 0, v9 }, | |
775 | { "wrpr", F3(2, 0x32, 1), F3(~2, ~0x32, ~1), "i,!", 0, v9 }, | |
776 | ||
777 | { "mov", F3(2, 0x30, 0), F3(~2, ~0x30, ~0)|ASI(~0), "1,2,m", F_ALIAS, v8 }, /* wr r,r,%asrX */ | |
778 | { "mov", F3(2, 0x30, 0), F3(~2, ~0x30, ~0)|RD_G0|ASI(~0), "1,2,y", F_ALIAS, v6 }, /* wr r,r,%y */ | |
794a16b0 KR |
779 | { "mov", F3(2, 0x30, 1), F3(~2, ~0x30, ~1), "1,i,m", F_ALIAS, v8 }, /* wr r,i,%asrX */ |
780 | { "mov", F3(2, 0x30, 1), F3(~2, ~0x30, ~1)|RD_G0, "1,i,y", F_ALIAS, v6 }, /* wr r,i,%y */ | |
794a16b0 KR |
781 | { "mov", F3(2, 0x31, 0), F3(~2, ~0x31, ~0)|RD_G0|ASI(~0), "1,2,p", F_ALIAS, v6 }, /* wr r,r,%psr */ |
782 | { "mov", F3(2, 0x31, 1), F3(~2, ~0x31, ~1)|RD_G0, "1,i,p", F_ALIAS, v6 }, /* wr r,i,%psr */ | |
783 | { "mov", F3(2, 0x32, 0), F3(~2, ~0x32, ~0)|RD_G0|ASI(~0), "1,2,w", F_ALIAS, v6 }, /* wr r,r,%wim */ | |
784 | { "mov", F3(2, 0x32, 1), F3(~2, ~0x32, ~1)|RD_G0, "1,i,w", F_ALIAS, v6 }, /* wr r,i,%wim */ | |
785 | { "mov", F3(2, 0x33, 0), F3(~2, ~0x33, ~0)|RD_G0|ASI(~0), "1,2,t", F_ALIAS, v6 }, /* wr r,r,%tbr */ | |
786 | { "mov", F3(2, 0x33, 1), F3(~2, ~0x33, ~1)|RD_G0, "1,i,t", F_ALIAS, v6 }, /* wr r,i,%tbr */ | |
787 | ||
788 | { "mov", F3(2, 0x28, 0), F3(~2, ~0x28, ~0)|SIMM13(~0), "M,d", F_ALIAS, v8 }, /* rd %asr1,r */ | |
789 | { "mov", F3(2, 0x28, 0), F3(~2, ~0x28, ~0)|RS1_G0|SIMM13(~0), "y,d", F_ALIAS, v6 }, /* rd %y,r */ | |
794a16b0 KR |
790 | { "mov", F3(2, 0x29, 0), F3(~2, ~0x29, ~0)|RS1_G0|SIMM13(~0), "p,d", F_ALIAS, v6 }, /* rd %psr,r */ |
791 | { "mov", F3(2, 0x2a, 0), F3(~2, ~0x2a, ~0)|RS1_G0|SIMM13(~0), "w,d", F_ALIAS, v6 }, /* rd %wim,r */ | |
792 | { "mov", F3(2, 0x2b, 0), F3(~2, ~0x2b, ~0)|RS1_G0|SIMM13(~0), "t,d", F_ALIAS, v6 }, /* rd %tbr,r */ | |
793 | ||
794 | { "mov", F3(2, 0x30, 0), F3(~2, ~0x30, ~0)|ASI_RS2(~0), "1,y", F_ALIAS, v6 }, /* wr rs1,%g0,%y */ | |
795 | { "mov", F3(2, 0x30, 1), F3(~2, ~0x30, ~1), "i,y", F_ALIAS, v6 }, | |
796 | { "mov", F3(2, 0x30, 1), F3(~2, ~0x30, ~1)|SIMM13(~0), "1,y", F_ALIAS, v6 }, /* wr rs1,0,%y */ | |
797 | { "mov", F3(2, 0x31, 0), F3(~2, ~0x31, ~0)|ASI_RS2(~0), "1,p", F_ALIAS, v6 }, /* wr rs1,%g0,%psr */ | |
798 | { "mov", F3(2, 0x31, 1), F3(~2, ~0x31, ~1), "i,p", F_ALIAS, v6 }, | |
799 | { "mov", F3(2, 0x31, 1), F3(~2, ~0x31, ~1)|SIMM13(~0), "1,p", F_ALIAS, v6 }, /* wr rs1,0,%psr */ | |
800 | { "mov", F3(2, 0x32, 0), F3(~2, ~0x32, ~0)|ASI_RS2(~0), "1,w", F_ALIAS, v6 }, /* wr rs1,%g0,%wim */ | |
801 | { "mov", F3(2, 0x32, 1), F3(~2, ~0x32, ~1), "i,w", F_ALIAS, v6 }, | |
802 | { "mov", F3(2, 0x32, 1), F3(~2, ~0x32, ~1)|SIMM13(~0), "1,w", F_ALIAS, v6 }, /* wr rs1,0,%wim */ | |
803 | { "mov", F3(2, 0x33, 0), F3(~2, ~0x33, ~0)|ASI_RS2(~0), "1,t", F_ALIAS, v6 }, /* wr rs1,%g0,%tbr */ | |
804 | { "mov", F3(2, 0x33, 1), F3(~2, ~0x33, ~1), "i,t", F_ALIAS, v6 }, | |
805 | { "mov", F3(2, 0x33, 1), F3(~2, ~0x33, ~1)|SIMM13(~0), "1,t", F_ALIAS, v6 }, /* wr rs1,0,%tbr */ | |
806 | ||
807 | { "mov", F3(2, 0x02, 0), F3(~2, ~0x02, ~0)|RS1_G0|ASI(~0), "2,d", 0, v6 }, /* or %g0,rs2,d */ | |
808 | { "mov", F3(2, 0x02, 1), F3(~2, ~0x02, ~1)|RS1_G0, "i,d", 0, v6 }, /* or %g0,i,d */ | |
809 | { "mov", F3(2, 0x02, 0), F3(~2, ~0x02, ~0)|ASI_RS2(~0), "1,d", 0, v6 }, /* or rs1,%g0,d */ | |
810 | { "mov", F3(2, 0x02, 1), F3(~2, ~0x02, ~1)|SIMM13(~0), "1,d", 0, v6 }, /* or rs1,0,d */ | |
811 | ||
812 | { "or", F3(2, 0x02, 0), F3(~2, ~0x02, ~0)|ASI(~0), "1,2,d", 0, v6 }, | |
813 | { "or", F3(2, 0x02, 1), F3(~2, ~0x02, ~1), "1,i,d", 0, v6 }, | |
814 | { "or", F3(2, 0x02, 1), F3(~2, ~0x02, ~1), "i,1,d", 0, v6 }, | |
815 | ||
816 | { "bset", F3(2, 0x02, 0), F3(~2, ~0x02, ~0)|ASI(~0), "2,r", F_ALIAS, v6 }, /* or rd,rs2,rd */ | |
817 | { "bset", F3(2, 0x02, 1), F3(~2, ~0x02, ~1), "i,r", F_ALIAS, v6 }, /* or rd,i,rd */ | |
818 | ||
493d3e75 | 819 | /* This is not a commutative instruction. */ |
794a16b0 KR |
820 | { "andn", F3(2, 0x05, 0), F3(~2, ~0x05, ~0)|ASI(~0), "1,2,d", 0, v6 }, |
821 | { "andn", F3(2, 0x05, 1), F3(~2, ~0x05, ~1), "1,i,d", 0, v6 }, | |
794a16b0 | 822 | |
493d3e75 | 823 | /* This is not a commutative instruction. */ |
794a16b0 KR |
824 | { "andncc", F3(2, 0x15, 0), F3(~2, ~0x15, ~0)|ASI(~0), "1,2,d", 0, v6 }, |
825 | { "andncc", F3(2, 0x15, 1), F3(~2, ~0x15, ~1), "1,i,d", 0, v6 }, | |
794a16b0 KR |
826 | |
827 | { "bclr", F3(2, 0x05, 0), F3(~2, ~0x05, ~0)|ASI(~0), "2,r", F_ALIAS, v6 }, /* andn rd,rs2,rd */ | |
828 | { "bclr", F3(2, 0x05, 1), F3(~2, ~0x05, ~1), "i,r", F_ALIAS, v6 }, /* andn rd,i,rd */ | |
829 | ||
830 | { "cmp", F3(2, 0x14, 0), F3(~2, ~0x14, ~0)|RD_G0|ASI(~0), "1,2", 0, v6 }, /* subcc rs1,rs2,%g0 */ | |
831 | { "cmp", F3(2, 0x14, 1), F3(~2, ~0x14, ~1)|RD_G0, "1,i", 0, v6 }, /* subcc rs1,i,%g0 */ | |
832 | ||
833 | { "sub", F3(2, 0x04, 0), F3(~2, ~0x04, ~0)|ASI(~0), "1,2,d", 0, v6 }, | |
834 | { "sub", F3(2, 0x04, 1), F3(~2, ~0x04, ~1), "1,i,d", 0, v6 }, | |
835 | ||
836 | { "subcc", F3(2, 0x14, 0), F3(~2, ~0x14, ~0)|ASI(~0), "1,2,d", 0, v6 }, | |
837 | { "subcc", F3(2, 0x14, 1), F3(~2, ~0x14, ~1), "1,i,d", 0, v6 }, | |
838 | ||
493d3e75 KR |
839 | /* FIXME These are marked F_ALIAS, so that they won't conflict with new v9 |
840 | insns when v9 is present. Otherwise, the F_ALIAS flag is ignored. */ | |
841 | { "subx", F3(2, 0x0c, 0), F3(~2, ~0x0c, ~0)|ASI(~0), "1,2,d", F_ALIAS, v6 }, | |
842 | { "subx", F3(2, 0x0c, 1), F3(~2, ~0x0c, ~1), "1,i,d", F_ALIAS, v6 }, | |
843 | { "subc", F3(2, 0x0c, 0), F3(~2, ~0x0c, ~0)|ASI(~0), "1,2,d", 0, v9 }, | |
844 | { "subc", F3(2, 0x0c, 1), F3(~2, ~0x0c, ~1), "1,i,d", 0, v9 }, | |
794a16b0 | 845 | |
493d3e75 KR |
846 | /* FIXME These are marked F_ALIAS, so that they won't conflict with new v9 |
847 | insns when v9 is present. Otherwise, the F_ALIAS flag is ignored. */ | |
848 | { "subxcc", F3(2, 0x1c, 0), F3(~2, ~0x1c, ~0)|ASI(~0), "1,2,d", F_ALIAS, v6 }, | |
849 | { "subxcc", F3(2, 0x1c, 1), F3(~2, ~0x1c, ~1), "1,i,d", F_ALIAS, v6 }, | |
850 | { "subccc", F3(2, 0x1c, 0), F3(~2, ~0x1c, ~0)|ASI(~0), "1,2,d", 0, v9 }, | |
851 | { "subccc", F3(2, 0x1c, 1), F3(~2, ~0x1c, ~1), "1,i,d", 0, v9 }, | |
794a16b0 KR |
852 | |
853 | { "and", F3(2, 0x01, 0), F3(~2, ~0x01, ~0)|ASI(~0), "1,2,d", 0, v6 }, | |
854 | { "and", F3(2, 0x01, 1), F3(~2, ~0x01, ~1), "1,i,d", 0, v6 }, | |
855 | { "and", F3(2, 0x01, 1), F3(~2, ~0x01, ~1), "i,1,d", 0, v6 }, | |
856 | ||
857 | { "andcc", F3(2, 0x11, 0), F3(~2, ~0x11, ~0)|ASI(~0), "1,2,d", 0, v6 }, | |
858 | { "andcc", F3(2, 0x11, 1), F3(~2, ~0x11, ~1), "1,i,d", 0, v6 }, | |
859 | { "andcc", F3(2, 0x11, 1), F3(~2, ~0x11, ~1), "i,1,d", 0, v6 }, | |
860 | ||
861 | { "dec", F3(2, 0x04, 1)|SIMM13(0x1), F3(~2, ~0x04, ~1)|SIMM13(~0x0001), "r", F_ALIAS, v6 }, /* sub rd,1,rd */ | |
862 | { "dec", F3(2, 0x04, 1), F3(~2, ~0x04, ~1), "i,r", F_ALIAS, v8 }, /* sub rd,imm,rd */ | |
863 | { "deccc", F3(2, 0x14, 1)|SIMM13(0x1), F3(~2, ~0x14, ~1)|SIMM13(~0x0001), "r", F_ALIAS, v6 }, /* subcc rd,1,rd */ | |
864 | { "deccc", F3(2, 0x14, 1), F3(~2, ~0x14, ~1), "i,r", F_ALIAS, v8 }, /* subcc rd,imm,rd */ | |
865 | { "inc", F3(2, 0x00, 1)|SIMM13(0x1), F3(~2, ~0x00, ~1)|SIMM13(~0x0001), "r", F_ALIAS, v6 }, /* add rd,1,rd */ | |
866 | { "inc", F3(2, 0x00, 1), F3(~2, ~0x00, ~1), "i,r", F_ALIAS, v8 }, /* add rd,imm,rd */ | |
867 | { "inccc", F3(2, 0x10, 1)|SIMM13(0x1), F3(~2, ~0x10, ~1)|SIMM13(~0x0001), "r", F_ALIAS, v6 }, /* addcc rd,1,rd */ | |
868 | { "inccc", F3(2, 0x10, 1), F3(~2, ~0x10, ~1), "i,r", F_ALIAS, v8 }, /* addcc rd,imm,rd */ | |
869 | ||
870 | { "btst", F3(2, 0x11, 0), F3(~2, ~0x11, ~0)|RD_G0|ASI(~0), "1,2", F_ALIAS, v6 }, /* andcc rs1,rs2,%g0 */ | |
871 | { "btst", F3(2, 0x11, 1), F3(~2, ~0x11, ~1)|RD_G0, "i,1", F_ALIAS, v6 }, /* andcc rs1,i,%g0 */ | |
872 | ||
873 | { "neg", F3(2, 0x04, 0), F3(~2, ~0x04, ~0)|RS1_G0|ASI(~0), "2,d", F_ALIAS, v6 }, /* sub %g0,rs2,rd */ | |
874 | { "neg", F3(2, 0x04, 0), F3(~2, ~0x04, ~0)|RS1_G0|ASI(~0), "r", F_ALIAS, v6 }, /* sub %g0,rd,rd */ | |
875 | ||
876 | { "add", F3(2, 0x00, 0), F3(~2, ~0x00, ~0)|ASI(~0), "1,2,d", 0, v6 }, | |
877 | { "add", F3(2, 0x00, 1), F3(~2, ~0x00, ~1), "1,i,d", 0, v6 }, | |
878 | { "add", F3(2, 0x00, 1), F3(~2, ~0x00, ~1), "i,1,d", 0, v6 }, | |
879 | { "addcc", F3(2, 0x10, 0), F3(~2, ~0x10, ~0)|ASI(~0), "1,2,d", 0, v6 }, | |
880 | { "addcc", F3(2, 0x10, 1), F3(~2, ~0x10, ~1), "1,i,d", 0, v6 }, | |
881 | { "addcc", F3(2, 0x10, 1), F3(~2, ~0x10, ~1), "i,1,d", 0, v6 }, | |
493d3e75 KR |
882 | /* FIXME These are marked F_ALIAS, so that they won't conflict with new v9 |
883 | insns when v9 is present. Otherwise, the F_ALIAS flag is ignored. */ | |
884 | { "addx", F3(2, 0x08, 0), F3(~2, ~0x08, ~0)|ASI(~0), "1,2,d", F_ALIAS, v6 }, | |
885 | { "addx", F3(2, 0x08, 1), F3(~2, ~0x08, ~1), "1,i,d", F_ALIAS, v6 }, | |
886 | { "addx", F3(2, 0x08, 1), F3(~2, ~0x08, ~1), "i,1,d", F_ALIAS, v6 }, | |
887 | { "addc", F3(2, 0x08, 0), F3(~2, ~0x08, ~0)|ASI(~0), "1,2,d", 0, v9 }, | |
888 | { "addc", F3(2, 0x08, 1), F3(~2, ~0x08, ~1), "1,i,d", 0, v9 }, | |
889 | { "addc", F3(2, 0x08, 1), F3(~2, ~0x08, ~1), "i,1,d", 0, v9 }, | |
890 | /* FIXME These are marked F_ALIAS, so that they won't conflict with new v9 | |
891 | insns when v9 is present. Otherwise, the F_ALIAS flag is ignored. */ | |
892 | { "addxcc", F3(2, 0x18, 0), F3(~2, ~0x18, ~0)|ASI(~0), "1,2,d", F_ALIAS, v6 }, | |
893 | { "addxcc", F3(2, 0x18, 1), F3(~2, ~0x18, ~1), "1,i,d", F_ALIAS, v6 }, | |
894 | { "addxcc", F3(2, 0x18, 1), F3(~2, ~0x18, ~1), "i,1,d", F_ALIAS, v6 }, | |
895 | { "addccc", F3(2, 0x18, 0), F3(~2, ~0x18, ~0)|ASI(~0), "1,2,d", 0, v9 }, | |
896 | { "addccc", F3(2, 0x18, 1), F3(~2, ~0x18, ~1), "1,i,d", 0, v9 }, | |
897 | { "addccc", F3(2, 0x18, 1), F3(~2, ~0x18, ~1), "i,1,d", 0, v9 }, | |
794a16b0 KR |
898 | |
899 | { "smul", F3(2, 0x0b, 0), F3(~2, ~0x0b, ~0)|ASI(~0), "1,2,d", 0, v8 }, | |
900 | { "smul", F3(2, 0x0b, 1), F3(~2, ~0x0b, ~1), "1,i,d", 0, v8 }, | |
901 | { "smul", F3(2, 0x0b, 1), F3(~2, ~0x0b, ~1), "i,1,d", 0, v8 }, | |
902 | { "smulcc", F3(2, 0x1b, 0), F3(~2, ~0x1b, ~0)|ASI(~0), "1,2,d", 0, v8 }, | |
903 | { "smulcc", F3(2, 0x1b, 1), F3(~2, ~0x1b, ~1), "1,i,d", 0, v8 }, | |
904 | { "smulcc", F3(2, 0x1b, 1), F3(~2, ~0x1b, ~1), "i,1,d", 0, v8 }, | |
905 | { "umul", F3(2, 0x0a, 0), F3(~2, ~0x0a, ~0)|ASI(~0), "1,2,d", 0, v8 }, | |
906 | { "umul", F3(2, 0x0a, 1), F3(~2, ~0x0a, ~1), "1,i,d", 0, v8 }, | |
907 | { "umul", F3(2, 0x0a, 1), F3(~2, ~0x0a, ~1), "i,1,d", 0, v8 }, | |
908 | { "umulcc", F3(2, 0x1a, 0), F3(~2, ~0x1a, ~0)|ASI(~0), "1,2,d", 0, v8 }, | |
909 | { "umulcc", F3(2, 0x1a, 1), F3(~2, ~0x1a, ~1), "1,i,d", 0, v8 }, | |
910 | { "umulcc", F3(2, 0x1a, 1), F3(~2, ~0x1a, ~1), "i,1,d", 0, v8 }, | |
911 | { "sdiv", F3(2, 0x0f, 0), F3(~2, ~0x0f, ~0)|ASI(~0), "1,2,d", 0, v8 }, | |
912 | { "sdiv", F3(2, 0x0f, 1), F3(~2, ~0x0f, ~1), "1,i,d", 0, v8 }, | |
913 | { "sdiv", F3(2, 0x0f, 1), F3(~2, ~0x0f, ~1), "i,1,d", 0, v8 }, | |
914 | { "sdivcc", F3(2, 0x1f, 0), F3(~2, ~0x1f, ~0)|ASI(~0), "1,2,d", 0, v8 }, | |
915 | { "sdivcc", F3(2, 0x1f, 1), F3(~2, ~0x1f, ~1), "1,i,d", 0, v8 }, | |
916 | { "sdivcc", F3(2, 0x1f, 1), F3(~2, ~0x1f, ~1), "i,1,d", 0, v8 }, | |
917 | { "udiv", F3(2, 0x0e, 0), F3(~2, ~0x0e, ~0)|ASI(~0), "1,2,d", 0, v8 }, | |
918 | { "udiv", F3(2, 0x0e, 1), F3(~2, ~0x0e, ~1), "1,i,d", 0, v8 }, | |
919 | { "udiv", F3(2, 0x0e, 1), F3(~2, ~0x0e, ~1), "i,1,d", 0, v8 }, | |
920 | { "udivcc", F3(2, 0x1e, 0), F3(~2, ~0x1e, ~0)|ASI(~0), "1,2,d", 0, v8 }, | |
921 | { "udivcc", F3(2, 0x1e, 1), F3(~2, ~0x1e, ~1), "1,i,d", 0, v8 }, | |
922 | { "udivcc", F3(2, 0x1e, 1), F3(~2, ~0x1e, ~1), "i,1,d", 0, v8 }, | |
923 | ||
924 | { "mulx", F3(2, 0x09, 0), F3(~2, ~0x09, ~0)|ASI(~0), "1,2,d", 0, v9 }, | |
925 | { "mulx", F3(2, 0x09, 1), F3(~2, ~0x09, ~1), "1,i,d", 0, v9 }, | |
493d3e75 KR |
926 | { "sdivx", F3(2, 0x2d, 0), F3(~2, ~0x2d, ~0)|ASI(~0), "1,2,d", 0, v9 }, |
927 | { "sdivx", F3(2, 0x2d, 1), F3(~2, ~0x2d, ~1), "1,i,d", 0, v9 }, | |
794a16b0 KR |
928 | { "udivx", F3(2, 0x0d, 0), F3(~2, ~0x0d, ~0)|ASI(~0), "1,2,d", 0, v9 }, |
929 | { "udivx", F3(2, 0x0d, 1), F3(~2, ~0x0d, ~1), "1,i,d", 0, v9 }, | |
930 | ||
931 | { "call", F1(0x1), F1(~0x1), "L", F_DELAYED, v6 }, | |
932 | { "call", F1(0x1), F1(~0x1), "L,#", F_DELAYED, v6 }, | |
933 | { "call", F3(2, 0x38, 0)|RD(0xf), F3(~2, ~0x38, ~0)|RD(~0xf)|ASI_RS2(~0), "1", F_DELAYED, v6 }, /* jmpl rs1+%g0, %o7 */ | |
934 | { "call", F3(2, 0x38, 0)|RD(0xf), F3(~2, ~0x38, ~0)|RD(~0xf)|ASI_RS2(~0), "1,#", F_DELAYED, v6 }, | |
935 | ||
936 | /* Conditional instructions. | |
937 | ||
938 | Because this part of the table was such a mess earlier, I have | |
939 | macrofied it so that all the branches and traps are generated from | |
940 | a single-line description of each condition value. John Gilmore. */ | |
941 | ||
942 | /* Define branches -- one annulled, one without, etc. */ | |
943 | #define br(opcode, mask, lose, flags) \ | |
944 | { opcode, (mask)|ANNUL, (lose), ",a l", (flags), v6 }, \ | |
945 | { opcode, (mask) , (lose)|ANNUL, "l", (flags), v6 } | |
946 | ||
947 | #define brx(opcode, mask, lose, flags) /* v9 */ \ | |
866e23d0 JW |
948 | { opcode, (mask)|(2<<20), (lose)|ANNUL|BPRED, "Z,G", (flags), v9 }, \ |
949 | { opcode, (mask)|(2<<20), (lose)|ANNUL|BPRED, ",N Z,G", (flags), v9 }, \ | |
950 | { opcode, (mask)|(2<<20)|ANNUL, (lose)|BPRED, ",a Z,G", (flags), v9 }, \ | |
951 | { opcode, (mask)|(2<<20)|ANNUL, (lose)|BPRED, ",a,N Z,G", (flags), v9 }, \ | |
952 | { opcode, (mask)|(2<<20)|BPRED, (lose)|ANNUL, ",T Z,G", (flags), v9 }, \ | |
953 | { opcode, (mask)|(2<<20)|ANNUL|BPRED, (lose), ",a,T Z,G", (flags), v9 }, \ | |
954 | { opcode, (mask), (lose)|(2<<20)|ANNUL|BPRED, "z,G", (flags), v9 }, \ | |
955 | { opcode, (mask), (lose)|(2<<20)|ANNUL|BPRED, ",N z,G", (flags), v9 }, \ | |
956 | { opcode, (mask)|ANNUL, (lose)|(2<<20)|BPRED, ",a z,G", (flags), v9 }, \ | |
957 | { opcode, (mask)|ANNUL, (lose)|(2<<20)|BPRED, ",a,N z,G", (flags), v9 }, \ | |
958 | { opcode, (mask)|BPRED, (lose)|(2<<20)|ANNUL, ",T z,G", (flags), v9 }, \ | |
959 | { opcode, (mask)|ANNUL|BPRED, (lose)|(2<<20), ",a,T z,G", (flags), v9 } | |
794a16b0 KR |
960 | |
961 | /* Define four traps: reg+reg, reg + immediate, immediate alone, reg alone. */ | |
962 | #define tr(opcode, mask, lose, flags) \ | |
794a16b0 KR |
963 | { opcode, (mask)|(2<<11)|IMMED, (lose)|RS1_G0, "Z,i", (flags), v9 }, /* %g0 + imm */ \ |
964 | { opcode, (mask)|(2<<11)|IMMED, (lose), "Z,1+i", (flags), v9 }, /* rs1 + imm */ \ | |
965 | { opcode, (mask)|(2<<11), IMMED|(lose), "Z,1+2", (flags), v9 }, /* rs1 + rs2 */ \ | |
966 | { opcode, (mask)|(2<<11), IMMED|(lose)|RS2_G0, "Z,1", (flags), v9 }, /* rs1 + %g0 */ \ | |
967 | { opcode, (mask)|IMMED, (lose)|RS1_G0, "z,i", (flags)|F_ALIAS, v9 }, /* %g0 + imm */ \ | |
968 | { opcode, (mask)|IMMED, (lose), "z,1+i", (flags)|F_ALIAS, v9 }, /* rs1 + imm */ \ | |
969 | { opcode, (mask), IMMED|(lose), "z,1+2", (flags)|F_ALIAS, v9 }, /* rs1 + rs2 */ \ | |
970 | { opcode, (mask), IMMED|(lose)|RS2_G0, "z,1", (flags)|F_ALIAS, v9 }, /* rs1 + %g0 */ \ | |
493d3e75 KR |
971 | { opcode, (mask)|IMMED, (lose)|RS1_G0, "i", (flags), v6 }, /* %g0 + imm */ \ |
972 | { opcode, (mask)|IMMED, (lose), "1+i", (flags), v6 }, /* rs1 + imm */ \ | |
973 | { opcode, (mask), IMMED|(lose), "1+2", (flags), v6 }, /* rs1 + rs2 */ \ | |
794a16b0 KR |
974 | { opcode, (mask), IMMED|(lose)|RS2_G0, "1", (flags), v6 } /* rs1 + %g0 */ |
975 | ||
866e23d0 JW |
976 | /* v9: We must put `brx' before `br', to ensure that we never match something |
977 | v9: against an expression unless it is an expression. Otherwise, we end | |
978 | v9: up with undefined symbol tables entries, because they get added, but | |
979 | v9: are not deleted if the pattern fails to match. */ | |
980 | ||
794a16b0 KR |
981 | /* Define both branches and traps based on condition mask */ |
982 | #define cond(bop, top, mask, flags) \ | |
794a16b0 | 983 | brx(bop, F2(0, 1)|(mask), F2(~0, ~1)|((~mask)&COND(~0)), F_DELAYED|(flags)), /* v9 */ \ |
866e23d0 | 984 | br(bop, F2(0, 2)|(mask), F2(~0, ~2)|((~mask)&COND(~0)), F_DELAYED|(flags)), \ |
794a16b0 KR |
985 | tr(top, F3(2, 0x3a, 0)|(mask), F3(~2, ~0x3a, 0)|((~mask)&COND(~0)), (flags)) |
986 | ||
987 | /* Define all the conditions, all the branches, all the traps. */ | |
988 | ||
989 | cond ("b", "t", CONDA, 0), | |
990 | cond ("ba", "ta", CONDA, F_ALIAS), /* for nothing */ | |
991 | cond ("bcc", "tcc", CONDCC, 0), | |
992 | cond ("bcs", "tcs", CONDCS, 0), | |
993 | cond ("be", "te", CONDE, 0), | |
994 | cond ("bg", "tg", CONDG, 0), | |
995 | cond ("bgt", "tgt", CONDG, F_ALIAS), | |
996 | cond ("bge", "tge", CONDGE, 0), | |
997 | cond ("bgeu", "tgeu", CONDGEU, F_ALIAS), /* for cc */ | |
998 | cond ("bgu", "tgu", CONDGU, 0), | |
999 | cond ("bl", "tl", CONDL, 0), | |
1000 | cond ("blt", "tlt", CONDL, F_ALIAS), | |
1001 | cond ("ble", "tle", CONDLE, 0), | |
1002 | cond ("bleu", "tleu", CONDLEU, 0), | |
1003 | cond ("blu", "tlu", CONDLU, F_ALIAS), /* for cs */ | |
1004 | cond ("bn", "tn", CONDN, 0), | |
1005 | cond ("bne", "tne", CONDNE, 0), | |
1006 | cond ("bneg", "tneg", CONDNEG, 0), | |
1007 | cond ("bnz", "tnz", CONDNZ, F_ALIAS), /* for ne */ | |
1008 | cond ("bpos", "tpos", CONDPOS, 0), | |
1009 | cond ("bvc", "tvc", CONDVC, 0), | |
1010 | cond ("bvs", "tvs", CONDVS, 0), | |
1011 | cond ("bz", "tz", CONDZ, F_ALIAS), /* for e */ | |
1012 | ||
1013 | #undef cond | |
1014 | #undef br | |
493d3e75 | 1015 | #undef brr /* v9 */ |
794a16b0 KR |
1016 | #undef tr |
1017 | ||
1018 | #define brr(opcode, mask, lose, flags) /* v9 */ \ | |
1019 | { opcode, (mask), (lose)|ANNUL|BPRED, "1,k", F_DELAYED|(flags), v9 }, \ | |
1020 | { opcode, (mask), (lose)|ANNUL|BPRED, ",N 1,k", F_DELAYED|(flags), v9 }, \ | |
1021 | { opcode, (mask)|ANNUL, (lose)|BPRED, ",a 1,k", F_DELAYED|(flags), v9 }, \ | |
1022 | { opcode, (mask)|ANNUL, (lose)|BPRED, ",a,N 1,k", F_DELAYED|(flags), v9 }, \ | |
1023 | { opcode, (mask)|BPRED, (lose)|ANNUL, ",T 1,k", F_DELAYED|(flags), v9 }, \ | |
1024 | { opcode, (mask)|ANNUL|BPRED, (lose), ",a,T 1,k", F_DELAYED|(flags), v9 } | |
1025 | ||
1026 | #define condr(bop, mask, flags) /* v9 */ \ | |
493d3e75 | 1027 | brr(bop, F2(0, 3)|COND(mask), F2(~0, ~3)|COND(~(mask)), (flags)) /* v9 */ |
794a16b0 | 1028 | |
493d3e75 KR |
1029 | /* v9 */ condr("brnz", 0x5, 0), |
1030 | /* v9 */ condr("brz", 0x1, 0), | |
1031 | /* v9 */ condr("brgez", 0x7, 0), | |
1032 | /* v9 */ condr("brlz", 0x3, 0), | |
1033 | /* v9 */ condr("brlez", 0x2, 0), | |
1034 | /* v9 */ condr("brgz", 0x6, 0), | |
794a16b0 KR |
1035 | |
1036 | #undef condr /* v9 */ | |
1037 | #undef brr /* v9 */ | |
1038 | ||
493d3e75 KR |
1039 | #define movr(opcode, mask, flags) /* v9 */ \ |
1040 | { opcode, F3(2, 0x2f, 0)|COND(mask), F3(~2, ~0x2f, ~0)|COND(~(mask)), "1,2,d", (flags), v9 }, \ | |
1041 | { opcode, F3(2, 0x2f, 1)|COND(mask), F3(~2, ~0x2f, ~1)|COND(~(mask)), "1,j,d", (flags), v9 } | |
794a16b0 KR |
1042 | |
1043 | #define fmrrs(opcode, mask, lose, flags) /* v9 */ \ | |
1044 | { opcode, (mask), (lose), "1,f,g", (flags), v9 } | |
1045 | #define fmrrd(opcode, mask, lose, flags) /* v9 */ \ | |
1046 | { opcode, (mask), (lose), "1,B,H", (flags), v9 } | |
1047 | #define fmrrq(opcode, mask, lose, flags) /* v9 */ \ | |
1048 | { opcode, (mask), (lose), "1,R,J", (flags), v9 } | |
1049 | ||
1050 | #define fmovrs(mop, mask, flags) /* v9 */ \ | |
493d3e75 | 1051 | fmrrs(mop, F3(2, 0x35, 0)|OPF_LOW5(5)|COND(mask), F3(~2, ~0x35, 0)|OPF_LOW5(~5)|COND(~(mask)), (flags)) /* v9 */ |
794a16b0 | 1052 | #define fmovrd(mop, mask, flags) /* v9 */ \ |
493d3e75 | 1053 | fmrrd(mop, F3(2, 0x35, 0)|OPF_LOW5(6)|COND(mask), F3(~2, ~0x35, 0)|OPF_LOW5(~6)|COND(~(mask)), (flags)) /* v9 */ |
794a16b0 | 1054 | #define fmovrq(mop, mask, flags) /* v9 */ \ |
493d3e75 | 1055 | fmrrq(mop, F3(2, 0x35, 0)|OPF_LOW5(7)|COND(mask), F3(~2, ~0x35, 0)|OPF_LOW5(~7)|COND(~(mask)), (flags)) /* v9 */ |
794a16b0 KR |
1056 | |
1057 | /* v9 */ movr("movrne", 0x5, 0), | |
1058 | /* v9 */ movr("movre", 0x1, 0), | |
493d3e75 KR |
1059 | /* v9 */ movr("movrgez", 0x7, 0), |
1060 | /* v9 */ movr("movrlz", 0x3, 0), | |
1061 | /* v9 */ movr("movrlez", 0x2, 0), | |
1062 | /* v9 */ movr("movrgz", 0x6, 0), | |
794a16b0 KR |
1063 | /* v9 */ movr("movrnz", 0x5, F_ALIAS), |
1064 | /* v9 */ movr("movrz", 0x1, F_ALIAS), | |
1065 | ||
493d3e75 KR |
1066 | /* v9 */ fmovrs("fmovrsne", 0x5, 0), |
1067 | /* v9 */ fmovrs("fmovrse", 0x1, 0), | |
1068 | /* v9 */ fmovrs("fmovrsgez", 0x7, 0), | |
1069 | /* v9 */ fmovrs("fmovrslz", 0x3, 0), | |
1070 | /* v9 */ fmovrs("fmovrslez", 0x2, 0), | |
1071 | /* v9 */ fmovrs("fmovrsgz", 0x6, 0), | |
1072 | /* v9 */ fmovrs("fmovrsnz", 0x5, F_ALIAS), | |
1073 | /* v9 */ fmovrs("fmovrsz", 0x1, F_ALIAS), | |
1074 | ||
1075 | /* v9 */ fmovrd("fmovrdne", 0x5, 0), | |
1076 | /* v9 */ fmovrd("fmovrde", 0x1, 0), | |
1077 | /* v9 */ fmovrd("fmovrdgez", 0x7, 0), | |
1078 | /* v9 */ fmovrd("fmovrdlz", 0x3, 0), | |
1079 | /* v9 */ fmovrd("fmovrdlez", 0x2, 0), | |
1080 | /* v9 */ fmovrd("fmovrdgz", 0x6, 0), | |
1081 | /* v9 */ fmovrd("fmovrdnz", 0x5, F_ALIAS), | |
1082 | /* v9 */ fmovrd("fmovrdz", 0x1, F_ALIAS), | |
1083 | ||
1084 | /* v9 */ fmovrq("fmovrqne", 0x5, 0), | |
1085 | /* v9 */ fmovrq("fmovrqe", 0x1, 0), | |
1086 | /* v9 */ fmovrq("fmovrqgez", 0x7, 0), | |
1087 | /* v9 */ fmovrq("fmovrqlz", 0x3, 0), | |
1088 | /* v9 */ fmovrq("fmovrqlez", 0x2, 0), | |
1089 | /* v9 */ fmovrq("fmovrqgz", 0x6, 0), | |
1090 | /* v9 */ fmovrq("fmovrqnz", 0x5, F_ALIAS), | |
1091 | /* v9 */ fmovrq("fmovrqz", 0x1, F_ALIAS), | |
794a16b0 KR |
1092 | |
1093 | #undef movr /* v9 */ | |
794a16b0 KR |
1094 | #undef fmovr /* v9 */ |
1095 | #undef fmrr /* v9 */ | |
1096 | ||
1097 | { "mova", F3(2, 0x2c, 0)|FCC(0)|MCOND(FCONDA,0), MCOND(~FCONDA,~0)|FCC(~0)|F3(~2, ~0x2c, ~0), "6,2,d", 0, v9 }, | |
1098 | { "mova", F3(2, 0x2c, 1)|FCC(0)|MCOND(FCONDA,0), MCOND(~FCONDA,~0)|FCC(~0)|F3(~2, ~0x2c,~1), "6,I,d", 0, v9 }, | |
1099 | { "mova", F3(2, 0x2c, 0)|FCC(1)|MCOND(FCONDA,0), MCOND(~FCONDA,~0)|FCC(~1)|F3(~2, ~0x2c, ~0), "7,2,d", 0, v9 }, | |
1100 | { "mova", F3(2, 0x2c, 1)|FCC(1)|MCOND(FCONDA,0), MCOND(~FCONDA,~0)|FCC(~1)|F3(~2, ~0x2c, ~1), "7,I,d", 0, v9 }, | |
1101 | { "mova", F3(2, 0x2c, 0)|FCC(2)|MCOND(FCONDA,0), MCOND(~FCONDA,~0)|FCC(~2)|F3(~2, ~0x2c, ~0), "8,2,d", 0, v9 }, | |
1102 | { "mova", F3(2, 0x2c, 1)|FCC(2)|MCOND(FCONDA,0), MCOND(~FCONDA,~0)|FCC(~2)|F3(~2, ~0x2c, ~1), "8,I,d", 0, v9 }, | |
1103 | { "mova", F3(2, 0x2c, 0)|FCC(3)|MCOND(FCONDA,0), MCOND(~FCONDA,~0)|FCC(~3)|F3(~2, ~0x2c, ~0), "9,2,d", 0, v9 }, | |
1104 | { "mova", F3(2, 0x2c, 1)|FCC(3)|MCOND(FCONDA,0), MCOND(~FCONDA,~0)|FCC(~3)|F3(~2, ~0x2c, ~1), "9,I,d", 0, v9 }, | |
1105 | { "mova", F3(2, 0x2c, 0)|MCOND(CONDA,1)|ICC, F3(~2, ~0x2c, ~0)|MCOND(~CONDA,~1)|XCC|(1<<12), "z,2,d", 0, v9 }, | |
1106 | { "mova", F3(2, 0x2c, 1)|MCOND(CONDA,1)|ICC, F3(~2, ~0x2c, ~1)|MCOND(~CONDA,~1)|XCC|(1<<12), "z,I,d", 0, v9 }, | |
1107 | { "mova", F3(2, 0x2c, 0)|MCOND(CONDA,1)|XCC, F3(~2, ~0x2c, ~0)|MCOND(~CONDA,~1)|(1<<12), "Z,2,d", 0, v9 }, | |
1108 | { "mova", F3(2, 0x2c, 1)|MCOND(CONDA,1)|XCC, F3(~2, ~0x2c, ~1)|MCOND(~CONDA,~1)|(1<<12), "Z,I,d", 0, v9 }, | |
1109 | { "movcc", F3(2, 0x2c, 0)|MCOND(CONDCC,1)|ICC, F3(~2, ~0x2c, ~0)|MCOND(~CONDCC,~1)|XCC|(1<<12), "z,2,d", 0, v9 }, | |
1110 | { "movcc", F3(2, 0x2c, 1)|MCOND(CONDCC,1)|ICC, F3(~2, ~0x2c, ~1)|MCOND(~CONDCC,~1)|XCC|(1<<12), "z,I,d", 0, v9 }, | |
1111 | { "movcc", F3(2, 0x2c, 0)|MCOND(CONDCC,1)|XCC, F3(~2, ~0x2c, ~0)|MCOND(~CONDCC,~1)|(1<<12), "Z,2,d", 0, v9 }, | |
1112 | { "movcc", F3(2, 0x2c, 1)|MCOND(CONDCC,1)|XCC, F3(~2, ~0x2c, ~1)|MCOND(~CONDCC,~1)|(1<<12), "Z,I,d", 0, v9 }, | |
1113 | { "movgeu", F3(2, 0x2c, 0)|MCOND(CONDGEU,1)|ICC, F3(~2, ~0x2c, ~0)|MCOND(~CONDGEU,~1)|XCC|(1<<12), "z,2,d", F_ALIAS, v9 }, | |
1114 | { "movgeu", F3(2, 0x2c, 1)|MCOND(CONDGEU,1)|ICC, F3(~2, ~0x2c, ~1)|MCOND(~CONDGEU,~1)|XCC|(1<<12), "z,I,d", F_ALIAS, v9 }, | |
1115 | { "movgeu", F3(2, 0x2c, 0)|MCOND(CONDGEU,1)|XCC, F3(~2, ~0x2c, ~0)|MCOND(~CONDGEU,~1)|(1<<12), "Z,2,d", F_ALIAS, v9 }, | |
1116 | { "movgeu", F3(2, 0x2c, 1)|MCOND(CONDGEU,1)|XCC, F3(~2, ~0x2c, ~1)|MCOND(~CONDGEU,~1)|(1<<12), "Z,I,d", F_ALIAS, v9 }, | |
1117 | { "movcs", F3(2, 0x2c, 0)|MCOND(CONDCS,1)|ICC, F3(~2, ~0x2c, ~0)|MCOND(~CONDCS,~1)|XCC|(1<<12), "z,2,d", 0, v9 }, | |
1118 | { "movcs", F3(2, 0x2c, 1)|MCOND(CONDCS,1)|ICC, F3(~2, ~0x2c, ~1)|MCOND(~CONDCS,~1)|XCC|(1<<12), "z,I,d", 0, v9 }, | |
1119 | { "movcs", F3(2, 0x2c, 0)|MCOND(CONDCS,1)|XCC, F3(~2, ~0x2c, ~0)|MCOND(~CONDCS,~1)|(1<<12), "Z,2,d", 0, v9 }, | |
1120 | { "movcs", F3(2, 0x2c, 1)|MCOND(CONDCS,1)|XCC, F3(~2, ~0x2c, ~1)|MCOND(~CONDCS,~1)|(1<<12), "Z,I,d", 0, v9 }, | |
1121 | { "movlu", F3(2, 0x2c, 0)|MCOND(CONDLU,1)|ICC, F3(~2, ~0x2c, ~0)|MCOND(~CONDLU,~1)|XCC|(1<<12), "z,2,d", F_ALIAS, v9 }, | |
1122 | { "movlu", F3(2, 0x2c, 1)|MCOND(CONDLU,1)|ICC, F3(~2, ~0x2c, ~1)|MCOND(~CONDLU,~1)|XCC|(1<<12), "z,I,d", F_ALIAS, v9 }, | |
1123 | { "movlu", F3(2, 0x2c, 0)|MCOND(CONDLU,1)|XCC, F3(~2, ~0x2c, ~0)|MCOND(~CONDLU,~1)|(1<<12), "Z,2,d", F_ALIAS, v9 }, | |
1124 | { "movlu", F3(2, 0x2c, 1)|MCOND(CONDLU,1)|XCC, F3(~2, ~0x2c, ~1)|MCOND(~CONDLU,~1)|(1<<12), "Z,I,d", F_ALIAS, v9 }, | |
1125 | { "move", F3(2, 0x2c, 0)|FCC(0)|MCOND(FCONDE,0), MCOND(~FCONDE,~0)|FCC(~0)|F3(~2, ~0x2c, ~0), "6,2,d", 0, v9 }, | |
1126 | { "move", F3(2, 0x2c, 1)|FCC(0)|MCOND(FCONDE,0), MCOND(~FCONDE,~0)|FCC(~0)|F3(~2, ~0x2c, ~1), "6,I,d", 0, v9 }, | |
1127 | { "move", F3(2, 0x2c, 0)|FCC(1)|MCOND(FCONDE,0), MCOND(~FCONDE,~0)|FCC(~1)|F3(~2, ~0x2c, ~0), "7,2,d", 0, v9 }, | |
1128 | { "move", F3(2, 0x2c, 1)|FCC(1)|MCOND(FCONDE,0), MCOND(~FCONDE,~0)|FCC(~1)|F3(~2, ~0x2c, ~1), "7,I,d", 0, v9 }, | |
1129 | { "move", F3(2, 0x2c, 0)|FCC(2)|MCOND(FCONDE,0), MCOND(~FCONDE,~0)|FCC(~2)|F3(~2, ~0x2c, ~0), "8,2,d", 0, v9 }, | |
1130 | { "move", F3(2, 0x2c, 1)|FCC(2)|MCOND(FCONDE,0), MCOND(~FCONDE,~0)|FCC(~2)|F3(~2, ~0x2c, ~1), "8,I,d", 0, v9 }, | |
1131 | { "move", F3(2, 0x2c, 0)|FCC(3)|MCOND(FCONDE,0), MCOND(~FCONDE,~0)|FCC(~3)|F3(~2, ~0x2c, ~0), "9,2,d", 0, v9 }, | |
1132 | { "move", F3(2, 0x2c, 1)|FCC(3)|MCOND(FCONDE,0), MCOND(~FCONDE,~0)|FCC(~3)|F3(~2, ~0x2c, ~1), "9,I,d", 0, v9 }, | |
1133 | { "move", F3(2, 0x2c, 0)|MCOND(CONDE,1)|ICC, F3(~2, ~0x2c, ~0)|MCOND(~CONDE,~1)|XCC|(1<<12), "z,2,d", 0, v9 }, | |
1134 | { "move", F3(2, 0x2c, 1)|MCOND(CONDE,1)|ICC, F3(~2, ~0x2c, ~1)|MCOND(~CONDE,~1)|XCC|(1<<12), "z,I,d", 0, v9 }, | |
1135 | { "move", F3(2, 0x2c, 0)|MCOND(CONDE,1)|XCC, F3(~2, ~0x2c, ~0)|MCOND(~CONDE,~1)|(1<<12), "Z,2,d", 0, v9 }, | |
1136 | { "move", F3(2, 0x2c, 1)|MCOND(CONDE,1)|XCC, F3(~2, ~0x2c, ~1)|MCOND(~CONDE,~1)|(1<<12), "Z,I,d", 0, v9 }, | |
1137 | { "movg", F3(2, 0x2c, 0)|FCC(0)|MCOND(FCONDG,0), MCOND(~FCONDG,~0)|FCC(~0)|F3(~2, ~0x2c, ~0), "6,2,d", 0, v9 }, | |
1138 | { "movg", F3(2, 0x2c, 1)|FCC(0)|MCOND(FCONDG,0), MCOND(~FCONDG,~0)|FCC(~0)|F3(~2, ~0x2c, ~1), "6,I,d", 0, v9 }, | |
1139 | { "movg", F3(2, 0x2c, 0)|FCC(1)|MCOND(FCONDG,0), MCOND(~FCONDG,~0)|FCC(~1)|F3(~2, ~0x2c, ~0), "7,2,d", 0, v9 }, | |
1140 | { "movg", F3(2, 0x2c, 1)|FCC(1)|MCOND(FCONDG,0), MCOND(~FCONDG,~0)|FCC(~1)|F3(~2, ~0x2c, ~1), "7,I,d", 0, v9 }, | |
1141 | { "movg", F3(2, 0x2c, 0)|FCC(2)|MCOND(FCONDG,0), MCOND(~FCONDG,~0)|FCC(~2)|F3(~2, ~0x2c, ~0), "8,2,d", 0, v9 }, | |
1142 | { "movg", F3(2, 0x2c, 1)|FCC(2)|MCOND(FCONDG,0), MCOND(~FCONDG,~0)|FCC(~2)|F3(~2, ~0x2c, ~1), "8,I,d", 0, v9 }, | |
1143 | { "movg", F3(2, 0x2c, 0)|FCC(3)|MCOND(FCONDG,0), MCOND(~FCONDG,~0)|FCC(~3)|F3(~2, ~0x2c, ~0), "9,2,d", 0, v9 }, | |
1144 | { "movg", F3(2, 0x2c, 1)|FCC(3)|MCOND(FCONDG,0), MCOND(~FCONDG,~0)|FCC(~3)|F3(~2, ~0x2c, ~1), "9,I,d", 0, v9 }, | |
1145 | { "movg", F3(2, 0x2c, 0)|MCOND(CONDG,1)|ICC, F3(~2, ~0x2c, ~0)|MCOND(~CONDG,~1)|XCC|(1<<12), "z,2,d", 0, v9 }, | |
1146 | { "movg", F3(2, 0x2c, 1)|MCOND(CONDG,1)|ICC, F3(~2, ~0x2c, ~1)|MCOND(~CONDG,~1)|XCC|(1<<12), "z,I,d", 0, v9 }, | |
1147 | { "movg", F3(2, 0x2c, 0)|MCOND(CONDG,1)|XCC, F3(~2, ~0x2c, ~0)|MCOND(~CONDG,~1)|(1<<12), "Z,2,d", 0, v9 }, | |
1148 | { "movg", F3(2, 0x2c, 1)|MCOND(CONDG,1)|XCC, F3(~2, ~0x2c, ~1)|MCOND(~CONDG,~1)|(1<<12), "Z,I,d", 0, v9 }, | |
1149 | { "movge", F3(2, 0x2c, 0)|FCC(0)|MCOND(FCONDGE,0), MCOND(~FCONDGE,~0)|FCC(~0)|F3(~2, ~0x2c, ~0), "6,2,d", 0, v9 }, | |
1150 | { "movge", F3(2, 0x2c, 1)|FCC(0)|MCOND(FCONDGE,0), MCOND(~FCONDGE,~0)|FCC(~0)|F3(~2, ~0x2c, ~1), "6,I,d", 0, v9 }, | |
1151 | { "movge", F3(2, 0x2c, 0)|FCC(1)|MCOND(FCONDGE,0), MCOND(~FCONDGE,~0)|FCC(~1)|F3(~2, ~0x2c, ~0), "7,2,d", 0, v9 }, | |
1152 | { "movge", F3(2, 0x2c, 1)|FCC(1)|MCOND(FCONDGE,0), MCOND(~FCONDGE,~0)|FCC(~1)|F3(~2, ~0x2c, ~1), "7,I,d", 0, v9 }, | |
1153 | { "movge", F3(2, 0x2c, 0)|FCC(2)|MCOND(FCONDGE,0), MCOND(~FCONDGE,~0)|FCC(~2)|F3(~2, ~0x2c, ~0), "8,2,d", 0, v9 }, | |
1154 | { "movge", F3(2, 0x2c, 1)|FCC(2)|MCOND(FCONDGE,0), MCOND(~FCONDGE,~0)|FCC(~2)|F3(~2, ~0x2c, ~1), "8,I,d", 0, v9 }, | |
1155 | { "movge", F3(2, 0x2c, 0)|FCC(3)|MCOND(FCONDGE,0), MCOND(~FCONDGE,~0)|FCC(~3)|F3(~2, ~0x2c, ~0), "9,2,d", 0, v9 }, | |
1156 | { "movge", F3(2, 0x2c, 1)|FCC(3)|MCOND(FCONDGE,0), MCOND(~FCONDGE,~0)|FCC(~3)|F3(~2, ~0x2c, ~1), "9,I,d", 0, v9 }, | |
1157 | { "movge", F3(2, 0x2c, 0)|MCOND(CONDGE,1)|ICC, F3(~2, ~0x2c, ~0)|MCOND(~CONDGE,~1)|XCC|(1<<12), "z,2,d", 0, v9 }, | |
1158 | { "movge", F3(2, 0x2c, 1)|MCOND(CONDGE,1)|ICC, F3(~2, ~0x2c, ~1)|MCOND(~CONDGE,~1)|XCC|(1<<12), "z,I,d", 0, v9 }, | |
1159 | { "movge", F3(2, 0x2c, 0)|MCOND(CONDGE,1)|XCC, F3(~2, ~0x2c, ~0)|MCOND(~CONDGE,~1)|(1<<12), "Z,2,d", 0, v9 }, | |
1160 | { "movge", F3(2, 0x2c, 1)|MCOND(CONDGE,1)|XCC, F3(~2, ~0x2c, ~1)|MCOND(~CONDGE,~1)|(1<<12), "Z,I,d", 0, v9 }, | |
1161 | { "movgu", F3(2, 0x2c, 0)|MCOND(CONDGU,1)|ICC, F3(~2, ~0x2c, ~0)|MCOND(~CONDGU,~1)|XCC|(1<<12), "z,2,d", 0, v9 }, | |
1162 | { "movgu", F3(2, 0x2c, 1)|MCOND(CONDGU,1)|ICC, F3(~2, ~0x2c, ~1)|MCOND(~CONDGU,~1)|XCC|(1<<12), "z,I,d", 0, v9 }, | |
1163 | { "movgu", F3(2, 0x2c, 0)|MCOND(CONDGU,1)|XCC, F3(~2, ~0x2c, ~0)|MCOND(~CONDGU,~1)|(1<<12), "Z,2,d", 0, v9 }, | |
1164 | { "movgu", F3(2, 0x2c, 1)|MCOND(CONDGU,1)|XCC, F3(~2, ~0x2c, ~1)|MCOND(~CONDGU,~1)|(1<<12), "Z,I,d", 0, v9 }, | |
1165 | { "movl", F3(2, 0x2c, 0)|FCC(0)|MCOND(FCONDL,0), MCOND(~FCONDL,~0)|FCC(~0)|F3(~2, ~0x2c, ~0), "6,2,d", 0, v9 }, | |
1166 | { "movl", F3(2, 0x2c, 1)|FCC(0)|MCOND(FCONDL,0), MCOND(~FCONDL,~0)|FCC(~0)|F3(~2, ~0x2c, ~1), "6,I,d", 0, v9 }, | |
1167 | { "movl", F3(2, 0x2c, 0)|FCC(1)|MCOND(FCONDL,0), MCOND(~FCONDL,~0)|FCC(~1)|F3(~2, ~0x2c, ~0), "7,2,d", 0, v9 }, | |
1168 | { "movl", F3(2, 0x2c, 1)|FCC(1)|MCOND(FCONDL,0), MCOND(~FCONDL,~0)|FCC(~1)|F3(~2, ~0x2c, ~1), "7,I,d", 0, v9 }, | |
1169 | { "movl", F3(2, 0x2c, 0)|FCC(2)|MCOND(FCONDL,0), MCOND(~FCONDL,~0)|FCC(~2)|F3(~2, ~0x2c, ~0), "8,2,d", 0, v9 }, | |
1170 | { "movl", F3(2, 0x2c, 1)|FCC(2)|MCOND(FCONDL,0), MCOND(~FCONDL,~0)|FCC(~2)|F3(~2, ~0x2c, ~1), "8,I,d", 0, v9 }, | |
1171 | { "movl", F3(2, 0x2c, 0)|FCC(3)|MCOND(FCONDL,0), MCOND(~FCONDL,~0)|FCC(~3)|F3(~2, ~0x2c, ~0), "9,2,d", 0, v9 }, | |
1172 | { "movl", F3(2, 0x2c, 1)|FCC(3)|MCOND(FCONDL,0), MCOND(~FCONDL,~0)|FCC(~3)|F3(~2, ~0x2c, ~1), "9,I,d", 0, v9 }, | |
1173 | { "movl", F3(2, 0x2c, 0)|MCOND(CONDL,1)|ICC, F3(~2, ~0x2c, ~0)|MCOND(~CONDL,~1)|XCC|(1<<12), "z,2,d", 0, v9 }, | |
1174 | { "movl", F3(2, 0x2c, 1)|MCOND(CONDL,1)|ICC, F3(~2, ~0x2c, ~1)|MCOND(~CONDL,~1)|XCC|(1<<12), "z,I,d", 0, v9 }, | |
1175 | { "movl", F3(2, 0x2c, 0)|MCOND(CONDL,1)|XCC, F3(~2, ~0x2c, ~0)|MCOND(~CONDL,~1)|(1<<12), "Z,2,d", 0, v9 }, | |
1176 | { "movl", F3(2, 0x2c, 1)|MCOND(CONDL,1)|XCC, F3(~2, ~0x2c, ~1)|MCOND(~CONDL,~1)|(1<<12), "Z,I,d", 0, v9 }, | |
1177 | { "movle", F3(2, 0x2c, 0)|FCC(0)|MCOND(FCONDLE,0), MCOND(~FCONDLE,~0)|FCC(~0)|F3(~2, ~0x2c, ~0), "6,2,d", 0, v9 }, | |
1178 | { "movle", F3(2, 0x2c, 1)|FCC(0)|MCOND(FCONDLE,0), MCOND(~FCONDLE,~0)|FCC(~0)|F3(~2, ~0x2c, ~1), "6,I,d", 0, v9 }, | |
1179 | { "movle", F3(2, 0x2c, 0)|FCC(1)|MCOND(FCONDLE,0), MCOND(~FCONDLE,~0)|FCC(~1)|F3(~2, ~0x2c, ~0), "7,2,d", 0, v9 }, | |
1180 | { "movle", F3(2, 0x2c, 1)|FCC(1)|MCOND(FCONDLE,0), MCOND(~FCONDLE,~0)|FCC(~1)|F3(~2, ~0x2c, ~1), "7,I,d", 0, v9 }, | |
1181 | { "movle", F3(2, 0x2c, 0)|FCC(2)|MCOND(FCONDLE,0), MCOND(~FCONDLE,~0)|FCC(~2)|F3(~2, ~0x2c, ~0), "8,2,d", 0, v9 }, | |
1182 | { "movle", F3(2, 0x2c, 1)|FCC(2)|MCOND(FCONDLE,0), MCOND(~FCONDLE,~0)|FCC(~2)|F3(~2, ~0x2c, ~1), "8,I,d", 0, v9 }, | |
1183 | { "movle", F3(2, 0x2c, 0)|FCC(3)|MCOND(FCONDLE,0), MCOND(~FCONDLE,~0)|FCC(~3)|F3(~2, ~0x2c, ~0), "9,2,d", 0, v9 }, | |
1184 | { "movle", F3(2, 0x2c, 1)|FCC(3)|MCOND(FCONDLE,0), MCOND(~FCONDLE,~0)|FCC(~3)|F3(~2, ~0x2c, ~1), "9,I,d", 0, v9 }, | |
1185 | { "movle", F3(2, 0x2c, 0)|MCOND(CONDLE,1)|ICC, F3(~2, ~0x2c, ~0)|MCOND(~CONDLE,~1)|XCC|(1<<12), "z,2,d", 0, v9 }, | |
1186 | { "movle", F3(2, 0x2c, 1)|MCOND(CONDLE,1)|ICC, F3(~2, ~0x2c, ~1)|MCOND(~CONDLE,~1)|XCC|(1<<12), "z,I,d", 0, v9 }, | |
1187 | { "movle", F3(2, 0x2c, 0)|MCOND(CONDLE,1)|XCC, F3(~2, ~0x2c, ~0)|MCOND(~CONDLE,~1)|(1<<12), "Z,2,d", 0, v9 }, | |
1188 | { "movle", F3(2, 0x2c, 1)|MCOND(CONDLE,1)|XCC, F3(~2, ~0x2c, ~1)|MCOND(~CONDLE,~1)|(1<<12), "Z,I,d", 0, v9 }, | |
1189 | { "movleu", F3(2, 0x2c, 0)|MCOND(CONDLEU,1)|ICC, F3(~2, ~0x2c, ~0)|MCOND(~CONDLEU,~1)|XCC|(1<<12), "z,2,d", 0, v9 }, | |
1190 | { "movleu", F3(2, 0x2c, 1)|MCOND(CONDLEU,1)|ICC, F3(~2, ~0x2c, ~1)|MCOND(~CONDLEU,~1)|XCC|(1<<12), "z,I,d", 0, v9 }, | |
1191 | { "movleu", F3(2, 0x2c, 0)|MCOND(CONDLEU,1)|XCC, F3(~2, ~0x2c, ~0)|MCOND(~CONDLEU,~1)|(1<<12), "Z,2,d", 0, v9 }, | |
1192 | { "movleu", F3(2, 0x2c, 1)|MCOND(CONDLEU,1)|XCC, F3(~2, ~0x2c, ~1)|MCOND(~CONDLEU,~1)|(1<<12), "Z,I,d", 0, v9 }, | |
1193 | { "movlg", F3(2, 0x2c, 0)|FCC(0)|MCOND(FCONDLG,0), MCOND(~FCONDLG,~0)|FCC(~0)|F3(~2, ~0x2c, ~0), "6,2,d", 0, v9 }, | |
1194 | { "movlg", F3(2, 0x2c, 1)|FCC(0)|MCOND(FCONDLG,0), MCOND(~FCONDLG,~0)|FCC(~0)|F3(~2, ~0x2c, ~1), "6,I,d", 0, v9 }, | |
1195 | { "movlg", F3(2, 0x2c, 0)|FCC(1)|MCOND(FCONDLG,0), MCOND(~FCONDLG,~0)|FCC(~1)|F3(~2, ~0x2c, ~0), "7,2,d", 0, v9 }, | |
1196 | { "movlg", F3(2, 0x2c, 1)|FCC(1)|MCOND(FCONDLG,0), MCOND(~FCONDLG,~0)|FCC(~1)|F3(~2, ~0x2c, ~1), "7,I,d", 0, v9 }, | |
1197 | { "movlg", F3(2, 0x2c, 0)|FCC(2)|MCOND(FCONDLG,0), MCOND(~FCONDLG,~0)|FCC(~2)|F3(~2, ~0x2c, ~0), "8,2,d", 0, v9 }, | |
1198 | { "movlg", F3(2, 0x2c, 1)|FCC(2)|MCOND(FCONDLG,0), MCOND(~FCONDLG,~0)|FCC(~2)|F3(~2, ~0x2c, ~1), "8,I,d", 0, v9 }, | |
1199 | { "movlg", F3(2, 0x2c, 0)|FCC(3)|MCOND(FCONDLG,0), MCOND(~FCONDLG,~0)|FCC(~3)|F3(~2, ~0x2c, ~0), "9,2,d", 0, v9 }, | |
1200 | { "movlg", F3(2, 0x2c, 1)|FCC(3)|MCOND(FCONDLG,0), MCOND(~FCONDLG,~0)|FCC(~3)|F3(~2, ~0x2c, ~1), "9,I,d", 0, v9 }, | |
1201 | { "movn", F3(2, 0x2c, 0)|FCC(0)|MCOND(FCONDN,0), MCOND(~FCONDN,~0)|FCC(~0)|F3(~2, ~0x2c, ~0), "6,2,d", 0, v9 }, | |
1202 | { "movn", F3(2, 0x2c, 1)|FCC(0)|MCOND(FCONDN,0), MCOND(~FCONDN,~0)|FCC(~0)|F3(~2, ~0x2c, ~1), "6,I,d", 0, v9 }, | |
1203 | { "movn", F3(2, 0x2c, 0)|FCC(1)|MCOND(FCONDN,0), MCOND(~FCONDN,~0)|FCC(~1)|F3(~2, ~0x2c, ~0), "7,2,d", 0, v9 }, | |
1204 | { "movn", F3(2, 0x2c, 1)|FCC(1)|MCOND(FCONDN,0), MCOND(~FCONDN,~0)|FCC(~1)|F3(~2, ~0x2c, ~1), "7,I,d", 0, v9 }, | |
1205 | { "movn", F3(2, 0x2c, 0)|FCC(2)|MCOND(FCONDN,0), MCOND(~FCONDN,~0)|FCC(~2)|F3(~2, ~0x2c, ~0), "8,2,d", 0, v9 }, | |
1206 | { "movn", F3(2, 0x2c, 1)|FCC(2)|MCOND(FCONDN,0), MCOND(~FCONDN,~0)|FCC(~2)|F3(~2, ~0x2c, ~1), "8,I,d", 0, v9 }, | |
1207 | { "movn", F3(2, 0x2c, 0)|FCC(3)|MCOND(FCONDN,0), MCOND(~FCONDN,~0)|FCC(~3)|F3(~2, ~0x2c, ~0), "9,2,d", 0, v9 }, | |
1208 | { "movn", F3(2, 0x2c, 1)|FCC(3)|MCOND(FCONDN,0), MCOND(~FCONDN,~0)|FCC(~3)|F3(~2, ~0x2c, ~1), "9,I,d", 0, v9 }, | |
1209 | { "movn", F3(2, 0x2c, 0)|MCOND(CONDN,1)|ICC, F3(~2, ~0x2c, ~0)|MCOND(~CONDN,~1)|XCC|(1<<12), "z,2,d", 0, v9 }, | |
1210 | { "movn", F3(2, 0x2c, 1)|MCOND(CONDN,1)|ICC, F3(~2, ~0x2c, ~1)|MCOND(~CONDN,~1)|XCC|(1<<12), "z,I,d", 0, v9 }, | |
1211 | { "movn", F3(2, 0x2c, 0)|MCOND(CONDN,1)|XCC, F3(~2, ~0x2c, ~0)|MCOND(~CONDN,~1)|(1<<12), "Z,2,d", 0, v9 }, | |
1212 | { "movn", F3(2, 0x2c, 1)|MCOND(CONDN,1)|XCC, F3(~2, ~0x2c, ~1)|MCOND(~CONDN,~1)|(1<<12), "Z,I,d", 0, v9 }, | |
1213 | { "movne", F3(2, 0x2c, 0)|FCC(0)|MCOND(FCONDNE,0), MCOND(~FCONDNE,~0)|FCC(~0)|F3(~2, ~0x2c, ~0), "6,2,d", 0, v9 }, | |
1214 | { "movne", F3(2, 0x2c, 1)|FCC(0)|MCOND(FCONDNE,0), MCOND(~FCONDNE,~0)|FCC(~0)|F3(~2, ~0x2c, ~1), "6,I,d", 0, v9 }, | |
1215 | { "movne", F3(2, 0x2c, 0)|FCC(1)|MCOND(FCONDNE,0), MCOND(~FCONDNE,~0)|FCC(~1)|F3(~2, ~0x2c, ~0), "7,2,d", 0, v9 }, | |
1216 | { "movne", F3(2, 0x2c, 1)|FCC(1)|MCOND(FCONDNE,0), MCOND(~FCONDNE,~0)|FCC(~1)|F3(~2, ~0x2c, ~1), "7,I,d", 0, v9 }, | |
1217 | { "movne", F3(2, 0x2c, 0)|FCC(2)|MCOND(FCONDNE,0), MCOND(~FCONDNE,~0)|FCC(~2)|F3(~2, ~0x2c, ~0), "8,2,d", 0, v9 }, | |
1218 | { "movne", F3(2, 0x2c, 1)|FCC(2)|MCOND(FCONDNE,0), MCOND(~FCONDNE,~0)|FCC(~2)|F3(~2, ~0x2c, ~1), "8,I,d", 0, v9 }, | |
1219 | { "movne", F3(2, 0x2c, 0)|FCC(3)|MCOND(FCONDNE,0), MCOND(~FCONDNE,~0)|FCC(~3)|F3(~2, ~0x2c, ~0), "9,2,d", 0, v9 }, | |
1220 | { "movne", F3(2, 0x2c, 1)|FCC(3)|MCOND(FCONDNE,0), MCOND(~FCONDNE,~0)|FCC(~3)|F3(~2, ~0x2c, ~1), "9,I,d", 0, v9 }, | |
1221 | { "movne", F3(2, 0x2c, 0)|MCOND(CONDNE,1)|ICC, F3(~2, ~0x2c, ~0)|MCOND(~CONDNE,~1)|XCC|(1<<12), "z,2,d", 0, v9 }, | |
1222 | { "movne", F3(2, 0x2c, 1)|MCOND(CONDNE,1)|ICC, F3(~2, ~0x2c, ~1)|MCOND(~CONDNE,~1)|XCC|(1<<12), "z,I,d", 0, v9 }, | |
1223 | { "movne", F3(2, 0x2c, 0)|MCOND(CONDNE,1)|XCC, F3(~2, ~0x2c, ~0)|MCOND(~CONDNE,~1)|(1<<12), "Z,2,d", 0, v9 }, | |
1224 | { "movne", F3(2, 0x2c, 1)|MCOND(CONDNE,1)|XCC, F3(~2, ~0x2c, ~1)|MCOND(~CONDNE,~1)|(1<<12), "Z,I,d", 0, v9 }, | |
1225 | { "movneg", F3(2, 0x2c, 0)|MCOND(CONDNEG,1)|ICC, F3(~2, ~0x2c, ~0)|MCOND(~CONDNEG,~1)|XCC|(1<<12), "z,2,d", 0, v9 }, | |
1226 | { "movneg", F3(2, 0x2c, 1)|MCOND(CONDNEG,1)|ICC, F3(~2, ~0x2c, ~1)|MCOND(~CONDNEG,~1)|XCC|(1<<12), "z,I,d", 0, v9 }, | |
1227 | { "movneg", F3(2, 0x2c, 0)|MCOND(CONDNEG,1)|XCC, F3(~2, ~0x2c, ~0)|MCOND(~CONDNEG,~1)|(1<<12), "Z,2,d", 0, v9 }, | |
1228 | { "movneg", F3(2, 0x2c, 1)|MCOND(CONDNEG,1)|XCC, F3(~2, ~0x2c, ~1)|MCOND(~CONDNEG,~1)|(1<<12), "Z,I,d", 0, v9 }, | |
1229 | { "movnz", F3(2, 0x2c, 0)|FCC(0)|MCOND(FCONDNZ,0), MCOND(~FCONDNZ,~0)|FCC(~0)|F3(~2, ~0x2c, ~0), "6,2,d", F_ALIAS, v9 }, | |
1230 | { "movnz", F3(2, 0x2c, 1)|FCC(0)|MCOND(FCONDNZ,0), MCOND(~FCONDNZ,~0)|FCC(~0)|F3(~2, ~0x2c, ~1), "6,I,d", F_ALIAS, v9 }, | |
1231 | { "movnz", F3(2, 0x2c, 0)|FCC(1)|MCOND(FCONDNZ,0), MCOND(~FCONDNZ,~0)|FCC(~1)|F3(~2, ~0x2c, ~0), "7,2,d", F_ALIAS, v9 }, | |
1232 | { "movnz", F3(2, 0x2c, 1)|FCC(1)|MCOND(FCONDNZ,0), MCOND(~FCONDNZ,~0)|FCC(~1)|F3(~2, ~0x2c, ~1), "7,I,d", F_ALIAS, v9 }, | |
1233 | { "movnz", F3(2, 0x2c, 0)|FCC(2)|MCOND(FCONDNZ,0), MCOND(~FCONDNZ,~0)|FCC(~2)|F3(~2, ~0x2c, ~0), "8,2,d", F_ALIAS, v9 }, | |
1234 | { "movnz", F3(2, 0x2c, 1)|FCC(2)|MCOND(FCONDNZ,0), MCOND(~FCONDNZ,~0)|FCC(~2)|F3(~2, ~0x2c, ~1), "8,I,d", F_ALIAS, v9 }, | |
1235 | { "movnz", F3(2, 0x2c, 0)|FCC(3)|MCOND(FCONDNZ,0), MCOND(~FCONDNZ,~0)|FCC(~3)|F3(~2, ~0x2c, ~0), "9,2,d", F_ALIAS, v9 }, | |
1236 | { "movnz", F3(2, 0x2c, 1)|FCC(3)|MCOND(FCONDNZ,0), MCOND(~FCONDNZ,~0)|FCC(~3)|F3(~2, ~0x2c, ~1), "9,I,d", F_ALIAS, v9 }, | |
493d3e75 KR |
1237 | { "movnz", F3(2, 0x2c, 0)|MCOND(CONDNZ,1)|ICC, F3(~2, ~0x2c, ~0)|MCOND(~CONDNZ,~1)|XCC|(1<<12), "z,2,d", F_ALIAS, v9 }, |
1238 | { "movnz", F3(2, 0x2c, 1)|MCOND(CONDNZ,1)|ICC, F3(~2, ~0x2c, ~1)|MCOND(~CONDNZ,~1)|XCC|(1<<12), "z,I,d", F_ALIAS, v9 }, | |
1239 | { "movnz", F3(2, 0x2c, 0)|MCOND(CONDNZ,1)|XCC, F3(~2, ~0x2c, ~0)|MCOND(~CONDNZ,~1)|(1<<12), "Z,2,d", F_ALIAS, v9 }, | |
1240 | { "movnz", F3(2, 0x2c, 1)|MCOND(CONDNZ,1)|XCC, F3(~2, ~0x2c, ~1)|MCOND(~CONDNZ,~1)|(1<<12), "Z,I,d", F_ALIAS, v9 }, | |
794a16b0 KR |
1241 | { "movo", F3(2, 0x2c, 0)|FCC(0)|MCOND(FCONDO,0), MCOND(~FCONDO,~0)|FCC(~0)|F3(~2, ~0x2c, ~0), "6,2,d", 0, v9 }, |
1242 | { "movo", F3(2, 0x2c, 1)|FCC(0)|MCOND(FCONDO,0), MCOND(~FCONDO,~0)|FCC(~0)|F3(~2, ~0x2c, ~1), "6,I,d", 0, v9 }, | |
1243 | { "movo", F3(2, 0x2c, 0)|FCC(1)|MCOND(FCONDO,0), MCOND(~FCONDO,~0)|FCC(~1)|F3(~2, ~0x2c, ~0), "7,2,d", 0, v9 }, | |
1244 | { "movo", F3(2, 0x2c, 1)|FCC(1)|MCOND(FCONDO,0), MCOND(~FCONDO,~0)|FCC(~1)|F3(~2, ~0x2c, ~1), "7,I,d", 0, v9 }, | |
1245 | { "movo", F3(2, 0x2c, 0)|FCC(2)|MCOND(FCONDO,0), MCOND(~FCONDO,~0)|FCC(~2)|F3(~2, ~0x2c, ~0), "8,2,d", 0, v9 }, | |
1246 | { "movo", F3(2, 0x2c, 1)|FCC(2)|MCOND(FCONDO,0), MCOND(~FCONDO,~0)|FCC(~2)|F3(~2, ~0x2c, ~1), "8,I,d", 0, v9 }, | |
1247 | { "movo", F3(2, 0x2c, 0)|FCC(3)|MCOND(FCONDO,0), MCOND(~FCONDO,~0)|FCC(~3)|F3(~2, ~0x2c, ~0), "9,2,d", 0, v9 }, | |
1248 | { "movo", F3(2, 0x2c, 1)|FCC(3)|MCOND(FCONDO,0), MCOND(~FCONDO,~0)|FCC(~3)|F3(~2, ~0x2c, ~1), "9,I,d", 0, v9 }, | |
1249 | { "movpos", F3(2, 0x2c, 0)|MCOND(CONDPOS,1)|ICC, F3(~2, ~0x2c, ~0)|MCOND(~CONDPOS,~1)|XCC|(1<<12), "z,2,d", 0, v9 }, | |
1250 | { "movpos", F3(2, 0x2c, 1)|MCOND(CONDPOS,1)|ICC, F3(~2, ~0x2c, ~1)|MCOND(~CONDPOS,~1)|XCC|(1<<12), "z,I,d", 0, v9 }, | |
1251 | { "movpos", F3(2, 0x2c, 0)|MCOND(CONDPOS,1)|XCC, F3(~2, ~0x2c, ~0)|MCOND(~CONDPOS,~1)|(1<<12), "Z,2,d", 0, v9 }, | |
1252 | { "movpos", F3(2, 0x2c, 1)|MCOND(CONDPOS,1)|XCC, F3(~2, ~0x2c, ~1)|MCOND(~CONDPOS,~1)|(1<<12), "Z,I,d", 0, v9 }, | |
1253 | { "movu", F3(2, 0x2c, 0)|FCC(0)|MCOND(FCONDU,0), MCOND(~FCONDU,~0)|FCC(~0)|F3(~2, ~0x2c, ~0), "6,2,d", 0, v9 }, | |
1254 | { "movu", F3(2, 0x2c, 1)|FCC(0)|MCOND(FCONDU,0), MCOND(~FCONDU,~0)|FCC(~0)|F3(~2, ~0x2c, ~1), "6,I,d", 0, v9 }, | |
1255 | { "movu", F3(2, 0x2c, 0)|FCC(1)|MCOND(FCONDU,0), MCOND(~FCONDU,~0)|FCC(~1)|F3(~2, ~0x2c, ~0), "7,2,d", 0, v9 }, | |
1256 | { "movu", F3(2, 0x2c, 1)|FCC(1)|MCOND(FCONDU,0), MCOND(~FCONDU,~0)|FCC(~1)|F3(~2, ~0x2c, ~1), "7,I,d", 0, v9 }, | |
1257 | { "movu", F3(2, 0x2c, 0)|FCC(2)|MCOND(FCONDU,0), MCOND(~FCONDU,~0)|FCC(~2)|F3(~2, ~0x2c, ~0), "8,2,d", 0, v9 }, | |
1258 | { "movu", F3(2, 0x2c, 1)|FCC(2)|MCOND(FCONDU,0), MCOND(~FCONDU,~0)|FCC(~2)|F3(~2, ~0x2c, ~1), "8,I,d", 0, v9 }, | |
1259 | { "movu", F3(2, 0x2c, 0)|FCC(3)|MCOND(FCONDU,0), MCOND(~FCONDU,~0)|FCC(~3)|F3(~2, ~0x2c, ~0), "9,2,d", 0, v9 }, | |
1260 | { "movu", F3(2, 0x2c, 1)|FCC(3)|MCOND(FCONDU,0), MCOND(~FCONDU,~0)|FCC(~3)|F3(~2, ~0x2c, ~1), "9,I,d", 0, v9 }, | |
1261 | { "movue", F3(2, 0x2c, 0)|FCC(0)|MCOND(FCONDUE,0), MCOND(~FCONDUE,~0)|FCC(~0)|F3(~2, ~0x2c, ~0), "6,2,d", 0, v9 }, | |
1262 | { "movue", F3(2, 0x2c, 1)|FCC(0)|MCOND(FCONDUE,0), MCOND(~FCONDUE,~0)|FCC(~0)|F3(~2, ~0x2c, ~1), "6,I,d", 0, v9 }, | |
1263 | { "movue", F3(2, 0x2c, 0)|FCC(1)|MCOND(FCONDUE,0), MCOND(~FCONDUE,~0)|FCC(~1)|F3(~2, ~0x2c, ~0), "7,2,d", 0, v9 }, | |
1264 | { "movue", F3(2, 0x2c, 1)|FCC(1)|MCOND(FCONDUE,0), MCOND(~FCONDUE,~0)|FCC(~1)|F3(~2, ~0x2c, ~1), "7,I,d", 0, v9 }, | |
1265 | { "movue", F3(2, 0x2c, 0)|FCC(2)|MCOND(FCONDUE,0), MCOND(~FCONDUE,~0)|FCC(~2)|F3(~2, ~0x2c, ~0), "8,2,d", 0, v9 }, | |
1266 | { "movue", F3(2, 0x2c, 1)|FCC(2)|MCOND(FCONDUE,0), MCOND(~FCONDUE,~0)|FCC(~2)|F3(~2, ~0x2c, ~1), "8,I,d", 0, v9 }, | |
1267 | { "movue", F3(2, 0x2c, 0)|FCC(3)|MCOND(FCONDUE,0), MCOND(~FCONDUE,~0)|FCC(~3)|F3(~2, ~0x2c, ~0), "9,2,d", 0, v9 }, | |
1268 | { "movue", F3(2, 0x2c, 1)|FCC(3)|MCOND(FCONDUE,0), MCOND(~FCONDUE,~0)|FCC(~3)|F3(~2, ~0x2c, ~1), "9,I,d", 0, v9 }, | |
1269 | { "movug", F3(2, 0x2c, 0)|FCC(0)|MCOND(FCONDUG,0), MCOND(~FCONDUG,~0)|FCC(~0)|F3(~2, ~0x2c, ~0), "6,2,d", 0, v9 }, | |
1270 | { "movug", F3(2, 0x2c, 1)|FCC(0)|MCOND(FCONDUG,0), MCOND(~FCONDUG,~0)|FCC(~0)|F3(~2, ~0x2c, ~1), "6,I,d", 0, v9 }, | |
1271 | { "movug", F3(2, 0x2c, 0)|FCC(1)|MCOND(FCONDUG,0), MCOND(~FCONDUG,~0)|FCC(~1)|F3(~2, ~0x2c, ~0), "7,2,d", 0, v9 }, | |
1272 | { "movug", F3(2, 0x2c, 1)|FCC(1)|MCOND(FCONDUG,0), MCOND(~FCONDUG,~0)|FCC(~1)|F3(~2, ~0x2c, ~1), "7,I,d", 0, v9 }, | |
1273 | { "movug", F3(2, 0x2c, 0)|FCC(2)|MCOND(FCONDUG,0), MCOND(~FCONDUG,~0)|FCC(~2)|F3(~2, ~0x2c, ~0), "8,2,d", 0, v9 }, | |
1274 | { "movug", F3(2, 0x2c, 1)|FCC(2)|MCOND(FCONDUG,0), MCOND(~FCONDUG,~0)|FCC(~2)|F3(~2, ~0x2c, ~1), "8,I,d", 0, v9 }, | |
1275 | { "movug", F3(2, 0x2c, 0)|FCC(3)|MCOND(FCONDUG,0), MCOND(~FCONDUG,~0)|FCC(~3)|F3(~2, ~0x2c, ~0), "9,2,d", 0, v9 }, | |
1276 | { "movug", F3(2, 0x2c, 1)|FCC(3)|MCOND(FCONDUG,0), MCOND(~FCONDUG,~0)|FCC(~3)|F3(~2, ~0x2c, ~1), "9,I,d", 0, v9 }, | |
1277 | { "movuge", F3(2, 0x2c, 0)|FCC(0)|MCOND(FCONDUGE,0), MCOND(~FCONDUGE,~0)|FCC(~0)|F3(~2, ~0x2c, ~0), "6,2,d", 0, v9 }, | |
1278 | { "movuge", F3(2, 0x2c, 1)|FCC(0)|MCOND(FCONDUGE,0), MCOND(~FCONDUGE,~0)|FCC(~0)|F3(~2, ~0x2c, ~1), "6,I,d", 0, v9 }, | |
1279 | { "movuge", F3(2, 0x2c, 0)|FCC(1)|MCOND(FCONDUGE,0), MCOND(~FCONDUGE,~0)|FCC(~1)|F3(~2, ~0x2c, ~0), "7,2,d", 0, v9 }, | |
1280 | { "movuge", F3(2, 0x2c, 1)|FCC(1)|MCOND(FCONDUGE,0), MCOND(~FCONDUGE,~0)|FCC(~1)|F3(~2, ~0x2c, ~1), "7,I,d", 0, v9 }, | |
1281 | { "movuge", F3(2, 0x2c, 0)|FCC(2)|MCOND(FCONDUGE,0), MCOND(~FCONDUGE,~0)|FCC(~2)|F3(~2, ~0x2c, ~0), "8,2,d", 0, v9 }, | |
1282 | { "movuge", F3(2, 0x2c, 1)|FCC(2)|MCOND(FCONDUGE,0), MCOND(~FCONDUGE,~0)|FCC(~2)|F3(~2, ~0x2c, ~1), "8,I,d", 0, v9 }, | |
1283 | { "movuge", F3(2, 0x2c, 0)|FCC(3)|MCOND(FCONDUGE,0), MCOND(~FCONDUGE,~0)|FCC(~3)|F3(~2, ~0x2c, ~0), "9,2,d", 0, v9 }, | |
1284 | { "movuge", F3(2, 0x2c, 1)|FCC(3)|MCOND(FCONDUGE,0), MCOND(~FCONDUGE,~0)|FCC(~3)|F3(~2, ~0x2c, ~1), "9,I,d", 0, v9 }, | |
1285 | { "movul", F3(2, 0x2c, 0)|FCC(0)|MCOND(FCONDUL,0), MCOND(~FCONDUL,~0)|FCC(~0)|F3(~2, ~0x2c, ~0), "6,2,d", 0, v9 }, | |
1286 | { "movul", F3(2, 0x2c, 1)|FCC(0)|MCOND(FCONDUL,0), MCOND(~FCONDUL,~0)|FCC(~0)|F3(~2, ~0x2c, ~1), "6,I,d", 0, v9 }, | |
1287 | { "movul", F3(2, 0x2c, 0)|FCC(1)|MCOND(FCONDUL,0), MCOND(~FCONDUL,~0)|FCC(~1)|F3(~2, ~0x2c, ~0), "7,2,d", 0, v9 }, | |
1288 | { "movul", F3(2, 0x2c, 1)|FCC(1)|MCOND(FCONDUL,0), MCOND(~FCONDUL,~0)|FCC(~1)|F3(~2, ~0x2c, ~1), "7,I,d", 0, v9 }, | |
1289 | { "movul", F3(2, 0x2c, 0)|FCC(2)|MCOND(FCONDUL,0), MCOND(~FCONDUL,~0)|FCC(~2)|F3(~2, ~0x2c, ~0), "8,2,d", 0, v9 }, | |
1290 | { "movul", F3(2, 0x2c, 1)|FCC(2)|MCOND(FCONDUL,0), MCOND(~FCONDUL,~0)|FCC(~2)|F3(~2, ~0x2c, ~1), "8,I,d", 0, v9 }, | |
1291 | { "movul", F3(2, 0x2c, 0)|FCC(3)|MCOND(FCONDUL,0), MCOND(~FCONDUL,~0)|FCC(~3)|F3(~2, ~0x2c, ~0), "9,2,d", 0, v9 }, | |
1292 | { "movul", F3(2, 0x2c, 1)|FCC(3)|MCOND(FCONDUL,0), MCOND(~FCONDUL,~0)|FCC(~3)|F3(~2, ~0x2c, ~1), "9,I,d", 0, v9 }, | |
1293 | { "movule", F3(2, 0x2c, 0)|FCC(0)|MCOND(FCONDULE,0), MCOND(~FCONDULE,~0)|FCC(~0)|F3(~2, ~0x2c, ~0), "6,2,d", 0, v9 }, | |
1294 | { "movule", F3(2, 0x2c, 1)|FCC(0)|MCOND(FCONDULE,0), MCOND(~FCONDULE,~0)|FCC(~0)|F3(~2, ~0x2c, ~1), "6,I,d", 0, v9 }, | |
1295 | { "movule", F3(2, 0x2c, 0)|FCC(1)|MCOND(FCONDULE,0), MCOND(~FCONDULE,~0)|FCC(~1)|F3(~2, ~0x2c, ~0), "7,2,d", 0, v9 }, | |
1296 | { "movule", F3(2, 0x2c, 1)|FCC(1)|MCOND(FCONDULE,0), MCOND(~FCONDULE,~0)|FCC(~1)|F3(~2, ~0x2c, ~1), "7,I,d", 0, v9 }, | |
1297 | { "movule", F3(2, 0x2c, 0)|FCC(2)|MCOND(FCONDULE,0), MCOND(~FCONDULE,~0)|FCC(~2)|F3(~2, ~0x2c, ~0), "8,2,d", 0, v9 }, | |
1298 | { "movule", F3(2, 0x2c, 1)|FCC(2)|MCOND(FCONDULE,0), MCOND(~FCONDULE,~0)|FCC(~2)|F3(~2, ~0x2c, ~1), "8,I,d", 0, v9 }, | |
1299 | { "movule", F3(2, 0x2c, 0)|FCC(3)|MCOND(FCONDULE,0), MCOND(~FCONDULE,~0)|FCC(~3)|F3(~2, ~0x2c, ~0), "9,2,d", 0, v9 }, | |
1300 | { "movule", F3(2, 0x2c, 1)|FCC(3)|MCOND(FCONDULE,0), MCOND(~FCONDULE,~0)|FCC(~3)|F3(~2, ~0x2c, ~1), "9,I,d", 0, v9 }, | |
1301 | { "movvc", F3(2, 0x2c, 0)|MCOND(CONDVC,1)|ICC, F3(~2, ~0x2c, ~0)|MCOND(~CONDVC,~1)|XCC|(1<<12), "z,2,d", 0, v9 }, | |
1302 | { "movvc", F3(2, 0x2c, 1)|MCOND(CONDVC,1)|ICC, F3(~2, ~0x2c, ~1)|MCOND(~CONDVC,~1)|XCC|(1<<12), "z,I,d", 0, v9 }, | |
1303 | { "movvc", F3(2, 0x2c, 0)|MCOND(CONDVC,1)|XCC, F3(~2, ~0x2c, ~0)|MCOND(~CONDVC,~1)|(1<<12), "Z,2,d", 0, v9 }, | |
1304 | { "movvc", F3(2, 0x2c, 1)|MCOND(CONDVC,1)|XCC, F3(~2, ~0x2c, ~1)|MCOND(~CONDVC,~1)|(1<<12), "Z,I,d", 0, v9 }, | |
1305 | { "movvs", F3(2, 0x2c, 0)|MCOND(CONDVS,1)|ICC, F3(~2, ~0x2c, ~0)|MCOND(~CONDVS,~1)|XCC|(1<<12), "z,2,d", 0, v9 }, | |
1306 | { "movvs", F3(2, 0x2c, 1)|MCOND(CONDVS,1)|ICC, F3(~2, ~0x2c, ~1)|MCOND(~CONDVS,~1)|XCC|(1<<12), "z,I,d", 0, v9 }, | |
1307 | { "movvs", F3(2, 0x2c, 0)|MCOND(CONDVS,1)|XCC, F3(~2, ~0x2c, ~0)|MCOND(~CONDVS,~1)|(1<<12), "Z,2,d", 0, v9 }, | |
1308 | { "movvs", F3(2, 0x2c, 1)|MCOND(CONDVS,1)|XCC, F3(~2, ~0x2c, ~1)|MCOND(~CONDVS,~1)|(1<<12), "Z,I,d", 0, v9 }, | |
1309 | { "movz", F3(2, 0x2c, 0)|FCC(0)|MCOND(FCONDZ,0), MCOND(~FCONDZ,~0)|FCC(~0)|F3(~2, ~0x2c, ~0), "6,2,d", F_ALIAS, v9 }, | |
1310 | { "movz", F3(2, 0x2c, 1)|FCC(0)|MCOND(FCONDZ,0), MCOND(~FCONDZ,~0)|FCC(~0)|F3(~2, ~0x2c, ~1), "6,I,d", F_ALIAS, v9 }, | |
1311 | { "movz", F3(2, 0x2c, 0)|FCC(1)|MCOND(FCONDZ,0), MCOND(~FCONDZ,~0)|FCC(~1)|F3(~2, ~0x2c, ~0), "7,2,d", F_ALIAS, v9 }, | |
1312 | { "movz", F3(2, 0x2c, 1)|FCC(1)|MCOND(FCONDZ,0), MCOND(~FCONDZ,~0)|FCC(~1)|F3(~2, ~0x2c, ~1), "7,I,d", F_ALIAS, v9 }, | |
1313 | { "movz", F3(2, 0x2c, 0)|FCC(2)|MCOND(FCONDZ,0), MCOND(~FCONDZ,~0)|FCC(~2)|F3(~2, ~0x2c, ~0), "8,2,d", F_ALIAS, v9 }, | |
1314 | { "movz", F3(2, 0x2c, 1)|FCC(2)|MCOND(FCONDZ,0), MCOND(~FCONDZ,~0)|FCC(~2)|F3(~2, ~0x2c, ~1), "8,I,d", F_ALIAS, v9 }, | |
1315 | { "movz", F3(2, 0x2c, 0)|FCC(3)|MCOND(FCONDZ,0), MCOND(~FCONDZ,~0)|FCC(~3)|F3(~2, ~0x2c, ~0), "9,2,d", F_ALIAS, v9 }, | |
1316 | { "movz", F3(2, 0x2c, 1)|FCC(3)|MCOND(FCONDZ,0), MCOND(~FCONDZ,~0)|FCC(~3)|F3(~2, ~0x2c, ~1), "9,I,d", F_ALIAS, v9 }, | |
493d3e75 KR |
1317 | { "movz", F3(2, 0x2c, 0)|MCOND(CONDZ,1)|ICC, F3(~2, ~0x2c, ~0)|MCOND(~CONDZ,~1)|XCC|(1<<12), "z,2,d", F_ALIAS, v9 }, |
1318 | { "movz", F3(2, 0x2c, 1)|MCOND(CONDZ,1)|ICC, F3(~2, ~0x2c, ~1)|MCOND(~CONDZ,~1)|XCC|(1<<12), "z,I,d", F_ALIAS, v9 }, | |
1319 | { "movz", F3(2, 0x2c, 0)|MCOND(CONDZ,1)|XCC, F3(~2, ~0x2c, ~0)|MCOND(~CONDZ,~1)|(1<<12), "Z,2,d", F_ALIAS, v9 }, | |
1320 | { "movz", F3(2, 0x2c, 1)|MCOND(CONDZ,1)|XCC, F3(~2, ~0x2c, ~1)|MCOND(~CONDZ,~1)|(1<<12), "Z,I,d", F_ALIAS, v9 }, | |
1321 | ||
1322 | { "fmovda", F3F(2, 0x35, 0x102)|MCOND(CONDA,0), F3F(~2, ~0x35, ~0x102)|MCOND(~CONDA,~0), "z,f,g", 0, v9 }, | |
1323 | { "fmovda", F3F(2, 0x35, 0x082)|MCOND(FCONDA,0), F3F(~2, ~0x35, ~0x082)|MCOND(~FCONDA,~0), "6,f,g", 0, v9 }, | |
1324 | { "fmovda", F3F(2, 0x35, 0x182)|MCOND(CONDA,0), F3F(~2, ~0x35, ~0x182)|MCOND(~CONDA,~0), "Z,f,g", 0, v9 }, | |
1325 | { "fmovda", F3F(2, 0x35, 0x0a2)|MCOND(FCONDA,0), F3F(~2, ~0x35, ~0x0a2)|MCOND(~FCONDA,~0), "7,f,g", 0, v9 }, | |
1326 | { "fmovda", F3F(2, 0x35, 0x0c2)|MCOND(FCONDA,0), F3F(~2, ~0x35, ~0x0c2)|MCOND(~FCONDA,~0), "8,f,g", 0, v9 }, | |
1327 | { "fmovda", F3F(2, 0x35, 0x0e2)|MCOND(FCONDA,0), F3F(~2, ~0x35, ~0x0e2)|MCOND(~FCONDA,~0), "9,f,g", 0, v9 }, | |
1328 | { "fmovqa", F3F(2, 0x35, 0x103)|MCOND(CONDA,0), F3F(~2, ~0x35, ~0x103)|MCOND(~CONDA,~0), "z,f,g", 0, v9 }, | |
1329 | { "fmovqa", F3F(2, 0x35, 0x083)|MCOND(FCONDA,0), F3F(~2, ~0x35, ~0x083)|MCOND(~FCONDA,~0), "6,f,g", 0, v9 }, | |
1330 | { "fmovqa", F3F(2, 0x35, 0x183)|MCOND(CONDA,0), F3F(~2, ~0x35, ~0x183)|MCOND(~CONDA,~0), "Z,f,g", 0, v9 }, | |
1331 | { "fmovqa", F3F(2, 0x35, 0x0a3)|MCOND(FCONDA,0), F3F(~2, ~0x35, ~0x0a3)|MCOND(~FCONDA,~0), "7,f,g", 0, v9 }, | |
1332 | { "fmovqa", F3F(2, 0x35, 0x0c3)|MCOND(FCONDA,0), F3F(~2, ~0x35, ~0x0c3)|MCOND(~FCONDA,~0), "8,f,g", 0, v9 }, | |
1333 | { "fmovqa", F3F(2, 0x35, 0x0e3)|MCOND(FCONDA,0), F3F(~2, ~0x35, ~0x0e3)|MCOND(~FCONDA,~0), "9,f,g", 0, v9 }, | |
1334 | { "fmovsa", F3F(2, 0x35, 0x101)|MCOND(CONDA,0), F3F(~2, ~0x35, ~0x101)|MCOND(~CONDA,~0), "z,f,g", 0, v9 }, | |
1335 | { "fmovsa", F3F(2, 0x35, 0x081)|MCOND(FCONDA,0), F3F(~2, ~0x35, ~0x081)|MCOND(~FCONDA,~0), "6,f,g", 0, v9 }, | |
1336 | { "fmovsa", F3F(2, 0x35, 0x181)|MCOND(CONDA,0), F3F(~2, ~0x35, ~0x181)|MCOND(~CONDA,~0), "Z,f,g", 0, v9 }, | |
1337 | { "fmovsa", F3F(2, 0x35, 0x0a1)|MCOND(FCONDA,0), F3F(~2, ~0x35, ~0x0a1)|MCOND(~FCONDA,~0), "7,f,g", 0, v9 }, | |
1338 | { "fmovsa", F3F(2, 0x35, 0x0c1)|MCOND(FCONDA,0), F3F(~2, ~0x35, ~0x0c1)|MCOND(~FCONDA,~0), "8,f,g", 0, v9 }, | |
1339 | { "fmovsa", F3F(2, 0x35, 0x0e1)|MCOND(FCONDA,0), F3F(~2, ~0x35, ~0x0e1)|MCOND(~FCONDA,~0), "9,f,g", 0, v9 }, | |
1340 | { "fmovdcc", F3F(2, 0x35, 0x102)|MCOND(CONDCC,0), F3F(~2, ~0x35, ~0x102)|MCOND(~CONDCC,~0), "z,f,g", 0, v9 }, | |
1341 | { "fmovdcc", F3F(2, 0x35, 0x182)|MCOND(CONDCC,0), F3F(~2, ~0x35, ~0x182)|MCOND(~CONDCC,~0), "Z,f,g", 0, v9 }, | |
1342 | { "fmovqcc", F3F(2, 0x35, 0x103)|MCOND(CONDCC,0), F3F(~2, ~0x35, ~0x103)|MCOND(~CONDCC,~0), "z,f,g", 0, v9 }, | |
1343 | { "fmovqcc", F3F(2, 0x35, 0x183)|MCOND(CONDCC,0), F3F(~2, ~0x35, ~0x183)|MCOND(~CONDCC,~0), "Z,f,g", 0, v9 }, | |
1344 | { "fmovscc", F3F(2, 0x35, 0x101)|MCOND(CONDCC,0), F3F(~2, ~0x35, ~0x101)|MCOND(~CONDCC,~0), "z,f,g", 0, v9 }, | |
1345 | { "fmovscc", F3F(2, 0x35, 0x181)|MCOND(CONDCC,0), F3F(~2, ~0x35, ~0x181)|MCOND(~CONDCC,~0), "Z,f,g", 0, v9 }, | |
1346 | { "fmovdcs", F3F(2, 0x35, 0x102)|MCOND(CONDCS,0), F3F(~2, ~0x35, ~0x102)|MCOND(~CONDCS,~0), "z,f,g", 0, v9 }, | |
1347 | { "fmovdcs", F3F(2, 0x35, 0x182)|MCOND(CONDCS,0), F3F(~2, ~0x35, ~0x182)|MCOND(~CONDCS,~0), "Z,f,g", 0, v9 }, | |
1348 | { "fmovqcs", F3F(2, 0x35, 0x103)|MCOND(CONDCS,0), F3F(~2, ~0x35, ~0x103)|MCOND(~CONDCS,~0), "z,f,g", 0, v9 }, | |
1349 | { "fmovqcs", F3F(2, 0x35, 0x183)|MCOND(CONDCS,0), F3F(~2, ~0x35, ~0x183)|MCOND(~CONDCS,~0), "Z,f,g", 0, v9 }, | |
1350 | { "fmovscs", F3F(2, 0x35, 0x101)|MCOND(CONDCS,0), F3F(~2, ~0x35, ~0x101)|MCOND(~CONDCS,~0), "z,f,g", 0, v9 }, | |
1351 | { "fmovscs", F3F(2, 0x35, 0x181)|MCOND(CONDCS,0), F3F(~2, ~0x35, ~0x181)|MCOND(~CONDCS,~0), "Z,f,g", 0, v9 }, | |
1352 | { "fmovde", F3F(2, 0x35, 0x102)|MCOND(CONDE,0), F3F(~2, ~0x35, ~0x102)|MCOND(~CONDE,~0), "z,f,g", 0, v9 }, | |
1353 | { "fmovde", F3F(2, 0x35, 0x082)|MCOND(FCONDE,0), F3F(~2, ~0x35, ~0x082)|MCOND(~FCONDE,~0), "6,f,g", 0, v9 }, | |
1354 | { "fmovde", F3F(2, 0x35, 0x182)|MCOND(CONDE,0), F3F(~2, ~0x35, ~0x182)|MCOND(~CONDE,~0), "Z,f,g", 0, v9 }, | |
1355 | { "fmovde", F3F(2, 0x35, 0x0a2)|MCOND(FCONDE,0), F3F(~2, ~0x35, ~0x0a2)|MCOND(~FCONDE,~0), "7,f,g", 0, v9 }, | |
1356 | { "fmovde", F3F(2, 0x35, 0x0c2)|MCOND(FCONDE,0), F3F(~2, ~0x35, ~0x0c2)|MCOND(~FCONDE,~0), "8,f,g", 0, v9 }, | |
1357 | { "fmovde", F3F(2, 0x35, 0x0e2)|MCOND(FCONDE,0), F3F(~2, ~0x35, ~0x0e2)|MCOND(~FCONDE,~0), "9,f,g", 0, v9 }, | |
1358 | { "fmovqe", F3F(2, 0x35, 0x103)|MCOND(CONDE,0), F3F(~2, ~0x35, ~0x103)|MCOND(~CONDE,~0), "z,f,g", 0, v9 }, | |
1359 | { "fmovqe", F3F(2, 0x35, 0x083)|MCOND(FCONDE,0), F3F(~2, ~0x35, ~0x083)|MCOND(~FCONDE,~0), "6,f,g", 0, v9 }, | |
1360 | { "fmovqe", F3F(2, 0x35, 0x183)|MCOND(CONDE,0), F3F(~2, ~0x35, ~0x183)|MCOND(~CONDE,~0), "Z,f,g", 0, v9 }, | |
1361 | { "fmovqe", F3F(2, 0x35, 0x0a3)|MCOND(FCONDE,0), F3F(~2, ~0x35, ~0x0a3)|MCOND(~FCONDE,~0), "7,f,g", 0, v9 }, | |
1362 | { "fmovqe", F3F(2, 0x35, 0x0c3)|MCOND(FCONDE,0), F3F(~2, ~0x35, ~0x0c3)|MCOND(~FCONDE,~0), "8,f,g", 0, v9 }, | |
1363 | { "fmovqe", F3F(2, 0x35, 0x0e3)|MCOND(FCONDE,0), F3F(~2, ~0x35, ~0x0e3)|MCOND(~FCONDE,~0), "9,f,g", 0, v9 }, | |
1364 | { "fmovse", F3F(2, 0x35, 0x101)|MCOND(CONDE,0), F3F(~2, ~0x35, ~0x101)|MCOND(~CONDE,~0), "z,f,g", 0, v9 }, | |
1365 | { "fmovse", F3F(2, 0x35, 0x081)|MCOND(FCONDE,0), F3F(~2, ~0x35, ~0x081)|MCOND(~FCONDE,~0), "6,f,g", 0, v9 }, | |
1366 | { "fmovse", F3F(2, 0x35, 0x181)|MCOND(CONDE,0), F3F(~2, ~0x35, ~0x181)|MCOND(~CONDE,~0), "Z,f,g", 0, v9 }, | |
1367 | { "fmovse", F3F(2, 0x35, 0x0a1)|MCOND(FCONDE,0), F3F(~2, ~0x35, ~0x0a1)|MCOND(~FCONDE,~0), "7,f,g", 0, v9 }, | |
1368 | { "fmovse", F3F(2, 0x35, 0x0c1)|MCOND(FCONDE,0), F3F(~2, ~0x35, ~0x0c1)|MCOND(~FCONDE,~0), "8,f,g", 0, v9 }, | |
1369 | { "fmovse", F3F(2, 0x35, 0x0e1)|MCOND(FCONDE,0), F3F(~2, ~0x35, ~0x0e1)|MCOND(~FCONDE,~0), "9,f,g", 0, v9 }, | |
1370 | { "fmovdg", F3F(2, 0x35, 0x102)|MCOND(CONDG,0), F3F(~2, ~0x35, ~0x102)|MCOND(~CONDG,~0), "z,f,g", 0, v9 }, | |
1371 | { "fmovdg", F3F(2, 0x35, 0x082)|MCOND(FCONDG,0), F3F(~2, ~0x35, ~0x082)|MCOND(~FCONDG,~0), "6,f,g", 0, v9 }, | |
1372 | { "fmovdg", F3F(2, 0x35, 0x182)|MCOND(CONDG,0), F3F(~2, ~0x35, ~0x182)|MCOND(~CONDG,~0), "Z,f,g", 0, v9 }, | |
1373 | { "fmovdg", F3F(2, 0x35, 0x0a2)|MCOND(FCONDG,0), F3F(~2, ~0x35, ~0x0a2)|MCOND(~FCONDG,~0), "7,f,g", 0, v9 }, | |
1374 | { "fmovdg", F3F(2, 0x35, 0x0c2)|MCOND(FCONDG,0), F3F(~2, ~0x35, ~0x0c2)|MCOND(~FCONDG,~0), "8,f,g", 0, v9 }, | |
1375 | { "fmovdg", F3F(2, 0x35, 0x0e2)|MCOND(FCONDG,0), F3F(~2, ~0x35, ~0x0e2)|MCOND(~FCONDG,~0), "9,f,g", 0, v9 }, | |
1376 | { "fmovqg", F3F(2, 0x35, 0x103)|MCOND(CONDG,0), F3F(~2, ~0x35, ~0x103)|MCOND(~CONDG,~0), "z,f,g", 0, v9 }, | |
1377 | { "fmovqg", F3F(2, 0x35, 0x083)|MCOND(FCONDG,0), F3F(~2, ~0x35, ~0x083)|MCOND(~FCONDG,~0), "6,f,g", 0, v9 }, | |
1378 | { "fmovqg", F3F(2, 0x35, 0x183)|MCOND(CONDG,0), F3F(~2, ~0x35, ~0x183)|MCOND(~CONDG,~0), "Z,f,g", 0, v9 }, | |
1379 | { "fmovqg", F3F(2, 0x35, 0x0a3)|MCOND(FCONDG,0), F3F(~2, ~0x35, ~0x0a3)|MCOND(~FCONDG,~0), "7,f,g", 0, v9 }, | |
1380 | { "fmovqg", F3F(2, 0x35, 0x0c3)|MCOND(FCONDG,0), F3F(~2, ~0x35, ~0x0c3)|MCOND(~FCONDG,~0), "8,f,g", 0, v9 }, | |
1381 | { "fmovqg", F3F(2, 0x35, 0x0e3)|MCOND(FCONDG,0), F3F(~2, ~0x35, ~0x0e3)|MCOND(~FCONDG,~0), "9,f,g", 0, v9 }, | |
1382 | { "fmovsg", F3F(2, 0x35, 0x101)|MCOND(CONDG,0), F3F(~2, ~0x35, ~0x101)|MCOND(~CONDG,~0), "z,f,g", 0, v9 }, | |
1383 | { "fmovsg", F3F(2, 0x35, 0x081)|MCOND(FCONDG,0), F3F(~2, ~0x35, ~0x081)|MCOND(~FCONDG,~0), "6,f,g", 0, v9 }, | |
1384 | { "fmovsg", F3F(2, 0x35, 0x181)|MCOND(CONDG,0), F3F(~2, ~0x35, ~0x181)|MCOND(~CONDG,~0), "Z,f,g", 0, v9 }, | |
1385 | { "fmovsg", F3F(2, 0x35, 0x0a1)|MCOND(FCONDG,0), F3F(~2, ~0x35, ~0x0a1)|MCOND(~FCONDG,~0), "7,f,g", 0, v9 }, | |
1386 | { "fmovsg", F3F(2, 0x35, 0x0c1)|MCOND(FCONDG,0), F3F(~2, ~0x35, ~0x0c1)|MCOND(~FCONDG,~0), "8,f,g", 0, v9 }, | |
1387 | { "fmovsg", F3F(2, 0x35, 0x0e1)|MCOND(FCONDG,0), F3F(~2, ~0x35, ~0x0e1)|MCOND(~FCONDG,~0), "9,f,g", 0, v9 }, | |
1388 | { "fmovdge", F3F(2, 0x35, 0x102)|MCOND(CONDGE,0), F3F(~2, ~0x35, ~0x102)|MCOND(~CONDGE,~0), "z,f,g", 0, v9 }, | |
1389 | { "fmovdge", F3F(2, 0x35, 0x082)|MCOND(FCONDGE,0), F3F(~2, ~0x35, ~0x082)|MCOND(~FCONDGE,~0), "6,f,g", 0, v9 }, | |
1390 | { "fmovdge", F3F(2, 0x35, 0x182)|MCOND(CONDGE,0), F3F(~2, ~0x35, ~0x182)|MCOND(~CONDGE,~0), "Z,f,g", 0, v9 }, | |
1391 | { "fmovdge", F3F(2, 0x35, 0x0a2)|MCOND(FCONDGE,0), F3F(~2, ~0x35, ~0x0a2)|MCOND(~FCONDGE,~0), "7,f,g", 0, v9 }, | |
1392 | { "fmovdge", F3F(2, 0x35, 0x0c2)|MCOND(FCONDGE,0), F3F(~2, ~0x35, ~0x0c2)|MCOND(~FCONDGE,~0), "8,f,g", 0, v9 }, | |
1393 | { "fmovdge", F3F(2, 0x35, 0x0e2)|MCOND(FCONDGE,0), F3F(~2, ~0x35, ~0x0e2)|MCOND(~FCONDGE,~0), "9,f,g", 0, v9 }, | |
1394 | { "fmovqge", F3F(2, 0x35, 0x103)|MCOND(CONDGE,0), F3F(~2, ~0x35, ~0x103)|MCOND(~CONDGE,~0), "z,f,g", 0, v9 }, | |
1395 | { "fmovqge", F3F(2, 0x35, 0x083)|MCOND(FCONDGE,0), F3F(~2, ~0x35, ~0x083)|MCOND(~FCONDGE,~0), "6,f,g", 0, v9 }, | |
1396 | { "fmovqge", F3F(2, 0x35, 0x183)|MCOND(CONDGE,0), F3F(~2, ~0x35, ~0x183)|MCOND(~CONDGE,~0), "Z,f,g", 0, v9 }, | |
1397 | { "fmovqge", F3F(2, 0x35, 0x0a3)|MCOND(FCONDGE,0), F3F(~2, ~0x35, ~0x0a3)|MCOND(~FCONDGE,~0), "7,f,g", 0, v9 }, | |
1398 | { "fmovqge", F3F(2, 0x35, 0x0c3)|MCOND(FCONDGE,0), F3F(~2, ~0x35, ~0x0c3)|MCOND(~FCONDGE,~0), "8,f,g", 0, v9 }, | |
1399 | { "fmovqge", F3F(2, 0x35, 0x0e3)|MCOND(FCONDGE,0), F3F(~2, ~0x35, ~0x0e3)|MCOND(~FCONDGE,~0), "9,f,g", 0, v9 }, | |
1400 | { "fmovsge", F3F(2, 0x35, 0x101)|MCOND(CONDGE,0), F3F(~2, ~0x35, ~0x101)|MCOND(~CONDGE,~0), "z,f,g", 0, v9 }, | |
1401 | { "fmovsge", F3F(2, 0x35, 0x081)|MCOND(FCONDGE,0), F3F(~2, ~0x35, ~0x081)|MCOND(~FCONDGE,~0), "6,f,g", 0, v9 }, | |
1402 | { "fmovsge", F3F(2, 0x35, 0x181)|MCOND(CONDGE,0), F3F(~2, ~0x35, ~0x181)|MCOND(~CONDGE,~0), "Z,f,g", 0, v9 }, | |
1403 | { "fmovsge", F3F(2, 0x35, 0x0a1)|MCOND(FCONDGE,0), F3F(~2, ~0x35, ~0x0a1)|MCOND(~FCONDGE,~0), "7,f,g", 0, v9 }, | |
1404 | { "fmovsge", F3F(2, 0x35, 0x0c1)|MCOND(FCONDGE,0), F3F(~2, ~0x35, ~0x0c1)|MCOND(~FCONDGE,~0), "8,f,g", 0, v9 }, | |
1405 | { "fmovsge", F3F(2, 0x35, 0x0e1)|MCOND(FCONDGE,0), F3F(~2, ~0x35, ~0x0e1)|MCOND(~FCONDGE,~0), "9,f,g", 0, v9 }, | |
1406 | { "fmovdgeu", F3F(2, 0x35, 0x102)|MCOND(CONDGEU,0), F3F(~2, ~0x35, ~0x102)|MCOND(~CONDGEU,~0), "z,f,g", F_ALIAS, v9 }, | |
1407 | { "fmovdgeu", F3F(2, 0x35, 0x182)|MCOND(CONDGEU,0), F3F(~2, ~0x35, ~0x182)|MCOND(~CONDGEU,~0), "Z,f,g", F_ALIAS, v9 }, | |
1408 | { "fmovqgeu", F3F(2, 0x35, 0x103)|MCOND(CONDGEU,0), F3F(~2, ~0x35, ~0x103)|MCOND(~CONDGEU,~0), "z,f,g", F_ALIAS, v9 }, | |
1409 | { "fmovqgeu", F3F(2, 0x35, 0x183)|MCOND(CONDGEU,0), F3F(~2, ~0x35, ~0x183)|MCOND(~CONDGEU,~0), "Z,f,g", F_ALIAS, v9 }, | |
1410 | { "fmovsgeu", F3F(2, 0x35, 0x101)|MCOND(CONDGEU,0), F3F(~2, ~0x35, ~0x101)|MCOND(~CONDGEU,~0), "z,f,g", F_ALIAS, v9 }, | |
1411 | { "fmovsgeu", F3F(2, 0x35, 0x181)|MCOND(CONDGEU,0), F3F(~2, ~0x35, ~0x181)|MCOND(~CONDGEU,~0), "Z,f,g", F_ALIAS, v9 }, | |
1412 | { "fmovdgu", F3F(2, 0x35, 0x102)|MCOND(CONDGU,0), F3F(~2, ~0x35, ~0x102)|MCOND(~CONDGU,~0), "z,f,g", 0, v9 }, | |
1413 | { "fmovdgu", F3F(2, 0x35, 0x182)|MCOND(CONDGU,0), F3F(~2, ~0x35, ~0x182)|MCOND(~CONDGU,~0), "Z,f,g", 0, v9 }, | |
1414 | { "fmovqgu", F3F(2, 0x35, 0x103)|MCOND(CONDGU,0), F3F(~2, ~0x35, ~0x103)|MCOND(~CONDGU,~0), "z,f,g", 0, v9 }, | |
1415 | { "fmovqgu", F3F(2, 0x35, 0x183)|MCOND(CONDGU,0), F3F(~2, ~0x35, ~0x183)|MCOND(~CONDGU,~0), "Z,f,g", 0, v9 }, | |
1416 | { "fmovsgu", F3F(2, 0x35, 0x101)|MCOND(CONDGU,0), F3F(~2, ~0x35, ~0x101)|MCOND(~CONDGU,~0), "z,f,g", 0, v9 }, | |
1417 | { "fmovsgu", F3F(2, 0x35, 0x181)|MCOND(CONDGU,0), F3F(~2, ~0x35, ~0x181)|MCOND(~CONDGU,~0), "Z,f,g", 0, v9 }, | |
1418 | { "fmovdl", F3F(2, 0x35, 0x102)|MCOND(CONDL,0), F3F(~2, ~0x35, ~0x102)|MCOND(~CONDL,~0), "z,f,g", 0, v9 }, | |
1419 | { "fmovdl", F3F(2, 0x35, 0x082)|MCOND(FCONDL,0), F3F(~2, ~0x35, ~0x082)|MCOND(~FCONDL,~0), "6,f,g", 0, v9 }, | |
1420 | { "fmovdl", F3F(2, 0x35, 0x182)|MCOND(CONDL,0), F3F(~2, ~0x35, ~0x182)|MCOND(~CONDL,~0), "Z,f,g", 0, v9 }, | |
1421 | { "fmovdl", F3F(2, 0x35, 0x0a2)|MCOND(FCONDL,0), F3F(~2, ~0x35, ~0x0a2)|MCOND(~FCONDL,~0), "7,f,g", 0, v9 }, | |
1422 | { "fmovdl", F3F(2, 0x35, 0x0c2)|MCOND(FCONDL,0), F3F(~2, ~0x35, ~0x0c2)|MCOND(~FCONDL,~0), "8,f,g", 0, v9 }, | |
1423 | { "fmovdl", F3F(2, 0x35, 0x0e2)|MCOND(FCONDL,0), F3F(~2, ~0x35, ~0x0e2)|MCOND(~FCONDL,~0), "9,f,g", 0, v9 }, | |
1424 | { "fmovql", F3F(2, 0x35, 0x103)|MCOND(CONDL,0), F3F(~2, ~0x35, ~0x103)|MCOND(~CONDL,~0), "z,f,g", 0, v9 }, | |
1425 | { "fmovql", F3F(2, 0x35, 0x083)|MCOND(FCONDL,0), F3F(~2, ~0x35, ~0x083)|MCOND(~FCONDL,~0), "6,f,g", 0, v9 }, | |
1426 | { "fmovql", F3F(2, 0x35, 0x183)|MCOND(CONDL,0), F3F(~2, ~0x35, ~0x183)|MCOND(~CONDL,~0), "Z,f,g", 0, v9 }, | |
1427 | { "fmovql", F3F(2, 0x35, 0x0a3)|MCOND(FCONDL,0), F3F(~2, ~0x35, ~0x0a3)|MCOND(~FCONDL,~0), "7,f,g", 0, v9 }, | |
1428 | { "fmovql", F3F(2, 0x35, 0x0c3)|MCOND(FCONDL,0), F3F(~2, ~0x35, ~0x0c3)|MCOND(~FCONDL,~0), "8,f,g", 0, v9 }, | |
1429 | { "fmovql", F3F(2, 0x35, 0x0e3)|MCOND(FCONDL,0), F3F(~2, ~0x35, ~0x0e3)|MCOND(~FCONDL,~0), "9,f,g", 0, v9 }, | |
1430 | { "fmovsl", F3F(2, 0x35, 0x101)|MCOND(CONDL,0), F3F(~2, ~0x35, ~0x101)|MCOND(~CONDL,~0), "z,f,g", 0, v9 }, | |
1431 | { "fmovsl", F3F(2, 0x35, 0x081)|MCOND(FCONDL,0), F3F(~2, ~0x35, ~0x081)|MCOND(~FCONDL,~0), "6,f,g", 0, v9 }, | |
1432 | { "fmovsl", F3F(2, 0x35, 0x181)|MCOND(CONDL,0), F3F(~2, ~0x35, ~0x181)|MCOND(~CONDL,~0), "Z,f,g", 0, v9 }, | |
1433 | { "fmovsl", F3F(2, 0x35, 0x0a1)|MCOND(FCONDL,0), F3F(~2, ~0x35, ~0x0a1)|MCOND(~FCONDL,~0), "7,f,g", 0, v9 }, | |
1434 | { "fmovsl", F3F(2, 0x35, 0x0c1)|MCOND(FCONDL,0), F3F(~2, ~0x35, ~0x0c1)|MCOND(~FCONDL,~0), "8,f,g", 0, v9 }, | |
1435 | { "fmovsl", F3F(2, 0x35, 0x0e1)|MCOND(FCONDL,0), F3F(~2, ~0x35, ~0x0e1)|MCOND(~FCONDL,~0), "9,f,g", 0, v9 }, | |
1436 | { "fmovdle", F3F(2, 0x35, 0x102)|MCOND(CONDLE,0), F3F(~2, ~0x35, ~0x102)|MCOND(~CONDLE,~0), "z,f,g", 0, v9 }, | |
1437 | { "fmovdle", F3F(2, 0x35, 0x082)|MCOND(FCONDLE,0), F3F(~2, ~0x35, ~0x082)|MCOND(~FCONDLE,~0), "6,f,g", 0, v9 }, | |
1438 | { "fmovdle", F3F(2, 0x35, 0x182)|MCOND(CONDLE,0), F3F(~2, ~0x35, ~0x182)|MCOND(~CONDLE,~0), "Z,f,g", 0, v9 }, | |
1439 | { "fmovdle", F3F(2, 0x35, 0x0a2)|MCOND(FCONDLE,0), F3F(~2, ~0x35, ~0x0a2)|MCOND(~FCONDLE,~0), "7,f,g", 0, v9 }, | |
1440 | { "fmovdle", F3F(2, 0x35, 0x0c2)|MCOND(FCONDLE,0), F3F(~2, ~0x35, ~0x0c2)|MCOND(~FCONDLE,~0), "8,f,g", 0, v9 }, | |
1441 | { "fmovdle", F3F(2, 0x35, 0x0e2)|MCOND(FCONDLE,0), F3F(~2, ~0x35, ~0x0e2)|MCOND(~FCONDLE,~0), "9,f,g", 0, v9 }, | |
1442 | { "fmovqle", F3F(2, 0x35, 0x103)|MCOND(CONDLE,0), F3F(~2, ~0x35, ~0x103)|MCOND(~CONDLE,~0), "z,f,g", 0, v9 }, | |
1443 | { "fmovqle", F3F(2, 0x35, 0x083)|MCOND(FCONDLE,0), F3F(~2, ~0x35, ~0x083)|MCOND(~FCONDLE,~0), "6,f,g", 0, v9 }, | |
1444 | { "fmovqle", F3F(2, 0x35, 0x183)|MCOND(CONDLE,0), F3F(~2, ~0x35, ~0x183)|MCOND(~CONDLE,~0), "Z,f,g", 0, v9 }, | |
1445 | { "fmovqle", F3F(2, 0x35, 0x0a3)|MCOND(FCONDLE,0), F3F(~2, ~0x35, ~0x0a3)|MCOND(~FCONDLE,~0), "7,f,g", 0, v9 }, | |
1446 | { "fmovqle", F3F(2, 0x35, 0x0c3)|MCOND(FCONDLE,0), F3F(~2, ~0x35, ~0x0c3)|MCOND(~FCONDLE,~0), "8,f,g", 0, v9 }, | |
1447 | { "fmovqle", F3F(2, 0x35, 0x0e3)|MCOND(FCONDLE,0), F3F(~2, ~0x35, ~0x0e3)|MCOND(~FCONDLE,~0), "9,f,g", 0, v9 }, | |
1448 | { "fmovsle", F3F(2, 0x35, 0x101)|MCOND(CONDLE,0), F3F(~2, ~0x35, ~0x101)|MCOND(~CONDLE,~0), "z,f,g", 0, v9 }, | |
1449 | { "fmovsle", F3F(2, 0x35, 0x081)|MCOND(FCONDLE,0), F3F(~2, ~0x35, ~0x081)|MCOND(~FCONDLE,~0), "6,f,g", 0, v9 }, | |
1450 | { "fmovsle", F3F(2, 0x35, 0x181)|MCOND(CONDLE,0), F3F(~2, ~0x35, ~0x181)|MCOND(~CONDLE,~0), "Z,f,g", 0, v9 }, | |
1451 | { "fmovsle", F3F(2, 0x35, 0x0a1)|MCOND(FCONDLE,0), F3F(~2, ~0x35, ~0x0a1)|MCOND(~FCONDLE,~0), "7,f,g", 0, v9 }, | |
1452 | { "fmovsle", F3F(2, 0x35, 0x0c1)|MCOND(FCONDLE,0), F3F(~2, ~0x35, ~0x0c1)|MCOND(~FCONDLE,~0), "8,f,g", 0, v9 }, | |
1453 | { "fmovsle", F3F(2, 0x35, 0x0e1)|MCOND(FCONDLE,0), F3F(~2, ~0x35, ~0x0e1)|MCOND(~FCONDLE,~0), "9,f,g", 0, v9 }, | |
1454 | { "fmovdleu", F3F(2, 0x35, 0x102)|MCOND(CONDLEU,0), F3F(~2, ~0x35, ~0x102)|MCOND(~CONDLEU,~0), "z,f,g", 0, v9 }, | |
1455 | { "fmovdleu", F3F(2, 0x35, 0x182)|MCOND(CONDLEU,0), F3F(~2, ~0x35, ~0x182)|MCOND(~CONDLEU,~0), "Z,f,g", 0, v9 }, | |
1456 | { "fmovqleu", F3F(2, 0x35, 0x103)|MCOND(CONDLEU,0), F3F(~2, ~0x35, ~0x103)|MCOND(~CONDLEU,~0), "z,f,g", 0, v9 }, | |
1457 | { "fmovqleu", F3F(2, 0x35, 0x183)|MCOND(CONDLEU,0), F3F(~2, ~0x35, ~0x183)|MCOND(~CONDLEU,~0), "Z,f,g", 0, v9 }, | |
1458 | { "fmovsleu", F3F(2, 0x35, 0x101)|MCOND(CONDLEU,0), F3F(~2, ~0x35, ~0x101)|MCOND(~CONDLEU,~0), "z,f,g", 0, v9 }, | |
1459 | { "fmovsleu", F3F(2, 0x35, 0x181)|MCOND(CONDLEU,0), F3F(~2, ~0x35, ~0x181)|MCOND(~CONDLEU,~0), "Z,f,g", 0, v9 }, | |
1460 | { "fmovdlg", F3F(2, 0x35, 0x082)|MCOND(FCONDLG,0), F3F(~2, ~0x35, ~0x082)|MCOND(~FCONDLG,~0), "6,f,g", 0, v9 }, | |
1461 | { "fmovdlg", F3F(2, 0x35, 0x0a2)|MCOND(FCONDLG,0), F3F(~2, ~0x35, ~0x0a2)|MCOND(~FCONDLG,~0), "7,f,g", 0, v9 }, | |
1462 | { "fmovdlg", F3F(2, 0x35, 0x0c2)|MCOND(FCONDLG,0), F3F(~2, ~0x35, ~0x0c2)|MCOND(~FCONDLG,~0), "8,f,g", 0, v9 }, | |
1463 | { "fmovdlg", F3F(2, 0x35, 0x0e2)|MCOND(FCONDLG,0), F3F(~2, ~0x35, ~0x0e2)|MCOND(~FCONDLG,~0), "9,f,g", 0, v9 }, | |
1464 | { "fmovqlg", F3F(2, 0x35, 0x083)|MCOND(FCONDLG,0), F3F(~2, ~0x35, ~0x083)|MCOND(~FCONDLG,~0), "6,f,g", 0, v9 }, | |
1465 | { "fmovqlg", F3F(2, 0x35, 0x0a3)|MCOND(FCONDLG,0), F3F(~2, ~0x35, ~0x0a3)|MCOND(~FCONDLG,~0), "7,f,g", 0, v9 }, | |
1466 | { "fmovqlg", F3F(2, 0x35, 0x0c3)|MCOND(FCONDLG,0), F3F(~2, ~0x35, ~0x0c3)|MCOND(~FCONDLG,~0), "8,f,g", 0, v9 }, | |
1467 | { "fmovqlg", F3F(2, 0x35, 0x0e3)|MCOND(FCONDLG,0), F3F(~2, ~0x35, ~0x0e3)|MCOND(~FCONDLG,~0), "9,f,g", 0, v9 }, | |
1468 | { "fmovslg", F3F(2, 0x35, 0x081)|MCOND(FCONDLG,0), F3F(~2, ~0x35, ~0x081)|MCOND(~FCONDLG,~0), "6,f,g", 0, v9 }, | |
1469 | { "fmovslg", F3F(2, 0x35, 0x0a1)|MCOND(FCONDLG,0), F3F(~2, ~0x35, ~0x0a1)|MCOND(~FCONDLG,~0), "7,f,g", 0, v9 }, | |
1470 | { "fmovslg", F3F(2, 0x35, 0x0c1)|MCOND(FCONDLG,0), F3F(~2, ~0x35, ~0x0c1)|MCOND(~FCONDLG,~0), "8,f,g", 0, v9 }, | |
1471 | { "fmovslg", F3F(2, 0x35, 0x0e1)|MCOND(FCONDLG,0), F3F(~2, ~0x35, ~0x0e1)|MCOND(~FCONDLG,~0), "9,f,g", 0, v9 }, | |
1472 | { "fmovdlu", F3F(2, 0x35, 0x102)|MCOND(CONDLU,0), F3F(~2, ~0x35, ~0x102)|MCOND(~CONDLU,~0), "z,f,g", F_ALIAS, v9 }, | |
1473 | { "fmovdlu", F3F(2, 0x35, 0x182)|MCOND(CONDLU,0), F3F(~2, ~0x35, ~0x182)|MCOND(~CONDLU,~0), "Z,f,g", F_ALIAS, v9 }, | |
1474 | { "fmovqlu", F3F(2, 0x35, 0x103)|MCOND(CONDLU,0), F3F(~2, ~0x35, ~0x103)|MCOND(~CONDLU,~0), "z,f,g", F_ALIAS, v9 }, | |
1475 | { "fmovqlu", F3F(2, 0x35, 0x183)|MCOND(CONDLU,0), F3F(~2, ~0x35, ~0x183)|MCOND(~CONDLU,~0), "Z,f,g", F_ALIAS, v9 }, | |
1476 | { "fmovslu", F3F(2, 0x35, 0x101)|MCOND(CONDLU,0), F3F(~2, ~0x35, ~0x101)|MCOND(~CONDLU,~0), "z,f,g", F_ALIAS, v9 }, | |
1477 | { "fmovslu", F3F(2, 0x35, 0x181)|MCOND(CONDLU,0), F3F(~2, ~0x35, ~0x181)|MCOND(~CONDLU,~0), "Z,f,g", F_ALIAS, v9 }, | |
1478 | { "fmovdn", F3F(2, 0x35, 0x102)|MCOND(CONDN,0), F3F(~2, ~0x35, ~0x102)|MCOND(~CONDN,~0), "z,f,g", 0, v9 }, | |
1479 | { "fmovdn", F3F(2, 0x35, 0x082)|MCOND(FCONDN,0), F3F(~2, ~0x35, ~0x082)|MCOND(~FCONDN,~0), "6,f,g", 0, v9 }, | |
1480 | { "fmovdn", F3F(2, 0x35, 0x182)|MCOND(CONDN,0), F3F(~2, ~0x35, ~0x182)|MCOND(~CONDN,~0), "Z,f,g", 0, v9 }, | |
1481 | { "fmovdn", F3F(2, 0x35, 0x0a2)|MCOND(FCONDN,0), F3F(~2, ~0x35, ~0x0a2)|MCOND(~FCONDN,~0), "7,f,g", 0, v9 }, | |
1482 | { "fmovdn", F3F(2, 0x35, 0x0c2)|MCOND(FCONDN,0), F3F(~2, ~0x35, ~0x0c2)|MCOND(~FCONDN,~0), "8,f,g", 0, v9 }, | |
1483 | { "fmovdn", F3F(2, 0x35, 0x0e2)|MCOND(FCONDN,0), F3F(~2, ~0x35, ~0x0e2)|MCOND(~FCONDN,~0), "9,f,g", 0, v9 }, | |
1484 | { "fmovqn", F3F(2, 0x35, 0x103)|MCOND(CONDN,0), F3F(~2, ~0x35, ~0x103)|MCOND(~CONDN,~0), "z,f,g", 0, v9 }, | |
1485 | { "fmovqn", F3F(2, 0x35, 0x083)|MCOND(FCONDN,0), F3F(~2, ~0x35, ~0x083)|MCOND(~FCONDN,~0), "6,f,g", 0, v9 }, | |
1486 | { "fmovqn", F3F(2, 0x35, 0x183)|MCOND(CONDN,0), F3F(~2, ~0x35, ~0x183)|MCOND(~CONDN,~0), "Z,f,g", 0, v9 }, | |
1487 | { "fmovqn", F3F(2, 0x35, 0x0a3)|MCOND(FCONDN,0), F3F(~2, ~0x35, ~0x0a3)|MCOND(~FCONDN,~0), "7,f,g", 0, v9 }, | |
1488 | { "fmovqn", F3F(2, 0x35, 0x0c3)|MCOND(FCONDN,0), F3F(~2, ~0x35, ~0x0c3)|MCOND(~FCONDN,~0), "8,f,g", 0, v9 }, | |
1489 | { "fmovqn", F3F(2, 0x35, 0x0e3)|MCOND(FCONDN,0), F3F(~2, ~0x35, ~0x0e3)|MCOND(~FCONDN,~0), "9,f,g", 0, v9 }, | |
1490 | { "fmovsn", F3F(2, 0x35, 0x101)|MCOND(CONDN,0), F3F(~2, ~0x35, ~0x101)|MCOND(~CONDN,~0), "z,f,g", 0, v9 }, | |
1491 | { "fmovsn", F3F(2, 0x35, 0x081)|MCOND(FCONDN,0), F3F(~2, ~0x35, ~0x081)|MCOND(~FCONDN,~0), "6,f,g", 0, v9 }, | |
1492 | { "fmovsn", F3F(2, 0x35, 0x181)|MCOND(CONDN,0), F3F(~2, ~0x35, ~0x181)|MCOND(~CONDN,~0), "Z,f,g", 0, v9 }, | |
1493 | { "fmovsn", F3F(2, 0x35, 0x0a1)|MCOND(FCONDN,0), F3F(~2, ~0x35, ~0x0a1)|MCOND(~FCONDN,~0), "7,f,g", 0, v9 }, | |
1494 | { "fmovsn", F3F(2, 0x35, 0x0c1)|MCOND(FCONDN,0), F3F(~2, ~0x35, ~0x0c1)|MCOND(~FCONDN,~0), "8,f,g", 0, v9 }, | |
1495 | { "fmovsn", F3F(2, 0x35, 0x0e1)|MCOND(FCONDN,0), F3F(~2, ~0x35, ~0x0e1)|MCOND(~FCONDN,~0), "9,f,g", 0, v9 }, | |
1496 | { "fmovdne", F3F(2, 0x35, 0x102)|MCOND(CONDNE,0), F3F(~2, ~0x35, ~0x102)|MCOND(~CONDNE,~0), "z,f,g", 0, v9 }, | |
1497 | { "fmovdne", F3F(2, 0x35, 0x082)|MCOND(FCONDNE,0), F3F(~2, ~0x35, ~0x082)|MCOND(~FCONDNE,~0), "6,f,g", 0, v9 }, | |
1498 | { "fmovdne", F3F(2, 0x35, 0x182)|MCOND(CONDNE,0), F3F(~2, ~0x35, ~0x182)|MCOND(~CONDNE,~0), "Z,f,g", 0, v9 }, | |
1499 | { "fmovdne", F3F(2, 0x35, 0x0a2)|MCOND(FCONDNE,0), F3F(~2, ~0x35, ~0x0a2)|MCOND(~FCONDNE,~0), "7,f,g", 0, v9 }, | |
1500 | { "fmovdne", F3F(2, 0x35, 0x0c2)|MCOND(FCONDNE,0), F3F(~2, ~0x35, ~0x0c2)|MCOND(~FCONDNE,~0), "8,f,g", 0, v9 }, | |
1501 | { "fmovdne", F3F(2, 0x35, 0x0e2)|MCOND(FCONDNE,0), F3F(~2, ~0x35, ~0x0e2)|MCOND(~FCONDNE,~0), "9,f,g", 0, v9 }, | |
1502 | { "fmovqne", F3F(2, 0x35, 0x103)|MCOND(CONDNE,0), F3F(~2, ~0x35, ~0x103)|MCOND(~CONDNE,~0), "z,f,g", 0, v9 }, | |
1503 | { "fmovqne", F3F(2, 0x35, 0x083)|MCOND(FCONDNE,0), F3F(~2, ~0x35, ~0x083)|MCOND(~FCONDNE,~0), "6,f,g", 0, v9 }, | |
1504 | { "fmovqne", F3F(2, 0x35, 0x183)|MCOND(CONDNE,0), F3F(~2, ~0x35, ~0x183)|MCOND(~CONDNE,~0), "Z,f,g", 0, v9 }, | |
1505 | { "fmovqne", F3F(2, 0x35, 0x0a3)|MCOND(FCONDNE,0), F3F(~2, ~0x35, ~0x0a3)|MCOND(~FCONDNE,~0), "7,f,g", 0, v9 }, | |
1506 | { "fmovqne", F3F(2, 0x35, 0x0c3)|MCOND(FCONDNE,0), F3F(~2, ~0x35, ~0x0c3)|MCOND(~FCONDNE,~0), "8,f,g", 0, v9 }, | |
1507 | { "fmovqne", F3F(2, 0x35, 0x0e3)|MCOND(FCONDNE,0), F3F(~2, ~0x35, ~0x0e3)|MCOND(~FCONDNE,~0), "9,f,g", 0, v9 }, | |
1508 | { "fmovsne", F3F(2, 0x35, 0x101)|MCOND(CONDNE,0), F3F(~2, ~0x35, ~0x101)|MCOND(~CONDNE,~0), "z,f,g", 0, v9 }, | |
1509 | { "fmovsne", F3F(2, 0x35, 0x081)|MCOND(FCONDNE,0), F3F(~2, ~0x35, ~0x081)|MCOND(~FCONDNE,~0), "6,f,g", 0, v9 }, | |
1510 | { "fmovsne", F3F(2, 0x35, 0x181)|MCOND(CONDNE,0), F3F(~2, ~0x35, ~0x181)|MCOND(~CONDNE,~0), "Z,f,g", 0, v9 }, | |
1511 | { "fmovsne", F3F(2, 0x35, 0x0a1)|MCOND(FCONDNE,0), F3F(~2, ~0x35, ~0x0a1)|MCOND(~FCONDNE,~0), "7,f,g", 0, v9 }, | |
1512 | { "fmovsne", F3F(2, 0x35, 0x0c1)|MCOND(FCONDNE,0), F3F(~2, ~0x35, ~0x0c1)|MCOND(~FCONDNE,~0), "8,f,g", 0, v9 }, | |
1513 | { "fmovsne", F3F(2, 0x35, 0x0e1)|MCOND(FCONDNE,0), F3F(~2, ~0x35, ~0x0e1)|MCOND(~FCONDNE,~0), "9,f,g", 0, v9 }, | |
1514 | { "fmovdneg", F3F(2, 0x35, 0x102)|MCOND(CONDNEG,0), F3F(~2, ~0x35, ~0x102)|MCOND(~CONDNEG,~0), "z,f,g", 0, v9 }, | |
1515 | { "fmovdneg", F3F(2, 0x35, 0x182)|MCOND(CONDNEG,0), F3F(~2, ~0x35, ~0x182)|MCOND(~CONDNEG,~0), "Z,f,g", 0, v9 }, | |
1516 | { "fmovqneg", F3F(2, 0x35, 0x103)|MCOND(CONDNEG,0), F3F(~2, ~0x35, ~0x103)|MCOND(~CONDNEG,~0), "z,f,g", 0, v9 }, | |
1517 | { "fmovqneg", F3F(2, 0x35, 0x183)|MCOND(CONDNEG,0), F3F(~2, ~0x35, ~0x183)|MCOND(~CONDNEG,~0), "Z,f,g", 0, v9 }, | |
1518 | { "fmovsneg", F3F(2, 0x35, 0x101)|MCOND(CONDNEG,0), F3F(~2, ~0x35, ~0x101)|MCOND(~CONDNEG,~0), "z,f,g", 0, v9 }, | |
1519 | { "fmovsneg", F3F(2, 0x35, 0x181)|MCOND(CONDNEG,0), F3F(~2, ~0x35, ~0x181)|MCOND(~CONDNEG,~0), "Z,f,g", 0, v9 }, | |
1520 | { "fmovdnz", F3F(2, 0x35, 0x102)|MCOND(CONDNZ,0), F3F(~2, ~0x35, ~0x102)|MCOND(~CONDNZ,~0), "z,f,g", F_ALIAS, v9 }, | |
1521 | { "fmovdnz", F3F(2, 0x35, 0x082)|MCOND(FCONDNZ,0), F3F(~2, ~0x35, ~0x082)|MCOND(~FCONDNZ,~0), "6,f,g", F_ALIAS, v9 }, | |
1522 | { "fmovdnz", F3F(2, 0x35, 0x182)|MCOND(CONDNZ,0), F3F(~2, ~0x35, ~0x182)|MCOND(~CONDNZ,~0), "Z,f,g", F_ALIAS, v9 }, | |
1523 | { "fmovdnz", F3F(2, 0x35, 0x0a2)|MCOND(FCONDNZ,0), F3F(~2, ~0x35, ~0x0a2)|MCOND(~FCONDNZ,~0), "7,f,g", F_ALIAS, v9 }, | |
1524 | { "fmovdnz", F3F(2, 0x35, 0x0c2)|MCOND(FCONDNZ,0), F3F(~2, ~0x35, ~0x0c2)|MCOND(~FCONDNZ,~0), "8,f,g", F_ALIAS, v9 }, | |
1525 | { "fmovdnz", F3F(2, 0x35, 0x0e2)|MCOND(FCONDNZ,0), F3F(~2, ~0x35, ~0x0e2)|MCOND(~FCONDNZ,~0), "9,f,g", F_ALIAS, v9 }, | |
1526 | { "fmovqnz", F3F(2, 0x35, 0x103)|MCOND(CONDNZ,0), F3F(~2, ~0x35, ~0x103)|MCOND(~CONDNZ,~0), "z,f,g", F_ALIAS, v9 }, | |
1527 | { "fmovqnz", F3F(2, 0x35, 0x083)|MCOND(FCONDNZ,0), F3F(~2, ~0x35, ~0x083)|MCOND(~FCONDNZ,~0), "6,f,g", F_ALIAS, v9 }, | |
1528 | { "fmovqnz", F3F(2, 0x35, 0x183)|MCOND(CONDNZ,0), F3F(~2, ~0x35, ~0x183)|MCOND(~CONDNZ,~0), "Z,f,g", F_ALIAS, v9 }, | |
1529 | { "fmovqnz", F3F(2, 0x35, 0x0a3)|MCOND(FCONDNZ,0), F3F(~2, ~0x35, ~0x0a3)|MCOND(~FCONDNZ,~0), "7,f,g", F_ALIAS, v9 }, | |
1530 | { "fmovqnz", F3F(2, 0x35, 0x0c3)|MCOND(FCONDNZ,0), F3F(~2, ~0x35, ~0x0c3)|MCOND(~FCONDNZ,~0), "8,f,g", F_ALIAS, v9 }, | |
1531 | { "fmovqnz", F3F(2, 0x35, 0x0e3)|MCOND(FCONDNZ,0), F3F(~2, ~0x35, ~0x0e3)|MCOND(~FCONDNZ,~0), "9,f,g", F_ALIAS, v9 }, | |
1532 | { "fmovsnz", F3F(2, 0x35, 0x101)|MCOND(CONDNZ,0), F3F(~2, ~0x35, ~0x101)|MCOND(~CONDNZ,~0), "z,f,g", F_ALIAS, v9 }, | |
1533 | { "fmovsnz", F3F(2, 0x35, 0x081)|MCOND(FCONDNZ,0), F3F(~2, ~0x35, ~0x081)|MCOND(~FCONDNZ,~0), "6,f,g", F_ALIAS, v9 }, | |
1534 | { "fmovsnz", F3F(2, 0x35, 0x181)|MCOND(CONDNZ,0), F3F(~2, ~0x35, ~0x181)|MCOND(~CONDNZ,~0), "Z,f,g", F_ALIAS, v9 }, | |
1535 | { "fmovsnz", F3F(2, 0x35, 0x0a1)|MCOND(FCONDNZ,0), F3F(~2, ~0x35, ~0x0a1)|MCOND(~FCONDNZ,~0), "7,f,g", F_ALIAS, v9 }, | |
1536 | { "fmovsnz", F3F(2, 0x35, 0x0c1)|MCOND(FCONDNZ,0), F3F(~2, ~0x35, ~0x0c1)|MCOND(~FCONDNZ,~0), "8,f,g", F_ALIAS, v9 }, | |
1537 | { "fmovsnz", F3F(2, 0x35, 0x0e1)|MCOND(FCONDNZ,0), F3F(~2, ~0x35, ~0x0e1)|MCOND(~FCONDNZ,~0), "9,f,g", F_ALIAS, v9 }, | |
1538 | { "fmovdo", F3F(2, 0x35, 0x082)|MCOND(FCONDO,0), F3F(~2, ~0x35, ~0x082)|MCOND(~FCONDO,~0), "6,f,g", 0, v9 }, | |
1539 | { "fmovdo", F3F(2, 0x35, 0x0a2)|MCOND(FCONDO,0), F3F(~2, ~0x35, ~0x0a2)|MCOND(~FCONDO,~0), "7,f,g", 0, v9 }, | |
1540 | { "fmovdo", F3F(2, 0x35, 0x0c2)|MCOND(FCONDO,0), F3F(~2, ~0x35, ~0x0c2)|MCOND(~FCONDO,~0), "8,f,g", 0, v9 }, | |
1541 | { "fmovdo", F3F(2, 0x35, 0x0e2)|MCOND(FCONDO,0), F3F(~2, ~0x35, ~0x0e2)|MCOND(~FCONDO,~0), "9,f,g", 0, v9 }, | |
1542 | { "fmovqo", F3F(2, 0x35, 0x083)|MCOND(FCONDO,0), F3F(~2, ~0x35, ~0x083)|MCOND(~FCONDO,~0), "6,f,g", 0, v9 }, | |
1543 | { "fmovqo", F3F(2, 0x35, 0x0a3)|MCOND(FCONDO,0), F3F(~2, ~0x35, ~0x0a3)|MCOND(~FCONDO,~0), "7,f,g", 0, v9 }, | |
1544 | { "fmovqo", F3F(2, 0x35, 0x0c3)|MCOND(FCONDO,0), F3F(~2, ~0x35, ~0x0c3)|MCOND(~FCONDO,~0), "8,f,g", 0, v9 }, | |
1545 | { "fmovqo", F3F(2, 0x35, 0x0e3)|MCOND(FCONDO,0), F3F(~2, ~0x35, ~0x0e3)|MCOND(~FCONDO,~0), "9,f,g", 0, v9 }, | |
1546 | { "fmovso", F3F(2, 0x35, 0x081)|MCOND(FCONDO,0), F3F(~2, ~0x35, ~0x081)|MCOND(~FCONDO,~0), "6,f,g", 0, v9 }, | |
1547 | { "fmovso", F3F(2, 0x35, 0x0a1)|MCOND(FCONDO,0), F3F(~2, ~0x35, ~0x0a1)|MCOND(~FCONDO,~0), "7,f,g", 0, v9 }, | |
1548 | { "fmovso", F3F(2, 0x35, 0x0c1)|MCOND(FCONDO,0), F3F(~2, ~0x35, ~0x0c1)|MCOND(~FCONDO,~0), "8,f,g", 0, v9 }, | |
1549 | { "fmovso", F3F(2, 0x35, 0x0e1)|MCOND(FCONDO,0), F3F(~2, ~0x35, ~0x0e1)|MCOND(~FCONDO,~0), "9,f,g", 0, v9 }, | |
1550 | { "fmovdpos", F3F(2, 0x35, 0x102)|MCOND(CONDPOS,0), F3F(~2, ~0x35, ~0x102)|MCOND(~CONDPOS,~0), "z,f,g", 0, v9 }, | |
1551 | { "fmovdpos", F3F(2, 0x35, 0x182)|MCOND(CONDPOS,0), F3F(~2, ~0x35, ~0x182)|MCOND(~CONDPOS,~0), "Z,f,g", 0, v9 }, | |
1552 | { "fmovqpos", F3F(2, 0x35, 0x103)|MCOND(CONDPOS,0), F3F(~2, ~0x35, ~0x103)|MCOND(~CONDPOS,~0), "z,f,g", 0, v9 }, | |
1553 | { "fmovqpos", F3F(2, 0x35, 0x183)|MCOND(CONDPOS,0), F3F(~2, ~0x35, ~0x183)|MCOND(~CONDPOS,~0), "Z,f,g", 0, v9 }, | |
1554 | { "fmovspos", F3F(2, 0x35, 0x101)|MCOND(CONDPOS,0), F3F(~2, ~0x35, ~0x101)|MCOND(~CONDPOS,~0), "z,f,g", 0, v9 }, | |
1555 | { "fmovspos", F3F(2, 0x35, 0x181)|MCOND(CONDPOS,0), F3F(~2, ~0x35, ~0x181)|MCOND(~CONDPOS,~0), "Z,f,g", 0, v9 }, | |
1556 | { "fmovdu", F3F(2, 0x35, 0x082)|MCOND(FCONDU,0), F3F(~2, ~0x35, ~0x082)|MCOND(~FCONDU,~0), "6,f,g", 0, v9 }, | |
1557 | { "fmovdu", F3F(2, 0x35, 0x0a2)|MCOND(FCONDU,0), F3F(~2, ~0x35, ~0x0a2)|MCOND(~FCONDU,~0), "7,f,g", 0, v9 }, | |
1558 | { "fmovdu", F3F(2, 0x35, 0x0c2)|MCOND(FCONDU,0), F3F(~2, ~0x35, ~0x0c2)|MCOND(~FCONDU,~0), "8,f,g", 0, v9 }, | |
1559 | { "fmovdu", F3F(2, 0x35, 0x0e2)|MCOND(FCONDU,0), F3F(~2, ~0x35, ~0x0e2)|MCOND(~FCONDU,~0), "9,f,g", 0, v9 }, | |
1560 | { "fmovqu", F3F(2, 0x35, 0x083)|MCOND(FCONDU,0), F3F(~2, ~0x35, ~0x083)|MCOND(~FCONDU,~0), "6,f,g", 0, v9 }, | |
1561 | { "fmovqu", F3F(2, 0x35, 0x0a3)|MCOND(FCONDU,0), F3F(~2, ~0x35, ~0x0a3)|MCOND(~FCONDU,~0), "7,f,g", 0, v9 }, | |
1562 | { "fmovqu", F3F(2, 0x35, 0x0c3)|MCOND(FCONDU,0), F3F(~2, ~0x35, ~0x0c3)|MCOND(~FCONDU,~0), "8,f,g", 0, v9 }, | |
1563 | { "fmovqu", F3F(2, 0x35, 0x0e3)|MCOND(FCONDU,0), F3F(~2, ~0x35, ~0x0e3)|MCOND(~FCONDU,~0), "9,f,g", 0, v9 }, | |
1564 | { "fmovsu", F3F(2, 0x35, 0x081)|MCOND(FCONDU,0), F3F(~2, ~0x35, ~0x081)|MCOND(~FCONDU,~0), "6,f,g", 0, v9 }, | |
1565 | { "fmovsu", F3F(2, 0x35, 0x0a1)|MCOND(FCONDU,0), F3F(~2, ~0x35, ~0x0a1)|MCOND(~FCONDU,~0), "7,f,g", 0, v9 }, | |
1566 | { "fmovsu", F3F(2, 0x35, 0x0c1)|MCOND(FCONDU,0), F3F(~2, ~0x35, ~0x0c1)|MCOND(~FCONDU,~0), "8,f,g", 0, v9 }, | |
1567 | { "fmovsu", F3F(2, 0x35, 0x0e1)|MCOND(FCONDU,0), F3F(~2, ~0x35, ~0x0e1)|MCOND(~FCONDU,~0), "9,f,g", 0, v9 }, | |
1568 | { "fmovdue", F3F(2, 0x35, 0x082)|MCOND(FCONDUE,0), F3F(~2, ~0x35, ~0x082)|MCOND(~FCONDUE,~0), "6,f,g", 0, v9 }, | |
1569 | { "fmovdue", F3F(2, 0x35, 0x0a2)|MCOND(FCONDUE,0), F3F(~2, ~0x35, ~0x0a2)|MCOND(~FCONDUE,~0), "7,f,g", 0, v9 }, | |
1570 | { "fmovdue", F3F(2, 0x35, 0x0c2)|MCOND(FCONDUE,0), F3F(~2, ~0x35, ~0x0c2)|MCOND(~FCONDUE,~0), "8,f,g", 0, v9 }, | |
1571 | { "fmovdue", F3F(2, 0x35, 0x0e2)|MCOND(FCONDUE,0), F3F(~2, ~0x35, ~0x0e2)|MCOND(~FCONDUE,~0), "9,f,g", 0, v9 }, | |
1572 | { "fmovque", F3F(2, 0x35, 0x083)|MCOND(FCONDUE,0), F3F(~2, ~0x35, ~0x083)|MCOND(~FCONDUE,~0), "6,f,g", 0, v9 }, | |
1573 | { "fmovque", F3F(2, 0x35, 0x0a3)|MCOND(FCONDUE,0), F3F(~2, ~0x35, ~0x0a3)|MCOND(~FCONDUE,~0), "7,f,g", 0, v9 }, | |
1574 | { "fmovque", F3F(2, 0x35, 0x0c3)|MCOND(FCONDUE,0), F3F(~2, ~0x35, ~0x0c3)|MCOND(~FCONDUE,~0), "8,f,g", 0, v9 }, | |
1575 | { "fmovque", F3F(2, 0x35, 0x0e3)|MCOND(FCONDUE,0), F3F(~2, ~0x35, ~0x0e3)|MCOND(~FCONDUE,~0), "9,f,g", 0, v9 }, | |
1576 | { "fmovsue", F3F(2, 0x35, 0x081)|MCOND(FCONDUE,0), F3F(~2, ~0x35, ~0x081)|MCOND(~FCONDUE,~0), "6,f,g", 0, v9 }, | |
1577 | { "fmovsue", F3F(2, 0x35, 0x0a1)|MCOND(FCONDUE,0), F3F(~2, ~0x35, ~0x0a1)|MCOND(~FCONDUE,~0), "7,f,g", 0, v9 }, | |
1578 | { "fmovsue", F3F(2, 0x35, 0x0c1)|MCOND(FCONDUE,0), F3F(~2, ~0x35, ~0x0c1)|MCOND(~FCONDUE,~0), "8,f,g", 0, v9 }, | |
1579 | { "fmovsue", F3F(2, 0x35, 0x0e1)|MCOND(FCONDUE,0), F3F(~2, ~0x35, ~0x0e1)|MCOND(~FCONDUE,~0), "9,f,g", 0, v9 }, | |
1580 | { "fmovdug", F3F(2, 0x35, 0x082)|MCOND(FCONDUG,0), F3F(~2, ~0x35, ~0x082)|MCOND(~FCONDUG,~0), "6,f,g", 0, v9 }, | |
1581 | { "fmovdug", F3F(2, 0x35, 0x0a2)|MCOND(FCONDUG,0), F3F(~2, ~0x35, ~0x0a2)|MCOND(~FCONDUG,~0), "7,f,g", 0, v9 }, | |
1582 | { "fmovdug", F3F(2, 0x35, 0x0c2)|MCOND(FCONDUG,0), F3F(~2, ~0x35, ~0x0c2)|MCOND(~FCONDUG,~0), "8,f,g", 0, v9 }, | |
1583 | { "fmovdug", F3F(2, 0x35, 0x0e2)|MCOND(FCONDUG,0), F3F(~2, ~0x35, ~0x0e2)|MCOND(~FCONDUG,~0), "9,f,g", 0, v9 }, | |
1584 | { "fmovqug", F3F(2, 0x35, 0x083)|MCOND(FCONDUG,0), F3F(~2, ~0x35, ~0x083)|MCOND(~FCONDUG,~0), "6,f,g", 0, v9 }, | |
1585 | { "fmovqug", F3F(2, 0x35, 0x0a3)|MCOND(FCONDUG,0), F3F(~2, ~0x35, ~0x0a3)|MCOND(~FCONDUG,~0), "7,f,g", 0, v9 }, | |
1586 | { "fmovqug", F3F(2, 0x35, 0x0c3)|MCOND(FCONDUG,0), F3F(~2, ~0x35, ~0x0c3)|MCOND(~FCONDUG,~0), "8,f,g", 0, v9 }, | |
1587 | { "fmovqug", F3F(2, 0x35, 0x0e3)|MCOND(FCONDUG,0), F3F(~2, ~0x35, ~0x0e3)|MCOND(~FCONDUG,~0), "9,f,g", 0, v9 }, | |
1588 | { "fmovsug", F3F(2, 0x35, 0x081)|MCOND(FCONDUG,0), F3F(~2, ~0x35, ~0x081)|MCOND(~FCONDUG,~0), "6,f,g", 0, v9 }, | |
1589 | { "fmovsug", F3F(2, 0x35, 0x0a1)|MCOND(FCONDUG,0), F3F(~2, ~0x35, ~0x0a1)|MCOND(~FCONDUG,~0), "7,f,g", 0, v9 }, | |
1590 | { "fmovsug", F3F(2, 0x35, 0x0c1)|MCOND(FCONDUG,0), F3F(~2, ~0x35, ~0x0c1)|MCOND(~FCONDUG,~0), "8,f,g", 0, v9 }, | |
1591 | { "fmovsug", F3F(2, 0x35, 0x0e1)|MCOND(FCONDUG,0), F3F(~2, ~0x35, ~0x0e1)|MCOND(~FCONDUG,~0), "9,f,g", 0, v9 }, | |
1592 | { "fmovduge", F3F(2, 0x35, 0x082)|MCOND(FCONDUGE,0), F3F(~2, ~0x35, ~0x082)|MCOND(~FCONDUGE,~0), "6,f,g", 0, v9 }, | |
1593 | { "fmovduge", F3F(2, 0x35, 0x0a2)|MCOND(FCONDUGE,0), F3F(~2, ~0x35, ~0x0a2)|MCOND(~FCONDUGE,~0), "7,f,g", 0, v9 }, | |
1594 | { "fmovduge", F3F(2, 0x35, 0x0c2)|MCOND(FCONDUGE,0), F3F(~2, ~0x35, ~0x0c2)|MCOND(~FCONDUGE,~0), "8,f,g", 0, v9 }, | |
1595 | { "fmovduge", F3F(2, 0x35, 0x0e2)|MCOND(FCONDUGE,0), F3F(~2, ~0x35, ~0x0e2)|MCOND(~FCONDUGE,~0), "9,f,g", 0, v9 }, | |
1596 | { "fmovquge", F3F(2, 0x35, 0x083)|MCOND(FCONDUGE,0), F3F(~2, ~0x35, ~0x083)|MCOND(~FCONDUGE,~0), "6,f,g", 0, v9 }, | |
1597 | { "fmovquge", F3F(2, 0x35, 0x0a3)|MCOND(FCONDUGE,0), F3F(~2, ~0x35, ~0x0a3)|MCOND(~FCONDUGE,~0), "7,f,g", 0, v9 }, | |
1598 | { "fmovquge", F3F(2, 0x35, 0x0c3)|MCOND(FCONDUGE,0), F3F(~2, ~0x35, ~0x0c3)|MCOND(~FCONDUGE,~0), "8,f,g", 0, v9 }, | |
1599 | { "fmovquge", F3F(2, 0x35, 0x0e3)|MCOND(FCONDUGE,0), F3F(~2, ~0x35, ~0x0e3)|MCOND(~FCONDUGE,~0), "9,f,g", 0, v9 }, | |
1600 | { "fmovsuge", F3F(2, 0x35, 0x081)|MCOND(FCONDUGE,0), F3F(~2, ~0x35, ~0x081)|MCOND(~FCONDUGE,~0), "6,f,g", 0, v9 }, | |
1601 | { "fmovsuge", F3F(2, 0x35, 0x0a1)|MCOND(FCONDUGE,0), F3F(~2, ~0x35, ~0x0a1)|MCOND(~FCONDUGE,~0), "7,f,g", 0, v9 }, | |
1602 | { "fmovsuge", F3F(2, 0x35, 0x0c1)|MCOND(FCONDUGE,0), F3F(~2, ~0x35, ~0x0c1)|MCOND(~FCONDUGE,~0), "8,f,g", 0, v9 }, | |
1603 | { "fmovsuge", F3F(2, 0x35, 0x0e1)|MCOND(FCONDUGE,0), F3F(~2, ~0x35, ~0x0e1)|MCOND(~FCONDUGE,~0), "9,f,g", 0, v9 }, | |
1604 | { "fmovdul", F3F(2, 0x35, 0x082)|MCOND(FCONDUL,0), F3F(~2, ~0x35, ~0x082)|MCOND(~FCONDUL,~0), "6,f,g", 0, v9 }, | |
1605 | { "fmovdul", F3F(2, 0x35, 0x0a2)|MCOND(FCONDUL,0), F3F(~2, ~0x35, ~0x0a2)|MCOND(~FCONDUL,~0), "7,f,g", 0, v9 }, | |
1606 | { "fmovdul", F3F(2, 0x35, 0x0c2)|MCOND(FCONDUL,0), F3F(~2, ~0x35, ~0x0c2)|MCOND(~FCONDUL,~0), "8,f,g", 0, v9 }, | |
1607 | { "fmovdul", F3F(2, 0x35, 0x0e2)|MCOND(FCONDUL,0), F3F(~2, ~0x35, ~0x0e2)|MCOND(~FCONDUL,~0), "9,f,g", 0, v9 }, | |
1608 | { "fmovqul", F3F(2, 0x35, 0x083)|MCOND(FCONDUL,0), F3F(~2, ~0x35, ~0x083)|MCOND(~FCONDUL,~0), "6,f,g", 0, v9 }, | |
1609 | { "fmovqul", F3F(2, 0x35, 0x0a3)|MCOND(FCONDUL,0), F3F(~2, ~0x35, ~0x0a3)|MCOND(~FCONDUL,~0), "7,f,g", 0, v9 }, | |
1610 | { "fmovqul", F3F(2, 0x35, 0x0c3)|MCOND(FCONDUL,0), F3F(~2, ~0x35, ~0x0c3)|MCOND(~FCONDUL,~0), "8,f,g", 0, v9 }, | |
1611 | { "fmovqul", F3F(2, 0x35, 0x0e3)|MCOND(FCONDUL,0), F3F(~2, ~0x35, ~0x0e3)|MCOND(~FCONDUL,~0), "9,f,g", 0, v9 }, | |
1612 | { "fmovsul", F3F(2, 0x35, 0x081)|MCOND(FCONDUL,0), F3F(~2, ~0x35, ~0x081)|MCOND(~FCONDUL,~0), "6,f,g", 0, v9 }, | |
1613 | { "fmovsul", F3F(2, 0x35, 0x0a1)|MCOND(FCONDUL,0), F3F(~2, ~0x35, ~0x0a1)|MCOND(~FCONDUL,~0), "7,f,g", 0, v9 }, | |
1614 | { "fmovsul", F3F(2, 0x35, 0x0c1)|MCOND(FCONDUL,0), F3F(~2, ~0x35, ~0x0c1)|MCOND(~FCONDUL,~0), "8,f,g", 0, v9 }, | |
1615 | { "fmovsul", F3F(2, 0x35, 0x0e1)|MCOND(FCONDUL,0), F3F(~2, ~0x35, ~0x0e1)|MCOND(~FCONDUL,~0), "9,f,g", 0, v9 }, | |
1616 | { "fmovdule", F3F(2, 0x35, 0x082)|MCOND(FCONDULE,0), F3F(~2, ~0x35, ~0x082)|MCOND(~FCONDULE,~0), "6,f,g", 0, v9 }, | |
1617 | { "fmovdule", F3F(2, 0x35, 0x0a2)|MCOND(FCONDULE,0), F3F(~2, ~0x35, ~0x0a2)|MCOND(~FCONDULE,~0), "7,f,g", 0, v9 }, | |
1618 | { "fmovdule", F3F(2, 0x35, 0x0c2)|MCOND(FCONDULE,0), F3F(~2, ~0x35, ~0x0c2)|MCOND(~FCONDULE,~0), "8,f,g", 0, v9 }, | |
1619 | { "fmovdule", F3F(2, 0x35, 0x0e2)|MCOND(FCONDULE,0), F3F(~2, ~0x35, ~0x0e2)|MCOND(~FCONDULE,~0), "9,f,g", 0, v9 }, | |
1620 | { "fmovqule", F3F(2, 0x35, 0x083)|MCOND(FCONDULE,0), F3F(~2, ~0x35, ~0x083)|MCOND(~FCONDULE,~0), "6,f,g", 0, v9 }, | |
1621 | { "fmovqule", F3F(2, 0x35, 0x0a3)|MCOND(FCONDULE,0), F3F(~2, ~0x35, ~0x0a3)|MCOND(~FCONDULE,~0), "7,f,g", 0, v9 }, | |
1622 | { "fmovqule", F3F(2, 0x35, 0x0c3)|MCOND(FCONDULE,0), F3F(~2, ~0x35, ~0x0c3)|MCOND(~FCONDULE,~0), "8,f,g", 0, v9 }, | |
1623 | { "fmovqule", F3F(2, 0x35, 0x0e3)|MCOND(FCONDULE,0), F3F(~2, ~0x35, ~0x0e3)|MCOND(~FCONDULE,~0), "9,f,g", 0, v9 }, | |
1624 | { "fmovsule", F3F(2, 0x35, 0x081)|MCOND(FCONDULE,0), F3F(~2, ~0x35, ~0x081)|MCOND(~FCONDULE,~0), "6,f,g", 0, v9 }, | |
1625 | { "fmovsule", F3F(2, 0x35, 0x0a1)|MCOND(FCONDULE,0), F3F(~2, ~0x35, ~0x0a1)|MCOND(~FCONDULE,~0), "7,f,g", 0, v9 }, | |
1626 | { "fmovsule", F3F(2, 0x35, 0x0c1)|MCOND(FCONDULE,0), F3F(~2, ~0x35, ~0x0c1)|MCOND(~FCONDULE,~0), "8,f,g", 0, v9 }, | |
1627 | { "fmovsule", F3F(2, 0x35, 0x0e1)|MCOND(FCONDULE,0), F3F(~2, ~0x35, ~0x0e1)|MCOND(~FCONDULE,~0), "9,f,g", 0, v9 }, | |
1628 | { "fmovdvc", F3F(2, 0x35, 0x102)|MCOND(CONDVC,0), F3F(~2, ~0x35, ~0x102)|MCOND(~CONDVC,~0), "z,f,g", 0, v9 }, | |
1629 | { "fmovdvc", F3F(2, 0x35, 0x182)|MCOND(CONDVC,0), F3F(~2, ~0x35, ~0x182)|MCOND(~CONDVC,~0), "Z,f,g", 0, v9 }, | |
1630 | { "fmovqvc", F3F(2, 0x35, 0x103)|MCOND(CONDVC,0), F3F(~2, ~0x35, ~0x103)|MCOND(~CONDVC,~0), "z,f,g", 0, v9 }, | |
1631 | { "fmovqvc", F3F(2, 0x35, 0x183)|MCOND(CONDVC,0), F3F(~2, ~0x35, ~0x183)|MCOND(~CONDVC,~0), "Z,f,g", 0, v9 }, | |
1632 | { "fmovsvc", F3F(2, 0x35, 0x101)|MCOND(CONDVC,0), F3F(~2, ~0x35, ~0x101)|MCOND(~CONDVC,~0), "z,f,g", 0, v9 }, | |
1633 | { "fmovsvc", F3F(2, 0x35, 0x181)|MCOND(CONDVC,0), F3F(~2, ~0x35, ~0x181)|MCOND(~CONDVC,~0), "Z,f,g", 0, v9 }, | |
1634 | { "fmovdvs", F3F(2, 0x35, 0x102)|MCOND(CONDVS,0), F3F(~2, ~0x35, ~0x102)|MCOND(~CONDVS,~0), "z,f,g", 0, v9 }, | |
1635 | { "fmovdvs", F3F(2, 0x35, 0x182)|MCOND(CONDVS,0), F3F(~2, ~0x35, ~0x182)|MCOND(~CONDVS,~0), "Z,f,g", 0, v9 }, | |
1636 | { "fmovqvs", F3F(2, 0x35, 0x103)|MCOND(CONDVS,0), F3F(~2, ~0x35, ~0x103)|MCOND(~CONDVS,~0), "z,f,g", 0, v9 }, | |
1637 | { "fmovqvs", F3F(2, 0x35, 0x183)|MCOND(CONDVS,0), F3F(~2, ~0x35, ~0x183)|MCOND(~CONDVS,~0), "Z,f,g", 0, v9 }, | |
1638 | { "fmovsvs", F3F(2, 0x35, 0x101)|MCOND(CONDVS,0), F3F(~2, ~0x35, ~0x101)|MCOND(~CONDVS,~0), "z,f,g", 0, v9 }, | |
1639 | { "fmovsvs", F3F(2, 0x35, 0x181)|MCOND(CONDVS,0), F3F(~2, ~0x35, ~0x181)|MCOND(~CONDVS,~0), "Z,f,g", 0, v9 }, | |
1640 | { "fmovdz", F3F(2, 0x35, 0x102)|MCOND(CONDZ,0), F3F(~2, ~0x35, ~0x102)|MCOND(~CONDZ,~0), "z,f,g", F_ALIAS, v9 }, | |
1641 | { "fmovdz", F3F(2, 0x35, 0x082)|MCOND(FCONDZ,0), F3F(~2, ~0x35, ~0x082)|MCOND(~FCONDZ,~0), "6,f,g", F_ALIAS, v9 }, | |
1642 | { "fmovdz", F3F(2, 0x35, 0x182)|MCOND(CONDZ,0), F3F(~2, ~0x35, ~0x182)|MCOND(~CONDZ,~0), "Z,f,g", F_ALIAS, v9 }, | |
1643 | { "fmovdz", F3F(2, 0x35, 0x0a2)|MCOND(FCONDZ,0), F3F(~2, ~0x35, ~0x0a2)|MCOND(~FCONDZ,~0), "7,f,g", F_ALIAS, v9 }, | |
1644 | { "fmovdz", F3F(2, 0x35, 0x0c2)|MCOND(FCONDZ,0), F3F(~2, ~0x35, ~0x0c2)|MCOND(~FCONDZ,~0), "8,f,g", F_ALIAS, v9 }, | |
1645 | { "fmovdz", F3F(2, 0x35, 0x0e2)|MCOND(FCONDZ,0), F3F(~2, ~0x35, ~0x0e2)|MCOND(~FCONDZ,~0), "9,f,g", F_ALIAS, v9 }, | |
1646 | { "fmovqz", F3F(2, 0x35, 0x103)|MCOND(CONDZ,0), F3F(~2, ~0x35, ~0x103)|MCOND(~CONDZ,~0), "z,f,g", F_ALIAS, v9 }, | |
1647 | { "fmovqz", F3F(2, 0x35, 0x083)|MCOND(FCONDZ,0), F3F(~2, ~0x35, ~0x083)|MCOND(~FCONDZ,~0), "6,f,g", F_ALIAS, v9 }, | |
1648 | { "fmovqz", F3F(2, 0x35, 0x183)|MCOND(CONDZ,0), F3F(~2, ~0x35, ~0x183)|MCOND(~CONDZ,~0), "Z,f,g", F_ALIAS, v9 }, | |
1649 | { "fmovqz", F3F(2, 0x35, 0x0a3)|MCOND(FCONDZ,0), F3F(~2, ~0x35, ~0x0a3)|MCOND(~FCONDZ,~0), "7,f,g", F_ALIAS, v9 }, | |
1650 | { "fmovqz", F3F(2, 0x35, 0x0c3)|MCOND(FCONDZ,0), F3F(~2, ~0x35, ~0x0c3)|MCOND(~FCONDZ,~0), "8,f,g", F_ALIAS, v9 }, | |
1651 | { "fmovqz", F3F(2, 0x35, 0x0e3)|MCOND(FCONDZ,0), F3F(~2, ~0x35, ~0x0e3)|MCOND(~FCONDZ,~0), "9,f,g", F_ALIAS, v9 }, | |
1652 | { "fmovsz", F3F(2, 0x35, 0x101)|MCOND(CONDZ,0), F3F(~2, ~0x35, ~0x101)|MCOND(~CONDZ,~0), "z,f,g", F_ALIAS, v9 }, | |
1653 | { "fmovsz", F3F(2, 0x35, 0x081)|MCOND(FCONDZ,0), F3F(~2, ~0x35, ~0x081)|MCOND(~FCONDZ,~0), "6,f,g", F_ALIAS, v9 }, | |
1654 | { "fmovsz", F3F(2, 0x35, 0x181)|MCOND(CONDZ,0), F3F(~2, ~0x35, ~0x181)|MCOND(~CONDZ,~0), "Z,f,g", F_ALIAS, v9 }, | |
1655 | { "fmovsz", F3F(2, 0x35, 0x0a1)|MCOND(FCONDZ,0), F3F(~2, ~0x35, ~0x0a1)|MCOND(~FCONDZ,~0), "7,f,g", F_ALIAS, v9 }, | |
1656 | { "fmovsz", F3F(2, 0x35, 0x0c1)|MCOND(FCONDZ,0), F3F(~2, ~0x35, ~0x0c1)|MCOND(~FCONDZ,~0), "8,f,g", F_ALIAS, v9 }, | |
1657 | { "fmovsz", F3F(2, 0x35, 0x0e1)|MCOND(FCONDZ,0), F3F(~2, ~0x35, ~0x0e1)|MCOND(~FCONDZ,~0), "9,f,g", F_ALIAS, v9 }, | |
794a16b0 KR |
1658 | |
1659 | #define brfc(opcode, mask, lose, flags) \ | |
1660 | { opcode, (mask), ANNUL|(lose), "l", flags|F_DELAYED, v6 }, \ | |
1661 | { opcode, (mask)|ANNUL, (lose), ",a l", flags|F_DELAYED, v6 } | |
1662 | ||
1663 | #define brfcx(opcode, mask, lose, flags) /* v9 */ \ | |
1664 | { opcode, FBFCC(0)|(mask), ANNUL|BPRED|FBFCC(~0)|(lose), "6,G", flags|F_DELAYED, v9 }, \ | |
1665 | { opcode, FBFCC(0)|(mask)|ANNUL, BPRED|FBFCC(~0)|(lose), ",a 6,G", flags|F_DELAYED, v9 }, \ | |
1666 | { opcode, FBFCC(0)|(mask), ANNUL|BPRED|FBFCC(~0)|(lose), ",N 6,G", flags|F_DELAYED, v9 }, \ | |
1667 | { opcode, FBFCC(0)|(mask)|ANNUL, BPRED|FBFCC(~0)|(lose), ",a,N 6,G", flags|F_DELAYED, v9 }, \ | |
1668 | { opcode, FBFCC(0)|(mask)|BPRED, ANNUL|FBFCC(~0)|(lose), ",T 6,G", flags|F_DELAYED, v9 }, \ | |
1669 | { opcode, FBFCC(0)|(mask)|BPRED|ANNUL, FBFCC(~0)|(lose), ",a,T 6,G", flags|F_DELAYED, v9 }, \ | |
1670 | { opcode, FBFCC(1)|(mask), ANNUL|BPRED|FBFCC(~1)|(lose), "7,G", flags|F_DELAYED, v9 }, \ | |
1671 | { opcode, FBFCC(1)|(mask)|ANNUL, BPRED|FBFCC(~1)|(lose), ",a 7,G", flags|F_DELAYED, v9 }, \ | |
1672 | { opcode, FBFCC(1)|(mask), ANNUL|BPRED|FBFCC(~1)|(lose), ",N 7,G", flags|F_DELAYED, v9 }, \ | |
1673 | { opcode, FBFCC(1)|(mask)|ANNUL, BPRED|FBFCC(~1)|(lose), ",a,N 7,G", flags|F_DELAYED, v9 }, \ | |
1674 | { opcode, FBFCC(1)|(mask)|BPRED, ANNUL|FBFCC(~1)|(lose), ",T 7,G", flags|F_DELAYED, v9 }, \ | |
1675 | { opcode, FBFCC(1)|(mask)|BPRED|ANNUL, FBFCC(~1)|(lose), ",a,T 7,G", flags|F_DELAYED, v9 }, \ | |
1676 | { opcode, FBFCC(2)|(mask), ANNUL|BPRED|FBFCC(~2)|(lose), "8,G", flags|F_DELAYED, v9 }, \ | |
1677 | { opcode, FBFCC(2)|(mask)|ANNUL, BPRED|FBFCC(~2)|(lose), ",a 8,G", flags|F_DELAYED, v9 }, \ | |
1678 | { opcode, FBFCC(2)|(mask), ANNUL|BPRED|FBFCC(~2)|(lose), ",N 8,G", flags|F_DELAYED, v9 }, \ | |
1679 | { opcode, FBFCC(2)|(mask)|ANNUL, BPRED|FBFCC(~2)|(lose), ",a,N 8,G", flags|F_DELAYED, v9 }, \ | |
1680 | { opcode, FBFCC(2)|(mask)|BPRED, ANNUL|FBFCC(~2)|(lose), ",T 8,G", flags|F_DELAYED, v9 }, \ | |
1681 | { opcode, FBFCC(2)|(mask)|BPRED|ANNUL, FBFCC(~2)|(lose), ",a,T 8,G", flags|F_DELAYED, v9 }, \ | |
1682 | { opcode, FBFCC(3)|(mask), ANNUL|BPRED|FBFCC(~3)|(lose), "9,G", flags|F_DELAYED, v9 }, \ | |
1683 | { opcode, FBFCC(3)|(mask)|ANNUL, BPRED|FBFCC(~3)|(lose), ",a 9,G", flags|F_DELAYED, v9 }, \ | |
1684 | { opcode, FBFCC(3)|(mask), ANNUL|BPRED|FBFCC(~3)|(lose), ",N 9,G", flags|F_DELAYED, v9 }, \ | |
1685 | { opcode, FBFCC(3)|(mask)|ANNUL, BPRED|FBFCC(~3)|(lose), ",a,N 9,G", flags|F_DELAYED, v9 }, \ | |
1686 | { opcode, FBFCC(3)|(mask)|BPRED, ANNUL|FBFCC(~3)|(lose), ",T 9,G", flags|F_DELAYED, v9 }, \ | |
1687 | { opcode, FBFCC(3)|(mask)|BPRED|ANNUL, FBFCC(~3)|(lose), ",a,T 9,G", flags|F_DELAYED, v9 } | |
1688 | ||
1689 | #define condfc(fop, cop, mask, flags) \ | |
1690 | brfc(fop, F2(0, 6)|COND(mask), F2(~0, ~6)|COND(~(mask)), flags), \ | |
1691 | brfcx(fop, F2(0, 5)|COND(mask), F2(~0, ~5)|COND(~(mask)), flags), /* v9 */ \ | |
1692 | brfc(cop, F2(0, 7)|COND(mask), F2(~0, ~7)|COND(~(mask)), flags) \ | |
1693 | ||
493d3e75 KR |
1694 | #define condf(fop, mask, flags) \ |
1695 | brfcx(fop, F2(0, 5)|COND(mask), F2(~0, ~5)|COND(~(mask)), flags), /* v9 */ \ | |
1696 | brfc(fop, F2(0, 6)|COND(mask), F2(~0, ~6)|COND(~(mask)), flags) | |
1697 | ||
794a16b0 KR |
1698 | condfc("fb", "cb", 0x8, 0), |
1699 | condfc("fba", "cba", 0x8, F_ALIAS), | |
1700 | condfc("fbe", "cb0", 0x9, 0), | |
493d3e75 | 1701 | condf("fbz", 0x9, F_ALIAS), |
794a16b0 KR |
1702 | condfc("fbg", "cb2", 0x6, 0), |
1703 | condfc("fbge", "cb02", 0xb, 0), | |
1704 | condfc("fbl", "cb1", 0x4, 0), | |
1705 | condfc("fble", "cb01", 0xd, 0), | |
1706 | condfc("fblg", "cb12", 0x2, 0), | |
1707 | condfc("fbn", "cbn", 0x0, 0), | |
1708 | condfc("fbne", "cb123", 0x1, 0), | |
493d3e75 | 1709 | condf("fbnz", 0x1, F_ALIAS), |
794a16b0 KR |
1710 | condfc("fbo", "cb012", 0xf, 0), |
1711 | condfc("fbu", "cb3", 0x7, 0), | |
1712 | condfc("fbue", "cb03", 0xa, 0), | |
1713 | condfc("fbug", "cb23", 0x5, 0), | |
1714 | condfc("fbuge", "cb023", 0xc, 0), | |
1715 | condfc("fbul", "cb13", 0x3, 0), | |
1716 | condfc("fbule", "cb013", 0xe, 0), | |
1717 | ||
1718 | #undef condfc | |
1719 | #undef brfc | |
493d3e75 | 1720 | #undef brfcx /* v9 */ |
794a16b0 KR |
1721 | |
1722 | { "jmp", F3(2, 0x38, 0), F3(~2, ~0x38, ~0)|RD_G0|ASI(~0), "1+2", F_DELAYED, v6 }, /* jmpl rs1+rs2,%g0 */ | |
1723 | { "jmp", F3(2, 0x38, 0), F3(~2, ~0x38, ~0)|RD_G0|ASI_RS2(~0), "1", F_DELAYED, v6 }, /* jmpl rs1+%g0,%g0 */ | |
1724 | { "jmp", F3(2, 0x38, 1), F3(~2, ~0x38, ~1)|RD_G0, "1+i", F_DELAYED, v6 }, /* jmpl rs1+i,%g0 */ | |
1725 | { "jmp", F3(2, 0x38, 1), F3(~2, ~0x38, ~1)|RD_G0, "i+1", F_DELAYED, v6 }, /* jmpl i+rs1,%g0 */ | |
1726 | { "jmp", F3(2, 0x38, 1), F3(~2, ~0x38, ~1)|RD_G0|RS1_G0, "i", F_DELAYED, v6 }, /* jmpl %g0+i,%g0 */ | |
1727 | ||
1728 | { "nop", F2(0, 4), 0xfeffffff, "", 0, v6 }, /* sethi 0, %g0 */ | |
1729 | ||
1730 | { "set", F2(0x0, 0x4), F2(~0x0, ~0x4), "Sh,d", F_ALIAS, v6 }, | |
1731 | ||
1732 | { "sethi", F2(0x0, 0x4), F2(~0x0, ~0x4), "h,d", 0, v6 }, | |
1733 | ||
1734 | { "taddcc", F3(2, 0x20, 0), F3(~2, ~0x20, ~0)|ASI(~0), "1,2,d", 0, v6 }, | |
1735 | { "taddcc", F3(2, 0x20, 1), F3(~2, ~0x20, ~1), "1,i,d", 0, v6 }, | |
1736 | { "taddcc", F3(2, 0x20, 1), F3(~2, ~0x20, ~1), "i,1,d", 0, v6 }, | |
1737 | { "taddcctv", F3(2, 0x22, 0), F3(~2, ~0x22, ~0)|ASI(~0), "1,2,d", 0, v6 }, | |
1738 | { "taddcctv", F3(2, 0x22, 1), F3(~2, ~0x22, ~1), "1,i,d", 0, v6 }, | |
1739 | { "taddcctv", F3(2, 0x22, 1), F3(~2, ~0x22, ~1), "i,1,d", 0, v6 }, | |
1740 | ||
1741 | { "tsubcc", F3(2, 0x21, 0), F3(~2, ~0x21, ~0)|ASI(~0), "1,2,d", 0, v6 }, | |
1742 | { "tsubcc", F3(2, 0x21, 1), F3(~2, ~0x21, ~1), "1,i,d", 0, v6 }, | |
1743 | { "tsubcctv", F3(2, 0x23, 0), F3(~2, ~0x23, ~0)|ASI(~0), "1,2,d", 0, v6 }, | |
1744 | { "tsubcctv", F3(2, 0x23, 1), F3(~2, ~0x23, ~1), "1,i,d", 0, v6 }, | |
1745 | ||
493d3e75 KR |
1746 | /* FIXME Thise is marked F_ALIAS, so that it won't conflict with new v9 |
1747 | insns when v9 is present. Otherwise, the F_ALIAS flag is ignored. */ | |
1748 | { "unimp", F2(0x0, 0x0), 0xffc00000, "n", F_ALIAS, v6 }, | |
1749 | { "illtrap", F2(0, 0), F2(~0, ~0)|RD_G0, "n", 0, v9 }, | |
794a16b0 | 1750 | |
493d3e75 | 1751 | /* This *is* a commutative instruction. */ |
794a16b0 KR |
1752 | { "xnor", F3(2, 0x07, 0), F3(~2, ~0x07, ~0)|ASI(~0), "1,2,d", 0, v6 }, |
1753 | { "xnor", F3(2, 0x07, 1), F3(~2, ~0x07, ~1), "1,i,d", 0, v6 }, | |
1754 | { "xnor", F3(2, 0x07, 1), F3(~2, ~0x07, ~1), "i,1,d", 0, v6 }, | |
493d3e75 | 1755 | /* This *is* a commutative instruction. */ |
794a16b0 KR |
1756 | { "xnorcc", F3(2, 0x17, 0), F3(~2, ~0x17, ~0)|ASI(~0), "1,2,d", 0, v6 }, |
1757 | { "xnorcc", F3(2, 0x17, 1), F3(~2, ~0x17, ~1), "1,i,d", 0, v6 }, | |
1758 | { "xnorcc", F3(2, 0x17, 1), F3(~2, ~0x17, ~1), "i,1,d", 0, v6 }, | |
1759 | { "xor", F3(2, 0x03, 0), F3(~2, ~0x03, ~0)|ASI(~0), "1,2,d", 0, v6 }, | |
1760 | { "xor", F3(2, 0x03, 1), F3(~2, ~0x03, ~1), "1,i,d", 0, v6 }, | |
1761 | { "xor", F3(2, 0x03, 1), F3(~2, ~0x03, ~1), "i,1,d", 0, v6 }, | |
1762 | { "xorcc", F3(2, 0x13, 0), F3(~2, ~0x13, ~0)|ASI(~0), "1,2,d", 0, v6 }, | |
1763 | { "xorcc", F3(2, 0x13, 1), F3(~2, ~0x13, ~1), "1,i,d", 0, v6 }, | |
1764 | { "xorcc", F3(2, 0x13, 1), F3(~2, ~0x13, ~1), "i,1,d", 0, v6 }, | |
1765 | ||
1766 | { "not", F3(2, 0x07, 0), F3(~2, ~0x07, ~0)|ASI(~0), "1,d", F_ALIAS, v6 }, /* xnor rs1,%0,rd */ | |
1767 | { "not", F3(2, 0x07, 0), F3(~2, ~0x07, ~0)|ASI(~0), "r", F_ALIAS, v6 }, /* xnor rd,%0,rd */ | |
1768 | ||
1769 | { "btog", F3(2, 0x03, 0), F3(~2, ~0x03, ~0)|ASI(~0), "2,r", F_ALIAS, v6 }, /* xor rd,rs2,rd */ | |
1770 | { "btog", F3(2, 0x03, 1), F3(~2, ~0x03, ~1), "i,r", F_ALIAS, v6 }, /* xor rd,i,rd */ | |
1771 | ||
493d3e75 | 1772 | /* FPop1 and FPop2 are not instructions. Don't accept them. */ |
794a16b0 | 1773 | |
794a16b0 KR |
1774 | { "fdtoi", F3F(2, 0x34, 0x0d2), F3F(~2, ~0x34, ~0x0d2)|RS1_G0, "B,g", 0, v6 }, |
1775 | { "fstoi", F3F(2, 0x34, 0x0d1), F3F(~2, ~0x34, ~0x0d1)|RS1_G0, "f,g", 0, v6 }, | |
493d3e75 KR |
1776 | { "fqtoi", F3F(2, 0x34, 0x0d3), F3F(~2, ~0x34, ~0x0d3)|RS1_G0, "R,g", 0, v8 }, |
1777 | ||
1778 | { "fdtox", F3F(2, 0x34, 0x082), F3F(~2, ~0x34, ~0x082)|RS1_G0, "B,g", 0, v9 }, | |
1779 | { "fstox", F3F(2, 0x34, 0x081), F3F(~2, ~0x34, ~0x081)|RS1_G0, "f,g", 0, v9 }, | |
1780 | { "fqtox", F3F(2, 0x34, 0x083), F3F(~2, ~0x34, ~0x083)|RS1_G0, "R,g", 0, v9 }, | |
794a16b0 | 1781 | |
794a16b0 KR |
1782 | { "fitod", F3F(2, 0x34, 0x0c8), F3F(~2, ~0x34, ~0x0c8)|RS1_G0, "f,H", 0, v6 }, |
1783 | { "fitos", F3F(2, 0x34, 0x0c4), F3F(~2, ~0x34, ~0x0c4)|RS1_G0, "f,g", 0, v6 }, | |
794a16b0 KR |
1784 | { "fitoq", F3F(2, 0x34, 0x0cc), F3F(~2, ~0x34, ~0x0cc)|RS1_G0, "f,J", 0, v8 }, |
1785 | ||
493d3e75 KR |
1786 | { "fxtod", F3F(2, 0x34, 0x088), F3F(~2, ~0x34, ~0x088)|RS1_G0, "f,H", 0, v9 }, |
1787 | { "fxtos", F3F(2, 0x34, 0x084), F3F(~2, ~0x34, ~0x084)|RS1_G0, "f,g", 0, v9 }, | |
794a16b0 KR |
1788 | { "fxtoq", F3F(2, 0x34, 0x08c), F3F(~2, ~0x34, ~0x08c)|RS1_G0, "f,J", 0, v9 }, |
1789 | ||
1790 | { "fdtoq", F3F(2, 0x34, 0x0ce), F3F(~2, ~0x34, ~0x0ce)|RS1_G0, "B,J", 0, v8 }, | |
1791 | { "fdtos", F3F(2, 0x34, 0x0c6), F3F(~2, ~0x34, ~0x0c6)|RS1_G0, "B,g", 0, v6 }, | |
1792 | { "fqtod", F3F(2, 0x34, 0x0cb), F3F(~2, ~0x34, ~0x0cb)|RS1_G0, "R,H", 0, v8 }, | |
1793 | { "fqtos", F3F(2, 0x34, 0x0c7), F3F(~2, ~0x34, ~0x0c7)|RS1_G0, "R,g", 0, v8 }, | |
1794 | { "fstod", F3F(2, 0x34, 0x0c9), F3F(~2, ~0x34, ~0x0c9)|RS1_G0, "f,H", 0, v6 }, | |
1795 | { "fstoq", F3F(2, 0x34, 0x0cd), F3F(~2, ~0x34, ~0x0cd)|RS1_G0, "f,J", 0, v8 }, | |
1796 | ||
794a16b0 KR |
1797 | { "fdivd", F3F(2, 0x34, 0x04e), F3F(~2, ~0x34, ~0x04e), "v,B,H", 0, v6 }, |
1798 | { "fdivq", F3F(2, 0x34, 0x04f), F3F(~2, ~0x34, ~0x04f), "V,R,J", 0, v8 }, | |
1799 | { "fdivs", F3F(2, 0x34, 0x04d), F3F(~2, ~0x34, ~0x04d), "e,f,g", 0, v6 }, | |
1800 | { "fmuld", F3F(2, 0x34, 0x04a), F3F(~2, ~0x34, ~0x04a), "v,B,H", 0, v6 }, | |
1801 | { "fmulq", F3F(2, 0x34, 0x04b), F3F(~2, ~0x34, ~0x04b), "V,R,J", 0, v8 }, | |
1802 | { "fmuls", F3F(2, 0x34, 0x049), F3F(~2, ~0x34, ~0x049), "e,f,g", 0, v6 }, | |
1803 | ||
1804 | { "fdmulq", F3F(2, 0x34, 0x06e), F3F(~2, ~0x34, ~0x06e), "v,B,J", 0, v8 }, | |
1805 | { "fsmuld", F3F(2, 0x34, 0x069), F3F(~2, ~0x34, ~0x069), "e,f,H", 0, v8 }, | |
1806 | ||
1807 | { "fsqrtd", F3F(2, 0x34, 0x02a), F3F(~2, ~0x34, ~0x02a)|RS1_G0, "B,H", 0, v7 }, | |
1808 | { "fsqrtq", F3F(2, 0x34, 0x02b), F3F(~2, ~0x34, ~0x02b)|RS1_G0, "R,J", 0, v8 }, | |
1809 | { "fsqrts", F3F(2, 0x34, 0x029), F3F(~2, ~0x34, ~0x029)|RS1_G0, "f,g", 0, v7 }, | |
1810 | ||
1811 | { "fabsd", F3F(2, 0x34, 0x00a), F3F(~2, ~0x34, ~0x00a)|RS1_G0, "B,H", 0, v9 }, | |
493d3e75 | 1812 | { "fabsq", F3F(2, 0x34, 0x00b), F3F(~2, ~0x34, ~0x00b)|RS1_G0, "R,J", 0, v9 }, |
794a16b0 KR |
1813 | { "fabss", F3F(2, 0x34, 0x009), F3F(~2, ~0x34, ~0x009)|RS1_G0, "f,g", 0, v6 }, |
1814 | { "fmovd", F3F(2, 0x34, 0x002), F3F(~2, ~0x34, ~0x002)|RS1_G0, "B,H", 0, v9 }, | |
493d3e75 | 1815 | { "fmovq", F3F(2, 0x34, 0x003), F3F(~2, ~0x34, ~0x003)|RS1_G0, "R,J", 0, v9 }, |
794a16b0 KR |
1816 | { "fmovs", F3F(2, 0x34, 0x001), F3F(~2, ~0x34, ~0x001)|RS1_G0, "f,g", 0, v6 }, |
1817 | { "fnegd", F3F(2, 0x34, 0x006), F3F(~2, ~0x34, ~0x006)|RS1_G0, "B,H", 0, v9 }, | |
493d3e75 | 1818 | { "fnegq", F3F(2, 0x34, 0x007), F3F(~2, ~0x34, ~0x007)|RS1_G0, "R,J", 0, v9 }, |
794a16b0 KR |
1819 | { "fnegs", F3F(2, 0x34, 0x005), F3F(~2, ~0x34, ~0x005)|RS1_G0, "f,g", 0, v6 }, |
1820 | ||
794a16b0 KR |
1821 | { "faddd", F3F(2, 0x34, 0x042), F3F(~2, ~0x34, ~0x042), "v,B,H", 0, v6 }, |
1822 | { "faddq", F3F(2, 0x34, 0x043), F3F(~2, ~0x34, ~0x043), "V,R,J", 0, v8 }, | |
1823 | { "fadds", F3F(2, 0x34, 0x041), F3F(~2, ~0x34, ~0x041), "e,f,g", 0, v6 }, | |
1824 | { "fsubd", F3F(2, 0x34, 0x046), F3F(~2, ~0x34, ~0x046), "v,B,H", 0, v6 }, | |
1825 | { "fsubq", F3F(2, 0x34, 0x047), F3F(~2, ~0x34, ~0x047), "V,R,J", 0, v8 }, | |
1826 | { "fsubs", F3F(2, 0x34, 0x045), F3F(~2, ~0x34, ~0x045), "e,f,g", 0, v6 }, | |
1827 | ||
1828 | #define CMPFCC(x) (((x)&0x3)<<25) | |
1829 | ||
493d3e75 | 1830 | { "fcmpd", F3F(2, 0x35, 0x052), F3F(~2, ~0x35, ~0x052)|RD_G0, "v,B", 0, v6 }, |
794a16b0 KR |
1831 | { "fcmpd", CMPFCC(0)|F3F(2, 0x35, 0x052), CMPFCC(~0)|F3F(~2, ~0x35, ~0x052), "6,v,B", 0, v9 }, |
1832 | { "fcmpd", CMPFCC(1)|F3F(2, 0x35, 0x052), CMPFCC(~1)|F3F(~2, ~0x35, ~0x052), "7,v,B", 0, v9 }, | |
1833 | { "fcmpd", CMPFCC(2)|F3F(2, 0x35, 0x052), CMPFCC(~2)|F3F(~2, ~0x35, ~0x052), "8,v,B", 0, v9 }, | |
1834 | { "fcmpd", CMPFCC(3)|F3F(2, 0x35, 0x052), CMPFCC(~3)|F3F(~2, ~0x35, ~0x052), "9,v,B", 0, v9 }, | |
493d3e75 | 1835 | { "fcmped", F3F(2, 0x35, 0x056), F3F(~2, ~0x35, ~0x056)|RD_G0, "v,B", 0, v6 }, |
794a16b0 KR |
1836 | { "fcmped", CMPFCC(0)|F3F(2, 0x35, 0x056), CMPFCC(~0)|F3F(~2, ~0x35, ~0x056), "6,v,B", 0, v9 }, |
1837 | { "fcmped", CMPFCC(1)|F3F(2, 0x35, 0x056), CMPFCC(~1)|F3F(~2, ~0x35, ~0x056), "7,v,B", 0, v9 }, | |
1838 | { "fcmped", CMPFCC(2)|F3F(2, 0x35, 0x056), CMPFCC(~2)|F3F(~2, ~0x35, ~0x056), "8,v,B", 0, v9 }, | |
1839 | { "fcmped", CMPFCC(3)|F3F(2, 0x35, 0x056), CMPFCC(~3)|F3F(~2, ~0x35, ~0x056), "9,v,B", 0, v9 }, | |
493d3e75 | 1840 | { "fcmpq", F3F(2, 0x34, 0x053), F3F(~2, ~0x34, ~0x053)|RD_G0, "V,R", 0, v8 }, |
794a16b0 KR |
1841 | { "fcmpq", CMPFCC(0)|F3F(2, 0x35, 0x053), CMPFCC(~0)|F3F(~2, ~0x35, ~0x053), "6,V,R", 0, v9 }, |
1842 | { "fcmpq", CMPFCC(1)|F3F(2, 0x35, 0x053), CMPFCC(~1)|F3F(~2, ~0x35, ~0x053), "7,V,R", 0, v9 }, | |
1843 | { "fcmpq", CMPFCC(2)|F3F(2, 0x35, 0x053), CMPFCC(~2)|F3F(~2, ~0x35, ~0x053), "8,V,R", 0, v9 }, | |
1844 | { "fcmpq", CMPFCC(3)|F3F(2, 0x35, 0x053), CMPFCC(~3)|F3F(~2, ~0x35, ~0x053), "9,V,R", 0, v9 }, | |
493d3e75 KR |
1845 | { "fcmpeq", F3F(2, 0x34, 0x057), F3F(~2, ~0x34, ~0x057)|RD_G0, "V,R", 0, v8 }, |
1846 | { "fcmpeq", CMPFCC(0)|F3F(2, 0x35, 0x057), CMPFCC(~0)|F3F(~2, ~0x35, ~0x057), "6,V,R", 0, v9 }, | |
1847 | { "fcmpeq", CMPFCC(1)|F3F(2, 0x35, 0x057), CMPFCC(~1)|F3F(~2, ~0x35, ~0x057), "7,V,R", 0, v9 }, | |
1848 | { "fcmpeq", CMPFCC(2)|F3F(2, 0x35, 0x057), CMPFCC(~2)|F3F(~2, ~0x35, ~0x057), "8,V,R", 0, v9 }, | |
1849 | { "fcmpeq", CMPFCC(3)|F3F(2, 0x35, 0x057), CMPFCC(~3)|F3F(~2, ~0x35, ~0x057), "9,V,R", 0, v9 }, | |
1850 | { "fcmps", F3F(2, 0x35, 0x051), F3F(~2, ~0x35, ~0x051)|RD_G0, "e,f", 0, v6 }, | |
794a16b0 KR |
1851 | { "fcmps", CMPFCC(0)|F3F(2, 0x35, 0x051), CMPFCC(~0)|F3F(~2, ~0x35, ~0x051), "6,e,f", 0, v9 }, |
1852 | { "fcmps", CMPFCC(1)|F3F(2, 0x35, 0x051), CMPFCC(~1)|F3F(~2, ~0x35, ~0x051), "7,e,f", 0, v9 }, | |
1853 | { "fcmps", CMPFCC(2)|F3F(2, 0x35, 0x051), CMPFCC(~2)|F3F(~2, ~0x35, ~0x051), "8,e,f", 0, v9 }, | |
1854 | { "fcmps", CMPFCC(3)|F3F(2, 0x35, 0x051), CMPFCC(~3)|F3F(~2, ~0x35, ~0x051), "9,e,f", 0, v9 }, | |
493d3e75 KR |
1855 | { "fcmpes", F3F(2, 0x35, 0x055), F3F(~2, ~0x35, ~0x055)|RD_G0, "e,f", 0, v6 }, |
1856 | { "fcmpes", CMPFCC(0)|F3F(2, 0x35, 0x055), CMPFCC(~0)|F3F(~2, ~0x35, ~0x055), "6,e,f", 0, v9 }, | |
1857 | { "fcmpes", CMPFCC(1)|F3F(2, 0x35, 0x055), CMPFCC(~1)|F3F(~2, ~0x35, ~0x055), "7,e,f", 0, v9 }, | |
1858 | { "fcmpes", CMPFCC(2)|F3F(2, 0x35, 0x055), CMPFCC(~2)|F3F(~2, ~0x35, ~0x055), "8,e,f", 0, v9 }, | |
1859 | { "fcmpes", CMPFCC(3)|F3F(2, 0x35, 0x055), CMPFCC(~3)|F3F(~2, ~0x35, ~0x055), "9,e,f", 0, v9 }, | |
794a16b0 | 1860 | |
493d3e75 KR |
1861 | /* FIXME These are marked F_ALIAS, so that they won't conflict with new v9 |
1862 | insns when v9 is present. Otherwise, the F_ALIAS flag is ignored. */ | |
1863 | { "cpop1", F3(2, 0x36, 0), F3(~2, ~0x36, ~1), "[1+2],d", F_ALIAS, v6 }, | |
1864 | { "cpop2", F3(2, 0x37, 0), F3(~2, ~0x37, ~1), "[1+2],d", F_ALIAS, v6 }, | |
1865 | { "impdep1", F3(2, 0x36, 0), F3(~2, ~0x36, ~1), "[1+2],d", 0, v9 }, | |
1866 | { "impdep2", F3(2, 0x37, 0), F3(~2, ~0x37, ~1), "[1+2],d", 0, v9 }, | |
794a16b0 | 1867 | |
493d3e75 KR |
1868 | { "casa", F3(3, 0x3c, 0), F3(~3, ~0x3c, ~0), "[1]A,2,d", 0, v9 }, |
1869 | { "casa", F3(3, 0x3c, 1), F3(~3, ~0x3c, ~1), "[1]o,2,d", 0, v9 }, | |
1870 | { "casxa", F3(3, 0x3e, 0), F3(~3, ~0x3e, ~0), "[1]A,2,d", 0, v9 }, | |
1871 | { "casxa", F3(3, 0x3e, 1), F3(~3, ~0x3e, ~1), "[1]o,2,d", 0, v9 }, | |
794a16b0 KR |
1872 | |
1873 | }; | |
1874 | ||
1875 | const int bfd_sparc_num_opcodes = ((sizeof sparc_opcodes)/(sizeof sparc_opcodes[0])); |