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aa137e4d NC |
1 | /* TILEPro opcode information. |
2 | ||
3 | Copyright 2011 Free Software Foundation, Inc. | |
4 | ||
5 | This program is free software; you can redistribute it and/or modify | |
6 | it under the terms of the GNU General Public License as published by | |
7 | the Free Software Foundation; either version 3 of the License, or | |
8 | (at your option) any later version. | |
9 | ||
10 | This program is distributed in the hope that it will be useful, | |
11 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
13 | GNU General Public License for more details. | |
14 | ||
15 | You should have received a copy of the GNU General Public License | |
16 | along with this program; if not, write to the Free Software | |
17 | Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, | |
18 | MA 02110-1301, USA. */ | |
19 | ||
20 | /* This define is BFD_RELOC_##x for real bfd, or -1 for everyone else. */ | |
21 | #define BFD_RELOC(x) BFD_RELOC_##x | |
22 | ||
23 | #include "bfd.h" | |
24 | ||
25 | /* Special registers. */ | |
26 | #define TREG_LR 55 | |
27 | #define TREG_SN 56 | |
28 | #define TREG_ZERO 63 | |
29 | ||
30 | #if defined(__KERNEL__) || defined(_LIBC) | |
31 | /* FIXME: Rename this. */ | |
32 | #include <asm/opcode-tile.h> | |
33 | #define DISASM_ONLY | |
34 | #else | |
35 | #include "opcode/tilepro.h" | |
36 | #endif | |
37 | ||
38 | #ifdef __KERNEL__ | |
39 | #include <linux/stddef.h> | |
40 | #else | |
41 | #include <stddef.h> | |
42 | #endif | |
43 | ||
44 | const struct tilepro_opcode tilepro_opcodes[395] = | |
45 | { | |
46 | { "bpt", TILEPRO_OPC_BPT, 0x2, 0, TREG_ZERO, 0, | |
47 | { { 0, }, { }, { 0, }, { 0, }, { 0, } }, | |
48 | #ifndef DISASM_ONLY | |
49 | { | |
50 | 0ULL, | |
51 | 0xfbffffff80000000ULL, | |
52 | 0ULL, | |
53 | 0ULL, | |
54 | 0ULL | |
55 | }, | |
56 | { | |
57 | -1ULL, | |
58 | 0x400b3cae00000000ULL, | |
59 | -1ULL, | |
60 | -1ULL, | |
61 | -1ULL | |
62 | } | |
63 | #endif | |
64 | }, | |
65 | { "info", TILEPRO_OPC_INFO, 0xf, 1, TREG_ZERO, 1, | |
66 | { { 0 }, { 1 }, { 2 }, { 3 }, { 0, } }, | |
67 | #ifndef DISASM_ONLY | |
68 | { | |
69 | 0x800000007ff00fffULL, | |
70 | 0xfff807ff80000000ULL, | |
71 | 0x8000000078000fffULL, | |
72 | 0xf80007ff80000000ULL, | |
73 | 0ULL | |
74 | }, | |
75 | { | |
76 | 0x0000000050100fffULL, | |
77 | 0x302007ff80000000ULL, | |
78 | 0x8000000050000fffULL, | |
79 | 0xc00007ff80000000ULL, | |
80 | -1ULL | |
81 | } | |
82 | #endif | |
83 | }, | |
84 | { "infol", TILEPRO_OPC_INFOL, 0x3, 1, TREG_ZERO, 1, | |
85 | { { 4 }, { 5 }, { 0, }, { 0, }, { 0, } }, | |
86 | #ifndef DISASM_ONLY | |
87 | { | |
88 | 0x8000000070000fffULL, | |
89 | 0xf80007ff80000000ULL, | |
90 | 0ULL, | |
91 | 0ULL, | |
92 | 0ULL | |
93 | }, | |
94 | { | |
95 | 0x0000000030000fffULL, | |
96 | 0x200007ff80000000ULL, | |
97 | -1ULL, | |
98 | -1ULL, | |
99 | -1ULL | |
100 | } | |
101 | #endif | |
102 | }, | |
103 | { "j", TILEPRO_OPC_J, 0x2, 1, TREG_ZERO, 1, | |
104 | { { 0, }, { 6 }, { 0, }, { 0, }, { 0, } }, | |
105 | #ifndef DISASM_ONLY | |
106 | { | |
107 | 0ULL, | |
108 | 0xf000000000000000ULL, | |
109 | 0ULL, | |
110 | 0ULL, | |
111 | 0ULL | |
112 | }, | |
113 | { | |
114 | -1ULL, | |
115 | 0x5000000000000000ULL, | |
116 | -1ULL, | |
117 | -1ULL, | |
118 | -1ULL | |
119 | } | |
120 | #endif | |
121 | }, | |
122 | { "jal", TILEPRO_OPC_JAL, 0x2, 1, TREG_LR, 1, | |
123 | { { 0, }, { 6 }, { 0, }, { 0, }, { 0, } }, | |
124 | #ifndef DISASM_ONLY | |
125 | { | |
126 | 0ULL, | |
127 | 0xf000000000000000ULL, | |
128 | 0ULL, | |
129 | 0ULL, | |
130 | 0ULL | |
131 | }, | |
132 | { | |
133 | -1ULL, | |
134 | 0x6000000000000000ULL, | |
135 | -1ULL, | |
136 | -1ULL, | |
137 | -1ULL | |
138 | } | |
139 | #endif | |
140 | }, | |
141 | { "move", TILEPRO_OPC_MOVE, 0xf, 2, TREG_ZERO, 1, | |
142 | { { 7, 8 }, { 9, 10 }, { 11, 12 }, { 13, 14 }, { 0, } }, | |
143 | #ifndef DISASM_ONLY | |
144 | { | |
145 | 0x800000007ffff000ULL, | |
146 | 0xfffff80000000000ULL, | |
147 | 0x80000000780ff000ULL, | |
148 | 0xf807f80000000000ULL, | |
149 | 0ULL | |
150 | }, | |
151 | { | |
152 | 0x0000000000cff000ULL, | |
153 | 0x0833f80000000000ULL, | |
154 | 0x80000000180bf000ULL, | |
155 | 0x9805f80000000000ULL, | |
156 | -1ULL | |
157 | } | |
158 | #endif | |
159 | }, | |
160 | { "move.sn", TILEPRO_OPC_MOVE_SN, 0x3, 2, TREG_SN, 1, | |
161 | { { 7, 8 }, { 9, 10 }, { 0, }, { 0, }, { 0, } }, | |
162 | #ifndef DISASM_ONLY | |
163 | { | |
164 | 0x800000007ffff000ULL, | |
165 | 0xfffff80000000000ULL, | |
166 | 0ULL, | |
167 | 0ULL, | |
168 | 0ULL | |
169 | }, | |
170 | { | |
171 | 0x0000000008cff000ULL, | |
172 | 0x0c33f80000000000ULL, | |
173 | -1ULL, | |
174 | -1ULL, | |
175 | -1ULL | |
176 | } | |
177 | #endif | |
178 | }, | |
179 | { "movei", TILEPRO_OPC_MOVEI, 0xf, 2, TREG_ZERO, 1, | |
180 | { { 7, 0 }, { 9, 1 }, { 11, 2 }, { 13, 3 }, { 0, } }, | |
181 | #ifndef DISASM_ONLY | |
182 | { | |
183 | 0x800000007ff00fc0ULL, | |
184 | 0xfff807e000000000ULL, | |
185 | 0x8000000078000fc0ULL, | |
186 | 0xf80007e000000000ULL, | |
187 | 0ULL | |
188 | }, | |
189 | { | |
190 | 0x0000000040800fc0ULL, | |
191 | 0x305807e000000000ULL, | |
192 | 0x8000000058000fc0ULL, | |
193 | 0xc80007e000000000ULL, | |
194 | -1ULL | |
195 | } | |
196 | #endif | |
197 | }, | |
198 | { "movei.sn", TILEPRO_OPC_MOVEI_SN, 0x3, 2, TREG_SN, 1, | |
199 | { { 7, 0 }, { 9, 1 }, { 0, }, { 0, }, { 0, } }, | |
200 | #ifndef DISASM_ONLY | |
201 | { | |
202 | 0x800000007ff00fc0ULL, | |
203 | 0xfff807e000000000ULL, | |
204 | 0ULL, | |
205 | 0ULL, | |
206 | 0ULL | |
207 | }, | |
208 | { | |
209 | 0x0000000048800fc0ULL, | |
210 | 0x345807e000000000ULL, | |
211 | -1ULL, | |
212 | -1ULL, | |
213 | -1ULL | |
214 | } | |
215 | #endif | |
216 | }, | |
217 | { "moveli", TILEPRO_OPC_MOVELI, 0x3, 2, TREG_ZERO, 1, | |
218 | { { 7, 4 }, { 9, 5 }, { 0, }, { 0, }, { 0, } }, | |
219 | #ifndef DISASM_ONLY | |
220 | { | |
221 | 0x8000000070000fc0ULL, | |
222 | 0xf80007e000000000ULL, | |
223 | 0ULL, | |
224 | 0ULL, | |
225 | 0ULL | |
226 | }, | |
227 | { | |
228 | 0x0000000020000fc0ULL, | |
229 | 0x180007e000000000ULL, | |
230 | -1ULL, | |
231 | -1ULL, | |
232 | -1ULL | |
233 | } | |
234 | #endif | |
235 | }, | |
236 | { "moveli.sn", TILEPRO_OPC_MOVELI_SN, 0x3, 2, TREG_SN, 1, | |
237 | { { 7, 4 }, { 9, 5 }, { 0, }, { 0, }, { 0, } }, | |
238 | #ifndef DISASM_ONLY | |
239 | { | |
240 | 0x8000000070000fc0ULL, | |
241 | 0xf80007e000000000ULL, | |
242 | 0ULL, | |
243 | 0ULL, | |
244 | 0ULL | |
245 | }, | |
246 | { | |
247 | 0x0000000010000fc0ULL, | |
248 | 0x100007e000000000ULL, | |
249 | -1ULL, | |
250 | -1ULL, | |
251 | -1ULL | |
252 | } | |
253 | #endif | |
254 | }, | |
255 | { "movelis", TILEPRO_OPC_MOVELIS, 0x3, 2, TREG_SN, 1, | |
256 | { { 7, 4 }, { 9, 5 }, { 0, }, { 0, }, { 0, } }, | |
257 | #ifndef DISASM_ONLY | |
258 | { | |
259 | 0x8000000070000fc0ULL, | |
260 | 0xf80007e000000000ULL, | |
261 | 0ULL, | |
262 | 0ULL, | |
263 | 0ULL | |
264 | }, | |
265 | { | |
266 | 0x0000000010000fc0ULL, | |
267 | 0x100007e000000000ULL, | |
268 | -1ULL, | |
269 | -1ULL, | |
270 | -1ULL | |
271 | } | |
272 | #endif | |
273 | }, | |
274 | { "prefetch", TILEPRO_OPC_PREFETCH, 0x12, 1, TREG_ZERO, 1, | |
275 | { { 0, }, { 10 }, { 0, }, { 0, }, { 15 } }, | |
276 | #ifndef DISASM_ONLY | |
277 | { | |
278 | 0ULL, | |
279 | 0xfffff81f80000000ULL, | |
280 | 0ULL, | |
281 | 0ULL, | |
282 | 0x8700000003f00000ULL | |
283 | }, | |
284 | { | |
285 | -1ULL, | |
286 | 0x400b501f80000000ULL, | |
287 | -1ULL, | |
288 | -1ULL, | |
289 | 0x8000000003f00000ULL | |
290 | } | |
291 | #endif | |
292 | }, | |
293 | { "raise", TILEPRO_OPC_RAISE, 0x2, 0, TREG_ZERO, 1, | |
294 | { { 0, }, { }, { 0, }, { 0, }, { 0, } }, | |
295 | #ifndef DISASM_ONLY | |
296 | { | |
297 | 0ULL, | |
298 | 0xfbffffff80000000ULL, | |
299 | 0ULL, | |
300 | 0ULL, | |
301 | 0ULL | |
302 | }, | |
303 | { | |
304 | -1ULL, | |
305 | 0x400b3cae80000000ULL, | |
306 | -1ULL, | |
307 | -1ULL, | |
308 | -1ULL | |
309 | } | |
310 | #endif | |
311 | }, | |
312 | { "add", TILEPRO_OPC_ADD, 0xf, 3, TREG_ZERO, 1, | |
313 | { { 7, 8, 16 }, { 9, 10, 17 }, { 11, 12, 18 }, { 13, 14, 19 }, { 0, } }, | |
314 | #ifndef DISASM_ONLY | |
315 | { | |
316 | 0x800000007ffc0000ULL, | |
317 | 0xfffe000000000000ULL, | |
318 | 0x80000000780c0000ULL, | |
319 | 0xf806000000000000ULL, | |
320 | 0ULL | |
321 | }, | |
322 | { | |
323 | 0x00000000000c0000ULL, | |
324 | 0x0806000000000000ULL, | |
325 | 0x8000000008000000ULL, | |
326 | 0x8800000000000000ULL, | |
327 | -1ULL | |
328 | } | |
329 | #endif | |
330 | }, | |
331 | { "add.sn", TILEPRO_OPC_ADD_SN, 0x3, 3, TREG_SN, 1, | |
332 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
333 | #ifndef DISASM_ONLY | |
334 | { | |
335 | 0x800000007ffc0000ULL, | |
336 | 0xfffe000000000000ULL, | |
337 | 0ULL, | |
338 | 0ULL, | |
339 | 0ULL | |
340 | }, | |
341 | { | |
342 | 0x00000000080c0000ULL, | |
343 | 0x0c06000000000000ULL, | |
344 | -1ULL, | |
345 | -1ULL, | |
346 | -1ULL | |
347 | } | |
348 | #endif | |
349 | }, | |
350 | { "addb", TILEPRO_OPC_ADDB, 0x3, 3, TREG_ZERO, 1, | |
351 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
352 | #ifndef DISASM_ONLY | |
353 | { | |
354 | 0x800000007ffc0000ULL, | |
355 | 0xfffe000000000000ULL, | |
356 | 0ULL, | |
357 | 0ULL, | |
358 | 0ULL | |
359 | }, | |
360 | { | |
361 | 0x0000000000040000ULL, | |
362 | 0x0802000000000000ULL, | |
363 | -1ULL, | |
364 | -1ULL, | |
365 | -1ULL | |
366 | } | |
367 | #endif | |
368 | }, | |
369 | { "addb.sn", TILEPRO_OPC_ADDB_SN, 0x3, 3, TREG_SN, 1, | |
370 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
371 | #ifndef DISASM_ONLY | |
372 | { | |
373 | 0x800000007ffc0000ULL, | |
374 | 0xfffe000000000000ULL, | |
375 | 0ULL, | |
376 | 0ULL, | |
377 | 0ULL | |
378 | }, | |
379 | { | |
380 | 0x0000000008040000ULL, | |
381 | 0x0c02000000000000ULL, | |
382 | -1ULL, | |
383 | -1ULL, | |
384 | -1ULL | |
385 | } | |
386 | #endif | |
387 | }, | |
388 | { "addbs_u", TILEPRO_OPC_ADDBS_U, 0x3, 3, TREG_ZERO, 1, | |
389 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
390 | #ifndef DISASM_ONLY | |
391 | { | |
392 | 0x800000007ffc0000ULL, | |
393 | 0xfffe000000000000ULL, | |
394 | 0ULL, | |
395 | 0ULL, | |
396 | 0ULL | |
397 | }, | |
398 | { | |
399 | 0x0000000001880000ULL, | |
400 | 0x0888000000000000ULL, | |
401 | -1ULL, | |
402 | -1ULL, | |
403 | -1ULL | |
404 | } | |
405 | #endif | |
406 | }, | |
407 | { "addbs_u.sn", TILEPRO_OPC_ADDBS_U_SN, 0x3, 3, TREG_SN, 1, | |
408 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
409 | #ifndef DISASM_ONLY | |
410 | { | |
411 | 0x800000007ffc0000ULL, | |
412 | 0xfffe000000000000ULL, | |
413 | 0ULL, | |
414 | 0ULL, | |
415 | 0ULL | |
416 | }, | |
417 | { | |
418 | 0x0000000009880000ULL, | |
419 | 0x0c88000000000000ULL, | |
420 | -1ULL, | |
421 | -1ULL, | |
422 | -1ULL | |
423 | } | |
424 | #endif | |
425 | }, | |
426 | { "addh", TILEPRO_OPC_ADDH, 0x3, 3, TREG_ZERO, 1, | |
427 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
428 | #ifndef DISASM_ONLY | |
429 | { | |
430 | 0x800000007ffc0000ULL, | |
431 | 0xfffe000000000000ULL, | |
432 | 0ULL, | |
433 | 0ULL, | |
434 | 0ULL | |
435 | }, | |
436 | { | |
437 | 0x0000000000080000ULL, | |
438 | 0x0804000000000000ULL, | |
439 | -1ULL, | |
440 | -1ULL, | |
441 | -1ULL | |
442 | } | |
443 | #endif | |
444 | }, | |
445 | { "addh.sn", TILEPRO_OPC_ADDH_SN, 0x3, 3, TREG_SN, 1, | |
446 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
447 | #ifndef DISASM_ONLY | |
448 | { | |
449 | 0x800000007ffc0000ULL, | |
450 | 0xfffe000000000000ULL, | |
451 | 0ULL, | |
452 | 0ULL, | |
453 | 0ULL | |
454 | }, | |
455 | { | |
456 | 0x0000000008080000ULL, | |
457 | 0x0c04000000000000ULL, | |
458 | -1ULL, | |
459 | -1ULL, | |
460 | -1ULL | |
461 | } | |
462 | #endif | |
463 | }, | |
464 | { "addhs", TILEPRO_OPC_ADDHS, 0x3, 3, TREG_ZERO, 1, | |
465 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
466 | #ifndef DISASM_ONLY | |
467 | { | |
468 | 0x800000007ffc0000ULL, | |
469 | 0xfffe000000000000ULL, | |
470 | 0ULL, | |
471 | 0ULL, | |
472 | 0ULL | |
473 | }, | |
474 | { | |
475 | 0x00000000018c0000ULL, | |
476 | 0x088a000000000000ULL, | |
477 | -1ULL, | |
478 | -1ULL, | |
479 | -1ULL | |
480 | } | |
481 | #endif | |
482 | }, | |
483 | { "addhs.sn", TILEPRO_OPC_ADDHS_SN, 0x3, 3, TREG_SN, 1, | |
484 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
485 | #ifndef DISASM_ONLY | |
486 | { | |
487 | 0x800000007ffc0000ULL, | |
488 | 0xfffe000000000000ULL, | |
489 | 0ULL, | |
490 | 0ULL, | |
491 | 0ULL | |
492 | }, | |
493 | { | |
494 | 0x00000000098c0000ULL, | |
495 | 0x0c8a000000000000ULL, | |
496 | -1ULL, | |
497 | -1ULL, | |
498 | -1ULL | |
499 | } | |
500 | #endif | |
501 | }, | |
502 | { "addi", TILEPRO_OPC_ADDI, 0xf, 3, TREG_ZERO, 1, | |
503 | { { 7, 8, 0 }, { 9, 10, 1 }, { 11, 12, 2 }, { 13, 14, 3 }, { 0, } }, | |
504 | #ifndef DISASM_ONLY | |
505 | { | |
506 | 0x800000007ff00000ULL, | |
507 | 0xfff8000000000000ULL, | |
508 | 0x8000000078000000ULL, | |
509 | 0xf800000000000000ULL, | |
510 | 0ULL | |
511 | }, | |
512 | { | |
513 | 0x0000000040300000ULL, | |
514 | 0x3018000000000000ULL, | |
515 | 0x8000000048000000ULL, | |
516 | 0xb800000000000000ULL, | |
517 | -1ULL | |
518 | } | |
519 | #endif | |
520 | }, | |
521 | { "addi.sn", TILEPRO_OPC_ADDI_SN, 0x3, 3, TREG_SN, 1, | |
522 | { { 7, 8, 0 }, { 9, 10, 1 }, { 0, }, { 0, }, { 0, } }, | |
523 | #ifndef DISASM_ONLY | |
524 | { | |
525 | 0x800000007ff00000ULL, | |
526 | 0xfff8000000000000ULL, | |
527 | 0ULL, | |
528 | 0ULL, | |
529 | 0ULL | |
530 | }, | |
531 | { | |
532 | 0x0000000048300000ULL, | |
533 | 0x3418000000000000ULL, | |
534 | -1ULL, | |
535 | -1ULL, | |
536 | -1ULL | |
537 | } | |
538 | #endif | |
539 | }, | |
540 | { "addib", TILEPRO_OPC_ADDIB, 0x3, 3, TREG_ZERO, 1, | |
541 | { { 7, 8, 0 }, { 9, 10, 1 }, { 0, }, { 0, }, { 0, } }, | |
542 | #ifndef DISASM_ONLY | |
543 | { | |
544 | 0x800000007ff00000ULL, | |
545 | 0xfff8000000000000ULL, | |
546 | 0ULL, | |
547 | 0ULL, | |
548 | 0ULL | |
549 | }, | |
550 | { | |
551 | 0x0000000040100000ULL, | |
552 | 0x3008000000000000ULL, | |
553 | -1ULL, | |
554 | -1ULL, | |
555 | -1ULL | |
556 | } | |
557 | #endif | |
558 | }, | |
559 | { "addib.sn", TILEPRO_OPC_ADDIB_SN, 0x3, 3, TREG_SN, 1, | |
560 | { { 7, 8, 0 }, { 9, 10, 1 }, { 0, }, { 0, }, { 0, } }, | |
561 | #ifndef DISASM_ONLY | |
562 | { | |
563 | 0x800000007ff00000ULL, | |
564 | 0xfff8000000000000ULL, | |
565 | 0ULL, | |
566 | 0ULL, | |
567 | 0ULL | |
568 | }, | |
569 | { | |
570 | 0x0000000048100000ULL, | |
571 | 0x3408000000000000ULL, | |
572 | -1ULL, | |
573 | -1ULL, | |
574 | -1ULL | |
575 | } | |
576 | #endif | |
577 | }, | |
578 | { "addih", TILEPRO_OPC_ADDIH, 0x3, 3, TREG_ZERO, 1, | |
579 | { { 7, 8, 0 }, { 9, 10, 1 }, { 0, }, { 0, }, { 0, } }, | |
580 | #ifndef DISASM_ONLY | |
581 | { | |
582 | 0x800000007ff00000ULL, | |
583 | 0xfff8000000000000ULL, | |
584 | 0ULL, | |
585 | 0ULL, | |
586 | 0ULL | |
587 | }, | |
588 | { | |
589 | 0x0000000040200000ULL, | |
590 | 0x3010000000000000ULL, | |
591 | -1ULL, | |
592 | -1ULL, | |
593 | -1ULL | |
594 | } | |
595 | #endif | |
596 | }, | |
597 | { "addih.sn", TILEPRO_OPC_ADDIH_SN, 0x3, 3, TREG_SN, 1, | |
598 | { { 7, 8, 0 }, { 9, 10, 1 }, { 0, }, { 0, }, { 0, } }, | |
599 | #ifndef DISASM_ONLY | |
600 | { | |
601 | 0x800000007ff00000ULL, | |
602 | 0xfff8000000000000ULL, | |
603 | 0ULL, | |
604 | 0ULL, | |
605 | 0ULL | |
606 | }, | |
607 | { | |
608 | 0x0000000048200000ULL, | |
609 | 0x3410000000000000ULL, | |
610 | -1ULL, | |
611 | -1ULL, | |
612 | -1ULL | |
613 | } | |
614 | #endif | |
615 | }, | |
616 | { "addli", TILEPRO_OPC_ADDLI, 0x3, 3, TREG_ZERO, 1, | |
617 | { { 7, 8, 4 }, { 9, 10, 5 }, { 0, }, { 0, }, { 0, } }, | |
618 | #ifndef DISASM_ONLY | |
619 | { | |
620 | 0x8000000070000000ULL, | |
621 | 0xf800000000000000ULL, | |
622 | 0ULL, | |
623 | 0ULL, | |
624 | 0ULL | |
625 | }, | |
626 | { | |
627 | 0x0000000020000000ULL, | |
628 | 0x1800000000000000ULL, | |
629 | -1ULL, | |
630 | -1ULL, | |
631 | -1ULL | |
632 | } | |
633 | #endif | |
634 | }, | |
635 | { "addli.sn", TILEPRO_OPC_ADDLI_SN, 0x3, 3, TREG_SN, 1, | |
636 | { { 7, 8, 4 }, { 9, 10, 5 }, { 0, }, { 0, }, { 0, } }, | |
637 | #ifndef DISASM_ONLY | |
638 | { | |
639 | 0x8000000070000000ULL, | |
640 | 0xf800000000000000ULL, | |
641 | 0ULL, | |
642 | 0ULL, | |
643 | 0ULL | |
644 | }, | |
645 | { | |
646 | 0x0000000010000000ULL, | |
647 | 0x1000000000000000ULL, | |
648 | -1ULL, | |
649 | -1ULL, | |
650 | -1ULL | |
651 | } | |
652 | #endif | |
653 | }, | |
654 | { "addlis", TILEPRO_OPC_ADDLIS, 0x3, 3, TREG_SN, 1, | |
655 | { { 7, 8, 4 }, { 9, 10, 5 }, { 0, }, { 0, }, { 0, } }, | |
656 | #ifndef DISASM_ONLY | |
657 | { | |
658 | 0x8000000070000000ULL, | |
659 | 0xf800000000000000ULL, | |
660 | 0ULL, | |
661 | 0ULL, | |
662 | 0ULL | |
663 | }, | |
664 | { | |
665 | 0x0000000010000000ULL, | |
666 | 0x1000000000000000ULL, | |
667 | -1ULL, | |
668 | -1ULL, | |
669 | -1ULL | |
670 | } | |
671 | #endif | |
672 | }, | |
673 | { "adds", TILEPRO_OPC_ADDS, 0x3, 3, TREG_ZERO, 1, | |
674 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
675 | #ifndef DISASM_ONLY | |
676 | { | |
677 | 0x800000007ffc0000ULL, | |
678 | 0xfffe000000000000ULL, | |
679 | 0ULL, | |
680 | 0ULL, | |
681 | 0ULL | |
682 | }, | |
683 | { | |
684 | 0x0000000001800000ULL, | |
685 | 0x0884000000000000ULL, | |
686 | -1ULL, | |
687 | -1ULL, | |
688 | -1ULL | |
689 | } | |
690 | #endif | |
691 | }, | |
692 | { "adds.sn", TILEPRO_OPC_ADDS_SN, 0x3, 3, TREG_SN, 1, | |
693 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
694 | #ifndef DISASM_ONLY | |
695 | { | |
696 | 0x800000007ffc0000ULL, | |
697 | 0xfffe000000000000ULL, | |
698 | 0ULL, | |
699 | 0ULL, | |
700 | 0ULL | |
701 | }, | |
702 | { | |
703 | 0x0000000009800000ULL, | |
704 | 0x0c84000000000000ULL, | |
705 | -1ULL, | |
706 | -1ULL, | |
707 | -1ULL | |
708 | } | |
709 | #endif | |
710 | }, | |
711 | { "adiffb_u", TILEPRO_OPC_ADIFFB_U, 0x1, 3, TREG_ZERO, 1, | |
712 | { { 7, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | |
713 | #ifndef DISASM_ONLY | |
714 | { | |
715 | 0x800000007ffc0000ULL, | |
716 | 0ULL, | |
717 | 0ULL, | |
718 | 0ULL, | |
719 | 0ULL | |
720 | }, | |
721 | { | |
722 | 0x0000000000100000ULL, | |
723 | -1ULL, | |
724 | -1ULL, | |
725 | -1ULL, | |
726 | -1ULL | |
727 | } | |
728 | #endif | |
729 | }, | |
730 | { "adiffb_u.sn", TILEPRO_OPC_ADIFFB_U_SN, 0x1, 3, TREG_SN, 1, | |
731 | { { 7, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | |
732 | #ifndef DISASM_ONLY | |
733 | { | |
734 | 0x800000007ffc0000ULL, | |
735 | 0ULL, | |
736 | 0ULL, | |
737 | 0ULL, | |
738 | 0ULL | |
739 | }, | |
740 | { | |
741 | 0x0000000008100000ULL, | |
742 | -1ULL, | |
743 | -1ULL, | |
744 | -1ULL, | |
745 | -1ULL | |
746 | } | |
747 | #endif | |
748 | }, | |
749 | { "adiffh", TILEPRO_OPC_ADIFFH, 0x1, 3, TREG_ZERO, 1, | |
750 | { { 7, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | |
751 | #ifndef DISASM_ONLY | |
752 | { | |
753 | 0x800000007ffc0000ULL, | |
754 | 0ULL, | |
755 | 0ULL, | |
756 | 0ULL, | |
757 | 0ULL | |
758 | }, | |
759 | { | |
760 | 0x0000000000140000ULL, | |
761 | -1ULL, | |
762 | -1ULL, | |
763 | -1ULL, | |
764 | -1ULL | |
765 | } | |
766 | #endif | |
767 | }, | |
768 | { "adiffh.sn", TILEPRO_OPC_ADIFFH_SN, 0x1, 3, TREG_SN, 1, | |
769 | { { 7, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | |
770 | #ifndef DISASM_ONLY | |
771 | { | |
772 | 0x800000007ffc0000ULL, | |
773 | 0ULL, | |
774 | 0ULL, | |
775 | 0ULL, | |
776 | 0ULL | |
777 | }, | |
778 | { | |
779 | 0x0000000008140000ULL, | |
780 | -1ULL, | |
781 | -1ULL, | |
782 | -1ULL, | |
783 | -1ULL | |
784 | } | |
785 | #endif | |
786 | }, | |
787 | { "and", TILEPRO_OPC_AND, 0xf, 3, TREG_ZERO, 1, | |
788 | { { 7, 8, 16 }, { 9, 10, 17 }, { 11, 12, 18 }, { 13, 14, 19 }, { 0, } }, | |
789 | #ifndef DISASM_ONLY | |
790 | { | |
791 | 0x800000007ffc0000ULL, | |
792 | 0xfffe000000000000ULL, | |
793 | 0x80000000780c0000ULL, | |
794 | 0xf806000000000000ULL, | |
795 | 0ULL | |
796 | }, | |
797 | { | |
798 | 0x0000000000180000ULL, | |
799 | 0x0808000000000000ULL, | |
800 | 0x8000000018000000ULL, | |
801 | 0x9800000000000000ULL, | |
802 | -1ULL | |
803 | } | |
804 | #endif | |
805 | }, | |
806 | { "and.sn", TILEPRO_OPC_AND_SN, 0x3, 3, TREG_SN, 1, | |
807 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
808 | #ifndef DISASM_ONLY | |
809 | { | |
810 | 0x800000007ffc0000ULL, | |
811 | 0xfffe000000000000ULL, | |
812 | 0ULL, | |
813 | 0ULL, | |
814 | 0ULL | |
815 | }, | |
816 | { | |
817 | 0x0000000008180000ULL, | |
818 | 0x0c08000000000000ULL, | |
819 | -1ULL, | |
820 | -1ULL, | |
821 | -1ULL | |
822 | } | |
823 | #endif | |
824 | }, | |
825 | { "andi", TILEPRO_OPC_ANDI, 0xf, 3, TREG_ZERO, 1, | |
826 | { { 7, 8, 0 }, { 9, 10, 1 }, { 11, 12, 2 }, { 13, 14, 3 }, { 0, } }, | |
827 | #ifndef DISASM_ONLY | |
828 | { | |
829 | 0x800000007ff00000ULL, | |
830 | 0xfff8000000000000ULL, | |
831 | 0x8000000078000000ULL, | |
832 | 0xf800000000000000ULL, | |
833 | 0ULL | |
834 | }, | |
835 | { | |
836 | 0x0000000050100000ULL, | |
837 | 0x3020000000000000ULL, | |
838 | 0x8000000050000000ULL, | |
839 | 0xc000000000000000ULL, | |
840 | -1ULL | |
841 | } | |
842 | #endif | |
843 | }, | |
844 | { "andi.sn", TILEPRO_OPC_ANDI_SN, 0x3, 3, TREG_SN, 1, | |
845 | { { 7, 8, 0 }, { 9, 10, 1 }, { 0, }, { 0, }, { 0, } }, | |
846 | #ifndef DISASM_ONLY | |
847 | { | |
848 | 0x800000007ff00000ULL, | |
849 | 0xfff8000000000000ULL, | |
850 | 0ULL, | |
851 | 0ULL, | |
852 | 0ULL | |
853 | }, | |
854 | { | |
855 | 0x0000000058100000ULL, | |
856 | 0x3420000000000000ULL, | |
857 | -1ULL, | |
858 | -1ULL, | |
859 | -1ULL | |
860 | } | |
861 | #endif | |
862 | }, | |
863 | { "auli", TILEPRO_OPC_AULI, 0x3, 3, TREG_ZERO, 1, | |
864 | { { 7, 8, 4 }, { 9, 10, 5 }, { 0, }, { 0, }, { 0, } }, | |
865 | #ifndef DISASM_ONLY | |
866 | { | |
867 | 0x8000000070000000ULL, | |
868 | 0xf800000000000000ULL, | |
869 | 0ULL, | |
870 | 0ULL, | |
871 | 0ULL | |
872 | }, | |
873 | { | |
874 | 0x0000000030000000ULL, | |
875 | 0x2000000000000000ULL, | |
876 | -1ULL, | |
877 | -1ULL, | |
878 | -1ULL | |
879 | } | |
880 | #endif | |
881 | }, | |
882 | { "avgb_u", TILEPRO_OPC_AVGB_U, 0x1, 3, TREG_ZERO, 1, | |
883 | { { 7, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | |
884 | #ifndef DISASM_ONLY | |
885 | { | |
886 | 0x800000007ffc0000ULL, | |
887 | 0ULL, | |
888 | 0ULL, | |
889 | 0ULL, | |
890 | 0ULL | |
891 | }, | |
892 | { | |
893 | 0x00000000001c0000ULL, | |
894 | -1ULL, | |
895 | -1ULL, | |
896 | -1ULL, | |
897 | -1ULL | |
898 | } | |
899 | #endif | |
900 | }, | |
901 | { "avgb_u.sn", TILEPRO_OPC_AVGB_U_SN, 0x1, 3, TREG_SN, 1, | |
902 | { { 7, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | |
903 | #ifndef DISASM_ONLY | |
904 | { | |
905 | 0x800000007ffc0000ULL, | |
906 | 0ULL, | |
907 | 0ULL, | |
908 | 0ULL, | |
909 | 0ULL | |
910 | }, | |
911 | { | |
912 | 0x00000000081c0000ULL, | |
913 | -1ULL, | |
914 | -1ULL, | |
915 | -1ULL, | |
916 | -1ULL | |
917 | } | |
918 | #endif | |
919 | }, | |
920 | { "avgh", TILEPRO_OPC_AVGH, 0x1, 3, TREG_ZERO, 1, | |
921 | { { 7, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | |
922 | #ifndef DISASM_ONLY | |
923 | { | |
924 | 0x800000007ffc0000ULL, | |
925 | 0ULL, | |
926 | 0ULL, | |
927 | 0ULL, | |
928 | 0ULL | |
929 | }, | |
930 | { | |
931 | 0x0000000000200000ULL, | |
932 | -1ULL, | |
933 | -1ULL, | |
934 | -1ULL, | |
935 | -1ULL | |
936 | } | |
937 | #endif | |
938 | }, | |
939 | { "avgh.sn", TILEPRO_OPC_AVGH_SN, 0x1, 3, TREG_SN, 1, | |
940 | { { 7, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | |
941 | #ifndef DISASM_ONLY | |
942 | { | |
943 | 0x800000007ffc0000ULL, | |
944 | 0ULL, | |
945 | 0ULL, | |
946 | 0ULL, | |
947 | 0ULL | |
948 | }, | |
949 | { | |
950 | 0x0000000008200000ULL, | |
951 | -1ULL, | |
952 | -1ULL, | |
953 | -1ULL, | |
954 | -1ULL | |
955 | } | |
956 | #endif | |
957 | }, | |
958 | { "bbns", TILEPRO_OPC_BBNS, 0x2, 2, TREG_ZERO, 1, | |
959 | { { 0, }, { 10, 20 }, { 0, }, { 0, }, { 0, } }, | |
960 | #ifndef DISASM_ONLY | |
961 | { | |
962 | 0ULL, | |
963 | 0xfc00000780000000ULL, | |
964 | 0ULL, | |
965 | 0ULL, | |
966 | 0ULL | |
967 | }, | |
968 | { | |
969 | -1ULL, | |
970 | 0x2800000700000000ULL, | |
971 | -1ULL, | |
972 | -1ULL, | |
973 | -1ULL | |
974 | } | |
975 | #endif | |
976 | }, | |
977 | { "bbns.sn", TILEPRO_OPC_BBNS_SN, 0x2, 2, TREG_SN, 1, | |
978 | { { 0, }, { 10, 20 }, { 0, }, { 0, }, { 0, } }, | |
979 | #ifndef DISASM_ONLY | |
980 | { | |
981 | 0ULL, | |
982 | 0xfc00000780000000ULL, | |
983 | 0ULL, | |
984 | 0ULL, | |
985 | 0ULL | |
986 | }, | |
987 | { | |
988 | -1ULL, | |
989 | 0x2c00000700000000ULL, | |
990 | -1ULL, | |
991 | -1ULL, | |
992 | -1ULL | |
993 | } | |
994 | #endif | |
995 | }, | |
996 | { "bbnst", TILEPRO_OPC_BBNST, 0x2, 2, TREG_ZERO, 1, | |
997 | { { 0, }, { 10, 20 }, { 0, }, { 0, }, { 0, } }, | |
998 | #ifndef DISASM_ONLY | |
999 | { | |
1000 | 0ULL, | |
1001 | 0xfc00000780000000ULL, | |
1002 | 0ULL, | |
1003 | 0ULL, | |
1004 | 0ULL | |
1005 | }, | |
1006 | { | |
1007 | -1ULL, | |
1008 | 0x2800000780000000ULL, | |
1009 | -1ULL, | |
1010 | -1ULL, | |
1011 | -1ULL | |
1012 | } | |
1013 | #endif | |
1014 | }, | |
1015 | { "bbnst.sn", TILEPRO_OPC_BBNST_SN, 0x2, 2, TREG_SN, 1, | |
1016 | { { 0, }, { 10, 20 }, { 0, }, { 0, }, { 0, } }, | |
1017 | #ifndef DISASM_ONLY | |
1018 | { | |
1019 | 0ULL, | |
1020 | 0xfc00000780000000ULL, | |
1021 | 0ULL, | |
1022 | 0ULL, | |
1023 | 0ULL | |
1024 | }, | |
1025 | { | |
1026 | -1ULL, | |
1027 | 0x2c00000780000000ULL, | |
1028 | -1ULL, | |
1029 | -1ULL, | |
1030 | -1ULL | |
1031 | } | |
1032 | #endif | |
1033 | }, | |
1034 | { "bbs", TILEPRO_OPC_BBS, 0x2, 2, TREG_ZERO, 1, | |
1035 | { { 0, }, { 10, 20 }, { 0, }, { 0, }, { 0, } }, | |
1036 | #ifndef DISASM_ONLY | |
1037 | { | |
1038 | 0ULL, | |
1039 | 0xfc00000780000000ULL, | |
1040 | 0ULL, | |
1041 | 0ULL, | |
1042 | 0ULL | |
1043 | }, | |
1044 | { | |
1045 | -1ULL, | |
1046 | 0x2800000600000000ULL, | |
1047 | -1ULL, | |
1048 | -1ULL, | |
1049 | -1ULL | |
1050 | } | |
1051 | #endif | |
1052 | }, | |
1053 | { "bbs.sn", TILEPRO_OPC_BBS_SN, 0x2, 2, TREG_SN, 1, | |
1054 | { { 0, }, { 10, 20 }, { 0, }, { 0, }, { 0, } }, | |
1055 | #ifndef DISASM_ONLY | |
1056 | { | |
1057 | 0ULL, | |
1058 | 0xfc00000780000000ULL, | |
1059 | 0ULL, | |
1060 | 0ULL, | |
1061 | 0ULL | |
1062 | }, | |
1063 | { | |
1064 | -1ULL, | |
1065 | 0x2c00000600000000ULL, | |
1066 | -1ULL, | |
1067 | -1ULL, | |
1068 | -1ULL | |
1069 | } | |
1070 | #endif | |
1071 | }, | |
1072 | { "bbst", TILEPRO_OPC_BBST, 0x2, 2, TREG_ZERO, 1, | |
1073 | { { 0, }, { 10, 20 }, { 0, }, { 0, }, { 0, } }, | |
1074 | #ifndef DISASM_ONLY | |
1075 | { | |
1076 | 0ULL, | |
1077 | 0xfc00000780000000ULL, | |
1078 | 0ULL, | |
1079 | 0ULL, | |
1080 | 0ULL | |
1081 | }, | |
1082 | { | |
1083 | -1ULL, | |
1084 | 0x2800000680000000ULL, | |
1085 | -1ULL, | |
1086 | -1ULL, | |
1087 | -1ULL | |
1088 | } | |
1089 | #endif | |
1090 | }, | |
1091 | { "bbst.sn", TILEPRO_OPC_BBST_SN, 0x2, 2, TREG_SN, 1, | |
1092 | { { 0, }, { 10, 20 }, { 0, }, { 0, }, { 0, } }, | |
1093 | #ifndef DISASM_ONLY | |
1094 | { | |
1095 | 0ULL, | |
1096 | 0xfc00000780000000ULL, | |
1097 | 0ULL, | |
1098 | 0ULL, | |
1099 | 0ULL | |
1100 | }, | |
1101 | { | |
1102 | -1ULL, | |
1103 | 0x2c00000680000000ULL, | |
1104 | -1ULL, | |
1105 | -1ULL, | |
1106 | -1ULL | |
1107 | } | |
1108 | #endif | |
1109 | }, | |
1110 | { "bgez", TILEPRO_OPC_BGEZ, 0x2, 2, TREG_ZERO, 1, | |
1111 | { { 0, }, { 10, 20 }, { 0, }, { 0, }, { 0, } }, | |
1112 | #ifndef DISASM_ONLY | |
1113 | { | |
1114 | 0ULL, | |
1115 | 0xfc00000780000000ULL, | |
1116 | 0ULL, | |
1117 | 0ULL, | |
1118 | 0ULL | |
1119 | }, | |
1120 | { | |
1121 | -1ULL, | |
1122 | 0x2800000300000000ULL, | |
1123 | -1ULL, | |
1124 | -1ULL, | |
1125 | -1ULL | |
1126 | } | |
1127 | #endif | |
1128 | }, | |
1129 | { "bgez.sn", TILEPRO_OPC_BGEZ_SN, 0x2, 2, TREG_SN, 1, | |
1130 | { { 0, }, { 10, 20 }, { 0, }, { 0, }, { 0, } }, | |
1131 | #ifndef DISASM_ONLY | |
1132 | { | |
1133 | 0ULL, | |
1134 | 0xfc00000780000000ULL, | |
1135 | 0ULL, | |
1136 | 0ULL, | |
1137 | 0ULL | |
1138 | }, | |
1139 | { | |
1140 | -1ULL, | |
1141 | 0x2c00000300000000ULL, | |
1142 | -1ULL, | |
1143 | -1ULL, | |
1144 | -1ULL | |
1145 | } | |
1146 | #endif | |
1147 | }, | |
1148 | { "bgezt", TILEPRO_OPC_BGEZT, 0x2, 2, TREG_ZERO, 1, | |
1149 | { { 0, }, { 10, 20 }, { 0, }, { 0, }, { 0, } }, | |
1150 | #ifndef DISASM_ONLY | |
1151 | { | |
1152 | 0ULL, | |
1153 | 0xfc00000780000000ULL, | |
1154 | 0ULL, | |
1155 | 0ULL, | |
1156 | 0ULL | |
1157 | }, | |
1158 | { | |
1159 | -1ULL, | |
1160 | 0x2800000380000000ULL, | |
1161 | -1ULL, | |
1162 | -1ULL, | |
1163 | -1ULL | |
1164 | } | |
1165 | #endif | |
1166 | }, | |
1167 | { "bgezt.sn", TILEPRO_OPC_BGEZT_SN, 0x2, 2, TREG_SN, 1, | |
1168 | { { 0, }, { 10, 20 }, { 0, }, { 0, }, { 0, } }, | |
1169 | #ifndef DISASM_ONLY | |
1170 | { | |
1171 | 0ULL, | |
1172 | 0xfc00000780000000ULL, | |
1173 | 0ULL, | |
1174 | 0ULL, | |
1175 | 0ULL | |
1176 | }, | |
1177 | { | |
1178 | -1ULL, | |
1179 | 0x2c00000380000000ULL, | |
1180 | -1ULL, | |
1181 | -1ULL, | |
1182 | -1ULL | |
1183 | } | |
1184 | #endif | |
1185 | }, | |
1186 | { "bgz", TILEPRO_OPC_BGZ, 0x2, 2, TREG_ZERO, 1, | |
1187 | { { 0, }, { 10, 20 }, { 0, }, { 0, }, { 0, } }, | |
1188 | #ifndef DISASM_ONLY | |
1189 | { | |
1190 | 0ULL, | |
1191 | 0xfc00000780000000ULL, | |
1192 | 0ULL, | |
1193 | 0ULL, | |
1194 | 0ULL | |
1195 | }, | |
1196 | { | |
1197 | -1ULL, | |
1198 | 0x2800000200000000ULL, | |
1199 | -1ULL, | |
1200 | -1ULL, | |
1201 | -1ULL | |
1202 | } | |
1203 | #endif | |
1204 | }, | |
1205 | { "bgz.sn", TILEPRO_OPC_BGZ_SN, 0x2, 2, TREG_SN, 1, | |
1206 | { { 0, }, { 10, 20 }, { 0, }, { 0, }, { 0, } }, | |
1207 | #ifndef DISASM_ONLY | |
1208 | { | |
1209 | 0ULL, | |
1210 | 0xfc00000780000000ULL, | |
1211 | 0ULL, | |
1212 | 0ULL, | |
1213 | 0ULL | |
1214 | }, | |
1215 | { | |
1216 | -1ULL, | |
1217 | 0x2c00000200000000ULL, | |
1218 | -1ULL, | |
1219 | -1ULL, | |
1220 | -1ULL | |
1221 | } | |
1222 | #endif | |
1223 | }, | |
1224 | { "bgzt", TILEPRO_OPC_BGZT, 0x2, 2, TREG_ZERO, 1, | |
1225 | { { 0, }, { 10, 20 }, { 0, }, { 0, }, { 0, } }, | |
1226 | #ifndef DISASM_ONLY | |
1227 | { | |
1228 | 0ULL, | |
1229 | 0xfc00000780000000ULL, | |
1230 | 0ULL, | |
1231 | 0ULL, | |
1232 | 0ULL | |
1233 | }, | |
1234 | { | |
1235 | -1ULL, | |
1236 | 0x2800000280000000ULL, | |
1237 | -1ULL, | |
1238 | -1ULL, | |
1239 | -1ULL | |
1240 | } | |
1241 | #endif | |
1242 | }, | |
1243 | { "bgzt.sn", TILEPRO_OPC_BGZT_SN, 0x2, 2, TREG_SN, 1, | |
1244 | { { 0, }, { 10, 20 }, { 0, }, { 0, }, { 0, } }, | |
1245 | #ifndef DISASM_ONLY | |
1246 | { | |
1247 | 0ULL, | |
1248 | 0xfc00000780000000ULL, | |
1249 | 0ULL, | |
1250 | 0ULL, | |
1251 | 0ULL | |
1252 | }, | |
1253 | { | |
1254 | -1ULL, | |
1255 | 0x2c00000280000000ULL, | |
1256 | -1ULL, | |
1257 | -1ULL, | |
1258 | -1ULL | |
1259 | } | |
1260 | #endif | |
1261 | }, | |
1262 | { "bitx", TILEPRO_OPC_BITX, 0x5, 2, TREG_ZERO, 1, | |
1263 | { { 7, 8 }, { 0, }, { 11, 12 }, { 0, }, { 0, } }, | |
1264 | #ifndef DISASM_ONLY | |
1265 | { | |
1266 | 0x800000007ffff000ULL, | |
1267 | 0ULL, | |
1268 | 0x80000000780ff000ULL, | |
1269 | 0ULL, | |
1270 | 0ULL | |
1271 | }, | |
1272 | { | |
1273 | 0x0000000070161000ULL, | |
1274 | -1ULL, | |
1275 | 0x80000000680a1000ULL, | |
1276 | -1ULL, | |
1277 | -1ULL | |
1278 | } | |
1279 | #endif | |
1280 | }, | |
1281 | { "bitx.sn", TILEPRO_OPC_BITX_SN, 0x1, 2, TREG_SN, 1, | |
1282 | { { 7, 8 }, { 0, }, { 0, }, { 0, }, { 0, } }, | |
1283 | #ifndef DISASM_ONLY | |
1284 | { | |
1285 | 0x800000007ffff000ULL, | |
1286 | 0ULL, | |
1287 | 0ULL, | |
1288 | 0ULL, | |
1289 | 0ULL | |
1290 | }, | |
1291 | { | |
1292 | 0x0000000078161000ULL, | |
1293 | -1ULL, | |
1294 | -1ULL, | |
1295 | -1ULL, | |
1296 | -1ULL | |
1297 | } | |
1298 | #endif | |
1299 | }, | |
1300 | { "blez", TILEPRO_OPC_BLEZ, 0x2, 2, TREG_ZERO, 1, | |
1301 | { { 0, }, { 10, 20 }, { 0, }, { 0, }, { 0, } }, | |
1302 | #ifndef DISASM_ONLY | |
1303 | { | |
1304 | 0ULL, | |
1305 | 0xfc00000780000000ULL, | |
1306 | 0ULL, | |
1307 | 0ULL, | |
1308 | 0ULL | |
1309 | }, | |
1310 | { | |
1311 | -1ULL, | |
1312 | 0x2800000500000000ULL, | |
1313 | -1ULL, | |
1314 | -1ULL, | |
1315 | -1ULL | |
1316 | } | |
1317 | #endif | |
1318 | }, | |
1319 | { "blez.sn", TILEPRO_OPC_BLEZ_SN, 0x2, 2, TREG_SN, 1, | |
1320 | { { 0, }, { 10, 20 }, { 0, }, { 0, }, { 0, } }, | |
1321 | #ifndef DISASM_ONLY | |
1322 | { | |
1323 | 0ULL, | |
1324 | 0xfc00000780000000ULL, | |
1325 | 0ULL, | |
1326 | 0ULL, | |
1327 | 0ULL | |
1328 | }, | |
1329 | { | |
1330 | -1ULL, | |
1331 | 0x2c00000500000000ULL, | |
1332 | -1ULL, | |
1333 | -1ULL, | |
1334 | -1ULL | |
1335 | } | |
1336 | #endif | |
1337 | }, | |
1338 | { "blezt", TILEPRO_OPC_BLEZT, 0x2, 2, TREG_ZERO, 1, | |
1339 | { { 0, }, { 10, 20 }, { 0, }, { 0, }, { 0, } }, | |
1340 | #ifndef DISASM_ONLY | |
1341 | { | |
1342 | 0ULL, | |
1343 | 0xfc00000780000000ULL, | |
1344 | 0ULL, | |
1345 | 0ULL, | |
1346 | 0ULL | |
1347 | }, | |
1348 | { | |
1349 | -1ULL, | |
1350 | 0x2800000580000000ULL, | |
1351 | -1ULL, | |
1352 | -1ULL, | |
1353 | -1ULL | |
1354 | } | |
1355 | #endif | |
1356 | }, | |
1357 | { "blezt.sn", TILEPRO_OPC_BLEZT_SN, 0x2, 2, TREG_SN, 1, | |
1358 | { { 0, }, { 10, 20 }, { 0, }, { 0, }, { 0, } }, | |
1359 | #ifndef DISASM_ONLY | |
1360 | { | |
1361 | 0ULL, | |
1362 | 0xfc00000780000000ULL, | |
1363 | 0ULL, | |
1364 | 0ULL, | |
1365 | 0ULL | |
1366 | }, | |
1367 | { | |
1368 | -1ULL, | |
1369 | 0x2c00000580000000ULL, | |
1370 | -1ULL, | |
1371 | -1ULL, | |
1372 | -1ULL | |
1373 | } | |
1374 | #endif | |
1375 | }, | |
1376 | { "blz", TILEPRO_OPC_BLZ, 0x2, 2, TREG_ZERO, 1, | |
1377 | { { 0, }, { 10, 20 }, { 0, }, { 0, }, { 0, } }, | |
1378 | #ifndef DISASM_ONLY | |
1379 | { | |
1380 | 0ULL, | |
1381 | 0xfc00000780000000ULL, | |
1382 | 0ULL, | |
1383 | 0ULL, | |
1384 | 0ULL | |
1385 | }, | |
1386 | { | |
1387 | -1ULL, | |
1388 | 0x2800000400000000ULL, | |
1389 | -1ULL, | |
1390 | -1ULL, | |
1391 | -1ULL | |
1392 | } | |
1393 | #endif | |
1394 | }, | |
1395 | { "blz.sn", TILEPRO_OPC_BLZ_SN, 0x2, 2, TREG_SN, 1, | |
1396 | { { 0, }, { 10, 20 }, { 0, }, { 0, }, { 0, } }, | |
1397 | #ifndef DISASM_ONLY | |
1398 | { | |
1399 | 0ULL, | |
1400 | 0xfc00000780000000ULL, | |
1401 | 0ULL, | |
1402 | 0ULL, | |
1403 | 0ULL | |
1404 | }, | |
1405 | { | |
1406 | -1ULL, | |
1407 | 0x2c00000400000000ULL, | |
1408 | -1ULL, | |
1409 | -1ULL, | |
1410 | -1ULL | |
1411 | } | |
1412 | #endif | |
1413 | }, | |
1414 | { "blzt", TILEPRO_OPC_BLZT, 0x2, 2, TREG_ZERO, 1, | |
1415 | { { 0, }, { 10, 20 }, { 0, }, { 0, }, { 0, } }, | |
1416 | #ifndef DISASM_ONLY | |
1417 | { | |
1418 | 0ULL, | |
1419 | 0xfc00000780000000ULL, | |
1420 | 0ULL, | |
1421 | 0ULL, | |
1422 | 0ULL | |
1423 | }, | |
1424 | { | |
1425 | -1ULL, | |
1426 | 0x2800000480000000ULL, | |
1427 | -1ULL, | |
1428 | -1ULL, | |
1429 | -1ULL | |
1430 | } | |
1431 | #endif | |
1432 | }, | |
1433 | { "blzt.sn", TILEPRO_OPC_BLZT_SN, 0x2, 2, TREG_SN, 1, | |
1434 | { { 0, }, { 10, 20 }, { 0, }, { 0, }, { 0, } }, | |
1435 | #ifndef DISASM_ONLY | |
1436 | { | |
1437 | 0ULL, | |
1438 | 0xfc00000780000000ULL, | |
1439 | 0ULL, | |
1440 | 0ULL, | |
1441 | 0ULL | |
1442 | }, | |
1443 | { | |
1444 | -1ULL, | |
1445 | 0x2c00000480000000ULL, | |
1446 | -1ULL, | |
1447 | -1ULL, | |
1448 | -1ULL | |
1449 | } | |
1450 | #endif | |
1451 | }, | |
1452 | { "bnz", TILEPRO_OPC_BNZ, 0x2, 2, TREG_ZERO, 1, | |
1453 | { { 0, }, { 10, 20 }, { 0, }, { 0, }, { 0, } }, | |
1454 | #ifndef DISASM_ONLY | |
1455 | { | |
1456 | 0ULL, | |
1457 | 0xfc00000780000000ULL, | |
1458 | 0ULL, | |
1459 | 0ULL, | |
1460 | 0ULL | |
1461 | }, | |
1462 | { | |
1463 | -1ULL, | |
1464 | 0x2800000100000000ULL, | |
1465 | -1ULL, | |
1466 | -1ULL, | |
1467 | -1ULL | |
1468 | } | |
1469 | #endif | |
1470 | }, | |
1471 | { "bnz.sn", TILEPRO_OPC_BNZ_SN, 0x2, 2, TREG_SN, 1, | |
1472 | { { 0, }, { 10, 20 }, { 0, }, { 0, }, { 0, } }, | |
1473 | #ifndef DISASM_ONLY | |
1474 | { | |
1475 | 0ULL, | |
1476 | 0xfc00000780000000ULL, | |
1477 | 0ULL, | |
1478 | 0ULL, | |
1479 | 0ULL | |
1480 | }, | |
1481 | { | |
1482 | -1ULL, | |
1483 | 0x2c00000100000000ULL, | |
1484 | -1ULL, | |
1485 | -1ULL, | |
1486 | -1ULL | |
1487 | } | |
1488 | #endif | |
1489 | }, | |
1490 | { "bnzt", TILEPRO_OPC_BNZT, 0x2, 2, TREG_ZERO, 1, | |
1491 | { { 0, }, { 10, 20 }, { 0, }, { 0, }, { 0, } }, | |
1492 | #ifndef DISASM_ONLY | |
1493 | { | |
1494 | 0ULL, | |
1495 | 0xfc00000780000000ULL, | |
1496 | 0ULL, | |
1497 | 0ULL, | |
1498 | 0ULL | |
1499 | }, | |
1500 | { | |
1501 | -1ULL, | |
1502 | 0x2800000180000000ULL, | |
1503 | -1ULL, | |
1504 | -1ULL, | |
1505 | -1ULL | |
1506 | } | |
1507 | #endif | |
1508 | }, | |
1509 | { "bnzt.sn", TILEPRO_OPC_BNZT_SN, 0x2, 2, TREG_SN, 1, | |
1510 | { { 0, }, { 10, 20 }, { 0, }, { 0, }, { 0, } }, | |
1511 | #ifndef DISASM_ONLY | |
1512 | { | |
1513 | 0ULL, | |
1514 | 0xfc00000780000000ULL, | |
1515 | 0ULL, | |
1516 | 0ULL, | |
1517 | 0ULL | |
1518 | }, | |
1519 | { | |
1520 | -1ULL, | |
1521 | 0x2c00000180000000ULL, | |
1522 | -1ULL, | |
1523 | -1ULL, | |
1524 | -1ULL | |
1525 | } | |
1526 | #endif | |
1527 | }, | |
1528 | { "bytex", TILEPRO_OPC_BYTEX, 0x5, 2, TREG_ZERO, 1, | |
1529 | { { 7, 8 }, { 0, }, { 11, 12 }, { 0, }, { 0, } }, | |
1530 | #ifndef DISASM_ONLY | |
1531 | { | |
1532 | 0x800000007ffff000ULL, | |
1533 | 0ULL, | |
1534 | 0x80000000780ff000ULL, | |
1535 | 0ULL, | |
1536 | 0ULL | |
1537 | }, | |
1538 | { | |
1539 | 0x0000000070162000ULL, | |
1540 | -1ULL, | |
1541 | 0x80000000680a2000ULL, | |
1542 | -1ULL, | |
1543 | -1ULL | |
1544 | } | |
1545 | #endif | |
1546 | }, | |
1547 | { "bytex.sn", TILEPRO_OPC_BYTEX_SN, 0x1, 2, TREG_SN, 1, | |
1548 | { { 7, 8 }, { 0, }, { 0, }, { 0, }, { 0, } }, | |
1549 | #ifndef DISASM_ONLY | |
1550 | { | |
1551 | 0x800000007ffff000ULL, | |
1552 | 0ULL, | |
1553 | 0ULL, | |
1554 | 0ULL, | |
1555 | 0ULL | |
1556 | }, | |
1557 | { | |
1558 | 0x0000000078162000ULL, | |
1559 | -1ULL, | |
1560 | -1ULL, | |
1561 | -1ULL, | |
1562 | -1ULL | |
1563 | } | |
1564 | #endif | |
1565 | }, | |
1566 | { "bz", TILEPRO_OPC_BZ, 0x2, 2, TREG_ZERO, 1, | |
1567 | { { 0, }, { 10, 20 }, { 0, }, { 0, }, { 0, } }, | |
1568 | #ifndef DISASM_ONLY | |
1569 | { | |
1570 | 0ULL, | |
1571 | 0xfc00000780000000ULL, | |
1572 | 0ULL, | |
1573 | 0ULL, | |
1574 | 0ULL | |
1575 | }, | |
1576 | { | |
1577 | -1ULL, | |
1578 | 0x2800000000000000ULL, | |
1579 | -1ULL, | |
1580 | -1ULL, | |
1581 | -1ULL | |
1582 | } | |
1583 | #endif | |
1584 | }, | |
1585 | { "bz.sn", TILEPRO_OPC_BZ_SN, 0x2, 2, TREG_SN, 1, | |
1586 | { { 0, }, { 10, 20 }, { 0, }, { 0, }, { 0, } }, | |
1587 | #ifndef DISASM_ONLY | |
1588 | { | |
1589 | 0ULL, | |
1590 | 0xfc00000780000000ULL, | |
1591 | 0ULL, | |
1592 | 0ULL, | |
1593 | 0ULL | |
1594 | }, | |
1595 | { | |
1596 | -1ULL, | |
1597 | 0x2c00000000000000ULL, | |
1598 | -1ULL, | |
1599 | -1ULL, | |
1600 | -1ULL | |
1601 | } | |
1602 | #endif | |
1603 | }, | |
1604 | { "bzt", TILEPRO_OPC_BZT, 0x2, 2, TREG_ZERO, 1, | |
1605 | { { 0, }, { 10, 20 }, { 0, }, { 0, }, { 0, } }, | |
1606 | #ifndef DISASM_ONLY | |
1607 | { | |
1608 | 0ULL, | |
1609 | 0xfc00000780000000ULL, | |
1610 | 0ULL, | |
1611 | 0ULL, | |
1612 | 0ULL | |
1613 | }, | |
1614 | { | |
1615 | -1ULL, | |
1616 | 0x2800000080000000ULL, | |
1617 | -1ULL, | |
1618 | -1ULL, | |
1619 | -1ULL | |
1620 | } | |
1621 | #endif | |
1622 | }, | |
1623 | { "bzt.sn", TILEPRO_OPC_BZT_SN, 0x2, 2, TREG_SN, 1, | |
1624 | { { 0, }, { 10, 20 }, { 0, }, { 0, }, { 0, } }, | |
1625 | #ifndef DISASM_ONLY | |
1626 | { | |
1627 | 0ULL, | |
1628 | 0xfc00000780000000ULL, | |
1629 | 0ULL, | |
1630 | 0ULL, | |
1631 | 0ULL | |
1632 | }, | |
1633 | { | |
1634 | -1ULL, | |
1635 | 0x2c00000080000000ULL, | |
1636 | -1ULL, | |
1637 | -1ULL, | |
1638 | -1ULL | |
1639 | } | |
1640 | #endif | |
1641 | }, | |
1642 | { "clz", TILEPRO_OPC_CLZ, 0x5, 2, TREG_ZERO, 1, | |
1643 | { { 7, 8 }, { 0, }, { 11, 12 }, { 0, }, { 0, } }, | |
1644 | #ifndef DISASM_ONLY | |
1645 | { | |
1646 | 0x800000007ffff000ULL, | |
1647 | 0ULL, | |
1648 | 0x80000000780ff000ULL, | |
1649 | 0ULL, | |
1650 | 0ULL | |
1651 | }, | |
1652 | { | |
1653 | 0x0000000070163000ULL, | |
1654 | -1ULL, | |
1655 | 0x80000000680a3000ULL, | |
1656 | -1ULL, | |
1657 | -1ULL | |
1658 | } | |
1659 | #endif | |
1660 | }, | |
1661 | { "clz.sn", TILEPRO_OPC_CLZ_SN, 0x1, 2, TREG_SN, 1, | |
1662 | { { 7, 8 }, { 0, }, { 0, }, { 0, }, { 0, } }, | |
1663 | #ifndef DISASM_ONLY | |
1664 | { | |
1665 | 0x800000007ffff000ULL, | |
1666 | 0ULL, | |
1667 | 0ULL, | |
1668 | 0ULL, | |
1669 | 0ULL | |
1670 | }, | |
1671 | { | |
1672 | 0x0000000078163000ULL, | |
1673 | -1ULL, | |
1674 | -1ULL, | |
1675 | -1ULL, | |
1676 | -1ULL | |
1677 | } | |
1678 | #endif | |
1679 | }, | |
1680 | { "crc32_32", TILEPRO_OPC_CRC32_32, 0x1, 3, TREG_ZERO, 1, | |
1681 | { { 7, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | |
1682 | #ifndef DISASM_ONLY | |
1683 | { | |
1684 | 0x800000007ffc0000ULL, | |
1685 | 0ULL, | |
1686 | 0ULL, | |
1687 | 0ULL, | |
1688 | 0ULL | |
1689 | }, | |
1690 | { | |
1691 | 0x0000000000240000ULL, | |
1692 | -1ULL, | |
1693 | -1ULL, | |
1694 | -1ULL, | |
1695 | -1ULL | |
1696 | } | |
1697 | #endif | |
1698 | }, | |
1699 | { "crc32_32.sn", TILEPRO_OPC_CRC32_32_SN, 0x1, 3, TREG_SN, 1, | |
1700 | { { 7, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | |
1701 | #ifndef DISASM_ONLY | |
1702 | { | |
1703 | 0x800000007ffc0000ULL, | |
1704 | 0ULL, | |
1705 | 0ULL, | |
1706 | 0ULL, | |
1707 | 0ULL | |
1708 | }, | |
1709 | { | |
1710 | 0x0000000008240000ULL, | |
1711 | -1ULL, | |
1712 | -1ULL, | |
1713 | -1ULL, | |
1714 | -1ULL | |
1715 | } | |
1716 | #endif | |
1717 | }, | |
1718 | { "crc32_8", TILEPRO_OPC_CRC32_8, 0x1, 3, TREG_ZERO, 1, | |
1719 | { { 7, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | |
1720 | #ifndef DISASM_ONLY | |
1721 | { | |
1722 | 0x800000007ffc0000ULL, | |
1723 | 0ULL, | |
1724 | 0ULL, | |
1725 | 0ULL, | |
1726 | 0ULL | |
1727 | }, | |
1728 | { | |
1729 | 0x0000000000280000ULL, | |
1730 | -1ULL, | |
1731 | -1ULL, | |
1732 | -1ULL, | |
1733 | -1ULL | |
1734 | } | |
1735 | #endif | |
1736 | }, | |
1737 | { "crc32_8.sn", TILEPRO_OPC_CRC32_8_SN, 0x1, 3, TREG_SN, 1, | |
1738 | { { 7, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | |
1739 | #ifndef DISASM_ONLY | |
1740 | { | |
1741 | 0x800000007ffc0000ULL, | |
1742 | 0ULL, | |
1743 | 0ULL, | |
1744 | 0ULL, | |
1745 | 0ULL | |
1746 | }, | |
1747 | { | |
1748 | 0x0000000008280000ULL, | |
1749 | -1ULL, | |
1750 | -1ULL, | |
1751 | -1ULL, | |
1752 | -1ULL | |
1753 | } | |
1754 | #endif | |
1755 | }, | |
1756 | { "ctz", TILEPRO_OPC_CTZ, 0x5, 2, TREG_ZERO, 1, | |
1757 | { { 7, 8 }, { 0, }, { 11, 12 }, { 0, }, { 0, } }, | |
1758 | #ifndef DISASM_ONLY | |
1759 | { | |
1760 | 0x800000007ffff000ULL, | |
1761 | 0ULL, | |
1762 | 0x80000000780ff000ULL, | |
1763 | 0ULL, | |
1764 | 0ULL | |
1765 | }, | |
1766 | { | |
1767 | 0x0000000070164000ULL, | |
1768 | -1ULL, | |
1769 | 0x80000000680a4000ULL, | |
1770 | -1ULL, | |
1771 | -1ULL | |
1772 | } | |
1773 | #endif | |
1774 | }, | |
1775 | { "ctz.sn", TILEPRO_OPC_CTZ_SN, 0x1, 2, TREG_SN, 1, | |
1776 | { { 7, 8 }, { 0, }, { 0, }, { 0, }, { 0, } }, | |
1777 | #ifndef DISASM_ONLY | |
1778 | { | |
1779 | 0x800000007ffff000ULL, | |
1780 | 0ULL, | |
1781 | 0ULL, | |
1782 | 0ULL, | |
1783 | 0ULL | |
1784 | }, | |
1785 | { | |
1786 | 0x0000000078164000ULL, | |
1787 | -1ULL, | |
1788 | -1ULL, | |
1789 | -1ULL, | |
1790 | -1ULL | |
1791 | } | |
1792 | #endif | |
1793 | }, | |
1794 | { "drain", TILEPRO_OPC_DRAIN, 0x2, 0, TREG_ZERO, 0, | |
1795 | { { 0, }, { }, { 0, }, { 0, }, { 0, } }, | |
1796 | #ifndef DISASM_ONLY | |
1797 | { | |
1798 | 0ULL, | |
1799 | 0xfbfff80000000000ULL, | |
1800 | 0ULL, | |
1801 | 0ULL, | |
1802 | 0ULL | |
1803 | }, | |
1804 | { | |
1805 | -1ULL, | |
1806 | 0x400b080000000000ULL, | |
1807 | -1ULL, | |
1808 | -1ULL, | |
1809 | -1ULL | |
1810 | } | |
1811 | #endif | |
1812 | }, | |
1813 | { "dtlbpr", TILEPRO_OPC_DTLBPR, 0x2, 1, TREG_ZERO, 1, | |
1814 | { { 0, }, { 10 }, { 0, }, { 0, }, { 0, } }, | |
1815 | #ifndef DISASM_ONLY | |
1816 | { | |
1817 | 0ULL, | |
1818 | 0xfbfff80000000000ULL, | |
1819 | 0ULL, | |
1820 | 0ULL, | |
1821 | 0ULL | |
1822 | }, | |
1823 | { | |
1824 | -1ULL, | |
1825 | 0x400b100000000000ULL, | |
1826 | -1ULL, | |
1827 | -1ULL, | |
1828 | -1ULL | |
1829 | } | |
1830 | #endif | |
1831 | }, | |
1832 | { "dword_align", TILEPRO_OPC_DWORD_ALIGN, 0x1, 3, TREG_ZERO, 1, | |
1833 | { { 21, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | |
1834 | #ifndef DISASM_ONLY | |
1835 | { | |
1836 | 0x800000007ffc0000ULL, | |
1837 | 0ULL, | |
1838 | 0ULL, | |
1839 | 0ULL, | |
1840 | 0ULL | |
1841 | }, | |
1842 | { | |
1843 | 0x00000000017c0000ULL, | |
1844 | -1ULL, | |
1845 | -1ULL, | |
1846 | -1ULL, | |
1847 | -1ULL | |
1848 | } | |
1849 | #endif | |
1850 | }, | |
1851 | { "dword_align.sn", TILEPRO_OPC_DWORD_ALIGN_SN, 0x1, 3, TREG_SN, 1, | |
1852 | { { 21, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | |
1853 | #ifndef DISASM_ONLY | |
1854 | { | |
1855 | 0x800000007ffc0000ULL, | |
1856 | 0ULL, | |
1857 | 0ULL, | |
1858 | 0ULL, | |
1859 | 0ULL | |
1860 | }, | |
1861 | { | |
1862 | 0x00000000097c0000ULL, | |
1863 | -1ULL, | |
1864 | -1ULL, | |
1865 | -1ULL, | |
1866 | -1ULL | |
1867 | } | |
1868 | #endif | |
1869 | }, | |
1870 | { "finv", TILEPRO_OPC_FINV, 0x2, 1, TREG_ZERO, 1, | |
1871 | { { 0, }, { 10 }, { 0, }, { 0, }, { 0, } }, | |
1872 | #ifndef DISASM_ONLY | |
1873 | { | |
1874 | 0ULL, | |
1875 | 0xfbfff80000000000ULL, | |
1876 | 0ULL, | |
1877 | 0ULL, | |
1878 | 0ULL | |
1879 | }, | |
1880 | { | |
1881 | -1ULL, | |
1882 | 0x400b180000000000ULL, | |
1883 | -1ULL, | |
1884 | -1ULL, | |
1885 | -1ULL | |
1886 | } | |
1887 | #endif | |
1888 | }, | |
1889 | { "flush", TILEPRO_OPC_FLUSH, 0x2, 1, TREG_ZERO, 1, | |
1890 | { { 0, }, { 10 }, { 0, }, { 0, }, { 0, } }, | |
1891 | #ifndef DISASM_ONLY | |
1892 | { | |
1893 | 0ULL, | |
1894 | 0xfbfff80000000000ULL, | |
1895 | 0ULL, | |
1896 | 0ULL, | |
1897 | 0ULL | |
1898 | }, | |
1899 | { | |
1900 | -1ULL, | |
1901 | 0x400b200000000000ULL, | |
1902 | -1ULL, | |
1903 | -1ULL, | |
1904 | -1ULL | |
1905 | } | |
1906 | #endif | |
1907 | }, | |
1908 | { "fnop", TILEPRO_OPC_FNOP, 0xf, 0, TREG_ZERO, 1, | |
1909 | { { }, { }, { }, { }, { 0, } }, | |
1910 | #ifndef DISASM_ONLY | |
1911 | { | |
1912 | 0x8000000077fff000ULL, | |
1913 | 0xfbfff80000000000ULL, | |
1914 | 0x80000000780ff000ULL, | |
1915 | 0xf807f80000000000ULL, | |
1916 | 0ULL | |
1917 | }, | |
1918 | { | |
1919 | 0x0000000070165000ULL, | |
1920 | 0x400b280000000000ULL, | |
1921 | 0x80000000680a5000ULL, | |
1922 | 0xd805080000000000ULL, | |
1923 | -1ULL | |
1924 | } | |
1925 | #endif | |
1926 | }, | |
1927 | { "icoh", TILEPRO_OPC_ICOH, 0x2, 1, TREG_ZERO, 1, | |
1928 | { { 0, }, { 10 }, { 0, }, { 0, }, { 0, } }, | |
1929 | #ifndef DISASM_ONLY | |
1930 | { | |
1931 | 0ULL, | |
1932 | 0xfbfff80000000000ULL, | |
1933 | 0ULL, | |
1934 | 0ULL, | |
1935 | 0ULL | |
1936 | }, | |
1937 | { | |
1938 | -1ULL, | |
1939 | 0x400b300000000000ULL, | |
1940 | -1ULL, | |
1941 | -1ULL, | |
1942 | -1ULL | |
1943 | } | |
1944 | #endif | |
1945 | }, | |
1946 | { "ill", TILEPRO_OPC_ILL, 0xa, 0, TREG_ZERO, 1, | |
1947 | { { 0, }, { }, { 0, }, { }, { 0, } }, | |
1948 | #ifndef DISASM_ONLY | |
1949 | { | |
1950 | 0ULL, | |
1951 | 0xfbfff80000000000ULL, | |
1952 | 0ULL, | |
1953 | 0xf807f80000000000ULL, | |
1954 | 0ULL | |
1955 | }, | |
1956 | { | |
1957 | -1ULL, | |
1958 | 0x400b380000000000ULL, | |
1959 | -1ULL, | |
1960 | 0xd805100000000000ULL, | |
1961 | -1ULL | |
1962 | } | |
1963 | #endif | |
1964 | }, | |
1965 | { "inthb", TILEPRO_OPC_INTHB, 0x3, 3, TREG_ZERO, 1, | |
1966 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
1967 | #ifndef DISASM_ONLY | |
1968 | { | |
1969 | 0x800000007ffc0000ULL, | |
1970 | 0xfffe000000000000ULL, | |
1971 | 0ULL, | |
1972 | 0ULL, | |
1973 | 0ULL | |
1974 | }, | |
1975 | { | |
1976 | 0x00000000002c0000ULL, | |
1977 | 0x080a000000000000ULL, | |
1978 | -1ULL, | |
1979 | -1ULL, | |
1980 | -1ULL | |
1981 | } | |
1982 | #endif | |
1983 | }, | |
1984 | { "inthb.sn", TILEPRO_OPC_INTHB_SN, 0x3, 3, TREG_SN, 1, | |
1985 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
1986 | #ifndef DISASM_ONLY | |
1987 | { | |
1988 | 0x800000007ffc0000ULL, | |
1989 | 0xfffe000000000000ULL, | |
1990 | 0ULL, | |
1991 | 0ULL, | |
1992 | 0ULL | |
1993 | }, | |
1994 | { | |
1995 | 0x00000000082c0000ULL, | |
1996 | 0x0c0a000000000000ULL, | |
1997 | -1ULL, | |
1998 | -1ULL, | |
1999 | -1ULL | |
2000 | } | |
2001 | #endif | |
2002 | }, | |
2003 | { "inthh", TILEPRO_OPC_INTHH, 0x3, 3, TREG_ZERO, 1, | |
2004 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
2005 | #ifndef DISASM_ONLY | |
2006 | { | |
2007 | 0x800000007ffc0000ULL, | |
2008 | 0xfffe000000000000ULL, | |
2009 | 0ULL, | |
2010 | 0ULL, | |
2011 | 0ULL | |
2012 | }, | |
2013 | { | |
2014 | 0x0000000000300000ULL, | |
2015 | 0x080c000000000000ULL, | |
2016 | -1ULL, | |
2017 | -1ULL, | |
2018 | -1ULL | |
2019 | } | |
2020 | #endif | |
2021 | }, | |
2022 | { "inthh.sn", TILEPRO_OPC_INTHH_SN, 0x3, 3, TREG_SN, 1, | |
2023 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
2024 | #ifndef DISASM_ONLY | |
2025 | { | |
2026 | 0x800000007ffc0000ULL, | |
2027 | 0xfffe000000000000ULL, | |
2028 | 0ULL, | |
2029 | 0ULL, | |
2030 | 0ULL | |
2031 | }, | |
2032 | { | |
2033 | 0x0000000008300000ULL, | |
2034 | 0x0c0c000000000000ULL, | |
2035 | -1ULL, | |
2036 | -1ULL, | |
2037 | -1ULL | |
2038 | } | |
2039 | #endif | |
2040 | }, | |
2041 | { "intlb", TILEPRO_OPC_INTLB, 0x3, 3, TREG_ZERO, 1, | |
2042 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
2043 | #ifndef DISASM_ONLY | |
2044 | { | |
2045 | 0x800000007ffc0000ULL, | |
2046 | 0xfffe000000000000ULL, | |
2047 | 0ULL, | |
2048 | 0ULL, | |
2049 | 0ULL | |
2050 | }, | |
2051 | { | |
2052 | 0x0000000000340000ULL, | |
2053 | 0x080e000000000000ULL, | |
2054 | -1ULL, | |
2055 | -1ULL, | |
2056 | -1ULL | |
2057 | } | |
2058 | #endif | |
2059 | }, | |
2060 | { "intlb.sn", TILEPRO_OPC_INTLB_SN, 0x3, 3, TREG_SN, 1, | |
2061 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
2062 | #ifndef DISASM_ONLY | |
2063 | { | |
2064 | 0x800000007ffc0000ULL, | |
2065 | 0xfffe000000000000ULL, | |
2066 | 0ULL, | |
2067 | 0ULL, | |
2068 | 0ULL | |
2069 | }, | |
2070 | { | |
2071 | 0x0000000008340000ULL, | |
2072 | 0x0c0e000000000000ULL, | |
2073 | -1ULL, | |
2074 | -1ULL, | |
2075 | -1ULL | |
2076 | } | |
2077 | #endif | |
2078 | }, | |
2079 | { "intlh", TILEPRO_OPC_INTLH, 0x3, 3, TREG_ZERO, 1, | |
2080 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
2081 | #ifndef DISASM_ONLY | |
2082 | { | |
2083 | 0x800000007ffc0000ULL, | |
2084 | 0xfffe000000000000ULL, | |
2085 | 0ULL, | |
2086 | 0ULL, | |
2087 | 0ULL | |
2088 | }, | |
2089 | { | |
2090 | 0x0000000000380000ULL, | |
2091 | 0x0810000000000000ULL, | |
2092 | -1ULL, | |
2093 | -1ULL, | |
2094 | -1ULL | |
2095 | } | |
2096 | #endif | |
2097 | }, | |
2098 | { "intlh.sn", TILEPRO_OPC_INTLH_SN, 0x3, 3, TREG_SN, 1, | |
2099 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
2100 | #ifndef DISASM_ONLY | |
2101 | { | |
2102 | 0x800000007ffc0000ULL, | |
2103 | 0xfffe000000000000ULL, | |
2104 | 0ULL, | |
2105 | 0ULL, | |
2106 | 0ULL | |
2107 | }, | |
2108 | { | |
2109 | 0x0000000008380000ULL, | |
2110 | 0x0c10000000000000ULL, | |
2111 | -1ULL, | |
2112 | -1ULL, | |
2113 | -1ULL | |
2114 | } | |
2115 | #endif | |
2116 | }, | |
2117 | { "inv", TILEPRO_OPC_INV, 0x2, 1, TREG_ZERO, 1, | |
2118 | { { 0, }, { 10 }, { 0, }, { 0, }, { 0, } }, | |
2119 | #ifndef DISASM_ONLY | |
2120 | { | |
2121 | 0ULL, | |
2122 | 0xfbfff80000000000ULL, | |
2123 | 0ULL, | |
2124 | 0ULL, | |
2125 | 0ULL | |
2126 | }, | |
2127 | { | |
2128 | -1ULL, | |
2129 | 0x400b400000000000ULL, | |
2130 | -1ULL, | |
2131 | -1ULL, | |
2132 | -1ULL | |
2133 | } | |
2134 | #endif | |
2135 | }, | |
2136 | { "iret", TILEPRO_OPC_IRET, 0x2, 0, TREG_ZERO, 1, | |
2137 | { { 0, }, { }, { 0, }, { 0, }, { 0, } }, | |
2138 | #ifndef DISASM_ONLY | |
2139 | { | |
2140 | 0ULL, | |
2141 | 0xfbfff80000000000ULL, | |
2142 | 0ULL, | |
2143 | 0ULL, | |
2144 | 0ULL | |
2145 | }, | |
2146 | { | |
2147 | -1ULL, | |
2148 | 0x400b480000000000ULL, | |
2149 | -1ULL, | |
2150 | -1ULL, | |
2151 | -1ULL | |
2152 | } | |
2153 | #endif | |
2154 | }, | |
2155 | { "jalb", TILEPRO_OPC_JALB, 0x2, 1, TREG_LR, 1, | |
2156 | { { 0, }, { 22 }, { 0, }, { 0, }, { 0, } }, | |
2157 | #ifndef DISASM_ONLY | |
2158 | { | |
2159 | 0ULL, | |
2160 | 0xf800000000000000ULL, | |
2161 | 0ULL, | |
2162 | 0ULL, | |
2163 | 0ULL | |
2164 | }, | |
2165 | { | |
2166 | -1ULL, | |
2167 | 0x6800000000000000ULL, | |
2168 | -1ULL, | |
2169 | -1ULL, | |
2170 | -1ULL | |
2171 | } | |
2172 | #endif | |
2173 | }, | |
2174 | { "jalf", TILEPRO_OPC_JALF, 0x2, 1, TREG_LR, 1, | |
2175 | { { 0, }, { 22 }, { 0, }, { 0, }, { 0, } }, | |
2176 | #ifndef DISASM_ONLY | |
2177 | { | |
2178 | 0ULL, | |
2179 | 0xf800000000000000ULL, | |
2180 | 0ULL, | |
2181 | 0ULL, | |
2182 | 0ULL | |
2183 | }, | |
2184 | { | |
2185 | -1ULL, | |
2186 | 0x6000000000000000ULL, | |
2187 | -1ULL, | |
2188 | -1ULL, | |
2189 | -1ULL | |
2190 | } | |
2191 | #endif | |
2192 | }, | |
2193 | { "jalr", TILEPRO_OPC_JALR, 0x2, 1, TREG_LR, 1, | |
2194 | { { 0, }, { 10 }, { 0, }, { 0, }, { 0, } }, | |
2195 | #ifndef DISASM_ONLY | |
2196 | { | |
2197 | 0ULL, | |
2198 | 0xfbfe000000000000ULL, | |
2199 | 0ULL, | |
2200 | 0ULL, | |
2201 | 0ULL | |
2202 | }, | |
2203 | { | |
2204 | -1ULL, | |
2205 | 0x0814000000000000ULL, | |
2206 | -1ULL, | |
2207 | -1ULL, | |
2208 | -1ULL | |
2209 | } | |
2210 | #endif | |
2211 | }, | |
2212 | { "jalrp", TILEPRO_OPC_JALRP, 0x2, 1, TREG_LR, 1, | |
2213 | { { 0, }, { 10 }, { 0, }, { 0, }, { 0, } }, | |
2214 | #ifndef DISASM_ONLY | |
2215 | { | |
2216 | 0ULL, | |
2217 | 0xfbfe000000000000ULL, | |
2218 | 0ULL, | |
2219 | 0ULL, | |
2220 | 0ULL | |
2221 | }, | |
2222 | { | |
2223 | -1ULL, | |
2224 | 0x0812000000000000ULL, | |
2225 | -1ULL, | |
2226 | -1ULL, | |
2227 | -1ULL | |
2228 | } | |
2229 | #endif | |
2230 | }, | |
2231 | { "jb", TILEPRO_OPC_JB, 0x2, 1, TREG_ZERO, 1, | |
2232 | { { 0, }, { 22 }, { 0, }, { 0, }, { 0, } }, | |
2233 | #ifndef DISASM_ONLY | |
2234 | { | |
2235 | 0ULL, | |
2236 | 0xf800000000000000ULL, | |
2237 | 0ULL, | |
2238 | 0ULL, | |
2239 | 0ULL | |
2240 | }, | |
2241 | { | |
2242 | -1ULL, | |
2243 | 0x5800000000000000ULL, | |
2244 | -1ULL, | |
2245 | -1ULL, | |
2246 | -1ULL | |
2247 | } | |
2248 | #endif | |
2249 | }, | |
2250 | { "jf", TILEPRO_OPC_JF, 0x2, 1, TREG_ZERO, 1, | |
2251 | { { 0, }, { 22 }, { 0, }, { 0, }, { 0, } }, | |
2252 | #ifndef DISASM_ONLY | |
2253 | { | |
2254 | 0ULL, | |
2255 | 0xf800000000000000ULL, | |
2256 | 0ULL, | |
2257 | 0ULL, | |
2258 | 0ULL | |
2259 | }, | |
2260 | { | |
2261 | -1ULL, | |
2262 | 0x5000000000000000ULL, | |
2263 | -1ULL, | |
2264 | -1ULL, | |
2265 | -1ULL | |
2266 | } | |
2267 | #endif | |
2268 | }, | |
2269 | { "jr", TILEPRO_OPC_JR, 0x2, 1, TREG_ZERO, 1, | |
2270 | { { 0, }, { 10 }, { 0, }, { 0, }, { 0, } }, | |
2271 | #ifndef DISASM_ONLY | |
2272 | { | |
2273 | 0ULL, | |
2274 | 0xfbfe000000000000ULL, | |
2275 | 0ULL, | |
2276 | 0ULL, | |
2277 | 0ULL | |
2278 | }, | |
2279 | { | |
2280 | -1ULL, | |
2281 | 0x0818000000000000ULL, | |
2282 | -1ULL, | |
2283 | -1ULL, | |
2284 | -1ULL | |
2285 | } | |
2286 | #endif | |
2287 | }, | |
2288 | { "jrp", TILEPRO_OPC_JRP, 0x2, 1, TREG_ZERO, 1, | |
2289 | { { 0, }, { 10 }, { 0, }, { 0, }, { 0, } }, | |
2290 | #ifndef DISASM_ONLY | |
2291 | { | |
2292 | 0ULL, | |
2293 | 0xfbfe000000000000ULL, | |
2294 | 0ULL, | |
2295 | 0ULL, | |
2296 | 0ULL | |
2297 | }, | |
2298 | { | |
2299 | -1ULL, | |
2300 | 0x0816000000000000ULL, | |
2301 | -1ULL, | |
2302 | -1ULL, | |
2303 | -1ULL | |
2304 | } | |
2305 | #endif | |
2306 | }, | |
2307 | { "lb", TILEPRO_OPC_LB, 0x12, 2, TREG_ZERO, 1, | |
2308 | { { 0, }, { 9, 10 }, { 0, }, { 0, }, { 23, 15 } }, | |
2309 | #ifndef DISASM_ONLY | |
2310 | { | |
2311 | 0ULL, | |
2312 | 0xfffff80000000000ULL, | |
2313 | 0ULL, | |
2314 | 0ULL, | |
2315 | 0x8700000000000000ULL | |
2316 | }, | |
2317 | { | |
2318 | -1ULL, | |
2319 | 0x400b500000000000ULL, | |
2320 | -1ULL, | |
2321 | -1ULL, | |
2322 | 0x8000000000000000ULL | |
2323 | } | |
2324 | #endif | |
2325 | }, | |
2326 | { "lb.sn", TILEPRO_OPC_LB_SN, 0x2, 2, TREG_SN, 1, | |
2327 | { { 0, }, { 9, 10 }, { 0, }, { 0, }, { 0, } }, | |
2328 | #ifndef DISASM_ONLY | |
2329 | { | |
2330 | 0ULL, | |
2331 | 0xfffff80000000000ULL, | |
2332 | 0ULL, | |
2333 | 0ULL, | |
2334 | 0ULL | |
2335 | }, | |
2336 | { | |
2337 | -1ULL, | |
2338 | 0x440b500000000000ULL, | |
2339 | -1ULL, | |
2340 | -1ULL, | |
2341 | -1ULL | |
2342 | } | |
2343 | #endif | |
2344 | }, | |
2345 | { "lb_u", TILEPRO_OPC_LB_U, 0x12, 2, TREG_ZERO, 1, | |
2346 | { { 0, }, { 9, 10 }, { 0, }, { 0, }, { 23, 15 } }, | |
2347 | #ifndef DISASM_ONLY | |
2348 | { | |
2349 | 0ULL, | |
2350 | 0xfffff80000000000ULL, | |
2351 | 0ULL, | |
2352 | 0ULL, | |
2353 | 0x8700000000000000ULL | |
2354 | }, | |
2355 | { | |
2356 | -1ULL, | |
2357 | 0x400b580000000000ULL, | |
2358 | -1ULL, | |
2359 | -1ULL, | |
2360 | 0x8100000000000000ULL | |
2361 | } | |
2362 | #endif | |
2363 | }, | |
2364 | { "lb_u.sn", TILEPRO_OPC_LB_U_SN, 0x2, 2, TREG_SN, 1, | |
2365 | { { 0, }, { 9, 10 }, { 0, }, { 0, }, { 0, } }, | |
2366 | #ifndef DISASM_ONLY | |
2367 | { | |
2368 | 0ULL, | |
2369 | 0xfffff80000000000ULL, | |
2370 | 0ULL, | |
2371 | 0ULL, | |
2372 | 0ULL | |
2373 | }, | |
2374 | { | |
2375 | -1ULL, | |
2376 | 0x440b580000000000ULL, | |
2377 | -1ULL, | |
2378 | -1ULL, | |
2379 | -1ULL | |
2380 | } | |
2381 | #endif | |
2382 | }, | |
2383 | { "lbadd", TILEPRO_OPC_LBADD, 0x2, 3, TREG_ZERO, 1, | |
2384 | { { 0, }, { 9, 24, 1 }, { 0, }, { 0, }, { 0, } }, | |
2385 | #ifndef DISASM_ONLY | |
2386 | { | |
2387 | 0ULL, | |
2388 | 0xfff8000000000000ULL, | |
2389 | 0ULL, | |
2390 | 0ULL, | |
2391 | 0ULL | |
2392 | }, | |
2393 | { | |
2394 | -1ULL, | |
2395 | 0x30b0000000000000ULL, | |
2396 | -1ULL, | |
2397 | -1ULL, | |
2398 | -1ULL | |
2399 | } | |
2400 | #endif | |
2401 | }, | |
2402 | { "lbadd.sn", TILEPRO_OPC_LBADD_SN, 0x2, 3, TREG_SN, 1, | |
2403 | { { 0, }, { 9, 24, 1 }, { 0, }, { 0, }, { 0, } }, | |
2404 | #ifndef DISASM_ONLY | |
2405 | { | |
2406 | 0ULL, | |
2407 | 0xfff8000000000000ULL, | |
2408 | 0ULL, | |
2409 | 0ULL, | |
2410 | 0ULL | |
2411 | }, | |
2412 | { | |
2413 | -1ULL, | |
2414 | 0x34b0000000000000ULL, | |
2415 | -1ULL, | |
2416 | -1ULL, | |
2417 | -1ULL | |
2418 | } | |
2419 | #endif | |
2420 | }, | |
2421 | { "lbadd_u", TILEPRO_OPC_LBADD_U, 0x2, 3, TREG_ZERO, 1, | |
2422 | { { 0, }, { 9, 24, 1 }, { 0, }, { 0, }, { 0, } }, | |
2423 | #ifndef DISASM_ONLY | |
2424 | { | |
2425 | 0ULL, | |
2426 | 0xfff8000000000000ULL, | |
2427 | 0ULL, | |
2428 | 0ULL, | |
2429 | 0ULL | |
2430 | }, | |
2431 | { | |
2432 | -1ULL, | |
2433 | 0x30b8000000000000ULL, | |
2434 | -1ULL, | |
2435 | -1ULL, | |
2436 | -1ULL | |
2437 | } | |
2438 | #endif | |
2439 | }, | |
2440 | { "lbadd_u.sn", TILEPRO_OPC_LBADD_U_SN, 0x2, 3, TREG_SN, 1, | |
2441 | { { 0, }, { 9, 24, 1 }, { 0, }, { 0, }, { 0, } }, | |
2442 | #ifndef DISASM_ONLY | |
2443 | { | |
2444 | 0ULL, | |
2445 | 0xfff8000000000000ULL, | |
2446 | 0ULL, | |
2447 | 0ULL, | |
2448 | 0ULL | |
2449 | }, | |
2450 | { | |
2451 | -1ULL, | |
2452 | 0x34b8000000000000ULL, | |
2453 | -1ULL, | |
2454 | -1ULL, | |
2455 | -1ULL | |
2456 | } | |
2457 | #endif | |
2458 | }, | |
2459 | { "lh", TILEPRO_OPC_LH, 0x12, 2, TREG_ZERO, 1, | |
2460 | { { 0, }, { 9, 10 }, { 0, }, { 0, }, { 23, 15 } }, | |
2461 | #ifndef DISASM_ONLY | |
2462 | { | |
2463 | 0ULL, | |
2464 | 0xfffff80000000000ULL, | |
2465 | 0ULL, | |
2466 | 0ULL, | |
2467 | 0x8700000000000000ULL | |
2468 | }, | |
2469 | { | |
2470 | -1ULL, | |
2471 | 0x400b600000000000ULL, | |
2472 | -1ULL, | |
2473 | -1ULL, | |
2474 | 0x8200000000000000ULL | |
2475 | } | |
2476 | #endif | |
2477 | }, | |
2478 | { "lh.sn", TILEPRO_OPC_LH_SN, 0x2, 2, TREG_SN, 1, | |
2479 | { { 0, }, { 9, 10 }, { 0, }, { 0, }, { 0, } }, | |
2480 | #ifndef DISASM_ONLY | |
2481 | { | |
2482 | 0ULL, | |
2483 | 0xfffff80000000000ULL, | |
2484 | 0ULL, | |
2485 | 0ULL, | |
2486 | 0ULL | |
2487 | }, | |
2488 | { | |
2489 | -1ULL, | |
2490 | 0x440b600000000000ULL, | |
2491 | -1ULL, | |
2492 | -1ULL, | |
2493 | -1ULL | |
2494 | } | |
2495 | #endif | |
2496 | }, | |
2497 | { "lh_u", TILEPRO_OPC_LH_U, 0x12, 2, TREG_ZERO, 1, | |
2498 | { { 0, }, { 9, 10 }, { 0, }, { 0, }, { 23, 15 } }, | |
2499 | #ifndef DISASM_ONLY | |
2500 | { | |
2501 | 0ULL, | |
2502 | 0xfffff80000000000ULL, | |
2503 | 0ULL, | |
2504 | 0ULL, | |
2505 | 0x8700000000000000ULL | |
2506 | }, | |
2507 | { | |
2508 | -1ULL, | |
2509 | 0x400b680000000000ULL, | |
2510 | -1ULL, | |
2511 | -1ULL, | |
2512 | 0x8300000000000000ULL | |
2513 | } | |
2514 | #endif | |
2515 | }, | |
2516 | { "lh_u.sn", TILEPRO_OPC_LH_U_SN, 0x2, 2, TREG_SN, 1, | |
2517 | { { 0, }, { 9, 10 }, { 0, }, { 0, }, { 0, } }, | |
2518 | #ifndef DISASM_ONLY | |
2519 | { | |
2520 | 0ULL, | |
2521 | 0xfffff80000000000ULL, | |
2522 | 0ULL, | |
2523 | 0ULL, | |
2524 | 0ULL | |
2525 | }, | |
2526 | { | |
2527 | -1ULL, | |
2528 | 0x440b680000000000ULL, | |
2529 | -1ULL, | |
2530 | -1ULL, | |
2531 | -1ULL | |
2532 | } | |
2533 | #endif | |
2534 | }, | |
2535 | { "lhadd", TILEPRO_OPC_LHADD, 0x2, 3, TREG_ZERO, 1, | |
2536 | { { 0, }, { 9, 24, 1 }, { 0, }, { 0, }, { 0, } }, | |
2537 | #ifndef DISASM_ONLY | |
2538 | { | |
2539 | 0ULL, | |
2540 | 0xfff8000000000000ULL, | |
2541 | 0ULL, | |
2542 | 0ULL, | |
2543 | 0ULL | |
2544 | }, | |
2545 | { | |
2546 | -1ULL, | |
2547 | 0x30c0000000000000ULL, | |
2548 | -1ULL, | |
2549 | -1ULL, | |
2550 | -1ULL | |
2551 | } | |
2552 | #endif | |
2553 | }, | |
2554 | { "lhadd.sn", TILEPRO_OPC_LHADD_SN, 0x2, 3, TREG_SN, 1, | |
2555 | { { 0, }, { 9, 24, 1 }, { 0, }, { 0, }, { 0, } }, | |
2556 | #ifndef DISASM_ONLY | |
2557 | { | |
2558 | 0ULL, | |
2559 | 0xfff8000000000000ULL, | |
2560 | 0ULL, | |
2561 | 0ULL, | |
2562 | 0ULL | |
2563 | }, | |
2564 | { | |
2565 | -1ULL, | |
2566 | 0x34c0000000000000ULL, | |
2567 | -1ULL, | |
2568 | -1ULL, | |
2569 | -1ULL | |
2570 | } | |
2571 | #endif | |
2572 | }, | |
2573 | { "lhadd_u", TILEPRO_OPC_LHADD_U, 0x2, 3, TREG_ZERO, 1, | |
2574 | { { 0, }, { 9, 24, 1 }, { 0, }, { 0, }, { 0, } }, | |
2575 | #ifndef DISASM_ONLY | |
2576 | { | |
2577 | 0ULL, | |
2578 | 0xfff8000000000000ULL, | |
2579 | 0ULL, | |
2580 | 0ULL, | |
2581 | 0ULL | |
2582 | }, | |
2583 | { | |
2584 | -1ULL, | |
2585 | 0x30c8000000000000ULL, | |
2586 | -1ULL, | |
2587 | -1ULL, | |
2588 | -1ULL | |
2589 | } | |
2590 | #endif | |
2591 | }, | |
2592 | { "lhadd_u.sn", TILEPRO_OPC_LHADD_U_SN, 0x2, 3, TREG_SN, 1, | |
2593 | { { 0, }, { 9, 24, 1 }, { 0, }, { 0, }, { 0, } }, | |
2594 | #ifndef DISASM_ONLY | |
2595 | { | |
2596 | 0ULL, | |
2597 | 0xfff8000000000000ULL, | |
2598 | 0ULL, | |
2599 | 0ULL, | |
2600 | 0ULL | |
2601 | }, | |
2602 | { | |
2603 | -1ULL, | |
2604 | 0x34c8000000000000ULL, | |
2605 | -1ULL, | |
2606 | -1ULL, | |
2607 | -1ULL | |
2608 | } | |
2609 | #endif | |
2610 | }, | |
2611 | { "lnk", TILEPRO_OPC_LNK, 0x2, 1, TREG_ZERO, 1, | |
2612 | { { 0, }, { 9 }, { 0, }, { 0, }, { 0, } }, | |
2613 | #ifndef DISASM_ONLY | |
2614 | { | |
2615 | 0ULL, | |
2616 | 0xfffe000000000000ULL, | |
2617 | 0ULL, | |
2618 | 0ULL, | |
2619 | 0ULL | |
2620 | }, | |
2621 | { | |
2622 | -1ULL, | |
2623 | 0x081a000000000000ULL, | |
2624 | -1ULL, | |
2625 | -1ULL, | |
2626 | -1ULL | |
2627 | } | |
2628 | #endif | |
2629 | }, | |
2630 | { "lnk.sn", TILEPRO_OPC_LNK_SN, 0x2, 1, TREG_SN, 1, | |
2631 | { { 0, }, { 9 }, { 0, }, { 0, }, { 0, } }, | |
2632 | #ifndef DISASM_ONLY | |
2633 | { | |
2634 | 0ULL, | |
2635 | 0xfffe000000000000ULL, | |
2636 | 0ULL, | |
2637 | 0ULL, | |
2638 | 0ULL | |
2639 | }, | |
2640 | { | |
2641 | -1ULL, | |
2642 | 0x0c1a000000000000ULL, | |
2643 | -1ULL, | |
2644 | -1ULL, | |
2645 | -1ULL | |
2646 | } | |
2647 | #endif | |
2648 | }, | |
2649 | { "lw", TILEPRO_OPC_LW, 0x12, 2, TREG_ZERO, 1, | |
2650 | { { 0, }, { 9, 10 }, { 0, }, { 0, }, { 23, 15 } }, | |
2651 | #ifndef DISASM_ONLY | |
2652 | { | |
2653 | 0ULL, | |
2654 | 0xfffff80000000000ULL, | |
2655 | 0ULL, | |
2656 | 0ULL, | |
2657 | 0x8700000000000000ULL | |
2658 | }, | |
2659 | { | |
2660 | -1ULL, | |
2661 | 0x400b700000000000ULL, | |
2662 | -1ULL, | |
2663 | -1ULL, | |
2664 | 0x8400000000000000ULL | |
2665 | } | |
2666 | #endif | |
2667 | }, | |
2668 | { "lw.sn", TILEPRO_OPC_LW_SN, 0x2, 2, TREG_SN, 1, | |
2669 | { { 0, }, { 9, 10 }, { 0, }, { 0, }, { 0, } }, | |
2670 | #ifndef DISASM_ONLY | |
2671 | { | |
2672 | 0ULL, | |
2673 | 0xfffff80000000000ULL, | |
2674 | 0ULL, | |
2675 | 0ULL, | |
2676 | 0ULL | |
2677 | }, | |
2678 | { | |
2679 | -1ULL, | |
2680 | 0x440b700000000000ULL, | |
2681 | -1ULL, | |
2682 | -1ULL, | |
2683 | -1ULL | |
2684 | } | |
2685 | #endif | |
2686 | }, | |
2687 | { "lw_na", TILEPRO_OPC_LW_NA, 0x2, 2, TREG_ZERO, 1, | |
2688 | { { 0, }, { 9, 10 }, { 0, }, { 0, }, { 0, } }, | |
2689 | #ifndef DISASM_ONLY | |
2690 | { | |
2691 | 0ULL, | |
2692 | 0xfffff80000000000ULL, | |
2693 | 0ULL, | |
2694 | 0ULL, | |
2695 | 0ULL | |
2696 | }, | |
2697 | { | |
2698 | -1ULL, | |
2699 | 0x400bc00000000000ULL, | |
2700 | -1ULL, | |
2701 | -1ULL, | |
2702 | -1ULL | |
2703 | } | |
2704 | #endif | |
2705 | }, | |
2706 | { "lw_na.sn", TILEPRO_OPC_LW_NA_SN, 0x2, 2, TREG_SN, 1, | |
2707 | { { 0, }, { 9, 10 }, { 0, }, { 0, }, { 0, } }, | |
2708 | #ifndef DISASM_ONLY | |
2709 | { | |
2710 | 0ULL, | |
2711 | 0xfffff80000000000ULL, | |
2712 | 0ULL, | |
2713 | 0ULL, | |
2714 | 0ULL | |
2715 | }, | |
2716 | { | |
2717 | -1ULL, | |
2718 | 0x440bc00000000000ULL, | |
2719 | -1ULL, | |
2720 | -1ULL, | |
2721 | -1ULL | |
2722 | } | |
2723 | #endif | |
2724 | }, | |
2725 | { "lwadd", TILEPRO_OPC_LWADD, 0x2, 3, TREG_ZERO, 1, | |
2726 | { { 0, }, { 9, 24, 1 }, { 0, }, { 0, }, { 0, } }, | |
2727 | #ifndef DISASM_ONLY | |
2728 | { | |
2729 | 0ULL, | |
2730 | 0xfff8000000000000ULL, | |
2731 | 0ULL, | |
2732 | 0ULL, | |
2733 | 0ULL | |
2734 | }, | |
2735 | { | |
2736 | -1ULL, | |
2737 | 0x30d0000000000000ULL, | |
2738 | -1ULL, | |
2739 | -1ULL, | |
2740 | -1ULL | |
2741 | } | |
2742 | #endif | |
2743 | }, | |
2744 | { "lwadd.sn", TILEPRO_OPC_LWADD_SN, 0x2, 3, TREG_SN, 1, | |
2745 | { { 0, }, { 9, 24, 1 }, { 0, }, { 0, }, { 0, } }, | |
2746 | #ifndef DISASM_ONLY | |
2747 | { | |
2748 | 0ULL, | |
2749 | 0xfff8000000000000ULL, | |
2750 | 0ULL, | |
2751 | 0ULL, | |
2752 | 0ULL | |
2753 | }, | |
2754 | { | |
2755 | -1ULL, | |
2756 | 0x34d0000000000000ULL, | |
2757 | -1ULL, | |
2758 | -1ULL, | |
2759 | -1ULL | |
2760 | } | |
2761 | #endif | |
2762 | }, | |
2763 | { "lwadd_na", TILEPRO_OPC_LWADD_NA, 0x2, 3, TREG_ZERO, 1, | |
2764 | { { 0, }, { 9, 24, 1 }, { 0, }, { 0, }, { 0, } }, | |
2765 | #ifndef DISASM_ONLY | |
2766 | { | |
2767 | 0ULL, | |
2768 | 0xfff8000000000000ULL, | |
2769 | 0ULL, | |
2770 | 0ULL, | |
2771 | 0ULL | |
2772 | }, | |
2773 | { | |
2774 | -1ULL, | |
2775 | 0x30d8000000000000ULL, | |
2776 | -1ULL, | |
2777 | -1ULL, | |
2778 | -1ULL | |
2779 | } | |
2780 | #endif | |
2781 | }, | |
2782 | { "lwadd_na.sn", TILEPRO_OPC_LWADD_NA_SN, 0x2, 3, TREG_SN, 1, | |
2783 | { { 0, }, { 9, 24, 1 }, { 0, }, { 0, }, { 0, } }, | |
2784 | #ifndef DISASM_ONLY | |
2785 | { | |
2786 | 0ULL, | |
2787 | 0xfff8000000000000ULL, | |
2788 | 0ULL, | |
2789 | 0ULL, | |
2790 | 0ULL | |
2791 | }, | |
2792 | { | |
2793 | -1ULL, | |
2794 | 0x34d8000000000000ULL, | |
2795 | -1ULL, | |
2796 | -1ULL, | |
2797 | -1ULL | |
2798 | } | |
2799 | #endif | |
2800 | }, | |
2801 | { "maxb_u", TILEPRO_OPC_MAXB_U, 0x3, 3, TREG_ZERO, 1, | |
2802 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
2803 | #ifndef DISASM_ONLY | |
2804 | { | |
2805 | 0x800000007ffc0000ULL, | |
2806 | 0xfffe000000000000ULL, | |
2807 | 0ULL, | |
2808 | 0ULL, | |
2809 | 0ULL | |
2810 | }, | |
2811 | { | |
2812 | 0x00000000003c0000ULL, | |
2813 | 0x081c000000000000ULL, | |
2814 | -1ULL, | |
2815 | -1ULL, | |
2816 | -1ULL | |
2817 | } | |
2818 | #endif | |
2819 | }, | |
2820 | { "maxb_u.sn", TILEPRO_OPC_MAXB_U_SN, 0x3, 3, TREG_SN, 1, | |
2821 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
2822 | #ifndef DISASM_ONLY | |
2823 | { | |
2824 | 0x800000007ffc0000ULL, | |
2825 | 0xfffe000000000000ULL, | |
2826 | 0ULL, | |
2827 | 0ULL, | |
2828 | 0ULL | |
2829 | }, | |
2830 | { | |
2831 | 0x00000000083c0000ULL, | |
2832 | 0x0c1c000000000000ULL, | |
2833 | -1ULL, | |
2834 | -1ULL, | |
2835 | -1ULL | |
2836 | } | |
2837 | #endif | |
2838 | }, | |
2839 | { "maxh", TILEPRO_OPC_MAXH, 0x3, 3, TREG_ZERO, 1, | |
2840 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
2841 | #ifndef DISASM_ONLY | |
2842 | { | |
2843 | 0x800000007ffc0000ULL, | |
2844 | 0xfffe000000000000ULL, | |
2845 | 0ULL, | |
2846 | 0ULL, | |
2847 | 0ULL | |
2848 | }, | |
2849 | { | |
2850 | 0x0000000000400000ULL, | |
2851 | 0x081e000000000000ULL, | |
2852 | -1ULL, | |
2853 | -1ULL, | |
2854 | -1ULL | |
2855 | } | |
2856 | #endif | |
2857 | }, | |
2858 | { "maxh.sn", TILEPRO_OPC_MAXH_SN, 0x3, 3, TREG_SN, 1, | |
2859 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
2860 | #ifndef DISASM_ONLY | |
2861 | { | |
2862 | 0x800000007ffc0000ULL, | |
2863 | 0xfffe000000000000ULL, | |
2864 | 0ULL, | |
2865 | 0ULL, | |
2866 | 0ULL | |
2867 | }, | |
2868 | { | |
2869 | 0x0000000008400000ULL, | |
2870 | 0x0c1e000000000000ULL, | |
2871 | -1ULL, | |
2872 | -1ULL, | |
2873 | -1ULL | |
2874 | } | |
2875 | #endif | |
2876 | }, | |
2877 | { "maxib_u", TILEPRO_OPC_MAXIB_U, 0x3, 3, TREG_ZERO, 1, | |
2878 | { { 7, 8, 0 }, { 9, 10, 1 }, { 0, }, { 0, }, { 0, } }, | |
2879 | #ifndef DISASM_ONLY | |
2880 | { | |
2881 | 0x800000007ff00000ULL, | |
2882 | 0xfff8000000000000ULL, | |
2883 | 0ULL, | |
2884 | 0ULL, | |
2885 | 0ULL | |
2886 | }, | |
2887 | { | |
2888 | 0x0000000040400000ULL, | |
2889 | 0x3028000000000000ULL, | |
2890 | -1ULL, | |
2891 | -1ULL, | |
2892 | -1ULL | |
2893 | } | |
2894 | #endif | |
2895 | }, | |
2896 | { "maxib_u.sn", TILEPRO_OPC_MAXIB_U_SN, 0x3, 3, TREG_SN, 1, | |
2897 | { { 7, 8, 0 }, { 9, 10, 1 }, { 0, }, { 0, }, { 0, } }, | |
2898 | #ifndef DISASM_ONLY | |
2899 | { | |
2900 | 0x800000007ff00000ULL, | |
2901 | 0xfff8000000000000ULL, | |
2902 | 0ULL, | |
2903 | 0ULL, | |
2904 | 0ULL | |
2905 | }, | |
2906 | { | |
2907 | 0x0000000048400000ULL, | |
2908 | 0x3428000000000000ULL, | |
2909 | -1ULL, | |
2910 | -1ULL, | |
2911 | -1ULL | |
2912 | } | |
2913 | #endif | |
2914 | }, | |
2915 | { "maxih", TILEPRO_OPC_MAXIH, 0x3, 3, TREG_ZERO, 1, | |
2916 | { { 7, 8, 0 }, { 9, 10, 1 }, { 0, }, { 0, }, { 0, } }, | |
2917 | #ifndef DISASM_ONLY | |
2918 | { | |
2919 | 0x800000007ff00000ULL, | |
2920 | 0xfff8000000000000ULL, | |
2921 | 0ULL, | |
2922 | 0ULL, | |
2923 | 0ULL | |
2924 | }, | |
2925 | { | |
2926 | 0x0000000040500000ULL, | |
2927 | 0x3030000000000000ULL, | |
2928 | -1ULL, | |
2929 | -1ULL, | |
2930 | -1ULL | |
2931 | } | |
2932 | #endif | |
2933 | }, | |
2934 | { "maxih.sn", TILEPRO_OPC_MAXIH_SN, 0x3, 3, TREG_SN, 1, | |
2935 | { { 7, 8, 0 }, { 9, 10, 1 }, { 0, }, { 0, }, { 0, } }, | |
2936 | #ifndef DISASM_ONLY | |
2937 | { | |
2938 | 0x800000007ff00000ULL, | |
2939 | 0xfff8000000000000ULL, | |
2940 | 0ULL, | |
2941 | 0ULL, | |
2942 | 0ULL | |
2943 | }, | |
2944 | { | |
2945 | 0x0000000048500000ULL, | |
2946 | 0x3430000000000000ULL, | |
2947 | -1ULL, | |
2948 | -1ULL, | |
2949 | -1ULL | |
2950 | } | |
2951 | #endif | |
2952 | }, | |
2953 | { "mf", TILEPRO_OPC_MF, 0x2, 0, TREG_ZERO, 1, | |
2954 | { { 0, }, { }, { 0, }, { 0, }, { 0, } }, | |
2955 | #ifndef DISASM_ONLY | |
2956 | { | |
2957 | 0ULL, | |
2958 | 0xfbfff80000000000ULL, | |
2959 | 0ULL, | |
2960 | 0ULL, | |
2961 | 0ULL | |
2962 | }, | |
2963 | { | |
2964 | -1ULL, | |
2965 | 0x400b780000000000ULL, | |
2966 | -1ULL, | |
2967 | -1ULL, | |
2968 | -1ULL | |
2969 | } | |
2970 | #endif | |
2971 | }, | |
2972 | { "mfspr", TILEPRO_OPC_MFSPR, 0x2, 2, TREG_ZERO, 1, | |
2973 | { { 0, }, { 9, 25 }, { 0, }, { 0, }, { 0, } }, | |
2974 | #ifndef DISASM_ONLY | |
2975 | { | |
2976 | 0ULL, | |
2977 | 0xfbf8000000000000ULL, | |
2978 | 0ULL, | |
2979 | 0ULL, | |
2980 | 0ULL | |
2981 | }, | |
2982 | { | |
2983 | -1ULL, | |
2984 | 0x3038000000000000ULL, | |
2985 | -1ULL, | |
2986 | -1ULL, | |
2987 | -1ULL | |
2988 | } | |
2989 | #endif | |
2990 | }, | |
2991 | { "minb_u", TILEPRO_OPC_MINB_U, 0x3, 3, TREG_ZERO, 1, | |
2992 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
2993 | #ifndef DISASM_ONLY | |
2994 | { | |
2995 | 0x800000007ffc0000ULL, | |
2996 | 0xfffe000000000000ULL, | |
2997 | 0ULL, | |
2998 | 0ULL, | |
2999 | 0ULL | |
3000 | }, | |
3001 | { | |
3002 | 0x0000000000440000ULL, | |
3003 | 0x0820000000000000ULL, | |
3004 | -1ULL, | |
3005 | -1ULL, | |
3006 | -1ULL | |
3007 | } | |
3008 | #endif | |
3009 | }, | |
3010 | { "minb_u.sn", TILEPRO_OPC_MINB_U_SN, 0x3, 3, TREG_SN, 1, | |
3011 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
3012 | #ifndef DISASM_ONLY | |
3013 | { | |
3014 | 0x800000007ffc0000ULL, | |
3015 | 0xfffe000000000000ULL, | |
3016 | 0ULL, | |
3017 | 0ULL, | |
3018 | 0ULL | |
3019 | }, | |
3020 | { | |
3021 | 0x0000000008440000ULL, | |
3022 | 0x0c20000000000000ULL, | |
3023 | -1ULL, | |
3024 | -1ULL, | |
3025 | -1ULL | |
3026 | } | |
3027 | #endif | |
3028 | }, | |
3029 | { "minh", TILEPRO_OPC_MINH, 0x3, 3, TREG_ZERO, 1, | |
3030 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
3031 | #ifndef DISASM_ONLY | |
3032 | { | |
3033 | 0x800000007ffc0000ULL, | |
3034 | 0xfffe000000000000ULL, | |
3035 | 0ULL, | |
3036 | 0ULL, | |
3037 | 0ULL | |
3038 | }, | |
3039 | { | |
3040 | 0x0000000000480000ULL, | |
3041 | 0x0822000000000000ULL, | |
3042 | -1ULL, | |
3043 | -1ULL, | |
3044 | -1ULL | |
3045 | } | |
3046 | #endif | |
3047 | }, | |
3048 | { "minh.sn", TILEPRO_OPC_MINH_SN, 0x3, 3, TREG_SN, 1, | |
3049 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
3050 | #ifndef DISASM_ONLY | |
3051 | { | |
3052 | 0x800000007ffc0000ULL, | |
3053 | 0xfffe000000000000ULL, | |
3054 | 0ULL, | |
3055 | 0ULL, | |
3056 | 0ULL | |
3057 | }, | |
3058 | { | |
3059 | 0x0000000008480000ULL, | |
3060 | 0x0c22000000000000ULL, | |
3061 | -1ULL, | |
3062 | -1ULL, | |
3063 | -1ULL | |
3064 | } | |
3065 | #endif | |
3066 | }, | |
3067 | { "minib_u", TILEPRO_OPC_MINIB_U, 0x3, 3, TREG_ZERO, 1, | |
3068 | { { 7, 8, 0 }, { 9, 10, 1 }, { 0, }, { 0, }, { 0, } }, | |
3069 | #ifndef DISASM_ONLY | |
3070 | { | |
3071 | 0x800000007ff00000ULL, | |
3072 | 0xfff8000000000000ULL, | |
3073 | 0ULL, | |
3074 | 0ULL, | |
3075 | 0ULL | |
3076 | }, | |
3077 | { | |
3078 | 0x0000000040600000ULL, | |
3079 | 0x3040000000000000ULL, | |
3080 | -1ULL, | |
3081 | -1ULL, | |
3082 | -1ULL | |
3083 | } | |
3084 | #endif | |
3085 | }, | |
3086 | { "minib_u.sn", TILEPRO_OPC_MINIB_U_SN, 0x3, 3, TREG_SN, 1, | |
3087 | { { 7, 8, 0 }, { 9, 10, 1 }, { 0, }, { 0, }, { 0, } }, | |
3088 | #ifndef DISASM_ONLY | |
3089 | { | |
3090 | 0x800000007ff00000ULL, | |
3091 | 0xfff8000000000000ULL, | |
3092 | 0ULL, | |
3093 | 0ULL, | |
3094 | 0ULL | |
3095 | }, | |
3096 | { | |
3097 | 0x0000000048600000ULL, | |
3098 | 0x3440000000000000ULL, | |
3099 | -1ULL, | |
3100 | -1ULL, | |
3101 | -1ULL | |
3102 | } | |
3103 | #endif | |
3104 | }, | |
3105 | { "minih", TILEPRO_OPC_MINIH, 0x3, 3, TREG_ZERO, 1, | |
3106 | { { 7, 8, 0 }, { 9, 10, 1 }, { 0, }, { 0, }, { 0, } }, | |
3107 | #ifndef DISASM_ONLY | |
3108 | { | |
3109 | 0x800000007ff00000ULL, | |
3110 | 0xfff8000000000000ULL, | |
3111 | 0ULL, | |
3112 | 0ULL, | |
3113 | 0ULL | |
3114 | }, | |
3115 | { | |
3116 | 0x0000000040700000ULL, | |
3117 | 0x3048000000000000ULL, | |
3118 | -1ULL, | |
3119 | -1ULL, | |
3120 | -1ULL | |
3121 | } | |
3122 | #endif | |
3123 | }, | |
3124 | { "minih.sn", TILEPRO_OPC_MINIH_SN, 0x3, 3, TREG_SN, 1, | |
3125 | { { 7, 8, 0 }, { 9, 10, 1 }, { 0, }, { 0, }, { 0, } }, | |
3126 | #ifndef DISASM_ONLY | |
3127 | { | |
3128 | 0x800000007ff00000ULL, | |
3129 | 0xfff8000000000000ULL, | |
3130 | 0ULL, | |
3131 | 0ULL, | |
3132 | 0ULL | |
3133 | }, | |
3134 | { | |
3135 | 0x0000000048700000ULL, | |
3136 | 0x3448000000000000ULL, | |
3137 | -1ULL, | |
3138 | -1ULL, | |
3139 | -1ULL | |
3140 | } | |
3141 | #endif | |
3142 | }, | |
3143 | { "mm", TILEPRO_OPC_MM, 0x3, 5, TREG_ZERO, 1, | |
3144 | { { 7, 8, 16, 26, 27 }, { 9, 10, 17, 28, 29 }, { 0, }, { 0, }, { 0, } }, | |
3145 | #ifndef DISASM_ONLY | |
3146 | { | |
3147 | 0x8000000070000000ULL, | |
3148 | 0xf800000000000000ULL, | |
3149 | 0ULL, | |
3150 | 0ULL, | |
3151 | 0ULL | |
3152 | }, | |
3153 | { | |
3154 | 0x0000000060000000ULL, | |
3155 | 0x3800000000000000ULL, | |
3156 | -1ULL, | |
3157 | -1ULL, | |
3158 | -1ULL | |
3159 | } | |
3160 | #endif | |
3161 | }, | |
3162 | { "mnz", TILEPRO_OPC_MNZ, 0xf, 3, TREG_ZERO, 1, | |
3163 | { { 7, 8, 16 }, { 9, 10, 17 }, { 11, 12, 18 }, { 13, 14, 19 }, { 0, } }, | |
3164 | #ifndef DISASM_ONLY | |
3165 | { | |
3166 | 0x800000007ffc0000ULL, | |
3167 | 0xfffe000000000000ULL, | |
3168 | 0x80000000780c0000ULL, | |
3169 | 0xf806000000000000ULL, | |
3170 | 0ULL | |
3171 | }, | |
3172 | { | |
3173 | 0x0000000000540000ULL, | |
3174 | 0x0828000000000000ULL, | |
3175 | 0x8000000010000000ULL, | |
3176 | 0x9002000000000000ULL, | |
3177 | -1ULL | |
3178 | } | |
3179 | #endif | |
3180 | }, | |
3181 | { "mnz.sn", TILEPRO_OPC_MNZ_SN, 0x3, 3, TREG_SN, 1, | |
3182 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
3183 | #ifndef DISASM_ONLY | |
3184 | { | |
3185 | 0x800000007ffc0000ULL, | |
3186 | 0xfffe000000000000ULL, | |
3187 | 0ULL, | |
3188 | 0ULL, | |
3189 | 0ULL | |
3190 | }, | |
3191 | { | |
3192 | 0x0000000008540000ULL, | |
3193 | 0x0c28000000000000ULL, | |
3194 | -1ULL, | |
3195 | -1ULL, | |
3196 | -1ULL | |
3197 | } | |
3198 | #endif | |
3199 | }, | |
3200 | { "mnzb", TILEPRO_OPC_MNZB, 0x3, 3, TREG_ZERO, 1, | |
3201 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
3202 | #ifndef DISASM_ONLY | |
3203 | { | |
3204 | 0x800000007ffc0000ULL, | |
3205 | 0xfffe000000000000ULL, | |
3206 | 0ULL, | |
3207 | 0ULL, | |
3208 | 0ULL | |
3209 | }, | |
3210 | { | |
3211 | 0x00000000004c0000ULL, | |
3212 | 0x0824000000000000ULL, | |
3213 | -1ULL, | |
3214 | -1ULL, | |
3215 | -1ULL | |
3216 | } | |
3217 | #endif | |
3218 | }, | |
3219 | { "mnzb.sn", TILEPRO_OPC_MNZB_SN, 0x3, 3, TREG_SN, 1, | |
3220 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
3221 | #ifndef DISASM_ONLY | |
3222 | { | |
3223 | 0x800000007ffc0000ULL, | |
3224 | 0xfffe000000000000ULL, | |
3225 | 0ULL, | |
3226 | 0ULL, | |
3227 | 0ULL | |
3228 | }, | |
3229 | { | |
3230 | 0x00000000084c0000ULL, | |
3231 | 0x0c24000000000000ULL, | |
3232 | -1ULL, | |
3233 | -1ULL, | |
3234 | -1ULL | |
3235 | } | |
3236 | #endif | |
3237 | }, | |
3238 | { "mnzh", TILEPRO_OPC_MNZH, 0x3, 3, TREG_ZERO, 1, | |
3239 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
3240 | #ifndef DISASM_ONLY | |
3241 | { | |
3242 | 0x800000007ffc0000ULL, | |
3243 | 0xfffe000000000000ULL, | |
3244 | 0ULL, | |
3245 | 0ULL, | |
3246 | 0ULL | |
3247 | }, | |
3248 | { | |
3249 | 0x0000000000500000ULL, | |
3250 | 0x0826000000000000ULL, | |
3251 | -1ULL, | |
3252 | -1ULL, | |
3253 | -1ULL | |
3254 | } | |
3255 | #endif | |
3256 | }, | |
3257 | { "mnzh.sn", TILEPRO_OPC_MNZH_SN, 0x3, 3, TREG_SN, 1, | |
3258 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
3259 | #ifndef DISASM_ONLY | |
3260 | { | |
3261 | 0x800000007ffc0000ULL, | |
3262 | 0xfffe000000000000ULL, | |
3263 | 0ULL, | |
3264 | 0ULL, | |
3265 | 0ULL | |
3266 | }, | |
3267 | { | |
3268 | 0x0000000008500000ULL, | |
3269 | 0x0c26000000000000ULL, | |
3270 | -1ULL, | |
3271 | -1ULL, | |
3272 | -1ULL | |
3273 | } | |
3274 | #endif | |
3275 | }, | |
3276 | { "mtspr", TILEPRO_OPC_MTSPR, 0x2, 2, TREG_ZERO, 1, | |
3277 | { { 0, }, { 30, 10 }, { 0, }, { 0, }, { 0, } }, | |
3278 | #ifndef DISASM_ONLY | |
3279 | { | |
3280 | 0ULL, | |
3281 | 0xfbf8000000000000ULL, | |
3282 | 0ULL, | |
3283 | 0ULL, | |
3284 | 0ULL | |
3285 | }, | |
3286 | { | |
3287 | -1ULL, | |
3288 | 0x3050000000000000ULL, | |
3289 | -1ULL, | |
3290 | -1ULL, | |
3291 | -1ULL | |
3292 | } | |
3293 | #endif | |
3294 | }, | |
3295 | { "mulhh_ss", TILEPRO_OPC_MULHH_SS, 0x5, 3, TREG_ZERO, 1, | |
3296 | { { 7, 8, 16 }, { 0, }, { 11, 12, 18 }, { 0, }, { 0, } }, | |
3297 | #ifndef DISASM_ONLY | |
3298 | { | |
3299 | 0x800000007ffc0000ULL, | |
3300 | 0ULL, | |
3301 | 0x80000000780c0000ULL, | |
3302 | 0ULL, | |
3303 | 0ULL | |
3304 | }, | |
3305 | { | |
3306 | 0x0000000000680000ULL, | |
3307 | -1ULL, | |
3308 | 0x8000000038000000ULL, | |
3309 | -1ULL, | |
3310 | -1ULL | |
3311 | } | |
3312 | #endif | |
3313 | }, | |
3314 | { "mulhh_ss.sn", TILEPRO_OPC_MULHH_SS_SN, 0x1, 3, TREG_SN, 1, | |
3315 | { { 7, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | |
3316 | #ifndef DISASM_ONLY | |
3317 | { | |
3318 | 0x800000007ffc0000ULL, | |
3319 | 0ULL, | |
3320 | 0ULL, | |
3321 | 0ULL, | |
3322 | 0ULL | |
3323 | }, | |
3324 | { | |
3325 | 0x0000000008680000ULL, | |
3326 | -1ULL, | |
3327 | -1ULL, | |
3328 | -1ULL, | |
3329 | -1ULL | |
3330 | } | |
3331 | #endif | |
3332 | }, | |
3333 | { "mulhh_su", TILEPRO_OPC_MULHH_SU, 0x1, 3, TREG_ZERO, 1, | |
3334 | { { 7, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | |
3335 | #ifndef DISASM_ONLY | |
3336 | { | |
3337 | 0x800000007ffc0000ULL, | |
3338 | 0ULL, | |
3339 | 0ULL, | |
3340 | 0ULL, | |
3341 | 0ULL | |
3342 | }, | |
3343 | { | |
3344 | 0x00000000006c0000ULL, | |
3345 | -1ULL, | |
3346 | -1ULL, | |
3347 | -1ULL, | |
3348 | -1ULL | |
3349 | } | |
3350 | #endif | |
3351 | }, | |
3352 | { "mulhh_su.sn", TILEPRO_OPC_MULHH_SU_SN, 0x1, 3, TREG_SN, 1, | |
3353 | { { 7, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | |
3354 | #ifndef DISASM_ONLY | |
3355 | { | |
3356 | 0x800000007ffc0000ULL, | |
3357 | 0ULL, | |
3358 | 0ULL, | |
3359 | 0ULL, | |
3360 | 0ULL | |
3361 | }, | |
3362 | { | |
3363 | 0x00000000086c0000ULL, | |
3364 | -1ULL, | |
3365 | -1ULL, | |
3366 | -1ULL, | |
3367 | -1ULL | |
3368 | } | |
3369 | #endif | |
3370 | }, | |
3371 | { "mulhh_uu", TILEPRO_OPC_MULHH_UU, 0x5, 3, TREG_ZERO, 1, | |
3372 | { { 7, 8, 16 }, { 0, }, { 11, 12, 18 }, { 0, }, { 0, } }, | |
3373 | #ifndef DISASM_ONLY | |
3374 | { | |
3375 | 0x800000007ffc0000ULL, | |
3376 | 0ULL, | |
3377 | 0x80000000780c0000ULL, | |
3378 | 0ULL, | |
3379 | 0ULL | |
3380 | }, | |
3381 | { | |
3382 | 0x0000000000700000ULL, | |
3383 | -1ULL, | |
3384 | 0x8000000038040000ULL, | |
3385 | -1ULL, | |
3386 | -1ULL | |
3387 | } | |
3388 | #endif | |
3389 | }, | |
3390 | { "mulhh_uu.sn", TILEPRO_OPC_MULHH_UU_SN, 0x1, 3, TREG_SN, 1, | |
3391 | { { 7, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | |
3392 | #ifndef DISASM_ONLY | |
3393 | { | |
3394 | 0x800000007ffc0000ULL, | |
3395 | 0ULL, | |
3396 | 0ULL, | |
3397 | 0ULL, | |
3398 | 0ULL | |
3399 | }, | |
3400 | { | |
3401 | 0x0000000008700000ULL, | |
3402 | -1ULL, | |
3403 | -1ULL, | |
3404 | -1ULL, | |
3405 | -1ULL | |
3406 | } | |
3407 | #endif | |
3408 | }, | |
3409 | { "mulhha_ss", TILEPRO_OPC_MULHHA_SS, 0x5, 3, TREG_ZERO, 1, | |
3410 | { { 21, 8, 16 }, { 0, }, { 31, 12, 18 }, { 0, }, { 0, } }, | |
3411 | #ifndef DISASM_ONLY | |
3412 | { | |
3413 | 0x800000007ffc0000ULL, | |
3414 | 0ULL, | |
3415 | 0x80000000780c0000ULL, | |
3416 | 0ULL, | |
3417 | 0ULL | |
3418 | }, | |
3419 | { | |
3420 | 0x0000000000580000ULL, | |
3421 | -1ULL, | |
3422 | 0x8000000040000000ULL, | |
3423 | -1ULL, | |
3424 | -1ULL | |
3425 | } | |
3426 | #endif | |
3427 | }, | |
3428 | { "mulhha_ss.sn", TILEPRO_OPC_MULHHA_SS_SN, 0x1, 3, TREG_SN, 1, | |
3429 | { { 21, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | |
3430 | #ifndef DISASM_ONLY | |
3431 | { | |
3432 | 0x800000007ffc0000ULL, | |
3433 | 0ULL, | |
3434 | 0ULL, | |
3435 | 0ULL, | |
3436 | 0ULL | |
3437 | }, | |
3438 | { | |
3439 | 0x0000000008580000ULL, | |
3440 | -1ULL, | |
3441 | -1ULL, | |
3442 | -1ULL, | |
3443 | -1ULL | |
3444 | } | |
3445 | #endif | |
3446 | }, | |
3447 | { "mulhha_su", TILEPRO_OPC_MULHHA_SU, 0x1, 3, TREG_ZERO, 1, | |
3448 | { { 21, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | |
3449 | #ifndef DISASM_ONLY | |
3450 | { | |
3451 | 0x800000007ffc0000ULL, | |
3452 | 0ULL, | |
3453 | 0ULL, | |
3454 | 0ULL, | |
3455 | 0ULL | |
3456 | }, | |
3457 | { | |
3458 | 0x00000000005c0000ULL, | |
3459 | -1ULL, | |
3460 | -1ULL, | |
3461 | -1ULL, | |
3462 | -1ULL | |
3463 | } | |
3464 | #endif | |
3465 | }, | |
3466 | { "mulhha_su.sn", TILEPRO_OPC_MULHHA_SU_SN, 0x1, 3, TREG_SN, 1, | |
3467 | { { 21, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | |
3468 | #ifndef DISASM_ONLY | |
3469 | { | |
3470 | 0x800000007ffc0000ULL, | |
3471 | 0ULL, | |
3472 | 0ULL, | |
3473 | 0ULL, | |
3474 | 0ULL | |
3475 | }, | |
3476 | { | |
3477 | 0x00000000085c0000ULL, | |
3478 | -1ULL, | |
3479 | -1ULL, | |
3480 | -1ULL, | |
3481 | -1ULL | |
3482 | } | |
3483 | #endif | |
3484 | }, | |
3485 | { "mulhha_uu", TILEPRO_OPC_MULHHA_UU, 0x5, 3, TREG_ZERO, 1, | |
3486 | { { 21, 8, 16 }, { 0, }, { 31, 12, 18 }, { 0, }, { 0, } }, | |
3487 | #ifndef DISASM_ONLY | |
3488 | { | |
3489 | 0x800000007ffc0000ULL, | |
3490 | 0ULL, | |
3491 | 0x80000000780c0000ULL, | |
3492 | 0ULL, | |
3493 | 0ULL | |
3494 | }, | |
3495 | { | |
3496 | 0x0000000000600000ULL, | |
3497 | -1ULL, | |
3498 | 0x8000000040040000ULL, | |
3499 | -1ULL, | |
3500 | -1ULL | |
3501 | } | |
3502 | #endif | |
3503 | }, | |
3504 | { "mulhha_uu.sn", TILEPRO_OPC_MULHHA_UU_SN, 0x1, 3, TREG_SN, 1, | |
3505 | { { 21, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | |
3506 | #ifndef DISASM_ONLY | |
3507 | { | |
3508 | 0x800000007ffc0000ULL, | |
3509 | 0ULL, | |
3510 | 0ULL, | |
3511 | 0ULL, | |
3512 | 0ULL | |
3513 | }, | |
3514 | { | |
3515 | 0x0000000008600000ULL, | |
3516 | -1ULL, | |
3517 | -1ULL, | |
3518 | -1ULL, | |
3519 | -1ULL | |
3520 | } | |
3521 | #endif | |
3522 | }, | |
3523 | { "mulhhsa_uu", TILEPRO_OPC_MULHHSA_UU, 0x1, 3, TREG_ZERO, 1, | |
3524 | { { 21, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | |
3525 | #ifndef DISASM_ONLY | |
3526 | { | |
3527 | 0x800000007ffc0000ULL, | |
3528 | 0ULL, | |
3529 | 0ULL, | |
3530 | 0ULL, | |
3531 | 0ULL | |
3532 | }, | |
3533 | { | |
3534 | 0x0000000000640000ULL, | |
3535 | -1ULL, | |
3536 | -1ULL, | |
3537 | -1ULL, | |
3538 | -1ULL | |
3539 | } | |
3540 | #endif | |
3541 | }, | |
3542 | { "mulhhsa_uu.sn", TILEPRO_OPC_MULHHSA_UU_SN, 0x1, 3, TREG_SN, 1, | |
3543 | { { 21, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | |
3544 | #ifndef DISASM_ONLY | |
3545 | { | |
3546 | 0x800000007ffc0000ULL, | |
3547 | 0ULL, | |
3548 | 0ULL, | |
3549 | 0ULL, | |
3550 | 0ULL | |
3551 | }, | |
3552 | { | |
3553 | 0x0000000008640000ULL, | |
3554 | -1ULL, | |
3555 | -1ULL, | |
3556 | -1ULL, | |
3557 | -1ULL | |
3558 | } | |
3559 | #endif | |
3560 | }, | |
3561 | { "mulhl_ss", TILEPRO_OPC_MULHL_SS, 0x1, 3, TREG_ZERO, 1, | |
3562 | { { 7, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | |
3563 | #ifndef DISASM_ONLY | |
3564 | { | |
3565 | 0x800000007ffc0000ULL, | |
3566 | 0ULL, | |
3567 | 0ULL, | |
3568 | 0ULL, | |
3569 | 0ULL | |
3570 | }, | |
3571 | { | |
3572 | 0x0000000000880000ULL, | |
3573 | -1ULL, | |
3574 | -1ULL, | |
3575 | -1ULL, | |
3576 | -1ULL | |
3577 | } | |
3578 | #endif | |
3579 | }, | |
3580 | { "mulhl_ss.sn", TILEPRO_OPC_MULHL_SS_SN, 0x1, 3, TREG_SN, 1, | |
3581 | { { 7, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | |
3582 | #ifndef DISASM_ONLY | |
3583 | { | |
3584 | 0x800000007ffc0000ULL, | |
3585 | 0ULL, | |
3586 | 0ULL, | |
3587 | 0ULL, | |
3588 | 0ULL | |
3589 | }, | |
3590 | { | |
3591 | 0x0000000008880000ULL, | |
3592 | -1ULL, | |
3593 | -1ULL, | |
3594 | -1ULL, | |
3595 | -1ULL | |
3596 | } | |
3597 | #endif | |
3598 | }, | |
3599 | { "mulhl_su", TILEPRO_OPC_MULHL_SU, 0x1, 3, TREG_ZERO, 1, | |
3600 | { { 7, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | |
3601 | #ifndef DISASM_ONLY | |
3602 | { | |
3603 | 0x800000007ffc0000ULL, | |
3604 | 0ULL, | |
3605 | 0ULL, | |
3606 | 0ULL, | |
3607 | 0ULL | |
3608 | }, | |
3609 | { | |
3610 | 0x00000000008c0000ULL, | |
3611 | -1ULL, | |
3612 | -1ULL, | |
3613 | -1ULL, | |
3614 | -1ULL | |
3615 | } | |
3616 | #endif | |
3617 | }, | |
3618 | { "mulhl_su.sn", TILEPRO_OPC_MULHL_SU_SN, 0x1, 3, TREG_SN, 1, | |
3619 | { { 7, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | |
3620 | #ifndef DISASM_ONLY | |
3621 | { | |
3622 | 0x800000007ffc0000ULL, | |
3623 | 0ULL, | |
3624 | 0ULL, | |
3625 | 0ULL, | |
3626 | 0ULL | |
3627 | }, | |
3628 | { | |
3629 | 0x00000000088c0000ULL, | |
3630 | -1ULL, | |
3631 | -1ULL, | |
3632 | -1ULL, | |
3633 | -1ULL | |
3634 | } | |
3635 | #endif | |
3636 | }, | |
3637 | { "mulhl_us", TILEPRO_OPC_MULHL_US, 0x1, 3, TREG_ZERO, 1, | |
3638 | { { 7, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | |
3639 | #ifndef DISASM_ONLY | |
3640 | { | |
3641 | 0x800000007ffc0000ULL, | |
3642 | 0ULL, | |
3643 | 0ULL, | |
3644 | 0ULL, | |
3645 | 0ULL | |
3646 | }, | |
3647 | { | |
3648 | 0x0000000000900000ULL, | |
3649 | -1ULL, | |
3650 | -1ULL, | |
3651 | -1ULL, | |
3652 | -1ULL | |
3653 | } | |
3654 | #endif | |
3655 | }, | |
3656 | { "mulhl_us.sn", TILEPRO_OPC_MULHL_US_SN, 0x1, 3, TREG_SN, 1, | |
3657 | { { 7, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | |
3658 | #ifndef DISASM_ONLY | |
3659 | { | |
3660 | 0x800000007ffc0000ULL, | |
3661 | 0ULL, | |
3662 | 0ULL, | |
3663 | 0ULL, | |
3664 | 0ULL | |
3665 | }, | |
3666 | { | |
3667 | 0x0000000008900000ULL, | |
3668 | -1ULL, | |
3669 | -1ULL, | |
3670 | -1ULL, | |
3671 | -1ULL | |
3672 | } | |
3673 | #endif | |
3674 | }, | |
3675 | { "mulhl_uu", TILEPRO_OPC_MULHL_UU, 0x1, 3, TREG_ZERO, 1, | |
3676 | { { 7, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | |
3677 | #ifndef DISASM_ONLY | |
3678 | { | |
3679 | 0x800000007ffc0000ULL, | |
3680 | 0ULL, | |
3681 | 0ULL, | |
3682 | 0ULL, | |
3683 | 0ULL | |
3684 | }, | |
3685 | { | |
3686 | 0x0000000000940000ULL, | |
3687 | -1ULL, | |
3688 | -1ULL, | |
3689 | -1ULL, | |
3690 | -1ULL | |
3691 | } | |
3692 | #endif | |
3693 | }, | |
3694 | { "mulhl_uu.sn", TILEPRO_OPC_MULHL_UU_SN, 0x1, 3, TREG_SN, 1, | |
3695 | { { 7, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | |
3696 | #ifndef DISASM_ONLY | |
3697 | { | |
3698 | 0x800000007ffc0000ULL, | |
3699 | 0ULL, | |
3700 | 0ULL, | |
3701 | 0ULL, | |
3702 | 0ULL | |
3703 | }, | |
3704 | { | |
3705 | 0x0000000008940000ULL, | |
3706 | -1ULL, | |
3707 | -1ULL, | |
3708 | -1ULL, | |
3709 | -1ULL | |
3710 | } | |
3711 | #endif | |
3712 | }, | |
3713 | { "mulhla_ss", TILEPRO_OPC_MULHLA_SS, 0x1, 3, TREG_ZERO, 1, | |
3714 | { { 21, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | |
3715 | #ifndef DISASM_ONLY | |
3716 | { | |
3717 | 0x800000007ffc0000ULL, | |
3718 | 0ULL, | |
3719 | 0ULL, | |
3720 | 0ULL, | |
3721 | 0ULL | |
3722 | }, | |
3723 | { | |
3724 | 0x0000000000740000ULL, | |
3725 | -1ULL, | |
3726 | -1ULL, | |
3727 | -1ULL, | |
3728 | -1ULL | |
3729 | } | |
3730 | #endif | |
3731 | }, | |
3732 | { "mulhla_ss.sn", TILEPRO_OPC_MULHLA_SS_SN, 0x1, 3, TREG_SN, 1, | |
3733 | { { 21, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | |
3734 | #ifndef DISASM_ONLY | |
3735 | { | |
3736 | 0x800000007ffc0000ULL, | |
3737 | 0ULL, | |
3738 | 0ULL, | |
3739 | 0ULL, | |
3740 | 0ULL | |
3741 | }, | |
3742 | { | |
3743 | 0x0000000008740000ULL, | |
3744 | -1ULL, | |
3745 | -1ULL, | |
3746 | -1ULL, | |
3747 | -1ULL | |
3748 | } | |
3749 | #endif | |
3750 | }, | |
3751 | { "mulhla_su", TILEPRO_OPC_MULHLA_SU, 0x1, 3, TREG_ZERO, 1, | |
3752 | { { 21, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | |
3753 | #ifndef DISASM_ONLY | |
3754 | { | |
3755 | 0x800000007ffc0000ULL, | |
3756 | 0ULL, | |
3757 | 0ULL, | |
3758 | 0ULL, | |
3759 | 0ULL | |
3760 | }, | |
3761 | { | |
3762 | 0x0000000000780000ULL, | |
3763 | -1ULL, | |
3764 | -1ULL, | |
3765 | -1ULL, | |
3766 | -1ULL | |
3767 | } | |
3768 | #endif | |
3769 | }, | |
3770 | { "mulhla_su.sn", TILEPRO_OPC_MULHLA_SU_SN, 0x1, 3, TREG_SN, 1, | |
3771 | { { 21, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | |
3772 | #ifndef DISASM_ONLY | |
3773 | { | |
3774 | 0x800000007ffc0000ULL, | |
3775 | 0ULL, | |
3776 | 0ULL, | |
3777 | 0ULL, | |
3778 | 0ULL | |
3779 | }, | |
3780 | { | |
3781 | 0x0000000008780000ULL, | |
3782 | -1ULL, | |
3783 | -1ULL, | |
3784 | -1ULL, | |
3785 | -1ULL | |
3786 | } | |
3787 | #endif | |
3788 | }, | |
3789 | { "mulhla_us", TILEPRO_OPC_MULHLA_US, 0x1, 3, TREG_ZERO, 1, | |
3790 | { { 21, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | |
3791 | #ifndef DISASM_ONLY | |
3792 | { | |
3793 | 0x800000007ffc0000ULL, | |
3794 | 0ULL, | |
3795 | 0ULL, | |
3796 | 0ULL, | |
3797 | 0ULL | |
3798 | }, | |
3799 | { | |
3800 | 0x00000000007c0000ULL, | |
3801 | -1ULL, | |
3802 | -1ULL, | |
3803 | -1ULL, | |
3804 | -1ULL | |
3805 | } | |
3806 | #endif | |
3807 | }, | |
3808 | { "mulhla_us.sn", TILEPRO_OPC_MULHLA_US_SN, 0x1, 3, TREG_SN, 1, | |
3809 | { { 21, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | |
3810 | #ifndef DISASM_ONLY | |
3811 | { | |
3812 | 0x800000007ffc0000ULL, | |
3813 | 0ULL, | |
3814 | 0ULL, | |
3815 | 0ULL, | |
3816 | 0ULL | |
3817 | }, | |
3818 | { | |
3819 | 0x00000000087c0000ULL, | |
3820 | -1ULL, | |
3821 | -1ULL, | |
3822 | -1ULL, | |
3823 | -1ULL | |
3824 | } | |
3825 | #endif | |
3826 | }, | |
3827 | { "mulhla_uu", TILEPRO_OPC_MULHLA_UU, 0x1, 3, TREG_ZERO, 1, | |
3828 | { { 21, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | |
3829 | #ifndef DISASM_ONLY | |
3830 | { | |
3831 | 0x800000007ffc0000ULL, | |
3832 | 0ULL, | |
3833 | 0ULL, | |
3834 | 0ULL, | |
3835 | 0ULL | |
3836 | }, | |
3837 | { | |
3838 | 0x0000000000800000ULL, | |
3839 | -1ULL, | |
3840 | -1ULL, | |
3841 | -1ULL, | |
3842 | -1ULL | |
3843 | } | |
3844 | #endif | |
3845 | }, | |
3846 | { "mulhla_uu.sn", TILEPRO_OPC_MULHLA_UU_SN, 0x1, 3, TREG_SN, 1, | |
3847 | { { 21, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | |
3848 | #ifndef DISASM_ONLY | |
3849 | { | |
3850 | 0x800000007ffc0000ULL, | |
3851 | 0ULL, | |
3852 | 0ULL, | |
3853 | 0ULL, | |
3854 | 0ULL | |
3855 | }, | |
3856 | { | |
3857 | 0x0000000008800000ULL, | |
3858 | -1ULL, | |
3859 | -1ULL, | |
3860 | -1ULL, | |
3861 | -1ULL | |
3862 | } | |
3863 | #endif | |
3864 | }, | |
3865 | { "mulhlsa_uu", TILEPRO_OPC_MULHLSA_UU, 0x5, 3, TREG_ZERO, 1, | |
3866 | { { 21, 8, 16 }, { 0, }, { 31, 12, 18 }, { 0, }, { 0, } }, | |
3867 | #ifndef DISASM_ONLY | |
3868 | { | |
3869 | 0x800000007ffc0000ULL, | |
3870 | 0ULL, | |
3871 | 0x80000000780c0000ULL, | |
3872 | 0ULL, | |
3873 | 0ULL | |
3874 | }, | |
3875 | { | |
3876 | 0x0000000000840000ULL, | |
3877 | -1ULL, | |
3878 | 0x8000000030000000ULL, | |
3879 | -1ULL, | |
3880 | -1ULL | |
3881 | } | |
3882 | #endif | |
3883 | }, | |
3884 | { "mulhlsa_uu.sn", TILEPRO_OPC_MULHLSA_UU_SN, 0x1, 3, TREG_SN, 1, | |
3885 | { { 21, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | |
3886 | #ifndef DISASM_ONLY | |
3887 | { | |
3888 | 0x800000007ffc0000ULL, | |
3889 | 0ULL, | |
3890 | 0ULL, | |
3891 | 0ULL, | |
3892 | 0ULL | |
3893 | }, | |
3894 | { | |
3895 | 0x0000000008840000ULL, | |
3896 | -1ULL, | |
3897 | -1ULL, | |
3898 | -1ULL, | |
3899 | -1ULL | |
3900 | } | |
3901 | #endif | |
3902 | }, | |
3903 | { "mulll_ss", TILEPRO_OPC_MULLL_SS, 0x5, 3, TREG_ZERO, 1, | |
3904 | { { 7, 8, 16 }, { 0, }, { 11, 12, 18 }, { 0, }, { 0, } }, | |
3905 | #ifndef DISASM_ONLY | |
3906 | { | |
3907 | 0x800000007ffc0000ULL, | |
3908 | 0ULL, | |
3909 | 0x80000000780c0000ULL, | |
3910 | 0ULL, | |
3911 | 0ULL | |
3912 | }, | |
3913 | { | |
3914 | 0x0000000000a80000ULL, | |
3915 | -1ULL, | |
3916 | 0x8000000038080000ULL, | |
3917 | -1ULL, | |
3918 | -1ULL | |
3919 | } | |
3920 | #endif | |
3921 | }, | |
3922 | { "mulll_ss.sn", TILEPRO_OPC_MULLL_SS_SN, 0x1, 3, TREG_SN, 1, | |
3923 | { { 7, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | |
3924 | #ifndef DISASM_ONLY | |
3925 | { | |
3926 | 0x800000007ffc0000ULL, | |
3927 | 0ULL, | |
3928 | 0ULL, | |
3929 | 0ULL, | |
3930 | 0ULL | |
3931 | }, | |
3932 | { | |
3933 | 0x0000000008a80000ULL, | |
3934 | -1ULL, | |
3935 | -1ULL, | |
3936 | -1ULL, | |
3937 | -1ULL | |
3938 | } | |
3939 | #endif | |
3940 | }, | |
3941 | { "mulll_su", TILEPRO_OPC_MULLL_SU, 0x1, 3, TREG_ZERO, 1, | |
3942 | { { 7, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | |
3943 | #ifndef DISASM_ONLY | |
3944 | { | |
3945 | 0x800000007ffc0000ULL, | |
3946 | 0ULL, | |
3947 | 0ULL, | |
3948 | 0ULL, | |
3949 | 0ULL | |
3950 | }, | |
3951 | { | |
3952 | 0x0000000000ac0000ULL, | |
3953 | -1ULL, | |
3954 | -1ULL, | |
3955 | -1ULL, | |
3956 | -1ULL | |
3957 | } | |
3958 | #endif | |
3959 | }, | |
3960 | { "mulll_su.sn", TILEPRO_OPC_MULLL_SU_SN, 0x1, 3, TREG_SN, 1, | |
3961 | { { 7, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | |
3962 | #ifndef DISASM_ONLY | |
3963 | { | |
3964 | 0x800000007ffc0000ULL, | |
3965 | 0ULL, | |
3966 | 0ULL, | |
3967 | 0ULL, | |
3968 | 0ULL | |
3969 | }, | |
3970 | { | |
3971 | 0x0000000008ac0000ULL, | |
3972 | -1ULL, | |
3973 | -1ULL, | |
3974 | -1ULL, | |
3975 | -1ULL | |
3976 | } | |
3977 | #endif | |
3978 | }, | |
3979 | { "mulll_uu", TILEPRO_OPC_MULLL_UU, 0x5, 3, TREG_ZERO, 1, | |
3980 | { { 7, 8, 16 }, { 0, }, { 11, 12, 18 }, { 0, }, { 0, } }, | |
3981 | #ifndef DISASM_ONLY | |
3982 | { | |
3983 | 0x800000007ffc0000ULL, | |
3984 | 0ULL, | |
3985 | 0x80000000780c0000ULL, | |
3986 | 0ULL, | |
3987 | 0ULL | |
3988 | }, | |
3989 | { | |
3990 | 0x0000000000b00000ULL, | |
3991 | -1ULL, | |
3992 | 0x80000000380c0000ULL, | |
3993 | -1ULL, | |
3994 | -1ULL | |
3995 | } | |
3996 | #endif | |
3997 | }, | |
3998 | { "mulll_uu.sn", TILEPRO_OPC_MULLL_UU_SN, 0x1, 3, TREG_SN, 1, | |
3999 | { { 7, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | |
4000 | #ifndef DISASM_ONLY | |
4001 | { | |
4002 | 0x800000007ffc0000ULL, | |
4003 | 0ULL, | |
4004 | 0ULL, | |
4005 | 0ULL, | |
4006 | 0ULL | |
4007 | }, | |
4008 | { | |
4009 | 0x0000000008b00000ULL, | |
4010 | -1ULL, | |
4011 | -1ULL, | |
4012 | -1ULL, | |
4013 | -1ULL | |
4014 | } | |
4015 | #endif | |
4016 | }, | |
4017 | { "mullla_ss", TILEPRO_OPC_MULLLA_SS, 0x5, 3, TREG_ZERO, 1, | |
4018 | { { 21, 8, 16 }, { 0, }, { 31, 12, 18 }, { 0, }, { 0, } }, | |
4019 | #ifndef DISASM_ONLY | |
4020 | { | |
4021 | 0x800000007ffc0000ULL, | |
4022 | 0ULL, | |
4023 | 0x80000000780c0000ULL, | |
4024 | 0ULL, | |
4025 | 0ULL | |
4026 | }, | |
4027 | { | |
4028 | 0x0000000000980000ULL, | |
4029 | -1ULL, | |
4030 | 0x8000000040080000ULL, | |
4031 | -1ULL, | |
4032 | -1ULL | |
4033 | } | |
4034 | #endif | |
4035 | }, | |
4036 | { "mullla_ss.sn", TILEPRO_OPC_MULLLA_SS_SN, 0x1, 3, TREG_SN, 1, | |
4037 | { { 21, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | |
4038 | #ifndef DISASM_ONLY | |
4039 | { | |
4040 | 0x800000007ffc0000ULL, | |
4041 | 0ULL, | |
4042 | 0ULL, | |
4043 | 0ULL, | |
4044 | 0ULL | |
4045 | }, | |
4046 | { | |
4047 | 0x0000000008980000ULL, | |
4048 | -1ULL, | |
4049 | -1ULL, | |
4050 | -1ULL, | |
4051 | -1ULL | |
4052 | } | |
4053 | #endif | |
4054 | }, | |
4055 | { "mullla_su", TILEPRO_OPC_MULLLA_SU, 0x1, 3, TREG_ZERO, 1, | |
4056 | { { 21, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | |
4057 | #ifndef DISASM_ONLY | |
4058 | { | |
4059 | 0x800000007ffc0000ULL, | |
4060 | 0ULL, | |
4061 | 0ULL, | |
4062 | 0ULL, | |
4063 | 0ULL | |
4064 | }, | |
4065 | { | |
4066 | 0x00000000009c0000ULL, | |
4067 | -1ULL, | |
4068 | -1ULL, | |
4069 | -1ULL, | |
4070 | -1ULL | |
4071 | } | |
4072 | #endif | |
4073 | }, | |
4074 | { "mullla_su.sn", TILEPRO_OPC_MULLLA_SU_SN, 0x1, 3, TREG_SN, 1, | |
4075 | { { 21, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | |
4076 | #ifndef DISASM_ONLY | |
4077 | { | |
4078 | 0x800000007ffc0000ULL, | |
4079 | 0ULL, | |
4080 | 0ULL, | |
4081 | 0ULL, | |
4082 | 0ULL | |
4083 | }, | |
4084 | { | |
4085 | 0x00000000089c0000ULL, | |
4086 | -1ULL, | |
4087 | -1ULL, | |
4088 | -1ULL, | |
4089 | -1ULL | |
4090 | } | |
4091 | #endif | |
4092 | }, | |
4093 | { "mullla_uu", TILEPRO_OPC_MULLLA_UU, 0x5, 3, TREG_ZERO, 1, | |
4094 | { { 21, 8, 16 }, { 0, }, { 31, 12, 18 }, { 0, }, { 0, } }, | |
4095 | #ifndef DISASM_ONLY | |
4096 | { | |
4097 | 0x800000007ffc0000ULL, | |
4098 | 0ULL, | |
4099 | 0x80000000780c0000ULL, | |
4100 | 0ULL, | |
4101 | 0ULL | |
4102 | }, | |
4103 | { | |
4104 | 0x0000000000a00000ULL, | |
4105 | -1ULL, | |
4106 | 0x80000000400c0000ULL, | |
4107 | -1ULL, | |
4108 | -1ULL | |
4109 | } | |
4110 | #endif | |
4111 | }, | |
4112 | { "mullla_uu.sn", TILEPRO_OPC_MULLLA_UU_SN, 0x1, 3, TREG_SN, 1, | |
4113 | { { 21, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | |
4114 | #ifndef DISASM_ONLY | |
4115 | { | |
4116 | 0x800000007ffc0000ULL, | |
4117 | 0ULL, | |
4118 | 0ULL, | |
4119 | 0ULL, | |
4120 | 0ULL | |
4121 | }, | |
4122 | { | |
4123 | 0x0000000008a00000ULL, | |
4124 | -1ULL, | |
4125 | -1ULL, | |
4126 | -1ULL, | |
4127 | -1ULL | |
4128 | } | |
4129 | #endif | |
4130 | }, | |
4131 | { "mulllsa_uu", TILEPRO_OPC_MULLLSA_UU, 0x1, 3, TREG_ZERO, 1, | |
4132 | { { 21, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | |
4133 | #ifndef DISASM_ONLY | |
4134 | { | |
4135 | 0x800000007ffc0000ULL, | |
4136 | 0ULL, | |
4137 | 0ULL, | |
4138 | 0ULL, | |
4139 | 0ULL | |
4140 | }, | |
4141 | { | |
4142 | 0x0000000000a40000ULL, | |
4143 | -1ULL, | |
4144 | -1ULL, | |
4145 | -1ULL, | |
4146 | -1ULL | |
4147 | } | |
4148 | #endif | |
4149 | }, | |
4150 | { "mulllsa_uu.sn", TILEPRO_OPC_MULLLSA_UU_SN, 0x1, 3, TREG_SN, 1, | |
4151 | { { 21, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | |
4152 | #ifndef DISASM_ONLY | |
4153 | { | |
4154 | 0x800000007ffc0000ULL, | |
4155 | 0ULL, | |
4156 | 0ULL, | |
4157 | 0ULL, | |
4158 | 0ULL | |
4159 | }, | |
4160 | { | |
4161 | 0x0000000008a40000ULL, | |
4162 | -1ULL, | |
4163 | -1ULL, | |
4164 | -1ULL, | |
4165 | -1ULL | |
4166 | } | |
4167 | #endif | |
4168 | }, | |
4169 | { "mvnz", TILEPRO_OPC_MVNZ, 0x5, 3, TREG_ZERO, 1, | |
4170 | { { 21, 8, 16 }, { 0, }, { 31, 12, 18 }, { 0, }, { 0, } }, | |
4171 | #ifndef DISASM_ONLY | |
4172 | { | |
4173 | 0x800000007ffc0000ULL, | |
4174 | 0ULL, | |
4175 | 0x80000000780c0000ULL, | |
4176 | 0ULL, | |
4177 | 0ULL | |
4178 | }, | |
4179 | { | |
4180 | 0x0000000000b40000ULL, | |
4181 | -1ULL, | |
4182 | 0x8000000010040000ULL, | |
4183 | -1ULL, | |
4184 | -1ULL | |
4185 | } | |
4186 | #endif | |
4187 | }, | |
4188 | { "mvnz.sn", TILEPRO_OPC_MVNZ_SN, 0x1, 3, TREG_SN, 1, | |
4189 | { { 21, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | |
4190 | #ifndef DISASM_ONLY | |
4191 | { | |
4192 | 0x800000007ffc0000ULL, | |
4193 | 0ULL, | |
4194 | 0ULL, | |
4195 | 0ULL, | |
4196 | 0ULL | |
4197 | }, | |
4198 | { | |
4199 | 0x0000000008b40000ULL, | |
4200 | -1ULL, | |
4201 | -1ULL, | |
4202 | -1ULL, | |
4203 | -1ULL | |
4204 | } | |
4205 | #endif | |
4206 | }, | |
4207 | { "mvz", TILEPRO_OPC_MVZ, 0x5, 3, TREG_ZERO, 1, | |
4208 | { { 21, 8, 16 }, { 0, }, { 31, 12, 18 }, { 0, }, { 0, } }, | |
4209 | #ifndef DISASM_ONLY | |
4210 | { | |
4211 | 0x800000007ffc0000ULL, | |
4212 | 0ULL, | |
4213 | 0x80000000780c0000ULL, | |
4214 | 0ULL, | |
4215 | 0ULL | |
4216 | }, | |
4217 | { | |
4218 | 0x0000000000b80000ULL, | |
4219 | -1ULL, | |
4220 | 0x8000000010080000ULL, | |
4221 | -1ULL, | |
4222 | -1ULL | |
4223 | } | |
4224 | #endif | |
4225 | }, | |
4226 | { "mvz.sn", TILEPRO_OPC_MVZ_SN, 0x1, 3, TREG_SN, 1, | |
4227 | { { 21, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | |
4228 | #ifndef DISASM_ONLY | |
4229 | { | |
4230 | 0x800000007ffc0000ULL, | |
4231 | 0ULL, | |
4232 | 0ULL, | |
4233 | 0ULL, | |
4234 | 0ULL | |
4235 | }, | |
4236 | { | |
4237 | 0x0000000008b80000ULL, | |
4238 | -1ULL, | |
4239 | -1ULL, | |
4240 | -1ULL, | |
4241 | -1ULL | |
4242 | } | |
4243 | #endif | |
4244 | }, | |
4245 | { "mz", TILEPRO_OPC_MZ, 0xf, 3, TREG_ZERO, 1, | |
4246 | { { 7, 8, 16 }, { 9, 10, 17 }, { 11, 12, 18 }, { 13, 14, 19 }, { 0, } }, | |
4247 | #ifndef DISASM_ONLY | |
4248 | { | |
4249 | 0x800000007ffc0000ULL, | |
4250 | 0xfffe000000000000ULL, | |
4251 | 0x80000000780c0000ULL, | |
4252 | 0xf806000000000000ULL, | |
4253 | 0ULL | |
4254 | }, | |
4255 | { | |
4256 | 0x0000000000c40000ULL, | |
4257 | 0x082e000000000000ULL, | |
4258 | 0x80000000100c0000ULL, | |
4259 | 0x9004000000000000ULL, | |
4260 | -1ULL | |
4261 | } | |
4262 | #endif | |
4263 | }, | |
4264 | { "mz.sn", TILEPRO_OPC_MZ_SN, 0x3, 3, TREG_SN, 1, | |
4265 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
4266 | #ifndef DISASM_ONLY | |
4267 | { | |
4268 | 0x800000007ffc0000ULL, | |
4269 | 0xfffe000000000000ULL, | |
4270 | 0ULL, | |
4271 | 0ULL, | |
4272 | 0ULL | |
4273 | }, | |
4274 | { | |
4275 | 0x0000000008c40000ULL, | |
4276 | 0x0c2e000000000000ULL, | |
4277 | -1ULL, | |
4278 | -1ULL, | |
4279 | -1ULL | |
4280 | } | |
4281 | #endif | |
4282 | }, | |
4283 | { "mzb", TILEPRO_OPC_MZB, 0x3, 3, TREG_ZERO, 1, | |
4284 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
4285 | #ifndef DISASM_ONLY | |
4286 | { | |
4287 | 0x800000007ffc0000ULL, | |
4288 | 0xfffe000000000000ULL, | |
4289 | 0ULL, | |
4290 | 0ULL, | |
4291 | 0ULL | |
4292 | }, | |
4293 | { | |
4294 | 0x0000000000bc0000ULL, | |
4295 | 0x082a000000000000ULL, | |
4296 | -1ULL, | |
4297 | -1ULL, | |
4298 | -1ULL | |
4299 | } | |
4300 | #endif | |
4301 | }, | |
4302 | { "mzb.sn", TILEPRO_OPC_MZB_SN, 0x3, 3, TREG_SN, 1, | |
4303 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
4304 | #ifndef DISASM_ONLY | |
4305 | { | |
4306 | 0x800000007ffc0000ULL, | |
4307 | 0xfffe000000000000ULL, | |
4308 | 0ULL, | |
4309 | 0ULL, | |
4310 | 0ULL | |
4311 | }, | |
4312 | { | |
4313 | 0x0000000008bc0000ULL, | |
4314 | 0x0c2a000000000000ULL, | |
4315 | -1ULL, | |
4316 | -1ULL, | |
4317 | -1ULL | |
4318 | } | |
4319 | #endif | |
4320 | }, | |
4321 | { "mzh", TILEPRO_OPC_MZH, 0x3, 3, TREG_ZERO, 1, | |
4322 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
4323 | #ifndef DISASM_ONLY | |
4324 | { | |
4325 | 0x800000007ffc0000ULL, | |
4326 | 0xfffe000000000000ULL, | |
4327 | 0ULL, | |
4328 | 0ULL, | |
4329 | 0ULL | |
4330 | }, | |
4331 | { | |
4332 | 0x0000000000c00000ULL, | |
4333 | 0x082c000000000000ULL, | |
4334 | -1ULL, | |
4335 | -1ULL, | |
4336 | -1ULL | |
4337 | } | |
4338 | #endif | |
4339 | }, | |
4340 | { "mzh.sn", TILEPRO_OPC_MZH_SN, 0x3, 3, TREG_SN, 1, | |
4341 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
4342 | #ifndef DISASM_ONLY | |
4343 | { | |
4344 | 0x800000007ffc0000ULL, | |
4345 | 0xfffe000000000000ULL, | |
4346 | 0ULL, | |
4347 | 0ULL, | |
4348 | 0ULL | |
4349 | }, | |
4350 | { | |
4351 | 0x0000000008c00000ULL, | |
4352 | 0x0c2c000000000000ULL, | |
4353 | -1ULL, | |
4354 | -1ULL, | |
4355 | -1ULL | |
4356 | } | |
4357 | #endif | |
4358 | }, | |
4359 | { "nap", TILEPRO_OPC_NAP, 0x2, 0, TREG_ZERO, 0, | |
4360 | { { 0, }, { }, { 0, }, { 0, }, { 0, } }, | |
4361 | #ifndef DISASM_ONLY | |
4362 | { | |
4363 | 0ULL, | |
4364 | 0xfbfff80000000000ULL, | |
4365 | 0ULL, | |
4366 | 0ULL, | |
4367 | 0ULL | |
4368 | }, | |
4369 | { | |
4370 | -1ULL, | |
4371 | 0x400b800000000000ULL, | |
4372 | -1ULL, | |
4373 | -1ULL, | |
4374 | -1ULL | |
4375 | } | |
4376 | #endif | |
4377 | }, | |
4378 | { "nop", TILEPRO_OPC_NOP, 0xf, 0, TREG_ZERO, 1, | |
4379 | { { }, { }, { }, { }, { 0, } }, | |
4380 | #ifndef DISASM_ONLY | |
4381 | { | |
4382 | 0x8000000077fff000ULL, | |
4383 | 0xfbfff80000000000ULL, | |
4384 | 0x80000000780ff000ULL, | |
4385 | 0xf807f80000000000ULL, | |
4386 | 0ULL | |
4387 | }, | |
4388 | { | |
4389 | 0x0000000070166000ULL, | |
4390 | 0x400b880000000000ULL, | |
4391 | 0x80000000680a6000ULL, | |
4392 | 0xd805180000000000ULL, | |
4393 | -1ULL | |
4394 | } | |
4395 | #endif | |
4396 | }, | |
4397 | { "nor", TILEPRO_OPC_NOR, 0xf, 3, TREG_ZERO, 1, | |
4398 | { { 7, 8, 16 }, { 9, 10, 17 }, { 11, 12, 18 }, { 13, 14, 19 }, { 0, } }, | |
4399 | #ifndef DISASM_ONLY | |
4400 | { | |
4401 | 0x800000007ffc0000ULL, | |
4402 | 0xfffe000000000000ULL, | |
4403 | 0x80000000780c0000ULL, | |
4404 | 0xf806000000000000ULL, | |
4405 | 0ULL | |
4406 | }, | |
4407 | { | |
4408 | 0x0000000000c80000ULL, | |
4409 | 0x0830000000000000ULL, | |
4410 | 0x8000000018040000ULL, | |
4411 | 0x9802000000000000ULL, | |
4412 | -1ULL | |
4413 | } | |
4414 | #endif | |
4415 | }, | |
4416 | { "nor.sn", TILEPRO_OPC_NOR_SN, 0x3, 3, TREG_SN, 1, | |
4417 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
4418 | #ifndef DISASM_ONLY | |
4419 | { | |
4420 | 0x800000007ffc0000ULL, | |
4421 | 0xfffe000000000000ULL, | |
4422 | 0ULL, | |
4423 | 0ULL, | |
4424 | 0ULL | |
4425 | }, | |
4426 | { | |
4427 | 0x0000000008c80000ULL, | |
4428 | 0x0c30000000000000ULL, | |
4429 | -1ULL, | |
4430 | -1ULL, | |
4431 | -1ULL | |
4432 | } | |
4433 | #endif | |
4434 | }, | |
4435 | { "or", TILEPRO_OPC_OR, 0xf, 3, TREG_ZERO, 1, | |
4436 | { { 7, 8, 16 }, { 9, 10, 17 }, { 11, 12, 18 }, { 13, 14, 19 }, { 0, } }, | |
4437 | #ifndef DISASM_ONLY | |
4438 | { | |
4439 | 0x800000007ffc0000ULL, | |
4440 | 0xfffe000000000000ULL, | |
4441 | 0x80000000780c0000ULL, | |
4442 | 0xf806000000000000ULL, | |
4443 | 0ULL | |
4444 | }, | |
4445 | { | |
4446 | 0x0000000000cc0000ULL, | |
4447 | 0x0832000000000000ULL, | |
4448 | 0x8000000018080000ULL, | |
4449 | 0x9804000000000000ULL, | |
4450 | -1ULL | |
4451 | } | |
4452 | #endif | |
4453 | }, | |
4454 | { "or.sn", TILEPRO_OPC_OR_SN, 0x3, 3, TREG_SN, 1, | |
4455 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
4456 | #ifndef DISASM_ONLY | |
4457 | { | |
4458 | 0x800000007ffc0000ULL, | |
4459 | 0xfffe000000000000ULL, | |
4460 | 0ULL, | |
4461 | 0ULL, | |
4462 | 0ULL | |
4463 | }, | |
4464 | { | |
4465 | 0x0000000008cc0000ULL, | |
4466 | 0x0c32000000000000ULL, | |
4467 | -1ULL, | |
4468 | -1ULL, | |
4469 | -1ULL | |
4470 | } | |
4471 | #endif | |
4472 | }, | |
4473 | { "ori", TILEPRO_OPC_ORI, 0xf, 3, TREG_ZERO, 1, | |
4474 | { { 7, 8, 0 }, { 9, 10, 1 }, { 11, 12, 2 }, { 13, 14, 3 }, { 0, } }, | |
4475 | #ifndef DISASM_ONLY | |
4476 | { | |
4477 | 0x800000007ff00000ULL, | |
4478 | 0xfff8000000000000ULL, | |
4479 | 0x8000000078000000ULL, | |
4480 | 0xf800000000000000ULL, | |
4481 | 0ULL | |
4482 | }, | |
4483 | { | |
4484 | 0x0000000040800000ULL, | |
4485 | 0x3058000000000000ULL, | |
4486 | 0x8000000058000000ULL, | |
4487 | 0xc800000000000000ULL, | |
4488 | -1ULL | |
4489 | } | |
4490 | #endif | |
4491 | }, | |
4492 | { "ori.sn", TILEPRO_OPC_ORI_SN, 0x3, 3, TREG_SN, 1, | |
4493 | { { 7, 8, 0 }, { 9, 10, 1 }, { 0, }, { 0, }, { 0, } }, | |
4494 | #ifndef DISASM_ONLY | |
4495 | { | |
4496 | 0x800000007ff00000ULL, | |
4497 | 0xfff8000000000000ULL, | |
4498 | 0ULL, | |
4499 | 0ULL, | |
4500 | 0ULL | |
4501 | }, | |
4502 | { | |
4503 | 0x0000000048800000ULL, | |
4504 | 0x3458000000000000ULL, | |
4505 | -1ULL, | |
4506 | -1ULL, | |
4507 | -1ULL | |
4508 | } | |
4509 | #endif | |
4510 | }, | |
4511 | { "packbs_u", TILEPRO_OPC_PACKBS_U, 0x3, 3, TREG_ZERO, 1, | |
4512 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
4513 | #ifndef DISASM_ONLY | |
4514 | { | |
4515 | 0x800000007ffc0000ULL, | |
4516 | 0xfffe000000000000ULL, | |
4517 | 0ULL, | |
4518 | 0ULL, | |
4519 | 0ULL | |
4520 | }, | |
4521 | { | |
4522 | 0x00000000019c0000ULL, | |
4523 | 0x0892000000000000ULL, | |
4524 | -1ULL, | |
4525 | -1ULL, | |
4526 | -1ULL | |
4527 | } | |
4528 | #endif | |
4529 | }, | |
4530 | { "packbs_u.sn", TILEPRO_OPC_PACKBS_U_SN, 0x3, 3, TREG_SN, 1, | |
4531 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
4532 | #ifndef DISASM_ONLY | |
4533 | { | |
4534 | 0x800000007ffc0000ULL, | |
4535 | 0xfffe000000000000ULL, | |
4536 | 0ULL, | |
4537 | 0ULL, | |
4538 | 0ULL | |
4539 | }, | |
4540 | { | |
4541 | 0x00000000099c0000ULL, | |
4542 | 0x0c92000000000000ULL, | |
4543 | -1ULL, | |
4544 | -1ULL, | |
4545 | -1ULL | |
4546 | } | |
4547 | #endif | |
4548 | }, | |
4549 | { "packhb", TILEPRO_OPC_PACKHB, 0x3, 3, TREG_ZERO, 1, | |
4550 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
4551 | #ifndef DISASM_ONLY | |
4552 | { | |
4553 | 0x800000007ffc0000ULL, | |
4554 | 0xfffe000000000000ULL, | |
4555 | 0ULL, | |
4556 | 0ULL, | |
4557 | 0ULL | |
4558 | }, | |
4559 | { | |
4560 | 0x0000000000d00000ULL, | |
4561 | 0x0834000000000000ULL, | |
4562 | -1ULL, | |
4563 | -1ULL, | |
4564 | -1ULL | |
4565 | } | |
4566 | #endif | |
4567 | }, | |
4568 | { "packhb.sn", TILEPRO_OPC_PACKHB_SN, 0x3, 3, TREG_SN, 1, | |
4569 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
4570 | #ifndef DISASM_ONLY | |
4571 | { | |
4572 | 0x800000007ffc0000ULL, | |
4573 | 0xfffe000000000000ULL, | |
4574 | 0ULL, | |
4575 | 0ULL, | |
4576 | 0ULL | |
4577 | }, | |
4578 | { | |
4579 | 0x0000000008d00000ULL, | |
4580 | 0x0c34000000000000ULL, | |
4581 | -1ULL, | |
4582 | -1ULL, | |
4583 | -1ULL | |
4584 | } | |
4585 | #endif | |
4586 | }, | |
4587 | { "packhs", TILEPRO_OPC_PACKHS, 0x3, 3, TREG_ZERO, 1, | |
4588 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
4589 | #ifndef DISASM_ONLY | |
4590 | { | |
4591 | 0x800000007ffc0000ULL, | |
4592 | 0xfffe000000000000ULL, | |
4593 | 0ULL, | |
4594 | 0ULL, | |
4595 | 0ULL | |
4596 | }, | |
4597 | { | |
4598 | 0x0000000001980000ULL, | |
4599 | 0x0890000000000000ULL, | |
4600 | -1ULL, | |
4601 | -1ULL, | |
4602 | -1ULL | |
4603 | } | |
4604 | #endif | |
4605 | }, | |
4606 | { "packhs.sn", TILEPRO_OPC_PACKHS_SN, 0x3, 3, TREG_SN, 1, | |
4607 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
4608 | #ifndef DISASM_ONLY | |
4609 | { | |
4610 | 0x800000007ffc0000ULL, | |
4611 | 0xfffe000000000000ULL, | |
4612 | 0ULL, | |
4613 | 0ULL, | |
4614 | 0ULL | |
4615 | }, | |
4616 | { | |
4617 | 0x0000000009980000ULL, | |
4618 | 0x0c90000000000000ULL, | |
4619 | -1ULL, | |
4620 | -1ULL, | |
4621 | -1ULL | |
4622 | } | |
4623 | #endif | |
4624 | }, | |
4625 | { "packlb", TILEPRO_OPC_PACKLB, 0x3, 3, TREG_ZERO, 1, | |
4626 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
4627 | #ifndef DISASM_ONLY | |
4628 | { | |
4629 | 0x800000007ffc0000ULL, | |
4630 | 0xfffe000000000000ULL, | |
4631 | 0ULL, | |
4632 | 0ULL, | |
4633 | 0ULL | |
4634 | }, | |
4635 | { | |
4636 | 0x0000000000d40000ULL, | |
4637 | 0x0836000000000000ULL, | |
4638 | -1ULL, | |
4639 | -1ULL, | |
4640 | -1ULL | |
4641 | } | |
4642 | #endif | |
4643 | }, | |
4644 | { "packlb.sn", TILEPRO_OPC_PACKLB_SN, 0x3, 3, TREG_SN, 1, | |
4645 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
4646 | #ifndef DISASM_ONLY | |
4647 | { | |
4648 | 0x800000007ffc0000ULL, | |
4649 | 0xfffe000000000000ULL, | |
4650 | 0ULL, | |
4651 | 0ULL, | |
4652 | 0ULL | |
4653 | }, | |
4654 | { | |
4655 | 0x0000000008d40000ULL, | |
4656 | 0x0c36000000000000ULL, | |
4657 | -1ULL, | |
4658 | -1ULL, | |
4659 | -1ULL | |
4660 | } | |
4661 | #endif | |
4662 | }, | |
4663 | { "pcnt", TILEPRO_OPC_PCNT, 0x5, 2, TREG_ZERO, 1, | |
4664 | { { 7, 8 }, { 0, }, { 11, 12 }, { 0, }, { 0, } }, | |
4665 | #ifndef DISASM_ONLY | |
4666 | { | |
4667 | 0x800000007ffff000ULL, | |
4668 | 0ULL, | |
4669 | 0x80000000780ff000ULL, | |
4670 | 0ULL, | |
4671 | 0ULL | |
4672 | }, | |
4673 | { | |
4674 | 0x0000000070167000ULL, | |
4675 | -1ULL, | |
4676 | 0x80000000680a7000ULL, | |
4677 | -1ULL, | |
4678 | -1ULL | |
4679 | } | |
4680 | #endif | |
4681 | }, | |
4682 | { "pcnt.sn", TILEPRO_OPC_PCNT_SN, 0x1, 2, TREG_SN, 1, | |
4683 | { { 7, 8 }, { 0, }, { 0, }, { 0, }, { 0, } }, | |
4684 | #ifndef DISASM_ONLY | |
4685 | { | |
4686 | 0x800000007ffff000ULL, | |
4687 | 0ULL, | |
4688 | 0ULL, | |
4689 | 0ULL, | |
4690 | 0ULL | |
4691 | }, | |
4692 | { | |
4693 | 0x0000000078167000ULL, | |
4694 | -1ULL, | |
4695 | -1ULL, | |
4696 | -1ULL, | |
4697 | -1ULL | |
4698 | } | |
4699 | #endif | |
4700 | }, | |
4701 | { "rl", TILEPRO_OPC_RL, 0xf, 3, TREG_ZERO, 1, | |
4702 | { { 7, 8, 16 }, { 9, 10, 17 }, { 11, 12, 18 }, { 13, 14, 19 }, { 0, } }, | |
4703 | #ifndef DISASM_ONLY | |
4704 | { | |
4705 | 0x800000007ffc0000ULL, | |
4706 | 0xfffe000000000000ULL, | |
4707 | 0x80000000780c0000ULL, | |
4708 | 0xf806000000000000ULL, | |
4709 | 0ULL | |
4710 | }, | |
4711 | { | |
4712 | 0x0000000000d80000ULL, | |
4713 | 0x0838000000000000ULL, | |
4714 | 0x8000000020000000ULL, | |
4715 | 0xa000000000000000ULL, | |
4716 | -1ULL | |
4717 | } | |
4718 | #endif | |
4719 | }, | |
4720 | { "rl.sn", TILEPRO_OPC_RL_SN, 0x3, 3, TREG_SN, 1, | |
4721 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
4722 | #ifndef DISASM_ONLY | |
4723 | { | |
4724 | 0x800000007ffc0000ULL, | |
4725 | 0xfffe000000000000ULL, | |
4726 | 0ULL, | |
4727 | 0ULL, | |
4728 | 0ULL | |
4729 | }, | |
4730 | { | |
4731 | 0x0000000008d80000ULL, | |
4732 | 0x0c38000000000000ULL, | |
4733 | -1ULL, | |
4734 | -1ULL, | |
4735 | -1ULL | |
4736 | } | |
4737 | #endif | |
4738 | }, | |
4739 | { "rli", TILEPRO_OPC_RLI, 0xf, 3, TREG_ZERO, 1, | |
4740 | { { 7, 8, 32 }, { 9, 10, 33 }, { 11, 12, 34 }, { 13, 14, 35 }, { 0, } }, | |
4741 | #ifndef DISASM_ONLY | |
4742 | { | |
4743 | 0x800000007ffe0000ULL, | |
4744 | 0xffff000000000000ULL, | |
4745 | 0x80000000780e0000ULL, | |
4746 | 0xf807000000000000ULL, | |
4747 | 0ULL | |
4748 | }, | |
4749 | { | |
4750 | 0x0000000070020000ULL, | |
4751 | 0x4001000000000000ULL, | |
4752 | 0x8000000068020000ULL, | |
4753 | 0xd801000000000000ULL, | |
4754 | -1ULL | |
4755 | } | |
4756 | #endif | |
4757 | }, | |
4758 | { "rli.sn", TILEPRO_OPC_RLI_SN, 0x3, 3, TREG_SN, 1, | |
4759 | { { 7, 8, 32 }, { 9, 10, 33 }, { 0, }, { 0, }, { 0, } }, | |
4760 | #ifndef DISASM_ONLY | |
4761 | { | |
4762 | 0x800000007ffe0000ULL, | |
4763 | 0xffff000000000000ULL, | |
4764 | 0ULL, | |
4765 | 0ULL, | |
4766 | 0ULL | |
4767 | }, | |
4768 | { | |
4769 | 0x0000000078020000ULL, | |
4770 | 0x4401000000000000ULL, | |
4771 | -1ULL, | |
4772 | -1ULL, | |
4773 | -1ULL | |
4774 | } | |
4775 | #endif | |
4776 | }, | |
4777 | { "s1a", TILEPRO_OPC_S1A, 0xf, 3, TREG_ZERO, 1, | |
4778 | { { 7, 8, 16 }, { 9, 10, 17 }, { 11, 12, 18 }, { 13, 14, 19 }, { 0, } }, | |
4779 | #ifndef DISASM_ONLY | |
4780 | { | |
4781 | 0x800000007ffc0000ULL, | |
4782 | 0xfffe000000000000ULL, | |
4783 | 0x80000000780c0000ULL, | |
4784 | 0xf806000000000000ULL, | |
4785 | 0ULL | |
4786 | }, | |
4787 | { | |
4788 | 0x0000000000dc0000ULL, | |
4789 | 0x083a000000000000ULL, | |
4790 | 0x8000000008040000ULL, | |
4791 | 0x8802000000000000ULL, | |
4792 | -1ULL | |
4793 | } | |
4794 | #endif | |
4795 | }, | |
4796 | { "s1a.sn", TILEPRO_OPC_S1A_SN, 0x3, 3, TREG_SN, 1, | |
4797 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
4798 | #ifndef DISASM_ONLY | |
4799 | { | |
4800 | 0x800000007ffc0000ULL, | |
4801 | 0xfffe000000000000ULL, | |
4802 | 0ULL, | |
4803 | 0ULL, | |
4804 | 0ULL | |
4805 | }, | |
4806 | { | |
4807 | 0x0000000008dc0000ULL, | |
4808 | 0x0c3a000000000000ULL, | |
4809 | -1ULL, | |
4810 | -1ULL, | |
4811 | -1ULL | |
4812 | } | |
4813 | #endif | |
4814 | }, | |
4815 | { "s2a", TILEPRO_OPC_S2A, 0xf, 3, TREG_ZERO, 1, | |
4816 | { { 7, 8, 16 }, { 9, 10, 17 }, { 11, 12, 18 }, { 13, 14, 19 }, { 0, } }, | |
4817 | #ifndef DISASM_ONLY | |
4818 | { | |
4819 | 0x800000007ffc0000ULL, | |
4820 | 0xfffe000000000000ULL, | |
4821 | 0x80000000780c0000ULL, | |
4822 | 0xf806000000000000ULL, | |
4823 | 0ULL | |
4824 | }, | |
4825 | { | |
4826 | 0x0000000000e00000ULL, | |
4827 | 0x083c000000000000ULL, | |
4828 | 0x8000000008080000ULL, | |
4829 | 0x8804000000000000ULL, | |
4830 | -1ULL | |
4831 | } | |
4832 | #endif | |
4833 | }, | |
4834 | { "s2a.sn", TILEPRO_OPC_S2A_SN, 0x3, 3, TREG_SN, 1, | |
4835 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
4836 | #ifndef DISASM_ONLY | |
4837 | { | |
4838 | 0x800000007ffc0000ULL, | |
4839 | 0xfffe000000000000ULL, | |
4840 | 0ULL, | |
4841 | 0ULL, | |
4842 | 0ULL | |
4843 | }, | |
4844 | { | |
4845 | 0x0000000008e00000ULL, | |
4846 | 0x0c3c000000000000ULL, | |
4847 | -1ULL, | |
4848 | -1ULL, | |
4849 | -1ULL | |
4850 | } | |
4851 | #endif | |
4852 | }, | |
4853 | { "s3a", TILEPRO_OPC_S3A, 0xf, 3, TREG_ZERO, 1, | |
4854 | { { 7, 8, 16 }, { 9, 10, 17 }, { 11, 12, 18 }, { 13, 14, 19 }, { 0, } }, | |
4855 | #ifndef DISASM_ONLY | |
4856 | { | |
4857 | 0x800000007ffc0000ULL, | |
4858 | 0xfffe000000000000ULL, | |
4859 | 0x80000000780c0000ULL, | |
4860 | 0xf806000000000000ULL, | |
4861 | 0ULL | |
4862 | }, | |
4863 | { | |
4864 | 0x0000000000e40000ULL, | |
4865 | 0x083e000000000000ULL, | |
4866 | 0x8000000030040000ULL, | |
4867 | 0xb002000000000000ULL, | |
4868 | -1ULL | |
4869 | } | |
4870 | #endif | |
4871 | }, | |
4872 | { "s3a.sn", TILEPRO_OPC_S3A_SN, 0x3, 3, TREG_SN, 1, | |
4873 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
4874 | #ifndef DISASM_ONLY | |
4875 | { | |
4876 | 0x800000007ffc0000ULL, | |
4877 | 0xfffe000000000000ULL, | |
4878 | 0ULL, | |
4879 | 0ULL, | |
4880 | 0ULL | |
4881 | }, | |
4882 | { | |
4883 | 0x0000000008e40000ULL, | |
4884 | 0x0c3e000000000000ULL, | |
4885 | -1ULL, | |
4886 | -1ULL, | |
4887 | -1ULL | |
4888 | } | |
4889 | #endif | |
4890 | }, | |
4891 | { "sadab_u", TILEPRO_OPC_SADAB_U, 0x1, 3, TREG_ZERO, 1, | |
4892 | { { 21, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | |
4893 | #ifndef DISASM_ONLY | |
4894 | { | |
4895 | 0x800000007ffc0000ULL, | |
4896 | 0ULL, | |
4897 | 0ULL, | |
4898 | 0ULL, | |
4899 | 0ULL | |
4900 | }, | |
4901 | { | |
4902 | 0x0000000000e80000ULL, | |
4903 | -1ULL, | |
4904 | -1ULL, | |
4905 | -1ULL, | |
4906 | -1ULL | |
4907 | } | |
4908 | #endif | |
4909 | }, | |
4910 | { "sadab_u.sn", TILEPRO_OPC_SADAB_U_SN, 0x1, 3, TREG_SN, 1, | |
4911 | { { 21, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | |
4912 | #ifndef DISASM_ONLY | |
4913 | { | |
4914 | 0x800000007ffc0000ULL, | |
4915 | 0ULL, | |
4916 | 0ULL, | |
4917 | 0ULL, | |
4918 | 0ULL | |
4919 | }, | |
4920 | { | |
4921 | 0x0000000008e80000ULL, | |
4922 | -1ULL, | |
4923 | -1ULL, | |
4924 | -1ULL, | |
4925 | -1ULL | |
4926 | } | |
4927 | #endif | |
4928 | }, | |
4929 | { "sadah", TILEPRO_OPC_SADAH, 0x1, 3, TREG_ZERO, 1, | |
4930 | { { 21, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | |
4931 | #ifndef DISASM_ONLY | |
4932 | { | |
4933 | 0x800000007ffc0000ULL, | |
4934 | 0ULL, | |
4935 | 0ULL, | |
4936 | 0ULL, | |
4937 | 0ULL | |
4938 | }, | |
4939 | { | |
4940 | 0x0000000000ec0000ULL, | |
4941 | -1ULL, | |
4942 | -1ULL, | |
4943 | -1ULL, | |
4944 | -1ULL | |
4945 | } | |
4946 | #endif | |
4947 | }, | |
4948 | { "sadah.sn", TILEPRO_OPC_SADAH_SN, 0x1, 3, TREG_SN, 1, | |
4949 | { { 21, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | |
4950 | #ifndef DISASM_ONLY | |
4951 | { | |
4952 | 0x800000007ffc0000ULL, | |
4953 | 0ULL, | |
4954 | 0ULL, | |
4955 | 0ULL, | |
4956 | 0ULL | |
4957 | }, | |
4958 | { | |
4959 | 0x0000000008ec0000ULL, | |
4960 | -1ULL, | |
4961 | -1ULL, | |
4962 | -1ULL, | |
4963 | -1ULL | |
4964 | } | |
4965 | #endif | |
4966 | }, | |
4967 | { "sadah_u", TILEPRO_OPC_SADAH_U, 0x1, 3, TREG_ZERO, 1, | |
4968 | { { 21, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | |
4969 | #ifndef DISASM_ONLY | |
4970 | { | |
4971 | 0x800000007ffc0000ULL, | |
4972 | 0ULL, | |
4973 | 0ULL, | |
4974 | 0ULL, | |
4975 | 0ULL | |
4976 | }, | |
4977 | { | |
4978 | 0x0000000000f00000ULL, | |
4979 | -1ULL, | |
4980 | -1ULL, | |
4981 | -1ULL, | |
4982 | -1ULL | |
4983 | } | |
4984 | #endif | |
4985 | }, | |
4986 | { "sadah_u.sn", TILEPRO_OPC_SADAH_U_SN, 0x1, 3, TREG_SN, 1, | |
4987 | { { 21, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | |
4988 | #ifndef DISASM_ONLY | |
4989 | { | |
4990 | 0x800000007ffc0000ULL, | |
4991 | 0ULL, | |
4992 | 0ULL, | |
4993 | 0ULL, | |
4994 | 0ULL | |
4995 | }, | |
4996 | { | |
4997 | 0x0000000008f00000ULL, | |
4998 | -1ULL, | |
4999 | -1ULL, | |
5000 | -1ULL, | |
5001 | -1ULL | |
5002 | } | |
5003 | #endif | |
5004 | }, | |
5005 | { "sadb_u", TILEPRO_OPC_SADB_U, 0x1, 3, TREG_ZERO, 1, | |
5006 | { { 7, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | |
5007 | #ifndef DISASM_ONLY | |
5008 | { | |
5009 | 0x800000007ffc0000ULL, | |
5010 | 0ULL, | |
5011 | 0ULL, | |
5012 | 0ULL, | |
5013 | 0ULL | |
5014 | }, | |
5015 | { | |
5016 | 0x0000000000f40000ULL, | |
5017 | -1ULL, | |
5018 | -1ULL, | |
5019 | -1ULL, | |
5020 | -1ULL | |
5021 | } | |
5022 | #endif | |
5023 | }, | |
5024 | { "sadb_u.sn", TILEPRO_OPC_SADB_U_SN, 0x1, 3, TREG_SN, 1, | |
5025 | { { 7, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | |
5026 | #ifndef DISASM_ONLY | |
5027 | { | |
5028 | 0x800000007ffc0000ULL, | |
5029 | 0ULL, | |
5030 | 0ULL, | |
5031 | 0ULL, | |
5032 | 0ULL | |
5033 | }, | |
5034 | { | |
5035 | 0x0000000008f40000ULL, | |
5036 | -1ULL, | |
5037 | -1ULL, | |
5038 | -1ULL, | |
5039 | -1ULL | |
5040 | } | |
5041 | #endif | |
5042 | }, | |
5043 | { "sadh", TILEPRO_OPC_SADH, 0x1, 3, TREG_ZERO, 1, | |
5044 | { { 7, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | |
5045 | #ifndef DISASM_ONLY | |
5046 | { | |
5047 | 0x800000007ffc0000ULL, | |
5048 | 0ULL, | |
5049 | 0ULL, | |
5050 | 0ULL, | |
5051 | 0ULL | |
5052 | }, | |
5053 | { | |
5054 | 0x0000000000f80000ULL, | |
5055 | -1ULL, | |
5056 | -1ULL, | |
5057 | -1ULL, | |
5058 | -1ULL | |
5059 | } | |
5060 | #endif | |
5061 | }, | |
5062 | { "sadh.sn", TILEPRO_OPC_SADH_SN, 0x1, 3, TREG_SN, 1, | |
5063 | { { 7, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | |
5064 | #ifndef DISASM_ONLY | |
5065 | { | |
5066 | 0x800000007ffc0000ULL, | |
5067 | 0ULL, | |
5068 | 0ULL, | |
5069 | 0ULL, | |
5070 | 0ULL | |
5071 | }, | |
5072 | { | |
5073 | 0x0000000008f80000ULL, | |
5074 | -1ULL, | |
5075 | -1ULL, | |
5076 | -1ULL, | |
5077 | -1ULL | |
5078 | } | |
5079 | #endif | |
5080 | }, | |
5081 | { "sadh_u", TILEPRO_OPC_SADH_U, 0x1, 3, TREG_ZERO, 1, | |
5082 | { { 7, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | |
5083 | #ifndef DISASM_ONLY | |
5084 | { | |
5085 | 0x800000007ffc0000ULL, | |
5086 | 0ULL, | |
5087 | 0ULL, | |
5088 | 0ULL, | |
5089 | 0ULL | |
5090 | }, | |
5091 | { | |
5092 | 0x0000000000fc0000ULL, | |
5093 | -1ULL, | |
5094 | -1ULL, | |
5095 | -1ULL, | |
5096 | -1ULL | |
5097 | } | |
5098 | #endif | |
5099 | }, | |
5100 | { "sadh_u.sn", TILEPRO_OPC_SADH_U_SN, 0x1, 3, TREG_SN, 1, | |
5101 | { { 7, 8, 16 }, { 0, }, { 0, }, { 0, }, { 0, } }, | |
5102 | #ifndef DISASM_ONLY | |
5103 | { | |
5104 | 0x800000007ffc0000ULL, | |
5105 | 0ULL, | |
5106 | 0ULL, | |
5107 | 0ULL, | |
5108 | 0ULL | |
5109 | }, | |
5110 | { | |
5111 | 0x0000000008fc0000ULL, | |
5112 | -1ULL, | |
5113 | -1ULL, | |
5114 | -1ULL, | |
5115 | -1ULL | |
5116 | } | |
5117 | #endif | |
5118 | }, | |
5119 | { "sb", TILEPRO_OPC_SB, 0x12, 2, TREG_ZERO, 1, | |
5120 | { { 0, }, { 10, 17 }, { 0, }, { 0, }, { 15, 36 } }, | |
5121 | #ifndef DISASM_ONLY | |
5122 | { | |
5123 | 0ULL, | |
5124 | 0xfbfe000000000000ULL, | |
5125 | 0ULL, | |
5126 | 0ULL, | |
5127 | 0x8700000000000000ULL | |
5128 | }, | |
5129 | { | |
5130 | -1ULL, | |
5131 | 0x0840000000000000ULL, | |
5132 | -1ULL, | |
5133 | -1ULL, | |
5134 | 0x8500000000000000ULL | |
5135 | } | |
5136 | #endif | |
5137 | }, | |
5138 | { "sbadd", TILEPRO_OPC_SBADD, 0x2, 3, TREG_ZERO, 1, | |
5139 | { { 0, }, { 24, 17, 37 }, { 0, }, { 0, }, { 0, } }, | |
5140 | #ifndef DISASM_ONLY | |
5141 | { | |
5142 | 0ULL, | |
5143 | 0xfbf8000000000000ULL, | |
5144 | 0ULL, | |
5145 | 0ULL, | |
5146 | 0ULL | |
5147 | }, | |
5148 | { | |
5149 | -1ULL, | |
5150 | 0x30e0000000000000ULL, | |
5151 | -1ULL, | |
5152 | -1ULL, | |
5153 | -1ULL | |
5154 | } | |
5155 | #endif | |
5156 | }, | |
5157 | { "seq", TILEPRO_OPC_SEQ, 0xf, 3, TREG_ZERO, 1, | |
5158 | { { 7, 8, 16 }, { 9, 10, 17 }, { 11, 12, 18 }, { 13, 14, 19 }, { 0, } }, | |
5159 | #ifndef DISASM_ONLY | |
5160 | { | |
5161 | 0x800000007ffc0000ULL, | |
5162 | 0xfffe000000000000ULL, | |
5163 | 0x80000000780c0000ULL, | |
5164 | 0xf806000000000000ULL, | |
5165 | 0ULL | |
5166 | }, | |
5167 | { | |
5168 | 0x0000000001080000ULL, | |
5169 | 0x0846000000000000ULL, | |
5170 | 0x8000000030080000ULL, | |
5171 | 0xb004000000000000ULL, | |
5172 | -1ULL | |
5173 | } | |
5174 | #endif | |
5175 | }, | |
5176 | { "seq.sn", TILEPRO_OPC_SEQ_SN, 0x3, 3, TREG_SN, 1, | |
5177 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
5178 | #ifndef DISASM_ONLY | |
5179 | { | |
5180 | 0x800000007ffc0000ULL, | |
5181 | 0xfffe000000000000ULL, | |
5182 | 0ULL, | |
5183 | 0ULL, | |
5184 | 0ULL | |
5185 | }, | |
5186 | { | |
5187 | 0x0000000009080000ULL, | |
5188 | 0x0c46000000000000ULL, | |
5189 | -1ULL, | |
5190 | -1ULL, | |
5191 | -1ULL | |
5192 | } | |
5193 | #endif | |
5194 | }, | |
5195 | { "seqb", TILEPRO_OPC_SEQB, 0x3, 3, TREG_ZERO, 1, | |
5196 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
5197 | #ifndef DISASM_ONLY | |
5198 | { | |
5199 | 0x800000007ffc0000ULL, | |
5200 | 0xfffe000000000000ULL, | |
5201 | 0ULL, | |
5202 | 0ULL, | |
5203 | 0ULL | |
5204 | }, | |
5205 | { | |
5206 | 0x0000000001000000ULL, | |
5207 | 0x0842000000000000ULL, | |
5208 | -1ULL, | |
5209 | -1ULL, | |
5210 | -1ULL | |
5211 | } | |
5212 | #endif | |
5213 | }, | |
5214 | { "seqb.sn", TILEPRO_OPC_SEQB_SN, 0x3, 3, TREG_SN, 1, | |
5215 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
5216 | #ifndef DISASM_ONLY | |
5217 | { | |
5218 | 0x800000007ffc0000ULL, | |
5219 | 0xfffe000000000000ULL, | |
5220 | 0ULL, | |
5221 | 0ULL, | |
5222 | 0ULL | |
5223 | }, | |
5224 | { | |
5225 | 0x0000000009000000ULL, | |
5226 | 0x0c42000000000000ULL, | |
5227 | -1ULL, | |
5228 | -1ULL, | |
5229 | -1ULL | |
5230 | } | |
5231 | #endif | |
5232 | }, | |
5233 | { "seqh", TILEPRO_OPC_SEQH, 0x3, 3, TREG_ZERO, 1, | |
5234 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
5235 | #ifndef DISASM_ONLY | |
5236 | { | |
5237 | 0x800000007ffc0000ULL, | |
5238 | 0xfffe000000000000ULL, | |
5239 | 0ULL, | |
5240 | 0ULL, | |
5241 | 0ULL | |
5242 | }, | |
5243 | { | |
5244 | 0x0000000001040000ULL, | |
5245 | 0x0844000000000000ULL, | |
5246 | -1ULL, | |
5247 | -1ULL, | |
5248 | -1ULL | |
5249 | } | |
5250 | #endif | |
5251 | }, | |
5252 | { "seqh.sn", TILEPRO_OPC_SEQH_SN, 0x3, 3, TREG_SN, 1, | |
5253 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
5254 | #ifndef DISASM_ONLY | |
5255 | { | |
5256 | 0x800000007ffc0000ULL, | |
5257 | 0xfffe000000000000ULL, | |
5258 | 0ULL, | |
5259 | 0ULL, | |
5260 | 0ULL | |
5261 | }, | |
5262 | { | |
5263 | 0x0000000009040000ULL, | |
5264 | 0x0c44000000000000ULL, | |
5265 | -1ULL, | |
5266 | -1ULL, | |
5267 | -1ULL | |
5268 | } | |
5269 | #endif | |
5270 | }, | |
5271 | { "seqi", TILEPRO_OPC_SEQI, 0xf, 3, TREG_ZERO, 1, | |
5272 | { { 7, 8, 0 }, { 9, 10, 1 }, { 11, 12, 2 }, { 13, 14, 3 }, { 0, } }, | |
5273 | #ifndef DISASM_ONLY | |
5274 | { | |
5275 | 0x800000007ff00000ULL, | |
5276 | 0xfff8000000000000ULL, | |
5277 | 0x8000000078000000ULL, | |
5278 | 0xf800000000000000ULL, | |
5279 | 0ULL | |
5280 | }, | |
5281 | { | |
5282 | 0x0000000040b00000ULL, | |
5283 | 0x3070000000000000ULL, | |
5284 | 0x8000000060000000ULL, | |
5285 | 0xd000000000000000ULL, | |
5286 | -1ULL | |
5287 | } | |
5288 | #endif | |
5289 | }, | |
5290 | { "seqi.sn", TILEPRO_OPC_SEQI_SN, 0x3, 3, TREG_SN, 1, | |
5291 | { { 7, 8, 0 }, { 9, 10, 1 }, { 0, }, { 0, }, { 0, } }, | |
5292 | #ifndef DISASM_ONLY | |
5293 | { | |
5294 | 0x800000007ff00000ULL, | |
5295 | 0xfff8000000000000ULL, | |
5296 | 0ULL, | |
5297 | 0ULL, | |
5298 | 0ULL | |
5299 | }, | |
5300 | { | |
5301 | 0x0000000048b00000ULL, | |
5302 | 0x3470000000000000ULL, | |
5303 | -1ULL, | |
5304 | -1ULL, | |
5305 | -1ULL | |
5306 | } | |
5307 | #endif | |
5308 | }, | |
5309 | { "seqib", TILEPRO_OPC_SEQIB, 0x3, 3, TREG_ZERO, 1, | |
5310 | { { 7, 8, 0 }, { 9, 10, 1 }, { 0, }, { 0, }, { 0, } }, | |
5311 | #ifndef DISASM_ONLY | |
5312 | { | |
5313 | 0x800000007ff00000ULL, | |
5314 | 0xfff8000000000000ULL, | |
5315 | 0ULL, | |
5316 | 0ULL, | |
5317 | 0ULL | |
5318 | }, | |
5319 | { | |
5320 | 0x0000000040900000ULL, | |
5321 | 0x3060000000000000ULL, | |
5322 | -1ULL, | |
5323 | -1ULL, | |
5324 | -1ULL | |
5325 | } | |
5326 | #endif | |
5327 | }, | |
5328 | { "seqib.sn", TILEPRO_OPC_SEQIB_SN, 0x3, 3, TREG_SN, 1, | |
5329 | { { 7, 8, 0 }, { 9, 10, 1 }, { 0, }, { 0, }, { 0, } }, | |
5330 | #ifndef DISASM_ONLY | |
5331 | { | |
5332 | 0x800000007ff00000ULL, | |
5333 | 0xfff8000000000000ULL, | |
5334 | 0ULL, | |
5335 | 0ULL, | |
5336 | 0ULL | |
5337 | }, | |
5338 | { | |
5339 | 0x0000000048900000ULL, | |
5340 | 0x3460000000000000ULL, | |
5341 | -1ULL, | |
5342 | -1ULL, | |
5343 | -1ULL | |
5344 | } | |
5345 | #endif | |
5346 | }, | |
5347 | { "seqih", TILEPRO_OPC_SEQIH, 0x3, 3, TREG_ZERO, 1, | |
5348 | { { 7, 8, 0 }, { 9, 10, 1 }, { 0, }, { 0, }, { 0, } }, | |
5349 | #ifndef DISASM_ONLY | |
5350 | { | |
5351 | 0x800000007ff00000ULL, | |
5352 | 0xfff8000000000000ULL, | |
5353 | 0ULL, | |
5354 | 0ULL, | |
5355 | 0ULL | |
5356 | }, | |
5357 | { | |
5358 | 0x0000000040a00000ULL, | |
5359 | 0x3068000000000000ULL, | |
5360 | -1ULL, | |
5361 | -1ULL, | |
5362 | -1ULL | |
5363 | } | |
5364 | #endif | |
5365 | }, | |
5366 | { "seqih.sn", TILEPRO_OPC_SEQIH_SN, 0x3, 3, TREG_SN, 1, | |
5367 | { { 7, 8, 0 }, { 9, 10, 1 }, { 0, }, { 0, }, { 0, } }, | |
5368 | #ifndef DISASM_ONLY | |
5369 | { | |
5370 | 0x800000007ff00000ULL, | |
5371 | 0xfff8000000000000ULL, | |
5372 | 0ULL, | |
5373 | 0ULL, | |
5374 | 0ULL | |
5375 | }, | |
5376 | { | |
5377 | 0x0000000048a00000ULL, | |
5378 | 0x3468000000000000ULL, | |
5379 | -1ULL, | |
5380 | -1ULL, | |
5381 | -1ULL | |
5382 | } | |
5383 | #endif | |
5384 | }, | |
5385 | { "sh", TILEPRO_OPC_SH, 0x12, 2, TREG_ZERO, 1, | |
5386 | { { 0, }, { 10, 17 }, { 0, }, { 0, }, { 15, 36 } }, | |
5387 | #ifndef DISASM_ONLY | |
5388 | { | |
5389 | 0ULL, | |
5390 | 0xfbfe000000000000ULL, | |
5391 | 0ULL, | |
5392 | 0ULL, | |
5393 | 0x8700000000000000ULL | |
5394 | }, | |
5395 | { | |
5396 | -1ULL, | |
5397 | 0x0854000000000000ULL, | |
5398 | -1ULL, | |
5399 | -1ULL, | |
5400 | 0x8600000000000000ULL | |
5401 | } | |
5402 | #endif | |
5403 | }, | |
5404 | { "shadd", TILEPRO_OPC_SHADD, 0x2, 3, TREG_ZERO, 1, | |
5405 | { { 0, }, { 24, 17, 37 }, { 0, }, { 0, }, { 0, } }, | |
5406 | #ifndef DISASM_ONLY | |
5407 | { | |
5408 | 0ULL, | |
5409 | 0xfbf8000000000000ULL, | |
5410 | 0ULL, | |
5411 | 0ULL, | |
5412 | 0ULL | |
5413 | }, | |
5414 | { | |
5415 | -1ULL, | |
5416 | 0x30e8000000000000ULL, | |
5417 | -1ULL, | |
5418 | -1ULL, | |
5419 | -1ULL | |
5420 | } | |
5421 | #endif | |
5422 | }, | |
5423 | { "shl", TILEPRO_OPC_SHL, 0xf, 3, TREG_ZERO, 1, | |
5424 | { { 7, 8, 16 }, { 9, 10, 17 }, { 11, 12, 18 }, { 13, 14, 19 }, { 0, } }, | |
5425 | #ifndef DISASM_ONLY | |
5426 | { | |
5427 | 0x800000007ffc0000ULL, | |
5428 | 0xfffe000000000000ULL, | |
5429 | 0x80000000780c0000ULL, | |
5430 | 0xf806000000000000ULL, | |
5431 | 0ULL | |
5432 | }, | |
5433 | { | |
5434 | 0x0000000001140000ULL, | |
5435 | 0x084c000000000000ULL, | |
5436 | 0x8000000020040000ULL, | |
5437 | 0xa002000000000000ULL, | |
5438 | -1ULL | |
5439 | } | |
5440 | #endif | |
5441 | }, | |
5442 | { "shl.sn", TILEPRO_OPC_SHL_SN, 0x3, 3, TREG_SN, 1, | |
5443 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
5444 | #ifndef DISASM_ONLY | |
5445 | { | |
5446 | 0x800000007ffc0000ULL, | |
5447 | 0xfffe000000000000ULL, | |
5448 | 0ULL, | |
5449 | 0ULL, | |
5450 | 0ULL | |
5451 | }, | |
5452 | { | |
5453 | 0x0000000009140000ULL, | |
5454 | 0x0c4c000000000000ULL, | |
5455 | -1ULL, | |
5456 | -1ULL, | |
5457 | -1ULL | |
5458 | } | |
5459 | #endif | |
5460 | }, | |
5461 | { "shlb", TILEPRO_OPC_SHLB, 0x3, 3, TREG_ZERO, 1, | |
5462 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
5463 | #ifndef DISASM_ONLY | |
5464 | { | |
5465 | 0x800000007ffc0000ULL, | |
5466 | 0xfffe000000000000ULL, | |
5467 | 0ULL, | |
5468 | 0ULL, | |
5469 | 0ULL | |
5470 | }, | |
5471 | { | |
5472 | 0x00000000010c0000ULL, | |
5473 | 0x0848000000000000ULL, | |
5474 | -1ULL, | |
5475 | -1ULL, | |
5476 | -1ULL | |
5477 | } | |
5478 | #endif | |
5479 | }, | |
5480 | { "shlb.sn", TILEPRO_OPC_SHLB_SN, 0x3, 3, TREG_SN, 1, | |
5481 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
5482 | #ifndef DISASM_ONLY | |
5483 | { | |
5484 | 0x800000007ffc0000ULL, | |
5485 | 0xfffe000000000000ULL, | |
5486 | 0ULL, | |
5487 | 0ULL, | |
5488 | 0ULL | |
5489 | }, | |
5490 | { | |
5491 | 0x00000000090c0000ULL, | |
5492 | 0x0c48000000000000ULL, | |
5493 | -1ULL, | |
5494 | -1ULL, | |
5495 | -1ULL | |
5496 | } | |
5497 | #endif | |
5498 | }, | |
5499 | { "shlh", TILEPRO_OPC_SHLH, 0x3, 3, TREG_ZERO, 1, | |
5500 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
5501 | #ifndef DISASM_ONLY | |
5502 | { | |
5503 | 0x800000007ffc0000ULL, | |
5504 | 0xfffe000000000000ULL, | |
5505 | 0ULL, | |
5506 | 0ULL, | |
5507 | 0ULL | |
5508 | }, | |
5509 | { | |
5510 | 0x0000000001100000ULL, | |
5511 | 0x084a000000000000ULL, | |
5512 | -1ULL, | |
5513 | -1ULL, | |
5514 | -1ULL | |
5515 | } | |
5516 | #endif | |
5517 | }, | |
5518 | { "shlh.sn", TILEPRO_OPC_SHLH_SN, 0x3, 3, TREG_SN, 1, | |
5519 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
5520 | #ifndef DISASM_ONLY | |
5521 | { | |
5522 | 0x800000007ffc0000ULL, | |
5523 | 0xfffe000000000000ULL, | |
5524 | 0ULL, | |
5525 | 0ULL, | |
5526 | 0ULL | |
5527 | }, | |
5528 | { | |
5529 | 0x0000000009100000ULL, | |
5530 | 0x0c4a000000000000ULL, | |
5531 | -1ULL, | |
5532 | -1ULL, | |
5533 | -1ULL | |
5534 | } | |
5535 | #endif | |
5536 | }, | |
5537 | { "shli", TILEPRO_OPC_SHLI, 0xf, 3, TREG_ZERO, 1, | |
5538 | { { 7, 8, 32 }, { 9, 10, 33 }, { 11, 12, 34 }, { 13, 14, 35 }, { 0, } }, | |
5539 | #ifndef DISASM_ONLY | |
5540 | { | |
5541 | 0x800000007ffe0000ULL, | |
5542 | 0xffff000000000000ULL, | |
5543 | 0x80000000780e0000ULL, | |
5544 | 0xf807000000000000ULL, | |
5545 | 0ULL | |
5546 | }, | |
5547 | { | |
5548 | 0x0000000070080000ULL, | |
5549 | 0x4004000000000000ULL, | |
5550 | 0x8000000068040000ULL, | |
5551 | 0xd802000000000000ULL, | |
5552 | -1ULL | |
5553 | } | |
5554 | #endif | |
5555 | }, | |
5556 | { "shli.sn", TILEPRO_OPC_SHLI_SN, 0x3, 3, TREG_SN, 1, | |
5557 | { { 7, 8, 32 }, { 9, 10, 33 }, { 0, }, { 0, }, { 0, } }, | |
5558 | #ifndef DISASM_ONLY | |
5559 | { | |
5560 | 0x800000007ffe0000ULL, | |
5561 | 0xffff000000000000ULL, | |
5562 | 0ULL, | |
5563 | 0ULL, | |
5564 | 0ULL | |
5565 | }, | |
5566 | { | |
5567 | 0x0000000078080000ULL, | |
5568 | 0x4404000000000000ULL, | |
5569 | -1ULL, | |
5570 | -1ULL, | |
5571 | -1ULL | |
5572 | } | |
5573 | #endif | |
5574 | }, | |
5575 | { "shlib", TILEPRO_OPC_SHLIB, 0x3, 3, TREG_ZERO, 1, | |
5576 | { { 7, 8, 32 }, { 9, 10, 33 }, { 0, }, { 0, }, { 0, } }, | |
5577 | #ifndef DISASM_ONLY | |
5578 | { | |
5579 | 0x800000007ffe0000ULL, | |
5580 | 0xffff000000000000ULL, | |
5581 | 0ULL, | |
5582 | 0ULL, | |
5583 | 0ULL | |
5584 | }, | |
5585 | { | |
5586 | 0x0000000070040000ULL, | |
5587 | 0x4002000000000000ULL, | |
5588 | -1ULL, | |
5589 | -1ULL, | |
5590 | -1ULL | |
5591 | } | |
5592 | #endif | |
5593 | }, | |
5594 | { "shlib.sn", TILEPRO_OPC_SHLIB_SN, 0x3, 3, TREG_SN, 1, | |
5595 | { { 7, 8, 32 }, { 9, 10, 33 }, { 0, }, { 0, }, { 0, } }, | |
5596 | #ifndef DISASM_ONLY | |
5597 | { | |
5598 | 0x800000007ffe0000ULL, | |
5599 | 0xffff000000000000ULL, | |
5600 | 0ULL, | |
5601 | 0ULL, | |
5602 | 0ULL | |
5603 | }, | |
5604 | { | |
5605 | 0x0000000078040000ULL, | |
5606 | 0x4402000000000000ULL, | |
5607 | -1ULL, | |
5608 | -1ULL, | |
5609 | -1ULL | |
5610 | } | |
5611 | #endif | |
5612 | }, | |
5613 | { "shlih", TILEPRO_OPC_SHLIH, 0x3, 3, TREG_ZERO, 1, | |
5614 | { { 7, 8, 32 }, { 9, 10, 33 }, { 0, }, { 0, }, { 0, } }, | |
5615 | #ifndef DISASM_ONLY | |
5616 | { | |
5617 | 0x800000007ffe0000ULL, | |
5618 | 0xffff000000000000ULL, | |
5619 | 0ULL, | |
5620 | 0ULL, | |
5621 | 0ULL | |
5622 | }, | |
5623 | { | |
5624 | 0x0000000070060000ULL, | |
5625 | 0x4003000000000000ULL, | |
5626 | -1ULL, | |
5627 | -1ULL, | |
5628 | -1ULL | |
5629 | } | |
5630 | #endif | |
5631 | }, | |
5632 | { "shlih.sn", TILEPRO_OPC_SHLIH_SN, 0x3, 3, TREG_SN, 1, | |
5633 | { { 7, 8, 32 }, { 9, 10, 33 }, { 0, }, { 0, }, { 0, } }, | |
5634 | #ifndef DISASM_ONLY | |
5635 | { | |
5636 | 0x800000007ffe0000ULL, | |
5637 | 0xffff000000000000ULL, | |
5638 | 0ULL, | |
5639 | 0ULL, | |
5640 | 0ULL | |
5641 | }, | |
5642 | { | |
5643 | 0x0000000078060000ULL, | |
5644 | 0x4403000000000000ULL, | |
5645 | -1ULL, | |
5646 | -1ULL, | |
5647 | -1ULL | |
5648 | } | |
5649 | #endif | |
5650 | }, | |
5651 | { "shr", TILEPRO_OPC_SHR, 0xf, 3, TREG_ZERO, 1, | |
5652 | { { 7, 8, 16 }, { 9, 10, 17 }, { 11, 12, 18 }, { 13, 14, 19 }, { 0, } }, | |
5653 | #ifndef DISASM_ONLY | |
5654 | { | |
5655 | 0x800000007ffc0000ULL, | |
5656 | 0xfffe000000000000ULL, | |
5657 | 0x80000000780c0000ULL, | |
5658 | 0xf806000000000000ULL, | |
5659 | 0ULL | |
5660 | }, | |
5661 | { | |
5662 | 0x0000000001200000ULL, | |
5663 | 0x0852000000000000ULL, | |
5664 | 0x8000000020080000ULL, | |
5665 | 0xa004000000000000ULL, | |
5666 | -1ULL | |
5667 | } | |
5668 | #endif | |
5669 | }, | |
5670 | { "shr.sn", TILEPRO_OPC_SHR_SN, 0x3, 3, TREG_SN, 1, | |
5671 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
5672 | #ifndef DISASM_ONLY | |
5673 | { | |
5674 | 0x800000007ffc0000ULL, | |
5675 | 0xfffe000000000000ULL, | |
5676 | 0ULL, | |
5677 | 0ULL, | |
5678 | 0ULL | |
5679 | }, | |
5680 | { | |
5681 | 0x0000000009200000ULL, | |
5682 | 0x0c52000000000000ULL, | |
5683 | -1ULL, | |
5684 | -1ULL, | |
5685 | -1ULL | |
5686 | } | |
5687 | #endif | |
5688 | }, | |
5689 | { "shrb", TILEPRO_OPC_SHRB, 0x3, 3, TREG_ZERO, 1, | |
5690 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
5691 | #ifndef DISASM_ONLY | |
5692 | { | |
5693 | 0x800000007ffc0000ULL, | |
5694 | 0xfffe000000000000ULL, | |
5695 | 0ULL, | |
5696 | 0ULL, | |
5697 | 0ULL | |
5698 | }, | |
5699 | { | |
5700 | 0x0000000001180000ULL, | |
5701 | 0x084e000000000000ULL, | |
5702 | -1ULL, | |
5703 | -1ULL, | |
5704 | -1ULL | |
5705 | } | |
5706 | #endif | |
5707 | }, | |
5708 | { "shrb.sn", TILEPRO_OPC_SHRB_SN, 0x3, 3, TREG_SN, 1, | |
5709 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
5710 | #ifndef DISASM_ONLY | |
5711 | { | |
5712 | 0x800000007ffc0000ULL, | |
5713 | 0xfffe000000000000ULL, | |
5714 | 0ULL, | |
5715 | 0ULL, | |
5716 | 0ULL | |
5717 | }, | |
5718 | { | |
5719 | 0x0000000009180000ULL, | |
5720 | 0x0c4e000000000000ULL, | |
5721 | -1ULL, | |
5722 | -1ULL, | |
5723 | -1ULL | |
5724 | } | |
5725 | #endif | |
5726 | }, | |
5727 | { "shrh", TILEPRO_OPC_SHRH, 0x3, 3, TREG_ZERO, 1, | |
5728 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
5729 | #ifndef DISASM_ONLY | |
5730 | { | |
5731 | 0x800000007ffc0000ULL, | |
5732 | 0xfffe000000000000ULL, | |
5733 | 0ULL, | |
5734 | 0ULL, | |
5735 | 0ULL | |
5736 | }, | |
5737 | { | |
5738 | 0x00000000011c0000ULL, | |
5739 | 0x0850000000000000ULL, | |
5740 | -1ULL, | |
5741 | -1ULL, | |
5742 | -1ULL | |
5743 | } | |
5744 | #endif | |
5745 | }, | |
5746 | { "shrh.sn", TILEPRO_OPC_SHRH_SN, 0x3, 3, TREG_SN, 1, | |
5747 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
5748 | #ifndef DISASM_ONLY | |
5749 | { | |
5750 | 0x800000007ffc0000ULL, | |
5751 | 0xfffe000000000000ULL, | |
5752 | 0ULL, | |
5753 | 0ULL, | |
5754 | 0ULL | |
5755 | }, | |
5756 | { | |
5757 | 0x00000000091c0000ULL, | |
5758 | 0x0c50000000000000ULL, | |
5759 | -1ULL, | |
5760 | -1ULL, | |
5761 | -1ULL | |
5762 | } | |
5763 | #endif | |
5764 | }, | |
5765 | { "shri", TILEPRO_OPC_SHRI, 0xf, 3, TREG_ZERO, 1, | |
5766 | { { 7, 8, 32 }, { 9, 10, 33 }, { 11, 12, 34 }, { 13, 14, 35 }, { 0, } }, | |
5767 | #ifndef DISASM_ONLY | |
5768 | { | |
5769 | 0x800000007ffe0000ULL, | |
5770 | 0xffff000000000000ULL, | |
5771 | 0x80000000780e0000ULL, | |
5772 | 0xf807000000000000ULL, | |
5773 | 0ULL | |
5774 | }, | |
5775 | { | |
5776 | 0x00000000700e0000ULL, | |
5777 | 0x4007000000000000ULL, | |
5778 | 0x8000000068060000ULL, | |
5779 | 0xd803000000000000ULL, | |
5780 | -1ULL | |
5781 | } | |
5782 | #endif | |
5783 | }, | |
5784 | { "shri.sn", TILEPRO_OPC_SHRI_SN, 0x3, 3, TREG_SN, 1, | |
5785 | { { 7, 8, 32 }, { 9, 10, 33 }, { 0, }, { 0, }, { 0, } }, | |
5786 | #ifndef DISASM_ONLY | |
5787 | { | |
5788 | 0x800000007ffe0000ULL, | |
5789 | 0xffff000000000000ULL, | |
5790 | 0ULL, | |
5791 | 0ULL, | |
5792 | 0ULL | |
5793 | }, | |
5794 | { | |
5795 | 0x00000000780e0000ULL, | |
5796 | 0x4407000000000000ULL, | |
5797 | -1ULL, | |
5798 | -1ULL, | |
5799 | -1ULL | |
5800 | } | |
5801 | #endif | |
5802 | }, | |
5803 | { "shrib", TILEPRO_OPC_SHRIB, 0x3, 3, TREG_ZERO, 1, | |
5804 | { { 7, 8, 32 }, { 9, 10, 33 }, { 0, }, { 0, }, { 0, } }, | |
5805 | #ifndef DISASM_ONLY | |
5806 | { | |
5807 | 0x800000007ffe0000ULL, | |
5808 | 0xffff000000000000ULL, | |
5809 | 0ULL, | |
5810 | 0ULL, | |
5811 | 0ULL | |
5812 | }, | |
5813 | { | |
5814 | 0x00000000700a0000ULL, | |
5815 | 0x4005000000000000ULL, | |
5816 | -1ULL, | |
5817 | -1ULL, | |
5818 | -1ULL | |
5819 | } | |
5820 | #endif | |
5821 | }, | |
5822 | { "shrib.sn", TILEPRO_OPC_SHRIB_SN, 0x3, 3, TREG_SN, 1, | |
5823 | { { 7, 8, 32 }, { 9, 10, 33 }, { 0, }, { 0, }, { 0, } }, | |
5824 | #ifndef DISASM_ONLY | |
5825 | { | |
5826 | 0x800000007ffe0000ULL, | |
5827 | 0xffff000000000000ULL, | |
5828 | 0ULL, | |
5829 | 0ULL, | |
5830 | 0ULL | |
5831 | }, | |
5832 | { | |
5833 | 0x00000000780a0000ULL, | |
5834 | 0x4405000000000000ULL, | |
5835 | -1ULL, | |
5836 | -1ULL, | |
5837 | -1ULL | |
5838 | } | |
5839 | #endif | |
5840 | }, | |
5841 | { "shrih", TILEPRO_OPC_SHRIH, 0x3, 3, TREG_ZERO, 1, | |
5842 | { { 7, 8, 32 }, { 9, 10, 33 }, { 0, }, { 0, }, { 0, } }, | |
5843 | #ifndef DISASM_ONLY | |
5844 | { | |
5845 | 0x800000007ffe0000ULL, | |
5846 | 0xffff000000000000ULL, | |
5847 | 0ULL, | |
5848 | 0ULL, | |
5849 | 0ULL | |
5850 | }, | |
5851 | { | |
5852 | 0x00000000700c0000ULL, | |
5853 | 0x4006000000000000ULL, | |
5854 | -1ULL, | |
5855 | -1ULL, | |
5856 | -1ULL | |
5857 | } | |
5858 | #endif | |
5859 | }, | |
5860 | { "shrih.sn", TILEPRO_OPC_SHRIH_SN, 0x3, 3, TREG_SN, 1, | |
5861 | { { 7, 8, 32 }, { 9, 10, 33 }, { 0, }, { 0, }, { 0, } }, | |
5862 | #ifndef DISASM_ONLY | |
5863 | { | |
5864 | 0x800000007ffe0000ULL, | |
5865 | 0xffff000000000000ULL, | |
5866 | 0ULL, | |
5867 | 0ULL, | |
5868 | 0ULL | |
5869 | }, | |
5870 | { | |
5871 | 0x00000000780c0000ULL, | |
5872 | 0x4406000000000000ULL, | |
5873 | -1ULL, | |
5874 | -1ULL, | |
5875 | -1ULL | |
5876 | } | |
5877 | #endif | |
5878 | }, | |
5879 | { "slt", TILEPRO_OPC_SLT, 0xf, 3, TREG_ZERO, 1, | |
5880 | { { 7, 8, 16 }, { 9, 10, 17 }, { 11, 12, 18 }, { 13, 14, 19 }, { 0, } }, | |
5881 | #ifndef DISASM_ONLY | |
5882 | { | |
5883 | 0x800000007ffc0000ULL, | |
5884 | 0xfffe000000000000ULL, | |
5885 | 0x80000000780c0000ULL, | |
5886 | 0xf806000000000000ULL, | |
5887 | 0ULL | |
5888 | }, | |
5889 | { | |
5890 | 0x00000000014c0000ULL, | |
5891 | 0x086a000000000000ULL, | |
5892 | 0x8000000028080000ULL, | |
5893 | 0xa804000000000000ULL, | |
5894 | -1ULL | |
5895 | } | |
5896 | #endif | |
5897 | }, | |
5898 | { "slt.sn", TILEPRO_OPC_SLT_SN, 0x3, 3, TREG_SN, 1, | |
5899 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
5900 | #ifndef DISASM_ONLY | |
5901 | { | |
5902 | 0x800000007ffc0000ULL, | |
5903 | 0xfffe000000000000ULL, | |
5904 | 0ULL, | |
5905 | 0ULL, | |
5906 | 0ULL | |
5907 | }, | |
5908 | { | |
5909 | 0x00000000094c0000ULL, | |
5910 | 0x0c6a000000000000ULL, | |
5911 | -1ULL, | |
5912 | -1ULL, | |
5913 | -1ULL | |
5914 | } | |
5915 | #endif | |
5916 | }, | |
5917 | { "slt_u", TILEPRO_OPC_SLT_U, 0xf, 3, TREG_ZERO, 1, | |
5918 | { { 7, 8, 16 }, { 9, 10, 17 }, { 11, 12, 18 }, { 13, 14, 19 }, { 0, } }, | |
5919 | #ifndef DISASM_ONLY | |
5920 | { | |
5921 | 0x800000007ffc0000ULL, | |
5922 | 0xfffe000000000000ULL, | |
5923 | 0x80000000780c0000ULL, | |
5924 | 0xf806000000000000ULL, | |
5925 | 0ULL | |
5926 | }, | |
5927 | { | |
5928 | 0x0000000001500000ULL, | |
5929 | 0x086c000000000000ULL, | |
5930 | 0x80000000280c0000ULL, | |
5931 | 0xa806000000000000ULL, | |
5932 | -1ULL | |
5933 | } | |
5934 | #endif | |
5935 | }, | |
5936 | { "slt_u.sn", TILEPRO_OPC_SLT_U_SN, 0x3, 3, TREG_SN, 1, | |
5937 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
5938 | #ifndef DISASM_ONLY | |
5939 | { | |
5940 | 0x800000007ffc0000ULL, | |
5941 | 0xfffe000000000000ULL, | |
5942 | 0ULL, | |
5943 | 0ULL, | |
5944 | 0ULL | |
5945 | }, | |
5946 | { | |
5947 | 0x0000000009500000ULL, | |
5948 | 0x0c6c000000000000ULL, | |
5949 | -1ULL, | |
5950 | -1ULL, | |
5951 | -1ULL | |
5952 | } | |
5953 | #endif | |
5954 | }, | |
5955 | { "sltb", TILEPRO_OPC_SLTB, 0x3, 3, TREG_ZERO, 1, | |
5956 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
5957 | #ifndef DISASM_ONLY | |
5958 | { | |
5959 | 0x800000007ffc0000ULL, | |
5960 | 0xfffe000000000000ULL, | |
5961 | 0ULL, | |
5962 | 0ULL, | |
5963 | 0ULL | |
5964 | }, | |
5965 | { | |
5966 | 0x0000000001240000ULL, | |
5967 | 0x0856000000000000ULL, | |
5968 | -1ULL, | |
5969 | -1ULL, | |
5970 | -1ULL | |
5971 | } | |
5972 | #endif | |
5973 | }, | |
5974 | { "sltb.sn", TILEPRO_OPC_SLTB_SN, 0x3, 3, TREG_SN, 1, | |
5975 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
5976 | #ifndef DISASM_ONLY | |
5977 | { | |
5978 | 0x800000007ffc0000ULL, | |
5979 | 0xfffe000000000000ULL, | |
5980 | 0ULL, | |
5981 | 0ULL, | |
5982 | 0ULL | |
5983 | }, | |
5984 | { | |
5985 | 0x0000000009240000ULL, | |
5986 | 0x0c56000000000000ULL, | |
5987 | -1ULL, | |
5988 | -1ULL, | |
5989 | -1ULL | |
5990 | } | |
5991 | #endif | |
5992 | }, | |
5993 | { "sltb_u", TILEPRO_OPC_SLTB_U, 0x3, 3, TREG_ZERO, 1, | |
5994 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
5995 | #ifndef DISASM_ONLY | |
5996 | { | |
5997 | 0x800000007ffc0000ULL, | |
5998 | 0xfffe000000000000ULL, | |
5999 | 0ULL, | |
6000 | 0ULL, | |
6001 | 0ULL | |
6002 | }, | |
6003 | { | |
6004 | 0x0000000001280000ULL, | |
6005 | 0x0858000000000000ULL, | |
6006 | -1ULL, | |
6007 | -1ULL, | |
6008 | -1ULL | |
6009 | } | |
6010 | #endif | |
6011 | }, | |
6012 | { "sltb_u.sn", TILEPRO_OPC_SLTB_U_SN, 0x3, 3, TREG_SN, 1, | |
6013 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
6014 | #ifndef DISASM_ONLY | |
6015 | { | |
6016 | 0x800000007ffc0000ULL, | |
6017 | 0xfffe000000000000ULL, | |
6018 | 0ULL, | |
6019 | 0ULL, | |
6020 | 0ULL | |
6021 | }, | |
6022 | { | |
6023 | 0x0000000009280000ULL, | |
6024 | 0x0c58000000000000ULL, | |
6025 | -1ULL, | |
6026 | -1ULL, | |
6027 | -1ULL | |
6028 | } | |
6029 | #endif | |
6030 | }, | |
6031 | { "slte", TILEPRO_OPC_SLTE, 0xf, 3, TREG_ZERO, 1, | |
6032 | { { 7, 8, 16 }, { 9, 10, 17 }, { 11, 12, 18 }, { 13, 14, 19 }, { 0, } }, | |
6033 | #ifndef DISASM_ONLY | |
6034 | { | |
6035 | 0x800000007ffc0000ULL, | |
6036 | 0xfffe000000000000ULL, | |
6037 | 0x80000000780c0000ULL, | |
6038 | 0xf806000000000000ULL, | |
6039 | 0ULL | |
6040 | }, | |
6041 | { | |
6042 | 0x00000000013c0000ULL, | |
6043 | 0x0862000000000000ULL, | |
6044 | 0x8000000028000000ULL, | |
6045 | 0xa800000000000000ULL, | |
6046 | -1ULL | |
6047 | } | |
6048 | #endif | |
6049 | }, | |
6050 | { "slte.sn", TILEPRO_OPC_SLTE_SN, 0x3, 3, TREG_SN, 1, | |
6051 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
6052 | #ifndef DISASM_ONLY | |
6053 | { | |
6054 | 0x800000007ffc0000ULL, | |
6055 | 0xfffe000000000000ULL, | |
6056 | 0ULL, | |
6057 | 0ULL, | |
6058 | 0ULL | |
6059 | }, | |
6060 | { | |
6061 | 0x00000000093c0000ULL, | |
6062 | 0x0c62000000000000ULL, | |
6063 | -1ULL, | |
6064 | -1ULL, | |
6065 | -1ULL | |
6066 | } | |
6067 | #endif | |
6068 | }, | |
6069 | { "slte_u", TILEPRO_OPC_SLTE_U, 0xf, 3, TREG_ZERO, 1, | |
6070 | { { 7, 8, 16 }, { 9, 10, 17 }, { 11, 12, 18 }, { 13, 14, 19 }, { 0, } }, | |
6071 | #ifndef DISASM_ONLY | |
6072 | { | |
6073 | 0x800000007ffc0000ULL, | |
6074 | 0xfffe000000000000ULL, | |
6075 | 0x80000000780c0000ULL, | |
6076 | 0xf806000000000000ULL, | |
6077 | 0ULL | |
6078 | }, | |
6079 | { | |
6080 | 0x0000000001400000ULL, | |
6081 | 0x0864000000000000ULL, | |
6082 | 0x8000000028040000ULL, | |
6083 | 0xa802000000000000ULL, | |
6084 | -1ULL | |
6085 | } | |
6086 | #endif | |
6087 | }, | |
6088 | { "slte_u.sn", TILEPRO_OPC_SLTE_U_SN, 0x3, 3, TREG_SN, 1, | |
6089 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
6090 | #ifndef DISASM_ONLY | |
6091 | { | |
6092 | 0x800000007ffc0000ULL, | |
6093 | 0xfffe000000000000ULL, | |
6094 | 0ULL, | |
6095 | 0ULL, | |
6096 | 0ULL | |
6097 | }, | |
6098 | { | |
6099 | 0x0000000009400000ULL, | |
6100 | 0x0c64000000000000ULL, | |
6101 | -1ULL, | |
6102 | -1ULL, | |
6103 | -1ULL | |
6104 | } | |
6105 | #endif | |
6106 | }, | |
6107 | { "slteb", TILEPRO_OPC_SLTEB, 0x3, 3, TREG_ZERO, 1, | |
6108 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
6109 | #ifndef DISASM_ONLY | |
6110 | { | |
6111 | 0x800000007ffc0000ULL, | |
6112 | 0xfffe000000000000ULL, | |
6113 | 0ULL, | |
6114 | 0ULL, | |
6115 | 0ULL | |
6116 | }, | |
6117 | { | |
6118 | 0x00000000012c0000ULL, | |
6119 | 0x085a000000000000ULL, | |
6120 | -1ULL, | |
6121 | -1ULL, | |
6122 | -1ULL | |
6123 | } | |
6124 | #endif | |
6125 | }, | |
6126 | { "slteb.sn", TILEPRO_OPC_SLTEB_SN, 0x3, 3, TREG_SN, 1, | |
6127 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
6128 | #ifndef DISASM_ONLY | |
6129 | { | |
6130 | 0x800000007ffc0000ULL, | |
6131 | 0xfffe000000000000ULL, | |
6132 | 0ULL, | |
6133 | 0ULL, | |
6134 | 0ULL | |
6135 | }, | |
6136 | { | |
6137 | 0x00000000092c0000ULL, | |
6138 | 0x0c5a000000000000ULL, | |
6139 | -1ULL, | |
6140 | -1ULL, | |
6141 | -1ULL | |
6142 | } | |
6143 | #endif | |
6144 | }, | |
6145 | { "slteb_u", TILEPRO_OPC_SLTEB_U, 0x3, 3, TREG_ZERO, 1, | |
6146 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
6147 | #ifndef DISASM_ONLY | |
6148 | { | |
6149 | 0x800000007ffc0000ULL, | |
6150 | 0xfffe000000000000ULL, | |
6151 | 0ULL, | |
6152 | 0ULL, | |
6153 | 0ULL | |
6154 | }, | |
6155 | { | |
6156 | 0x0000000001300000ULL, | |
6157 | 0x085c000000000000ULL, | |
6158 | -1ULL, | |
6159 | -1ULL, | |
6160 | -1ULL | |
6161 | } | |
6162 | #endif | |
6163 | }, | |
6164 | { "slteb_u.sn", TILEPRO_OPC_SLTEB_U_SN, 0x3, 3, TREG_SN, 1, | |
6165 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
6166 | #ifndef DISASM_ONLY | |
6167 | { | |
6168 | 0x800000007ffc0000ULL, | |
6169 | 0xfffe000000000000ULL, | |
6170 | 0ULL, | |
6171 | 0ULL, | |
6172 | 0ULL | |
6173 | }, | |
6174 | { | |
6175 | 0x0000000009300000ULL, | |
6176 | 0x0c5c000000000000ULL, | |
6177 | -1ULL, | |
6178 | -1ULL, | |
6179 | -1ULL | |
6180 | } | |
6181 | #endif | |
6182 | }, | |
6183 | { "slteh", TILEPRO_OPC_SLTEH, 0x3, 3, TREG_ZERO, 1, | |
6184 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
6185 | #ifndef DISASM_ONLY | |
6186 | { | |
6187 | 0x800000007ffc0000ULL, | |
6188 | 0xfffe000000000000ULL, | |
6189 | 0ULL, | |
6190 | 0ULL, | |
6191 | 0ULL | |
6192 | }, | |
6193 | { | |
6194 | 0x0000000001340000ULL, | |
6195 | 0x085e000000000000ULL, | |
6196 | -1ULL, | |
6197 | -1ULL, | |
6198 | -1ULL | |
6199 | } | |
6200 | #endif | |
6201 | }, | |
6202 | { "slteh.sn", TILEPRO_OPC_SLTEH_SN, 0x3, 3, TREG_SN, 1, | |
6203 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
6204 | #ifndef DISASM_ONLY | |
6205 | { | |
6206 | 0x800000007ffc0000ULL, | |
6207 | 0xfffe000000000000ULL, | |
6208 | 0ULL, | |
6209 | 0ULL, | |
6210 | 0ULL | |
6211 | }, | |
6212 | { | |
6213 | 0x0000000009340000ULL, | |
6214 | 0x0c5e000000000000ULL, | |
6215 | -1ULL, | |
6216 | -1ULL, | |
6217 | -1ULL | |
6218 | } | |
6219 | #endif | |
6220 | }, | |
6221 | { "slteh_u", TILEPRO_OPC_SLTEH_U, 0x3, 3, TREG_ZERO, 1, | |
6222 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
6223 | #ifndef DISASM_ONLY | |
6224 | { | |
6225 | 0x800000007ffc0000ULL, | |
6226 | 0xfffe000000000000ULL, | |
6227 | 0ULL, | |
6228 | 0ULL, | |
6229 | 0ULL | |
6230 | }, | |
6231 | { | |
6232 | 0x0000000001380000ULL, | |
6233 | 0x0860000000000000ULL, | |
6234 | -1ULL, | |
6235 | -1ULL, | |
6236 | -1ULL | |
6237 | } | |
6238 | #endif | |
6239 | }, | |
6240 | { "slteh_u.sn", TILEPRO_OPC_SLTEH_U_SN, 0x3, 3, TREG_SN, 1, | |
6241 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
6242 | #ifndef DISASM_ONLY | |
6243 | { | |
6244 | 0x800000007ffc0000ULL, | |
6245 | 0xfffe000000000000ULL, | |
6246 | 0ULL, | |
6247 | 0ULL, | |
6248 | 0ULL | |
6249 | }, | |
6250 | { | |
6251 | 0x0000000009380000ULL, | |
6252 | 0x0c60000000000000ULL, | |
6253 | -1ULL, | |
6254 | -1ULL, | |
6255 | -1ULL | |
6256 | } | |
6257 | #endif | |
6258 | }, | |
6259 | { "slth", TILEPRO_OPC_SLTH, 0x3, 3, TREG_ZERO, 1, | |
6260 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
6261 | #ifndef DISASM_ONLY | |
6262 | { | |
6263 | 0x800000007ffc0000ULL, | |
6264 | 0xfffe000000000000ULL, | |
6265 | 0ULL, | |
6266 | 0ULL, | |
6267 | 0ULL | |
6268 | }, | |
6269 | { | |
6270 | 0x0000000001440000ULL, | |
6271 | 0x0866000000000000ULL, | |
6272 | -1ULL, | |
6273 | -1ULL, | |
6274 | -1ULL | |
6275 | } | |
6276 | #endif | |
6277 | }, | |
6278 | { "slth.sn", TILEPRO_OPC_SLTH_SN, 0x3, 3, TREG_SN, 1, | |
6279 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
6280 | #ifndef DISASM_ONLY | |
6281 | { | |
6282 | 0x800000007ffc0000ULL, | |
6283 | 0xfffe000000000000ULL, | |
6284 | 0ULL, | |
6285 | 0ULL, | |
6286 | 0ULL | |
6287 | }, | |
6288 | { | |
6289 | 0x0000000009440000ULL, | |
6290 | 0x0c66000000000000ULL, | |
6291 | -1ULL, | |
6292 | -1ULL, | |
6293 | -1ULL | |
6294 | } | |
6295 | #endif | |
6296 | }, | |
6297 | { "slth_u", TILEPRO_OPC_SLTH_U, 0x3, 3, TREG_ZERO, 1, | |
6298 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
6299 | #ifndef DISASM_ONLY | |
6300 | { | |
6301 | 0x800000007ffc0000ULL, | |
6302 | 0xfffe000000000000ULL, | |
6303 | 0ULL, | |
6304 | 0ULL, | |
6305 | 0ULL | |
6306 | }, | |
6307 | { | |
6308 | 0x0000000001480000ULL, | |
6309 | 0x0868000000000000ULL, | |
6310 | -1ULL, | |
6311 | -1ULL, | |
6312 | -1ULL | |
6313 | } | |
6314 | #endif | |
6315 | }, | |
6316 | { "slth_u.sn", TILEPRO_OPC_SLTH_U_SN, 0x3, 3, TREG_SN, 1, | |
6317 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
6318 | #ifndef DISASM_ONLY | |
6319 | { | |
6320 | 0x800000007ffc0000ULL, | |
6321 | 0xfffe000000000000ULL, | |
6322 | 0ULL, | |
6323 | 0ULL, | |
6324 | 0ULL | |
6325 | }, | |
6326 | { | |
6327 | 0x0000000009480000ULL, | |
6328 | 0x0c68000000000000ULL, | |
6329 | -1ULL, | |
6330 | -1ULL, | |
6331 | -1ULL | |
6332 | } | |
6333 | #endif | |
6334 | }, | |
6335 | { "slti", TILEPRO_OPC_SLTI, 0xf, 3, TREG_ZERO, 1, | |
6336 | { { 7, 8, 0 }, { 9, 10, 1 }, { 11, 12, 2 }, { 13, 14, 3 }, { 0, } }, | |
6337 | #ifndef DISASM_ONLY | |
6338 | { | |
6339 | 0x800000007ff00000ULL, | |
6340 | 0xfff8000000000000ULL, | |
6341 | 0x8000000078000000ULL, | |
6342 | 0xf800000000000000ULL, | |
6343 | 0ULL | |
6344 | }, | |
6345 | { | |
6346 | 0x0000000041000000ULL, | |
6347 | 0x3098000000000000ULL, | |
6348 | 0x8000000070000000ULL, | |
6349 | 0xe000000000000000ULL, | |
6350 | -1ULL | |
6351 | } | |
6352 | #endif | |
6353 | }, | |
6354 | { "slti.sn", TILEPRO_OPC_SLTI_SN, 0x3, 3, TREG_SN, 1, | |
6355 | { { 7, 8, 0 }, { 9, 10, 1 }, { 0, }, { 0, }, { 0, } }, | |
6356 | #ifndef DISASM_ONLY | |
6357 | { | |
6358 | 0x800000007ff00000ULL, | |
6359 | 0xfff8000000000000ULL, | |
6360 | 0ULL, | |
6361 | 0ULL, | |
6362 | 0ULL | |
6363 | }, | |
6364 | { | |
6365 | 0x0000000049000000ULL, | |
6366 | 0x3498000000000000ULL, | |
6367 | -1ULL, | |
6368 | -1ULL, | |
6369 | -1ULL | |
6370 | } | |
6371 | #endif | |
6372 | }, | |
6373 | { "slti_u", TILEPRO_OPC_SLTI_U, 0xf, 3, TREG_ZERO, 1, | |
6374 | { { 7, 8, 0 }, { 9, 10, 1 }, { 11, 12, 2 }, { 13, 14, 3 }, { 0, } }, | |
6375 | #ifndef DISASM_ONLY | |
6376 | { | |
6377 | 0x800000007ff00000ULL, | |
6378 | 0xfff8000000000000ULL, | |
6379 | 0x8000000078000000ULL, | |
6380 | 0xf800000000000000ULL, | |
6381 | 0ULL | |
6382 | }, | |
6383 | { | |
6384 | 0x0000000041100000ULL, | |
6385 | 0x30a0000000000000ULL, | |
6386 | 0x8000000078000000ULL, | |
6387 | 0xe800000000000000ULL, | |
6388 | -1ULL | |
6389 | } | |
6390 | #endif | |
6391 | }, | |
6392 | { "slti_u.sn", TILEPRO_OPC_SLTI_U_SN, 0x3, 3, TREG_SN, 1, | |
6393 | { { 7, 8, 0 }, { 9, 10, 1 }, { 0, }, { 0, }, { 0, } }, | |
6394 | #ifndef DISASM_ONLY | |
6395 | { | |
6396 | 0x800000007ff00000ULL, | |
6397 | 0xfff8000000000000ULL, | |
6398 | 0ULL, | |
6399 | 0ULL, | |
6400 | 0ULL | |
6401 | }, | |
6402 | { | |
6403 | 0x0000000049100000ULL, | |
6404 | 0x34a0000000000000ULL, | |
6405 | -1ULL, | |
6406 | -1ULL, | |
6407 | -1ULL | |
6408 | } | |
6409 | #endif | |
6410 | }, | |
6411 | { "sltib", TILEPRO_OPC_SLTIB, 0x3, 3, TREG_ZERO, 1, | |
6412 | { { 7, 8, 0 }, { 9, 10, 1 }, { 0, }, { 0, }, { 0, } }, | |
6413 | #ifndef DISASM_ONLY | |
6414 | { | |
6415 | 0x800000007ff00000ULL, | |
6416 | 0xfff8000000000000ULL, | |
6417 | 0ULL, | |
6418 | 0ULL, | |
6419 | 0ULL | |
6420 | }, | |
6421 | { | |
6422 | 0x0000000040c00000ULL, | |
6423 | 0x3078000000000000ULL, | |
6424 | -1ULL, | |
6425 | -1ULL, | |
6426 | -1ULL | |
6427 | } | |
6428 | #endif | |
6429 | }, | |
6430 | { "sltib.sn", TILEPRO_OPC_SLTIB_SN, 0x3, 3, TREG_SN, 1, | |
6431 | { { 7, 8, 0 }, { 9, 10, 1 }, { 0, }, { 0, }, { 0, } }, | |
6432 | #ifndef DISASM_ONLY | |
6433 | { | |
6434 | 0x800000007ff00000ULL, | |
6435 | 0xfff8000000000000ULL, | |
6436 | 0ULL, | |
6437 | 0ULL, | |
6438 | 0ULL | |
6439 | }, | |
6440 | { | |
6441 | 0x0000000048c00000ULL, | |
6442 | 0x3478000000000000ULL, | |
6443 | -1ULL, | |
6444 | -1ULL, | |
6445 | -1ULL | |
6446 | } | |
6447 | #endif | |
6448 | }, | |
6449 | { "sltib_u", TILEPRO_OPC_SLTIB_U, 0x3, 3, TREG_ZERO, 1, | |
6450 | { { 7, 8, 0 }, { 9, 10, 1 }, { 0, }, { 0, }, { 0, } }, | |
6451 | #ifndef DISASM_ONLY | |
6452 | { | |
6453 | 0x800000007ff00000ULL, | |
6454 | 0xfff8000000000000ULL, | |
6455 | 0ULL, | |
6456 | 0ULL, | |
6457 | 0ULL | |
6458 | }, | |
6459 | { | |
6460 | 0x0000000040d00000ULL, | |
6461 | 0x3080000000000000ULL, | |
6462 | -1ULL, | |
6463 | -1ULL, | |
6464 | -1ULL | |
6465 | } | |
6466 | #endif | |
6467 | }, | |
6468 | { "sltib_u.sn", TILEPRO_OPC_SLTIB_U_SN, 0x3, 3, TREG_SN, 1, | |
6469 | { { 7, 8, 0 }, { 9, 10, 1 }, { 0, }, { 0, }, { 0, } }, | |
6470 | #ifndef DISASM_ONLY | |
6471 | { | |
6472 | 0x800000007ff00000ULL, | |
6473 | 0xfff8000000000000ULL, | |
6474 | 0ULL, | |
6475 | 0ULL, | |
6476 | 0ULL | |
6477 | }, | |
6478 | { | |
6479 | 0x0000000048d00000ULL, | |
6480 | 0x3480000000000000ULL, | |
6481 | -1ULL, | |
6482 | -1ULL, | |
6483 | -1ULL | |
6484 | } | |
6485 | #endif | |
6486 | }, | |
6487 | { "sltih", TILEPRO_OPC_SLTIH, 0x3, 3, TREG_ZERO, 1, | |
6488 | { { 7, 8, 0 }, { 9, 10, 1 }, { 0, }, { 0, }, { 0, } }, | |
6489 | #ifndef DISASM_ONLY | |
6490 | { | |
6491 | 0x800000007ff00000ULL, | |
6492 | 0xfff8000000000000ULL, | |
6493 | 0ULL, | |
6494 | 0ULL, | |
6495 | 0ULL | |
6496 | }, | |
6497 | { | |
6498 | 0x0000000040e00000ULL, | |
6499 | 0x3088000000000000ULL, | |
6500 | -1ULL, | |
6501 | -1ULL, | |
6502 | -1ULL | |
6503 | } | |
6504 | #endif | |
6505 | }, | |
6506 | { "sltih.sn", TILEPRO_OPC_SLTIH_SN, 0x3, 3, TREG_SN, 1, | |
6507 | { { 7, 8, 0 }, { 9, 10, 1 }, { 0, }, { 0, }, { 0, } }, | |
6508 | #ifndef DISASM_ONLY | |
6509 | { | |
6510 | 0x800000007ff00000ULL, | |
6511 | 0xfff8000000000000ULL, | |
6512 | 0ULL, | |
6513 | 0ULL, | |
6514 | 0ULL | |
6515 | }, | |
6516 | { | |
6517 | 0x0000000048e00000ULL, | |
6518 | 0x3488000000000000ULL, | |
6519 | -1ULL, | |
6520 | -1ULL, | |
6521 | -1ULL | |
6522 | } | |
6523 | #endif | |
6524 | }, | |
6525 | { "sltih_u", TILEPRO_OPC_SLTIH_U, 0x3, 3, TREG_ZERO, 1, | |
6526 | { { 7, 8, 0 }, { 9, 10, 1 }, { 0, }, { 0, }, { 0, } }, | |
6527 | #ifndef DISASM_ONLY | |
6528 | { | |
6529 | 0x800000007ff00000ULL, | |
6530 | 0xfff8000000000000ULL, | |
6531 | 0ULL, | |
6532 | 0ULL, | |
6533 | 0ULL | |
6534 | }, | |
6535 | { | |
6536 | 0x0000000040f00000ULL, | |
6537 | 0x3090000000000000ULL, | |
6538 | -1ULL, | |
6539 | -1ULL, | |
6540 | -1ULL | |
6541 | } | |
6542 | #endif | |
6543 | }, | |
6544 | { "sltih_u.sn", TILEPRO_OPC_SLTIH_U_SN, 0x3, 3, TREG_SN, 1, | |
6545 | { { 7, 8, 0 }, { 9, 10, 1 }, { 0, }, { 0, }, { 0, } }, | |
6546 | #ifndef DISASM_ONLY | |
6547 | { | |
6548 | 0x800000007ff00000ULL, | |
6549 | 0xfff8000000000000ULL, | |
6550 | 0ULL, | |
6551 | 0ULL, | |
6552 | 0ULL | |
6553 | }, | |
6554 | { | |
6555 | 0x0000000048f00000ULL, | |
6556 | 0x3490000000000000ULL, | |
6557 | -1ULL, | |
6558 | -1ULL, | |
6559 | -1ULL | |
6560 | } | |
6561 | #endif | |
6562 | }, | |
6563 | { "sne", TILEPRO_OPC_SNE, 0xf, 3, TREG_ZERO, 1, | |
6564 | { { 7, 8, 16 }, { 9, 10, 17 }, { 11, 12, 18 }, { 13, 14, 19 }, { 0, } }, | |
6565 | #ifndef DISASM_ONLY | |
6566 | { | |
6567 | 0x800000007ffc0000ULL, | |
6568 | 0xfffe000000000000ULL, | |
6569 | 0x80000000780c0000ULL, | |
6570 | 0xf806000000000000ULL, | |
6571 | 0ULL | |
6572 | }, | |
6573 | { | |
6574 | 0x00000000015c0000ULL, | |
6575 | 0x0872000000000000ULL, | |
6576 | 0x80000000300c0000ULL, | |
6577 | 0xb006000000000000ULL, | |
6578 | -1ULL | |
6579 | } | |
6580 | #endif | |
6581 | }, | |
6582 | { "sne.sn", TILEPRO_OPC_SNE_SN, 0x3, 3, TREG_SN, 1, | |
6583 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
6584 | #ifndef DISASM_ONLY | |
6585 | { | |
6586 | 0x800000007ffc0000ULL, | |
6587 | 0xfffe000000000000ULL, | |
6588 | 0ULL, | |
6589 | 0ULL, | |
6590 | 0ULL | |
6591 | }, | |
6592 | { | |
6593 | 0x00000000095c0000ULL, | |
6594 | 0x0c72000000000000ULL, | |
6595 | -1ULL, | |
6596 | -1ULL, | |
6597 | -1ULL | |
6598 | } | |
6599 | #endif | |
6600 | }, | |
6601 | { "sneb", TILEPRO_OPC_SNEB, 0x3, 3, TREG_ZERO, 1, | |
6602 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
6603 | #ifndef DISASM_ONLY | |
6604 | { | |
6605 | 0x800000007ffc0000ULL, | |
6606 | 0xfffe000000000000ULL, | |
6607 | 0ULL, | |
6608 | 0ULL, | |
6609 | 0ULL | |
6610 | }, | |
6611 | { | |
6612 | 0x0000000001540000ULL, | |
6613 | 0x086e000000000000ULL, | |
6614 | -1ULL, | |
6615 | -1ULL, | |
6616 | -1ULL | |
6617 | } | |
6618 | #endif | |
6619 | }, | |
6620 | { "sneb.sn", TILEPRO_OPC_SNEB_SN, 0x3, 3, TREG_SN, 1, | |
6621 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
6622 | #ifndef DISASM_ONLY | |
6623 | { | |
6624 | 0x800000007ffc0000ULL, | |
6625 | 0xfffe000000000000ULL, | |
6626 | 0ULL, | |
6627 | 0ULL, | |
6628 | 0ULL | |
6629 | }, | |
6630 | { | |
6631 | 0x0000000009540000ULL, | |
6632 | 0x0c6e000000000000ULL, | |
6633 | -1ULL, | |
6634 | -1ULL, | |
6635 | -1ULL | |
6636 | } | |
6637 | #endif | |
6638 | }, | |
6639 | { "sneh", TILEPRO_OPC_SNEH, 0x3, 3, TREG_ZERO, 1, | |
6640 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
6641 | #ifndef DISASM_ONLY | |
6642 | { | |
6643 | 0x800000007ffc0000ULL, | |
6644 | 0xfffe000000000000ULL, | |
6645 | 0ULL, | |
6646 | 0ULL, | |
6647 | 0ULL | |
6648 | }, | |
6649 | { | |
6650 | 0x0000000001580000ULL, | |
6651 | 0x0870000000000000ULL, | |
6652 | -1ULL, | |
6653 | -1ULL, | |
6654 | -1ULL | |
6655 | } | |
6656 | #endif | |
6657 | }, | |
6658 | { "sneh.sn", TILEPRO_OPC_SNEH_SN, 0x3, 3, TREG_SN, 1, | |
6659 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
6660 | #ifndef DISASM_ONLY | |
6661 | { | |
6662 | 0x800000007ffc0000ULL, | |
6663 | 0xfffe000000000000ULL, | |
6664 | 0ULL, | |
6665 | 0ULL, | |
6666 | 0ULL | |
6667 | }, | |
6668 | { | |
6669 | 0x0000000009580000ULL, | |
6670 | 0x0c70000000000000ULL, | |
6671 | -1ULL, | |
6672 | -1ULL, | |
6673 | -1ULL | |
6674 | } | |
6675 | #endif | |
6676 | }, | |
6677 | { "sra", TILEPRO_OPC_SRA, 0xf, 3, TREG_ZERO, 1, | |
6678 | { { 7, 8, 16 }, { 9, 10, 17 }, { 11, 12, 18 }, { 13, 14, 19 }, { 0, } }, | |
6679 | #ifndef DISASM_ONLY | |
6680 | { | |
6681 | 0x800000007ffc0000ULL, | |
6682 | 0xfffe000000000000ULL, | |
6683 | 0x80000000780c0000ULL, | |
6684 | 0xf806000000000000ULL, | |
6685 | 0ULL | |
6686 | }, | |
6687 | { | |
6688 | 0x0000000001680000ULL, | |
6689 | 0x0878000000000000ULL, | |
6690 | 0x80000000200c0000ULL, | |
6691 | 0xa006000000000000ULL, | |
6692 | -1ULL | |
6693 | } | |
6694 | #endif | |
6695 | }, | |
6696 | { "sra.sn", TILEPRO_OPC_SRA_SN, 0x3, 3, TREG_SN, 1, | |
6697 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
6698 | #ifndef DISASM_ONLY | |
6699 | { | |
6700 | 0x800000007ffc0000ULL, | |
6701 | 0xfffe000000000000ULL, | |
6702 | 0ULL, | |
6703 | 0ULL, | |
6704 | 0ULL | |
6705 | }, | |
6706 | { | |
6707 | 0x0000000009680000ULL, | |
6708 | 0x0c78000000000000ULL, | |
6709 | -1ULL, | |
6710 | -1ULL, | |
6711 | -1ULL | |
6712 | } | |
6713 | #endif | |
6714 | }, | |
6715 | { "srab", TILEPRO_OPC_SRAB, 0x3, 3, TREG_ZERO, 1, | |
6716 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
6717 | #ifndef DISASM_ONLY | |
6718 | { | |
6719 | 0x800000007ffc0000ULL, | |
6720 | 0xfffe000000000000ULL, | |
6721 | 0ULL, | |
6722 | 0ULL, | |
6723 | 0ULL | |
6724 | }, | |
6725 | { | |
6726 | 0x0000000001600000ULL, | |
6727 | 0x0874000000000000ULL, | |
6728 | -1ULL, | |
6729 | -1ULL, | |
6730 | -1ULL | |
6731 | } | |
6732 | #endif | |
6733 | }, | |
6734 | { "srab.sn", TILEPRO_OPC_SRAB_SN, 0x3, 3, TREG_SN, 1, | |
6735 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
6736 | #ifndef DISASM_ONLY | |
6737 | { | |
6738 | 0x800000007ffc0000ULL, | |
6739 | 0xfffe000000000000ULL, | |
6740 | 0ULL, | |
6741 | 0ULL, | |
6742 | 0ULL | |
6743 | }, | |
6744 | { | |
6745 | 0x0000000009600000ULL, | |
6746 | 0x0c74000000000000ULL, | |
6747 | -1ULL, | |
6748 | -1ULL, | |
6749 | -1ULL | |
6750 | } | |
6751 | #endif | |
6752 | }, | |
6753 | { "srah", TILEPRO_OPC_SRAH, 0x3, 3, TREG_ZERO, 1, | |
6754 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
6755 | #ifndef DISASM_ONLY | |
6756 | { | |
6757 | 0x800000007ffc0000ULL, | |
6758 | 0xfffe000000000000ULL, | |
6759 | 0ULL, | |
6760 | 0ULL, | |
6761 | 0ULL | |
6762 | }, | |
6763 | { | |
6764 | 0x0000000001640000ULL, | |
6765 | 0x0876000000000000ULL, | |
6766 | -1ULL, | |
6767 | -1ULL, | |
6768 | -1ULL | |
6769 | } | |
6770 | #endif | |
6771 | }, | |
6772 | { "srah.sn", TILEPRO_OPC_SRAH_SN, 0x3, 3, TREG_SN, 1, | |
6773 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
6774 | #ifndef DISASM_ONLY | |
6775 | { | |
6776 | 0x800000007ffc0000ULL, | |
6777 | 0xfffe000000000000ULL, | |
6778 | 0ULL, | |
6779 | 0ULL, | |
6780 | 0ULL | |
6781 | }, | |
6782 | { | |
6783 | 0x0000000009640000ULL, | |
6784 | 0x0c76000000000000ULL, | |
6785 | -1ULL, | |
6786 | -1ULL, | |
6787 | -1ULL | |
6788 | } | |
6789 | #endif | |
6790 | }, | |
6791 | { "srai", TILEPRO_OPC_SRAI, 0xf, 3, TREG_ZERO, 1, | |
6792 | { { 7, 8, 32 }, { 9, 10, 33 }, { 11, 12, 34 }, { 13, 14, 35 }, { 0, } }, | |
6793 | #ifndef DISASM_ONLY | |
6794 | { | |
6795 | 0x800000007ffe0000ULL, | |
6796 | 0xffff000000000000ULL, | |
6797 | 0x80000000780e0000ULL, | |
6798 | 0xf807000000000000ULL, | |
6799 | 0ULL | |
6800 | }, | |
6801 | { | |
6802 | 0x0000000070140000ULL, | |
6803 | 0x400a000000000000ULL, | |
6804 | 0x8000000068080000ULL, | |
6805 | 0xd804000000000000ULL, | |
6806 | -1ULL | |
6807 | } | |
6808 | #endif | |
6809 | }, | |
6810 | { "srai.sn", TILEPRO_OPC_SRAI_SN, 0x3, 3, TREG_SN, 1, | |
6811 | { { 7, 8, 32 }, { 9, 10, 33 }, { 0, }, { 0, }, { 0, } }, | |
6812 | #ifndef DISASM_ONLY | |
6813 | { | |
6814 | 0x800000007ffe0000ULL, | |
6815 | 0xffff000000000000ULL, | |
6816 | 0ULL, | |
6817 | 0ULL, | |
6818 | 0ULL | |
6819 | }, | |
6820 | { | |
6821 | 0x0000000078140000ULL, | |
6822 | 0x440a000000000000ULL, | |
6823 | -1ULL, | |
6824 | -1ULL, | |
6825 | -1ULL | |
6826 | } | |
6827 | #endif | |
6828 | }, | |
6829 | { "sraib", TILEPRO_OPC_SRAIB, 0x3, 3, TREG_ZERO, 1, | |
6830 | { { 7, 8, 32 }, { 9, 10, 33 }, { 0, }, { 0, }, { 0, } }, | |
6831 | #ifndef DISASM_ONLY | |
6832 | { | |
6833 | 0x800000007ffe0000ULL, | |
6834 | 0xffff000000000000ULL, | |
6835 | 0ULL, | |
6836 | 0ULL, | |
6837 | 0ULL | |
6838 | }, | |
6839 | { | |
6840 | 0x0000000070100000ULL, | |
6841 | 0x4008000000000000ULL, | |
6842 | -1ULL, | |
6843 | -1ULL, | |
6844 | -1ULL | |
6845 | } | |
6846 | #endif | |
6847 | }, | |
6848 | { "sraib.sn", TILEPRO_OPC_SRAIB_SN, 0x3, 3, TREG_SN, 1, | |
6849 | { { 7, 8, 32 }, { 9, 10, 33 }, { 0, }, { 0, }, { 0, } }, | |
6850 | #ifndef DISASM_ONLY | |
6851 | { | |
6852 | 0x800000007ffe0000ULL, | |
6853 | 0xffff000000000000ULL, | |
6854 | 0ULL, | |
6855 | 0ULL, | |
6856 | 0ULL | |
6857 | }, | |
6858 | { | |
6859 | 0x0000000078100000ULL, | |
6860 | 0x4408000000000000ULL, | |
6861 | -1ULL, | |
6862 | -1ULL, | |
6863 | -1ULL | |
6864 | } | |
6865 | #endif | |
6866 | }, | |
6867 | { "sraih", TILEPRO_OPC_SRAIH, 0x3, 3, TREG_ZERO, 1, | |
6868 | { { 7, 8, 32 }, { 9, 10, 33 }, { 0, }, { 0, }, { 0, } }, | |
6869 | #ifndef DISASM_ONLY | |
6870 | { | |
6871 | 0x800000007ffe0000ULL, | |
6872 | 0xffff000000000000ULL, | |
6873 | 0ULL, | |
6874 | 0ULL, | |
6875 | 0ULL | |
6876 | }, | |
6877 | { | |
6878 | 0x0000000070120000ULL, | |
6879 | 0x4009000000000000ULL, | |
6880 | -1ULL, | |
6881 | -1ULL, | |
6882 | -1ULL | |
6883 | } | |
6884 | #endif | |
6885 | }, | |
6886 | { "sraih.sn", TILEPRO_OPC_SRAIH_SN, 0x3, 3, TREG_SN, 1, | |
6887 | { { 7, 8, 32 }, { 9, 10, 33 }, { 0, }, { 0, }, { 0, } }, | |
6888 | #ifndef DISASM_ONLY | |
6889 | { | |
6890 | 0x800000007ffe0000ULL, | |
6891 | 0xffff000000000000ULL, | |
6892 | 0ULL, | |
6893 | 0ULL, | |
6894 | 0ULL | |
6895 | }, | |
6896 | { | |
6897 | 0x0000000078120000ULL, | |
6898 | 0x4409000000000000ULL, | |
6899 | -1ULL, | |
6900 | -1ULL, | |
6901 | -1ULL | |
6902 | } | |
6903 | #endif | |
6904 | }, | |
6905 | { "sub", TILEPRO_OPC_SUB, 0xf, 3, TREG_ZERO, 1, | |
6906 | { { 7, 8, 16 }, { 9, 10, 17 }, { 11, 12, 18 }, { 13, 14, 19 }, { 0, } }, | |
6907 | #ifndef DISASM_ONLY | |
6908 | { | |
6909 | 0x800000007ffc0000ULL, | |
6910 | 0xfffe000000000000ULL, | |
6911 | 0x80000000780c0000ULL, | |
6912 | 0xf806000000000000ULL, | |
6913 | 0ULL | |
6914 | }, | |
6915 | { | |
6916 | 0x0000000001740000ULL, | |
6917 | 0x087e000000000000ULL, | |
6918 | 0x80000000080c0000ULL, | |
6919 | 0x8806000000000000ULL, | |
6920 | -1ULL | |
6921 | } | |
6922 | #endif | |
6923 | }, | |
6924 | { "sub.sn", TILEPRO_OPC_SUB_SN, 0x3, 3, TREG_SN, 1, | |
6925 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
6926 | #ifndef DISASM_ONLY | |
6927 | { | |
6928 | 0x800000007ffc0000ULL, | |
6929 | 0xfffe000000000000ULL, | |
6930 | 0ULL, | |
6931 | 0ULL, | |
6932 | 0ULL | |
6933 | }, | |
6934 | { | |
6935 | 0x0000000009740000ULL, | |
6936 | 0x0c7e000000000000ULL, | |
6937 | -1ULL, | |
6938 | -1ULL, | |
6939 | -1ULL | |
6940 | } | |
6941 | #endif | |
6942 | }, | |
6943 | { "subb", TILEPRO_OPC_SUBB, 0x3, 3, TREG_ZERO, 1, | |
6944 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
6945 | #ifndef DISASM_ONLY | |
6946 | { | |
6947 | 0x800000007ffc0000ULL, | |
6948 | 0xfffe000000000000ULL, | |
6949 | 0ULL, | |
6950 | 0ULL, | |
6951 | 0ULL | |
6952 | }, | |
6953 | { | |
6954 | 0x00000000016c0000ULL, | |
6955 | 0x087a000000000000ULL, | |
6956 | -1ULL, | |
6957 | -1ULL, | |
6958 | -1ULL | |
6959 | } | |
6960 | #endif | |
6961 | }, | |
6962 | { "subb.sn", TILEPRO_OPC_SUBB_SN, 0x3, 3, TREG_SN, 1, | |
6963 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
6964 | #ifndef DISASM_ONLY | |
6965 | { | |
6966 | 0x800000007ffc0000ULL, | |
6967 | 0xfffe000000000000ULL, | |
6968 | 0ULL, | |
6969 | 0ULL, | |
6970 | 0ULL | |
6971 | }, | |
6972 | { | |
6973 | 0x00000000096c0000ULL, | |
6974 | 0x0c7a000000000000ULL, | |
6975 | -1ULL, | |
6976 | -1ULL, | |
6977 | -1ULL | |
6978 | } | |
6979 | #endif | |
6980 | }, | |
6981 | { "subbs_u", TILEPRO_OPC_SUBBS_U, 0x3, 3, TREG_ZERO, 1, | |
6982 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
6983 | #ifndef DISASM_ONLY | |
6984 | { | |
6985 | 0x800000007ffc0000ULL, | |
6986 | 0xfffe000000000000ULL, | |
6987 | 0ULL, | |
6988 | 0ULL, | |
6989 | 0ULL | |
6990 | }, | |
6991 | { | |
6992 | 0x0000000001900000ULL, | |
6993 | 0x088c000000000000ULL, | |
6994 | -1ULL, | |
6995 | -1ULL, | |
6996 | -1ULL | |
6997 | } | |
6998 | #endif | |
6999 | }, | |
7000 | { "subbs_u.sn", TILEPRO_OPC_SUBBS_U_SN, 0x3, 3, TREG_SN, 1, | |
7001 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
7002 | #ifndef DISASM_ONLY | |
7003 | { | |
7004 | 0x800000007ffc0000ULL, | |
7005 | 0xfffe000000000000ULL, | |
7006 | 0ULL, | |
7007 | 0ULL, | |
7008 | 0ULL | |
7009 | }, | |
7010 | { | |
7011 | 0x0000000009900000ULL, | |
7012 | 0x0c8c000000000000ULL, | |
7013 | -1ULL, | |
7014 | -1ULL, | |
7015 | -1ULL | |
7016 | } | |
7017 | #endif | |
7018 | }, | |
7019 | { "subh", TILEPRO_OPC_SUBH, 0x3, 3, TREG_ZERO, 1, | |
7020 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
7021 | #ifndef DISASM_ONLY | |
7022 | { | |
7023 | 0x800000007ffc0000ULL, | |
7024 | 0xfffe000000000000ULL, | |
7025 | 0ULL, | |
7026 | 0ULL, | |
7027 | 0ULL | |
7028 | }, | |
7029 | { | |
7030 | 0x0000000001700000ULL, | |
7031 | 0x087c000000000000ULL, | |
7032 | -1ULL, | |
7033 | -1ULL, | |
7034 | -1ULL | |
7035 | } | |
7036 | #endif | |
7037 | }, | |
7038 | { "subh.sn", TILEPRO_OPC_SUBH_SN, 0x3, 3, TREG_SN, 1, | |
7039 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
7040 | #ifndef DISASM_ONLY | |
7041 | { | |
7042 | 0x800000007ffc0000ULL, | |
7043 | 0xfffe000000000000ULL, | |
7044 | 0ULL, | |
7045 | 0ULL, | |
7046 | 0ULL | |
7047 | }, | |
7048 | { | |
7049 | 0x0000000009700000ULL, | |
7050 | 0x0c7c000000000000ULL, | |
7051 | -1ULL, | |
7052 | -1ULL, | |
7053 | -1ULL | |
7054 | } | |
7055 | #endif | |
7056 | }, | |
7057 | { "subhs", TILEPRO_OPC_SUBHS, 0x3, 3, TREG_ZERO, 1, | |
7058 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
7059 | #ifndef DISASM_ONLY | |
7060 | { | |
7061 | 0x800000007ffc0000ULL, | |
7062 | 0xfffe000000000000ULL, | |
7063 | 0ULL, | |
7064 | 0ULL, | |
7065 | 0ULL | |
7066 | }, | |
7067 | { | |
7068 | 0x0000000001940000ULL, | |
7069 | 0x088e000000000000ULL, | |
7070 | -1ULL, | |
7071 | -1ULL, | |
7072 | -1ULL | |
7073 | } | |
7074 | #endif | |
7075 | }, | |
7076 | { "subhs.sn", TILEPRO_OPC_SUBHS_SN, 0x3, 3, TREG_SN, 1, | |
7077 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
7078 | #ifndef DISASM_ONLY | |
7079 | { | |
7080 | 0x800000007ffc0000ULL, | |
7081 | 0xfffe000000000000ULL, | |
7082 | 0ULL, | |
7083 | 0ULL, | |
7084 | 0ULL | |
7085 | }, | |
7086 | { | |
7087 | 0x0000000009940000ULL, | |
7088 | 0x0c8e000000000000ULL, | |
7089 | -1ULL, | |
7090 | -1ULL, | |
7091 | -1ULL | |
7092 | } | |
7093 | #endif | |
7094 | }, | |
7095 | { "subs", TILEPRO_OPC_SUBS, 0x3, 3, TREG_ZERO, 1, | |
7096 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
7097 | #ifndef DISASM_ONLY | |
7098 | { | |
7099 | 0x800000007ffc0000ULL, | |
7100 | 0xfffe000000000000ULL, | |
7101 | 0ULL, | |
7102 | 0ULL, | |
7103 | 0ULL | |
7104 | }, | |
7105 | { | |
7106 | 0x0000000001840000ULL, | |
7107 | 0x0886000000000000ULL, | |
7108 | -1ULL, | |
7109 | -1ULL, | |
7110 | -1ULL | |
7111 | } | |
7112 | #endif | |
7113 | }, | |
7114 | { "subs.sn", TILEPRO_OPC_SUBS_SN, 0x3, 3, TREG_SN, 1, | |
7115 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
7116 | #ifndef DISASM_ONLY | |
7117 | { | |
7118 | 0x800000007ffc0000ULL, | |
7119 | 0xfffe000000000000ULL, | |
7120 | 0ULL, | |
7121 | 0ULL, | |
7122 | 0ULL | |
7123 | }, | |
7124 | { | |
7125 | 0x0000000009840000ULL, | |
7126 | 0x0c86000000000000ULL, | |
7127 | -1ULL, | |
7128 | -1ULL, | |
7129 | -1ULL | |
7130 | } | |
7131 | #endif | |
7132 | }, | |
7133 | { "sw", TILEPRO_OPC_SW, 0x12, 2, TREG_ZERO, 1, | |
7134 | { { 0, }, { 10, 17 }, { 0, }, { 0, }, { 15, 36 } }, | |
7135 | #ifndef DISASM_ONLY | |
7136 | { | |
7137 | 0ULL, | |
7138 | 0xfbfe000000000000ULL, | |
7139 | 0ULL, | |
7140 | 0ULL, | |
7141 | 0x8700000000000000ULL | |
7142 | }, | |
7143 | { | |
7144 | -1ULL, | |
7145 | 0x0880000000000000ULL, | |
7146 | -1ULL, | |
7147 | -1ULL, | |
7148 | 0x8700000000000000ULL | |
7149 | } | |
7150 | #endif | |
7151 | }, | |
7152 | { "swadd", TILEPRO_OPC_SWADD, 0x2, 3, TREG_ZERO, 1, | |
7153 | { { 0, }, { 24, 17, 37 }, { 0, }, { 0, }, { 0, } }, | |
7154 | #ifndef DISASM_ONLY | |
7155 | { | |
7156 | 0ULL, | |
7157 | 0xfbf8000000000000ULL, | |
7158 | 0ULL, | |
7159 | 0ULL, | |
7160 | 0ULL | |
7161 | }, | |
7162 | { | |
7163 | -1ULL, | |
7164 | 0x30f0000000000000ULL, | |
7165 | -1ULL, | |
7166 | -1ULL, | |
7167 | -1ULL | |
7168 | } | |
7169 | #endif | |
7170 | }, | |
7171 | { "swint0", TILEPRO_OPC_SWINT0, 0x2, 0, TREG_ZERO, 0, | |
7172 | { { 0, }, { }, { 0, }, { 0, }, { 0, } }, | |
7173 | #ifndef DISASM_ONLY | |
7174 | { | |
7175 | 0ULL, | |
7176 | 0xfbfff80000000000ULL, | |
7177 | 0ULL, | |
7178 | 0ULL, | |
7179 | 0ULL | |
7180 | }, | |
7181 | { | |
7182 | -1ULL, | |
7183 | 0x400b900000000000ULL, | |
7184 | -1ULL, | |
7185 | -1ULL, | |
7186 | -1ULL | |
7187 | } | |
7188 | #endif | |
7189 | }, | |
7190 | { "swint1", TILEPRO_OPC_SWINT1, 0x2, 0, TREG_ZERO, 0, | |
7191 | { { 0, }, { }, { 0, }, { 0, }, { 0, } }, | |
7192 | #ifndef DISASM_ONLY | |
7193 | { | |
7194 | 0ULL, | |
7195 | 0xfbfff80000000000ULL, | |
7196 | 0ULL, | |
7197 | 0ULL, | |
7198 | 0ULL | |
7199 | }, | |
7200 | { | |
7201 | -1ULL, | |
7202 | 0x400b980000000000ULL, | |
7203 | -1ULL, | |
7204 | -1ULL, | |
7205 | -1ULL | |
7206 | } | |
7207 | #endif | |
7208 | }, | |
7209 | { "swint2", TILEPRO_OPC_SWINT2, 0x2, 0, TREG_ZERO, 0, | |
7210 | { { 0, }, { }, { 0, }, { 0, }, { 0, } }, | |
7211 | #ifndef DISASM_ONLY | |
7212 | { | |
7213 | 0ULL, | |
7214 | 0xfbfff80000000000ULL, | |
7215 | 0ULL, | |
7216 | 0ULL, | |
7217 | 0ULL | |
7218 | }, | |
7219 | { | |
7220 | -1ULL, | |
7221 | 0x400ba00000000000ULL, | |
7222 | -1ULL, | |
7223 | -1ULL, | |
7224 | -1ULL | |
7225 | } | |
7226 | #endif | |
7227 | }, | |
7228 | { "swint3", TILEPRO_OPC_SWINT3, 0x2, 0, TREG_ZERO, 0, | |
7229 | { { 0, }, { }, { 0, }, { 0, }, { 0, } }, | |
7230 | #ifndef DISASM_ONLY | |
7231 | { | |
7232 | 0ULL, | |
7233 | 0xfbfff80000000000ULL, | |
7234 | 0ULL, | |
7235 | 0ULL, | |
7236 | 0ULL | |
7237 | }, | |
7238 | { | |
7239 | -1ULL, | |
7240 | 0x400ba80000000000ULL, | |
7241 | -1ULL, | |
7242 | -1ULL, | |
7243 | -1ULL | |
7244 | } | |
7245 | #endif | |
7246 | }, | |
7247 | { "tblidxb0", TILEPRO_OPC_TBLIDXB0, 0x5, 2, TREG_ZERO, 1, | |
7248 | { { 21, 8 }, { 0, }, { 31, 12 }, { 0, }, { 0, } }, | |
7249 | #ifndef DISASM_ONLY | |
7250 | { | |
7251 | 0x800000007ffff000ULL, | |
7252 | 0ULL, | |
7253 | 0x80000000780ff000ULL, | |
7254 | 0ULL, | |
7255 | 0ULL | |
7256 | }, | |
7257 | { | |
7258 | 0x0000000070168000ULL, | |
7259 | -1ULL, | |
7260 | 0x80000000680a8000ULL, | |
7261 | -1ULL, | |
7262 | -1ULL | |
7263 | } | |
7264 | #endif | |
7265 | }, | |
7266 | { "tblidxb0.sn", TILEPRO_OPC_TBLIDXB0_SN, 0x1, 2, TREG_SN, 1, | |
7267 | { { 21, 8 }, { 0, }, { 0, }, { 0, }, { 0, } }, | |
7268 | #ifndef DISASM_ONLY | |
7269 | { | |
7270 | 0x800000007ffff000ULL, | |
7271 | 0ULL, | |
7272 | 0ULL, | |
7273 | 0ULL, | |
7274 | 0ULL | |
7275 | }, | |
7276 | { | |
7277 | 0x0000000078168000ULL, | |
7278 | -1ULL, | |
7279 | -1ULL, | |
7280 | -1ULL, | |
7281 | -1ULL | |
7282 | } | |
7283 | #endif | |
7284 | }, | |
7285 | { "tblidxb1", TILEPRO_OPC_TBLIDXB1, 0x5, 2, TREG_ZERO, 1, | |
7286 | { { 21, 8 }, { 0, }, { 31, 12 }, { 0, }, { 0, } }, | |
7287 | #ifndef DISASM_ONLY | |
7288 | { | |
7289 | 0x800000007ffff000ULL, | |
7290 | 0ULL, | |
7291 | 0x80000000780ff000ULL, | |
7292 | 0ULL, | |
7293 | 0ULL | |
7294 | }, | |
7295 | { | |
7296 | 0x0000000070169000ULL, | |
7297 | -1ULL, | |
7298 | 0x80000000680a9000ULL, | |
7299 | -1ULL, | |
7300 | -1ULL | |
7301 | } | |
7302 | #endif | |
7303 | }, | |
7304 | { "tblidxb1.sn", TILEPRO_OPC_TBLIDXB1_SN, 0x1, 2, TREG_SN, 1, | |
7305 | { { 21, 8 }, { 0, }, { 0, }, { 0, }, { 0, } }, | |
7306 | #ifndef DISASM_ONLY | |
7307 | { | |
7308 | 0x800000007ffff000ULL, | |
7309 | 0ULL, | |
7310 | 0ULL, | |
7311 | 0ULL, | |
7312 | 0ULL | |
7313 | }, | |
7314 | { | |
7315 | 0x0000000078169000ULL, | |
7316 | -1ULL, | |
7317 | -1ULL, | |
7318 | -1ULL, | |
7319 | -1ULL | |
7320 | } | |
7321 | #endif | |
7322 | }, | |
7323 | { "tblidxb2", TILEPRO_OPC_TBLIDXB2, 0x5, 2, TREG_ZERO, 1, | |
7324 | { { 21, 8 }, { 0, }, { 31, 12 }, { 0, }, { 0, } }, | |
7325 | #ifndef DISASM_ONLY | |
7326 | { | |
7327 | 0x800000007ffff000ULL, | |
7328 | 0ULL, | |
7329 | 0x80000000780ff000ULL, | |
7330 | 0ULL, | |
7331 | 0ULL | |
7332 | }, | |
7333 | { | |
7334 | 0x000000007016a000ULL, | |
7335 | -1ULL, | |
7336 | 0x80000000680aa000ULL, | |
7337 | -1ULL, | |
7338 | -1ULL | |
7339 | } | |
7340 | #endif | |
7341 | }, | |
7342 | { "tblidxb2.sn", TILEPRO_OPC_TBLIDXB2_SN, 0x1, 2, TREG_SN, 1, | |
7343 | { { 21, 8 }, { 0, }, { 0, }, { 0, }, { 0, } }, | |
7344 | #ifndef DISASM_ONLY | |
7345 | { | |
7346 | 0x800000007ffff000ULL, | |
7347 | 0ULL, | |
7348 | 0ULL, | |
7349 | 0ULL, | |
7350 | 0ULL | |
7351 | }, | |
7352 | { | |
7353 | 0x000000007816a000ULL, | |
7354 | -1ULL, | |
7355 | -1ULL, | |
7356 | -1ULL, | |
7357 | -1ULL | |
7358 | } | |
7359 | #endif | |
7360 | }, | |
7361 | { "tblidxb3", TILEPRO_OPC_TBLIDXB3, 0x5, 2, TREG_ZERO, 1, | |
7362 | { { 21, 8 }, { 0, }, { 31, 12 }, { 0, }, { 0, } }, | |
7363 | #ifndef DISASM_ONLY | |
7364 | { | |
7365 | 0x800000007ffff000ULL, | |
7366 | 0ULL, | |
7367 | 0x80000000780ff000ULL, | |
7368 | 0ULL, | |
7369 | 0ULL | |
7370 | }, | |
7371 | { | |
7372 | 0x000000007016b000ULL, | |
7373 | -1ULL, | |
7374 | 0x80000000680ab000ULL, | |
7375 | -1ULL, | |
7376 | -1ULL | |
7377 | } | |
7378 | #endif | |
7379 | }, | |
7380 | { "tblidxb3.sn", TILEPRO_OPC_TBLIDXB3_SN, 0x1, 2, TREG_SN, 1, | |
7381 | { { 21, 8 }, { 0, }, { 0, }, { 0, }, { 0, } }, | |
7382 | #ifndef DISASM_ONLY | |
7383 | { | |
7384 | 0x800000007ffff000ULL, | |
7385 | 0ULL, | |
7386 | 0ULL, | |
7387 | 0ULL, | |
7388 | 0ULL | |
7389 | }, | |
7390 | { | |
7391 | 0x000000007816b000ULL, | |
7392 | -1ULL, | |
7393 | -1ULL, | |
7394 | -1ULL, | |
7395 | -1ULL | |
7396 | } | |
7397 | #endif | |
7398 | }, | |
7399 | { "tns", TILEPRO_OPC_TNS, 0x2, 2, TREG_ZERO, 1, | |
7400 | { { 0, }, { 9, 10 }, { 0, }, { 0, }, { 0, } }, | |
7401 | #ifndef DISASM_ONLY | |
7402 | { | |
7403 | 0ULL, | |
7404 | 0xfffff80000000000ULL, | |
7405 | 0ULL, | |
7406 | 0ULL, | |
7407 | 0ULL | |
7408 | }, | |
7409 | { | |
7410 | -1ULL, | |
7411 | 0x400bb00000000000ULL, | |
7412 | -1ULL, | |
7413 | -1ULL, | |
7414 | -1ULL | |
7415 | } | |
7416 | #endif | |
7417 | }, | |
7418 | { "tns.sn", TILEPRO_OPC_TNS_SN, 0x2, 2, TREG_SN, 1, | |
7419 | { { 0, }, { 9, 10 }, { 0, }, { 0, }, { 0, } }, | |
7420 | #ifndef DISASM_ONLY | |
7421 | { | |
7422 | 0ULL, | |
7423 | 0xfffff80000000000ULL, | |
7424 | 0ULL, | |
7425 | 0ULL, | |
7426 | 0ULL | |
7427 | }, | |
7428 | { | |
7429 | -1ULL, | |
7430 | 0x440bb00000000000ULL, | |
7431 | -1ULL, | |
7432 | -1ULL, | |
7433 | -1ULL | |
7434 | } | |
7435 | #endif | |
7436 | }, | |
7437 | { "wh64", TILEPRO_OPC_WH64, 0x2, 1, TREG_ZERO, 1, | |
7438 | { { 0, }, { 10 }, { 0, }, { 0, }, { 0, } }, | |
7439 | #ifndef DISASM_ONLY | |
7440 | { | |
7441 | 0ULL, | |
7442 | 0xfbfff80000000000ULL, | |
7443 | 0ULL, | |
7444 | 0ULL, | |
7445 | 0ULL | |
7446 | }, | |
7447 | { | |
7448 | -1ULL, | |
7449 | 0x400bb80000000000ULL, | |
7450 | -1ULL, | |
7451 | -1ULL, | |
7452 | -1ULL | |
7453 | } | |
7454 | #endif | |
7455 | }, | |
7456 | { "xor", TILEPRO_OPC_XOR, 0xf, 3, TREG_ZERO, 1, | |
7457 | { { 7, 8, 16 }, { 9, 10, 17 }, { 11, 12, 18 }, { 13, 14, 19 }, { 0, } }, | |
7458 | #ifndef DISASM_ONLY | |
7459 | { | |
7460 | 0x800000007ffc0000ULL, | |
7461 | 0xfffe000000000000ULL, | |
7462 | 0x80000000780c0000ULL, | |
7463 | 0xf806000000000000ULL, | |
7464 | 0ULL | |
7465 | }, | |
7466 | { | |
7467 | 0x0000000001780000ULL, | |
7468 | 0x0882000000000000ULL, | |
7469 | 0x80000000180c0000ULL, | |
7470 | 0x9806000000000000ULL, | |
7471 | -1ULL | |
7472 | } | |
7473 | #endif | |
7474 | }, | |
7475 | { "xor.sn", TILEPRO_OPC_XOR_SN, 0x3, 3, TREG_SN, 1, | |
7476 | { { 7, 8, 16 }, { 9, 10, 17 }, { 0, }, { 0, }, { 0, } }, | |
7477 | #ifndef DISASM_ONLY | |
7478 | { | |
7479 | 0x800000007ffc0000ULL, | |
7480 | 0xfffe000000000000ULL, | |
7481 | 0ULL, | |
7482 | 0ULL, | |
7483 | 0ULL | |
7484 | }, | |
7485 | { | |
7486 | 0x0000000009780000ULL, | |
7487 | 0x0c82000000000000ULL, | |
7488 | -1ULL, | |
7489 | -1ULL, | |
7490 | -1ULL | |
7491 | } | |
7492 | #endif | |
7493 | }, | |
7494 | { "xori", TILEPRO_OPC_XORI, 0x3, 3, TREG_ZERO, 1, | |
7495 | { { 7, 8, 0 }, { 9, 10, 1 }, { 0, }, { 0, }, { 0, } }, | |
7496 | #ifndef DISASM_ONLY | |
7497 | { | |
7498 | 0x800000007ff00000ULL, | |
7499 | 0xfff8000000000000ULL, | |
7500 | 0ULL, | |
7501 | 0ULL, | |
7502 | 0ULL | |
7503 | }, | |
7504 | { | |
7505 | 0x0000000050200000ULL, | |
7506 | 0x30a8000000000000ULL, | |
7507 | -1ULL, | |
7508 | -1ULL, | |
7509 | -1ULL | |
7510 | } | |
7511 | #endif | |
7512 | }, | |
7513 | { "xori.sn", TILEPRO_OPC_XORI_SN, 0x3, 3, TREG_SN, 1, | |
7514 | { { 7, 8, 0 }, { 9, 10, 1 }, { 0, }, { 0, }, { 0, } }, | |
7515 | #ifndef DISASM_ONLY | |
7516 | { | |
7517 | 0x800000007ff00000ULL, | |
7518 | 0xfff8000000000000ULL, | |
7519 | 0ULL, | |
7520 | 0ULL, | |
7521 | 0ULL | |
7522 | }, | |
7523 | { | |
7524 | 0x0000000058200000ULL, | |
7525 | 0x34a8000000000000ULL, | |
7526 | -1ULL, | |
7527 | -1ULL, | |
7528 | -1ULL | |
7529 | } | |
7530 | #endif | |
7531 | }, | |
7532 | { NULL, TILEPRO_OPC_NONE, 0, 0, TREG_ZERO, 0, { { 0, } }, | |
7533 | #ifndef DISASM_ONLY | |
7534 | { 0, }, { 0, } | |
7535 | #endif | |
7536 | } | |
7537 | }; | |
7538 | ||
7539 | #define BITFIELD(start, size) ((start) | (((1 << (size)) - 1) << 6)) | |
7540 | #define CHILD(array_index) (TILEPRO_OPC_NONE + (array_index)) | |
7541 | ||
7542 | static const unsigned short decode_X0_fsm[1153] = | |
7543 | { | |
7544 | BITFIELD(22, 9) /* index 0 */, | |
7545 | CHILD(513), CHILD(530), CHILD(547), CHILD(564), CHILD(596), CHILD(613), | |
7546 | CHILD(630), TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
7547 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
7548 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
7549 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
7550 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
7551 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
7552 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, CHILD(663), CHILD(680), CHILD(697), | |
7553 | CHILD(714), CHILD(746), CHILD(763), CHILD(780), TILEPRO_OPC_NONE, | |
7554 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
7555 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
7556 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
7557 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
7558 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
7559 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
7560 | CHILD(813), CHILD(813), CHILD(813), CHILD(813), CHILD(813), CHILD(813), | |
7561 | CHILD(813), CHILD(813), CHILD(813), CHILD(813), CHILD(813), CHILD(813), | |
7562 | CHILD(813), CHILD(813), CHILD(813), CHILD(813), CHILD(813), CHILD(813), | |
7563 | CHILD(813), CHILD(813), CHILD(813), CHILD(813), CHILD(813), CHILD(813), | |
7564 | CHILD(813), CHILD(813), CHILD(813), CHILD(813), CHILD(813), CHILD(813), | |
7565 | CHILD(813), CHILD(813), CHILD(813), CHILD(813), CHILD(813), CHILD(813), | |
7566 | CHILD(813), CHILD(813), CHILD(813), CHILD(813), CHILD(813), CHILD(813), | |
7567 | CHILD(813), CHILD(813), CHILD(813), CHILD(813), CHILD(813), CHILD(813), | |
7568 | CHILD(813), CHILD(813), CHILD(813), CHILD(813), CHILD(813), CHILD(813), | |
7569 | CHILD(813), CHILD(813), CHILD(813), CHILD(813), CHILD(813), CHILD(813), | |
7570 | CHILD(813), CHILD(813), CHILD(813), CHILD(813), CHILD(828), CHILD(828), | |
7571 | CHILD(828), CHILD(828), CHILD(828), CHILD(828), CHILD(828), CHILD(828), | |
7572 | CHILD(828), CHILD(828), CHILD(828), CHILD(828), CHILD(828), CHILD(828), | |
7573 | CHILD(828), CHILD(828), CHILD(828), CHILD(828), CHILD(828), CHILD(828), | |
7574 | CHILD(828), CHILD(828), CHILD(828), CHILD(828), CHILD(828), CHILD(828), | |
7575 | CHILD(828), CHILD(828), CHILD(828), CHILD(828), CHILD(828), CHILD(828), | |
7576 | CHILD(828), CHILD(828), CHILD(828), CHILD(828), CHILD(828), CHILD(828), | |
7577 | CHILD(828), CHILD(828), CHILD(828), CHILD(828), CHILD(828), CHILD(828), | |
7578 | CHILD(828), CHILD(828), CHILD(828), CHILD(828), CHILD(828), CHILD(828), | |
7579 | CHILD(828), CHILD(828), CHILD(828), CHILD(828), CHILD(828), CHILD(828), | |
7580 | CHILD(828), CHILD(828), CHILD(828), CHILD(828), CHILD(828), CHILD(828), | |
7581 | CHILD(828), CHILD(828), CHILD(843), CHILD(843), CHILD(843), CHILD(843), | |
7582 | CHILD(843), CHILD(843), CHILD(843), CHILD(843), CHILD(843), CHILD(843), | |
7583 | CHILD(843), CHILD(843), CHILD(843), CHILD(843), CHILD(843), CHILD(843), | |
7584 | CHILD(843), CHILD(843), CHILD(843), CHILD(843), CHILD(843), CHILD(843), | |
7585 | CHILD(843), CHILD(843), CHILD(843), CHILD(843), CHILD(843), CHILD(843), | |
7586 | CHILD(843), CHILD(843), CHILD(843), CHILD(843), CHILD(843), CHILD(843), | |
7587 | CHILD(843), CHILD(843), CHILD(843), CHILD(843), CHILD(843), CHILD(843), | |
7588 | CHILD(843), CHILD(843), CHILD(843), CHILD(843), CHILD(843), CHILD(843), | |
7589 | CHILD(843), CHILD(843), CHILD(843), CHILD(843), CHILD(843), CHILD(843), | |
7590 | CHILD(843), CHILD(843), CHILD(843), CHILD(843), CHILD(843), CHILD(843), | |
7591 | CHILD(843), CHILD(843), CHILD(843), CHILD(843), CHILD(843), CHILD(843), | |
7592 | CHILD(873), CHILD(878), CHILD(883), CHILD(903), CHILD(908), | |
7593 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
7594 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
7595 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
7596 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
7597 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
7598 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
7599 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, CHILD(913), | |
7600 | CHILD(918), CHILD(923), CHILD(943), CHILD(948), TILEPRO_OPC_NONE, | |
7601 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
7602 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
7603 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
7604 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
7605 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
7606 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
7607 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, CHILD(953), TILEPRO_OPC_NONE, | |
7608 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
7609 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
7610 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
7611 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
7612 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
7613 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
7614 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
7615 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, CHILD(988), TILEPRO_OPC_NONE, | |
7616 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
7617 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
7618 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
7619 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
7620 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
7621 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
7622 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
7623 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_MM, TILEPRO_OPC_MM, | |
7624 | TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, | |
7625 | TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, | |
7626 | TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, | |
7627 | TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, | |
7628 | TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, | |
7629 | TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, | |
7630 | TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, | |
7631 | TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, | |
7632 | TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, | |
7633 | TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, | |
7634 | TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, | |
7635 | TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, | |
7636 | TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, | |
7637 | TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, | |
7638 | TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, | |
7639 | TILEPRO_OPC_MM, TILEPRO_OPC_MM, CHILD(993), TILEPRO_OPC_NONE, | |
7640 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
7641 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
7642 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
7643 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
7644 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
7645 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
7646 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
7647 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, CHILD(1076), TILEPRO_OPC_NONE, | |
7648 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
7649 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
7650 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
7651 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
7652 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
7653 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
7654 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
7655 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
7656 | BITFIELD(18, 4) /* index 513 */, | |
7657 | TILEPRO_OPC_NONE, TILEPRO_OPC_ADDB, TILEPRO_OPC_ADDH, TILEPRO_OPC_ADD, | |
7658 | TILEPRO_OPC_ADIFFB_U, TILEPRO_OPC_ADIFFH, TILEPRO_OPC_AND, | |
7659 | TILEPRO_OPC_AVGB_U, TILEPRO_OPC_AVGH, TILEPRO_OPC_CRC32_32, | |
7660 | TILEPRO_OPC_CRC32_8, TILEPRO_OPC_INTHB, TILEPRO_OPC_INTHH, | |
7661 | TILEPRO_OPC_INTLB, TILEPRO_OPC_INTLH, TILEPRO_OPC_MAXB_U, | |
7662 | BITFIELD(18, 4) /* index 530 */, | |
7663 | TILEPRO_OPC_MAXH, TILEPRO_OPC_MINB_U, TILEPRO_OPC_MINH, TILEPRO_OPC_MNZB, | |
7664 | TILEPRO_OPC_MNZH, TILEPRO_OPC_MNZ, TILEPRO_OPC_MULHHA_SS, | |
7665 | TILEPRO_OPC_MULHHA_SU, TILEPRO_OPC_MULHHA_UU, TILEPRO_OPC_MULHHSA_UU, | |
7666 | TILEPRO_OPC_MULHH_SS, TILEPRO_OPC_MULHH_SU, TILEPRO_OPC_MULHH_UU, | |
7667 | TILEPRO_OPC_MULHLA_SS, TILEPRO_OPC_MULHLA_SU, TILEPRO_OPC_MULHLA_US, | |
7668 | BITFIELD(18, 4) /* index 547 */, | |
7669 | TILEPRO_OPC_MULHLA_UU, TILEPRO_OPC_MULHLSA_UU, TILEPRO_OPC_MULHL_SS, | |
7670 | TILEPRO_OPC_MULHL_SU, TILEPRO_OPC_MULHL_US, TILEPRO_OPC_MULHL_UU, | |
7671 | TILEPRO_OPC_MULLLA_SS, TILEPRO_OPC_MULLLA_SU, TILEPRO_OPC_MULLLA_UU, | |
7672 | TILEPRO_OPC_MULLLSA_UU, TILEPRO_OPC_MULLL_SS, TILEPRO_OPC_MULLL_SU, | |
7673 | TILEPRO_OPC_MULLL_UU, TILEPRO_OPC_MVNZ, TILEPRO_OPC_MVZ, TILEPRO_OPC_MZB, | |
7674 | BITFIELD(18, 4) /* index 564 */, | |
7675 | TILEPRO_OPC_MZH, TILEPRO_OPC_MZ, TILEPRO_OPC_NOR, CHILD(581), | |
7676 | TILEPRO_OPC_PACKHB, TILEPRO_OPC_PACKLB, TILEPRO_OPC_RL, TILEPRO_OPC_S1A, | |
7677 | TILEPRO_OPC_S2A, TILEPRO_OPC_S3A, TILEPRO_OPC_SADAB_U, TILEPRO_OPC_SADAH, | |
7678 | TILEPRO_OPC_SADAH_U, TILEPRO_OPC_SADB_U, TILEPRO_OPC_SADH, | |
7679 | TILEPRO_OPC_SADH_U, | |
7680 | BITFIELD(12, 2) /* index 581 */, | |
7681 | TILEPRO_OPC_OR, TILEPRO_OPC_OR, TILEPRO_OPC_OR, CHILD(586), | |
7682 | BITFIELD(14, 2) /* index 586 */, | |
7683 | TILEPRO_OPC_OR, TILEPRO_OPC_OR, TILEPRO_OPC_OR, CHILD(591), | |
7684 | BITFIELD(16, 2) /* index 591 */, | |
7685 | TILEPRO_OPC_OR, TILEPRO_OPC_OR, TILEPRO_OPC_OR, TILEPRO_OPC_MOVE, | |
7686 | BITFIELD(18, 4) /* index 596 */, | |
7687 | TILEPRO_OPC_SEQB, TILEPRO_OPC_SEQH, TILEPRO_OPC_SEQ, TILEPRO_OPC_SHLB, | |
7688 | TILEPRO_OPC_SHLH, TILEPRO_OPC_SHL, TILEPRO_OPC_SHRB, TILEPRO_OPC_SHRH, | |
7689 | TILEPRO_OPC_SHR, TILEPRO_OPC_SLTB, TILEPRO_OPC_SLTB_U, TILEPRO_OPC_SLTEB, | |
7690 | TILEPRO_OPC_SLTEB_U, TILEPRO_OPC_SLTEH, TILEPRO_OPC_SLTEH_U, | |
7691 | TILEPRO_OPC_SLTE, | |
7692 | BITFIELD(18, 4) /* index 613 */, | |
7693 | TILEPRO_OPC_SLTE_U, TILEPRO_OPC_SLTH, TILEPRO_OPC_SLTH_U, TILEPRO_OPC_SLT, | |
7694 | TILEPRO_OPC_SLT_U, TILEPRO_OPC_SNEB, TILEPRO_OPC_SNEH, TILEPRO_OPC_SNE, | |
7695 | TILEPRO_OPC_SRAB, TILEPRO_OPC_SRAH, TILEPRO_OPC_SRA, TILEPRO_OPC_SUBB, | |
7696 | TILEPRO_OPC_SUBH, TILEPRO_OPC_SUB, TILEPRO_OPC_XOR, TILEPRO_OPC_DWORD_ALIGN, | |
7697 | BITFIELD(18, 3) /* index 630 */, | |
7698 | CHILD(639), CHILD(642), CHILD(645), CHILD(648), CHILD(651), CHILD(654), | |
7699 | CHILD(657), CHILD(660), | |
7700 | BITFIELD(21, 1) /* index 639 */, | |
7701 | TILEPRO_OPC_ADDS, TILEPRO_OPC_NONE, | |
7702 | BITFIELD(21, 1) /* index 642 */, | |
7703 | TILEPRO_OPC_SUBS, TILEPRO_OPC_NONE, | |
7704 | BITFIELD(21, 1) /* index 645 */, | |
7705 | TILEPRO_OPC_ADDBS_U, TILEPRO_OPC_NONE, | |
7706 | BITFIELD(21, 1) /* index 648 */, | |
7707 | TILEPRO_OPC_ADDHS, TILEPRO_OPC_NONE, | |
7708 | BITFIELD(21, 1) /* index 651 */, | |
7709 | TILEPRO_OPC_SUBBS_U, TILEPRO_OPC_NONE, | |
7710 | BITFIELD(21, 1) /* index 654 */, | |
7711 | TILEPRO_OPC_SUBHS, TILEPRO_OPC_NONE, | |
7712 | BITFIELD(21, 1) /* index 657 */, | |
7713 | TILEPRO_OPC_PACKHS, TILEPRO_OPC_NONE, | |
7714 | BITFIELD(21, 1) /* index 660 */, | |
7715 | TILEPRO_OPC_PACKBS_U, TILEPRO_OPC_NONE, | |
7716 | BITFIELD(18, 4) /* index 663 */, | |
7717 | TILEPRO_OPC_NONE, TILEPRO_OPC_ADDB_SN, TILEPRO_OPC_ADDH_SN, | |
7718 | TILEPRO_OPC_ADD_SN, TILEPRO_OPC_ADIFFB_U_SN, TILEPRO_OPC_ADIFFH_SN, | |
7719 | TILEPRO_OPC_AND_SN, TILEPRO_OPC_AVGB_U_SN, TILEPRO_OPC_AVGH_SN, | |
7720 | TILEPRO_OPC_CRC32_32_SN, TILEPRO_OPC_CRC32_8_SN, TILEPRO_OPC_INTHB_SN, | |
7721 | TILEPRO_OPC_INTHH_SN, TILEPRO_OPC_INTLB_SN, TILEPRO_OPC_INTLH_SN, | |
7722 | TILEPRO_OPC_MAXB_U_SN, | |
7723 | BITFIELD(18, 4) /* index 680 */, | |
7724 | TILEPRO_OPC_MAXH_SN, TILEPRO_OPC_MINB_U_SN, TILEPRO_OPC_MINH_SN, | |
7725 | TILEPRO_OPC_MNZB_SN, TILEPRO_OPC_MNZH_SN, TILEPRO_OPC_MNZ_SN, | |
7726 | TILEPRO_OPC_MULHHA_SS_SN, TILEPRO_OPC_MULHHA_SU_SN, | |
7727 | TILEPRO_OPC_MULHHA_UU_SN, TILEPRO_OPC_MULHHSA_UU_SN, | |
7728 | TILEPRO_OPC_MULHH_SS_SN, TILEPRO_OPC_MULHH_SU_SN, TILEPRO_OPC_MULHH_UU_SN, | |
7729 | TILEPRO_OPC_MULHLA_SS_SN, TILEPRO_OPC_MULHLA_SU_SN, | |
7730 | TILEPRO_OPC_MULHLA_US_SN, | |
7731 | BITFIELD(18, 4) /* index 697 */, | |
7732 | TILEPRO_OPC_MULHLA_UU_SN, TILEPRO_OPC_MULHLSA_UU_SN, | |
7733 | TILEPRO_OPC_MULHL_SS_SN, TILEPRO_OPC_MULHL_SU_SN, TILEPRO_OPC_MULHL_US_SN, | |
7734 | TILEPRO_OPC_MULHL_UU_SN, TILEPRO_OPC_MULLLA_SS_SN, TILEPRO_OPC_MULLLA_SU_SN, | |
7735 | TILEPRO_OPC_MULLLA_UU_SN, TILEPRO_OPC_MULLLSA_UU_SN, | |
7736 | TILEPRO_OPC_MULLL_SS_SN, TILEPRO_OPC_MULLL_SU_SN, TILEPRO_OPC_MULLL_UU_SN, | |
7737 | TILEPRO_OPC_MVNZ_SN, TILEPRO_OPC_MVZ_SN, TILEPRO_OPC_MZB_SN, | |
7738 | BITFIELD(18, 4) /* index 714 */, | |
7739 | TILEPRO_OPC_MZH_SN, TILEPRO_OPC_MZ_SN, TILEPRO_OPC_NOR_SN, CHILD(731), | |
7740 | TILEPRO_OPC_PACKHB_SN, TILEPRO_OPC_PACKLB_SN, TILEPRO_OPC_RL_SN, | |
7741 | TILEPRO_OPC_S1A_SN, TILEPRO_OPC_S2A_SN, TILEPRO_OPC_S3A_SN, | |
7742 | TILEPRO_OPC_SADAB_U_SN, TILEPRO_OPC_SADAH_SN, TILEPRO_OPC_SADAH_U_SN, | |
7743 | TILEPRO_OPC_SADB_U_SN, TILEPRO_OPC_SADH_SN, TILEPRO_OPC_SADH_U_SN, | |
7744 | BITFIELD(12, 2) /* index 731 */, | |
7745 | TILEPRO_OPC_OR_SN, TILEPRO_OPC_OR_SN, TILEPRO_OPC_OR_SN, CHILD(736), | |
7746 | BITFIELD(14, 2) /* index 736 */, | |
7747 | TILEPRO_OPC_OR_SN, TILEPRO_OPC_OR_SN, TILEPRO_OPC_OR_SN, CHILD(741), | |
7748 | BITFIELD(16, 2) /* index 741 */, | |
7749 | TILEPRO_OPC_OR_SN, TILEPRO_OPC_OR_SN, TILEPRO_OPC_OR_SN, | |
7750 | TILEPRO_OPC_MOVE_SN, | |
7751 | BITFIELD(18, 4) /* index 746 */, | |
7752 | TILEPRO_OPC_SEQB_SN, TILEPRO_OPC_SEQH_SN, TILEPRO_OPC_SEQ_SN, | |
7753 | TILEPRO_OPC_SHLB_SN, TILEPRO_OPC_SHLH_SN, TILEPRO_OPC_SHL_SN, | |
7754 | TILEPRO_OPC_SHRB_SN, TILEPRO_OPC_SHRH_SN, TILEPRO_OPC_SHR_SN, | |
7755 | TILEPRO_OPC_SLTB_SN, TILEPRO_OPC_SLTB_U_SN, TILEPRO_OPC_SLTEB_SN, | |
7756 | TILEPRO_OPC_SLTEB_U_SN, TILEPRO_OPC_SLTEH_SN, TILEPRO_OPC_SLTEH_U_SN, | |
7757 | TILEPRO_OPC_SLTE_SN, | |
7758 | BITFIELD(18, 4) /* index 763 */, | |
7759 | TILEPRO_OPC_SLTE_U_SN, TILEPRO_OPC_SLTH_SN, TILEPRO_OPC_SLTH_U_SN, | |
7760 | TILEPRO_OPC_SLT_SN, TILEPRO_OPC_SLT_U_SN, TILEPRO_OPC_SNEB_SN, | |
7761 | TILEPRO_OPC_SNEH_SN, TILEPRO_OPC_SNE_SN, TILEPRO_OPC_SRAB_SN, | |
7762 | TILEPRO_OPC_SRAH_SN, TILEPRO_OPC_SRA_SN, TILEPRO_OPC_SUBB_SN, | |
7763 | TILEPRO_OPC_SUBH_SN, TILEPRO_OPC_SUB_SN, TILEPRO_OPC_XOR_SN, | |
7764 | TILEPRO_OPC_DWORD_ALIGN_SN, | |
7765 | BITFIELD(18, 3) /* index 780 */, | |
7766 | CHILD(789), CHILD(792), CHILD(795), CHILD(798), CHILD(801), CHILD(804), | |
7767 | CHILD(807), CHILD(810), | |
7768 | BITFIELD(21, 1) /* index 789 */, | |
7769 | TILEPRO_OPC_ADDS_SN, TILEPRO_OPC_NONE, | |
7770 | BITFIELD(21, 1) /* index 792 */, | |
7771 | TILEPRO_OPC_SUBS_SN, TILEPRO_OPC_NONE, | |
7772 | BITFIELD(21, 1) /* index 795 */, | |
7773 | TILEPRO_OPC_ADDBS_U_SN, TILEPRO_OPC_NONE, | |
7774 | BITFIELD(21, 1) /* index 798 */, | |
7775 | TILEPRO_OPC_ADDHS_SN, TILEPRO_OPC_NONE, | |
7776 | BITFIELD(21, 1) /* index 801 */, | |
7777 | TILEPRO_OPC_SUBBS_U_SN, TILEPRO_OPC_NONE, | |
7778 | BITFIELD(21, 1) /* index 804 */, | |
7779 | TILEPRO_OPC_SUBHS_SN, TILEPRO_OPC_NONE, | |
7780 | BITFIELD(21, 1) /* index 807 */, | |
7781 | TILEPRO_OPC_PACKHS_SN, TILEPRO_OPC_NONE, | |
7782 | BITFIELD(21, 1) /* index 810 */, | |
7783 | TILEPRO_OPC_PACKBS_U_SN, TILEPRO_OPC_NONE, | |
7784 | BITFIELD(6, 2) /* index 813 */, | |
7785 | TILEPRO_OPC_ADDLI_SN, TILEPRO_OPC_ADDLI_SN, TILEPRO_OPC_ADDLI_SN, | |
7786 | CHILD(818), | |
7787 | BITFIELD(8, 2) /* index 818 */, | |
7788 | TILEPRO_OPC_ADDLI_SN, TILEPRO_OPC_ADDLI_SN, TILEPRO_OPC_ADDLI_SN, | |
7789 | CHILD(823), | |
7790 | BITFIELD(10, 2) /* index 823 */, | |
7791 | TILEPRO_OPC_ADDLI_SN, TILEPRO_OPC_ADDLI_SN, TILEPRO_OPC_ADDLI_SN, | |
7792 | TILEPRO_OPC_MOVELI_SN, | |
7793 | BITFIELD(6, 2) /* index 828 */, | |
7794 | TILEPRO_OPC_ADDLI, TILEPRO_OPC_ADDLI, TILEPRO_OPC_ADDLI, CHILD(833), | |
7795 | BITFIELD(8, 2) /* index 833 */, | |
7796 | TILEPRO_OPC_ADDLI, TILEPRO_OPC_ADDLI, TILEPRO_OPC_ADDLI, CHILD(838), | |
7797 | BITFIELD(10, 2) /* index 838 */, | |
7798 | TILEPRO_OPC_ADDLI, TILEPRO_OPC_ADDLI, TILEPRO_OPC_ADDLI, TILEPRO_OPC_MOVELI, | |
7799 | BITFIELD(0, 2) /* index 843 */, | |
7800 | TILEPRO_OPC_AULI, TILEPRO_OPC_AULI, TILEPRO_OPC_AULI, CHILD(848), | |
7801 | BITFIELD(2, 2) /* index 848 */, | |
7802 | TILEPRO_OPC_AULI, TILEPRO_OPC_AULI, TILEPRO_OPC_AULI, CHILD(853), | |
7803 | BITFIELD(4, 2) /* index 853 */, | |
7804 | TILEPRO_OPC_AULI, TILEPRO_OPC_AULI, TILEPRO_OPC_AULI, CHILD(858), | |
7805 | BITFIELD(6, 2) /* index 858 */, | |
7806 | TILEPRO_OPC_AULI, TILEPRO_OPC_AULI, TILEPRO_OPC_AULI, CHILD(863), | |
7807 | BITFIELD(8, 2) /* index 863 */, | |
7808 | TILEPRO_OPC_AULI, TILEPRO_OPC_AULI, TILEPRO_OPC_AULI, CHILD(868), | |
7809 | BITFIELD(10, 2) /* index 868 */, | |
7810 | TILEPRO_OPC_AULI, TILEPRO_OPC_AULI, TILEPRO_OPC_AULI, TILEPRO_OPC_INFOL, | |
7811 | BITFIELD(20, 2) /* index 873 */, | |
7812 | TILEPRO_OPC_NONE, TILEPRO_OPC_ADDIB, TILEPRO_OPC_ADDIH, TILEPRO_OPC_ADDI, | |
7813 | BITFIELD(20, 2) /* index 878 */, | |
7814 | TILEPRO_OPC_MAXIB_U, TILEPRO_OPC_MAXIH, TILEPRO_OPC_MINIB_U, | |
7815 | TILEPRO_OPC_MINIH, | |
7816 | BITFIELD(20, 2) /* index 883 */, | |
7817 | CHILD(888), TILEPRO_OPC_SEQIB, TILEPRO_OPC_SEQIH, TILEPRO_OPC_SEQI, | |
7818 | BITFIELD(6, 2) /* index 888 */, | |
7819 | TILEPRO_OPC_ORI, TILEPRO_OPC_ORI, TILEPRO_OPC_ORI, CHILD(893), | |
7820 | BITFIELD(8, 2) /* index 893 */, | |
7821 | TILEPRO_OPC_ORI, TILEPRO_OPC_ORI, TILEPRO_OPC_ORI, CHILD(898), | |
7822 | BITFIELD(10, 2) /* index 898 */, | |
7823 | TILEPRO_OPC_ORI, TILEPRO_OPC_ORI, TILEPRO_OPC_ORI, TILEPRO_OPC_MOVEI, | |
7824 | BITFIELD(20, 2) /* index 903 */, | |
7825 | TILEPRO_OPC_SLTIB, TILEPRO_OPC_SLTIB_U, TILEPRO_OPC_SLTIH, | |
7826 | TILEPRO_OPC_SLTIH_U, | |
7827 | BITFIELD(20, 2) /* index 908 */, | |
7828 | TILEPRO_OPC_SLTI, TILEPRO_OPC_SLTI_U, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
7829 | BITFIELD(20, 2) /* index 913 */, | |
7830 | TILEPRO_OPC_NONE, TILEPRO_OPC_ADDIB_SN, TILEPRO_OPC_ADDIH_SN, | |
7831 | TILEPRO_OPC_ADDI_SN, | |
7832 | BITFIELD(20, 2) /* index 918 */, | |
7833 | TILEPRO_OPC_MAXIB_U_SN, TILEPRO_OPC_MAXIH_SN, TILEPRO_OPC_MINIB_U_SN, | |
7834 | TILEPRO_OPC_MINIH_SN, | |
7835 | BITFIELD(20, 2) /* index 923 */, | |
7836 | CHILD(928), TILEPRO_OPC_SEQIB_SN, TILEPRO_OPC_SEQIH_SN, TILEPRO_OPC_SEQI_SN, | |
7837 | BITFIELD(6, 2) /* index 928 */, | |
7838 | TILEPRO_OPC_ORI_SN, TILEPRO_OPC_ORI_SN, TILEPRO_OPC_ORI_SN, CHILD(933), | |
7839 | BITFIELD(8, 2) /* index 933 */, | |
7840 | TILEPRO_OPC_ORI_SN, TILEPRO_OPC_ORI_SN, TILEPRO_OPC_ORI_SN, CHILD(938), | |
7841 | BITFIELD(10, 2) /* index 938 */, | |
7842 | TILEPRO_OPC_ORI_SN, TILEPRO_OPC_ORI_SN, TILEPRO_OPC_ORI_SN, | |
7843 | TILEPRO_OPC_MOVEI_SN, | |
7844 | BITFIELD(20, 2) /* index 943 */, | |
7845 | TILEPRO_OPC_SLTIB_SN, TILEPRO_OPC_SLTIB_U_SN, TILEPRO_OPC_SLTIH_SN, | |
7846 | TILEPRO_OPC_SLTIH_U_SN, | |
7847 | BITFIELD(20, 2) /* index 948 */, | |
7848 | TILEPRO_OPC_SLTI_SN, TILEPRO_OPC_SLTI_U_SN, TILEPRO_OPC_NONE, | |
7849 | TILEPRO_OPC_NONE, | |
7850 | BITFIELD(20, 2) /* index 953 */, | |
7851 | TILEPRO_OPC_NONE, CHILD(958), TILEPRO_OPC_XORI, TILEPRO_OPC_NONE, | |
7852 | BITFIELD(0, 2) /* index 958 */, | |
7853 | TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, CHILD(963), | |
7854 | BITFIELD(2, 2) /* index 963 */, | |
7855 | TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, CHILD(968), | |
7856 | BITFIELD(4, 2) /* index 968 */, | |
7857 | TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, CHILD(973), | |
7858 | BITFIELD(6, 2) /* index 973 */, | |
7859 | TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, CHILD(978), | |
7860 | BITFIELD(8, 2) /* index 978 */, | |
7861 | TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, CHILD(983), | |
7862 | BITFIELD(10, 2) /* index 983 */, | |
7863 | TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, TILEPRO_OPC_INFO, | |
7864 | BITFIELD(20, 2) /* index 988 */, | |
7865 | TILEPRO_OPC_NONE, TILEPRO_OPC_ANDI_SN, TILEPRO_OPC_XORI_SN, | |
7866 | TILEPRO_OPC_NONE, | |
7867 | BITFIELD(17, 5) /* index 993 */, | |
7868 | TILEPRO_OPC_NONE, TILEPRO_OPC_RLI, TILEPRO_OPC_SHLIB, TILEPRO_OPC_SHLIH, | |
7869 | TILEPRO_OPC_SHLI, TILEPRO_OPC_SHRIB, TILEPRO_OPC_SHRIH, TILEPRO_OPC_SHRI, | |
7870 | TILEPRO_OPC_SRAIB, TILEPRO_OPC_SRAIH, TILEPRO_OPC_SRAI, CHILD(1026), | |
7871 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
7872 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
7873 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
7874 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
7875 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
7876 | BITFIELD(12, 4) /* index 1026 */, | |
7877 | TILEPRO_OPC_NONE, CHILD(1043), CHILD(1046), CHILD(1049), CHILD(1052), | |
7878 | CHILD(1055), CHILD(1058), CHILD(1061), CHILD(1064), CHILD(1067), | |
7879 | CHILD(1070), CHILD(1073), TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
7880 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
7881 | BITFIELD(16, 1) /* index 1043 */, | |
7882 | TILEPRO_OPC_BITX, TILEPRO_OPC_NONE, | |
7883 | BITFIELD(16, 1) /* index 1046 */, | |
7884 | TILEPRO_OPC_BYTEX, TILEPRO_OPC_NONE, | |
7885 | BITFIELD(16, 1) /* index 1049 */, | |
7886 | TILEPRO_OPC_CLZ, TILEPRO_OPC_NONE, | |
7887 | BITFIELD(16, 1) /* index 1052 */, | |
7888 | TILEPRO_OPC_CTZ, TILEPRO_OPC_NONE, | |
7889 | BITFIELD(16, 1) /* index 1055 */, | |
7890 | TILEPRO_OPC_FNOP, TILEPRO_OPC_NONE, | |
7891 | BITFIELD(16, 1) /* index 1058 */, | |
7892 | TILEPRO_OPC_NOP, TILEPRO_OPC_NONE, | |
7893 | BITFIELD(16, 1) /* index 1061 */, | |
7894 | TILEPRO_OPC_PCNT, TILEPRO_OPC_NONE, | |
7895 | BITFIELD(16, 1) /* index 1064 */, | |
7896 | TILEPRO_OPC_TBLIDXB0, TILEPRO_OPC_NONE, | |
7897 | BITFIELD(16, 1) /* index 1067 */, | |
7898 | TILEPRO_OPC_TBLIDXB1, TILEPRO_OPC_NONE, | |
7899 | BITFIELD(16, 1) /* index 1070 */, | |
7900 | TILEPRO_OPC_TBLIDXB2, TILEPRO_OPC_NONE, | |
7901 | BITFIELD(16, 1) /* index 1073 */, | |
7902 | TILEPRO_OPC_TBLIDXB3, TILEPRO_OPC_NONE, | |
7903 | BITFIELD(17, 5) /* index 1076 */, | |
7904 | TILEPRO_OPC_NONE, TILEPRO_OPC_RLI_SN, TILEPRO_OPC_SHLIB_SN, | |
7905 | TILEPRO_OPC_SHLIH_SN, TILEPRO_OPC_SHLI_SN, TILEPRO_OPC_SHRIB_SN, | |
7906 | TILEPRO_OPC_SHRIH_SN, TILEPRO_OPC_SHRI_SN, TILEPRO_OPC_SRAIB_SN, | |
7907 | TILEPRO_OPC_SRAIH_SN, TILEPRO_OPC_SRAI_SN, CHILD(1109), TILEPRO_OPC_NONE, | |
7908 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
7909 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
7910 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
7911 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
7912 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
7913 | BITFIELD(12, 4) /* index 1109 */, | |
7914 | TILEPRO_OPC_NONE, CHILD(1126), CHILD(1129), CHILD(1132), CHILD(1135), | |
7915 | CHILD(1055), CHILD(1058), CHILD(1138), CHILD(1141), CHILD(1144), | |
7916 | CHILD(1147), CHILD(1150), TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
7917 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
7918 | BITFIELD(16, 1) /* index 1126 */, | |
7919 | TILEPRO_OPC_BITX_SN, TILEPRO_OPC_NONE, | |
7920 | BITFIELD(16, 1) /* index 1129 */, | |
7921 | TILEPRO_OPC_BYTEX_SN, TILEPRO_OPC_NONE, | |
7922 | BITFIELD(16, 1) /* index 1132 */, | |
7923 | TILEPRO_OPC_CLZ_SN, TILEPRO_OPC_NONE, | |
7924 | BITFIELD(16, 1) /* index 1135 */, | |
7925 | TILEPRO_OPC_CTZ_SN, TILEPRO_OPC_NONE, | |
7926 | BITFIELD(16, 1) /* index 1138 */, | |
7927 | TILEPRO_OPC_PCNT_SN, TILEPRO_OPC_NONE, | |
7928 | BITFIELD(16, 1) /* index 1141 */, | |
7929 | TILEPRO_OPC_TBLIDXB0_SN, TILEPRO_OPC_NONE, | |
7930 | BITFIELD(16, 1) /* index 1144 */, | |
7931 | TILEPRO_OPC_TBLIDXB1_SN, TILEPRO_OPC_NONE, | |
7932 | BITFIELD(16, 1) /* index 1147 */, | |
7933 | TILEPRO_OPC_TBLIDXB2_SN, TILEPRO_OPC_NONE, | |
7934 | BITFIELD(16, 1) /* index 1150 */, | |
7935 | TILEPRO_OPC_TBLIDXB3_SN, TILEPRO_OPC_NONE, | |
7936 | }; | |
7937 | ||
7938 | static const unsigned short decode_X1_fsm[1540] = | |
7939 | { | |
7940 | BITFIELD(54, 9) /* index 0 */, | |
7941 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
7942 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
7943 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
7944 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
7945 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
7946 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
7947 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
7948 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
7949 | CHILD(513), CHILD(561), CHILD(594), TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
7950 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
7951 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
7952 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, CHILD(641), | |
7953 | CHILD(689), CHILD(722), TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
7954 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
7955 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
7956 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, CHILD(766), | |
7957 | CHILD(766), CHILD(766), CHILD(766), CHILD(766), CHILD(766), CHILD(766), | |
7958 | CHILD(766), CHILD(766), CHILD(766), CHILD(766), CHILD(766), CHILD(766), | |
7959 | CHILD(766), CHILD(766), CHILD(766), CHILD(766), CHILD(766), CHILD(766), | |
7960 | CHILD(766), CHILD(766), CHILD(766), CHILD(766), CHILD(766), CHILD(766), | |
7961 | CHILD(766), CHILD(766), CHILD(766), CHILD(766), CHILD(766), CHILD(766), | |
7962 | CHILD(766), CHILD(781), CHILD(781), CHILD(781), CHILD(781), CHILD(781), | |
7963 | CHILD(781), CHILD(781), CHILD(781), CHILD(781), CHILD(781), CHILD(781), | |
7964 | CHILD(781), CHILD(781), CHILD(781), CHILD(781), CHILD(781), CHILD(781), | |
7965 | CHILD(781), CHILD(781), CHILD(781), CHILD(781), CHILD(781), CHILD(781), | |
7966 | CHILD(781), CHILD(781), CHILD(781), CHILD(781), CHILD(781), CHILD(781), | |
7967 | CHILD(781), CHILD(781), CHILD(781), CHILD(796), CHILD(796), CHILD(796), | |
7968 | CHILD(796), CHILD(796), CHILD(796), CHILD(796), CHILD(796), CHILD(796), | |
7969 | CHILD(796), CHILD(796), CHILD(796), CHILD(796), CHILD(796), CHILD(796), | |
7970 | CHILD(796), CHILD(796), CHILD(796), CHILD(796), CHILD(796), CHILD(796), | |
7971 | CHILD(796), CHILD(796), CHILD(796), CHILD(796), CHILD(796), CHILD(796), | |
7972 | CHILD(796), CHILD(796), CHILD(796), CHILD(796), CHILD(796), CHILD(826), | |
7973 | CHILD(826), CHILD(826), CHILD(826), CHILD(826), CHILD(826), CHILD(826), | |
7974 | CHILD(826), CHILD(826), CHILD(826), CHILD(826), CHILD(826), CHILD(826), | |
7975 | CHILD(826), CHILD(826), CHILD(826), CHILD(843), CHILD(843), CHILD(843), | |
7976 | CHILD(843), CHILD(843), CHILD(843), CHILD(843), CHILD(843), CHILD(843), | |
7977 | CHILD(843), CHILD(843), CHILD(843), CHILD(843), CHILD(843), CHILD(843), | |
7978 | CHILD(843), CHILD(860), CHILD(899), CHILD(923), CHILD(932), | |
7979 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
7980 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
7981 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
7982 | CHILD(941), CHILD(950), CHILD(974), CHILD(983), TILEPRO_OPC_NONE, | |
7983 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
7984 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
7985 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_MM, | |
7986 | TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, | |
7987 | TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, | |
7988 | TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, | |
7989 | TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, | |
7990 | TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, | |
7991 | TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, | |
7992 | TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, | |
7993 | TILEPRO_OPC_MM, TILEPRO_OPC_MM, TILEPRO_OPC_MM, CHILD(992), | |
7994 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
7995 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
7996 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
7997 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, CHILD(1334), | |
7998 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
7999 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
8000 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
8001 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
8002 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
8003 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
8004 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
8005 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
8006 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
8007 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
8008 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
8009 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_J, | |
8010 | TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J, | |
8011 | TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J, | |
8012 | TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J, | |
8013 | TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J, | |
8014 | TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J, | |
8015 | TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J, | |
8016 | TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J, | |
8017 | TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J, | |
8018 | TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J, | |
8019 | TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J, | |
8020 | TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J, | |
8021 | TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J, | |
8022 | TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_J, TILEPRO_OPC_JAL, | |
8023 | TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, | |
8024 | TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, | |
8025 | TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, | |
8026 | TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, | |
8027 | TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, | |
8028 | TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, | |
8029 | TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, | |
8030 | TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, | |
8031 | TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, | |
8032 | TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, | |
8033 | TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, | |
8034 | TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, | |
8035 | TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, | |
8036 | TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, | |
8037 | TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, | |
8038 | TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, TILEPRO_OPC_JAL, TILEPRO_OPC_NONE, | |
8039 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
8040 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
8041 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
8042 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
8043 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
8044 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
8045 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
8046 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
8047 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
8048 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
8049 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
8050 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
8051 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
8052 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
8053 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
8054 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
8055 | BITFIELD(49, 5) /* index 513 */, | |
8056 | TILEPRO_OPC_NONE, TILEPRO_OPC_ADDB, TILEPRO_OPC_ADDH, TILEPRO_OPC_ADD, | |
8057 | TILEPRO_OPC_AND, TILEPRO_OPC_INTHB, TILEPRO_OPC_INTHH, TILEPRO_OPC_INTLB, | |
8058 | TILEPRO_OPC_INTLH, TILEPRO_OPC_JALRP, TILEPRO_OPC_JALR, TILEPRO_OPC_JRP, | |
8059 | TILEPRO_OPC_JR, TILEPRO_OPC_LNK, TILEPRO_OPC_MAXB_U, TILEPRO_OPC_MAXH, | |
8060 | TILEPRO_OPC_MINB_U, TILEPRO_OPC_MINH, TILEPRO_OPC_MNZB, TILEPRO_OPC_MNZH, | |
8061 | TILEPRO_OPC_MNZ, TILEPRO_OPC_MZB, TILEPRO_OPC_MZH, TILEPRO_OPC_MZ, | |
8062 | TILEPRO_OPC_NOR, CHILD(546), TILEPRO_OPC_PACKHB, TILEPRO_OPC_PACKLB, | |
8063 | TILEPRO_OPC_RL, TILEPRO_OPC_S1A, TILEPRO_OPC_S2A, TILEPRO_OPC_S3A, | |
8064 | BITFIELD(43, 2) /* index 546 */, | |
8065 | TILEPRO_OPC_OR, TILEPRO_OPC_OR, TILEPRO_OPC_OR, CHILD(551), | |
8066 | BITFIELD(45, 2) /* index 551 */, | |
8067 | TILEPRO_OPC_OR, TILEPRO_OPC_OR, TILEPRO_OPC_OR, CHILD(556), | |
8068 | BITFIELD(47, 2) /* index 556 */, | |
8069 | TILEPRO_OPC_OR, TILEPRO_OPC_OR, TILEPRO_OPC_OR, TILEPRO_OPC_MOVE, | |
8070 | BITFIELD(49, 5) /* index 561 */, | |
8071 | TILEPRO_OPC_SB, TILEPRO_OPC_SEQB, TILEPRO_OPC_SEQH, TILEPRO_OPC_SEQ, | |
8072 | TILEPRO_OPC_SHLB, TILEPRO_OPC_SHLH, TILEPRO_OPC_SHL, TILEPRO_OPC_SHRB, | |
8073 | TILEPRO_OPC_SHRH, TILEPRO_OPC_SHR, TILEPRO_OPC_SH, TILEPRO_OPC_SLTB, | |
8074 | TILEPRO_OPC_SLTB_U, TILEPRO_OPC_SLTEB, TILEPRO_OPC_SLTEB_U, | |
8075 | TILEPRO_OPC_SLTEH, TILEPRO_OPC_SLTEH_U, TILEPRO_OPC_SLTE, | |
8076 | TILEPRO_OPC_SLTE_U, TILEPRO_OPC_SLTH, TILEPRO_OPC_SLTH_U, TILEPRO_OPC_SLT, | |
8077 | TILEPRO_OPC_SLT_U, TILEPRO_OPC_SNEB, TILEPRO_OPC_SNEH, TILEPRO_OPC_SNE, | |
8078 | TILEPRO_OPC_SRAB, TILEPRO_OPC_SRAH, TILEPRO_OPC_SRA, TILEPRO_OPC_SUBB, | |
8079 | TILEPRO_OPC_SUBH, TILEPRO_OPC_SUB, | |
8080 | BITFIELD(49, 4) /* index 594 */, | |
8081 | CHILD(611), CHILD(614), CHILD(617), CHILD(620), CHILD(623), CHILD(626), | |
8082 | CHILD(629), CHILD(632), CHILD(635), CHILD(638), TILEPRO_OPC_NONE, | |
8083 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
8084 | TILEPRO_OPC_NONE, | |
8085 | BITFIELD(53, 1) /* index 611 */, | |
8086 | TILEPRO_OPC_SW, TILEPRO_OPC_NONE, | |
8087 | BITFIELD(53, 1) /* index 614 */, | |
8088 | TILEPRO_OPC_XOR, TILEPRO_OPC_NONE, | |
8089 | BITFIELD(53, 1) /* index 617 */, | |
8090 | TILEPRO_OPC_ADDS, TILEPRO_OPC_NONE, | |
8091 | BITFIELD(53, 1) /* index 620 */, | |
8092 | TILEPRO_OPC_SUBS, TILEPRO_OPC_NONE, | |
8093 | BITFIELD(53, 1) /* index 623 */, | |
8094 | TILEPRO_OPC_ADDBS_U, TILEPRO_OPC_NONE, | |
8095 | BITFIELD(53, 1) /* index 626 */, | |
8096 | TILEPRO_OPC_ADDHS, TILEPRO_OPC_NONE, | |
8097 | BITFIELD(53, 1) /* index 629 */, | |
8098 | TILEPRO_OPC_SUBBS_U, TILEPRO_OPC_NONE, | |
8099 | BITFIELD(53, 1) /* index 632 */, | |
8100 | TILEPRO_OPC_SUBHS, TILEPRO_OPC_NONE, | |
8101 | BITFIELD(53, 1) /* index 635 */, | |
8102 | TILEPRO_OPC_PACKHS, TILEPRO_OPC_NONE, | |
8103 | BITFIELD(53, 1) /* index 638 */, | |
8104 | TILEPRO_OPC_PACKBS_U, TILEPRO_OPC_NONE, | |
8105 | BITFIELD(49, 5) /* index 641 */, | |
8106 | TILEPRO_OPC_NONE, TILEPRO_OPC_ADDB_SN, TILEPRO_OPC_ADDH_SN, | |
8107 | TILEPRO_OPC_ADD_SN, TILEPRO_OPC_AND_SN, TILEPRO_OPC_INTHB_SN, | |
8108 | TILEPRO_OPC_INTHH_SN, TILEPRO_OPC_INTLB_SN, TILEPRO_OPC_INTLH_SN, | |
8109 | TILEPRO_OPC_JALRP, TILEPRO_OPC_JALR, TILEPRO_OPC_JRP, TILEPRO_OPC_JR, | |
8110 | TILEPRO_OPC_LNK_SN, TILEPRO_OPC_MAXB_U_SN, TILEPRO_OPC_MAXH_SN, | |
8111 | TILEPRO_OPC_MINB_U_SN, TILEPRO_OPC_MINH_SN, TILEPRO_OPC_MNZB_SN, | |
8112 | TILEPRO_OPC_MNZH_SN, TILEPRO_OPC_MNZ_SN, TILEPRO_OPC_MZB_SN, | |
8113 | TILEPRO_OPC_MZH_SN, TILEPRO_OPC_MZ_SN, TILEPRO_OPC_NOR_SN, CHILD(674), | |
8114 | TILEPRO_OPC_PACKHB_SN, TILEPRO_OPC_PACKLB_SN, TILEPRO_OPC_RL_SN, | |
8115 | TILEPRO_OPC_S1A_SN, TILEPRO_OPC_S2A_SN, TILEPRO_OPC_S3A_SN, | |
8116 | BITFIELD(43, 2) /* index 674 */, | |
8117 | TILEPRO_OPC_OR_SN, TILEPRO_OPC_OR_SN, TILEPRO_OPC_OR_SN, CHILD(679), | |
8118 | BITFIELD(45, 2) /* index 679 */, | |
8119 | TILEPRO_OPC_OR_SN, TILEPRO_OPC_OR_SN, TILEPRO_OPC_OR_SN, CHILD(684), | |
8120 | BITFIELD(47, 2) /* index 684 */, | |
8121 | TILEPRO_OPC_OR_SN, TILEPRO_OPC_OR_SN, TILEPRO_OPC_OR_SN, | |
8122 | TILEPRO_OPC_MOVE_SN, | |
8123 | BITFIELD(49, 5) /* index 689 */, | |
8124 | TILEPRO_OPC_SB, TILEPRO_OPC_SEQB_SN, TILEPRO_OPC_SEQH_SN, | |
8125 | TILEPRO_OPC_SEQ_SN, TILEPRO_OPC_SHLB_SN, TILEPRO_OPC_SHLH_SN, | |
8126 | TILEPRO_OPC_SHL_SN, TILEPRO_OPC_SHRB_SN, TILEPRO_OPC_SHRH_SN, | |
8127 | TILEPRO_OPC_SHR_SN, TILEPRO_OPC_SH, TILEPRO_OPC_SLTB_SN, | |
8128 | TILEPRO_OPC_SLTB_U_SN, TILEPRO_OPC_SLTEB_SN, TILEPRO_OPC_SLTEB_U_SN, | |
8129 | TILEPRO_OPC_SLTEH_SN, TILEPRO_OPC_SLTEH_U_SN, TILEPRO_OPC_SLTE_SN, | |
8130 | TILEPRO_OPC_SLTE_U_SN, TILEPRO_OPC_SLTH_SN, TILEPRO_OPC_SLTH_U_SN, | |
8131 | TILEPRO_OPC_SLT_SN, TILEPRO_OPC_SLT_U_SN, TILEPRO_OPC_SNEB_SN, | |
8132 | TILEPRO_OPC_SNEH_SN, TILEPRO_OPC_SNE_SN, TILEPRO_OPC_SRAB_SN, | |
8133 | TILEPRO_OPC_SRAH_SN, TILEPRO_OPC_SRA_SN, TILEPRO_OPC_SUBB_SN, | |
8134 | TILEPRO_OPC_SUBH_SN, TILEPRO_OPC_SUB_SN, | |
8135 | BITFIELD(49, 4) /* index 722 */, | |
8136 | CHILD(611), CHILD(739), CHILD(742), CHILD(745), CHILD(748), CHILD(751), | |
8137 | CHILD(754), CHILD(757), CHILD(760), CHILD(763), TILEPRO_OPC_NONE, | |
8138 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
8139 | TILEPRO_OPC_NONE, | |
8140 | BITFIELD(53, 1) /* index 739 */, | |
8141 | TILEPRO_OPC_XOR_SN, TILEPRO_OPC_NONE, | |
8142 | BITFIELD(53, 1) /* index 742 */, | |
8143 | TILEPRO_OPC_ADDS_SN, TILEPRO_OPC_NONE, | |
8144 | BITFIELD(53, 1) /* index 745 */, | |
8145 | TILEPRO_OPC_SUBS_SN, TILEPRO_OPC_NONE, | |
8146 | BITFIELD(53, 1) /* index 748 */, | |
8147 | TILEPRO_OPC_ADDBS_U_SN, TILEPRO_OPC_NONE, | |
8148 | BITFIELD(53, 1) /* index 751 */, | |
8149 | TILEPRO_OPC_ADDHS_SN, TILEPRO_OPC_NONE, | |
8150 | BITFIELD(53, 1) /* index 754 */, | |
8151 | TILEPRO_OPC_SUBBS_U_SN, TILEPRO_OPC_NONE, | |
8152 | BITFIELD(53, 1) /* index 757 */, | |
8153 | TILEPRO_OPC_SUBHS_SN, TILEPRO_OPC_NONE, | |
8154 | BITFIELD(53, 1) /* index 760 */, | |
8155 | TILEPRO_OPC_PACKHS_SN, TILEPRO_OPC_NONE, | |
8156 | BITFIELD(53, 1) /* index 763 */, | |
8157 | TILEPRO_OPC_PACKBS_U_SN, TILEPRO_OPC_NONE, | |
8158 | BITFIELD(37, 2) /* index 766 */, | |
8159 | TILEPRO_OPC_ADDLI_SN, TILEPRO_OPC_ADDLI_SN, TILEPRO_OPC_ADDLI_SN, | |
8160 | CHILD(771), | |
8161 | BITFIELD(39, 2) /* index 771 */, | |
8162 | TILEPRO_OPC_ADDLI_SN, TILEPRO_OPC_ADDLI_SN, TILEPRO_OPC_ADDLI_SN, | |
8163 | CHILD(776), | |
8164 | BITFIELD(41, 2) /* index 776 */, | |
8165 | TILEPRO_OPC_ADDLI_SN, TILEPRO_OPC_ADDLI_SN, TILEPRO_OPC_ADDLI_SN, | |
8166 | TILEPRO_OPC_MOVELI_SN, | |
8167 | BITFIELD(37, 2) /* index 781 */, | |
8168 | TILEPRO_OPC_ADDLI, TILEPRO_OPC_ADDLI, TILEPRO_OPC_ADDLI, CHILD(786), | |
8169 | BITFIELD(39, 2) /* index 786 */, | |
8170 | TILEPRO_OPC_ADDLI, TILEPRO_OPC_ADDLI, TILEPRO_OPC_ADDLI, CHILD(791), | |
8171 | BITFIELD(41, 2) /* index 791 */, | |
8172 | TILEPRO_OPC_ADDLI, TILEPRO_OPC_ADDLI, TILEPRO_OPC_ADDLI, TILEPRO_OPC_MOVELI, | |
8173 | BITFIELD(31, 2) /* index 796 */, | |
8174 | TILEPRO_OPC_AULI, TILEPRO_OPC_AULI, TILEPRO_OPC_AULI, CHILD(801), | |
8175 | BITFIELD(33, 2) /* index 801 */, | |
8176 | TILEPRO_OPC_AULI, TILEPRO_OPC_AULI, TILEPRO_OPC_AULI, CHILD(806), | |
8177 | BITFIELD(35, 2) /* index 806 */, | |
8178 | TILEPRO_OPC_AULI, TILEPRO_OPC_AULI, TILEPRO_OPC_AULI, CHILD(811), | |
8179 | BITFIELD(37, 2) /* index 811 */, | |
8180 | TILEPRO_OPC_AULI, TILEPRO_OPC_AULI, TILEPRO_OPC_AULI, CHILD(816), | |
8181 | BITFIELD(39, 2) /* index 816 */, | |
8182 | TILEPRO_OPC_AULI, TILEPRO_OPC_AULI, TILEPRO_OPC_AULI, CHILD(821), | |
8183 | BITFIELD(41, 2) /* index 821 */, | |
8184 | TILEPRO_OPC_AULI, TILEPRO_OPC_AULI, TILEPRO_OPC_AULI, TILEPRO_OPC_INFOL, | |
8185 | BITFIELD(31, 4) /* index 826 */, | |
8186 | TILEPRO_OPC_BZ, TILEPRO_OPC_BZT, TILEPRO_OPC_BNZ, TILEPRO_OPC_BNZT, | |
8187 | TILEPRO_OPC_BGZ, TILEPRO_OPC_BGZT, TILEPRO_OPC_BGEZ, TILEPRO_OPC_BGEZT, | |
8188 | TILEPRO_OPC_BLZ, TILEPRO_OPC_BLZT, TILEPRO_OPC_BLEZ, TILEPRO_OPC_BLEZT, | |
8189 | TILEPRO_OPC_BBS, TILEPRO_OPC_BBST, TILEPRO_OPC_BBNS, TILEPRO_OPC_BBNST, | |
8190 | BITFIELD(31, 4) /* index 843 */, | |
8191 | TILEPRO_OPC_BZ_SN, TILEPRO_OPC_BZT_SN, TILEPRO_OPC_BNZ_SN, | |
8192 | TILEPRO_OPC_BNZT_SN, TILEPRO_OPC_BGZ_SN, TILEPRO_OPC_BGZT_SN, | |
8193 | TILEPRO_OPC_BGEZ_SN, TILEPRO_OPC_BGEZT_SN, TILEPRO_OPC_BLZ_SN, | |
8194 | TILEPRO_OPC_BLZT_SN, TILEPRO_OPC_BLEZ_SN, TILEPRO_OPC_BLEZT_SN, | |
8195 | TILEPRO_OPC_BBS_SN, TILEPRO_OPC_BBST_SN, TILEPRO_OPC_BBNS_SN, | |
8196 | TILEPRO_OPC_BBNST_SN, | |
8197 | BITFIELD(51, 3) /* index 860 */, | |
8198 | TILEPRO_OPC_NONE, TILEPRO_OPC_ADDIB, TILEPRO_OPC_ADDIH, TILEPRO_OPC_ADDI, | |
8199 | CHILD(869), TILEPRO_OPC_MAXIB_U, TILEPRO_OPC_MAXIH, TILEPRO_OPC_MFSPR, | |
8200 | BITFIELD(31, 2) /* index 869 */, | |
8201 | TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, CHILD(874), | |
8202 | BITFIELD(33, 2) /* index 874 */, | |
8203 | TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, CHILD(879), | |
8204 | BITFIELD(35, 2) /* index 879 */, | |
8205 | TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, CHILD(884), | |
8206 | BITFIELD(37, 2) /* index 884 */, | |
8207 | TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, CHILD(889), | |
8208 | BITFIELD(39, 2) /* index 889 */, | |
8209 | TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, CHILD(894), | |
8210 | BITFIELD(41, 2) /* index 894 */, | |
8211 | TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, TILEPRO_OPC_INFO, | |
8212 | BITFIELD(51, 3) /* index 899 */, | |
8213 | TILEPRO_OPC_MINIB_U, TILEPRO_OPC_MINIH, TILEPRO_OPC_MTSPR, CHILD(908), | |
8214 | TILEPRO_OPC_SEQIB, TILEPRO_OPC_SEQIH, TILEPRO_OPC_SEQI, TILEPRO_OPC_SLTIB, | |
8215 | BITFIELD(37, 2) /* index 908 */, | |
8216 | TILEPRO_OPC_ORI, TILEPRO_OPC_ORI, TILEPRO_OPC_ORI, CHILD(913), | |
8217 | BITFIELD(39, 2) /* index 913 */, | |
8218 | TILEPRO_OPC_ORI, TILEPRO_OPC_ORI, TILEPRO_OPC_ORI, CHILD(918), | |
8219 | BITFIELD(41, 2) /* index 918 */, | |
8220 | TILEPRO_OPC_ORI, TILEPRO_OPC_ORI, TILEPRO_OPC_ORI, TILEPRO_OPC_MOVEI, | |
8221 | BITFIELD(51, 3) /* index 923 */, | |
8222 | TILEPRO_OPC_SLTIB_U, TILEPRO_OPC_SLTIH, TILEPRO_OPC_SLTIH_U, | |
8223 | TILEPRO_OPC_SLTI, TILEPRO_OPC_SLTI_U, TILEPRO_OPC_XORI, TILEPRO_OPC_LBADD, | |
8224 | TILEPRO_OPC_LBADD_U, | |
8225 | BITFIELD(51, 3) /* index 932 */, | |
8226 | TILEPRO_OPC_LHADD, TILEPRO_OPC_LHADD_U, TILEPRO_OPC_LWADD, | |
8227 | TILEPRO_OPC_LWADD_NA, TILEPRO_OPC_SBADD, TILEPRO_OPC_SHADD, | |
8228 | TILEPRO_OPC_SWADD, TILEPRO_OPC_NONE, | |
8229 | BITFIELD(51, 3) /* index 941 */, | |
8230 | TILEPRO_OPC_NONE, TILEPRO_OPC_ADDIB_SN, TILEPRO_OPC_ADDIH_SN, | |
8231 | TILEPRO_OPC_ADDI_SN, TILEPRO_OPC_ANDI_SN, TILEPRO_OPC_MAXIB_U_SN, | |
8232 | TILEPRO_OPC_MAXIH_SN, TILEPRO_OPC_MFSPR, | |
8233 | BITFIELD(51, 3) /* index 950 */, | |
8234 | TILEPRO_OPC_MINIB_U_SN, TILEPRO_OPC_MINIH_SN, TILEPRO_OPC_MTSPR, CHILD(959), | |
8235 | TILEPRO_OPC_SEQIB_SN, TILEPRO_OPC_SEQIH_SN, TILEPRO_OPC_SEQI_SN, | |
8236 | TILEPRO_OPC_SLTIB_SN, | |
8237 | BITFIELD(37, 2) /* index 959 */, | |
8238 | TILEPRO_OPC_ORI_SN, TILEPRO_OPC_ORI_SN, TILEPRO_OPC_ORI_SN, CHILD(964), | |
8239 | BITFIELD(39, 2) /* index 964 */, | |
8240 | TILEPRO_OPC_ORI_SN, TILEPRO_OPC_ORI_SN, TILEPRO_OPC_ORI_SN, CHILD(969), | |
8241 | BITFIELD(41, 2) /* index 969 */, | |
8242 | TILEPRO_OPC_ORI_SN, TILEPRO_OPC_ORI_SN, TILEPRO_OPC_ORI_SN, | |
8243 | TILEPRO_OPC_MOVEI_SN, | |
8244 | BITFIELD(51, 3) /* index 974 */, | |
8245 | TILEPRO_OPC_SLTIB_U_SN, TILEPRO_OPC_SLTIH_SN, TILEPRO_OPC_SLTIH_U_SN, | |
8246 | TILEPRO_OPC_SLTI_SN, TILEPRO_OPC_SLTI_U_SN, TILEPRO_OPC_XORI_SN, | |
8247 | TILEPRO_OPC_LBADD_SN, TILEPRO_OPC_LBADD_U_SN, | |
8248 | BITFIELD(51, 3) /* index 983 */, | |
8249 | TILEPRO_OPC_LHADD_SN, TILEPRO_OPC_LHADD_U_SN, TILEPRO_OPC_LWADD_SN, | |
8250 | TILEPRO_OPC_LWADD_NA_SN, TILEPRO_OPC_SBADD, TILEPRO_OPC_SHADD, | |
8251 | TILEPRO_OPC_SWADD, TILEPRO_OPC_NONE, | |
8252 | BITFIELD(46, 7) /* index 992 */, | |
8253 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
8254 | CHILD(1121), CHILD(1121), CHILD(1121), CHILD(1121), CHILD(1124), | |
8255 | CHILD(1124), CHILD(1124), CHILD(1124), CHILD(1127), CHILD(1127), | |
8256 | CHILD(1127), CHILD(1127), CHILD(1130), CHILD(1130), CHILD(1130), | |
8257 | CHILD(1130), CHILD(1133), CHILD(1133), CHILD(1133), CHILD(1133), | |
8258 | CHILD(1136), CHILD(1136), CHILD(1136), CHILD(1136), CHILD(1139), | |
8259 | CHILD(1139), CHILD(1139), CHILD(1139), CHILD(1142), CHILD(1142), | |
8260 | CHILD(1142), CHILD(1142), CHILD(1145), CHILD(1145), CHILD(1145), | |
8261 | CHILD(1145), CHILD(1148), CHILD(1148), CHILD(1148), CHILD(1148), | |
8262 | CHILD(1151), CHILD(1242), CHILD(1290), CHILD(1323), TILEPRO_OPC_NONE, | |
8263 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
8264 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
8265 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
8266 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
8267 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
8268 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
8269 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
8270 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
8271 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
8272 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
8273 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
8274 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
8275 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
8276 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
8277 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
8278 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
8279 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
8280 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
8281 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
8282 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
8283 | BITFIELD(53, 1) /* index 1121 */, | |
8284 | TILEPRO_OPC_RLI, TILEPRO_OPC_NONE, | |
8285 | BITFIELD(53, 1) /* index 1124 */, | |
8286 | TILEPRO_OPC_SHLIB, TILEPRO_OPC_NONE, | |
8287 | BITFIELD(53, 1) /* index 1127 */, | |
8288 | TILEPRO_OPC_SHLIH, TILEPRO_OPC_NONE, | |
8289 | BITFIELD(53, 1) /* index 1130 */, | |
8290 | TILEPRO_OPC_SHLI, TILEPRO_OPC_NONE, | |
8291 | BITFIELD(53, 1) /* index 1133 */, | |
8292 | TILEPRO_OPC_SHRIB, TILEPRO_OPC_NONE, | |
8293 | BITFIELD(53, 1) /* index 1136 */, | |
8294 | TILEPRO_OPC_SHRIH, TILEPRO_OPC_NONE, | |
8295 | BITFIELD(53, 1) /* index 1139 */, | |
8296 | TILEPRO_OPC_SHRI, TILEPRO_OPC_NONE, | |
8297 | BITFIELD(53, 1) /* index 1142 */, | |
8298 | TILEPRO_OPC_SRAIB, TILEPRO_OPC_NONE, | |
8299 | BITFIELD(53, 1) /* index 1145 */, | |
8300 | TILEPRO_OPC_SRAIH, TILEPRO_OPC_NONE, | |
8301 | BITFIELD(53, 1) /* index 1148 */, | |
8302 | TILEPRO_OPC_SRAI, TILEPRO_OPC_NONE, | |
8303 | BITFIELD(43, 3) /* index 1151 */, | |
8304 | TILEPRO_OPC_NONE, CHILD(1160), CHILD(1163), CHILD(1166), CHILD(1169), | |
8305 | CHILD(1172), CHILD(1175), CHILD(1178), | |
8306 | BITFIELD(53, 1) /* index 1160 */, | |
8307 | TILEPRO_OPC_DRAIN, TILEPRO_OPC_NONE, | |
8308 | BITFIELD(53, 1) /* index 1163 */, | |
8309 | TILEPRO_OPC_DTLBPR, TILEPRO_OPC_NONE, | |
8310 | BITFIELD(53, 1) /* index 1166 */, | |
8311 | TILEPRO_OPC_FINV, TILEPRO_OPC_NONE, | |
8312 | BITFIELD(53, 1) /* index 1169 */, | |
8313 | TILEPRO_OPC_FLUSH, TILEPRO_OPC_NONE, | |
8314 | BITFIELD(53, 1) /* index 1172 */, | |
8315 | TILEPRO_OPC_FNOP, TILEPRO_OPC_NONE, | |
8316 | BITFIELD(53, 1) /* index 1175 */, | |
8317 | TILEPRO_OPC_ICOH, TILEPRO_OPC_NONE, | |
8318 | BITFIELD(31, 2) /* index 1178 */, | |
8319 | CHILD(1183), CHILD(1211), CHILD(1239), CHILD(1239), | |
8320 | BITFIELD(53, 1) /* index 1183 */, | |
8321 | CHILD(1186), TILEPRO_OPC_NONE, | |
8322 | BITFIELD(33, 2) /* index 1186 */, | |
8323 | TILEPRO_OPC_ILL, TILEPRO_OPC_ILL, TILEPRO_OPC_ILL, CHILD(1191), | |
8324 | BITFIELD(35, 2) /* index 1191 */, | |
8325 | TILEPRO_OPC_ILL, CHILD(1196), TILEPRO_OPC_ILL, TILEPRO_OPC_ILL, | |
8326 | BITFIELD(37, 2) /* index 1196 */, | |
8327 | TILEPRO_OPC_ILL, CHILD(1201), TILEPRO_OPC_ILL, TILEPRO_OPC_ILL, | |
8328 | BITFIELD(39, 2) /* index 1201 */, | |
8329 | TILEPRO_OPC_ILL, CHILD(1206), TILEPRO_OPC_ILL, TILEPRO_OPC_ILL, | |
8330 | BITFIELD(41, 2) /* index 1206 */, | |
8331 | TILEPRO_OPC_ILL, TILEPRO_OPC_ILL, TILEPRO_OPC_BPT, TILEPRO_OPC_ILL, | |
8332 | BITFIELD(53, 1) /* index 1211 */, | |
8333 | CHILD(1214), TILEPRO_OPC_NONE, | |
8334 | BITFIELD(33, 2) /* index 1214 */, | |
8335 | TILEPRO_OPC_ILL, TILEPRO_OPC_ILL, TILEPRO_OPC_ILL, CHILD(1219), | |
8336 | BITFIELD(35, 2) /* index 1219 */, | |
8337 | TILEPRO_OPC_ILL, CHILD(1224), TILEPRO_OPC_ILL, TILEPRO_OPC_ILL, | |
8338 | BITFIELD(37, 2) /* index 1224 */, | |
8339 | TILEPRO_OPC_ILL, CHILD(1229), TILEPRO_OPC_ILL, TILEPRO_OPC_ILL, | |
8340 | BITFIELD(39, 2) /* index 1229 */, | |
8341 | TILEPRO_OPC_ILL, CHILD(1234), TILEPRO_OPC_ILL, TILEPRO_OPC_ILL, | |
8342 | BITFIELD(41, 2) /* index 1234 */, | |
8343 | TILEPRO_OPC_ILL, TILEPRO_OPC_ILL, TILEPRO_OPC_RAISE, TILEPRO_OPC_ILL, | |
8344 | BITFIELD(53, 1) /* index 1239 */, | |
8345 | TILEPRO_OPC_ILL, TILEPRO_OPC_NONE, | |
8346 | BITFIELD(43, 3) /* index 1242 */, | |
8347 | CHILD(1251), CHILD(1254), CHILD(1257), CHILD(1275), CHILD(1278), | |
8348 | CHILD(1281), CHILD(1284), CHILD(1287), | |
8349 | BITFIELD(53, 1) /* index 1251 */, | |
8350 | TILEPRO_OPC_INV, TILEPRO_OPC_NONE, | |
8351 | BITFIELD(53, 1) /* index 1254 */, | |
8352 | TILEPRO_OPC_IRET, TILEPRO_OPC_NONE, | |
8353 | BITFIELD(53, 1) /* index 1257 */, | |
8354 | CHILD(1260), TILEPRO_OPC_NONE, | |
8355 | BITFIELD(31, 2) /* index 1260 */, | |
8356 | TILEPRO_OPC_LB, TILEPRO_OPC_LB, TILEPRO_OPC_LB, CHILD(1265), | |
8357 | BITFIELD(33, 2) /* index 1265 */, | |
8358 | TILEPRO_OPC_LB, TILEPRO_OPC_LB, TILEPRO_OPC_LB, CHILD(1270), | |
8359 | BITFIELD(35, 2) /* index 1270 */, | |
8360 | TILEPRO_OPC_LB, TILEPRO_OPC_LB, TILEPRO_OPC_LB, TILEPRO_OPC_PREFETCH, | |
8361 | BITFIELD(53, 1) /* index 1275 */, | |
8362 | TILEPRO_OPC_LB_U, TILEPRO_OPC_NONE, | |
8363 | BITFIELD(53, 1) /* index 1278 */, | |
8364 | TILEPRO_OPC_LH, TILEPRO_OPC_NONE, | |
8365 | BITFIELD(53, 1) /* index 1281 */, | |
8366 | TILEPRO_OPC_LH_U, TILEPRO_OPC_NONE, | |
8367 | BITFIELD(53, 1) /* index 1284 */, | |
8368 | TILEPRO_OPC_LW, TILEPRO_OPC_NONE, | |
8369 | BITFIELD(53, 1) /* index 1287 */, | |
8370 | TILEPRO_OPC_MF, TILEPRO_OPC_NONE, | |
8371 | BITFIELD(43, 3) /* index 1290 */, | |
8372 | CHILD(1299), CHILD(1302), CHILD(1305), CHILD(1308), CHILD(1311), | |
8373 | CHILD(1314), CHILD(1317), CHILD(1320), | |
8374 | BITFIELD(53, 1) /* index 1299 */, | |
8375 | TILEPRO_OPC_NAP, TILEPRO_OPC_NONE, | |
8376 | BITFIELD(53, 1) /* index 1302 */, | |
8377 | TILEPRO_OPC_NOP, TILEPRO_OPC_NONE, | |
8378 | BITFIELD(53, 1) /* index 1305 */, | |
8379 | TILEPRO_OPC_SWINT0, TILEPRO_OPC_NONE, | |
8380 | BITFIELD(53, 1) /* index 1308 */, | |
8381 | TILEPRO_OPC_SWINT1, TILEPRO_OPC_NONE, | |
8382 | BITFIELD(53, 1) /* index 1311 */, | |
8383 | TILEPRO_OPC_SWINT2, TILEPRO_OPC_NONE, | |
8384 | BITFIELD(53, 1) /* index 1314 */, | |
8385 | TILEPRO_OPC_SWINT3, TILEPRO_OPC_NONE, | |
8386 | BITFIELD(53, 1) /* index 1317 */, | |
8387 | TILEPRO_OPC_TNS, TILEPRO_OPC_NONE, | |
8388 | BITFIELD(53, 1) /* index 1320 */, | |
8389 | TILEPRO_OPC_WH64, TILEPRO_OPC_NONE, | |
8390 | BITFIELD(43, 2) /* index 1323 */, | |
8391 | CHILD(1328), TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
8392 | BITFIELD(45, 1) /* index 1328 */, | |
8393 | CHILD(1331), TILEPRO_OPC_NONE, | |
8394 | BITFIELD(53, 1) /* index 1331 */, | |
8395 | TILEPRO_OPC_LW_NA, TILEPRO_OPC_NONE, | |
8396 | BITFIELD(46, 7) /* index 1334 */, | |
8397 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
8398 | CHILD(1463), CHILD(1463), CHILD(1463), CHILD(1463), CHILD(1466), | |
8399 | CHILD(1466), CHILD(1466), CHILD(1466), CHILD(1469), CHILD(1469), | |
8400 | CHILD(1469), CHILD(1469), CHILD(1472), CHILD(1472), CHILD(1472), | |
8401 | CHILD(1472), CHILD(1475), CHILD(1475), CHILD(1475), CHILD(1475), | |
8402 | CHILD(1478), CHILD(1478), CHILD(1478), CHILD(1478), CHILD(1481), | |
8403 | CHILD(1481), CHILD(1481), CHILD(1481), CHILD(1484), CHILD(1484), | |
8404 | CHILD(1484), CHILD(1484), CHILD(1487), CHILD(1487), CHILD(1487), | |
8405 | CHILD(1487), CHILD(1490), CHILD(1490), CHILD(1490), CHILD(1490), | |
8406 | CHILD(1151), CHILD(1493), CHILD(1517), CHILD(1529), TILEPRO_OPC_NONE, | |
8407 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
8408 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
8409 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
8410 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
8411 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
8412 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
8413 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
8414 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
8415 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
8416 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
8417 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
8418 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
8419 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
8420 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
8421 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
8422 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
8423 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
8424 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
8425 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
8426 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
8427 | BITFIELD(53, 1) /* index 1463 */, | |
8428 | TILEPRO_OPC_RLI_SN, TILEPRO_OPC_NONE, | |
8429 | BITFIELD(53, 1) /* index 1466 */, | |
8430 | TILEPRO_OPC_SHLIB_SN, TILEPRO_OPC_NONE, | |
8431 | BITFIELD(53, 1) /* index 1469 */, | |
8432 | TILEPRO_OPC_SHLIH_SN, TILEPRO_OPC_NONE, | |
8433 | BITFIELD(53, 1) /* index 1472 */, | |
8434 | TILEPRO_OPC_SHLI_SN, TILEPRO_OPC_NONE, | |
8435 | BITFIELD(53, 1) /* index 1475 */, | |
8436 | TILEPRO_OPC_SHRIB_SN, TILEPRO_OPC_NONE, | |
8437 | BITFIELD(53, 1) /* index 1478 */, | |
8438 | TILEPRO_OPC_SHRIH_SN, TILEPRO_OPC_NONE, | |
8439 | BITFIELD(53, 1) /* index 1481 */, | |
8440 | TILEPRO_OPC_SHRI_SN, TILEPRO_OPC_NONE, | |
8441 | BITFIELD(53, 1) /* index 1484 */, | |
8442 | TILEPRO_OPC_SRAIB_SN, TILEPRO_OPC_NONE, | |
8443 | BITFIELD(53, 1) /* index 1487 */, | |
8444 | TILEPRO_OPC_SRAIH_SN, TILEPRO_OPC_NONE, | |
8445 | BITFIELD(53, 1) /* index 1490 */, | |
8446 | TILEPRO_OPC_SRAI_SN, TILEPRO_OPC_NONE, | |
8447 | BITFIELD(43, 3) /* index 1493 */, | |
8448 | CHILD(1251), CHILD(1254), CHILD(1502), CHILD(1505), CHILD(1508), | |
8449 | CHILD(1511), CHILD(1514), CHILD(1287), | |
8450 | BITFIELD(53, 1) /* index 1502 */, | |
8451 | TILEPRO_OPC_LB_SN, TILEPRO_OPC_NONE, | |
8452 | BITFIELD(53, 1) /* index 1505 */, | |
8453 | TILEPRO_OPC_LB_U_SN, TILEPRO_OPC_NONE, | |
8454 | BITFIELD(53, 1) /* index 1508 */, | |
8455 | TILEPRO_OPC_LH_SN, TILEPRO_OPC_NONE, | |
8456 | BITFIELD(53, 1) /* index 1511 */, | |
8457 | TILEPRO_OPC_LH_U_SN, TILEPRO_OPC_NONE, | |
8458 | BITFIELD(53, 1) /* index 1514 */, | |
8459 | TILEPRO_OPC_LW_SN, TILEPRO_OPC_NONE, | |
8460 | BITFIELD(43, 3) /* index 1517 */, | |
8461 | CHILD(1299), CHILD(1302), CHILD(1305), CHILD(1308), CHILD(1311), | |
8462 | CHILD(1314), CHILD(1526), CHILD(1320), | |
8463 | BITFIELD(53, 1) /* index 1526 */, | |
8464 | TILEPRO_OPC_TNS_SN, TILEPRO_OPC_NONE, | |
8465 | BITFIELD(43, 2) /* index 1529 */, | |
8466 | CHILD(1534), TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
8467 | BITFIELD(45, 1) /* index 1534 */, | |
8468 | CHILD(1537), TILEPRO_OPC_NONE, | |
8469 | BITFIELD(53, 1) /* index 1537 */, | |
8470 | TILEPRO_OPC_LW_NA_SN, TILEPRO_OPC_NONE, | |
8471 | }; | |
8472 | ||
8473 | static const unsigned short decode_Y0_fsm[168] = | |
8474 | { | |
8475 | BITFIELD(27, 4) /* index 0 */, | |
8476 | TILEPRO_OPC_NONE, CHILD(17), CHILD(22), CHILD(27), CHILD(47), CHILD(52), | |
8477 | CHILD(57), CHILD(62), CHILD(67), TILEPRO_OPC_ADDI, CHILD(72), CHILD(102), | |
8478 | TILEPRO_OPC_SEQI, CHILD(117), TILEPRO_OPC_SLTI, TILEPRO_OPC_SLTI_U, | |
8479 | BITFIELD(18, 2) /* index 17 */, | |
8480 | TILEPRO_OPC_ADD, TILEPRO_OPC_S1A, TILEPRO_OPC_S2A, TILEPRO_OPC_SUB, | |
8481 | BITFIELD(18, 2) /* index 22 */, | |
8482 | TILEPRO_OPC_MNZ, TILEPRO_OPC_MVNZ, TILEPRO_OPC_MVZ, TILEPRO_OPC_MZ, | |
8483 | BITFIELD(18, 2) /* index 27 */, | |
8484 | TILEPRO_OPC_AND, TILEPRO_OPC_NOR, CHILD(32), TILEPRO_OPC_XOR, | |
8485 | BITFIELD(12, 2) /* index 32 */, | |
8486 | TILEPRO_OPC_OR, TILEPRO_OPC_OR, TILEPRO_OPC_OR, CHILD(37), | |
8487 | BITFIELD(14, 2) /* index 37 */, | |
8488 | TILEPRO_OPC_OR, TILEPRO_OPC_OR, TILEPRO_OPC_OR, CHILD(42), | |
8489 | BITFIELD(16, 2) /* index 42 */, | |
8490 | TILEPRO_OPC_OR, TILEPRO_OPC_OR, TILEPRO_OPC_OR, TILEPRO_OPC_MOVE, | |
8491 | BITFIELD(18, 2) /* index 47 */, | |
8492 | TILEPRO_OPC_RL, TILEPRO_OPC_SHL, TILEPRO_OPC_SHR, TILEPRO_OPC_SRA, | |
8493 | BITFIELD(18, 2) /* index 52 */, | |
8494 | TILEPRO_OPC_SLTE, TILEPRO_OPC_SLTE_U, TILEPRO_OPC_SLT, TILEPRO_OPC_SLT_U, | |
8495 | BITFIELD(18, 2) /* index 57 */, | |
8496 | TILEPRO_OPC_MULHLSA_UU, TILEPRO_OPC_S3A, TILEPRO_OPC_SEQ, TILEPRO_OPC_SNE, | |
8497 | BITFIELD(18, 2) /* index 62 */, | |
8498 | TILEPRO_OPC_MULHH_SS, TILEPRO_OPC_MULHH_UU, TILEPRO_OPC_MULLL_SS, | |
8499 | TILEPRO_OPC_MULLL_UU, | |
8500 | BITFIELD(18, 2) /* index 67 */, | |
8501 | TILEPRO_OPC_MULHHA_SS, TILEPRO_OPC_MULHHA_UU, TILEPRO_OPC_MULLLA_SS, | |
8502 | TILEPRO_OPC_MULLLA_UU, | |
8503 | BITFIELD(0, 2) /* index 72 */, | |
8504 | TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, CHILD(77), | |
8505 | BITFIELD(2, 2) /* index 77 */, | |
8506 | TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, CHILD(82), | |
8507 | BITFIELD(4, 2) /* index 82 */, | |
8508 | TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, CHILD(87), | |
8509 | BITFIELD(6, 2) /* index 87 */, | |
8510 | TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, CHILD(92), | |
8511 | BITFIELD(8, 2) /* index 92 */, | |
8512 | TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, CHILD(97), | |
8513 | BITFIELD(10, 2) /* index 97 */, | |
8514 | TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, TILEPRO_OPC_INFO, | |
8515 | BITFIELD(6, 2) /* index 102 */, | |
8516 | TILEPRO_OPC_ORI, TILEPRO_OPC_ORI, TILEPRO_OPC_ORI, CHILD(107), | |
8517 | BITFIELD(8, 2) /* index 107 */, | |
8518 | TILEPRO_OPC_ORI, TILEPRO_OPC_ORI, TILEPRO_OPC_ORI, CHILD(112), | |
8519 | BITFIELD(10, 2) /* index 112 */, | |
8520 | TILEPRO_OPC_ORI, TILEPRO_OPC_ORI, TILEPRO_OPC_ORI, TILEPRO_OPC_MOVEI, | |
8521 | BITFIELD(15, 5) /* index 117 */, | |
8522 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
8523 | TILEPRO_OPC_RLI, TILEPRO_OPC_RLI, TILEPRO_OPC_RLI, TILEPRO_OPC_RLI, | |
8524 | TILEPRO_OPC_SHLI, TILEPRO_OPC_SHLI, TILEPRO_OPC_SHLI, TILEPRO_OPC_SHLI, | |
8525 | TILEPRO_OPC_SHRI, TILEPRO_OPC_SHRI, TILEPRO_OPC_SHRI, TILEPRO_OPC_SHRI, | |
8526 | TILEPRO_OPC_SRAI, TILEPRO_OPC_SRAI, TILEPRO_OPC_SRAI, TILEPRO_OPC_SRAI, | |
8527 | CHILD(150), CHILD(159), TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
8528 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
8529 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
8530 | BITFIELD(12, 3) /* index 150 */, | |
8531 | TILEPRO_OPC_NONE, TILEPRO_OPC_BITX, TILEPRO_OPC_BYTEX, TILEPRO_OPC_CLZ, | |
8532 | TILEPRO_OPC_CTZ, TILEPRO_OPC_FNOP, TILEPRO_OPC_NOP, TILEPRO_OPC_PCNT, | |
8533 | BITFIELD(12, 3) /* index 159 */, | |
8534 | TILEPRO_OPC_TBLIDXB0, TILEPRO_OPC_TBLIDXB1, TILEPRO_OPC_TBLIDXB2, | |
8535 | TILEPRO_OPC_TBLIDXB3, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
8536 | TILEPRO_OPC_NONE, | |
8537 | }; | |
8538 | ||
8539 | static const unsigned short decode_Y1_fsm[140] = | |
8540 | { | |
8541 | BITFIELD(59, 4) /* index 0 */, | |
8542 | TILEPRO_OPC_NONE, CHILD(17), CHILD(22), CHILD(27), CHILD(47), CHILD(52), | |
8543 | CHILD(57), TILEPRO_OPC_ADDI, CHILD(62), CHILD(92), TILEPRO_OPC_SEQI, | |
8544 | CHILD(107), TILEPRO_OPC_SLTI, TILEPRO_OPC_SLTI_U, TILEPRO_OPC_NONE, | |
8545 | TILEPRO_OPC_NONE, | |
8546 | BITFIELD(49, 2) /* index 17 */, | |
8547 | TILEPRO_OPC_ADD, TILEPRO_OPC_S1A, TILEPRO_OPC_S2A, TILEPRO_OPC_SUB, | |
8548 | BITFIELD(49, 2) /* index 22 */, | |
8549 | TILEPRO_OPC_NONE, TILEPRO_OPC_MNZ, TILEPRO_OPC_MZ, TILEPRO_OPC_NONE, | |
8550 | BITFIELD(49, 2) /* index 27 */, | |
8551 | TILEPRO_OPC_AND, TILEPRO_OPC_NOR, CHILD(32), TILEPRO_OPC_XOR, | |
8552 | BITFIELD(43, 2) /* index 32 */, | |
8553 | TILEPRO_OPC_OR, TILEPRO_OPC_OR, TILEPRO_OPC_OR, CHILD(37), | |
8554 | BITFIELD(45, 2) /* index 37 */, | |
8555 | TILEPRO_OPC_OR, TILEPRO_OPC_OR, TILEPRO_OPC_OR, CHILD(42), | |
8556 | BITFIELD(47, 2) /* index 42 */, | |
8557 | TILEPRO_OPC_OR, TILEPRO_OPC_OR, TILEPRO_OPC_OR, TILEPRO_OPC_MOVE, | |
8558 | BITFIELD(49, 2) /* index 47 */, | |
8559 | TILEPRO_OPC_RL, TILEPRO_OPC_SHL, TILEPRO_OPC_SHR, TILEPRO_OPC_SRA, | |
8560 | BITFIELD(49, 2) /* index 52 */, | |
8561 | TILEPRO_OPC_SLTE, TILEPRO_OPC_SLTE_U, TILEPRO_OPC_SLT, TILEPRO_OPC_SLT_U, | |
8562 | BITFIELD(49, 2) /* index 57 */, | |
8563 | TILEPRO_OPC_NONE, TILEPRO_OPC_S3A, TILEPRO_OPC_SEQ, TILEPRO_OPC_SNE, | |
8564 | BITFIELD(31, 2) /* index 62 */, | |
8565 | TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, CHILD(67), | |
8566 | BITFIELD(33, 2) /* index 67 */, | |
8567 | TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, CHILD(72), | |
8568 | BITFIELD(35, 2) /* index 72 */, | |
8569 | TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, CHILD(77), | |
8570 | BITFIELD(37, 2) /* index 77 */, | |
8571 | TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, CHILD(82), | |
8572 | BITFIELD(39, 2) /* index 82 */, | |
8573 | TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, CHILD(87), | |
8574 | BITFIELD(41, 2) /* index 87 */, | |
8575 | TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, TILEPRO_OPC_ANDI, TILEPRO_OPC_INFO, | |
8576 | BITFIELD(37, 2) /* index 92 */, | |
8577 | TILEPRO_OPC_ORI, TILEPRO_OPC_ORI, TILEPRO_OPC_ORI, CHILD(97), | |
8578 | BITFIELD(39, 2) /* index 97 */, | |
8579 | TILEPRO_OPC_ORI, TILEPRO_OPC_ORI, TILEPRO_OPC_ORI, CHILD(102), | |
8580 | BITFIELD(41, 2) /* index 102 */, | |
8581 | TILEPRO_OPC_ORI, TILEPRO_OPC_ORI, TILEPRO_OPC_ORI, TILEPRO_OPC_MOVEI, | |
8582 | BITFIELD(48, 3) /* index 107 */, | |
8583 | TILEPRO_OPC_NONE, TILEPRO_OPC_RLI, TILEPRO_OPC_SHLI, TILEPRO_OPC_SHRI, | |
8584 | TILEPRO_OPC_SRAI, CHILD(116), TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
8585 | BITFIELD(43, 3) /* index 116 */, | |
8586 | TILEPRO_OPC_NONE, CHILD(125), CHILD(130), CHILD(135), TILEPRO_OPC_NONE, | |
8587 | TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
8588 | BITFIELD(46, 2) /* index 125 */, | |
8589 | TILEPRO_OPC_FNOP, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
8590 | BITFIELD(46, 2) /* index 130 */, | |
8591 | TILEPRO_OPC_ILL, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
8592 | BITFIELD(46, 2) /* index 135 */, | |
8593 | TILEPRO_OPC_NOP, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, TILEPRO_OPC_NONE, | |
8594 | }; | |
8595 | ||
8596 | static const unsigned short decode_Y2_fsm[24] = | |
8597 | { | |
8598 | BITFIELD(56, 3) /* index 0 */, | |
8599 | CHILD(9), TILEPRO_OPC_LB_U, TILEPRO_OPC_LH, TILEPRO_OPC_LH_U, | |
8600 | TILEPRO_OPC_LW, TILEPRO_OPC_SB, TILEPRO_OPC_SH, TILEPRO_OPC_SW, | |
8601 | BITFIELD(20, 2) /* index 9 */, | |
8602 | TILEPRO_OPC_LB, TILEPRO_OPC_LB, TILEPRO_OPC_LB, CHILD(14), | |
8603 | BITFIELD(22, 2) /* index 14 */, | |
8604 | TILEPRO_OPC_LB, TILEPRO_OPC_LB, TILEPRO_OPC_LB, CHILD(19), | |
8605 | BITFIELD(24, 2) /* index 19 */, | |
8606 | TILEPRO_OPC_LB, TILEPRO_OPC_LB, TILEPRO_OPC_LB, TILEPRO_OPC_PREFETCH, | |
8607 | }; | |
8608 | ||
8609 | #undef BITFIELD | |
8610 | #undef CHILD | |
8611 | ||
8612 | const unsigned short * const | |
8613 | tilepro_bundle_decoder_fsms[TILEPRO_NUM_PIPELINE_ENCODINGS] = | |
8614 | { | |
8615 | decode_X0_fsm, | |
8616 | decode_X1_fsm, | |
8617 | decode_Y0_fsm, | |
8618 | decode_Y1_fsm, | |
8619 | decode_Y2_fsm | |
8620 | }; | |
8621 | ||
8622 | #ifndef DISASM_ONLY | |
8623 | const struct tilepro_sn_opcode tilepro_sn_opcodes[23] = | |
8624 | { | |
8625 | { "bz", TILEPRO_SN_OPC_BZ, | |
8626 | 1 /* num_operands */, | |
8627 | /* operands */ | |
8628 | { 38 }, | |
8629 | /* fixed_bit_mask */ | |
8630 | 0xfc00, | |
8631 | /* fixed_bit_value */ | |
8632 | 0xe000 | |
8633 | }, | |
8634 | { "bnz", TILEPRO_SN_OPC_BNZ, | |
8635 | 1 /* num_operands */, | |
8636 | /* operands */ | |
8637 | { 38 }, | |
8638 | /* fixed_bit_mask */ | |
8639 | 0xfc00, | |
8640 | /* fixed_bit_value */ | |
8641 | 0xe400 | |
8642 | }, | |
8643 | { "jrr", TILEPRO_SN_OPC_JRR, | |
8644 | 1 /* num_operands */, | |
8645 | /* operands */ | |
8646 | { 39 }, | |
8647 | /* fixed_bit_mask */ | |
8648 | 0xff00, | |
8649 | /* fixed_bit_value */ | |
8650 | 0x0600 | |
8651 | }, | |
8652 | { "fnop", TILEPRO_SN_OPC_FNOP, | |
8653 | 0 /* num_operands */, | |
8654 | /* operands */ | |
8655 | { 0, }, | |
8656 | /* fixed_bit_mask */ | |
8657 | 0xffff, | |
8658 | /* fixed_bit_value */ | |
8659 | 0x0003 | |
8660 | }, | |
8661 | { "blz", TILEPRO_SN_OPC_BLZ, | |
8662 | 1 /* num_operands */, | |
8663 | /* operands */ | |
8664 | { 38 }, | |
8665 | /* fixed_bit_mask */ | |
8666 | 0xfc00, | |
8667 | /* fixed_bit_value */ | |
8668 | 0xf000 | |
8669 | }, | |
8670 | { "nop", TILEPRO_SN_OPC_NOP, | |
8671 | 0 /* num_operands */, | |
8672 | /* operands */ | |
8673 | { 0, }, | |
8674 | /* fixed_bit_mask */ | |
8675 | 0xffff, | |
8676 | /* fixed_bit_value */ | |
8677 | 0x0002 | |
8678 | }, | |
8679 | { "movei", TILEPRO_SN_OPC_MOVEI, | |
8680 | 1 /* num_operands */, | |
8681 | /* operands */ | |
8682 | { 40 }, | |
8683 | /* fixed_bit_mask */ | |
8684 | 0xff00, | |
8685 | /* fixed_bit_value */ | |
8686 | 0x0400 | |
8687 | }, | |
8688 | { "move", TILEPRO_SN_OPC_MOVE, | |
8689 | 2 /* num_operands */, | |
8690 | /* operands */ | |
8691 | { 41, 42 }, | |
8692 | /* fixed_bit_mask */ | |
8693 | 0xfff0, | |
8694 | /* fixed_bit_value */ | |
8695 | 0x0080 | |
8696 | }, | |
8697 | { "bgez", TILEPRO_SN_OPC_BGEZ, | |
8698 | 1 /* num_operands */, | |
8699 | /* operands */ | |
8700 | { 38 }, | |
8701 | /* fixed_bit_mask */ | |
8702 | 0xfc00, | |
8703 | /* fixed_bit_value */ | |
8704 | 0xf400 | |
8705 | }, | |
8706 | { "jr", TILEPRO_SN_OPC_JR, | |
8707 | 1 /* num_operands */, | |
8708 | /* operands */ | |
8709 | { 42 }, | |
8710 | /* fixed_bit_mask */ | |
8711 | 0xfff0, | |
8712 | /* fixed_bit_value */ | |
8713 | 0x0040 | |
8714 | }, | |
8715 | { "blez", TILEPRO_SN_OPC_BLEZ, | |
8716 | 1 /* num_operands */, | |
8717 | /* operands */ | |
8718 | { 38 }, | |
8719 | /* fixed_bit_mask */ | |
8720 | 0xfc00, | |
8721 | /* fixed_bit_value */ | |
8722 | 0xec00 | |
8723 | }, | |
8724 | { "bbns", TILEPRO_SN_OPC_BBNS, | |
8725 | 1 /* num_operands */, | |
8726 | /* operands */ | |
8727 | { 38 }, | |
8728 | /* fixed_bit_mask */ | |
8729 | 0xfc00, | |
8730 | /* fixed_bit_value */ | |
8731 | 0xfc00 | |
8732 | }, | |
8733 | { "jalrr", TILEPRO_SN_OPC_JALRR, | |
8734 | 1 /* num_operands */, | |
8735 | /* operands */ | |
8736 | { 39 }, | |
8737 | /* fixed_bit_mask */ | |
8738 | 0xff00, | |
8739 | /* fixed_bit_value */ | |
8740 | 0x0700 | |
8741 | }, | |
8742 | { "bpt", TILEPRO_SN_OPC_BPT, | |
8743 | 0 /* num_operands */, | |
8744 | /* operands */ | |
8745 | { 0, }, | |
8746 | /* fixed_bit_mask */ | |
8747 | 0xffff, | |
8748 | /* fixed_bit_value */ | |
8749 | 0x0001 | |
8750 | }, | |
8751 | { "jalr", TILEPRO_SN_OPC_JALR, | |
8752 | 1 /* num_operands */, | |
8753 | /* operands */ | |
8754 | { 42 }, | |
8755 | /* fixed_bit_mask */ | |
8756 | 0xfff0, | |
8757 | /* fixed_bit_value */ | |
8758 | 0x0050 | |
8759 | }, | |
8760 | { "shr1", TILEPRO_SN_OPC_SHR1, | |
8761 | 2 /* num_operands */, | |
8762 | /* operands */ | |
8763 | { 41, 42 }, | |
8764 | /* fixed_bit_mask */ | |
8765 | 0xfff0, | |
8766 | /* fixed_bit_value */ | |
8767 | 0x0090 | |
8768 | }, | |
8769 | { "bgz", TILEPRO_SN_OPC_BGZ, | |
8770 | 1 /* num_operands */, | |
8771 | /* operands */ | |
8772 | { 38 }, | |
8773 | /* fixed_bit_mask */ | |
8774 | 0xfc00, | |
8775 | /* fixed_bit_value */ | |
8776 | 0xe800 | |
8777 | }, | |
8778 | { "bbs", TILEPRO_SN_OPC_BBS, | |
8779 | 1 /* num_operands */, | |
8780 | /* operands */ | |
8781 | { 38 }, | |
8782 | /* fixed_bit_mask */ | |
8783 | 0xfc00, | |
8784 | /* fixed_bit_value */ | |
8785 | 0xf800 | |
8786 | }, | |
8787 | { "shl8ii", TILEPRO_SN_OPC_SHL8II, | |
8788 | 1 /* num_operands */, | |
8789 | /* operands */ | |
8790 | { 39 }, | |
8791 | /* fixed_bit_mask */ | |
8792 | 0xff00, | |
8793 | /* fixed_bit_value */ | |
8794 | 0x0300 | |
8795 | }, | |
8796 | { "addi", TILEPRO_SN_OPC_ADDI, | |
8797 | 1 /* num_operands */, | |
8798 | /* operands */ | |
8799 | { 40 }, | |
8800 | /* fixed_bit_mask */ | |
8801 | 0xff00, | |
8802 | /* fixed_bit_value */ | |
8803 | 0x0500 | |
8804 | }, | |
8805 | { "halt", TILEPRO_SN_OPC_HALT, | |
8806 | 0 /* num_operands */, | |
8807 | /* operands */ | |
8808 | { 0, }, | |
8809 | /* fixed_bit_mask */ | |
8810 | 0xffff, | |
8811 | /* fixed_bit_value */ | |
8812 | 0x0000 | |
8813 | }, | |
8814 | { "route", TILEPRO_SN_OPC_ROUTE, 0, { 0, }, 0, 0, | |
8815 | }, | |
8816 | { 0, TILEPRO_SN_OPC_NONE, 0, { 0, }, 0, 0, | |
8817 | } | |
8818 | }; | |
8819 | ||
8820 | const unsigned char tilepro_sn_route_encode[6 * 6 * 6] = | |
8821 | { | |
8822 | 0xdf, | |
8823 | 0xde, | |
8824 | 0xdd, | |
8825 | 0xdc, | |
8826 | 0xdb, | |
8827 | 0xda, | |
8828 | 0xb9, | |
8829 | 0xb8, | |
8830 | 0xa1, | |
8831 | 0xa0, | |
8832 | 0x11, | |
8833 | 0x10, | |
8834 | 0x9f, | |
8835 | 0x9e, | |
8836 | 0x9d, | |
8837 | 0x9c, | |
8838 | 0x9b, | |
8839 | 0x9a, | |
8840 | 0x79, | |
8841 | 0x78, | |
8842 | 0x61, | |
8843 | 0x60, | |
8844 | 0xb, | |
8845 | 0xa, | |
8846 | 0x5f, | |
8847 | 0x5e, | |
8848 | 0x5d, | |
8849 | 0x5c, | |
8850 | 0x5b, | |
8851 | 0x5a, | |
8852 | 0x1f, | |
8853 | 0x1e, | |
8854 | 0x1d, | |
8855 | 0x1c, | |
8856 | 0x1b, | |
8857 | 0x1a, | |
8858 | 0xd7, | |
8859 | 0xd6, | |
8860 | 0xd5, | |
8861 | 0xd4, | |
8862 | 0xd3, | |
8863 | 0xd2, | |
8864 | 0xa7, | |
8865 | 0xa6, | |
8866 | 0xb1, | |
8867 | 0xb0, | |
8868 | 0x13, | |
8869 | 0x12, | |
8870 | 0x97, | |
8871 | 0x96, | |
8872 | 0x95, | |
8873 | 0x94, | |
8874 | 0x93, | |
8875 | 0x92, | |
8876 | 0x67, | |
8877 | 0x66, | |
8878 | 0x71, | |
8879 | 0x70, | |
8880 | 0x9, | |
8881 | 0x8, | |
8882 | 0x57, | |
8883 | 0x56, | |
8884 | 0x55, | |
8885 | 0x54, | |
8886 | 0x53, | |
8887 | 0x52, | |
8888 | 0x17, | |
8889 | 0x16, | |
8890 | 0x15, | |
8891 | 0x14, | |
8892 | 0x19, | |
8893 | 0x18, | |
8894 | 0xcf, | |
8895 | 0xce, | |
8896 | 0xcd, | |
8897 | 0xcc, | |
8898 | 0xcb, | |
8899 | 0xca, | |
8900 | 0xaf, | |
8901 | 0xae, | |
8902 | 0xad, | |
8903 | 0xac, | |
8904 | 0xab, | |
8905 | 0xaa, | |
8906 | 0x8f, | |
8907 | 0x8e, | |
8908 | 0x8d, | |
8909 | 0x8c, | |
8910 | 0x8b, | |
8911 | 0x8a, | |
8912 | 0x6f, | |
8913 | 0x6e, | |
8914 | 0x6d, | |
8915 | 0x6c, | |
8916 | 0x6b, | |
8917 | 0x6a, | |
8918 | 0x4f, | |
8919 | 0x4e, | |
8920 | 0x4d, | |
8921 | 0x4c, | |
8922 | 0x4b, | |
8923 | 0x4a, | |
8924 | 0x2f, | |
8925 | 0x2e, | |
8926 | 0x2d, | |
8927 | 0x2c, | |
8928 | 0x2b, | |
8929 | 0x2a, | |
8930 | 0xc9, | |
8931 | 0xc8, | |
8932 | 0xc5, | |
8933 | 0xc4, | |
8934 | 0xc3, | |
8935 | 0xc2, | |
8936 | 0xa9, | |
8937 | 0xa8, | |
8938 | 0xa5, | |
8939 | 0xa4, | |
8940 | 0xa3, | |
8941 | 0xa2, | |
8942 | 0x89, | |
8943 | 0x88, | |
8944 | 0x85, | |
8945 | 0x84, | |
8946 | 0x83, | |
8947 | 0x82, | |
8948 | 0x69, | |
8949 | 0x68, | |
8950 | 0x65, | |
8951 | 0x64, | |
8952 | 0x63, | |
8953 | 0x62, | |
8954 | 0x47, | |
8955 | 0x46, | |
8956 | 0x45, | |
8957 | 0x44, | |
8958 | 0x43, | |
8959 | 0x42, | |
8960 | 0x27, | |
8961 | 0x26, | |
8962 | 0x25, | |
8963 | 0x24, | |
8964 | 0x23, | |
8965 | 0x22, | |
8966 | 0xd9, | |
8967 | 0xd8, | |
8968 | 0xc1, | |
8969 | 0xc0, | |
8970 | 0x3b, | |
8971 | 0x3a, | |
8972 | 0xbf, | |
8973 | 0xbe, | |
8974 | 0xbd, | |
8975 | 0xbc, | |
8976 | 0xbb, | |
8977 | 0xba, | |
8978 | 0x99, | |
8979 | 0x98, | |
8980 | 0x81, | |
8981 | 0x80, | |
8982 | 0x31, | |
8983 | 0x30, | |
8984 | 0x7f, | |
8985 | 0x7e, | |
8986 | 0x7d, | |
8987 | 0x7c, | |
8988 | 0x7b, | |
8989 | 0x7a, | |
8990 | 0x59, | |
8991 | 0x58, | |
8992 | 0x3d, | |
8993 | 0x3c, | |
8994 | 0x49, | |
8995 | 0x48, | |
8996 | 0xf, | |
8997 | 0xe, | |
8998 | 0xd, | |
8999 | 0xc, | |
9000 | 0x29, | |
9001 | 0x28, | |
9002 | 0xc7, | |
9003 | 0xc6, | |
9004 | 0xd1, | |
9005 | 0xd0, | |
9006 | 0x39, | |
9007 | 0x38, | |
9008 | 0xb7, | |
9009 | 0xb6, | |
9010 | 0xb5, | |
9011 | 0xb4, | |
9012 | 0xb3, | |
9013 | 0xb2, | |
9014 | 0x87, | |
9015 | 0x86, | |
9016 | 0x91, | |
9017 | 0x90, | |
9018 | 0x33, | |
9019 | 0x32, | |
9020 | 0x77, | |
9021 | 0x76, | |
9022 | 0x75, | |
9023 | 0x74, | |
9024 | 0x73, | |
9025 | 0x72, | |
9026 | 0x3f, | |
9027 | 0x3e, | |
9028 | 0x51, | |
9029 | 0x50, | |
9030 | 0x41, | |
9031 | 0x40, | |
9032 | 0x37, | |
9033 | 0x36, | |
9034 | 0x35, | |
9035 | 0x34, | |
9036 | 0x21, | |
9037 | 0x20 | |
9038 | }; | |
9039 | ||
9040 | const signed char tilepro_sn_route_decode[256][3] = | |
9041 | { | |
9042 | { -1, -1, -1 }, | |
9043 | { -1, -1, -1 }, | |
9044 | { -1, -1, -1 }, | |
9045 | { -1, -1, -1 }, | |
9046 | { -1, -1, -1 }, | |
9047 | { -1, -1, -1 }, | |
9048 | { -1, -1, -1 }, | |
9049 | { -1, -1, -1 }, | |
9050 | { 5, 3, 1 }, | |
9051 | { 4, 3, 1 }, | |
9052 | { 5, 3, 0 }, | |
9053 | { 4, 3, 0 }, | |
9054 | { 3, 5, 4 }, | |
9055 | { 2, 5, 4 }, | |
9056 | { 1, 5, 4 }, | |
9057 | { 0, 5, 4 }, | |
9058 | { 5, 1, 0 }, | |
9059 | { 4, 1, 0 }, | |
9060 | { 5, 1, 1 }, | |
9061 | { 4, 1, 1 }, | |
9062 | { 3, 5, 1 }, | |
9063 | { 2, 5, 1 }, | |
9064 | { 1, 5, 1 }, | |
9065 | { 0, 5, 1 }, | |
9066 | { 5, 5, 1 }, | |
9067 | { 4, 5, 1 }, | |
9068 | { 5, 5, 0 }, | |
9069 | { 4, 5, 0 }, | |
9070 | { 3, 5, 0 }, | |
9071 | { 2, 5, 0 }, | |
9072 | { 1, 5, 0 }, | |
9073 | { 0, 5, 0 }, | |
9074 | { 5, 5, 5 }, | |
9075 | { 4, 5, 5 }, | |
9076 | { 5, 5, 3 }, | |
9077 | { 4, 5, 3 }, | |
9078 | { 3, 5, 3 }, | |
9079 | { 2, 5, 3 }, | |
9080 | { 1, 5, 3 }, | |
9081 | { 0, 5, 3 }, | |
9082 | { 5, 5, 4 }, | |
9083 | { 4, 5, 4 }, | |
9084 | { 5, 5, 2 }, | |
9085 | { 4, 5, 2 }, | |
9086 | { 3, 5, 2 }, | |
9087 | { 2, 5, 2 }, | |
9088 | { 1, 5, 2 }, | |
9089 | { 0, 5, 2 }, | |
9090 | { 5, 2, 4 }, | |
9091 | { 4, 2, 4 }, | |
9092 | { 5, 2, 5 }, | |
9093 | { 4, 2, 5 }, | |
9094 | { 3, 5, 5 }, | |
9095 | { 2, 5, 5 }, | |
9096 | { 1, 5, 5 }, | |
9097 | { 0, 5, 5 }, | |
9098 | { 5, 0, 5 }, | |
9099 | { 4, 0, 5 }, | |
9100 | { 5, 0, 4 }, | |
9101 | { 4, 0, 4 }, | |
9102 | { 3, 4, 4 }, | |
9103 | { 2, 4, 4 }, | |
9104 | { 1, 4, 5 }, | |
9105 | { 0, 4, 5 }, | |
9106 | { 5, 4, 5 }, | |
9107 | { 4, 4, 5 }, | |
9108 | { 5, 4, 3 }, | |
9109 | { 4, 4, 3 }, | |
9110 | { 3, 4, 3 }, | |
9111 | { 2, 4, 3 }, | |
9112 | { 1, 4, 3 }, | |
9113 | { 0, 4, 3 }, | |
9114 | { 5, 4, 4 }, | |
9115 | { 4, 4, 4 }, | |
9116 | { 5, 4, 2 }, | |
9117 | { 4, 4, 2 }, | |
9118 | { 3, 4, 2 }, | |
9119 | { 2, 4, 2 }, | |
9120 | { 1, 4, 2 }, | |
9121 | { 0, 4, 2 }, | |
9122 | { 3, 4, 5 }, | |
9123 | { 2, 4, 5 }, | |
9124 | { 5, 4, 1 }, | |
9125 | { 4, 4, 1 }, | |
9126 | { 3, 4, 1 }, | |
9127 | { 2, 4, 1 }, | |
9128 | { 1, 4, 1 }, | |
9129 | { 0, 4, 1 }, | |
9130 | { 1, 4, 4 }, | |
9131 | { 0, 4, 4 }, | |
9132 | { 5, 4, 0 }, | |
9133 | { 4, 4, 0 }, | |
9134 | { 3, 4, 0 }, | |
9135 | { 2, 4, 0 }, | |
9136 | { 1, 4, 0 }, | |
9137 | { 0, 4, 0 }, | |
9138 | { 3, 3, 0 }, | |
9139 | { 2, 3, 0 }, | |
9140 | { 5, 3, 3 }, | |
9141 | { 4, 3, 3 }, | |
9142 | { 3, 3, 3 }, | |
9143 | { 2, 3, 3 }, | |
9144 | { 1, 3, 1 }, | |
9145 | { 0, 3, 1 }, | |
9146 | { 1, 3, 3 }, | |
9147 | { 0, 3, 3 }, | |
9148 | { 5, 3, 2 }, | |
9149 | { 4, 3, 2 }, | |
9150 | { 3, 3, 2 }, | |
9151 | { 2, 3, 2 }, | |
9152 | { 1, 3, 2 }, | |
9153 | { 0, 3, 2 }, | |
9154 | { 3, 3, 1 }, | |
9155 | { 2, 3, 1 }, | |
9156 | { 5, 3, 5 }, | |
9157 | { 4, 3, 5 }, | |
9158 | { 3, 3, 5 }, | |
9159 | { 2, 3, 5 }, | |
9160 | { 1, 3, 5 }, | |
9161 | { 0, 3, 5 }, | |
9162 | { 1, 3, 0 }, | |
9163 | { 0, 3, 0 }, | |
9164 | { 5, 3, 4 }, | |
9165 | { 4, 3, 4 }, | |
9166 | { 3, 3, 4 }, | |
9167 | { 2, 3, 4 }, | |
9168 | { 1, 3, 4 }, | |
9169 | { 0, 3, 4 }, | |
9170 | { 3, 2, 4 }, | |
9171 | { 2, 2, 4 }, | |
9172 | { 5, 2, 3 }, | |
9173 | { 4, 2, 3 }, | |
9174 | { 3, 2, 3 }, | |
9175 | { 2, 2, 3 }, | |
9176 | { 1, 2, 5 }, | |
9177 | { 0, 2, 5 }, | |
9178 | { 1, 2, 3 }, | |
9179 | { 0, 2, 3 }, | |
9180 | { 5, 2, 2 }, | |
9181 | { 4, 2, 2 }, | |
9182 | { 3, 2, 2 }, | |
9183 | { 2, 2, 2 }, | |
9184 | { 1, 2, 2 }, | |
9185 | { 0, 2, 2 }, | |
9186 | { 3, 2, 5 }, | |
9187 | { 2, 2, 5 }, | |
9188 | { 5, 2, 1 }, | |
9189 | { 4, 2, 1 }, | |
9190 | { 3, 2, 1 }, | |
9191 | { 2, 2, 1 }, | |
9192 | { 1, 2, 1 }, | |
9193 | { 0, 2, 1 }, | |
9194 | { 1, 2, 4 }, | |
9195 | { 0, 2, 4 }, | |
9196 | { 5, 2, 0 }, | |
9197 | { 4, 2, 0 }, | |
9198 | { 3, 2, 0 }, | |
9199 | { 2, 2, 0 }, | |
9200 | { 1, 2, 0 }, | |
9201 | { 0, 2, 0 }, | |
9202 | { 3, 1, 0 }, | |
9203 | { 2, 1, 0 }, | |
9204 | { 5, 1, 3 }, | |
9205 | { 4, 1, 3 }, | |
9206 | { 3, 1, 3 }, | |
9207 | { 2, 1, 3 }, | |
9208 | { 1, 1, 1 }, | |
9209 | { 0, 1, 1 }, | |
9210 | { 1, 1, 3 }, | |
9211 | { 0, 1, 3 }, | |
9212 | { 5, 1, 2 }, | |
9213 | { 4, 1, 2 }, | |
9214 | { 3, 1, 2 }, | |
9215 | { 2, 1, 2 }, | |
9216 | { 1, 1, 2 }, | |
9217 | { 0, 1, 2 }, | |
9218 | { 3, 1, 1 }, | |
9219 | { 2, 1, 1 }, | |
9220 | { 5, 1, 5 }, | |
9221 | { 4, 1, 5 }, | |
9222 | { 3, 1, 5 }, | |
9223 | { 2, 1, 5 }, | |
9224 | { 1, 1, 5 }, | |
9225 | { 0, 1, 5 }, | |
9226 | { 1, 1, 0 }, | |
9227 | { 0, 1, 0 }, | |
9228 | { 5, 1, 4 }, | |
9229 | { 4, 1, 4 }, | |
9230 | { 3, 1, 4 }, | |
9231 | { 2, 1, 4 }, | |
9232 | { 1, 1, 4 }, | |
9233 | { 0, 1, 4 }, | |
9234 | { 3, 0, 4 }, | |
9235 | { 2, 0, 4 }, | |
9236 | { 5, 0, 3 }, | |
9237 | { 4, 0, 3 }, | |
9238 | { 3, 0, 3 }, | |
9239 | { 2, 0, 3 }, | |
9240 | { 1, 0, 5 }, | |
9241 | { 0, 0, 5 }, | |
9242 | { 1, 0, 3 }, | |
9243 | { 0, 0, 3 }, | |
9244 | { 5, 0, 2 }, | |
9245 | { 4, 0, 2 }, | |
9246 | { 3, 0, 2 }, | |
9247 | { 2, 0, 2 }, | |
9248 | { 1, 0, 2 }, | |
9249 | { 0, 0, 2 }, | |
9250 | { 3, 0, 5 }, | |
9251 | { 2, 0, 5 }, | |
9252 | { 5, 0, 1 }, | |
9253 | { 4, 0, 1 }, | |
9254 | { 3, 0, 1 }, | |
9255 | { 2, 0, 1 }, | |
9256 | { 1, 0, 1 }, | |
9257 | { 0, 0, 1 }, | |
9258 | { 1, 0, 4 }, | |
9259 | { 0, 0, 4 }, | |
9260 | { 5, 0, 0 }, | |
9261 | { 4, 0, 0 }, | |
9262 | { 3, 0, 0 }, | |
9263 | { 2, 0, 0 }, | |
9264 | { 1, 0, 0 }, | |
9265 | { 0, 0, 0 }, | |
9266 | { -1, -1, -1 }, | |
9267 | { -1, -1, -1 }, | |
9268 | { -1, -1, -1 }, | |
9269 | { -1, -1, -1 }, | |
9270 | { -1, -1, -1 }, | |
9271 | { -1, -1, -1 }, | |
9272 | { -1, -1, -1 }, | |
9273 | { -1, -1, -1 }, | |
9274 | { -1, -1, -1 }, | |
9275 | { -1, -1, -1 }, | |
9276 | { -1, -1, -1 }, | |
9277 | { -1, -1, -1 }, | |
9278 | { -1, -1, -1 }, | |
9279 | { -1, -1, -1 }, | |
9280 | { -1, -1, -1 }, | |
9281 | { -1, -1, -1 }, | |
9282 | { -1, -1, -1 }, | |
9283 | { -1, -1, -1 }, | |
9284 | { -1, -1, -1 }, | |
9285 | { -1, -1, -1 }, | |
9286 | { -1, -1, -1 }, | |
9287 | { -1, -1, -1 }, | |
9288 | { -1, -1, -1 }, | |
9289 | { -1, -1, -1 }, | |
9290 | { -1, -1, -1 }, | |
9291 | { -1, -1, -1 }, | |
9292 | { -1, -1, -1 }, | |
9293 | { -1, -1, -1 }, | |
9294 | { -1, -1, -1 }, | |
9295 | { -1, -1, -1 }, | |
9296 | { -1, -1, -1 }, | |
9297 | { -1, -1, -1 } | |
9298 | }; | |
9299 | ||
9300 | const char tilepro_sn_direction_names[6][5] = | |
9301 | { | |
9302 | "w", | |
9303 | "c", | |
9304 | "acc", | |
9305 | "n", | |
9306 | "e", | |
9307 | "s" | |
9308 | }; | |
9309 | ||
9310 | const signed char tilepro_sn_dest_map[6][6] = | |
9311 | { | |
9312 | { -1, 3, 4, 5, 1, 2 } /* val -> w */, | |
9313 | { -1, 3, 4, 5, 0, 2 } /* val -> c */, | |
9314 | { -1, 3, 4, 5, 0, 1 } /* val -> acc */, | |
9315 | { -1, 4, 5, 0, 1, 2 } /* val -> n */, | |
9316 | { -1, 3, 5, 0, 1, 2 } /* val -> e */, | |
9317 | { -1, 3, 4, 0, 1, 2 } /* val -> s */ | |
9318 | }; | |
9319 | #endif /* DISASM_ONLY */ | |
9320 | ||
9321 | const struct tilepro_operand tilepro_operands[43] = | |
9322 | { | |
9323 | { | |
9324 | TILEPRO_OP_TYPE_IMMEDIATE, BFD_RELOC(TILEPRO_IMM8_X0), | |
9325 | 8, 1, 0, 0, 0, 0, | |
9326 | create_Imm8_X0, get_Imm8_X0 | |
9327 | }, | |
9328 | { | |
9329 | TILEPRO_OP_TYPE_IMMEDIATE, BFD_RELOC(TILEPRO_IMM8_X1), | |
9330 | 8, 1, 0, 0, 0, 0, | |
9331 | create_Imm8_X1, get_Imm8_X1 | |
9332 | }, | |
9333 | { | |
9334 | TILEPRO_OP_TYPE_IMMEDIATE, BFD_RELOC(TILEPRO_IMM8_Y0), | |
9335 | 8, 1, 0, 0, 0, 0, | |
9336 | create_Imm8_Y0, get_Imm8_Y0 | |
9337 | }, | |
9338 | { | |
9339 | TILEPRO_OP_TYPE_IMMEDIATE, BFD_RELOC(TILEPRO_IMM8_Y1), | |
9340 | 8, 1, 0, 0, 0, 0, | |
9341 | create_Imm8_Y1, get_Imm8_Y1 | |
9342 | }, | |
9343 | { | |
9344 | TILEPRO_OP_TYPE_IMMEDIATE, BFD_RELOC(TILEPRO_IMM16_X0), | |
9345 | 16, 1, 0, 0, 0, 0, | |
9346 | create_Imm16_X0, get_Imm16_X0 | |
9347 | }, | |
9348 | { | |
9349 | TILEPRO_OP_TYPE_IMMEDIATE, BFD_RELOC(TILEPRO_IMM16_X1), | |
9350 | 16, 1, 0, 0, 0, 0, | |
9351 | create_Imm16_X1, get_Imm16_X1 | |
9352 | }, | |
9353 | { | |
9354 | TILEPRO_OP_TYPE_ADDRESS, BFD_RELOC(TILEPRO_JOFFLONG_X1), | |
9355 | 29, 1, 0, 0, 1, TILEPRO_LOG2_BUNDLE_ALIGNMENT_IN_BYTES, | |
9356 | create_JOffLong_X1, get_JOffLong_X1 | |
9357 | }, | |
9358 | { | |
9359 | TILEPRO_OP_TYPE_REGISTER, BFD_RELOC(NONE), | |
9360 | 6, 0, 0, 1, 0, 0, | |
9361 | create_Dest_X0, get_Dest_X0 | |
9362 | }, | |
9363 | { | |
9364 | TILEPRO_OP_TYPE_REGISTER, BFD_RELOC(NONE), | |
9365 | 6, 0, 1, 0, 0, 0, | |
9366 | create_SrcA_X0, get_SrcA_X0 | |
9367 | }, | |
9368 | { | |
9369 | TILEPRO_OP_TYPE_REGISTER, BFD_RELOC(NONE), | |
9370 | 6, 0, 0, 1, 0, 0, | |
9371 | create_Dest_X1, get_Dest_X1 | |
9372 | }, | |
9373 | { | |
9374 | TILEPRO_OP_TYPE_REGISTER, BFD_RELOC(NONE), | |
9375 | 6, 0, 1, 0, 0, 0, | |
9376 | create_SrcA_X1, get_SrcA_X1 | |
9377 | }, | |
9378 | { | |
9379 | TILEPRO_OP_TYPE_REGISTER, BFD_RELOC(NONE), | |
9380 | 6, 0, 0, 1, 0, 0, | |
9381 | create_Dest_Y0, get_Dest_Y0 | |
9382 | }, | |
9383 | { | |
9384 | TILEPRO_OP_TYPE_REGISTER, BFD_RELOC(NONE), | |
9385 | 6, 0, 1, 0, 0, 0, | |
9386 | create_SrcA_Y0, get_SrcA_Y0 | |
9387 | }, | |
9388 | { | |
9389 | TILEPRO_OP_TYPE_REGISTER, BFD_RELOC(NONE), | |
9390 | 6, 0, 0, 1, 0, 0, | |
9391 | create_Dest_Y1, get_Dest_Y1 | |
9392 | }, | |
9393 | { | |
9394 | TILEPRO_OP_TYPE_REGISTER, BFD_RELOC(NONE), | |
9395 | 6, 0, 1, 0, 0, 0, | |
9396 | create_SrcA_Y1, get_SrcA_Y1 | |
9397 | }, | |
9398 | { | |
9399 | TILEPRO_OP_TYPE_REGISTER, BFD_RELOC(NONE), | |
9400 | 6, 0, 1, 0, 0, 0, | |
9401 | create_SrcA_Y2, get_SrcA_Y2 | |
9402 | }, | |
9403 | { | |
9404 | TILEPRO_OP_TYPE_REGISTER, BFD_RELOC(NONE), | |
9405 | 6, 0, 1, 0, 0, 0, | |
9406 | create_SrcB_X0, get_SrcB_X0 | |
9407 | }, | |
9408 | { | |
9409 | TILEPRO_OP_TYPE_REGISTER, BFD_RELOC(NONE), | |
9410 | 6, 0, 1, 0, 0, 0, | |
9411 | create_SrcB_X1, get_SrcB_X1 | |
9412 | }, | |
9413 | { | |
9414 | TILEPRO_OP_TYPE_REGISTER, BFD_RELOC(NONE), | |
9415 | 6, 0, 1, 0, 0, 0, | |
9416 | create_SrcB_Y0, get_SrcB_Y0 | |
9417 | }, | |
9418 | { | |
9419 | TILEPRO_OP_TYPE_REGISTER, BFD_RELOC(NONE), | |
9420 | 6, 0, 1, 0, 0, 0, | |
9421 | create_SrcB_Y1, get_SrcB_Y1 | |
9422 | }, | |
9423 | { | |
9424 | TILEPRO_OP_TYPE_ADDRESS, BFD_RELOC(TILEPRO_BROFF_X1), | |
9425 | 17, 1, 0, 0, 1, TILEPRO_LOG2_BUNDLE_ALIGNMENT_IN_BYTES, | |
9426 | create_BrOff_X1, get_BrOff_X1 | |
9427 | }, | |
9428 | { | |
9429 | TILEPRO_OP_TYPE_REGISTER, BFD_RELOC(NONE), | |
9430 | 6, 0, 1, 1, 0, 0, | |
9431 | create_Dest_X0, get_Dest_X0 | |
9432 | }, | |
9433 | { | |
9434 | TILEPRO_OP_TYPE_ADDRESS, BFD_RELOC(NONE), | |
9435 | 28, 1, 0, 0, 1, TILEPRO_LOG2_BUNDLE_ALIGNMENT_IN_BYTES, | |
9436 | create_JOff_X1, get_JOff_X1 | |
9437 | }, | |
9438 | { | |
9439 | TILEPRO_OP_TYPE_REGISTER, BFD_RELOC(NONE), | |
9440 | 6, 0, 0, 1, 0, 0, | |
9441 | create_SrcBDest_Y2, get_SrcBDest_Y2 | |
9442 | }, | |
9443 | { | |
9444 | TILEPRO_OP_TYPE_REGISTER, BFD_RELOC(NONE), | |
9445 | 6, 0, 1, 1, 0, 0, | |
9446 | create_SrcA_X1, get_SrcA_X1 | |
9447 | }, | |
9448 | { | |
9449 | TILEPRO_OP_TYPE_SPR, BFD_RELOC(TILEPRO_MF_IMM15_X1), | |
9450 | 15, 0, 0, 0, 0, 0, | |
9451 | create_MF_Imm15_X1, get_MF_Imm15_X1 | |
9452 | }, | |
9453 | { | |
9454 | TILEPRO_OP_TYPE_IMMEDIATE, BFD_RELOC(TILEPRO_MMSTART_X0), | |
9455 | 5, 0, 0, 0, 0, 0, | |
9456 | create_MMStart_X0, get_MMStart_X0 | |
9457 | }, | |
9458 | { | |
9459 | TILEPRO_OP_TYPE_IMMEDIATE, BFD_RELOC(TILEPRO_MMEND_X0), | |
9460 | 5, 0, 0, 0, 0, 0, | |
9461 | create_MMEnd_X0, get_MMEnd_X0 | |
9462 | }, | |
9463 | { | |
9464 | TILEPRO_OP_TYPE_IMMEDIATE, BFD_RELOC(TILEPRO_MMSTART_X1), | |
9465 | 5, 0, 0, 0, 0, 0, | |
9466 | create_MMStart_X1, get_MMStart_X1 | |
9467 | }, | |
9468 | { | |
9469 | TILEPRO_OP_TYPE_IMMEDIATE, BFD_RELOC(TILEPRO_MMEND_X1), | |
9470 | 5, 0, 0, 0, 0, 0, | |
9471 | create_MMEnd_X1, get_MMEnd_X1 | |
9472 | }, | |
9473 | { | |
9474 | TILEPRO_OP_TYPE_SPR, BFD_RELOC(TILEPRO_MT_IMM15_X1), | |
9475 | 15, 0, 0, 0, 0, 0, | |
9476 | create_MT_Imm15_X1, get_MT_Imm15_X1 | |
9477 | }, | |
9478 | { | |
9479 | TILEPRO_OP_TYPE_REGISTER, BFD_RELOC(NONE), | |
9480 | 6, 0, 1, 1, 0, 0, | |
9481 | create_Dest_Y0, get_Dest_Y0 | |
9482 | }, | |
9483 | { | |
9484 | TILEPRO_OP_TYPE_IMMEDIATE, BFD_RELOC(TILEPRO_SHAMT_X0), | |
9485 | 5, 0, 0, 0, 0, 0, | |
9486 | create_ShAmt_X0, get_ShAmt_X0 | |
9487 | }, | |
9488 | { | |
9489 | TILEPRO_OP_TYPE_IMMEDIATE, BFD_RELOC(TILEPRO_SHAMT_X1), | |
9490 | 5, 0, 0, 0, 0, 0, | |
9491 | create_ShAmt_X1, get_ShAmt_X1 | |
9492 | }, | |
9493 | { | |
9494 | TILEPRO_OP_TYPE_IMMEDIATE, BFD_RELOC(TILEPRO_SHAMT_Y0), | |
9495 | 5, 0, 0, 0, 0, 0, | |
9496 | create_ShAmt_Y0, get_ShAmt_Y0 | |
9497 | }, | |
9498 | { | |
9499 | TILEPRO_OP_TYPE_IMMEDIATE, BFD_RELOC(TILEPRO_SHAMT_Y1), | |
9500 | 5, 0, 0, 0, 0, 0, | |
9501 | create_ShAmt_Y1, get_ShAmt_Y1 | |
9502 | }, | |
9503 | { | |
9504 | TILEPRO_OP_TYPE_REGISTER, BFD_RELOC(NONE), | |
9505 | 6, 0, 1, 0, 0, 0, | |
9506 | create_SrcBDest_Y2, get_SrcBDest_Y2 | |
9507 | }, | |
9508 | { | |
9509 | TILEPRO_OP_TYPE_IMMEDIATE, BFD_RELOC(TILEPRO_DEST_IMM8_X1), | |
9510 | 8, 1, 0, 0, 0, 0, | |
9511 | create_Dest_Imm8_X1, get_Dest_Imm8_X1 | |
9512 | }, | |
9513 | { | |
9514 | TILEPRO_OP_TYPE_ADDRESS, BFD_RELOC(NONE), | |
9515 | 10, 1, 0, 0, 1, TILEPRO_LOG2_SN_INSTRUCTION_SIZE_IN_BYTES, | |
9516 | create_BrOff_SN, get_BrOff_SN | |
9517 | }, | |
9518 | { | |
9519 | TILEPRO_OP_TYPE_IMMEDIATE, BFD_RELOC(NONE), | |
9520 | 8, 0, 0, 0, 0, 0, | |
9521 | create_Imm8_SN, get_Imm8_SN | |
9522 | }, | |
9523 | { | |
9524 | TILEPRO_OP_TYPE_IMMEDIATE, BFD_RELOC(NONE), | |
9525 | 8, 1, 0, 0, 0, 0, | |
9526 | create_Imm8_SN, get_Imm8_SN | |
9527 | }, | |
9528 | { | |
9529 | TILEPRO_OP_TYPE_REGISTER, BFD_RELOC(NONE), | |
9530 | 2, 0, 0, 1, 0, 0, | |
9531 | create_Dest_SN, get_Dest_SN | |
9532 | }, | |
9533 | { | |
9534 | TILEPRO_OP_TYPE_REGISTER, BFD_RELOC(NONE), | |
9535 | 2, 0, 1, 0, 0, 0, | |
9536 | create_Src_SN, get_Src_SN | |
9537 | } | |
9538 | }; | |
9539 | ||
9540 | #ifndef DISASM_ONLY | |
9541 | const struct tilepro_spr tilepro_sprs[] = | |
9542 | { | |
9543 | { 0, "MPL_ITLB_MISS_SET_0" }, | |
9544 | { 1, "MPL_ITLB_MISS_SET_1" }, | |
9545 | { 2, "MPL_ITLB_MISS_SET_2" }, | |
9546 | { 3, "MPL_ITLB_MISS_SET_3" }, | |
9547 | { 4, "MPL_ITLB_MISS" }, | |
9548 | { 256, "ITLB_CURRENT_0" }, | |
9549 | { 257, "ITLB_CURRENT_1" }, | |
9550 | { 258, "ITLB_CURRENT_2" }, | |
9551 | { 259, "ITLB_CURRENT_3" }, | |
9552 | { 260, "ITLB_INDEX" }, | |
9553 | { 261, "ITLB_MATCH_0" }, | |
9554 | { 262, "ITLB_PR" }, | |
9555 | { 263, "NUMBER_ITLB" }, | |
9556 | { 264, "REPLACEMENT_ITLB" }, | |
9557 | { 265, "WIRED_ITLB" }, | |
9558 | { 266, "ITLB_PERF" }, | |
9559 | { 512, "MPL_MEM_ERROR_SET_0" }, | |
9560 | { 513, "MPL_MEM_ERROR_SET_1" }, | |
9561 | { 514, "MPL_MEM_ERROR_SET_2" }, | |
9562 | { 515, "MPL_MEM_ERROR_SET_3" }, | |
9563 | { 516, "MPL_MEM_ERROR" }, | |
9564 | { 517, "L1_I_ERROR" }, | |
9565 | { 518, "MEM_ERROR_CBOX_ADDR" }, | |
9566 | { 519, "MEM_ERROR_CBOX_STATUS" }, | |
9567 | { 520, "MEM_ERROR_ENABLE" }, | |
9568 | { 521, "MEM_ERROR_MBOX_ADDR" }, | |
9569 | { 522, "MEM_ERROR_MBOX_STATUS" }, | |
9570 | { 523, "SNIC_ERROR_LOG_STATUS" }, | |
9571 | { 524, "SNIC_ERROR_LOG_VA" }, | |
9572 | { 525, "XDN_DEMUX_ERROR" }, | |
9573 | { 1024, "MPL_ILL_SET_0" }, | |
9574 | { 1025, "MPL_ILL_SET_1" }, | |
9575 | { 1026, "MPL_ILL_SET_2" }, | |
9576 | { 1027, "MPL_ILL_SET_3" }, | |
9577 | { 1028, "MPL_ILL" }, | |
9578 | { 1536, "MPL_GPV_SET_0" }, | |
9579 | { 1537, "MPL_GPV_SET_1" }, | |
9580 | { 1538, "MPL_GPV_SET_2" }, | |
9581 | { 1539, "MPL_GPV_SET_3" }, | |
9582 | { 1540, "MPL_GPV" }, | |
9583 | { 1541, "GPV_REASON" }, | |
9584 | { 2048, "MPL_SN_ACCESS_SET_0" }, | |
9585 | { 2049, "MPL_SN_ACCESS_SET_1" }, | |
9586 | { 2050, "MPL_SN_ACCESS_SET_2" }, | |
9587 | { 2051, "MPL_SN_ACCESS_SET_3" }, | |
9588 | { 2052, "MPL_SN_ACCESS" }, | |
9589 | { 2053, "SNCTL" }, | |
9590 | { 2054, "SNFIFO_DATA" }, | |
9591 | { 2055, "SNFIFO_SEL" }, | |
9592 | { 2056, "SNIC_INVADDR" }, | |
9593 | { 2057, "SNISTATE" }, | |
9594 | { 2058, "SNOSTATE" }, | |
9595 | { 2059, "SNPC" }, | |
9596 | { 2060, "SNSTATIC" }, | |
9597 | { 2304, "SN_DATA_AVAIL" }, | |
9598 | { 2560, "MPL_IDN_ACCESS_SET_0" }, | |
9599 | { 2561, "MPL_IDN_ACCESS_SET_1" }, | |
9600 | { 2562, "MPL_IDN_ACCESS_SET_2" }, | |
9601 | { 2563, "MPL_IDN_ACCESS_SET_3" }, | |
9602 | { 2564, "MPL_IDN_ACCESS" }, | |
9603 | { 2565, "IDN_DEMUX_CA_COUNT" }, | |
9604 | { 2566, "IDN_DEMUX_COUNT_0" }, | |
9605 | { 2567, "IDN_DEMUX_COUNT_1" }, | |
9606 | { 2568, "IDN_DEMUX_CTL" }, | |
9607 | { 2569, "IDN_DEMUX_CURR_TAG" }, | |
9608 | { 2570, "IDN_DEMUX_QUEUE_SEL" }, | |
9609 | { 2571, "IDN_DEMUX_STATUS" }, | |
9610 | { 2572, "IDN_DEMUX_WRITE_FIFO" }, | |
9611 | { 2573, "IDN_DEMUX_WRITE_QUEUE" }, | |
9612 | { 2574, "IDN_PENDING" }, | |
9613 | { 2575, "IDN_SP_FIFO_DATA" }, | |
9614 | { 2576, "IDN_SP_FIFO_SEL" }, | |
9615 | { 2577, "IDN_SP_FREEZE" }, | |
9616 | { 2578, "IDN_SP_STATE" }, | |
9617 | { 2579, "IDN_TAG_0" }, | |
9618 | { 2580, "IDN_TAG_1" }, | |
9619 | { 2581, "IDN_TAG_VALID" }, | |
9620 | { 2582, "IDN_TILE_COORD" }, | |
9621 | { 2816, "IDN_CA_DATA" }, | |
9622 | { 2817, "IDN_CA_REM" }, | |
9623 | { 2818, "IDN_CA_TAG" }, | |
9624 | { 2819, "IDN_DATA_AVAIL" }, | |
9625 | { 3072, "MPL_UDN_ACCESS_SET_0" }, | |
9626 | { 3073, "MPL_UDN_ACCESS_SET_1" }, | |
9627 | { 3074, "MPL_UDN_ACCESS_SET_2" }, | |
9628 | { 3075, "MPL_UDN_ACCESS_SET_3" }, | |
9629 | { 3076, "MPL_UDN_ACCESS" }, | |
9630 | { 3077, "UDN_DEMUX_CA_COUNT" }, | |
9631 | { 3078, "UDN_DEMUX_COUNT_0" }, | |
9632 | { 3079, "UDN_DEMUX_COUNT_1" }, | |
9633 | { 3080, "UDN_DEMUX_COUNT_2" }, | |
9634 | { 3081, "UDN_DEMUX_COUNT_3" }, | |
9635 | { 3082, "UDN_DEMUX_CTL" }, | |
9636 | { 3083, "UDN_DEMUX_CURR_TAG" }, | |
9637 | { 3084, "UDN_DEMUX_QUEUE_SEL" }, | |
9638 | { 3085, "UDN_DEMUX_STATUS" }, | |
9639 | { 3086, "UDN_DEMUX_WRITE_FIFO" }, | |
9640 | { 3087, "UDN_DEMUX_WRITE_QUEUE" }, | |
9641 | { 3088, "UDN_PENDING" }, | |
9642 | { 3089, "UDN_SP_FIFO_DATA" }, | |
9643 | { 3090, "UDN_SP_FIFO_SEL" }, | |
9644 | { 3091, "UDN_SP_FREEZE" }, | |
9645 | { 3092, "UDN_SP_STATE" }, | |
9646 | { 3093, "UDN_TAG_0" }, | |
9647 | { 3094, "UDN_TAG_1" }, | |
9648 | { 3095, "UDN_TAG_2" }, | |
9649 | { 3096, "UDN_TAG_3" }, | |
9650 | { 3097, "UDN_TAG_VALID" }, | |
9651 | { 3098, "UDN_TILE_COORD" }, | |
9652 | { 3328, "UDN_CA_DATA" }, | |
9653 | { 3329, "UDN_CA_REM" }, | |
9654 | { 3330, "UDN_CA_TAG" }, | |
9655 | { 3331, "UDN_DATA_AVAIL" }, | |
9656 | { 3584, "MPL_IDN_REFILL_SET_0" }, | |
9657 | { 3585, "MPL_IDN_REFILL_SET_1" }, | |
9658 | { 3586, "MPL_IDN_REFILL_SET_2" }, | |
9659 | { 3587, "MPL_IDN_REFILL_SET_3" }, | |
9660 | { 3588, "MPL_IDN_REFILL" }, | |
9661 | { 3589, "IDN_REFILL_EN" }, | |
9662 | { 4096, "MPL_UDN_REFILL_SET_0" }, | |
9663 | { 4097, "MPL_UDN_REFILL_SET_1" }, | |
9664 | { 4098, "MPL_UDN_REFILL_SET_2" }, | |
9665 | { 4099, "MPL_UDN_REFILL_SET_3" }, | |
9666 | { 4100, "MPL_UDN_REFILL" }, | |
9667 | { 4101, "UDN_REFILL_EN" }, | |
9668 | { 4608, "MPL_IDN_COMPLETE_SET_0" }, | |
9669 | { 4609, "MPL_IDN_COMPLETE_SET_1" }, | |
9670 | { 4610, "MPL_IDN_COMPLETE_SET_2" }, | |
9671 | { 4611, "MPL_IDN_COMPLETE_SET_3" }, | |
9672 | { 4612, "MPL_IDN_COMPLETE" }, | |
9673 | { 4613, "IDN_REMAINING" }, | |
9674 | { 5120, "MPL_UDN_COMPLETE_SET_0" }, | |
9675 | { 5121, "MPL_UDN_COMPLETE_SET_1" }, | |
9676 | { 5122, "MPL_UDN_COMPLETE_SET_2" }, | |
9677 | { 5123, "MPL_UDN_COMPLETE_SET_3" }, | |
9678 | { 5124, "MPL_UDN_COMPLETE" }, | |
9679 | { 5125, "UDN_REMAINING" }, | |
9680 | { 5632, "MPL_SWINT_3_SET_0" }, | |
9681 | { 5633, "MPL_SWINT_3_SET_1" }, | |
9682 | { 5634, "MPL_SWINT_3_SET_2" }, | |
9683 | { 5635, "MPL_SWINT_3_SET_3" }, | |
9684 | { 5636, "MPL_SWINT_3" }, | |
9685 | { 6144, "MPL_SWINT_2_SET_0" }, | |
9686 | { 6145, "MPL_SWINT_2_SET_1" }, | |
9687 | { 6146, "MPL_SWINT_2_SET_2" }, | |
9688 | { 6147, "MPL_SWINT_2_SET_3" }, | |
9689 | { 6148, "MPL_SWINT_2" }, | |
9690 | { 6656, "MPL_SWINT_1_SET_0" }, | |
9691 | { 6657, "MPL_SWINT_1_SET_1" }, | |
9692 | { 6658, "MPL_SWINT_1_SET_2" }, | |
9693 | { 6659, "MPL_SWINT_1_SET_3" }, | |
9694 | { 6660, "MPL_SWINT_1" }, | |
9695 | { 7168, "MPL_SWINT_0_SET_0" }, | |
9696 | { 7169, "MPL_SWINT_0_SET_1" }, | |
9697 | { 7170, "MPL_SWINT_0_SET_2" }, | |
9698 | { 7171, "MPL_SWINT_0_SET_3" }, | |
9699 | { 7172, "MPL_SWINT_0" }, | |
9700 | { 7680, "MPL_UNALIGN_DATA_SET_0" }, | |
9701 | { 7681, "MPL_UNALIGN_DATA_SET_1" }, | |
9702 | { 7682, "MPL_UNALIGN_DATA_SET_2" }, | |
9703 | { 7683, "MPL_UNALIGN_DATA_SET_3" }, | |
9704 | { 7684, "MPL_UNALIGN_DATA" }, | |
9705 | { 8192, "MPL_DTLB_MISS_SET_0" }, | |
9706 | { 8193, "MPL_DTLB_MISS_SET_1" }, | |
9707 | { 8194, "MPL_DTLB_MISS_SET_2" }, | |
9708 | { 8195, "MPL_DTLB_MISS_SET_3" }, | |
9709 | { 8196, "MPL_DTLB_MISS" }, | |
9710 | { 8448, "AER_0" }, | |
9711 | { 8449, "AER_1" }, | |
9712 | { 8450, "DTLB_BAD_ADDR" }, | |
9713 | { 8451, "DTLB_BAD_ADDR_REASON" }, | |
9714 | { 8452, "DTLB_CURRENT_0" }, | |
9715 | { 8453, "DTLB_CURRENT_1" }, | |
9716 | { 8454, "DTLB_CURRENT_2" }, | |
9717 | { 8455, "DTLB_CURRENT_3" }, | |
9718 | { 8456, "DTLB_INDEX" }, | |
9719 | { 8457, "DTLB_MATCH_0" }, | |
9720 | { 8458, "NUMBER_DTLB" }, | |
9721 | { 8459, "PHYSICAL_MEMORY_MODE" }, | |
9722 | { 8460, "REPLACEMENT_DTLB" }, | |
9723 | { 8461, "WIRED_DTLB" }, | |
9724 | { 8462, "CACHE_RED_WAY_OVERRIDDEN" }, | |
9725 | { 8463, "DTLB_PERF" }, | |
9726 | { 8704, "MPL_DTLB_ACCESS_SET_0" }, | |
9727 | { 8705, "MPL_DTLB_ACCESS_SET_1" }, | |
9728 | { 8706, "MPL_DTLB_ACCESS_SET_2" }, | |
9729 | { 8707, "MPL_DTLB_ACCESS_SET_3" }, | |
9730 | { 8708, "MPL_DTLB_ACCESS" }, | |
9731 | { 9216, "MPL_DMATLB_MISS_SET_0" }, | |
9732 | { 9217, "MPL_DMATLB_MISS_SET_1" }, | |
9733 | { 9218, "MPL_DMATLB_MISS_SET_2" }, | |
9734 | { 9219, "MPL_DMATLB_MISS_SET_3" }, | |
9735 | { 9220, "MPL_DMATLB_MISS" }, | |
9736 | { 9472, "DMA_BAD_ADDR" }, | |
9737 | { 9473, "DMA_STATUS" }, | |
9738 | { 9728, "MPL_DMATLB_ACCESS_SET_0" }, | |
9739 | { 9729, "MPL_DMATLB_ACCESS_SET_1" }, | |
9740 | { 9730, "MPL_DMATLB_ACCESS_SET_2" }, | |
9741 | { 9731, "MPL_DMATLB_ACCESS_SET_3" }, | |
9742 | { 9732, "MPL_DMATLB_ACCESS" }, | |
9743 | { 10240, "MPL_SNITLB_MISS_SET_0" }, | |
9744 | { 10241, "MPL_SNITLB_MISS_SET_1" }, | |
9745 | { 10242, "MPL_SNITLB_MISS_SET_2" }, | |
9746 | { 10243, "MPL_SNITLB_MISS_SET_3" }, | |
9747 | { 10244, "MPL_SNITLB_MISS" }, | |
9748 | { 10245, "NUMBER_SNITLB" }, | |
9749 | { 10246, "REPLACEMENT_SNITLB" }, | |
9750 | { 10247, "SNITLB_CURRENT_0" }, | |
9751 | { 10248, "SNITLB_CURRENT_1" }, | |
9752 | { 10249, "SNITLB_CURRENT_2" }, | |
9753 | { 10250, "SNITLB_CURRENT_3" }, | |
9754 | { 10251, "SNITLB_INDEX" }, | |
9755 | { 10252, "SNITLB_MATCH_0" }, | |
9756 | { 10253, "SNITLB_PR" }, | |
9757 | { 10254, "WIRED_SNITLB" }, | |
9758 | { 10255, "SNITLB_STATUS" }, | |
9759 | { 10752, "MPL_SN_NOTIFY_SET_0" }, | |
9760 | { 10753, "MPL_SN_NOTIFY_SET_1" }, | |
9761 | { 10754, "MPL_SN_NOTIFY_SET_2" }, | |
9762 | { 10755, "MPL_SN_NOTIFY_SET_3" }, | |
9763 | { 10756, "MPL_SN_NOTIFY" }, | |
9764 | { 10757, "SN_NOTIFY_STATUS" }, | |
9765 | { 11264, "MPL_SN_FIREWALL_SET_0" }, | |
9766 | { 11265, "MPL_SN_FIREWALL_SET_1" }, | |
9767 | { 11266, "MPL_SN_FIREWALL_SET_2" }, | |
9768 | { 11267, "MPL_SN_FIREWALL_SET_3" }, | |
9769 | { 11268, "MPL_SN_FIREWALL" }, | |
9770 | { 11269, "SN_DIRECTION_PROTECT" }, | |
9771 | { 11776, "MPL_IDN_FIREWALL_SET_0" }, | |
9772 | { 11777, "MPL_IDN_FIREWALL_SET_1" }, | |
9773 | { 11778, "MPL_IDN_FIREWALL_SET_2" }, | |
9774 | { 11779, "MPL_IDN_FIREWALL_SET_3" }, | |
9775 | { 11780, "MPL_IDN_FIREWALL" }, | |
9776 | { 11781, "IDN_DIRECTION_PROTECT" }, | |
9777 | { 12288, "MPL_UDN_FIREWALL_SET_0" }, | |
9778 | { 12289, "MPL_UDN_FIREWALL_SET_1" }, | |
9779 | { 12290, "MPL_UDN_FIREWALL_SET_2" }, | |
9780 | { 12291, "MPL_UDN_FIREWALL_SET_3" }, | |
9781 | { 12292, "MPL_UDN_FIREWALL" }, | |
9782 | { 12293, "UDN_DIRECTION_PROTECT" }, | |
9783 | { 12800, "MPL_TILE_TIMER_SET_0" }, | |
9784 | { 12801, "MPL_TILE_TIMER_SET_1" }, | |
9785 | { 12802, "MPL_TILE_TIMER_SET_2" }, | |
9786 | { 12803, "MPL_TILE_TIMER_SET_3" }, | |
9787 | { 12804, "MPL_TILE_TIMER" }, | |
9788 | { 12805, "TILE_TIMER_CONTROL" }, | |
9789 | { 13312, "MPL_IDN_TIMER_SET_0" }, | |
9790 | { 13313, "MPL_IDN_TIMER_SET_1" }, | |
9791 | { 13314, "MPL_IDN_TIMER_SET_2" }, | |
9792 | { 13315, "MPL_IDN_TIMER_SET_3" }, | |
9793 | { 13316, "MPL_IDN_TIMER" }, | |
9794 | { 13317, "IDN_DEADLOCK_COUNT" }, | |
9795 | { 13318, "IDN_DEADLOCK_TIMEOUT" }, | |
9796 | { 13824, "MPL_UDN_TIMER_SET_0" }, | |
9797 | { 13825, "MPL_UDN_TIMER_SET_1" }, | |
9798 | { 13826, "MPL_UDN_TIMER_SET_2" }, | |
9799 | { 13827, "MPL_UDN_TIMER_SET_3" }, | |
9800 | { 13828, "MPL_UDN_TIMER" }, | |
9801 | { 13829, "UDN_DEADLOCK_COUNT" }, | |
9802 | { 13830, "UDN_DEADLOCK_TIMEOUT" }, | |
9803 | { 14336, "MPL_DMA_NOTIFY_SET_0" }, | |
9804 | { 14337, "MPL_DMA_NOTIFY_SET_1" }, | |
9805 | { 14338, "MPL_DMA_NOTIFY_SET_2" }, | |
9806 | { 14339, "MPL_DMA_NOTIFY_SET_3" }, | |
9807 | { 14340, "MPL_DMA_NOTIFY" }, | |
9808 | { 14592, "DMA_BYTE" }, | |
9809 | { 14593, "DMA_CHUNK_SIZE" }, | |
9810 | { 14594, "DMA_CTR" }, | |
9811 | { 14595, "DMA_DST_ADDR" }, | |
9812 | { 14596, "DMA_DST_CHUNK_ADDR" }, | |
9813 | { 14597, "DMA_SRC_ADDR" }, | |
9814 | { 14598, "DMA_SRC_CHUNK_ADDR" }, | |
9815 | { 14599, "DMA_STRIDE" }, | |
9816 | { 14600, "DMA_USER_STATUS" }, | |
9817 | { 14848, "MPL_IDN_CA_SET_0" }, | |
9818 | { 14849, "MPL_IDN_CA_SET_1" }, | |
9819 | { 14850, "MPL_IDN_CA_SET_2" }, | |
9820 | { 14851, "MPL_IDN_CA_SET_3" }, | |
9821 | { 14852, "MPL_IDN_CA" }, | |
9822 | { 15360, "MPL_UDN_CA_SET_0" }, | |
9823 | { 15361, "MPL_UDN_CA_SET_1" }, | |
9824 | { 15362, "MPL_UDN_CA_SET_2" }, | |
9825 | { 15363, "MPL_UDN_CA_SET_3" }, | |
9826 | { 15364, "MPL_UDN_CA" }, | |
9827 | { 15872, "MPL_IDN_AVAIL_SET_0" }, | |
9828 | { 15873, "MPL_IDN_AVAIL_SET_1" }, | |
9829 | { 15874, "MPL_IDN_AVAIL_SET_2" }, | |
9830 | { 15875, "MPL_IDN_AVAIL_SET_3" }, | |
9831 | { 15876, "MPL_IDN_AVAIL" }, | |
9832 | { 15877, "IDN_AVAIL_EN" }, | |
9833 | { 16384, "MPL_UDN_AVAIL_SET_0" }, | |
9834 | { 16385, "MPL_UDN_AVAIL_SET_1" }, | |
9835 | { 16386, "MPL_UDN_AVAIL_SET_2" }, | |
9836 | { 16387, "MPL_UDN_AVAIL_SET_3" }, | |
9837 | { 16388, "MPL_UDN_AVAIL" }, | |
9838 | { 16389, "UDN_AVAIL_EN" }, | |
9839 | { 16896, "MPL_PERF_COUNT_SET_0" }, | |
9840 | { 16897, "MPL_PERF_COUNT_SET_1" }, | |
9841 | { 16898, "MPL_PERF_COUNT_SET_2" }, | |
9842 | { 16899, "MPL_PERF_COUNT_SET_3" }, | |
9843 | { 16900, "MPL_PERF_COUNT" }, | |
9844 | { 16901, "PERF_COUNT_0" }, | |
9845 | { 16902, "PERF_COUNT_1" }, | |
9846 | { 16903, "PERF_COUNT_CTL" }, | |
9847 | { 16904, "PERF_COUNT_STS" }, | |
9848 | { 16905, "WATCH_CTL" }, | |
9849 | { 16906, "WATCH_MASK" }, | |
9850 | { 16907, "WATCH_VAL" }, | |
9851 | { 16912, "PERF_COUNT_DN_CTL" }, | |
9852 | { 17408, "MPL_INTCTRL_3_SET_0" }, | |
9853 | { 17409, "MPL_INTCTRL_3_SET_1" }, | |
9854 | { 17410, "MPL_INTCTRL_3_SET_2" }, | |
9855 | { 17411, "MPL_INTCTRL_3_SET_3" }, | |
9856 | { 17412, "MPL_INTCTRL_3" }, | |
9857 | { 17413, "EX_CONTEXT_3_0" }, | |
9858 | { 17414, "EX_CONTEXT_3_1" }, | |
9859 | { 17415, "INTERRUPT_MASK_3_0" }, | |
9860 | { 17416, "INTERRUPT_MASK_3_1" }, | |
9861 | { 17417, "INTERRUPT_MASK_RESET_3_0" }, | |
9862 | { 17418, "INTERRUPT_MASK_RESET_3_1" }, | |
9863 | { 17419, "INTERRUPT_MASK_SET_3_0" }, | |
9864 | { 17420, "INTERRUPT_MASK_SET_3_1" }, | |
9865 | { 17432, "INTCTRL_3_STATUS" }, | |
9866 | { 17664, "SYSTEM_SAVE_3_0" }, | |
9867 | { 17665, "SYSTEM_SAVE_3_1" }, | |
9868 | { 17666, "SYSTEM_SAVE_3_2" }, | |
9869 | { 17667, "SYSTEM_SAVE_3_3" }, | |
9870 | { 17920, "MPL_INTCTRL_2_SET_0" }, | |
9871 | { 17921, "MPL_INTCTRL_2_SET_1" }, | |
9872 | { 17922, "MPL_INTCTRL_2_SET_2" }, | |
9873 | { 17923, "MPL_INTCTRL_2_SET_3" }, | |
9874 | { 17924, "MPL_INTCTRL_2" }, | |
9875 | { 17925, "EX_CONTEXT_2_0" }, | |
9876 | { 17926, "EX_CONTEXT_2_1" }, | |
9877 | { 17927, "INTCTRL_2_STATUS" }, | |
9878 | { 17928, "INTERRUPT_MASK_2_0" }, | |
9879 | { 17929, "INTERRUPT_MASK_2_1" }, | |
9880 | { 17930, "INTERRUPT_MASK_RESET_2_0" }, | |
9881 | { 17931, "INTERRUPT_MASK_RESET_2_1" }, | |
9882 | { 17932, "INTERRUPT_MASK_SET_2_0" }, | |
9883 | { 17933, "INTERRUPT_MASK_SET_2_1" }, | |
9884 | { 18176, "SYSTEM_SAVE_2_0" }, | |
9885 | { 18177, "SYSTEM_SAVE_2_1" }, | |
9886 | { 18178, "SYSTEM_SAVE_2_2" }, | |
9887 | { 18179, "SYSTEM_SAVE_2_3" }, | |
9888 | { 18432, "MPL_INTCTRL_1_SET_0" }, | |
9889 | { 18433, "MPL_INTCTRL_1_SET_1" }, | |
9890 | { 18434, "MPL_INTCTRL_1_SET_2" }, | |
9891 | { 18435, "MPL_INTCTRL_1_SET_3" }, | |
9892 | { 18436, "MPL_INTCTRL_1" }, | |
9893 | { 18437, "EX_CONTEXT_1_0" }, | |
9894 | { 18438, "EX_CONTEXT_1_1" }, | |
9895 | { 18439, "INTCTRL_1_STATUS" }, | |
9896 | { 18440, "INTCTRL_3_STATUS_REV0" }, | |
9897 | { 18441, "INTERRUPT_MASK_1_0" }, | |
9898 | { 18442, "INTERRUPT_MASK_1_1" }, | |
9899 | { 18443, "INTERRUPT_MASK_RESET_1_0" }, | |
9900 | { 18444, "INTERRUPT_MASK_RESET_1_1" }, | |
9901 | { 18445, "INTERRUPT_MASK_SET_1_0" }, | |
9902 | { 18446, "INTERRUPT_MASK_SET_1_1" }, | |
9903 | { 18688, "SYSTEM_SAVE_1_0" }, | |
9904 | { 18689, "SYSTEM_SAVE_1_1" }, | |
9905 | { 18690, "SYSTEM_SAVE_1_2" }, | |
9906 | { 18691, "SYSTEM_SAVE_1_3" }, | |
9907 | { 18944, "MPL_INTCTRL_0_SET_0" }, | |
9908 | { 18945, "MPL_INTCTRL_0_SET_1" }, | |
9909 | { 18946, "MPL_INTCTRL_0_SET_2" }, | |
9910 | { 18947, "MPL_INTCTRL_0_SET_3" }, | |
9911 | { 18948, "MPL_INTCTRL_0" }, | |
9912 | { 18949, "EX_CONTEXT_0_0" }, | |
9913 | { 18950, "EX_CONTEXT_0_1" }, | |
9914 | { 18951, "INTCTRL_0_STATUS" }, | |
9915 | { 18952, "INTERRUPT_MASK_0_0" }, | |
9916 | { 18953, "INTERRUPT_MASK_0_1" }, | |
9917 | { 18954, "INTERRUPT_MASK_RESET_0_0" }, | |
9918 | { 18955, "INTERRUPT_MASK_RESET_0_1" }, | |
9919 | { 18956, "INTERRUPT_MASK_SET_0_0" }, | |
9920 | { 18957, "INTERRUPT_MASK_SET_0_1" }, | |
9921 | { 19200, "SYSTEM_SAVE_0_0" }, | |
9922 | { 19201, "SYSTEM_SAVE_0_1" }, | |
9923 | { 19202, "SYSTEM_SAVE_0_2" }, | |
9924 | { 19203, "SYSTEM_SAVE_0_3" }, | |
9925 | { 19456, "MPL_BOOT_ACCESS_SET_0" }, | |
9926 | { 19457, "MPL_BOOT_ACCESS_SET_1" }, | |
9927 | { 19458, "MPL_BOOT_ACCESS_SET_2" }, | |
9928 | { 19459, "MPL_BOOT_ACCESS_SET_3" }, | |
9929 | { 19460, "MPL_BOOT_ACCESS" }, | |
9930 | { 19461, "CBOX_CACHEASRAM_CONFIG" }, | |
9931 | { 19462, "CBOX_CACHE_CONFIG" }, | |
9932 | { 19463, "CBOX_MMAP_0" }, | |
9933 | { 19464, "CBOX_MMAP_1" }, | |
9934 | { 19465, "CBOX_MMAP_2" }, | |
9935 | { 19466, "CBOX_MMAP_3" }, | |
9936 | { 19467, "CBOX_MSR" }, | |
9937 | { 19468, "CBOX_SRC_ID" }, | |
9938 | { 19469, "CYCLE_HIGH_MODIFY" }, | |
9939 | { 19470, "CYCLE_LOW_MODIFY" }, | |
9940 | { 19471, "DIAG_BCST_CTL" }, | |
9941 | { 19472, "DIAG_BCST_MASK" }, | |
9942 | { 19473, "DIAG_BCST_TRIGGER" }, | |
9943 | { 19474, "DIAG_MUX_CTL" }, | |
9944 | { 19475, "DIAG_TRACE_CTL" }, | |
9945 | { 19476, "DIAG_TRACE_STS" }, | |
9946 | { 19477, "IDN_DEMUX_BUF_THRESH" }, | |
9947 | { 19478, "SBOX_CONFIG" }, | |
9948 | { 19479, "TILE_COORD" }, | |
9949 | { 19480, "UDN_DEMUX_BUF_THRESH" }, | |
9950 | { 19481, "CBOX_HOME_MAP_ADDR" }, | |
9951 | { 19482, "CBOX_HOME_MAP_DATA" }, | |
9952 | { 19483, "CBOX_MSR1" }, | |
9953 | { 19484, "BIG_ENDIAN_CONFIG" }, | |
9954 | { 19485, "MEM_STRIPE_CONFIG" }, | |
9955 | { 19486, "DIAG_TRACE_WAY" }, | |
9956 | { 19487, "VDN_SNOOP_SHIM_CTL" }, | |
9957 | { 19488, "PERF_COUNT_PLS" }, | |
9958 | { 19489, "DIAG_TRACE_DATA" }, | |
9959 | { 19712, "I_AER_0" }, | |
9960 | { 19713, "I_AER_1" }, | |
9961 | { 19714, "I_PHYSICAL_MEMORY_MODE" }, | |
9962 | { 19968, "MPL_WORLD_ACCESS_SET_0" }, | |
9963 | { 19969, "MPL_WORLD_ACCESS_SET_1" }, | |
9964 | { 19970, "MPL_WORLD_ACCESS_SET_2" }, | |
9965 | { 19971, "MPL_WORLD_ACCESS_SET_3" }, | |
9966 | { 19972, "MPL_WORLD_ACCESS" }, | |
9967 | { 19973, "SIM_SOCKET" }, | |
9968 | { 19974, "CYCLE_HIGH" }, | |
9969 | { 19975, "CYCLE_LOW" }, | |
9970 | { 19976, "DONE" }, | |
9971 | { 19977, "FAIL" }, | |
9972 | { 19978, "INTERRUPT_CRITICAL_SECTION" }, | |
9973 | { 19979, "PASS" }, | |
9974 | { 19980, "SIM_CONTROL" }, | |
9975 | { 19981, "EVENT_BEGIN" }, | |
9976 | { 19982, "EVENT_END" }, | |
9977 | { 19983, "TILE_WRITE_PENDING" }, | |
9978 | { 19984, "TILE_RTF_HWM" }, | |
9979 | { 20224, "PROC_STATUS" }, | |
9980 | { 20225, "STATUS_SATURATE" }, | |
9981 | { 20480, "MPL_I_ASID_SET_0" }, | |
9982 | { 20481, "MPL_I_ASID_SET_1" }, | |
9983 | { 20482, "MPL_I_ASID_SET_2" }, | |
9984 | { 20483, "MPL_I_ASID_SET_3" }, | |
9985 | { 20484, "MPL_I_ASID" }, | |
9986 | { 20485, "I_ASID" }, | |
9987 | { 20992, "MPL_D_ASID_SET_0" }, | |
9988 | { 20993, "MPL_D_ASID_SET_1" }, | |
9989 | { 20994, "MPL_D_ASID_SET_2" }, | |
9990 | { 20995, "MPL_D_ASID_SET_3" }, | |
9991 | { 20996, "MPL_D_ASID" }, | |
9992 | { 20997, "D_ASID" }, | |
9993 | { 21504, "MPL_DMA_ASID_SET_0" }, | |
9994 | { 21505, "MPL_DMA_ASID_SET_1" }, | |
9995 | { 21506, "MPL_DMA_ASID_SET_2" }, | |
9996 | { 21507, "MPL_DMA_ASID_SET_3" }, | |
9997 | { 21508, "MPL_DMA_ASID" }, | |
9998 | { 21509, "DMA_ASID" }, | |
9999 | { 22016, "MPL_SNI_ASID_SET_0" }, | |
10000 | { 22017, "MPL_SNI_ASID_SET_1" }, | |
10001 | { 22018, "MPL_SNI_ASID_SET_2" }, | |
10002 | { 22019, "MPL_SNI_ASID_SET_3" }, | |
10003 | { 22020, "MPL_SNI_ASID" }, | |
10004 | { 22021, "SNI_ASID" }, | |
10005 | { 22528, "MPL_DMA_CPL_SET_0" }, | |
10006 | { 22529, "MPL_DMA_CPL_SET_1" }, | |
10007 | { 22530, "MPL_DMA_CPL_SET_2" }, | |
10008 | { 22531, "MPL_DMA_CPL_SET_3" }, | |
10009 | { 22532, "MPL_DMA_CPL" }, | |
10010 | { 23040, "MPL_SN_CPL_SET_0" }, | |
10011 | { 23041, "MPL_SN_CPL_SET_1" }, | |
10012 | { 23042, "MPL_SN_CPL_SET_2" }, | |
10013 | { 23043, "MPL_SN_CPL_SET_3" }, | |
10014 | { 23044, "MPL_SN_CPL" }, | |
10015 | { 23552, "MPL_DOUBLE_FAULT_SET_0" }, | |
10016 | { 23553, "MPL_DOUBLE_FAULT_SET_1" }, | |
10017 | { 23554, "MPL_DOUBLE_FAULT_SET_2" }, | |
10018 | { 23555, "MPL_DOUBLE_FAULT_SET_3" }, | |
10019 | { 23556, "MPL_DOUBLE_FAULT" }, | |
10020 | { 23557, "LAST_INTERRUPT_REASON" }, | |
10021 | { 24064, "MPL_SN_STATIC_ACCESS_SET_0" }, | |
10022 | { 24065, "MPL_SN_STATIC_ACCESS_SET_1" }, | |
10023 | { 24066, "MPL_SN_STATIC_ACCESS_SET_2" }, | |
10024 | { 24067, "MPL_SN_STATIC_ACCESS_SET_3" }, | |
10025 | { 24068, "MPL_SN_STATIC_ACCESS" }, | |
10026 | { 24069, "SN_STATIC_CTL" }, | |
10027 | { 24070, "SN_STATIC_FIFO_DATA" }, | |
10028 | { 24071, "SN_STATIC_FIFO_SEL" }, | |
10029 | { 24073, "SN_STATIC_ISTATE" }, | |
10030 | { 24074, "SN_STATIC_OSTATE" }, | |
10031 | { 24076, "SN_STATIC_STATIC" }, | |
10032 | { 24320, "SN_STATIC_DATA_AVAIL" }, | |
10033 | { 24576, "MPL_AUX_PERF_COUNT_SET_0" }, | |
10034 | { 24577, "MPL_AUX_PERF_COUNT_SET_1" }, | |
10035 | { 24578, "MPL_AUX_PERF_COUNT_SET_2" }, | |
10036 | { 24579, "MPL_AUX_PERF_COUNT_SET_3" }, | |
10037 | { 24580, "MPL_AUX_PERF_COUNT" }, | |
10038 | { 24581, "AUX_PERF_COUNT_0" }, | |
10039 | { 24582, "AUX_PERF_COUNT_1" }, | |
10040 | { 24583, "AUX_PERF_COUNT_CTL" }, | |
10041 | { 24584, "AUX_PERF_COUNT_STS" }, | |
10042 | }; | |
10043 | ||
10044 | const int tilepro_num_sprs = 499; | |
10045 | ||
10046 | #endif /* DISASM_ONLY */ | |
10047 | ||
10048 | #ifndef DISASM_ONLY | |
10049 | ||
10050 | #include <stdlib.h> | |
10051 | ||
10052 | static int | |
10053 | tilepro_spr_compare (const void *a_ptr, const void *b_ptr) | |
10054 | { | |
10055 | const struct tilepro_spr *a = (const struct tilepro_spr *) a_ptr; | |
10056 | const struct tilepro_spr *b = (const struct tilepro_spr *) b_ptr; | |
10057 | ||
10058 | return a->number - b->number; | |
10059 | } | |
10060 | ||
10061 | const char * | |
10062 | get_tilepro_spr_name (int num) | |
10063 | { | |
10064 | void *result; | |
10065 | struct tilepro_spr key; | |
10066 | ||
10067 | key.number = num; | |
10068 | result = bsearch ((const void *) &key, (const void *) tilepro_sprs, | |
10069 | tilepro_num_sprs, sizeof (struct tilepro_spr), | |
10070 | tilepro_spr_compare); | |
10071 | ||
10072 | if (result == NULL) | |
10073 | return NULL; | |
10074 | ||
10075 | { | |
10076 | struct tilepro_spr *result_ptr = (struct tilepro_spr *) result; | |
10077 | ||
10078 | return result_ptr->name; | |
10079 | } | |
10080 | } | |
10081 | ||
10082 | ||
10083 | /* Canonical name of each register. */ | |
10084 | const char * const tilepro_register_names[] = | |
10085 | { | |
10086 | "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", | |
10087 | "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", | |
10088 | "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", | |
10089 | "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31", | |
10090 | "r32", "r33", "r34", "r35", "r36", "r37", "r38", "r39", | |
10091 | "r40", "r41", "r42", "r43", "r44", "r45", "r46", "r47", | |
10092 | "r48", "r49", "r50", "r51", "r52", "tp", "sp", "lr", | |
10093 | "sn", "idn0", "idn1", "udn0", "udn1", "udn2", "udn3", "zero" | |
10094 | }; | |
10095 | ||
10096 | #endif /* not DISASM_ONLY */ | |
10097 | ||
10098 | ||
10099 | /* Given a set of bundle bits and a specific pipe, returns which | |
10100 | instruction the bundle contains in that pipe. */ | |
10101 | ||
10102 | const struct tilepro_opcode * | |
10103 | find_opcode (tilepro_bundle_bits bits, tilepro_pipeline pipe) | |
10104 | { | |
10105 | const unsigned short *table = tilepro_bundle_decoder_fsms[pipe]; | |
906efcbc | 10106 | int i = 0; |
aa137e4d NC |
10107 | |
10108 | while (1) | |
10109 | { | |
906efcbc | 10110 | unsigned short bitspec = table[i]; |
aa137e4d NC |
10111 | unsigned int bitfield = |
10112 | ((unsigned int) (bits >> (bitspec & 63))) & (bitspec >> 6); | |
906efcbc | 10113 | unsigned short next = table[i + 1 + bitfield]; |
aa137e4d NC |
10114 | |
10115 | if (next <= TILEPRO_OPC_NONE) | |
10116 | return &tilepro_opcodes[next]; | |
10117 | ||
906efcbc | 10118 | i = next - TILEPRO_OPC_NONE; |
aa137e4d NC |
10119 | } |
10120 | } | |
10121 | ||
10122 | ||
10123 | int | |
10124 | parse_insn_tilepro (tilepro_bundle_bits bits, | |
10125 | unsigned int pc, | |
10126 | struct tilepro_decoded_instruction | |
10127 | decoded[TILEPRO_MAX_INSTRUCTIONS_PER_BUNDLE]) | |
10128 | { | |
10129 | int num_instructions = 0; | |
10130 | int pipe; | |
10131 | int min_pipe, max_pipe; | |
10132 | ||
10133 | if ((bits & TILEPRO_BUNDLE_Y_ENCODING_MASK) == 0) | |
10134 | { | |
10135 | min_pipe = TILEPRO_PIPELINE_X0; | |
10136 | max_pipe = TILEPRO_PIPELINE_X1; | |
10137 | } | |
10138 | else | |
10139 | { | |
10140 | min_pipe = TILEPRO_PIPELINE_Y0; | |
10141 | max_pipe = TILEPRO_PIPELINE_Y2; | |
10142 | } | |
10143 | ||
10144 | /* For each pipe, find an instruction that fits. */ | |
10145 | for (pipe = min_pipe; pipe <= max_pipe; pipe++) | |
10146 | { | |
10147 | const struct tilepro_opcode *opc; | |
10148 | struct tilepro_decoded_instruction *d; | |
10149 | int i; | |
10150 | ||
10151 | d = &decoded[num_instructions++]; | |
10152 | opc = find_opcode (bits, (tilepro_pipeline)pipe); | |
10153 | d->opcode = opc; | |
10154 | ||
10155 | /* Decode each operand, sign extending, etc. as appropriate. */ | |
10156 | for (i = 0; i < opc->num_operands; i++) | |
10157 | { | |
10158 | const struct tilepro_operand *op = | |
10159 | &tilepro_operands[opc->operands[pipe][i]]; | |
10160 | int opval = op->extract (bits); | |
10161 | ||
10162 | if (op->is_signed) | |
10163 | { | |
10164 | /* Sign-extend the operand. */ | |
10165 | int shift = (int)((sizeof(int) * 8) - op->num_bits); | |
10166 | opval = (opval << shift) >> shift; | |
10167 | } | |
10168 | ||
10169 | /* Adjust PC-relative scaled branch offsets. */ | |
10170 | if (op->type == TILEPRO_OP_TYPE_ADDRESS) | |
10171 | { | |
10172 | opval *= TILEPRO_BUNDLE_SIZE_IN_BYTES; | |
10173 | opval += (int)pc; | |
10174 | } | |
10175 | ||
10176 | /* Record the final value. */ | |
10177 | d->operands[i] = op; | |
10178 | d->operand_values[i] = opval; | |
10179 | } | |
10180 | } | |
10181 | ||
10182 | return num_instructions; | |
10183 | } |