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ubsan: m68hc1x: left shift of negative value
[deliverable/binutils-gdb.git] / opcodes / xc16x-ibld.c
CommitLineData
4162bb66 1/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
d70c5fc7
NC		 2/* Instruction building/extraction support for xc16x. -*- C -*-
3
4 THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator.
5 - the resultant file is machine generated, cgen-ibld.in isn't
6
82704155 7 Copyright (C) 1996-2019 Free Software Foundation, Inc.
d70c5fc7 8
9b201bb5 9 This file is part of libopcodes.
d70c5fc7 10
9b201bb5 11 This library is free software; you can redistribute it and/or modify
d70c5fc7 12 it under the terms of the GNU General Public License as published by
9b201bb5 13 the Free Software Foundation; either version 3, or (at your option)
d70c5fc7
NC		 14 any later version.
15
9b201bb5
NC		 16 It is distributed in the hope that it will be useful, but WITHOUT
17 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
18 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
19 License for more details.
d70c5fc7
NC		 20
21 You should have received a copy of the GNU General Public License
22 along with this program; if not, write to the Free Software Foundation, Inc.,
23 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
24
25/* ??? Eventually more and more of this stuff can go to cpu-independent files.
26 Keep that in mind. */
27
28#include "sysdep.h"
29#include <stdio.h>
30#include "ansidecl.h"
31#include "dis-asm.h"
32#include "bfd.h"
33#include "symcat.h"
34#include "xc16x-desc.h"
35#include "xc16x-opc.h"
fe8afbc4 36#include "cgen/basic-modes.h"
d70c5fc7
NC		 37#include "opintl.h"
38#include "safe-ctype.h"
39
40#undef min
41#define min(a,b) ((a) < (b) ? (a) : (b))
42#undef max
43#define max(a,b) ((a) > (b) ? (a) : (b))
44
45/* Used by the ifield rtx function. */
46#define FLD(f) (fields->f)
47
48static const char * insert_normal
49 (CGEN_CPU_DESC, long, unsigned int, unsigned int, unsigned int,
50 unsigned int, unsigned int, unsigned int, CGEN_INSN_BYTES_PTR);
51static const char * insert_insn_normal
52 (CGEN_CPU_DESC, const CGEN_INSN *,
53 CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma);
54static int extract_normal
55 (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, CGEN_INSN_INT,
56 unsigned int, unsigned int, unsigned int, unsigned int,
57 unsigned int, unsigned int, bfd_vma, long *);
58static int extract_insn_normal
59 (CGEN_CPU_DESC, const CGEN_INSN *, CGEN_EXTRACT_INFO *,
60 CGEN_INSN_INT, CGEN_FIELDS *, bfd_vma);
61#if CGEN_INT_INSN_P
62static void put_insn_int_value
63 (CGEN_CPU_DESC, CGEN_INSN_BYTES_PTR, int, int, CGEN_INSN_INT);
64#endif
65#if ! CGEN_INT_INSN_P
66static CGEN_INLINE void insert_1
67 (CGEN_CPU_DESC, unsigned long, int, int, int, unsigned char *);
68static CGEN_INLINE int fill_cache
69 (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, int, int, bfd_vma);
70static CGEN_INLINE long extract_1
71 (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, int, int, int, unsigned char *, bfd_vma);
72#endif
73\f
74/* Operand insertion. */
75
76#if ! CGEN_INT_INSN_P
77
78/* Subroutine of insert_normal. */
79
80static CGEN_INLINE void
81insert_1 (CGEN_CPU_DESC cd,
82 unsigned long value,
83 int start,
84 int length,
85 int word_length,
86 unsigned char *bufp)
87{
88 unsigned long x,mask;
89 int shift;
90
91 x = cgen_get_insn_value (cd, bufp, word_length);
92
93 /* Written this way to avoid undefined behaviour. */
94 mask = (((1L << (length - 1)) - 1) << 1) | 1;
95 if (CGEN_INSN_LSB0_P)
96 shift = (start + 1) - length;
97 else
98 shift = (word_length - (start + length));
99 x = (x & ~(mask << shift)) | ((value & mask) << shift);
100
101 cgen_put_insn_value (cd, bufp, word_length, (bfd_vma) x);
102}
103
104#endif /* ! CGEN_INT_INSN_P */
105
106/* Default insertion routine.
107
108 ATTRS is a mask of the boolean attributes.
109 WORD_OFFSET is the offset in bits from the start of the insn of the value.
110 WORD_LENGTH is the length of the word in bits in which the value resides.
111 START is the starting bit number in the word, architecture origin.
112 LENGTH is the length of VALUE in bits.
113 TOTAL_LENGTH is the total length of the insn in bits.
114
115 The result is an error message or NULL if success. */
116
117/* ??? This duplicates functionality with bfd's howto table and
118 bfd_install_relocation. */
119/* ??? This doesn't handle bfd_vma's. Create another function when
120 necessary. */
121
122static const char *
123insert_normal (CGEN_CPU_DESC cd,
124 long value,
125 unsigned int attrs,
126 unsigned int word_offset,
127 unsigned int start,
128 unsigned int length,
129 unsigned int word_length,
130 unsigned int total_length,
131 CGEN_INSN_BYTES_PTR buffer)
132{
133 static char errbuf[100];
134 /* Written this way to avoid undefined behaviour. */
135 unsigned long mask = (((1L << (length - 1)) - 1) << 1) | 1;
136
137 /* If LENGTH is zero, this operand doesn't contribute to the value. */
138 if (length == 0)
139 return NULL;
140
b7cd1872 141 if (word_length > 8 * sizeof (CGEN_INSN_INT))
d70c5fc7
NC		 142 abort ();
143
144 /* For architectures with insns smaller than the base-insn-bitsize,
145 word_length may be too big. */
146 if (cd->min_insn_bitsize < cd->base_insn_bitsize)
147 {
148 if (word_offset == 0
149 && word_length > total_length)
150 word_length = total_length;
151 }
152
153 /* Ensure VALUE will fit. */
154 if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGN_OPT))
155 {
156 long minval = - (1L << (length - 1));
157 unsigned long maxval = mask;
43e65147 158
d70c5fc7
NC		 159 if ((value > 0 && (unsigned long) value > maxval)
160 || value < minval)
161 {
162 /* xgettext:c-format */
163 sprintf (errbuf,
164 _("operand out of range (%ld not between %ld and %lu)"),
165 value, minval, maxval);
166 return errbuf;
167 }
168 }
169 else if (! CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED))
170 {
171 unsigned long maxval = mask;
ed963e2d
NC		 172 unsigned long val = (unsigned long) value;
173
174 /* For hosts with a word size > 32 check to see if value has been sign
175 extended beyond 32 bits. If so then ignore these higher sign bits
176 as the user is attempting to store a 32-bit signed value into an
177 unsigned 32-bit field which is allowed. */
178 if (sizeof (unsigned long) > 4 && ((value >> 32) == -1))
179 val &= 0xFFFFFFFF;
180
181 if (val > maxval)
d70c5fc7
NC		 182 {
183 /* xgettext:c-format */
184 sprintf (errbuf,
ed963e2d
NC		 185 _("operand out of range (0x%lx not between 0 and 0x%lx)"),
186 val, maxval);
d70c5fc7
NC		 187 return errbuf;
188 }
189 }
190 else
191 {
192 if (! cgen_signed_overflow_ok_p (cd))
193 {
194 long minval = - (1L << (length - 1));
195 long maxval = (1L << (length - 1)) - 1;
43e65147 196
d70c5fc7
NC		 197 if (value < minval || value > maxval)
198 {
199 sprintf
200 /* xgettext:c-format */
201 (errbuf, _("operand out of range (%ld not between %ld and %ld)"),
202 value, minval, maxval);
203 return errbuf;
204 }
205 }
206 }
207
208#if CGEN_INT_INSN_P
209
210 {
a143b004 211 int shift_within_word, shift_to_word, shift;
d70c5fc7 212
a143b004
AB		 213 /* How to shift the value to BIT0 of the word. */
214 shift_to_word = total_length - (word_offset + word_length);
215
216 /* How to shift the value to the field within the word. */
d70c5fc7 217 if (CGEN_INSN_LSB0_P)
a143b004 218 shift_within_word = start + 1 - length;
d70c5fc7 219 else
a143b004
AB		 220 shift_within_word = word_length - start - length;
221
222 /* The total SHIFT, then mask in the value. */
223 shift = shift_to_word + shift_within_word;
d70c5fc7
NC		 224 *buffer = (*buffer & ~(mask << shift)) | ((value & mask) << shift);
225 }
226
227#else /* ! CGEN_INT_INSN_P */
228
229 {
230 unsigned char *bufp = (unsigned char *) buffer + word_offset / 8;
231
232 insert_1 (cd, value, start, length, word_length, bufp);
233 }
234
235#endif /* ! CGEN_INT_INSN_P */
236
237 return NULL;
238}
239
240/* Default insn builder (insert handler).
241 The instruction is recorded in CGEN_INT_INSN_P byte order (meaning
242 that if CGEN_INSN_BYTES_PTR is an int * and thus, the value is
243 recorded in host byte order, otherwise BUFFER is an array of bytes
244 and the value is recorded in target byte order).
245 The result is an error message or NULL if success. */
246
247static const char *
248insert_insn_normal (CGEN_CPU_DESC cd,
249 const CGEN_INSN * insn,
250 CGEN_FIELDS * fields,
251 CGEN_INSN_BYTES_PTR buffer,
252 bfd_vma pc)
253{
254 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
255 unsigned long value;
256 const CGEN_SYNTAX_CHAR_TYPE * syn;
257
258 CGEN_INIT_INSERT (cd);
259 value = CGEN_INSN_BASE_VALUE (insn);
260
261 /* If we're recording insns as numbers (rather than a string of bytes),
262 target byte order handling is deferred until later. */
263
264#if CGEN_INT_INSN_P
265
266 put_insn_int_value (cd, buffer, cd->base_insn_bitsize,
267 CGEN_FIELDS_BITSIZE (fields), value);
268
269#else
270
271 cgen_put_insn_value (cd, buffer, min ((unsigned) cd->base_insn_bitsize,
272 (unsigned) CGEN_FIELDS_BITSIZE (fields)),
273 value);
274
275#endif /* ! CGEN_INT_INSN_P */
276
277 /* ??? It would be better to scan the format's fields.
278 Still need to be able to insert a value based on the operand though;
279 e.g. storing a branch displacement that got resolved later.
280 Needs more thought first. */
281
282 for (syn = CGEN_SYNTAX_STRING (syntax); * syn; ++ syn)
283 {
284 const char *errmsg;
285
286 if (CGEN_SYNTAX_CHAR_P (* syn))
287 continue;
288
289 errmsg = (* cd->insert_operand) (cd, CGEN_SYNTAX_FIELD (*syn),
290 fields, buffer, pc);
291 if (errmsg)
292 return errmsg;
293 }
294
295 return NULL;
296}
297
298#if CGEN_INT_INSN_P
299/* Cover function to store an insn value into an integral insn. Must go here
300 because it needs <prefix>-desc.h for CGEN_INT_INSN_P. */
301
302static void
303put_insn_int_value (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
304 CGEN_INSN_BYTES_PTR buf,
305 int length,
306 int insn_length,
307 CGEN_INSN_INT value)
308{
309 /* For architectures with insns smaller than the base-insn-bitsize,
310 length may be too big. */
311 if (length > insn_length)
312 *buf = value;
313 else
314 {
315 int shift = insn_length - length;
316 /* Written this way to avoid undefined behaviour. */
317 CGEN_INSN_INT mask = (((1L << (length - 1)) - 1) << 1) | 1;
318
319 *buf = (*buf & ~(mask << shift)) | ((value & mask) << shift);
320 }
321}
322#endif
323\f
324/* Operand extraction. */
325
326#if ! CGEN_INT_INSN_P
327
328/* Subroutine of extract_normal.
329 Ensure sufficient bytes are cached in EX_INFO.
330 OFFSET is the offset in bytes from the start of the insn of the value.
331 BYTES is the length of the needed value.
332 Returns 1 for success, 0 for failure. */
333
334static CGEN_INLINE int
335fill_cache (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
336 CGEN_EXTRACT_INFO *ex_info,
337 int offset,
338 int bytes,
339 bfd_vma pc)
340{
341 /* It's doubtful that the middle part has already been fetched so
342 we don't optimize that case. kiss. */
343 unsigned int mask;
344 disassemble_info *info = (disassemble_info *) ex_info->dis_info;
345
346 /* First do a quick check. */
347 mask = (1 << bytes) - 1;
348 if (((ex_info->valid >> offset) & mask) == mask)
349 return 1;
350
351 /* Search for the first byte we need to read. */
352 for (mask = 1 << offset; bytes > 0; --bytes, ++offset, mask <<= 1)
353 if (! (mask & ex_info->valid))
354 break;
355
356 if (bytes)
357 {
358 int status;
359
360 pc += offset;
361 status = (*info->read_memory_func)
362 (pc, ex_info->insn_bytes + offset, bytes, info);
363
364 if (status != 0)
365 {
366 (*info->memory_error_func) (status, pc, info);
367 return 0;
368 }
369
370 ex_info->valid |= ((1 << bytes) - 1) << offset;
371 }
372
373 return 1;
374}
375
376/* Subroutine of extract_normal. */
377
378static CGEN_INLINE long
379extract_1 (CGEN_CPU_DESC cd,
380 CGEN_EXTRACT_INFO *ex_info ATTRIBUTE_UNUSED,
381 int start,
382 int length,
383 int word_length,
384 unsigned char *bufp,
385 bfd_vma pc ATTRIBUTE_UNUSED)
386{
387 unsigned long x;
388 int shift;
389
390 x = cgen_get_insn_value (cd, bufp, word_length);
391
392 if (CGEN_INSN_LSB0_P)
393 shift = (start + 1) - length;
394 else
395 shift = (word_length - (start + length));
396 return x >> shift;
397}
398
399#endif /* ! CGEN_INT_INSN_P */
400
401/* Default extraction routine.
402
403 INSN_VALUE is the first base_insn_bitsize bits of the insn in host order,
404 or sometimes less for cases like the m32r where the base insn size is 32
405 but some insns are 16 bits.
406 ATTRS is a mask of the boolean attributes. We only need `SIGNED',
407 but for generality we take a bitmask of all of them.
408 WORD_OFFSET is the offset in bits from the start of the insn of the value.
409 WORD_LENGTH is the length of the word in bits in which the value resides.
410 START is the starting bit number in the word, architecture origin.
411 LENGTH is the length of VALUE in bits.
412 TOTAL_LENGTH is the total length of the insn in bits.
413
414 Returns 1 for success, 0 for failure. */
415
416/* ??? The return code isn't properly used. wip. */
417
418/* ??? This doesn't handle bfd_vma's. Create another function when
419 necessary. */
420
421static int
422extract_normal (CGEN_CPU_DESC cd,
423#if ! CGEN_INT_INSN_P
424 CGEN_EXTRACT_INFO *ex_info,
425#else
426 CGEN_EXTRACT_INFO *ex_info ATTRIBUTE_UNUSED,
427#endif
428 CGEN_INSN_INT insn_value,
429 unsigned int attrs,
430 unsigned int word_offset,
431 unsigned int start,
432 unsigned int length,
433 unsigned int word_length,
434 unsigned int total_length,
435#if ! CGEN_INT_INSN_P
436 bfd_vma pc,
437#else
438 bfd_vma pc ATTRIBUTE_UNUSED,
439#endif
440 long *valuep)
441{
442 long value, mask;
443
444 /* If LENGTH is zero, this operand doesn't contribute to the value
445 so give it a standard value of zero. */
446 if (length == 0)
447 {
448 *valuep = 0;
449 return 1;
450 }
451
b7cd1872 452 if (word_length > 8 * sizeof (CGEN_INSN_INT))
d70c5fc7
NC		 453 abort ();
454
455 /* For architectures with insns smaller than the insn-base-bitsize,
456 word_length may be too big. */
457 if (cd->min_insn_bitsize < cd->base_insn_bitsize)
458 {
459 if (word_offset + word_length > total_length)
460 word_length = total_length - word_offset;
461 }
462
463 /* Does the value reside in INSN_VALUE, and at the right alignment? */
464
465 if (CGEN_INT_INSN_P || (word_offset == 0 && word_length == total_length))
466 {
467 if (CGEN_INSN_LSB0_P)
468 value = insn_value >> ((word_offset + start + 1) - length);
469 else
470 value = insn_value >> (total_length - ( word_offset + start + length));
471 }
472
473#if ! CGEN_INT_INSN_P
474
475 else
476 {
477 unsigned char *bufp = ex_info->insn_bytes + word_offset / 8;
478
b7cd1872 479 if (word_length > 8 * sizeof (CGEN_INSN_INT))
d70c5fc7
NC		 480 abort ();
481
482 if (fill_cache (cd, ex_info, word_offset / 8, word_length / 8, pc) == 0)
483 return 0;
484
485 value = extract_1 (cd, ex_info, start, length, word_length, bufp, pc);
486 }
487
488#endif /* ! CGEN_INT_INSN_P */
489
490 /* Written this way to avoid undefined behaviour. */
491 mask = (((1L << (length - 1)) - 1) << 1) | 1;
492
493 value &= mask;
494 /* sign extend? */
495 if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED)
496 && (value & (1L << (length - 1))))
497 value |= ~mask;
498
499 *valuep = value;
500
501 return 1;
502}
503
504/* Default insn extractor.
505
506 INSN_VALUE is the first base_insn_bitsize bits, translated to host order.
507 The extracted fields are stored in FIELDS.
508 EX_INFO is used to handle reading variable length insns.
509 Return the length of the insn in bits, or 0 if no match,
510 or -1 if an error occurs fetching data (memory_error_func will have
511 been called). */
512
513static int
514extract_insn_normal (CGEN_CPU_DESC cd,
515 const CGEN_INSN *insn,
516 CGEN_EXTRACT_INFO *ex_info,
517 CGEN_INSN_INT insn_value,
518 CGEN_FIELDS *fields,
519 bfd_vma pc)
520{
521 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
522 const CGEN_SYNTAX_CHAR_TYPE *syn;
523
524 CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn);
525
526 CGEN_INIT_EXTRACT (cd);
527
528 for (syn = CGEN_SYNTAX_STRING (syntax); *syn; ++syn)
529 {
530 int length;
531
532 if (CGEN_SYNTAX_CHAR_P (*syn))
533 continue;
534
535 length = (* cd->extract_operand) (cd, CGEN_SYNTAX_FIELD (*syn),
536 ex_info, insn_value, fields, pc);
537 if (length <= 0)
538 return length;
539 }
540
541 /* We recognized and successfully extracted this insn. */
542 return CGEN_INSN_BITSIZE (insn);
543}
544\f
545/* Machine generated code added here. */
546
547const char * xc16x_cgen_insert_operand
548 (CGEN_CPU_DESC, int, CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma);
549
550/* Main entry point for operand insertion.
551
552 This function is basically just a big switch statement. Earlier versions
553 used tables to look up the function to use, but
554 - if the table contains both assembler and disassembler functions then
555 the disassembler contains much of the assembler and vice-versa,
556 - there's a lot of inlining possibilities as things grow,
557 - using a switch statement avoids the function call overhead.
558
559 This function could be moved into `parse_insn_normal', but keeping it
560 separate makes clear the interface between `parse_insn_normal' and each of
561 the handlers. It's also needed by GAS to insert operands that couldn't be
562 resolved during parsing. */
563
564const char *
565xc16x_cgen_insert_operand (CGEN_CPU_DESC cd,
566 int opindex,
567 CGEN_FIELDS * fields,
568 CGEN_INSN_BYTES_PTR buffer,
569 bfd_vma pc ATTRIBUTE_UNUSED)
570{
571 const char * errmsg = NULL;
572 unsigned int total_length = CGEN_FIELDS_BITSIZE (fields);
573
574 switch (opindex)
575 {
576 case XC16X_OPERAND_REGNAM :
577 errmsg = insert_normal (cd, fields->f_reg8, 0, 0, 15, 8, 32, total_length, buffer);
578 break;
579 case XC16X_OPERAND_BIT01 :
580 errmsg = insert_normal (cd, fields->f_op_1bit, 0, 0, 8, 1, 32, total_length, buffer);
581 break;
582 case XC16X_OPERAND_BIT1 :
583 errmsg = insert_normal (cd, fields->f_op_bit1, 0, 0, 11, 1, 32, total_length, buffer);
584 break;
585 case XC16X_OPERAND_BIT2 :
586 errmsg = insert_normal (cd, fields->f_op_bit2, 0, 0, 11, 2, 32, total_length, buffer);
587 break;
588 case XC16X_OPERAND_BIT4 :
589 errmsg = insert_normal (cd, fields->f_op_bit4, 0, 0, 11, 4, 32, total_length, buffer);
590 break;
591 case XC16X_OPERAND_BIT8 :
592 errmsg = insert_normal (cd, fields->f_op_bit8, 0, 0, 31, 8, 32, total_length, buffer);
593 break;
594 case XC16X_OPERAND_BITONE :
595 errmsg = insert_normal (cd, fields->f_op_onebit, 0, 0, 9, 1, 32, total_length, buffer);
596 break;
597 case XC16X_OPERAND_CADDR :
598 errmsg = insert_normal (cd, fields->f_offset16, 0|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_ABS_ADDR), 0, 31, 16, 32, total_length, buffer);
599 break;
600 case XC16X_OPERAND_COND :
601 errmsg = insert_normal (cd, fields->f_condcode, 0, 0, 7, 4, 32, total_length, buffer);
602 break;
603 case XC16X_OPERAND_DATA8 :
604 errmsg = insert_normal (cd, fields->f_data8, 0, 0, 23, 8, 32, total_length, buffer);
605 break;
606 case XC16X_OPERAND_DATAHI8 :
607 errmsg = insert_normal (cd, fields->f_datahi8, 0, 0, 31, 8, 32, total_length, buffer);
608 break;
609 case XC16X_OPERAND_DOT :
610 break;
611 case XC16X_OPERAND_DR :
612 errmsg = insert_normal (cd, fields->f_r1, 0, 0, 15, 4, 32, total_length, buffer);
613 break;
614 case XC16X_OPERAND_DRB :
615 errmsg = insert_normal (cd, fields->f_r1, 0, 0, 15, 4, 32, total_length, buffer);
616 break;
617 case XC16X_OPERAND_DRI :
618 errmsg = insert_normal (cd, fields->f_r4, 0, 0, 11, 4, 32, total_length, buffer);
619 break;
620 case XC16X_OPERAND_EXTCOND :
621 errmsg = insert_normal (cd, fields->f_extccode, 0, 0, 15, 5, 32, total_length, buffer);
622 break;
623 case XC16X_OPERAND_GENREG :
624 errmsg = insert_normal (cd, fields->f_regb8, 0, 0, 15, 8, 32, total_length, buffer);
625 break;
626 case XC16X_OPERAND_HASH :
627 break;
628 case XC16X_OPERAND_ICOND :
629 errmsg = insert_normal (cd, fields->f_icondcode, 0, 0, 15, 4, 32, total_length, buffer);
630 break;
631 case XC16X_OPERAND_LBIT2 :
632 errmsg = insert_normal (cd, fields->f_op_lbit2, 0, 0, 15, 2, 32, total_length, buffer);
633 break;
634 case XC16X_OPERAND_LBIT4 :
635 errmsg = insert_normal (cd, fields->f_op_lbit4, 0, 0, 15, 4, 32, total_length, buffer);
636 break;
637 case XC16X_OPERAND_MASK8 :
638 errmsg = insert_normal (cd, fields->f_mask8, 0, 0, 23, 8, 32, total_length, buffer);
639 break;
640 case XC16X_OPERAND_MASKLO8 :
641 errmsg = insert_normal (cd, fields->f_datahi8, 0, 0, 31, 8, 32, total_length, buffer);
642 break;
643 case XC16X_OPERAND_MEMGR8 :
644 errmsg = insert_normal (cd, fields->f_memgr8, 0, 0, 31, 16, 32, total_length, buffer);
645 break;
646 case XC16X_OPERAND_MEMORY :
647 errmsg = insert_normal (cd, fields->f_memory, 0, 0, 31, 16, 32, total_length, buffer);
648 break;
649 case XC16X_OPERAND_PAG :
650 break;
651 case XC16X_OPERAND_PAGENUM :
652 errmsg = insert_normal (cd, fields->f_pagenum, 0, 0, 25, 10, 32, total_length, buffer);
653 break;
654 case XC16X_OPERAND_POF :
655 break;
656 case XC16X_OPERAND_QBIT :
657 errmsg = insert_normal (cd, fields->f_qbit, 0, 0, 7, 4, 32, total_length, buffer);
658 break;
659 case XC16X_OPERAND_QHIBIT :
660 errmsg = insert_normal (cd, fields->f_qhibit, 0, 0, 27, 4, 32, total_length, buffer);
661 break;
662 case XC16X_OPERAND_QLOBIT :
663 errmsg = insert_normal (cd, fields->f_qlobit, 0, 0, 31, 4, 32, total_length, buffer);
664 break;
665 case XC16X_OPERAND_REG8 :
666 errmsg = insert_normal (cd, fields->f_reg8, 0, 0, 15, 8, 32, total_length, buffer);
667 break;
668 case XC16X_OPERAND_REGB8 :
669 errmsg = insert_normal (cd, fields->f_regb8, 0, 0, 15, 8, 32, total_length, buffer);
670 break;
671 case XC16X_OPERAND_REGBMEM8 :
672 errmsg = insert_normal (cd, fields->f_regmem8, 0, 0, 15, 8, 32, total_length, buffer);
673 break;
674 case XC16X_OPERAND_REGHI8 :
675 errmsg = insert_normal (cd, fields->f_reghi8, 0, 0, 23, 8, 32, total_length, buffer);
676 break;
677 case XC16X_OPERAND_REGMEM8 :
678 errmsg = insert_normal (cd, fields->f_regmem8, 0, 0, 15, 8, 32, total_length, buffer);
679 break;
680 case XC16X_OPERAND_REGOFF8 :
681 errmsg = insert_normal (cd, fields->f_regoff8, 0, 0, 15, 8, 32, total_length, buffer);
682 break;
683 case XC16X_OPERAND_REL :
684 errmsg = insert_normal (cd, fields->f_rel8, 0|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 15, 8, 32, total_length, buffer);
685 break;
686 case XC16X_OPERAND_RELHI :
687 errmsg = insert_normal (cd, fields->f_relhi8, 0|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 23, 8, 32, total_length, buffer);
688 break;
689 case XC16X_OPERAND_SEG :
690 errmsg = insert_normal (cd, fields->f_seg8, 0, 0, 15, 8, 32, total_length, buffer);
691 break;
692 case XC16X_OPERAND_SEGHI8 :
693 errmsg = insert_normal (cd, fields->f_segnum8, 0, 0, 23, 8, 32, total_length, buffer);
694 break;
695 case XC16X_OPERAND_SEGM :
696 break;
697 case XC16X_OPERAND_SOF :
698 break;
699 case XC16X_OPERAND_SR :
700 errmsg = insert_normal (cd, fields->f_r2, 0, 0, 11, 4, 32, total_length, buffer);
701 break;
702 case XC16X_OPERAND_SR2 :
703 errmsg = insert_normal (cd, fields->f_r0, 0, 0, 9, 2, 32, total_length, buffer);
704 break;
705 case XC16X_OPERAND_SRB :
706 errmsg = insert_normal (cd, fields->f_r2, 0, 0, 11, 4, 32, total_length, buffer);
707 break;
708 case XC16X_OPERAND_SRC1 :
709 errmsg = insert_normal (cd, fields->f_r1, 0, 0, 15, 4, 32, total_length, buffer);
710 break;
711 case XC16X_OPERAND_SRC2 :
712 errmsg = insert_normal (cd, fields->f_r2, 0, 0, 11, 4, 32, total_length, buffer);
713 break;
714 case XC16X_OPERAND_SRDIV :
715 errmsg = insert_normal (cd, fields->f_reg8, 0, 0, 15, 8, 32, total_length, buffer);
716 break;
717 case XC16X_OPERAND_U4 :
718 errmsg = insert_normal (cd, fields->f_uimm4, 0, 0, 15, 4, 32, total_length, buffer);
719 break;
720 case XC16X_OPERAND_UIMM16 :
721 errmsg = insert_normal (cd, fields->f_uimm16, 0, 0, 31, 16, 32, total_length, buffer);
722 break;
723 case XC16X_OPERAND_UIMM2 :
724 errmsg = insert_normal (cd, fields->f_uimm2, 0, 0, 13, 2, 32, total_length, buffer);
725 break;
726 case XC16X_OPERAND_UIMM3 :
727 errmsg = insert_normal (cd, fields->f_uimm3, 0, 0, 10, 3, 32, total_length, buffer);
728 break;
729 case XC16X_OPERAND_UIMM4 :
730 errmsg = insert_normal (cd, fields->f_uimm4, 0, 0, 15, 4, 32, total_length, buffer);
731 break;
732 case XC16X_OPERAND_UIMM7 :
733 errmsg = insert_normal (cd, fields->f_uimm7, 0|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 15, 7, 32, total_length, buffer);
734 break;
735 case XC16X_OPERAND_UIMM8 :
736 errmsg = insert_normal (cd, fields->f_uimm8, 0, 0, 23, 8, 32, total_length, buffer);
737 break;
738 case XC16X_OPERAND_UPAG16 :
739 errmsg = insert_normal (cd, fields->f_uimm16, 0, 0, 31, 16, 32, total_length, buffer);
740 break;
741 case XC16X_OPERAND_UPOF16 :
742 errmsg = insert_normal (cd, fields->f_memory, 0, 0, 31, 16, 32, total_length, buffer);
743 break;
744 case XC16X_OPERAND_USEG16 :
745 errmsg = insert_normal (cd, fields->f_offset16, 0|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_ABS_ADDR), 0, 31, 16, 32, total_length, buffer);
746 break;
747 case XC16X_OPERAND_USEG8 :
748 errmsg = insert_normal (cd, fields->f_seg8, 0, 0, 15, 8, 32, total_length, buffer);
749 break;
750 case XC16X_OPERAND_USOF16 :
751 errmsg = insert_normal (cd, fields->f_offset16, 0|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_ABS_ADDR), 0, 31, 16, 32, total_length, buffer);
752 break;
753
754 default :
755 /* xgettext:c-format */
a6743a54
AM		 756 opcodes_error_handler
757 (_("internal error: unrecognized field %d while building insn"),
758 opindex);
d70c5fc7
NC		 759 abort ();
760 }
761
762 return errmsg;
763}
764
765int xc16x_cgen_extract_operand
766 (CGEN_CPU_DESC, int, CGEN_EXTRACT_INFO *, CGEN_INSN_INT, CGEN_FIELDS *, bfd_vma);
767
768/* Main entry point for operand extraction.
769 The result is <= 0 for error, >0 for success.
770 ??? Actual values aren't well defined right now.
771
772 This function is basically just a big switch statement. Earlier versions
773 used tables to look up the function to use, but
774 - if the table contains both assembler and disassembler functions then
775 the disassembler contains much of the assembler and vice-versa,
776 - there's a lot of inlining possibilities as things grow,
777 - using a switch statement avoids the function call overhead.
778
779 This function could be moved into `print_insn_normal', but keeping it
780 separate makes clear the interface between `print_insn_normal' and each of
781 the handlers. */
782
783int
784xc16x_cgen_extract_operand (CGEN_CPU_DESC cd,
785 int opindex,
786 CGEN_EXTRACT_INFO *ex_info,
787 CGEN_INSN_INT insn_value,
788 CGEN_FIELDS * fields,
789 bfd_vma pc)
790{
791 /* Assume success (for those operands that are nops). */
792 int length = 1;
793 unsigned int total_length = CGEN_FIELDS_BITSIZE (fields);
794
795 switch (opindex)
796 {
797 case XC16X_OPERAND_REGNAM :
798 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 8, 32, total_length, pc, & fields->f_reg8);
799 break;
800 case XC16X_OPERAND_BIT01 :
801 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 1, 32, total_length, pc, & fields->f_op_1bit);
802 break;
803 case XC16X_OPERAND_BIT1 :
804 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_op_bit1);
805 break;
806 case XC16X_OPERAND_BIT2 :
807 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 2, 32, total_length, pc, & fields->f_op_bit2);
808 break;
809 case XC16X_OPERAND_BIT4 :
810 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 4, 32, total_length, pc, & fields->f_op_bit4);
811 break;
812 case XC16X_OPERAND_BIT8 :
813 length = extract_normal (cd, ex_info, insn_value, 0, 0, 31, 8, 32, total_length, pc, & fields->f_op_bit8);
814 break;
815 case XC16X_OPERAND_BITONE :
816 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_op_onebit);
817 break;
818 case XC16X_OPERAND_CADDR :
819 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_ABS_ADDR), 0, 31, 16, 32, total_length, pc, & fields->f_offset16);
820 break;
821 case XC16X_OPERAND_COND :
822 length = extract_normal (cd, ex_info, insn_value, 0, 0, 7, 4, 32, total_length, pc, & fields->f_condcode);
823 break;
824 case XC16X_OPERAND_DATA8 :
825 length = extract_normal (cd, ex_info, insn_value, 0, 0, 23, 8, 32, total_length, pc, & fields->f_data8);
826 break;
827 case XC16X_OPERAND_DATAHI8 :
828 length = extract_normal (cd, ex_info, insn_value, 0, 0, 31, 8, 32, total_length, pc, & fields->f_datahi8);
829 break;
830 case XC16X_OPERAND_DOT :
831 break;
832 case XC16X_OPERAND_DR :
833 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 4, 32, total_length, pc, & fields->f_r1);
834 break;
835 case XC16X_OPERAND_DRB :
836 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 4, 32, total_length, pc, & fields->f_r1);
837 break;
838 case XC16X_OPERAND_DRI :
839 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 4, 32, total_length, pc, & fields->f_r4);
840 break;
841 case XC16X_OPERAND_EXTCOND :
842 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 5, 32, total_length, pc, & fields->f_extccode);
843 break;
844 case XC16X_OPERAND_GENREG :
845 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 8, 32, total_length, pc, & fields->f_regb8);
846 break;
847 case XC16X_OPERAND_HASH :
848 break;
849 case XC16X_OPERAND_ICOND :
850 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 4, 32, total_length, pc, & fields->f_icondcode);
851 break;
852 case XC16X_OPERAND_LBIT2 :
853 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 2, 32, total_length, pc, & fields->f_op_lbit2);
854 break;
855 case XC16X_OPERAND_LBIT4 :
856 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 4, 32, total_length, pc, & fields->f_op_lbit4);
857 break;
858 case XC16X_OPERAND_MASK8 :
859 length = extract_normal (cd, ex_info, insn_value, 0, 0, 23, 8, 32, total_length, pc, & fields->f_mask8);
860 break;
861 case XC16X_OPERAND_MASKLO8 :
862 length = extract_normal (cd, ex_info, insn_value, 0, 0, 31, 8, 32, total_length, pc, & fields->f_datahi8);
863 break;
864 case XC16X_OPERAND_MEMGR8 :
865 length = extract_normal (cd, ex_info, insn_value, 0, 0, 31, 16, 32, total_length, pc, & fields->f_memgr8);
866 break;
867 case XC16X_OPERAND_MEMORY :
868 length = extract_normal (cd, ex_info, insn_value, 0, 0, 31, 16, 32, total_length, pc, & fields->f_memory);
869 break;
870 case XC16X_OPERAND_PAG :
871 break;
872 case XC16X_OPERAND_PAGENUM :
873 length = extract_normal (cd, ex_info, insn_value, 0, 0, 25, 10, 32, total_length, pc, & fields->f_pagenum);
874 break;
875 case XC16X_OPERAND_POF :
876 break;
877 case XC16X_OPERAND_QBIT :
878 length = extract_normal (cd, ex_info, insn_value, 0, 0, 7, 4, 32, total_length, pc, & fields->f_qbit);
879 break;
880 case XC16X_OPERAND_QHIBIT :
881 length = extract_normal (cd, ex_info, insn_value, 0, 0, 27, 4, 32, total_length, pc, & fields->f_qhibit);
882 break;
883 case XC16X_OPERAND_QLOBIT :
884 length = extract_normal (cd, ex_info, insn_value, 0, 0, 31, 4, 32, total_length, pc, & fields->f_qlobit);
885 break;
886 case XC16X_OPERAND_REG8 :
887 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 8, 32, total_length, pc, & fields->f_reg8);
888 break;
889 case XC16X_OPERAND_REGB8 :
890 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 8, 32, total_length, pc, & fields->f_regb8);
891 break;
892 case XC16X_OPERAND_REGBMEM8 :
893 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 8, 32, total_length, pc, & fields->f_regmem8);
894 break;
895 case XC16X_OPERAND_REGHI8 :
896 length = extract_normal (cd, ex_info, insn_value, 0, 0, 23, 8, 32, total_length, pc, & fields->f_reghi8);
897 break;
898 case XC16X_OPERAND_REGMEM8 :
899 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 8, 32, total_length, pc, & fields->f_regmem8);
900 break;
901 case XC16X_OPERAND_REGOFF8 :
902 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 8, 32, total_length, pc, & fields->f_regoff8);
903 break;
904 case XC16X_OPERAND_REL :
905 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 15, 8, 32, total_length, pc, & fields->f_rel8);
906 break;
907 case XC16X_OPERAND_RELHI :
908 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 23, 8, 32, total_length, pc, & fields->f_relhi8);
909 break;
910 case XC16X_OPERAND_SEG :
911 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 8, 32, total_length, pc, & fields->f_seg8);
912 break;
913 case XC16X_OPERAND_SEGHI8 :
914 length = extract_normal (cd, ex_info, insn_value, 0, 0, 23, 8, 32, total_length, pc, & fields->f_segnum8);
915 break;
916 case XC16X_OPERAND_SEGM :
917 break;
918 case XC16X_OPERAND_SOF :
919 break;
920 case XC16X_OPERAND_SR :
921 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 4, 32, total_length, pc, & fields->f_r2);
922 break;
923 case XC16X_OPERAND_SR2 :
924 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 2, 32, total_length, pc, & fields->f_r0);
925 break;
926 case XC16X_OPERAND_SRB :
927 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 4, 32, total_length, pc, & fields->f_r2);
928 break;
929 case XC16X_OPERAND_SRC1 :
930 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 4, 32, total_length, pc, & fields->f_r1);
931 break;
932 case XC16X_OPERAND_SRC2 :
933 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 4, 32, total_length, pc, & fields->f_r2);
934 break;
935 case XC16X_OPERAND_SRDIV :
936 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 8, 32, total_length, pc, & fields->f_reg8);
937 break;
938 case XC16X_OPERAND_U4 :
939 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 4, 32, total_length, pc, & fields->f_uimm4);
940 break;
941 case XC16X_OPERAND_UIMM16 :
942 length = extract_normal (cd, ex_info, insn_value, 0, 0, 31, 16, 32, total_length, pc, & fields->f_uimm16);
943 break;
944 case XC16X_OPERAND_UIMM2 :
945 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 2, 32, total_length, pc, & fields->f_uimm2);
946 break;
947 case XC16X_OPERAND_UIMM3 :
948 length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 3, 32, total_length, pc, & fields->f_uimm3);
949 break;
950 case XC16X_OPERAND_UIMM4 :
951 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 4, 32, total_length, pc, & fields->f_uimm4);
952 break;
953 case XC16X_OPERAND_UIMM7 :
954 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 15, 7, 32, total_length, pc, & fields->f_uimm7);
955 break;
956 case XC16X_OPERAND_UIMM8 :
957 length = extract_normal (cd, ex_info, insn_value, 0, 0, 23, 8, 32, total_length, pc, & fields->f_uimm8);
958 break;
959 case XC16X_OPERAND_UPAG16 :
960 length = extract_normal (cd, ex_info, insn_value, 0, 0, 31, 16, 32, total_length, pc, & fields->f_uimm16);
961 break;
962 case XC16X_OPERAND_UPOF16 :
963 length = extract_normal (cd, ex_info, insn_value, 0, 0, 31, 16, 32, total_length, pc, & fields->f_memory);
964 break;
965 case XC16X_OPERAND_USEG16 :
966 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_ABS_ADDR), 0, 31, 16, 32, total_length, pc, & fields->f_offset16);
967 break;
968 case XC16X_OPERAND_USEG8 :
969 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 8, 32, total_length, pc, & fields->f_seg8);
970 break;
971 case XC16X_OPERAND_USOF16 :
972 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_ABS_ADDR), 0, 31, 16, 32, total_length, pc, & fields->f_offset16);
973 break;
974
975 default :
976 /* xgettext:c-format */
a6743a54
AM		 977 opcodes_error_handler
978 (_("internal error: unrecognized field %d while decoding insn"),
979 opindex);
d70c5fc7
NC		 980 abort ();
981 }
982
983 return length;
984}
985
43e65147 986cgen_insert_fn * const xc16x_cgen_insert_handlers[] =
d70c5fc7
NC		 987{
988 insert_insn_normal,
989};
990
43e65147 991cgen_extract_fn * const xc16x_cgen_extract_handlers[] =
d70c5fc7
NC		 992{
993 extract_insn_normal,
994};
995
996int xc16x_cgen_get_int_operand (CGEN_CPU_DESC, int, const CGEN_FIELDS *);
997bfd_vma xc16x_cgen_get_vma_operand (CGEN_CPU_DESC, int, const CGEN_FIELDS *);
998
999/* Getting values from cgen_fields is handled by a collection of functions.
1000 They are distinguished by the type of the VALUE argument they return.
1001 TODO: floating point, inlining support, remove cases where result type
1002 not appropriate. */
1003
1004int
1005xc16x_cgen_get_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
1006 int opindex,
1007 const CGEN_FIELDS * fields)
1008{
1009 int value;
1010
1011 switch (opindex)
1012 {
1013 case XC16X_OPERAND_REGNAM :
1014 value = fields->f_reg8;
1015 break;
1016 case XC16X_OPERAND_BIT01 :
1017 value = fields->f_op_1bit;
1018 break;
1019 case XC16X_OPERAND_BIT1 :
1020 value = fields->f_op_bit1;
1021 break;
1022 case XC16X_OPERAND_BIT2 :
1023 value = fields->f_op_bit2;
1024 break;
1025 case XC16X_OPERAND_BIT4 :
1026 value = fields->f_op_bit4;
1027 break;
1028 case XC16X_OPERAND_BIT8 :
1029 value = fields->f_op_bit8;
1030 break;
1031 case XC16X_OPERAND_BITONE :
1032 value = fields->f_op_onebit;
1033 break;
1034 case XC16X_OPERAND_CADDR :
1035 value = fields->f_offset16;
1036 break;
1037 case XC16X_OPERAND_COND :
1038 value = fields->f_condcode;
1039 break;
1040 case XC16X_OPERAND_DATA8 :
1041 value = fields->f_data8;
1042 break;
1043 case XC16X_OPERAND_DATAHI8 :
1044 value = fields->f_datahi8;
1045 break;
1046 case XC16X_OPERAND_DOT :
1047 value = 0;
1048 break;
1049 case XC16X_OPERAND_DR :
1050 value = fields->f_r1;
1051 break;
1052 case XC16X_OPERAND_DRB :
1053 value = fields->f_r1;
1054 break;
1055 case XC16X_OPERAND_DRI :
1056 value = fields->f_r4;
1057 break;
1058 case XC16X_OPERAND_EXTCOND :
1059 value = fields->f_extccode;
1060 break;
1061 case XC16X_OPERAND_GENREG :
1062 value = fields->f_regb8;
1063 break;
1064 case XC16X_OPERAND_HASH :
1065 value = 0;
1066 break;
1067 case XC16X_OPERAND_ICOND :
1068 value = fields->f_icondcode;
1069 break;
1070 case XC16X_OPERAND_LBIT2 :
1071 value = fields->f_op_lbit2;
1072 break;
1073 case XC16X_OPERAND_LBIT4 :
1074 value = fields->f_op_lbit4;
1075 break;
1076 case XC16X_OPERAND_MASK8 :
1077 value = fields->f_mask8;
1078 break;
1079 case XC16X_OPERAND_MASKLO8 :
1080 value = fields->f_datahi8;
1081 break;
1082 case XC16X_OPERAND_MEMGR8 :
1083 value = fields->f_memgr8;
1084 break;
1085 case XC16X_OPERAND_MEMORY :
1086 value = fields->f_memory;
1087 break;
1088 case XC16X_OPERAND_PAG :
1089 value = 0;
1090 break;
1091 case XC16X_OPERAND_PAGENUM :
1092 value = fields->f_pagenum;
1093 break;
1094 case XC16X_OPERAND_POF :
1095 value = 0;
1096 break;
1097 case XC16X_OPERAND_QBIT :
1098 value = fields->f_qbit;
1099 break;
1100 case XC16X_OPERAND_QHIBIT :
1101 value = fields->f_qhibit;
1102 break;
1103 case XC16X_OPERAND_QLOBIT :
1104 value = fields->f_qlobit;
1105 break;
1106 case XC16X_OPERAND_REG8 :
1107 value = fields->f_reg8;
1108 break;
1109 case XC16X_OPERAND_REGB8 :
1110 value = fields->f_regb8;
1111 break;
1112 case XC16X_OPERAND_REGBMEM8 :
1113 value = fields->f_regmem8;
1114 break;
1115 case XC16X_OPERAND_REGHI8 :
1116 value = fields->f_reghi8;
1117 break;
1118 case XC16X_OPERAND_REGMEM8 :
1119 value = fields->f_regmem8;
1120 break;
1121 case XC16X_OPERAND_REGOFF8 :
1122 value = fields->f_regoff8;
1123 break;
1124 case XC16X_OPERAND_REL :
1125 value = fields->f_rel8;
1126 break;
1127 case XC16X_OPERAND_RELHI :
1128 value = fields->f_relhi8;
1129 break;
1130 case XC16X_OPERAND_SEG :
1131 value = fields->f_seg8;
1132 break;
1133 case XC16X_OPERAND_SEGHI8 :
1134 value = fields->f_segnum8;
1135 break;
1136 case XC16X_OPERAND_SEGM :
1137 value = 0;
1138 break;
1139 case XC16X_OPERAND_SOF :
1140 value = 0;
1141 break;
1142 case XC16X_OPERAND_SR :
1143 value = fields->f_r2;
1144 break;
1145 case XC16X_OPERAND_SR2 :
1146 value = fields->f_r0;
1147 break;
1148 case XC16X_OPERAND_SRB :
1149 value = fields->f_r2;
1150 break;
1151 case XC16X_OPERAND_SRC1 :
1152 value = fields->f_r1;
1153 break;
1154 case XC16X_OPERAND_SRC2 :
1155 value = fields->f_r2;
1156 break;
1157 case XC16X_OPERAND_SRDIV :
1158 value = fields->f_reg8;
1159 break;
1160 case XC16X_OPERAND_U4 :
1161 value = fields->f_uimm4;
1162 break;
1163 case XC16X_OPERAND_UIMM16 :
1164 value = fields->f_uimm16;
1165 break;
1166 case XC16X_OPERAND_UIMM2 :
1167 value = fields->f_uimm2;
1168 break;
1169 case XC16X_OPERAND_UIMM3 :
1170 value = fields->f_uimm3;
1171 break;
1172 case XC16X_OPERAND_UIMM4 :
1173 value = fields->f_uimm4;
1174 break;
1175 case XC16X_OPERAND_UIMM7 :
1176 value = fields->f_uimm7;
1177 break;
1178 case XC16X_OPERAND_UIMM8 :
1179 value = fields->f_uimm8;
1180 break;
1181 case XC16X_OPERAND_UPAG16 :
1182 value = fields->f_uimm16;
1183 break;
1184 case XC16X_OPERAND_UPOF16 :
1185 value = fields->f_memory;
1186 break;
1187 case XC16X_OPERAND_USEG16 :
1188 value = fields->f_offset16;
1189 break;
1190 case XC16X_OPERAND_USEG8 :
1191 value = fields->f_seg8;
1192 break;
1193 case XC16X_OPERAND_USOF16 :
1194 value = fields->f_offset16;
1195 break;
1196
1197 default :
1198 /* xgettext:c-format */
a6743a54
AM		 1199 opcodes_error_handler
1200 (_("internal error: unrecognized field %d while getting int operand"),
1201 opindex);
d70c5fc7
NC		 1202 abort ();
1203 }
1204
1205 return value;
1206}
1207
1208bfd_vma
1209xc16x_cgen_get_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
1210 int opindex,
1211 const CGEN_FIELDS * fields)
1212{
1213 bfd_vma value;
1214
1215 switch (opindex)
1216 {
1217 case XC16X_OPERAND_REGNAM :
1218 value = fields->f_reg8;
1219 break;
1220 case XC16X_OPERAND_BIT01 :
1221 value = fields->f_op_1bit;
1222 break;
1223 case XC16X_OPERAND_BIT1 :
1224 value = fields->f_op_bit1;
1225 break;
1226 case XC16X_OPERAND_BIT2 :
1227 value = fields->f_op_bit2;
1228 break;
1229 case XC16X_OPERAND_BIT4 :
1230 value = fields->f_op_bit4;
1231 break;
1232 case XC16X_OPERAND_BIT8 :
1233 value = fields->f_op_bit8;
1234 break;
1235 case XC16X_OPERAND_BITONE :
1236 value = fields->f_op_onebit;
1237 break;
1238 case XC16X_OPERAND_CADDR :
1239 value = fields->f_offset16;
1240 break;
1241 case XC16X_OPERAND_COND :
1242 value = fields->f_condcode;
1243 break;
1244 case XC16X_OPERAND_DATA8 :
1245 value = fields->f_data8;
1246 break;
1247 case XC16X_OPERAND_DATAHI8 :
1248 value = fields->f_datahi8;
1249 break;
1250 case XC16X_OPERAND_DOT :
1251 value = 0;
1252 break;
1253 case XC16X_OPERAND_DR :
1254 value = fields->f_r1;
1255 break;
1256 case XC16X_OPERAND_DRB :
1257 value = fields->f_r1;
1258 break;
1259 case XC16X_OPERAND_DRI :
1260 value = fields->f_r4;
1261 break;
1262 case XC16X_OPERAND_EXTCOND :
1263 value = fields->f_extccode;
1264 break;
1265 case XC16X_OPERAND_GENREG :
1266 value = fields->f_regb8;
1267 break;
1268 case XC16X_OPERAND_HASH :
1269 value = 0;
1270 break;
1271 case XC16X_OPERAND_ICOND :
1272 value = fields->f_icondcode;
1273 break;
1274 case XC16X_OPERAND_LBIT2 :
1275 value = fields->f_op_lbit2;
1276 break;
1277 case XC16X_OPERAND_LBIT4 :
1278 value = fields->f_op_lbit4;
1279 break;
1280 case XC16X_OPERAND_MASK8 :
1281 value = fields->f_mask8;
1282 break;
1283 case XC16X_OPERAND_MASKLO8 :
1284 value = fields->f_datahi8;
1285 break;
1286 case XC16X_OPERAND_MEMGR8 :
1287 value = fields->f_memgr8;
1288 break;
1289 case XC16X_OPERAND_MEMORY :
1290 value = fields->f_memory;
1291 break;
1292 case XC16X_OPERAND_PAG :
1293 value = 0;
1294 break;
1295 case XC16X_OPERAND_PAGENUM :
1296 value = fields->f_pagenum;
1297 break;
1298 case XC16X_OPERAND_POF :
1299 value = 0;
1300 break;
1301 case XC16X_OPERAND_QBIT :
1302 value = fields->f_qbit;
1303 break;
1304 case XC16X_OPERAND_QHIBIT :
1305 value = fields->f_qhibit;
1306 break;
1307 case XC16X_OPERAND_QLOBIT :
1308 value = fields->f_qlobit;
1309 break;
1310 case XC16X_OPERAND_REG8 :
1311 value = fields->f_reg8;
1312 break;
1313 case XC16X_OPERAND_REGB8 :
1314 value = fields->f_regb8;
1315 break;
1316 case XC16X_OPERAND_REGBMEM8 :
1317 value = fields->f_regmem8;
1318 break;
1319 case XC16X_OPERAND_REGHI8 :
1320 value = fields->f_reghi8;
1321 break;
1322 case XC16X_OPERAND_REGMEM8 :
1323 value = fields->f_regmem8;
1324 break;
1325 case XC16X_OPERAND_REGOFF8 :
1326 value = fields->f_regoff8;
1327 break;
1328 case XC16X_OPERAND_REL :
1329 value = fields->f_rel8;
1330 break;
1331 case XC16X_OPERAND_RELHI :
1332 value = fields->f_relhi8;
1333 break;
1334 case XC16X_OPERAND_SEG :
1335 value = fields->f_seg8;
1336 break;
1337 case XC16X_OPERAND_SEGHI8 :
1338 value = fields->f_segnum8;
1339 break;
1340 case XC16X_OPERAND_SEGM :
1341 value = 0;
1342 break;
1343 case XC16X_OPERAND_SOF :
1344 value = 0;
1345 break;
1346 case XC16X_OPERAND_SR :
1347 value = fields->f_r2;
1348 break;
1349 case XC16X_OPERAND_SR2 :
1350 value = fields->f_r0;
1351 break;
1352 case XC16X_OPERAND_SRB :
1353 value = fields->f_r2;
1354 break;
1355 case XC16X_OPERAND_SRC1 :
1356 value = fields->f_r1;
1357 break;
1358 case XC16X_OPERAND_SRC2 :
1359 value = fields->f_r2;
1360 break;
1361 case XC16X_OPERAND_SRDIV :
1362 value = fields->f_reg8;
1363 break;
1364 case XC16X_OPERAND_U4 :
1365 value = fields->f_uimm4;
1366 break;
1367 case XC16X_OPERAND_UIMM16 :
1368 value = fields->f_uimm16;
1369 break;
1370 case XC16X_OPERAND_UIMM2 :
1371 value = fields->f_uimm2;
1372 break;
1373 case XC16X_OPERAND_UIMM3 :
1374 value = fields->f_uimm3;
1375 break;
1376 case XC16X_OPERAND_UIMM4 :
1377 value = fields->f_uimm4;
1378 break;
1379 case XC16X_OPERAND_UIMM7 :
1380 value = fields->f_uimm7;
1381 break;
1382 case XC16X_OPERAND_UIMM8 :
1383 value = fields->f_uimm8;
1384 break;
1385 case XC16X_OPERAND_UPAG16 :
1386 value = fields->f_uimm16;
1387 break;
1388 case XC16X_OPERAND_UPOF16 :
1389 value = fields->f_memory;
1390 break;
1391 case XC16X_OPERAND_USEG16 :
1392 value = fields->f_offset16;
1393 break;
1394 case XC16X_OPERAND_USEG8 :
1395 value = fields->f_seg8;
1396 break;
1397 case XC16X_OPERAND_USOF16 :
1398 value = fields->f_offset16;
1399 break;
1400
1401 default :
1402 /* xgettext:c-format */
a6743a54
AM		 1403 opcodes_error_handler
1404 (_("internal error: unrecognized field %d while getting vma operand"),
1405 opindex);
d70c5fc7
NC		 1406 abort ();
1407 }
1408
1409 return value;
1410}
1411
1412void xc16x_cgen_set_int_operand (CGEN_CPU_DESC, int, CGEN_FIELDS *, int);
1413void xc16x_cgen_set_vma_operand (CGEN_CPU_DESC, int, CGEN_FIELDS *, bfd_vma);
1414
1415/* Stuffing values in cgen_fields is handled by a collection of functions.
1416 They are distinguished by the type of the VALUE argument they accept.
1417 TODO: floating point, inlining support, remove cases where argument type
1418 not appropriate. */
1419
1420void
1421xc16x_cgen_set_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
1422 int opindex,
1423 CGEN_FIELDS * fields,
1424 int value)
1425{
1426 switch (opindex)
1427 {
1428 case XC16X_OPERAND_REGNAM :
1429 fields->f_reg8 = value;
1430 break;
1431 case XC16X_OPERAND_BIT01 :
1432 fields->f_op_1bit = value;
1433 break;
1434 case XC16X_OPERAND_BIT1 :
1435 fields->f_op_bit1 = value;
1436 break;
1437 case XC16X_OPERAND_BIT2 :
1438 fields->f_op_bit2 = value;
1439 break;
1440 case XC16X_OPERAND_BIT4 :
1441 fields->f_op_bit4 = value;
1442 break;
1443 case XC16X_OPERAND_BIT8 :
1444 fields->f_op_bit8 = value;
1445 break;
1446 case XC16X_OPERAND_BITONE :
1447 fields->f_op_onebit = value;
1448 break;
1449 case XC16X_OPERAND_CADDR :
1450 fields->f_offset16 = value;
1451 break;
1452 case XC16X_OPERAND_COND :
1453 fields->f_condcode = value;
1454 break;
1455 case XC16X_OPERAND_DATA8 :
1456 fields->f_data8 = value;
1457 break;
1458 case XC16X_OPERAND_DATAHI8 :
1459 fields->f_datahi8 = value;
1460 break;
1461 case XC16X_OPERAND_DOT :
1462 break;
1463 case XC16X_OPERAND_DR :
1464 fields->f_r1 = value;
1465 break;
1466 case XC16X_OPERAND_DRB :
1467 fields->f_r1 = value;
1468 break;
1469 case XC16X_OPERAND_DRI :
1470 fields->f_r4 = value;
1471 break;
1472 case XC16X_OPERAND_EXTCOND :
1473 fields->f_extccode = value;
1474 break;
1475 case XC16X_OPERAND_GENREG :
1476 fields->f_regb8 = value;
1477 break;
1478 case XC16X_OPERAND_HASH :
1479 break;
1480 case XC16X_OPERAND_ICOND :
1481 fields->f_icondcode = value;
1482 break;
1483 case XC16X_OPERAND_LBIT2 :
1484 fields->f_op_lbit2 = value;
1485 break;
1486 case XC16X_OPERAND_LBIT4 :
1487 fields->f_op_lbit4 = value;
1488 break;
1489 case XC16X_OPERAND_MASK8 :
1490 fields->f_mask8 = value;
1491 break;
1492 case XC16X_OPERAND_MASKLO8 :
1493 fields->f_datahi8 = value;
1494 break;
1495 case XC16X_OPERAND_MEMGR8 :
1496 fields->f_memgr8 = value;
1497 break;
1498 case XC16X_OPERAND_MEMORY :
1499 fields->f_memory = value;
1500 break;
1501 case XC16X_OPERAND_PAG :
1502 break;
1503 case XC16X_OPERAND_PAGENUM :
1504 fields->f_pagenum = value;
1505 break;
1506 case XC16X_OPERAND_POF :
1507 break;
1508 case XC16X_OPERAND_QBIT :
1509 fields->f_qbit = value;
1510 break;
1511 case XC16X_OPERAND_QHIBIT :
1512 fields->f_qhibit = value;
1513 break;
1514 case XC16X_OPERAND_QLOBIT :
1515 fields->f_qlobit = value;
1516 break;
1517 case XC16X_OPERAND_REG8 :
1518 fields->f_reg8 = value;
1519 break;
1520 case XC16X_OPERAND_REGB8 :
1521 fields->f_regb8 = value;
1522 break;
1523 case XC16X_OPERAND_REGBMEM8 :
1524 fields->f_regmem8 = value;
1525 break;
1526 case XC16X_OPERAND_REGHI8 :
1527 fields->f_reghi8 = value;
1528 break;
1529 case XC16X_OPERAND_REGMEM8 :
1530 fields->f_regmem8 = value;
1531 break;
1532 case XC16X_OPERAND_REGOFF8 :
1533 fields->f_regoff8 = value;
1534 break;
1535 case XC16X_OPERAND_REL :
1536 fields->f_rel8 = value;
1537 break;
1538 case XC16X_OPERAND_RELHI :
1539 fields->f_relhi8 = value;
1540 break;
1541 case XC16X_OPERAND_SEG :
1542 fields->f_seg8 = value;
1543 break;
1544 case XC16X_OPERAND_SEGHI8 :
1545 fields->f_segnum8 = value;
1546 break;
1547 case XC16X_OPERAND_SEGM :
1548 break;
1549 case XC16X_OPERAND_SOF :
1550 break;
1551 case XC16X_OPERAND_SR :
1552 fields->f_r2 = value;
1553 break;
1554 case XC16X_OPERAND_SR2 :
1555 fields->f_r0 = value;
1556 break;
1557 case XC16X_OPERAND_SRB :
1558 fields->f_r2 = value;
1559 break;
1560 case XC16X_OPERAND_SRC1 :
1561 fields->f_r1 = value;
1562 break;
1563 case XC16X_OPERAND_SRC2 :
1564 fields->f_r2 = value;
1565 break;
1566 case XC16X_OPERAND_SRDIV :
1567 fields->f_reg8 = value;
1568 break;
1569 case XC16X_OPERAND_U4 :
1570 fields->f_uimm4 = value;
1571 break;
1572 case XC16X_OPERAND_UIMM16 :
1573 fields->f_uimm16 = value;
1574 break;
1575 case XC16X_OPERAND_UIMM2 :
1576 fields->f_uimm2 = value;
1577 break;
1578 case XC16X_OPERAND_UIMM3 :
1579 fields->f_uimm3 = value;
1580 break;
1581 case XC16X_OPERAND_UIMM4 :
1582 fields->f_uimm4 = value;
1583 break;
1584 case XC16X_OPERAND_UIMM7 :
1585 fields->f_uimm7 = value;
1586 break;
1587 case XC16X_OPERAND_UIMM8 :
1588 fields->f_uimm8 = value;
1589 break;
1590 case XC16X_OPERAND_UPAG16 :
1591 fields->f_uimm16 = value;
1592 break;
1593 case XC16X_OPERAND_UPOF16 :
1594 fields->f_memory = value;
1595 break;
1596 case XC16X_OPERAND_USEG16 :
1597 fields->f_offset16 = value;
1598 break;
1599 case XC16X_OPERAND_USEG8 :
1600 fields->f_seg8 = value;
1601 break;
1602 case XC16X_OPERAND_USOF16 :
1603 fields->f_offset16 = value;
1604 break;
1605
1606 default :
1607 /* xgettext:c-format */
a6743a54
AM		 1608 opcodes_error_handler
1609 (_("internal error: unrecognized field %d while setting int operand"),
1610 opindex);
d70c5fc7
NC		 1611 abort ();
1612 }
1613}
1614
1615void
1616xc16x_cgen_set_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
1617 int opindex,
1618 CGEN_FIELDS * fields,
1619 bfd_vma value)
1620{
1621 switch (opindex)
1622 {
1623 case XC16X_OPERAND_REGNAM :
1624 fields->f_reg8 = value;
1625 break;
1626 case XC16X_OPERAND_BIT01 :
1627 fields->f_op_1bit = value;
1628 break;
1629 case XC16X_OPERAND_BIT1 :
1630 fields->f_op_bit1 = value;
1631 break;
1632 case XC16X_OPERAND_BIT2 :
1633 fields->f_op_bit2 = value;
1634 break;
1635 case XC16X_OPERAND_BIT4 :
1636 fields->f_op_bit4 = value;
1637 break;
1638 case XC16X_OPERAND_BIT8 :
1639 fields->f_op_bit8 = value;
1640 break;
1641 case XC16X_OPERAND_BITONE :
1642 fields->f_op_onebit = value;
1643 break;
1644 case XC16X_OPERAND_CADDR :
1645 fields->f_offset16 = value;
1646 break;
1647 case XC16X_OPERAND_COND :
1648 fields->f_condcode = value;
1649 break;
1650 case XC16X_OPERAND_DATA8 :
1651 fields->f_data8 = value;
1652 break;
1653 case XC16X_OPERAND_DATAHI8 :
1654 fields->f_datahi8 = value;
1655 break;
1656 case XC16X_OPERAND_DOT :
1657 break;
1658 case XC16X_OPERAND_DR :
1659 fields->f_r1 = value;
1660 break;
1661 case XC16X_OPERAND_DRB :
1662 fields->f_r1 = value;
1663 break;
1664 case XC16X_OPERAND_DRI :
1665 fields->f_r4 = value;
1666 break;
1667 case XC16X_OPERAND_EXTCOND :
1668 fields->f_extccode = value;
1669 break;
1670 case XC16X_OPERAND_GENREG :
1671 fields->f_regb8 = value;
1672 break;
1673 case XC16X_OPERAND_HASH :
1674 break;
1675 case XC16X_OPERAND_ICOND :
1676 fields->f_icondcode = value;
1677 break;
1678 case XC16X_OPERAND_LBIT2 :
1679 fields->f_op_lbit2 = value;
1680 break;
1681 case XC16X_OPERAND_LBIT4 :
1682 fields->f_op_lbit4 = value;
1683 break;
1684 case XC16X_OPERAND_MASK8 :
1685 fields->f_mask8 = value;
1686 break;
1687 case XC16X_OPERAND_MASKLO8 :
1688 fields->f_datahi8 = value;
1689 break;
1690 case XC16X_OPERAND_MEMGR8 :
1691 fields->f_memgr8 = value;
1692 break;
1693 case XC16X_OPERAND_MEMORY :
1694 fields->f_memory = value;
1695 break;
1696 case XC16X_OPERAND_PAG :
1697 break;
1698 case XC16X_OPERAND_PAGENUM :
1699 fields->f_pagenum = value;
1700 break;
1701 case XC16X_OPERAND_POF :
1702 break;
1703 case XC16X_OPERAND_QBIT :
1704 fields->f_qbit = value;
1705 break;
1706 case XC16X_OPERAND_QHIBIT :
1707 fields->f_qhibit = value;
1708 break;
1709 case XC16X_OPERAND_QLOBIT :
1710 fields->f_qlobit = value;
1711 break;
1712 case XC16X_OPERAND_REG8 :
1713 fields->f_reg8 = value;
1714 break;
1715 case XC16X_OPERAND_REGB8 :
1716 fields->f_regb8 = value;
1717 break;
1718 case XC16X_OPERAND_REGBMEM8 :
1719 fields->f_regmem8 = value;
1720 break;
1721 case XC16X_OPERAND_REGHI8 :
1722 fields->f_reghi8 = value;
1723 break;
1724 case XC16X_OPERAND_REGMEM8 :
1725 fields->f_regmem8 = value;
1726 break;
1727 case XC16X_OPERAND_REGOFF8 :
1728 fields->f_regoff8 = value;
1729 break;
1730 case XC16X_OPERAND_REL :
1731 fields->f_rel8 = value;
1732 break;
1733 case XC16X_OPERAND_RELHI :
1734 fields->f_relhi8 = value;
1735 break;
1736 case XC16X_OPERAND_SEG :
1737 fields->f_seg8 = value;
1738 break;
1739 case XC16X_OPERAND_SEGHI8 :
1740 fields->f_segnum8 = value;
1741 break;
1742 case XC16X_OPERAND_SEGM :
1743 break;
1744 case XC16X_OPERAND_SOF :
1745 break;
1746 case XC16X_OPERAND_SR :
1747 fields->f_r2 = value;
1748 break;
1749 case XC16X_OPERAND_SR2 :
1750 fields->f_r0 = value;
1751 break;
1752 case XC16X_OPERAND_SRB :
1753 fields->f_r2 = value;
1754 break;
1755 case XC16X_OPERAND_SRC1 :
1756 fields->f_r1 = value;
1757 break;
1758 case XC16X_OPERAND_SRC2 :
1759 fields->f_r2 = value;
1760 break;
1761 case XC16X_OPERAND_SRDIV :
1762 fields->f_reg8 = value;
1763 break;
1764 case XC16X_OPERAND_U4 :
1765 fields->f_uimm4 = value;
1766 break;
1767 case XC16X_OPERAND_UIMM16 :
1768 fields->f_uimm16 = value;
1769 break;
1770 case XC16X_OPERAND_UIMM2 :
1771 fields->f_uimm2 = value;
1772 break;
1773 case XC16X_OPERAND_UIMM3 :
1774 fields->f_uimm3 = value;
1775 break;
1776 case XC16X_OPERAND_UIMM4 :
1777 fields->f_uimm4 = value;
1778 break;
1779 case XC16X_OPERAND_UIMM7 :
1780 fields->f_uimm7 = value;
1781 break;
1782 case XC16X_OPERAND_UIMM8 :
1783 fields->f_uimm8 = value;
1784 break;
1785 case XC16X_OPERAND_UPAG16 :
1786 fields->f_uimm16 = value;
1787 break;
1788 case XC16X_OPERAND_UPOF16 :
1789 fields->f_memory = value;
1790 break;
1791 case XC16X_OPERAND_USEG16 :
1792 fields->f_offset16 = value;
1793 break;
1794 case XC16X_OPERAND_USEG8 :
1795 fields->f_seg8 = value;
1796 break;
1797 case XC16X_OPERAND_USOF16 :
1798 fields->f_offset16 = value;
1799 break;
1800
1801 default :
1802 /* xgettext:c-format */
a6743a54
AM		 1803 opcodes_error_handler
1804 (_("internal error: unrecognized field %d while setting vma operand"),
1805 opindex);
d70c5fc7
NC		 1806 abort ();
1807 }
1808}
1809
1810/* Function to call before using the instruction builder tables. */
1811
1812void
1813xc16x_cgen_init_ibld_table (CGEN_CPU_DESC cd)
1814{
1815 cd->insert_handlers = & xc16x_cgen_insert_handlers[0];
1816 cd->extract_handlers = & xc16x_cgen_extract_handlers[0];
1817
1818 cd->insert_operand = xc16x_cgen_insert_operand;
1819 cd->extract_operand = xc16x_cgen_extract_operand;
1820
1821 cd->get_int_operand = xc16x_cgen_get_int_operand;
1822 cd->set_int_operand = xc16x_cgen_set_int_operand;
1823 cd->get_vma_operand = xc16x_cgen_get_vma_operand;
1824 cd->set_vma_operand = xc16x_cgen_set_vma_operand;
1825}
GDB Binutils - Deliverables
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