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c906108c SS |
1 | /* armdefs.h -- ARMulator common definitions: ARM6 Instruction Emulator. |
2 | Copyright (C) 1994 Advanced RISC Machines Ltd. | |
3 | ||
4 | This program is free software; you can redistribute it and/or modify | |
5 | it under the terms of the GNU General Public License as published by | |
6 | the Free Software Foundation; either version 2 of the License, or | |
7 | (at your option) any later version. | |
8 | ||
9 | This program is distributed in the hope that it will be useful, | |
10 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
11 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
12 | GNU General Public License for more details. | |
13 | ||
14 | You should have received a copy of the GNU General Public License | |
15 | along with this program; if not, write to the Free Software | |
16 | Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ | |
17 | ||
18 | #include <stdio.h> | |
19 | #include <stdlib.h> | |
20 | ||
21 | #define FALSE 0 | |
22 | #define TRUE 1 | |
23 | #define LOW 0 | |
24 | #define HIGH 1 | |
25 | #define LOWHIGH 1 | |
26 | #define HIGHLOW 2 | |
27 | ||
28 | #ifndef __STDC__ | |
29 | typedef char * VoidStar ; | |
30 | #endif | |
31 | ||
32 | typedef unsigned long ARMword ; /* must be 32 bits wide */ | |
c906108c SS |
33 | typedef struct ARMul_State ARMul_State ; |
34 | ||
35 | typedef unsigned ARMul_CPInits(ARMul_State *state) ; | |
36 | typedef unsigned ARMul_CPExits(ARMul_State *state) ; | |
37 | typedef unsigned ARMul_LDCs(ARMul_State *state,unsigned type,ARMword instr,ARMword value) ; | |
38 | typedef unsigned ARMul_STCs(ARMul_State *state,unsigned type,ARMword instr,ARMword *value) ; | |
39 | typedef unsigned ARMul_MRCs(ARMul_State *state,unsigned type,ARMword instr,ARMword *value) ; | |
40 | typedef unsigned ARMul_MCRs(ARMul_State *state,unsigned type,ARMword instr,ARMword value) ; | |
41 | typedef unsigned ARMul_CDPs(ARMul_State *state,unsigned type,ARMword instr) ; | |
42 | typedef unsigned ARMul_CPReads(ARMul_State *state,unsigned reg,ARMword *value) ; | |
43 | typedef unsigned ARMul_CPWrites(ARMul_State *state,unsigned reg,ARMword value) ; | |
44 | ||
45 | struct ARMul_State { | |
46 | ARMword Emulate ; /* to start and stop emulation */ | |
47 | unsigned EndCondition ; /* reason for stopping */ | |
48 | unsigned ErrorCode ; /* type of illegal instruction */ | |
49 | ARMword Reg[16] ; /* the current register file */ | |
50 | ARMword RegBank[7][16] ; /* all the registers */ | |
51 | ARMword Cpsr ; /* the current psr */ | |
52 | ARMword Spsr[7] ; /* the exception psr's */ | |
53 | ARMword NFlag, ZFlag, CFlag, VFlag, IFFlags ; /* dummy flags for speed */ | |
54 | #ifdef MODET | |
55 | ARMword TFlag ; /* Thumb state */ | |
56 | #endif | |
57 | ARMword Bank ; /* the current register bank */ | |
58 | ARMword Mode ; /* the current mode */ | |
59 | ARMword instr, pc, temp ; /* saved register state */ | |
60 | ARMword loaded, decoded ; /* saved pipeline state */ | |
61 | unsigned long NumScycles, | |
62 | NumNcycles, | |
63 | NumIcycles, | |
64 | NumCcycles, | |
65 | NumFcycles ; /* emulated cycles used */ | |
66 | unsigned long NumInstrs ; /* the number of instructions executed */ | |
67 | unsigned NextInstr ; | |
68 | unsigned VectorCatch ; /* caught exception mask */ | |
69 | unsigned CallDebug ; /* set to call the debugger */ | |
70 | unsigned CanWatch ; /* set by memory interface if its willing to suffer the | |
71 | overhead of checking for watchpoints on each memory | |
72 | access */ | |
73 | unsigned MemReadDebug, MemWriteDebug ; | |
74 | unsigned long StopHandle ; | |
75 | ||
76 | unsigned char *MemDataPtr ; /* admin data */ | |
77 | unsigned char *MemInPtr ; /* the Data In bus */ | |
78 | unsigned char *MemOutPtr ; /* the Data Out bus (which you may not need */ | |
79 | unsigned char *MemSparePtr ; /* extra space */ | |
80 | ARMword MemSize ; | |
81 | ||
82 | unsigned char *OSptr ; /* OS Handle */ | |
83 | char *CommandLine ; /* Command Line from ARMsd */ | |
84 | ||
85 | ARMul_CPInits *CPInit[16] ; /* coprocessor initialisers */ | |
86 | ARMul_CPExits *CPExit[16] ; /* coprocessor finalisers */ | |
87 | ARMul_LDCs *LDC[16] ; /* LDC instruction */ | |
88 | ARMul_STCs *STC[16] ; /* STC instruction */ | |
89 | ARMul_MRCs *MRC[16] ; /* MRC instruction */ | |
90 | ARMul_MCRs *MCR[16] ; /* MCR instruction */ | |
91 | ARMul_CDPs *CDP[16] ; /* CDP instruction */ | |
92 | ARMul_CPReads *CPRead[16] ; /* Read CP register */ | |
93 | ARMul_CPWrites *CPWrite[16] ; /* Write CP register */ | |
94 | unsigned char *CPData[16] ; /* Coprocessor data */ | |
95 | unsigned char const *CPRegWords[16] ; /* map of coprocessor register sizes */ | |
96 | ||
97 | unsigned EventSet ; /* the number of events in the queue */ | |
98 | unsigned long Now ; /* time to the nearest cycle */ | |
99 | struct EventNode **EventPtr ; /* the event list */ | |
100 | ||
101 | unsigned Exception ; /* enable the next four values */ | |
102 | unsigned Debug ; /* show instructions as they are executed */ | |
103 | unsigned NresetSig ; /* reset the processor */ | |
104 | unsigned NfiqSig ; | |
105 | unsigned NirqSig ; | |
106 | ||
107 | unsigned abortSig ; | |
108 | unsigned NtransSig ; | |
109 | unsigned bigendSig ; | |
110 | unsigned prog32Sig ; | |
111 | unsigned data32Sig ; | |
112 | unsigned lateabtSig ; | |
113 | ARMword Vector ; /* synthesize aborts in cycle modes */ | |
114 | ARMword Aborted ; /* sticky flag for aborts */ | |
115 | ARMword Reseted ; /* sticky flag for Reset */ | |
116 | ARMword Inted, LastInted ; /* sticky flags for interrupts */ | |
117 | ARMword Base ; /* extra hand for base writeback */ | |
118 | ARMword AbortAddr ; /* to keep track of Prefetch aborts */ | |
119 | ||
120 | const struct Dbg_HostosInterface *hostif; | |
121 | ||
122 | int verbose; /* non-zero means print various messages like the banner */ | |
123 | } ; | |
124 | ||
125 | #define ResetPin NresetSig | |
126 | #define FIQPin NfiqSig | |
127 | #define IRQPin NirqSig | |
128 | #define AbortPin abortSig | |
129 | #define TransPin NtransSig | |
130 | #define BigEndPin bigendSig | |
131 | #define Prog32Pin prog32Sig | |
132 | #define Data32Pin data32Sig | |
133 | #define LateAbortPin lateabtSig | |
134 | ||
135 | /***************************************************************************\ | |
136 | * Types of ARM we know about * | |
137 | \***************************************************************************/ | |
138 | ||
139 | /* The bitflags */ | |
140 | #define ARM_Fix26_Prop 0x01 | |
141 | #define ARM_Nexec_Prop 0x02 | |
142 | #define ARM_Debug_Prop 0x10 | |
143 | #define ARM_Isync_Prop ARM_Debug_Prop | |
144 | #define ARM_Lock_Prop 0x20 | |
145 | ||
146 | /* ARM2 family */ | |
147 | #define ARM2 (ARM_Fix26_Prop) | |
148 | #define ARM2as ARM2 | |
149 | #define ARM61 ARM2 | |
150 | #define ARM3 ARM2 | |
151 | ||
152 | #ifdef ARM60 /* previous definition in armopts.h */ | |
153 | #undef ARM60 | |
154 | #endif | |
155 | ||
156 | /* ARM6 family */ | |
157 | #define ARM6 (ARM_Lock_Prop) | |
158 | #define ARM60 ARM6 | |
159 | #define ARM600 ARM6 | |
160 | #define ARM610 ARM6 | |
161 | #define ARM620 ARM6 | |
162 | ||
163 | ||
164 | /***************************************************************************\ | |
165 | * Macros to extract instruction fields * | |
166 | \***************************************************************************/ | |
167 | ||
168 | #define BIT(n) ( (ARMword)(instr>>(n))&1) /* bit n of instruction */ | |
169 | #define BITS(m,n) ( (ARMword)(instr<<(31-(n))) >> ((31-(n))+(m)) ) /* bits m to n of instr */ | |
170 | #define TOPBITS(n) (instr >> (n)) /* bits 31 to n of instr */ | |
171 | ||
172 | /***************************************************************************\ | |
173 | * The hardware vector addresses * | |
174 | \***************************************************************************/ | |
175 | ||
176 | #define ARMResetV 0L | |
177 | #define ARMUndefinedInstrV 4L | |
178 | #define ARMSWIV 8L | |
179 | #define ARMPrefetchAbortV 12L | |
180 | #define ARMDataAbortV 16L | |
181 | #define ARMAddrExceptnV 20L | |
182 | #define ARMIRQV 24L | |
183 | #define ARMFIQV 28L | |
184 | #define ARMErrorV 32L /* This is an offset, not an address ! */ | |
185 | ||
186 | #define ARMul_ResetV ARMResetV | |
187 | #define ARMul_UndefinedInstrV ARMUndefinedInstrV | |
188 | #define ARMul_SWIV ARMSWIV | |
189 | #define ARMul_PrefetchAbortV ARMPrefetchAbortV | |
190 | #define ARMul_DataAbortV ARMDataAbortV | |
191 | #define ARMul_AddrExceptnV ARMAddrExceptnV | |
192 | #define ARMul_IRQV ARMIRQV | |
193 | #define ARMul_FIQV ARMFIQV | |
194 | ||
195 | /***************************************************************************\ | |
196 | * Mode and Bank Constants * | |
197 | \***************************************************************************/ | |
198 | ||
199 | #define USER26MODE 0L | |
200 | #define FIQ26MODE 1L | |
201 | #define IRQ26MODE 2L | |
202 | #define SVC26MODE 3L | |
203 | #define USER32MODE 16L | |
204 | #define FIQ32MODE 17L | |
205 | #define IRQ32MODE 18L | |
206 | #define SVC32MODE 19L | |
207 | #define ABORT32MODE 23L | |
208 | #define UNDEF32MODE 27L | |
209 | ||
210 | #define ARM32BITMODE (state->Mode > 3) | |
211 | #define ARM26BITMODE (state->Mode <= 3) | |
212 | #define ARMMODE (state->Mode) | |
213 | #define ARMul_MODEBITS 0x1fL | |
214 | #define ARMul_MODE32BIT ARM32BITMODE | |
215 | #define ARMul_MODE26BIT ARM26BITMODE | |
216 | ||
217 | #define USERBANK 0 | |
218 | #define FIQBANK 1 | |
219 | #define IRQBANK 2 | |
220 | #define SVCBANK 3 | |
221 | #define ABORTBANK 4 | |
222 | #define UNDEFBANK 5 | |
223 | #define DUMMYBANK 6 | |
224 | ||
225 | /***************************************************************************\ | |
226 | * Definitons of things in the emulator * | |
227 | \***************************************************************************/ | |
228 | ||
229 | extern void ARMul_EmulateInit(void) ; | |
230 | extern ARMul_State *ARMul_NewState(void) ; | |
231 | extern void ARMul_Reset(ARMul_State *state) ; | |
232 | extern ARMword ARMul_DoProg(ARMul_State *state) ; | |
233 | extern ARMword ARMul_DoInstr(ARMul_State *state) ; | |
234 | ||
235 | /***************************************************************************\ | |
236 | * Definitons of things for event handling * | |
237 | \***************************************************************************/ | |
238 | ||
239 | extern void ARMul_ScheduleEvent(ARMul_State *state, unsigned long delay, unsigned (*func)() ) ; | |
240 | extern void ARMul_EnvokeEvent(ARMul_State *state) ; | |
241 | extern unsigned long ARMul_Time(ARMul_State *state) ; | |
242 | ||
243 | /***************************************************************************\ | |
244 | * Useful support routines * | |
245 | \***************************************************************************/ | |
246 | ||
247 | extern ARMword ARMul_GetReg(ARMul_State *state, unsigned mode, unsigned reg) ; | |
248 | extern void ARMul_SetReg(ARMul_State *state, unsigned mode, unsigned reg, ARMword value) ; | |
249 | extern ARMword ARMul_GetPC(ARMul_State *state) ; | |
250 | extern ARMword ARMul_GetNextPC(ARMul_State *state) ; | |
251 | extern void ARMul_SetPC(ARMul_State *state, ARMword value) ; | |
252 | extern ARMword ARMul_GetR15(ARMul_State *state) ; | |
253 | extern void ARMul_SetR15(ARMul_State *state, ARMword value) ; | |
254 | ||
255 | extern ARMword ARMul_GetCPSR(ARMul_State *state) ; | |
256 | extern void ARMul_SetCPSR(ARMul_State *state, ARMword value) ; | |
257 | extern ARMword ARMul_GetSPSR(ARMul_State *state, ARMword mode) ; | |
258 | extern void ARMul_SetSPSR(ARMul_State *state, ARMword mode, ARMword value) ; | |
259 | ||
260 | /***************************************************************************\ | |
261 | * Definitons of things to handle aborts * | |
262 | \***************************************************************************/ | |
263 | ||
264 | extern void ARMul_Abort(ARMul_State *state, ARMword address) ; | |
265 | #define ARMul_ABORTWORD 0xefffffff /* SWI -1 */ | |
266 | #define ARMul_PREFETCHABORT(address) if (state->AbortAddr == 1) \ | |
267 | state->AbortAddr = (address & ~3L) | |
268 | #define ARMul_DATAABORT(address) state->abortSig = HIGH ; \ | |
269 | state->Aborted = ARMul_DataAbortV ; | |
270 | #define ARMul_CLEARABORT state->abortSig = LOW | |
271 | ||
272 | /***************************************************************************\ | |
273 | * Definitons of things in the memory interface * | |
274 | \***************************************************************************/ | |
275 | ||
276 | extern unsigned ARMul_MemoryInit(ARMul_State *state,unsigned long initmemsize) ; | |
277 | extern void ARMul_MemoryExit(ARMul_State *state) ; | |
278 | ||
279 | extern ARMword ARMul_LoadInstrS(ARMul_State *state,ARMword address,ARMword isize) ; | |
280 | extern ARMword ARMul_LoadInstrN(ARMul_State *state,ARMword address,ARMword isize) ; | |
281 | extern ARMword ARMul_ReLoadInstr(ARMul_State *state,ARMword address,ARMword isize) ; | |
282 | ||
283 | extern ARMword ARMul_LoadWordS(ARMul_State *state,ARMword address) ; | |
284 | extern ARMword ARMul_LoadWordN(ARMul_State *state,ARMword address) ; | |
285 | extern ARMword ARMul_LoadHalfWord(ARMul_State *state,ARMword address) ; | |
286 | extern ARMword ARMul_LoadByte(ARMul_State *state,ARMword address) ; | |
287 | ||
288 | extern void ARMul_StoreWordS(ARMul_State *state,ARMword address, ARMword data) ; | |
289 | extern void ARMul_StoreWordN(ARMul_State *state,ARMword address, ARMword data) ; | |
290 | extern void ARMul_StoreHalfWord(ARMul_State *state,ARMword address, ARMword data) ; | |
291 | extern void ARMul_StoreByte(ARMul_State *state,ARMword address, ARMword data) ; | |
292 | ||
293 | extern ARMword ARMul_SwapWord(ARMul_State *state,ARMword address, ARMword data) ; | |
294 | extern ARMword ARMul_SwapByte(ARMul_State *state,ARMword address, ARMword data) ; | |
295 | ||
296 | extern void ARMul_Icycles(ARMul_State *state,unsigned number, ARMword address) ; | |
297 | extern void ARMul_Ccycles(ARMul_State *state,unsigned number, ARMword address) ; | |
298 | ||
299 | extern ARMword ARMul_ReadWord(ARMul_State *state,ARMword address) ; | |
300 | extern ARMword ARMul_ReadByte(ARMul_State *state,ARMword address) ; | |
301 | extern void ARMul_WriteWord(ARMul_State *state,ARMword address, ARMword data) ; | |
302 | extern void ARMul_WriteByte(ARMul_State *state,ARMword address, ARMword data) ; | |
303 | ||
304 | extern ARMword ARMul_MemAccess(ARMul_State *state,ARMword,ARMword,ARMword, | |
305 | ARMword,ARMword,ARMword,ARMword,ARMword,ARMword,ARMword) ; | |
306 | ||
307 | /***************************************************************************\ | |
308 | * Definitons of things in the co-processor interface * | |
309 | \***************************************************************************/ | |
310 | ||
311 | #define ARMul_FIRST 0 | |
312 | #define ARMul_TRANSFER 1 | |
313 | #define ARMul_BUSY 2 | |
314 | #define ARMul_DATA 3 | |
315 | #define ARMul_INTERRUPT 4 | |
316 | #define ARMul_DONE 0 | |
317 | #define ARMul_CANT 1 | |
318 | #define ARMul_INC 3 | |
319 | ||
320 | extern unsigned ARMul_CoProInit(ARMul_State *state) ; | |
321 | extern void ARMul_CoProExit(ARMul_State *state) ; | |
322 | extern void ARMul_CoProAttach(ARMul_State *state, unsigned number, | |
323 | ARMul_CPInits *init, ARMul_CPExits *exit, | |
324 | ARMul_LDCs *ldc, ARMul_STCs *stc, | |
325 | ARMul_MRCs *mrc, ARMul_MCRs *mcr, | |
326 | ARMul_CDPs *cdp, | |
327 | ARMul_CPReads *read, ARMul_CPWrites *write) ; | |
328 | extern void ARMul_CoProDetach(ARMul_State *state, unsigned number) ; | |
329 | ||
330 | /***************************************************************************\ | |
331 | * Definitons of things in the host environment * | |
332 | \***************************************************************************/ | |
333 | ||
334 | extern unsigned ARMul_OSInit(ARMul_State *state) ; | |
335 | extern void ARMul_OSExit(ARMul_State *state) ; | |
336 | extern unsigned ARMul_OSHandleSWI(ARMul_State *state,ARMword number) ; | |
337 | extern ARMword ARMul_OSLastErrorP(ARMul_State *state) ; | |
338 | ||
339 | extern ARMword ARMul_Debug(ARMul_State *state, ARMword pc, ARMword instr) ; | |
340 | extern unsigned ARMul_OSException(ARMul_State *state, ARMword vector, ARMword pc) ; | |
341 | extern int rdi_log ; | |
342 | ||
343 | /***************************************************************************\ | |
344 | * Host-dependent stuff * | |
345 | \***************************************************************************/ | |
346 | ||
347 | #ifdef macintosh | |
348 | pascal void SpinCursor(short increment); /* copied from CursorCtl.h */ | |
349 | # define HOURGLASS SpinCursor( 1 ) | |
350 | # define HOURGLASS_RATE 1023 /* 2^n - 1 */ | |
351 | #endif | |
352 |