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[deliverable/binutils-gdb.git] / sim / arm / armos.c
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c906108c
SS
1/* armos.c -- ARMulator OS interface: ARM6 Instruction Emulator.
2 Copyright (C) 1994 Advanced RISC Machines Ltd.
3
4 This program is free software; you can redistribute it and/or modify
5 it under the terms of the GNU General Public License as published by
6 the Free Software Foundation; either version 2 of the License, or
7 (at your option) any later version.
8
9 This program is distributed in the hope that it will be useful,
10 but WITHOUT ANY WARRANTY; without even the implied warranty of
11 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 GNU General Public License for more details.
13
14 You should have received a copy of the GNU General Public License
15 along with this program; if not, write to the Free Software
16 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
17
18/* This file contains a model of Demon, ARM Ltd's Debug Monitor,
19including all the SWI's required to support the C library. The code in
20it is not really for the faint-hearted (especially the abort handling
21code), but it is a complete example. Defining NOOS will disable all the
22fun, and definign VAILDATE will define SWI 1 to enter SVC mode, and SWI
230x11 to halt the emulator. */
24
25#include "config.h"
6d358e86 26#include "ansidecl.h"
c906108c
SS
27
28#include <time.h>
29#include <errno.h>
30#include <string.h>
31#include <fcntl.h>
32
33#ifndef O_RDONLY
34#define O_RDONLY 0
35#endif
36#ifndef O_WRONLY
37#define O_WRONLY 1
38#endif
39#ifndef O_RDWR
40#define O_RDWR 2
41#endif
42#ifndef O_BINARY
43#define O_BINARY 0
44#endif
45
46#ifdef __STDC__
47#define unlink(s) remove(s)
48#endif
49
50#ifdef HAVE_UNISTD_H
dfcd3bfb 51#include <unistd.h> /* For SEEK_SET etc */
c906108c
SS
52#endif
53
54#ifdef __riscos
dfcd3bfb 55extern int _fisatty (FILE *);
c906108c
SS
56#define isatty_(f) _fisatty(f)
57#else
58#ifdef __ZTC__
59#include <io.h>
60#define isatty_(f) isatty((f)->_file)
61#else
62#ifdef macintosh
63#include <ioctl.h>
64#define isatty_(f) (~ioctl ((f)->_file, FIOINTERACTIVE, NULL))
65#else
66#define isatty_(f) isatty (fileno (f))
67#endif
68#endif
69#endif
70
71#include "armdefs.h"
72#include "armos.h"
73#ifndef NOOS
74#ifndef VALIDATE
75/* #ifndef ASIM */
76#include "armfpe.h"
77/* #endif */
78#endif
79#endif
80
81/* For RDIError_BreakpointReached. */
82#include "dbg_rdi.h"
83
dfcd3bfb
JM
84extern unsigned ARMul_OSInit (ARMul_State * state);
85extern void ARMul_OSExit (ARMul_State * state);
86extern unsigned ARMul_OSHandleSWI (ARMul_State * state, ARMword number);
87extern unsigned ARMul_OSException (ARMul_State * state, ARMword vector,
88 ARMword pc);
89extern ARMword ARMul_OSLastErrorP (ARMul_State * state);
90extern ARMword ARMul_Debug (ARMul_State * state, ARMword pc, ARMword instr);
c906108c
SS
91
92#define BUFFERSIZE 4096
93#ifndef FOPEN_MAX
94#define FOPEN_MAX 64
95#endif
96#define UNIQUETEMPS 256
97
c906108c
SS
98/***************************************************************************\
99* OS private Information *
100\***************************************************************************/
101
dfcd3bfb
JM
102struct OSblock
103{
104 ARMword Time0;
105 ARMword ErrorP;
106 ARMword ErrorNo;
107 FILE *FileTable[FOPEN_MAX];
108 char FileFlags[FOPEN_MAX];
109 char *tempnames[UNIQUETEMPS];
110};
c906108c
SS
111
112#define NOOP 0
113#define BINARY 1
114#define READOP 2
115#define WRITEOP 4
116
117#ifdef macintosh
118#define FIXCRLF(t,c) ((t & BINARY) ? \
119 c : \
120 ((c == '\n' || c == '\r' ) ? (c ^ 7) : c) \
121 )
dfcd3bfb
JM
122#else
123#define FIXCRLF(t,c) c
c906108c
SS
124#endif
125
6d358e86
NC
126static ARMword softvectorcode[] =
127{ /* basic: swi tidyexception + event; mov pc, lr;
128 ldmia r11,{r11,pc}; swi generateexception + event. */
dfcd3bfb
JM
129 0xef000090, 0xe1a0e00f, 0xe89b8800, 0xef000080, /*Reset */
130 0xef000091, 0xe1a0e00f, 0xe89b8800, 0xef000081, /*Undef */
131 0xef000092, 0xe1a0e00f, 0xe89b8800, 0xef000082, /*SWI */
132 0xef000093, 0xe1a0e00f, 0xe89b8800, 0xef000083, /*Prefetch abort */
133 0xef000094, 0xe1a0e00f, 0xe89b8800, 0xef000084, /*Data abort */
134 0xef000095, 0xe1a0e00f, 0xe89b8800, 0xef000085, /*Address exception */
c906108c 135 0xef000096, 0xe1a0e00f, 0xe89b8800, 0xef000086, /*IRQ*/
6d358e86
NC
136 0xef000097, 0xe1a0e00f, 0xe89b8800, 0xef000087, /*FIQ*/
137 0xef000098, 0xe1a0e00f, 0xe89b8800, 0xef000088, /*Error */
dfcd3bfb 138 0xe1a0f00e /* default handler */
c906108c
SS
139};
140
141/***************************************************************************\
142* Time for the Operating System to initialise itself. *
143\***************************************************************************/
144
dfcd3bfb
JM
145unsigned
146ARMul_OSInit (ARMul_State * state)
c906108c
SS
147{
148#ifndef NOOS
149#ifndef VALIDATE
dfcd3bfb
JM
150 ARMword instr, i, j;
151 struct OSblock *OSptr = (struct OSblock *) state->OSptr;
152
153 if (state->OSptr == NULL)
154 {
155 state->OSptr = (unsigned char *) malloc (sizeof (struct OSblock));
156 if (state->OSptr == NULL)
157 {
158 perror ("OS Memory");
159 exit (15);
160 }
c906108c 161 }
dfcd3bfb
JM
162 OSptr = (struct OSblock *) state->OSptr;
163 OSptr->ErrorP = 0;
164 state->Reg[13] = ADDRSUPERSTACK; /* set up a stack for the current mode */
165 ARMul_SetReg (state, SVC32MODE, 13, ADDRSUPERSTACK); /* and for supervisor mode */
166 ARMul_SetReg (state, ABORT32MODE, 13, ADDRSUPERSTACK); /* and for abort 32 mode */
167 ARMul_SetReg (state, UNDEF32MODE, 13, ADDRSUPERSTACK); /* and for undef 32 mode */
c1a72ffd 168 ARMul_SetReg (state, SYSTEMMODE, 13, ADDRSUPERSTACK); /* and for system mode */
dfcd3bfb
JM
169 instr = 0xe59ff000 | (ADDRSOFTVECTORS - 8); /* load pc from soft vector */
170 for (i = ARMul_ResetV; i <= ARMFIQV; i += 4)
171 ARMul_WriteWord (state, i, instr); /* write hardware vectors */
172 for (i = ARMul_ResetV; i <= ARMFIQV + 4; i += 4)
173 {
174 ARMul_WriteWord (state, ADDRSOFTVECTORS + i, SOFTVECTORCODE + i * 4);
175 ARMul_WriteWord (state, ADDRSOFHANDLERS + 2 * i + 4L,
176 SOFTVECTORCODE + sizeof (softvectorcode) - 4L);
c906108c 177 }
dfcd3bfb
JM
178 for (i = 0; i < sizeof (softvectorcode); i += 4)
179 ARMul_WriteWord (state, SOFTVECTORCODE + i, softvectorcode[i / 4]);
180 for (i = 0; i < FOPEN_MAX; i++)
181 OSptr->FileTable[i] = NULL;
182 for (i = 0; i < UNIQUETEMPS; i++)
183 OSptr->tempnames[i] = NULL;
184 ARMul_ConsolePrint (state, ", Demon 1.01");
c906108c
SS
185
186/* #ifndef ASIM */
187
dfcd3bfb
JM
188 /* install fpe */
189 for (i = 0; i < fpesize; i += 4) /* copy the code */
190 ARMul_WriteWord (state, FPESTART + i, fpecode[i >> 2]);
191 for (i = FPESTART + fpesize;; i -= 4)
192 { /* reverse the error strings */
193 if ((j = ARMul_ReadWord (state, i)) == 0xffffffff)
194 break;
195 if (state->bigendSig && j < 0x80000000)
196 { /* it's part of the string so swap it */
197 j = ((j >> 0x18) & 0x000000ff) |
198 ((j >> 0x08) & 0x0000ff00) |
199 ((j << 0x08) & 0x00ff0000) | ((j << 0x18) & 0xff000000);
200 ARMul_WriteWord (state, i, j);
201 }
c906108c 202 }
dfcd3bfb
JM
203 ARMul_WriteWord (state, FPEOLDVECT, ARMul_ReadWord (state, 4)); /* copy old illegal instr vector */
204 ARMul_WriteWord (state, 4, FPENEWVECT (ARMul_ReadWord (state, i - 4))); /* install new vector */
205 ARMul_ConsolePrint (state, ", FPE");
c906108c 206
6d358e86 207/* #endif ASIM */
c906108c
SS
208#endif /* VALIDATE */
209#endif /* NOOS */
210
dfcd3bfb 211 return (TRUE);
c906108c
SS
212}
213
dfcd3bfb
JM
214void
215ARMul_OSExit (ARMul_State * state)
c906108c 216{
dfcd3bfb 217 free ((char *) state->OSptr);
c906108c
SS
218}
219
220
221/***************************************************************************\
222* Return the last Operating System Error. *
223\***************************************************************************/
224
dfcd3bfb 225ARMword ARMul_OSLastErrorP (ARMul_State * state)
c906108c 226{
dfcd3bfb 227 return ((struct OSblock *) state->OSptr)->ErrorP;
c906108c
SS
228}
229
dfcd3bfb
JM
230static int translate_open_mode[] = {
231 O_RDONLY, /* "r" */
232 O_RDONLY + O_BINARY, /* "rb" */
233 O_RDWR, /* "r+" */
234 O_RDWR + O_BINARY, /* "r+b" */
235 O_WRONLY + O_CREAT + O_TRUNC, /* "w" */
236 O_WRONLY + O_BINARY + O_CREAT + O_TRUNC, /* "wb" */
237 O_RDWR + O_CREAT + O_TRUNC, /* "w+" */
238 O_RDWR + O_BINARY + O_CREAT + O_TRUNC, /* "w+b" */
239 O_WRONLY + O_APPEND + O_CREAT, /* "a" */
240 O_WRONLY + O_BINARY + O_APPEND + O_CREAT, /* "ab" */
241 O_RDWR + O_APPEND + O_CREAT, /* "a+" */
242 O_RDWR + O_BINARY + O_APPEND + O_CREAT /* "a+b" */
c906108c
SS
243};
244
dfcd3bfb
JM
245static void
246SWIWrite0 (ARMul_State * state, ARMword addr)
c906108c
SS
247{
248 ARMword temp;
dfcd3bfb 249 struct OSblock *OSptr = (struct OSblock *) state->OSptr;
c906108c
SS
250
251 while ((temp = ARMul_ReadByte (state, addr++)) != 0)
2acceee2 252 (void) fputc ((char) temp, stdout);
c906108c
SS
253
254 OSptr->ErrorNo = errno;
255}
256
dfcd3bfb
JM
257static void
258WriteCommandLineTo (ARMul_State * state, ARMword addr)
c906108c
SS
259{
260 ARMword temp;
261 char *cptr = state->CommandLine;
262 if (cptr == NULL)
263 cptr = "\0";
dfcd3bfb
JM
264 do
265 {
266 temp = (ARMword) * cptr++;
267 ARMul_WriteByte (state, addr++, temp);
268 }
269 while (temp != 0);
c906108c
SS
270}
271
dfcd3bfb
JM
272static void
273SWIopen (ARMul_State * state, ARMword name, ARMword SWIflags)
c906108c 274{
dfcd3bfb 275 struct OSblock *OSptr = (struct OSblock *) state->OSptr;
c906108c
SS
276 char dummy[2000];
277 int flags;
278 int i;
279
6d358e86 280 for (i = 0; (dummy[i] = ARMul_ReadByte (state, name + i)); i++)
c906108c
SS
281 ;
282
283 /* Now we need to decode the Demon open mode */
284 flags = translate_open_mode[SWIflags];
285
286 /* Filename ":tt" is special: it denotes stdin/out */
287 if (strcmp (dummy, ":tt") == 0)
288 {
dfcd3bfb
JM
289 if (flags == O_RDONLY) /* opening tty "r" */
290 state->Reg[0] = 0; /* stdin */
291 else
292 state->Reg[0] = 1; /* stdout */
c906108c
SS
293 }
294 else
295 {
2df3850c 296 state->Reg[0] = (int) open (dummy, flags, 0666);
c906108c
SS
297 OSptr->ErrorNo = errno;
298 }
299}
300
dfcd3bfb
JM
301static void
302SWIread (ARMul_State * state, ARMword f, ARMword ptr, ARMword len)
c906108c 303{
dfcd3bfb 304 struct OSblock *OSptr = (struct OSblock *) state->OSptr;
c906108c
SS
305 int res;
306 int i;
307 char *local = malloc (len);
308
c2d11a7d
JM
309 if (local == NULL)
310 {
6d358e86 311 fprintf (stderr, "sim: Unable to read 0x%ulx bytes - out of memory\n",
dfcd3bfb 312 len);
c2d11a7d
JM
313 return;
314 }
dfcd3bfb 315
c906108c
SS
316 res = read (f, local, len);
317 if (res > 0)
dfcd3bfb 318 for (i = 0; i < res; i++)
c906108c
SS
319 ARMul_WriteByte (state, ptr + i, local[i]);
320 free (local);
321 state->Reg[0] = res == -1 ? -1 : len - res;
322 OSptr->ErrorNo = errno;
323}
324
dfcd3bfb
JM
325static void
326SWIwrite (ARMul_State * state, ARMword f, ARMword ptr, ARMword len)
c906108c 327{
dfcd3bfb 328 struct OSblock *OSptr = (struct OSblock *) state->OSptr;
c906108c 329 int res;
6d358e86 330 ARMword i;
c906108c
SS
331 char *local = malloc (len);
332
c2d11a7d 333 if (local == NULL)
c906108c 334 {
6d358e86
NC
335 fprintf (stderr, "sim: Unable to write 0x%lx bytes - out of memory\n",
336 (long) len);
c2d11a7d 337 return;
c906108c 338 }
dfcd3bfb
JM
339
340 for (i = 0; i < len; i++)
c2d11a7d
JM
341 local[i] = ARMul_ReadByte (state, ptr + i);
342
c906108c
SS
343 res = write (f, local, len);
344 state->Reg[0] = res == -1 ? -1 : len - res;
345 free (local);
346 OSptr->ErrorNo = errno;
347}
348
dfcd3bfb
JM
349static void
350SWIflen (ARMul_State * state, ARMword fh)
c906108c 351{
dfcd3bfb 352 struct OSblock *OSptr = (struct OSblock *) state->OSptr;
c906108c
SS
353 ARMword addr;
354
355 if (fh == 0 || fh > FOPEN_MAX)
356 {
357 OSptr->ErrorNo = EBADF;
358 state->Reg[0] = -1L;
359 return;
360 }
361
362 addr = lseek (fh, 0, SEEK_CUR);
6d358e86
NC
363
364 state->Reg[0] = lseek (fh, 0L, SEEK_END);
365 (void) lseek (fh, addr, SEEK_SET);
c906108c
SS
366
367 OSptr->ErrorNo = errno;
368}
369
370/***************************************************************************\
371* The emulator calls this routine when a SWI instruction is encuntered. The *
372* parameter passed is the SWI number (lower 24 bits of the instruction). *
373\***************************************************************************/
374
dfcd3bfb
JM
375unsigned
376ARMul_OSHandleSWI (ARMul_State * state, ARMword number)
c906108c 377{
6d358e86 378 ARMword addr, temp;
dfcd3bfb 379 struct OSblock *OSptr = (struct OSblock *) state->OSptr;
c906108c
SS
380
381 switch (number)
382 {
383 case SWI_Read:
dfcd3bfb
JM
384 SWIread (state, state->Reg[0], state->Reg[1], state->Reg[2]);
385 return TRUE;
c906108c
SS
386
387 case SWI_Write:
dfcd3bfb
JM
388 SWIwrite (state, state->Reg[0], state->Reg[1], state->Reg[2]);
389 return TRUE;
c906108c
SS
390
391 case SWI_Open:
dfcd3bfb
JM
392 SWIopen (state, state->Reg[0], state->Reg[1]);
393 return TRUE;
c906108c 394
dfcd3bfb
JM
395 case SWI_Clock:
396 /* return number of centi-seconds... */
397 state->Reg[0] =
c906108c 398#ifdef CLOCKS_PER_SEC
dfcd3bfb
JM
399 (CLOCKS_PER_SEC >= 100)
400 ? (ARMword) (clock () / (CLOCKS_PER_SEC / 100))
401 : (ARMword) ((clock () * 100) / CLOCKS_PER_SEC);
c906108c 402#else
dfcd3bfb
JM
403 /* presume unix... clock() returns microseconds */
404 (ARMword) (clock () / 10000);
c906108c 405#endif
dfcd3bfb
JM
406 OSptr->ErrorNo = errno;
407 return (TRUE);
408
409 case SWI_Time:
410 state->Reg[0] = (ARMword) time (NULL);
411 OSptr->ErrorNo = errno;
412 return (TRUE);
413
c906108c
SS
414 case SWI_Close:
415 state->Reg[0] = close (state->Reg[0]);
416 OSptr->ErrorNo = errno;
417 return TRUE;
418
dfcd3bfb 419 case SWI_Flen:
c906108c 420 SWIflen (state, state->Reg[0]);
dfcd3bfb 421 return (TRUE);
c906108c
SS
422
423 case SWI_Exit:
dfcd3bfb 424 state->Emulate = FALSE;
c906108c
SS
425 return TRUE;
426
427 case SWI_Seek:
428 {
429 /* We must return non-zero for failure */
dfcd3bfb 430 state->Reg[0] = -1 >= lseek (state->Reg[0], state->Reg[1], SEEK_SET);
c906108c
SS
431 OSptr->ErrorNo = errno;
432 return TRUE;
433 }
434
dfcd3bfb
JM
435 case SWI_WriteC:
436 (void) fputc ((int) state->Reg[0], stdout);
437 OSptr->ErrorNo = errno;
438 return (TRUE);
c906108c 439
dfcd3bfb 440 case SWI_Write0:
c906108c 441 SWIWrite0 (state, state->Reg[0]);
dfcd3bfb 442 return (TRUE);
c906108c 443
dfcd3bfb
JM
444 case SWI_GetErrno:
445 state->Reg[0] = OSptr->ErrorNo;
446 return (TRUE);
c906108c 447
dfcd3bfb
JM
448 case SWI_Breakpoint:
449 state->EndCondition = RDIError_BreakpointReached;
450 state->Emulate = FALSE;
451 return (TRUE);
c906108c 452
dfcd3bfb
JM
453 case SWI_GetEnv:
454 state->Reg[0] = ADDRCMDLINE;
455 if (state->MemSize)
456 state->Reg[1] = state->MemSize;
457 else
458 state->Reg[1] = ADDRUSERSTACK;
c906108c 459
dfcd3bfb
JM
460 WriteCommandLineTo (state, state->Reg[0]);
461 return (TRUE);
c906108c 462
dfcd3bfb 463 /* Handle Angel SWIs as well as Demon ones */
c906108c
SS
464 case AngelSWI_ARM:
465 case AngelSWI_Thumb:
466 /* R1 is almost always a parameter block */
467 addr = state->Reg[1];
468 /* R0 is a reason code */
469 switch (state->Reg[0])
470 {
471 /* Unimplemented reason codes */
472 case AngelSWI_Reason_ReadC:
473 case AngelSWI_Reason_IsTTY:
474 case AngelSWI_Reason_TmpNam:
475 case AngelSWI_Reason_Remove:
476 case AngelSWI_Reason_Rename:
477 case AngelSWI_Reason_System:
478 case AngelSWI_Reason_EnterSVC:
479 default:
480 state->Emulate = FALSE;
dfcd3bfb 481 return (FALSE);
c906108c
SS
482
483 case AngelSWI_Reason_Clock:
dfcd3bfb 484 /* return number of centi-seconds... */
c906108c
SS
485 state->Reg[0] =
486#ifdef CLOCKS_PER_SEC
487 (CLOCKS_PER_SEC >= 100)
dfcd3bfb
JM
488 ? (ARMword) (clock () / (CLOCKS_PER_SEC / 100))
489 : (ARMword) ((clock () * 100) / CLOCKS_PER_SEC);
c906108c 490#else
dfcd3bfb
JM
491 /* presume unix... clock() returns microseconds */
492 (ARMword) (clock () / 10000);
c906108c
SS
493#endif
494 OSptr->ErrorNo = errno;
495 return (TRUE);
496
497 case AngelSWI_Reason_Time:
498 state->Reg[0] = (ARMword) time (NULL);
499 OSptr->ErrorNo = errno;
500 return (TRUE);
501
502 case AngelSWI_Reason_WriteC:
dfcd3bfb 503 (void) fputc ((int) ARMul_ReadByte (state, addr), stdout);
c906108c
SS
504 OSptr->ErrorNo = errno;
505 return (TRUE);
506
507 case AngelSWI_Reason_Write0:
508 SWIWrite0 (state, addr);
509 return (TRUE);
510
511 case AngelSWI_Reason_Close:
512 state->Reg[0] = close (ARMul_ReadWord (state, addr));
513 OSptr->ErrorNo = errno;
514 return (TRUE);
515
516 case AngelSWI_Reason_Seek:
dfcd3bfb
JM
517 state->Reg[0] = -1 >= lseek (ARMul_ReadWord (state, addr),
518 ARMul_ReadWord (state, addr + 4),
c906108c
SS
519 SEEK_SET);
520 OSptr->ErrorNo = errno;
521 return (TRUE);
522
523 case AngelSWI_Reason_FLen:
524 SWIflen (state, ARMul_ReadWord (state, addr));
525 return (TRUE);
526
dfcd3bfb 527 case AngelSWI_Reason_GetCmdLine:
c906108c
SS
528 WriteCommandLineTo (state, ARMul_ReadWord (state, addr));
529 return (TRUE);
530
531 case AngelSWI_Reason_HeapInfo:
532 /* R1 is a pointer to a pointer */
533 addr = ARMul_ReadWord (state, addr);
534
535 /* Pick up the right memory limit */
536 if (state->MemSize)
537 temp = state->MemSize;
538 else
539 temp = ADDRUSERSTACK;
540
dfcd3bfb
JM
541 ARMul_WriteWord (state, addr, 0); /* Heap base */
542 ARMul_WriteWord (state, addr + 4, temp); /* Heap limit */
543 ARMul_WriteWord (state, addr + 8, temp); /* Stack base */
544 ARMul_WriteWord (state, addr + 12, temp); /* Stack limit */
c906108c
SS
545 return (TRUE);
546
547 case AngelSWI_Reason_ReportException:
548 if (state->Reg[1] == ADP_Stopped_ApplicationExit)
549 state->Reg[0] = 0;
550 else
551 state->Reg[0] = -1;
dfcd3bfb 552 state->Emulate = FALSE;
6d358e86 553 return TRUE;
c906108c
SS
554
555 case ADP_Stopped_ApplicationExit:
556 state->Reg[0] = 0;
dfcd3bfb 557 state->Emulate = FALSE;
c906108c 558 return (TRUE);
dfcd3bfb 559
c906108c
SS
560 case ADP_Stopped_RunTimeError:
561 state->Reg[0] = -1;
dfcd3bfb 562 state->Emulate = FALSE;
c906108c
SS
563 return (TRUE);
564
565 case AngelSWI_Reason_Errno:
566 state->Reg[0] = OSptr->ErrorNo;
567 return (TRUE);
568
569 case AngelSWI_Reason_Open:
dfcd3bfb
JM
570 SWIopen (state,
571 ARMul_ReadWord (state, addr),
572 ARMul_ReadWord (state, addr + 4));
c906108c
SS
573 return TRUE;
574
575 case AngelSWI_Reason_Read:
dfcd3bfb
JM
576 SWIread (state,
577 ARMul_ReadWord (state, addr),
578 ARMul_ReadWord (state, addr + 4),
579 ARMul_ReadWord (state, addr + 8));
c906108c
SS
580 return TRUE;
581
582 case AngelSWI_Reason_Write:
dfcd3bfb
JM
583 SWIwrite (state,
584 ARMul_ReadWord (state, addr),
585 ARMul_ReadWord (state, addr + 4),
586 ARMul_ReadWord (state, addr + 8));
c906108c
SS
587 return TRUE;
588 }
589
dfcd3bfb
JM
590 default:
591 state->Emulate = FALSE;
592 return (FALSE);
c906108c
SS
593 }
594}
595
c906108c
SS
596#ifndef NOOS
597#ifndef ASIM
598
599/***************************************************************************\
600* The emulator calls this routine when an Exception occurs. The second *
601* parameter is the address of the relevant exception vector. Returning *
602* FALSE from this routine causes the trap to be taken, TRUE causes it to *
603* be ignored (so set state->Emulate to FALSE!). *
604\***************************************************************************/
605
dfcd3bfb 606unsigned
6d358e86 607ARMul_OSException (ARMul_State * state ATTRIBUTE_UNUSED, ARMword vector ATTRIBUTE_UNUSED, ARMword pc ATTRIBUTE_UNUSED)
dfcd3bfb
JM
608{ /* don't use this here */
609 return (FALSE);
c906108c
SS
610}
611
612#endif
613
c906108c
SS
614
615#endif /* NOOS */
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