[deliverable/binutils-gdb.git] / sim / arm / armos.c

/*  armos.c -- ARMulator OS interface:  ARM6 Instruction Emulator.
    Copyright (C) 1994 Advanced RISC Machines Ltd.
 
    This program is free software; you can redistribute it and/or modify
    it under the terms of the GNU General Public License as published by
    the Free Software Foundation; either version 2 of the License, or
    (at your option) any later version.
 
    This program is distributed in the hope that it will be useful,
    but WITHOUT ANY WARRANTY; without even the implied warranty of
    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    GNU General Public License for more details.
 
    You should have received a copy of the GNU General Public License
    along with this program; if not, write to the Free Software
    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */

/* This file contains a model of Demon, ARM Ltd's Debug Monitor,
including all the SWI's required to support the C library. The code in
it is not really for the faint-hearted (especially the abort handling
code), but it is a complete example. Defining NOOS will disable all the
fun, and definign VAILDATE will define SWI 1 to enter SVC mode, and SWI
0x11 to halt the emulator. */

#include "config.h"
#include "ansidecl.h"

#include <time.h>
#include <errno.h>
#include <string.h>
#include <fcntl.h>

#ifndef O_RDONLY
#define O_RDONLY 0
#endif
#ifndef O_WRONLY
#define O_WRONLY 1
#endif
#ifndef O_RDWR
#define O_RDWR   2
#endif
#ifndef O_BINARY
#define O_BINARY 0
#endif

#ifdef __STDC__
#define unlink(s) remove(s)
#endif

#ifdef HAVE_UNISTD_H
#include <unistd.h>		/* For SEEK_SET etc */
#endif

#ifdef __riscos
extern int _fisatty (FILE *);
#define isatty_(f) _fisatty(f)
#else
#ifdef __ZTC__
#include <io.h>
#define isatty_(f) isatty((f)->_file)
#else
#ifdef macintosh
#include <ioctl.h>
#define isatty_(f) (~ioctl ((f)->_file, FIOINTERACTIVE, NULL))
#else
#define isatty_(f) isatty (fileno (f))
#endif
#endif
#endif

#include "armdefs.h"
#include "armos.h"
#include "armemu.h"

#ifndef NOOS
#ifndef VALIDATE
/* #ifndef ASIM */
#include "armfpe.h"
/* #endif */
#endif
#endif

/* For RDIError_BreakpointReached.  */
#include "dbg_rdi.h"

extern unsigned ARMul_OSInit (ARMul_State * state);
extern void ARMul_OSExit (ARMul_State * state);
extern unsigned ARMul_OSHandleSWI (ARMul_State * state, ARMword number);
extern unsigned ARMul_OSException (ARMul_State * state, ARMword vector,
				   ARMword pc);
extern ARMword ARMul_OSLastErrorP (ARMul_State * state);
extern ARMword ARMul_Debug (ARMul_State * state, ARMword pc, ARMword instr);

#define BUFFERSIZE 4096
#ifndef FOPEN_MAX
#define FOPEN_MAX 64
#endif
#define UNIQUETEMPS 256

/***************************************************************************\
*                          OS private Information                           *
\***************************************************************************/

struct OSblock
{
  ARMword Time0;
  ARMword ErrorP;
  ARMword ErrorNo;
  FILE *FileTable[FOPEN_MAX];
  char FileFlags[FOPEN_MAX];
  char *tempnames[UNIQUETEMPS];
};

#define NOOP 0
#define BINARY 1
#define READOP 2
#define WRITEOP 4

#ifdef macintosh
#define FIXCRLF(t,c) ((t & BINARY) ? \
                      c : \
                      ((c == '\n' || c == '\r' ) ? (c ^ 7) : c) \
                     )
#else
#define FIXCRLF(t,c) c
#endif

static ARMword softvectorcode[] =
{	/* basic: swi tidyexception + event; mov pc, lr;
	   ldmia r11,{r11,pc}; swi generateexception  + event.  */
  0xef000090, 0xe1a0e00f, 0xe89b8800, 0xef000080,	/*Reset */
  0xef000091, 0xe1a0e00f, 0xe89b8800, 0xef000081,	/*Undef */
  0xef000092, 0xe1a0e00f, 0xe89b8800, 0xef000082,	/*SWI  */
  0xef000093, 0xe1a0e00f, 0xe89b8800, 0xef000083,	/*Prefetch abort */
  0xef000094, 0xe1a0e00f, 0xe89b8800, 0xef000084,	/*Data abort */
  0xef000095, 0xe1a0e00f, 0xe89b8800, 0xef000085,	/*Address exception */
  0xef000096, 0xe1a0e00f, 0xe89b8800, 0xef000086, /*IRQ*/
  0xef000097, 0xe1a0e00f, 0xe89b8800, 0xef000087, /*FIQ*/
  0xef000098, 0xe1a0e00f, 0xe89b8800, 0xef000088,	/*Error */
  0xe1a0f00e			/* default handler */
};

/***************************************************************************\
*            Time for the Operating System to initialise itself.            *
\***************************************************************************/

unsigned
ARMul_OSInit (ARMul_State * state)
{
#ifndef NOOS
#ifndef VALIDATE
  ARMword instr, i, j;
  struct OSblock *OSptr = (struct OSblock *) state->OSptr;

  if (state->OSptr == NULL)
    {
      state->OSptr = (unsigned char *) malloc (sizeof (struct OSblock));
      if (state->OSptr == NULL)
	{
	  perror ("OS Memory");
	  exit (15);
	}
    }
  OSptr = (struct OSblock *) state->OSptr;
  OSptr->ErrorP = 0;
  state->Reg[13] = ADDRSUPERSTACK;	/* set up a stack for the current mode */
  ARMul_SetReg (state, SVC32MODE, 13, ADDRSUPERSTACK);	/* and for supervisor mode */
  ARMul_SetReg (state, ABORT32MODE, 13, ADDRSUPERSTACK);	/* and for abort 32 mode */
  ARMul_SetReg (state, UNDEF32MODE, 13, ADDRSUPERSTACK);	/* and for undef 32 mode */
  ARMul_SetReg (state, SYSTEMMODE, 13, ADDRSUPERSTACK);	/* and for system mode */
  instr = 0xe59ff000 | (ADDRSOFTVECTORS - 8);	/* load pc from soft vector */
  for (i = ARMul_ResetV; i <= ARMFIQV; i += 4)
    ARMul_WriteWord (state, i, instr);	/* write hardware vectors */
  for (i = ARMul_ResetV; i <= ARMFIQV + 4; i += 4)
    {
      ARMul_WriteWord (state, ADDRSOFTVECTORS + i, SOFTVECTORCODE + i * 4);
      ARMul_WriteWord (state, ADDRSOFHANDLERS + 2 * i + 4L,
		       SOFTVECTORCODE + sizeof (softvectorcode) - 4L);
    }
  for (i = 0; i < sizeof (softvectorcode); i += 4)
    ARMul_WriteWord (state, SOFTVECTORCODE + i, softvectorcode[i / 4]);
  for (i = 0; i < FOPEN_MAX; i++)
    OSptr->FileTable[i] = NULL;
  for (i = 0; i < UNIQUETEMPS; i++)
    OSptr->tempnames[i] = NULL;
  ARMul_ConsolePrint (state, ", Demon 1.01");

/* #ifndef ASIM */

  /* install fpe */
  for (i = 0; i < fpesize; i += 4)	/* copy the code */
    ARMul_WriteWord (state, FPESTART + i, fpecode[i >> 2]);
  for (i = FPESTART + fpesize;; i -= 4)
    {				/* reverse the error strings */
      if ((j = ARMul_ReadWord (state, i)) == 0xffffffff)
	break;
      if (state->bigendSig && j < 0x80000000)
	{			/* it's part of the string so swap it */
	  j = ((j >> 0x18) & 0x000000ff) |
	    ((j >> 0x08) & 0x0000ff00) |
	    ((j << 0x08) & 0x00ff0000) | ((j << 0x18) & 0xff000000);
	  ARMul_WriteWord (state, i, j);
	}
    }
  ARMul_WriteWord (state, FPEOLDVECT, ARMul_ReadWord (state, 4));	/* copy old illegal instr vector */
  ARMul_WriteWord (state, 4, FPENEWVECT (ARMul_ReadWord (state, i - 4)));	/* install new vector */
  ARMul_ConsolePrint (state, ", FPE");

/* #endif  ASIM */
#endif /* VALIDATE */
#endif /* NOOS */

  return (TRUE);
}

void
ARMul_OSExit (ARMul_State * state)
{
  free ((char *) state->OSptr);
}


/***************************************************************************\
*                  Return the last Operating System Error.                  *
\***************************************************************************/

ARMword ARMul_OSLastErrorP (ARMul_State * state)
{
  return ((struct OSblock *) state->OSptr)->ErrorP;
}

static int translate_open_mode[] = {
  O_RDONLY,			/* "r"   */
  O_RDONLY + O_BINARY,		/* "rb"  */
  O_RDWR,			/* "r+"  */
  O_RDWR + O_BINARY,		/* "r+b" */
  O_WRONLY + O_CREAT + O_TRUNC,	/* "w"   */
  O_WRONLY + O_BINARY + O_CREAT + O_TRUNC,	/* "wb"  */
  O_RDWR + O_CREAT + O_TRUNC,	/* "w+"  */
  O_RDWR + O_BINARY + O_CREAT + O_TRUNC,	/* "w+b" */
  O_WRONLY + O_APPEND + O_CREAT,	/* "a"   */
  O_WRONLY + O_BINARY + O_APPEND + O_CREAT,	/* "ab"  */
  O_RDWR + O_APPEND + O_CREAT,	/* "a+"  */
  O_RDWR + O_BINARY + O_APPEND + O_CREAT	/* "a+b" */
};

static void
SWIWrite0 (ARMul_State * state, ARMword addr)
{
  ARMword temp;
  struct OSblock *OSptr = (struct OSblock *) state->OSptr;

  while ((temp = ARMul_ReadByte (state, addr++)) != 0)
    (void) fputc ((char) temp, stdout);

  OSptr->ErrorNo = errno;
}

static void
WriteCommandLineTo (ARMul_State * state, ARMword addr)
{
  ARMword temp;
  char *cptr = state->CommandLine;
  if (cptr == NULL)
    cptr = "\0";
  do
    {
      temp = (ARMword) * cptr++;
      ARMul_WriteByte (state, addr++, temp);
    }
  while (temp != 0);
}

static void
SWIopen (ARMul_State * state, ARMword name, ARMword SWIflags)
{
  struct OSblock *OSptr = (struct OSblock *) state->OSptr;
  char dummy[2000];
  int flags;
  int i;

  for (i = 0; (dummy[i] = ARMul_ReadByte (state, name + i)); i++)
    ;

  /* Now we need to decode the Demon open mode */
  flags = translate_open_mode[SWIflags];

  /* Filename ":tt" is special: it denotes stdin/out */
  if (strcmp (dummy, ":tt") == 0)
    {
      if (flags == O_RDONLY)	/* opening tty "r" */
	state->Reg[0] = 0;	/* stdin */
      else
	state->Reg[0] = 1;	/* stdout */
    }
  else
    {
      state->Reg[0] = (int) open (dummy, flags, 0666);
      OSptr->ErrorNo = errno;
    }
}

static void
SWIread (ARMul_State * state, ARMword f, ARMword ptr, ARMword len)
{
  struct OSblock *OSptr = (struct OSblock *) state->OSptr;
  int res;
  int i;
  char *local = malloc (len);

  if (local == NULL)
    {
      fprintf (stderr, "sim: Unable to read 0x%ulx bytes - out of memory\n",
	       len);
      return;
    }

  res = read (f, local, len);
  if (res > 0)
    for (i = 0; i < res; i++)
      ARMul_WriteByte (state, ptr + i, local[i]);
  free (local);
  state->Reg[0] = res == -1 ? -1 : len - res;
  OSptr->ErrorNo = errno;
}

static void
SWIwrite (ARMul_State * state, ARMword f, ARMword ptr, ARMword len)
{
  struct OSblock *OSptr = (struct OSblock *) state->OSptr;
  int res;
  ARMword i;
  char *local = malloc (len);

  if (local == NULL)
    {
      fprintf (stderr, "sim: Unable to write 0x%lx bytes - out of memory\n",
	       (long) len);
      return;
    }

  for (i = 0; i < len; i++)
    local[i] = ARMul_ReadByte (state, ptr + i);

  res = write (f, local, len);
  state->Reg[0] = res == -1 ? -1 : len - res;
  free (local);
  OSptr->ErrorNo = errno;
}

static void
SWIflen (ARMul_State * state, ARMword fh)
{
  struct OSblock *OSptr = (struct OSblock *) state->OSptr;
  ARMword addr;

  if (fh == 0 || fh > FOPEN_MAX)
    {
      OSptr->ErrorNo = EBADF;
      state->Reg[0] = -1L;
      return;
    }

  addr = lseek (fh, 0, SEEK_CUR);

  state->Reg[0] = lseek (fh, 0L, SEEK_END);
  (void) lseek (fh, addr, SEEK_SET);

  OSptr->ErrorNo = errno;
}

/***************************************************************************\
* The emulator calls this routine when a SWI instruction is encuntered. The *
* parameter passed is the SWI number (lower 24 bits of the instruction).    *
\***************************************************************************/

unsigned
ARMul_OSHandleSWI (ARMul_State * state, ARMword number)
{
  ARMword addr, temp;
  struct OSblock *OSptr = (struct OSblock *) state->OSptr;

  switch (number)
    {
    case SWI_Read:
      SWIread (state, state->Reg[0], state->Reg[1], state->Reg[2]);
      return TRUE;

    case SWI_Write:
      SWIwrite (state, state->Reg[0], state->Reg[1], state->Reg[2]);
      return TRUE;

    case SWI_Open:
      SWIopen (state, state->Reg[0], state->Reg[1]);
      return TRUE;

    case SWI_Clock:
      /* return number of centi-seconds... */
      state->Reg[0] =
#ifdef CLOCKS_PER_SEC
	(CLOCKS_PER_SEC >= 100)
	? (ARMword) (clock () / (CLOCKS_PER_SEC / 100))
	: (ARMword) ((clock () * 100) / CLOCKS_PER_SEC);
#else
	/* presume unix... clock() returns microseconds */
	(ARMword) (clock () / 10000);
#endif
      OSptr->ErrorNo = errno;
      return (TRUE);

    case SWI_Time:
      state->Reg[0] = (ARMword) time (NULL);
      OSptr->ErrorNo = errno;
      return (TRUE);

    case SWI_Close:
      state->Reg[0] = close (state->Reg[0]);
      OSptr->ErrorNo = errno;
      return TRUE;

    case SWI_Flen:
      SWIflen (state, state->Reg[0]);
      return (TRUE);

    case SWI_Exit:
      state->Emulate = FALSE;
      return TRUE;

    case SWI_Seek:
      {
	/* We must return non-zero for failure */
	state->Reg[0] = -1 >= lseek (state->Reg[0], state->Reg[1], SEEK_SET);
	OSptr->ErrorNo = errno;
	return TRUE;
      }

    case SWI_WriteC:
      (void) fputc ((int) state->Reg[0], stdout);
      OSptr->ErrorNo = errno;
      return (TRUE);

    case SWI_Write0:
      SWIWrite0 (state, state->Reg[0]);
      return (TRUE);

    case SWI_GetErrno:
      state->Reg[0] = OSptr->ErrorNo;
      return (TRUE);

    case SWI_GetEnv:
      state->Reg[0] = ADDRCMDLINE;
      if (state->MemSize)
	state->Reg[1] = state->MemSize;
      else
	state->Reg[1] = ADDRUSERSTACK;

      WriteCommandLineTo (state, state->Reg[0]);
      return (TRUE);
      
    case SWI_Breakpoint:
      state->EndCondition = RDIError_BreakpointReached;
      state->Emulate = FALSE;
      return (TRUE);

      /* Handle Angel SWIs as well as Demon ones */
    case AngelSWI_ARM:
    case AngelSWI_Thumb:
      /* R1 is almost always a parameter block */
      addr = state->Reg[1];
      /* R0 is a reason code */
      switch (state->Reg[0])
	{
	  /* Unimplemented reason codes */
	case AngelSWI_Reason_ReadC:
	case AngelSWI_Reason_IsTTY:
	case AngelSWI_Reason_TmpNam:
	case AngelSWI_Reason_Remove:
	case AngelSWI_Reason_Rename:
	case AngelSWI_Reason_System:
	case AngelSWI_Reason_EnterSVC:
	default:
	  state->Emulate = FALSE;
	  return (FALSE);

	case AngelSWI_Reason_Clock:
	  /* return number of centi-seconds... */
	  state->Reg[0] =
#ifdef CLOCKS_PER_SEC
	    (CLOCKS_PER_SEC >= 100)
	    ? (ARMword) (clock () / (CLOCKS_PER_SEC / 100))
	    : (ARMword) ((clock () * 100) / CLOCKS_PER_SEC);
#else
	    /* presume unix... clock() returns microseconds */
	    (ARMword) (clock () / 10000);
#endif
	  OSptr->ErrorNo = errno;
	  return (TRUE);

	case AngelSWI_Reason_Time:
	  state->Reg[0] = (ARMword) time (NULL);
	  OSptr->ErrorNo = errno;
	  return (TRUE);

	case AngelSWI_Reason_WriteC:
	  (void) fputc ((int) ARMul_ReadByte (state, addr), stdout);
	  OSptr->ErrorNo = errno;
	  return (TRUE);

	case AngelSWI_Reason_Write0:
	  SWIWrite0 (state, addr);
	  return (TRUE);

	case AngelSWI_Reason_Close:
	  state->Reg[0] = close (ARMul_ReadWord (state, addr));
	  OSptr->ErrorNo = errno;
	  return (TRUE);

	case AngelSWI_Reason_Seek:
	  state->Reg[0] = -1 >= lseek (ARMul_ReadWord (state, addr),
				       ARMul_ReadWord (state, addr + 4),
				       SEEK_SET);
	  OSptr->ErrorNo = errno;
	  return (TRUE);

	case AngelSWI_Reason_FLen:
	  SWIflen (state, ARMul_ReadWord (state, addr));
	  return (TRUE);

	case AngelSWI_Reason_GetCmdLine:
	  WriteCommandLineTo (state, ARMul_ReadWord (state, addr));
	  return (TRUE);

	case AngelSWI_Reason_HeapInfo:
	  /* R1 is a pointer to a pointer */
	  addr = ARMul_ReadWord (state, addr);

	  /* Pick up the right memory limit */
	  if (state->MemSize)
	    temp = state->MemSize;
	  else
	    temp = ADDRUSERSTACK;

	  ARMul_WriteWord (state, addr, 0);	/* Heap base */
	  ARMul_WriteWord (state, addr + 4, temp);	/* Heap limit */
	  ARMul_WriteWord (state, addr + 8, temp);	/* Stack base */
	  ARMul_WriteWord (state, addr + 12, temp);	/* Stack limit */
	  return (TRUE);

	case AngelSWI_Reason_ReportException:
	  if (state->Reg[1] == ADP_Stopped_ApplicationExit)
	    state->Reg[0] = 0;
	  else
	    state->Reg[0] = -1;
	  state->Emulate = FALSE;
	  return TRUE;

	case ADP_Stopped_ApplicationExit:
	  state->Reg[0] = 0;
	  state->Emulate = FALSE;
	  return (TRUE);

	case ADP_Stopped_RunTimeError:
	  state->Reg[0] = -1;
	  state->Emulate = FALSE;
	  return (TRUE);

	case AngelSWI_Reason_Errno:
	  state->Reg[0] = OSptr->ErrorNo;
	  return (TRUE);

	case AngelSWI_Reason_Open:
	  SWIopen (state,
		   ARMul_ReadWord (state, addr),
		   ARMul_ReadWord (state, addr + 4));
	  return TRUE;

	case AngelSWI_Reason_Read:
	  SWIread (state,
		   ARMul_ReadWord (state, addr),
		   ARMul_ReadWord (state, addr + 4),
		   ARMul_ReadWord (state, addr + 8));
	  return TRUE;

	case AngelSWI_Reason_Write:
	  SWIwrite (state,
		    ARMul_ReadWord (state, addr),
		    ARMul_ReadWord (state, addr + 4),
		    ARMul_ReadWord (state, addr + 8));
	  return TRUE;
	}

    case 0x90:
    case 0x92:
      /* These are used by the FPE code.  */
      return TRUE;
      
    default:
      {
	/* If there is a SWI vector installed use it.  */
	extern int SWI_vector_installed;
	
	if (SWI_vector_installed && number != SWI_Breakpoint)
	  {
	    ARMword cpsr;
	    ARMword i_size;
	    
	    cpsr = ARMul_GetCPSR (state);
	    i_size = INSN_SIZE;
	    
	    ARMul_SetSPSR (state, SVC32MODE, cpsr);
	    
	    cpsr &= ~0xbf;
	    cpsr |= SVC32MODE | 0x80;
	    ARMul_SetCPSR (state, cpsr);
	    
	    state->RegBank[SVCBANK][14] = state->Reg[14] = state->Reg[15] - i_size;
	    state->NextInstr            = RESUME;
	    state->Reg[15]              = state->pc = ARMSWIV;
	    FLUSHPIPE;
	  }
	else
	  fprintf (stderr, "unknown SWI encountered - %x - ignoring\n", number);
	return TRUE;
      }
    }
}

#ifndef NOOS
#ifndef ASIM

/* The emulator calls this routine when an Exception occurs.  The second
   parameter is the address of the relevant exception vector.  Returning
   FALSE from this routine causes the trap to be taken, TRUE causes it to
   be ignored (so set state->Emulate to FALSE!).  */

unsigned
ARMul_OSException (
		   ARMul_State * state  ATTRIBUTE_UNUSED,
		   ARMword       vector ATTRIBUTE_UNUSED,
		   ARMword       pc     ATTRIBUTE_UNUSED)
{
  return FALSE;
}

#endif
#endif /* NOOS */
Commit	Line	Data
c906108c SS	1	/* armos.c -- ARMulator OS interface: ARM6 Instruction Emulator.
	2	Copyright (C) 1994 Advanced RISC Machines Ltd.
	3
	4	This program is free software; you can redistribute it and/or modify
	5	it under the terms of the GNU General Public License as published by
	6	the Free Software Foundation; either version 2 of the License, or
	7	(at your option) any later version.
	8
	9	This program is distributed in the hope that it will be useful,
	10	but WITHOUT ANY WARRANTY; without even the implied warranty of
	11	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	12	GNU General Public License for more details.
	13
	14	You should have received a copy of the GNU General Public License
	15	along with this program; if not, write to the Free Software
	16	Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
	17
	18	/* This file contains a model of Demon, ARM Ltd's Debug Monitor,
	19	including all the SWI's required to support the C library. The code in
	20	it is not really for the faint-hearted (especially the abort handling
	21	code), but it is a complete example. Defining NOOS will disable all the
	22	fun, and definign VAILDATE will define SWI 1 to enter SVC mode, and SWI
	23	0x11 to halt the emulator. */
	24
	25	#include "config.h"
6d358e86	26	#include "ansidecl.h"
c906108c SS	27
	28	#include <time.h>
	29	#include <errno.h>
	30	#include <string.h>
	31	#include <fcntl.h>
	32
	33	#ifndef O_RDONLY
	34	#define O_RDONLY 0
	35	#endif
	36	#ifndef O_WRONLY
	37	#define O_WRONLY 1
	38	#endif
	39	#ifndef O_RDWR
	40	#define O_RDWR 2
	41	#endif
	42	#ifndef O_BINARY
	43	#define O_BINARY 0
	44	#endif
	45
	46	#ifdef __STDC__
	47	#define unlink(s) remove(s)
	48	#endif
	49
	50	#ifdef HAVE_UNISTD_H
dfcd3bfb	51	#include <unistd.h> /* For SEEK_SET etc */
c906108c SS	52	#endif
	53
	54	#ifdef __riscos
dfcd3bfb	55	extern int _fisatty (FILE *);
c906108c SS	56	#define isatty_(f) _fisatty(f)
	57	#else
	58	#ifdef __ZTC__
	59	#include <io.h>
	60	#define isatty_(f) isatty((f)->_file)
	61	#else
	62	#ifdef macintosh
	63	#include <ioctl.h>
	64	#define isatty_(f) (~ioctl ((f)->_file, FIOINTERACTIVE, NULL))
	65	#else
	66	#define isatty_(f) isatty (fileno (f))
	67	#endif
	68	#endif
	69	#endif
	70
	71	#include "armdefs.h"
	72	#include "armos.h"
f1129fb8 NC	73	#include "armemu.h"
f1129fb8 NC	74
c906108c SS	75	#ifndef NOOS
	76	#ifndef VALIDATE
	77	/* #ifndef ASIM */
	78	#include "armfpe.h"
	79	/* #endif */
	80	#endif
	81	#endif
	82
	83	/* For RDIError_BreakpointReached. */
	84	#include "dbg_rdi.h"
	85
dfcd3bfb JM	86	extern unsigned ARMul_OSInit (ARMul_State * state);
	87	extern void ARMul_OSExit (ARMul_State * state);
	88	extern unsigned ARMul_OSHandleSWI (ARMul_State * state, ARMword number);
	89	extern unsigned ARMul_OSException (ARMul_State * state, ARMword vector,
	90	ARMword pc);
	91	extern ARMword ARMul_OSLastErrorP (ARMul_State * state);
	92	extern ARMword ARMul_Debug (ARMul_State * state, ARMword pc, ARMword instr);
c906108c SS	93
	94	#define BUFFERSIZE 4096
	95	#ifndef FOPEN_MAX
	96	#define FOPEN_MAX 64
	97	#endif
	98	#define UNIQUETEMPS 256
	99
c906108c SS	100	/***************************************************************************\
	101	* OS private Information *
	102	\***************************************************************************/
	103
dfcd3bfb JM	104	struct OSblock
	105	{
	106	ARMword Time0;
	107	ARMword ErrorP;
	108	ARMword ErrorNo;
	109	FILE *FileTable[FOPEN_MAX];
	110	char FileFlags[FOPEN_MAX];
	111	char *tempnames[UNIQUETEMPS];
	112	};
c906108c SS	113
	114	#define NOOP 0
	115	#define BINARY 1
	116	#define READOP 2
	117	#define WRITEOP 4
	118
	119	#ifdef macintosh
	120	#define FIXCRLF(t,c) ((t & BINARY) ? \
	121	c : \
	122	((c == '\n' \|\| c == '\r' ) ? (c ^ 7) : c) \
	123	)
dfcd3bfb JM	124	#else
dfcd3bfb JM	125	#define FIXCRLF(t,c) c
c906108c SS	126	#endif
c906108c SS	127
6d358e86 NC	128	static ARMword softvectorcode[] =
	129	{ /* basic: swi tidyexception + event; mov pc, lr;
	130	ldmia r11,{r11,pc}; swi generateexception + event. */
dfcd3bfb JM	131	0xef000090, 0xe1a0e00f, 0xe89b8800, 0xef000080, /Reset /
	132	0xef000091, 0xe1a0e00f, 0xe89b8800, 0xef000081, /Undef /
	133	0xef000092, 0xe1a0e00f, 0xe89b8800, 0xef000082, /SWI /
	134	0xef000093, 0xe1a0e00f, 0xe89b8800, 0xef000083, /Prefetch abort /
	135	0xef000094, 0xe1a0e00f, 0xe89b8800, 0xef000084, /Data abort /
	136	0xef000095, 0xe1a0e00f, 0xe89b8800, 0xef000085, /Address exception /
c906108c	137	0xef000096, 0xe1a0e00f, 0xe89b8800, 0xef000086, /IRQ/
6d358e86 NC	138	0xef000097, 0xe1a0e00f, 0xe89b8800, 0xef000087, /FIQ/
6d358e86 NC	139	0xef000098, 0xe1a0e00f, 0xe89b8800, 0xef000088, /Error /
dfcd3bfb	140	0xe1a0f00e /* default handler */
c906108c SS	141	};
	142
	143	/***************************************************************************\
	144	* Time for the Operating System to initialise itself. *
	145	\***************************************************************************/
	146
dfcd3bfb JM	147	unsigned
dfcd3bfb JM	148	ARMul_OSInit (ARMul_State * state)
c906108c SS	149	{
	150	#ifndef NOOS
	151	#ifndef VALIDATE
dfcd3bfb JM	152	ARMword instr, i, j;
	153	struct OSblock OSptr = (struct OSblock ) state->OSptr;
	154
	155	if (state->OSptr == NULL)
	156	{
	157	state->OSptr = (unsigned char *) malloc (sizeof (struct OSblock));
	158	if (state->OSptr == NULL)
	159	{
	160	perror ("OS Memory");
	161	exit (15);
	162	}
c906108c	163	}
dfcd3bfb JM	164	OSptr = (struct OSblock *) state->OSptr;
	165	OSptr->ErrorP = 0;
	166	state->Reg[13] = ADDRSUPERSTACK; /* set up a stack for the current mode */
	167	ARMul_SetReg (state, SVC32MODE, 13, ADDRSUPERSTACK); /* and for supervisor mode */
	168	ARMul_SetReg (state, ABORT32MODE, 13, ADDRSUPERSTACK); /* and for abort 32 mode */
	169	ARMul_SetReg (state, UNDEF32MODE, 13, ADDRSUPERSTACK); /* and for undef 32 mode */
c1a72ffd	170	ARMul_SetReg (state, SYSTEMMODE, 13, ADDRSUPERSTACK); /* and for system mode */
dfcd3bfb JM	171	instr = 0xe59ff000 \| (ADDRSOFTVECTORS - 8); /* load pc from soft vector */
	172	for (i = ARMul_ResetV; i <= ARMFIQV; i += 4)
	173	ARMul_WriteWord (state, i, instr); /* write hardware vectors */
	174	for (i = ARMul_ResetV; i <= ARMFIQV + 4; i += 4)
	175	{
	176	ARMul_WriteWord (state, ADDRSOFTVECTORS + i, SOFTVECTORCODE + i * 4);
	177	ARMul_WriteWord (state, ADDRSOFHANDLERS + 2 * i + 4L,
	178	SOFTVECTORCODE + sizeof (softvectorcode) - 4L);
c906108c	179	}
dfcd3bfb JM	180	for (i = 0; i < sizeof (softvectorcode); i += 4)
	181	ARMul_WriteWord (state, SOFTVECTORCODE + i, softvectorcode[i / 4]);
	182	for (i = 0; i < FOPEN_MAX; i++)
	183	OSptr->FileTable[i] = NULL;
	184	for (i = 0; i < UNIQUETEMPS; i++)
	185	OSptr->tempnames[i] = NULL;
	186	ARMul_ConsolePrint (state, ", Demon 1.01");
c906108c SS	187
	188	/* #ifndef ASIM */
	189
dfcd3bfb JM	190	/* install fpe */
	191	for (i = 0; i < fpesize; i += 4) /* copy the code */
	192	ARMul_WriteWord (state, FPESTART + i, fpecode[i >> 2]);
	193	for (i = FPESTART + fpesize;; i -= 4)
	194	{ /* reverse the error strings */
	195	if ((j = ARMul_ReadWord (state, i)) == 0xffffffff)
	196	break;
	197	if (state->bigendSig && j < 0x80000000)
	198	{ /* it's part of the string so swap it */
	199	j = ((j >> 0x18) & 0x000000ff) \|
	200	((j >> 0x08) & 0x0000ff00) \|
	201	((j << 0x08) & 0x00ff0000) \| ((j << 0x18) & 0xff000000);
	202	ARMul_WriteWord (state, i, j);
	203	}
c906108c	204	}
dfcd3bfb JM	205	ARMul_WriteWord (state, FPEOLDVECT, ARMul_ReadWord (state, 4)); /* copy old illegal instr vector */
	206	ARMul_WriteWord (state, 4, FPENEWVECT (ARMul_ReadWord (state, i - 4))); /* install new vector */
	207	ARMul_ConsolePrint (state, ", FPE");
c906108c	208
6d358e86	209	/* #endif ASIM */
c906108c SS	210	#endif /* VALIDATE */
	211	#endif /* NOOS */
	212
dfcd3bfb	213	return (TRUE);
c906108c SS	214	}
c906108c SS	215
dfcd3bfb JM	216	void
dfcd3bfb JM	217	ARMul_OSExit (ARMul_State * state)
c906108c	218	{
dfcd3bfb	219	free ((char *) state->OSptr);
c906108c SS	220	}
	221
	222
	223	/***************************************************************************\
	224	* Return the last Operating System Error. *
	225	\***************************************************************************/
	226
dfcd3bfb	227	ARMword ARMul_OSLastErrorP (ARMul_State * state)
c906108c	228	{
dfcd3bfb	229	return ((struct OSblock *) state->OSptr)->ErrorP;
c906108c SS	230	}
c906108c SS	231
dfcd3bfb JM	232	static int translate_open_mode[] = {
	233	O_RDONLY, /* "r" */
	234	O_RDONLY + O_BINARY, /* "rb" */
	235	O_RDWR, /* "r+" */
	236	O_RDWR + O_BINARY, /* "r+b" */
	237	O_WRONLY + O_CREAT + O_TRUNC, /* "w" */
	238	O_WRONLY + O_BINARY + O_CREAT + O_TRUNC, /* "wb" */
	239	O_RDWR + O_CREAT + O_TRUNC, /* "w+" */
	240	O_RDWR + O_BINARY + O_CREAT + O_TRUNC, /* "w+b" */
	241	O_WRONLY + O_APPEND + O_CREAT, /* "a" */
	242	O_WRONLY + O_BINARY + O_APPEND + O_CREAT, /* "ab" */
	243	O_RDWR + O_APPEND + O_CREAT, /* "a+" */
	244	O_RDWR + O_BINARY + O_APPEND + O_CREAT /* "a+b" */
c906108c SS	245	};
c906108c SS	246
dfcd3bfb JM	247	static void
dfcd3bfb JM	248	SWIWrite0 (ARMul_State * state, ARMword addr)
c906108c SS	249	{
c906108c SS	250	ARMword temp;
dfcd3bfb	251	struct OSblock OSptr = (struct OSblock ) state->OSptr;
c906108c SS	252
c906108c SS	253	while ((temp = ARMul_ReadByte (state, addr++)) != 0)
2acceee2	254	(void) fputc ((char) temp, stdout);
c906108c SS	255
	256	OSptr->ErrorNo = errno;
	257	}
	258
dfcd3bfb JM	259	static void
dfcd3bfb JM	260	WriteCommandLineTo (ARMul_State * state, ARMword addr)
c906108c SS	261	{
	262	ARMword temp;
	263	char *cptr = state->CommandLine;
	264	if (cptr == NULL)
	265	cptr = "\0";
dfcd3bfb JM	266	do
	267	{
	268	temp = (ARMword) * cptr++;
	269	ARMul_WriteByte (state, addr++, temp);
	270	}
	271	while (temp != 0);
c906108c SS	272	}
c906108c SS	273
dfcd3bfb JM	274	static void
dfcd3bfb JM	275	SWIopen (ARMul_State * state, ARMword name, ARMword SWIflags)
c906108c	276	{
dfcd3bfb	277	struct OSblock OSptr = (struct OSblock ) state->OSptr;
c906108c SS	278	char dummy[2000];
	279	int flags;
	280	int i;
	281
6d358e86	282	for (i = 0; (dummy[i] = ARMul_ReadByte (state, name + i)); i++)
c906108c SS	283	;
	284
	285	/* Now we need to decode the Demon open mode */
	286	flags = translate_open_mode[SWIflags];
	287
	288	/* Filename ":tt" is special: it denotes stdin/out */
	289	if (strcmp (dummy, ":tt") == 0)
	290	{
dfcd3bfb JM	291	if (flags == O_RDONLY) /* opening tty "r" */
	292	state->Reg[0] = 0; /* stdin */
	293	else
	294	state->Reg[0] = 1; /* stdout */
c906108c SS	295	}
	296	else
	297	{
2df3850c	298	state->Reg[0] = (int) open (dummy, flags, 0666);
c906108c SS	299	OSptr->ErrorNo = errno;
	300	}
	301	}
	302
dfcd3bfb JM	303	static void
dfcd3bfb JM	304	SWIread (ARMul_State * state, ARMword f, ARMword ptr, ARMword len)
c906108c	305	{
dfcd3bfb	306	struct OSblock OSptr = (struct OSblock ) state->OSptr;
c906108c SS	307	int res;
	308	int i;
	309	char *local = malloc (len);
	310
c2d11a7d JM	311	if (local == NULL)
c2d11a7d JM	312	{
6d358e86	313	fprintf (stderr, "sim: Unable to read 0x%ulx bytes - out of memory\n",
dfcd3bfb	314	len);
c2d11a7d JM	315	return;
c2d11a7d JM	316	}
dfcd3bfb	317
c906108c SS	318	res = read (f, local, len);
c906108c SS	319	if (res > 0)
dfcd3bfb	320	for (i = 0; i < res; i++)
c906108c SS	321	ARMul_WriteByte (state, ptr + i, local[i]);
	322	free (local);
	323	state->Reg[0] = res == -1 ? -1 : len - res;
	324	OSptr->ErrorNo = errno;
	325	}
	326
dfcd3bfb JM	327	static void
dfcd3bfb JM	328	SWIwrite (ARMul_State * state, ARMword f, ARMword ptr, ARMword len)
c906108c	329	{
dfcd3bfb	330	struct OSblock OSptr = (struct OSblock ) state->OSptr;
c906108c	331	int res;
6d358e86	332	ARMword i;
c906108c SS	333	char *local = malloc (len);
c906108c SS	334
c2d11a7d	335	if (local == NULL)
c906108c	336	{
6d358e86 NC	337	fprintf (stderr, "sim: Unable to write 0x%lx bytes - out of memory\n",
6d358e86 NC	338	(long) len);
c2d11a7d	339	return;
c906108c	340	}
dfcd3bfb JM	341
dfcd3bfb JM	342	for (i = 0; i < len; i++)
c2d11a7d JM	343	local[i] = ARMul_ReadByte (state, ptr + i);
c2d11a7d JM	344
c906108c SS	345	res = write (f, local, len);
	346	state->Reg[0] = res == -1 ? -1 : len - res;
	347	free (local);
	348	OSptr->ErrorNo = errno;
	349	}
	350
dfcd3bfb JM	351	static void
dfcd3bfb JM	352	SWIflen (ARMul_State * state, ARMword fh)
c906108c	353	{
dfcd3bfb	354	struct OSblock OSptr = (struct OSblock ) state->OSptr;
c906108c SS	355	ARMword addr;
	356
	357	if (fh == 0 \|\| fh > FOPEN_MAX)
	358	{
	359	OSptr->ErrorNo = EBADF;
	360	state->Reg[0] = -1L;
	361	return;
	362	}
	363
	364	addr = lseek (fh, 0, SEEK_CUR);
6d358e86 NC	365
	366	state->Reg[0] = lseek (fh, 0L, SEEK_END);
	367	(void) lseek (fh, addr, SEEK_SET);
c906108c SS	368
	369	OSptr->ErrorNo = errno;
	370	}
	371
	372	/***************************************************************************\
	373	* The emulator calls this routine when a SWI instruction is encuntered. The *
	374	* parameter passed is the SWI number (lower 24 bits of the instruction). *
	375	\***************************************************************************/
	376
dfcd3bfb JM	377	unsigned
dfcd3bfb JM	378	ARMul_OSHandleSWI (ARMul_State * state, ARMword number)
c906108c	379	{
6d358e86	380	ARMword addr, temp;
dfcd3bfb	381	struct OSblock OSptr = (struct OSblock ) state->OSptr;
c906108c SS	382
	383	switch (number)
	384	{
	385	case SWI_Read:
dfcd3bfb JM	386	SWIread (state, state->Reg[0], state->Reg[1], state->Reg[2]);
dfcd3bfb JM	387	return TRUE;
c906108c SS	388
c906108c SS	389	case SWI_Write:
dfcd3bfb JM	390	SWIwrite (state, state->Reg[0], state->Reg[1], state->Reg[2]);
dfcd3bfb JM	391	return TRUE;
c906108c SS	392
c906108c SS	393	case SWI_Open:
dfcd3bfb JM	394	SWIopen (state, state->Reg[0], state->Reg[1]);
dfcd3bfb JM	395	return TRUE;
c906108c	396
dfcd3bfb JM	397	case SWI_Clock:
	398	/* return number of centi-seconds... */
	399	state->Reg[0] =
c906108c	400	#ifdef CLOCKS_PER_SEC
dfcd3bfb JM	401	(CLOCKS_PER_SEC >= 100)
	402	? (ARMword) (clock () / (CLOCKS_PER_SEC / 100))
	403	: (ARMword) ((clock () * 100) / CLOCKS_PER_SEC);
c906108c	404	#else
dfcd3bfb JM	405	/* presume unix... clock() returns microseconds */
dfcd3bfb JM	406	(ARMword) (clock () / 10000);
c906108c	407	#endif
dfcd3bfb JM	408	OSptr->ErrorNo = errno;
	409	return (TRUE);
	410
	411	case SWI_Time:
	412	state->Reg[0] = (ARMword) time (NULL);
	413	OSptr->ErrorNo = errno;
	414	return (TRUE);
	415
c906108c SS	416	case SWI_Close:
	417	state->Reg[0] = close (state->Reg[0]);
	418	OSptr->ErrorNo = errno;
	419	return TRUE;
	420
dfcd3bfb	421	case SWI_Flen:
c906108c	422	SWIflen (state, state->Reg[0]);
dfcd3bfb	423	return (TRUE);
c906108c SS	424
c906108c SS	425	case SWI_Exit:
dfcd3bfb	426	state->Emulate = FALSE;
c906108c SS	427	return TRUE;
	428
	429	case SWI_Seek:
	430	{
	431	/* We must return non-zero for failure */
dfcd3bfb	432	state->Reg[0] = -1 >= lseek (state->Reg[0], state->Reg[1], SEEK_SET);
c906108c SS	433	OSptr->ErrorNo = errno;
	434	return TRUE;
	435	}
	436
dfcd3bfb JM	437	case SWI_WriteC:
	438	(void) fputc ((int) state->Reg[0], stdout);
	439	OSptr->ErrorNo = errno;
	440	return (TRUE);
c906108c	441
dfcd3bfb	442	case SWI_Write0:
c906108c	443	SWIWrite0 (state, state->Reg[0]);
dfcd3bfb	444	return (TRUE);
c906108c	445
dfcd3bfb JM	446	case SWI_GetErrno:
	447	state->Reg[0] = OSptr->ErrorNo;
	448	return (TRUE);
c906108c	449
dfcd3bfb JM	450	case SWI_GetEnv:
	451	state->Reg[0] = ADDRCMDLINE;
	452	if (state->MemSize)
	453	state->Reg[1] = state->MemSize;
	454	else
	455	state->Reg[1] = ADDRUSERSTACK;
c906108c	456
dfcd3bfb JM	457	WriteCommandLineTo (state, state->Reg[0]);
dfcd3bfb JM	458	return (TRUE);
f1129fb8 NC	459
	460	case SWI_Breakpoint:
	461	state->EndCondition = RDIError_BreakpointReached;
	462	state->Emulate = FALSE;
	463	return (TRUE);
c906108c	464
dfcd3bfb	465	/* Handle Angel SWIs as well as Demon ones */
c906108c SS	466	case AngelSWI_ARM:
	467	case AngelSWI_Thumb:
	468	/* R1 is almost always a parameter block */
	469	addr = state->Reg[1];
	470	/* R0 is a reason code */
	471	switch (state->Reg[0])
	472	{
	473	/* Unimplemented reason codes */
	474	case AngelSWI_Reason_ReadC:
	475	case AngelSWI_Reason_IsTTY:
	476	case AngelSWI_Reason_TmpNam:
	477	case AngelSWI_Reason_Remove:
	478	case AngelSWI_Reason_Rename:
	479	case AngelSWI_Reason_System:
	480	case AngelSWI_Reason_EnterSVC:
	481	default:
	482	state->Emulate = FALSE;
dfcd3bfb	483	return (FALSE);
c906108c SS	484
c906108c SS	485	case AngelSWI_Reason_Clock:
dfcd3bfb	486	/* return number of centi-seconds... */
c906108c SS	487	state->Reg[0] =
	488	#ifdef CLOCKS_PER_SEC
	489	(CLOCKS_PER_SEC >= 100)
dfcd3bfb JM	490	? (ARMword) (clock () / (CLOCKS_PER_SEC / 100))
dfcd3bfb JM	491	: (ARMword) ((clock () * 100) / CLOCKS_PER_SEC);
c906108c	492	#else
dfcd3bfb JM	493	/* presume unix... clock() returns microseconds */
dfcd3bfb JM	494	(ARMword) (clock () / 10000);
c906108c SS	495	#endif
	496	OSptr->ErrorNo = errno;
	497	return (TRUE);
	498
	499	case AngelSWI_Reason_Time:
	500	state->Reg[0] = (ARMword) time (NULL);
	501	OSptr->ErrorNo = errno;
	502	return (TRUE);
	503
	504	case AngelSWI_Reason_WriteC:
dfcd3bfb	505	(void) fputc ((int) ARMul_ReadByte (state, addr), stdout);
c906108c SS	506	OSptr->ErrorNo = errno;
	507	return (TRUE);
	508
	509	case AngelSWI_Reason_Write0:
	510	SWIWrite0 (state, addr);
	511	return (TRUE);
	512
	513	case AngelSWI_Reason_Close:
	514	state->Reg[0] = close (ARMul_ReadWord (state, addr));
	515	OSptr->ErrorNo = errno;
	516	return (TRUE);
	517
	518	case AngelSWI_Reason_Seek:
dfcd3bfb JM	519	state->Reg[0] = -1 >= lseek (ARMul_ReadWord (state, addr),
dfcd3bfb JM	520	ARMul_ReadWord (state, addr + 4),
c906108c SS	521	SEEK_SET);
	522	OSptr->ErrorNo = errno;
	523	return (TRUE);
	524
	525	case AngelSWI_Reason_FLen:
	526	SWIflen (state, ARMul_ReadWord (state, addr));
	527	return (TRUE);
	528
dfcd3bfb	529	case AngelSWI_Reason_GetCmdLine:
c906108c SS	530	WriteCommandLineTo (state, ARMul_ReadWord (state, addr));
	531	return (TRUE);
	532
	533	case AngelSWI_Reason_HeapInfo:
	534	/* R1 is a pointer to a pointer */
	535	addr = ARMul_ReadWord (state, addr);
	536
	537	/* Pick up the right memory limit */
	538	if (state->MemSize)
	539	temp = state->MemSize;
	540	else
	541	temp = ADDRUSERSTACK;
	542
dfcd3bfb JM	543	ARMul_WriteWord (state, addr, 0); /* Heap base */
	544	ARMul_WriteWord (state, addr + 4, temp); /* Heap limit */
	545	ARMul_WriteWord (state, addr + 8, temp); /* Stack base */
	546	ARMul_WriteWord (state, addr + 12, temp); /* Stack limit */
c906108c SS	547	return (TRUE);
	548
	549	case AngelSWI_Reason_ReportException:
	550	if (state->Reg[1] == ADP_Stopped_ApplicationExit)
	551	state->Reg[0] = 0;
	552	else
	553	state->Reg[0] = -1;
dfcd3bfb	554	state->Emulate = FALSE;
6d358e86	555	return TRUE;
c906108c SS	556
	557	case ADP_Stopped_ApplicationExit:
	558	state->Reg[0] = 0;
dfcd3bfb	559	state->Emulate = FALSE;
c906108c	560	return (TRUE);
dfcd3bfb	561
c906108c SS	562	case ADP_Stopped_RunTimeError:
c906108c SS	563	state->Reg[0] = -1;
dfcd3bfb	564	state->Emulate = FALSE;
c906108c SS	565	return (TRUE);
	566
	567	case AngelSWI_Reason_Errno:
	568	state->Reg[0] = OSptr->ErrorNo;
	569	return (TRUE);
	570
	571	case AngelSWI_Reason_Open:
dfcd3bfb JM	572	SWIopen (state,
	573	ARMul_ReadWord (state, addr),
	574	ARMul_ReadWord (state, addr + 4));
c906108c SS	575	return TRUE;
	576
	577	case AngelSWI_Reason_Read:
dfcd3bfb JM	578	SWIread (state,
	579	ARMul_ReadWord (state, addr),
	580	ARMul_ReadWord (state, addr + 4),
	581	ARMul_ReadWord (state, addr + 8));
c906108c SS	582	return TRUE;
	583
	584	case AngelSWI_Reason_Write:
dfcd3bfb JM	585	SWIwrite (state,
	586	ARMul_ReadWord (state, addr),
	587	ARMul_ReadWord (state, addr + 4),
	588	ARMul_ReadWord (state, addr + 8));
c906108c SS	589	return TRUE;
	590	}
	591
f1129fb8 NC	592	case 0x90:
	593	case 0x92:
	594	/* These are used by the FPE code. */
	595	return TRUE;
	596
dfcd3bfb	597	default:
f1129fb8 NC	598	{
	599	/* If there is a SWI vector installed use it. */
	600	extern int SWI_vector_installed;
	601
	602	if (SWI_vector_installed && number != SWI_Breakpoint)
	603	{
	604	ARMword cpsr;
	605	ARMword i_size;
	606
	607	cpsr = ARMul_GetCPSR (state);
	608	i_size = INSN_SIZE;
	609
	610	ARMul_SetSPSR (state, SVC32MODE, cpsr);
	611
	612	cpsr &= ~0xbf;
	613	cpsr \|= SVC32MODE \| 0x80;
	614	ARMul_SetCPSR (state, cpsr);
	615
	616	state->RegBank[SVCBANK][14] = state->Reg[14] = state->Reg[15] - i_size;
	617	state->NextInstr = RESUME;
	618	state->Reg[15] = state->pc = ARMSWIV;
	619	FLUSHPIPE;
	620	}
	621	else
	622	fprintf (stderr, "unknown SWI encountered - %x - ignoring\n", number);
	623	return TRUE;
	624	}
c906108c SS	625	}
	626	}
	627
c906108c SS	628	#ifndef NOOS
	629	#ifndef ASIM
	630
f1129fb8 NC	631	/* The emulator calls this routine when an Exception occurs. The second
	632	parameter is the address of the relevant exception vector. Returning
	633	FALSE from this routine causes the trap to be taken, TRUE causes it to
	634	be ignored (so set state->Emulate to FALSE!). */
c906108c	635
dfcd3bfb	636	unsigned
f1129fb8 NC	637	ARMul_OSException (
	638	ARMul_State * state ATTRIBUTE_UNUSED,
	639	ARMword vector ATTRIBUTE_UNUSED,
	640	ARMword pc ATTRIBUTE_UNUSED)
	641	{
	642	return FALSE;
c906108c SS	643	}
	644
	645	#endif
c906108c	646	#endif /* NOOS */