[deliverable/binutils-gdb.git] / sim / arm / armvirt.c

/*  armvirt.c -- ARMulator virtual memory interace:  ARM6 Instruction Emulator.
    Copyright (C) 1994 Advanced RISC Machines Ltd.
 
    This program is free software; you can redistribute it and/or modify
    it under the terms of the GNU General Public License as published by
    the Free Software Foundation; either version 2 of the License, or
    (at your option) any later version.
 
    This program is distributed in the hope that it will be useful,
    but WITHOUT ANY WARRANTY; without even the implied warranty of
    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    GNU General Public License for more details.
 
    You should have received a copy of the GNU General Public License
    along with this program; if not, write to the Free Software
    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */

/* This file contains a complete ARMulator memory model, modelling a
"virtual memory" system. A much simpler model can be found in armfast.c,
and that model goes faster too, but has a fixed amount of memory. This
model's memory has 64K pages, allocated on demand from a 64K entry page
table. The routines PutWord and GetWord implement this. Pages are never
freed as they might be needed again. A single area of memory may be
defined to generate aborts. */

#include "armopts.h"
#include "armdefs.h"

#ifdef VALIDATE /* for running the validate suite */
#define TUBE 48 * 1024 * 1024 /* write a char on the screen */
#define ABORTS 1
#endif

#define ABORTS

#ifdef ABORTS /* the memory system will abort */
/* For the old test suite Abort between 32 Kbytes and 32 Mbytes
   For the new test suite Abort between 8 Mbytes and 26 Mbytes */
/* #define LOWABORT 32 * 1024
#define HIGHABORT 32 * 1024 * 1024 */
#define LOWABORT 8 * 1024 * 1024
#define HIGHABORT 26 * 1024 * 1024

#endif

#define NUMPAGES 64 * 1024
#define PAGESIZE 64 * 1024
#define PAGEBITS 16
#define OFFSETBITS 0xffff

/***************************************************************************\
*        Get a Word from Virtual Memory, maybe allocating the page          *
\***************************************************************************/

static ARMword
GetWord (ARMul_State * state, ARMword address)
{
  ARMword    page;
  ARMword    offset;
  ARMword ** pagetable;
  ARMword *  pageptr;

  page      = address >> PAGEBITS;
  offset    = (address & OFFSETBITS) >> 2;
  pagetable = (ARMword **) state->MemDataPtr;
  pageptr   = *(pagetable + page);
  
  if (pageptr == NULL)
    {
      pageptr = (ARMword *) malloc (PAGESIZE);
      
      if (pageptr == NULL)
	{
	  perror ("ARMulator can't allocate VM page");
	  exit (12);
	}
      
      *(pagetable + page) = pageptr;
    }
  
  return *(pageptr + offset);
}

/***************************************************************************\
*        Put a Word into Virtual Memory, maybe allocating the page          *
\***************************************************************************/

static void
PutWord (ARMul_State * state, ARMword address, ARMword data)
{
  ARMword    page;
  ARMword    offset;
  ARMword ** pagetable;
  ARMword *  pageptr;
  
  page      = address >> PAGEBITS;
  offset    = (address & OFFSETBITS) >> 2;
  pagetable = (ARMword **)state->MemDataPtr;
  pageptr   = *(pagetable + page);
  
  if (pageptr == NULL)
    {
      pageptr = (ARMword *) malloc (PAGESIZE);
      if (pageptr == NULL)
	{
	  perror ("ARMulator can't allocate VM page");
	  exit(13);
	}
      
      *(pagetable + page) = pageptr;
    }
  
  *(pageptr + offset) = data;
}

/***************************************************************************\
*                      Initialise the memory interface                      *
\***************************************************************************/

unsigned
ARMul_MemoryInit (ARMul_State * state, unsigned long initmemsize)
{
  ARMword ** pagetable;
  unsigned   page;

  if (initmemsize)
    state->MemSize = initmemsize;
  
  pagetable = (ARMword **) malloc (sizeof (ARMword) * NUMPAGES);
  
  if (pagetable == NULL)
    return FALSE;
  
  for (page = 0 ; page < NUMPAGES ; page++)
    *(pagetable + page) = NULL;
  
  state->MemDataPtr = (unsigned char *)pagetable;

  ARMul_ConsolePrint (state, ", 4 Gb memory");
  
 return TRUE;
}

/***************************************************************************\
*                         Remove the memory interface                       *
\***************************************************************************/

void
ARMul_MemoryExit (ARMul_State * state)
{
  ARMword    page;
  ARMword ** pagetable;
  ARMword *  pageptr;

  pagetable = (ARMword **)state->MemDataPtr;
  for (page = 0 ; page < NUMPAGES ; page++)
    {
      pageptr = *(pagetable + page);
      if (pageptr != NULL)
	free ((char *)pageptr);
    }
  free ((char *)pagetable);
  return;
}

/***************************************************************************\
*                   ReLoad Instruction                                     *
\***************************************************************************/

ARMword
ARMul_ReLoadInstr (ARMul_State * state, ARMword address, ARMword isize)
{
#ifdef ABORTS
  if (address >= LOWABORT && address < HIGHABORT) 
    {
      ARMul_PREFETCHABORT (address);
      return ARMul_ABORTWORD;
    }
 else
   {
     ARMul_CLEARABORT;
   }
#endif

 if ((isize == 2) && (address & 0x2))
   {
     /* We return the next two halfwords: */
     ARMword lo = GetWord (state, address);
     ARMword hi = GetWord (state, address + 4);

     if (state->bigendSig == HIGH)
       return (lo << 16) | (hi >> 16);
     else
       return ((hi & 0xFFFF) << 16) | (lo >> 16);
   }

  return GetWord (state, address);
}

/***************************************************************************\
*                   Load Instruction, Sequential Cycle                      *
\***************************************************************************/

ARMword
ARMul_LoadInstrS (ARMul_State * state, ARMword address, ARMword isize)
{
  state->NumScycles ++;

#ifdef HOURGLASS
  if (( state->NumScycles & HOURGLASS_RATE ) == 0)
    {
      HOURGLASS;
    }
#endif

  return ARMul_ReLoadInstr (state, address, isize);
}

/***************************************************************************\
*                 Load Instruction, Non Sequential Cycle                    *
\***************************************************************************/

ARMword
ARMul_LoadInstrN (ARMul_State * state, ARMword address, ARMword isize)
{
  state->NumNcycles ++;

  return ARMul_ReLoadInstr (state, address, isize);
}

/***************************************************************************\
*                      Read Word (but don't tell anyone!)                   *
\***************************************************************************/

ARMword
ARMul_ReadWord (ARMul_State * state, ARMword address)
{
#ifdef ABORTS
  if (address >= LOWABORT && address < HIGHABORT)
    {
      ARMul_DATAABORT (address);
      return ARMul_ABORTWORD;
    }
  else
    {
      ARMul_CLEARABORT;
    }
#endif

  return GetWord (state, address);
}

/***************************************************************************\
*                        Load Word, Sequential Cycle                        *
\***************************************************************************/

ARMword
ARMul_LoadWordS (ARMul_State * state, ARMword address)
{
  state->NumScycles ++;

  return ARMul_ReadWord (state, address);
}

/***************************************************************************\
*                      Load Word, Non Sequential Cycle                      *
\***************************************************************************/

ARMword
ARMul_LoadWordN (ARMul_State * state, ARMword address)
{
  state->NumNcycles ++;
  
  return ARMul_ReadWord (state, address);
}

/***************************************************************************\
*                     Load Halfword, (Non Sequential Cycle)                 *
\***************************************************************************/

ARMword
ARMul_LoadHalfWord (ARMul_State * state, ARMword address)
{
  ARMword temp, offset;

  state->NumNcycles ++;

  temp   = ARMul_ReadWord (state, address);
  offset = (((ARMword)state->bigendSig * 2) ^ (address & 2)) << 3; /* bit offset into the word */

  return (temp >> offset) & 0xffff;
}

/***************************************************************************\
*                      Read Byte (but don't tell anyone!)                   *
\***************************************************************************/

ARMword
ARMul_ReadByte (ARMul_State * state, ARMword address)
{
  ARMword temp, offset;

 temp   = ARMul_ReadWord (state, address);
 offset = (((ARMword)state->bigendSig * 3) ^ (address & 3)) << 3; /* bit offset into the word */

 return (temp >> offset & 0xffL);
}

/***************************************************************************\
*                     Load Byte, (Non Sequential Cycle)                     *
\***************************************************************************/

ARMword
ARMul_LoadByte (ARMul_State * state, ARMword address)
{
  state->NumNcycles ++;

  return ARMul_ReadByte (state, address);
}

/***************************************************************************\
*                     Write Word (but don't tell anyone!)                   *
\***************************************************************************/

void
ARMul_WriteWord (ARMul_State * state, ARMword address, ARMword data)
{
#ifdef ABORTS
  if (address >= LOWABORT && address < HIGHABORT)
    {
      ARMul_DATAABORT (address);
      return;
    }
  else
    {
      ARMul_CLEARABORT;
    }
#endif

  PutWord (state, address, data);
}

/***************************************************************************\
*                       Store Word, Sequential Cycle                        *
\***************************************************************************/

void
ARMul_StoreWordS (ARMul_State * state, ARMword address, ARMword data)
{
  state->NumScycles ++;

  ARMul_WriteWord (state, address, data);
}

/***************************************************************************\
*                       Store Word, Non Sequential Cycle                        *
\***************************************************************************/

void
ARMul_StoreWordN (ARMul_State * state, ARMword address, ARMword data)
{
  state->NumNcycles ++;

  ARMul_WriteWord (state, address, data);
}

/***************************************************************************\
*                    Store HalfWord, (Non Sequential Cycle)                 *
\***************************************************************************/

void
ARMul_StoreHalfWord (ARMul_State * state, ARMword address, ARMword data)
{
  ARMword temp, offset;

  state->NumNcycles ++;
 
#ifdef VALIDATE
  if (address == TUBE)
    {
      if (data == 4)
	state->Emulate = FALSE;
      else
	(void) putc ((char)data, stderr); /* Write Char */
      return;
    }
#endif

  temp   = ARMul_ReadWord (state, address);
  offset = (((ARMword)state->bigendSig * 2) ^ (address & 2)) << 3; /* bit offset into the word */
 
  PutWord (state, address, (temp & ~(0xffffL << offset)) | ((data & 0xffffL) << offset));
}

/***************************************************************************\
*                     Write Byte (but don't tell anyone!)                   *
\***************************************************************************/

void
ARMul_WriteByte (ARMul_State * state, ARMword address, ARMword data)
{
  ARMword temp, offset;

  temp   = ARMul_ReadWord (state, address);
  offset = (((ARMword)state->bigendSig * 3) ^ (address & 3)) << 3; /* bit offset into the word */
  
  PutWord (state, address, (temp & ~(0xffL << offset)) | ((data & 0xffL) << offset));
}

/***************************************************************************\
*                    Store Byte, (Non Sequential Cycle)                     *
\***************************************************************************/

void
ARMul_StoreByte (ARMul_State * state, ARMword address, ARMword data)
{
  state->NumNcycles ++;

#ifdef VALIDATE
  if (address == TUBE)
    {
      if (data == 4)
	state->Emulate = FALSE;
      else
	(void) putc ((char)data,stderr); /* Write Char */
      return;
    }
#endif

  ARMul_WriteByte (state, address, data);
}

/***************************************************************************\
*                   Swap Word, (Two Non Sequential Cycles)                  *
\***************************************************************************/

ARMword
ARMul_SwapWord (ARMul_State * state, ARMword address, ARMword data)
{
  ARMword temp;

  state->NumNcycles ++;

  temp = ARMul_ReadWord (state, address);
  
  state->NumNcycles ++;
  
  PutWord (state, address, data);
  
  return temp;
}

/***************************************************************************\
*                   Swap Byte, (Two Non Sequential Cycles)                  *
\***************************************************************************/

ARMword
ARMul_SwapByte (ARMul_State * state, ARMword address, ARMword data)
{
  ARMword temp;

  temp = ARMul_LoadByte (state, address);
  ARMul_StoreByte (state, address, data);
  
  return temp;
}

/***************************************************************************\
*                             Count I Cycles                                *
\***************************************************************************/

void
ARMul_Icycles (ARMul_State * state, unsigned number, ARMword address)
{
  state->NumIcycles += number;
  ARMul_CLEARABORT;
}

/***************************************************************************\
*                             Count C Cycles                                *
\***************************************************************************/

void
ARMul_Ccycles (ARMul_State * state, unsigned number, ARMword address)
{
  state->NumCcycles += number;
  ARMul_CLEARABORT;
}
Commit	Line	Data
c906108c SS	1	/* armvirt.c -- ARMulator virtual memory interace: ARM6 Instruction Emulator.
	2	Copyright (C) 1994 Advanced RISC Machines Ltd.
	3
	4	This program is free software; you can redistribute it and/or modify
	5	it under the terms of the GNU General Public License as published by
	6	the Free Software Foundation; either version 2 of the License, or
	7	(at your option) any later version.
	8
	9	This program is distributed in the hope that it will be useful,
	10	but WITHOUT ANY WARRANTY; without even the implied warranty of
	11	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	12	GNU General Public License for more details.
	13
	14	You should have received a copy of the GNU General Public License
	15	along with this program; if not, write to the Free Software
	16	Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
	17
	18	/* This file contains a complete ARMulator memory model, modelling a
	19	"virtual memory" system. A much simpler model can be found in armfast.c,
	20	and that model goes faster too, but has a fixed amount of memory. This
	21	model's memory has 64K pages, allocated on demand from a 64K entry page
	22	table. The routines PutWord and GetWord implement this. Pages are never
	23	freed as they might be needed again. A single area of memory may be
	24	defined to generate aborts. */
	25
	26	#include "armopts.h"
	27	#include "armdefs.h"
	28
	29	#ifdef VALIDATE /* for running the validate suite */
	30	#define TUBE 48 * 1024 * 1024 /* write a char on the screen */
	31	#define ABORTS 1
	32	#endif
	33
	34	#define ABORTS
	35
	36	#ifdef ABORTS /* the memory system will abort */
	37	/* For the old test suite Abort between 32 Kbytes and 32 Mbytes
	38	For the new test suite Abort between 8 Mbytes and 26 Mbytes */
	39	/* #define LOWABORT 32 * 1024
	40	#define HIGHABORT 32 * 1024 * 1024 */
	41	#define LOWABORT 8 * 1024 * 1024
	42	#define HIGHABORT 26 * 1024 * 1024
	43
	44	#endif
	45
	46	#define NUMPAGES 64 * 1024
	47	#define PAGESIZE 64 * 1024
	48	#define PAGEBITS 16
	49	#define OFFSETBITS 0xffff
	50
	51	/***************************************************************************\
	52	* Get a Word from Virtual Memory, maybe allocating the page *
	53	\***************************************************************************/
	54
	55	static ARMword
	56	GetWord (ARMul_State * state, ARMword address)
	57	{
	58	ARMword page;
	59	ARMword offset;
	60	ARMword ** pagetable;
	61	ARMword * pageptr;
	62
	63	page = address >> PAGEBITS;
	64	offset = (address & OFFSETBITS) >> 2;
65	pagetable = (ARMword **) state->MemDataPtr;
66	pageptr = *(pagetable + page);
67
68	if (pageptr == NULL)
69	{
70	pageptr = (ARMword *) malloc (PAGESIZE);
71
72	if (pageptr == NULL)
73	{
74	perror ("ARMulator can't allocate VM page");
75	exit (12);
76	}
77
78	*(pagetable + page) = pageptr;
79	}
80
81	return *(pageptr + offset);
82	}
83
84	/***************************************************************************\
85	* Put a Word into Virtual Memory, maybe allocating the page *
86	\***************************************************************************/
87
88	static void
89	PutWord (ARMul_State * state, ARMword address, ARMword data)
90	{
91	ARMword page;
92	ARMword offset;
93	ARMword ** pagetable;
94	ARMword * pageptr;
95
96	page = address >> PAGEBITS;
97	offset = (address & OFFSETBITS) >> 2;
98	pagetable = (ARMword **)state->MemDataPtr;
99	pageptr = *(pagetable + page);
100
101	if (pageptr == NULL)
102	{
103	pageptr = (ARMword *) malloc (PAGESIZE);
104	if (pageptr == NULL)
105	{
106	perror ("ARMulator can't allocate VM page");
107	exit(13);
108	}
109
110	*(pagetable + page) = pageptr;
111	}
112
113	*(pageptr + offset) = data;
114	}
115
116	/***************************************************************************\
117	* Initialise the memory interface *
118	\***************************************************************************/
119
120	unsigned
121	ARMul_MemoryInit (ARMul_State * state, unsigned long initmemsize)
122	{
123	ARMword ** pagetable;
124	unsigned page;
125
126	if (initmemsize)
127	state->MemSize = initmemsize;
128
129	pagetable = (ARMword *) malloc (sizeof (ARMword) NUMPAGES);
130
131	if (pagetable == NULL)
132	return FALSE;
133
134	for (page = 0 ; page < NUMPAGES ; page++)
135	*(pagetable + page) = NULL;
136
137	state->MemDataPtr = (unsigned char *)pagetable;
138
139	ARMul_ConsolePrint (state, ", 4 Gb memory");
140
141	return TRUE;
142	}
143
144	/***************************************************************************\
145	* Remove the memory interface *
146	\***************************************************************************/
147
148	void
149	ARMul_MemoryExit (ARMul_State * state)
150	{
151	ARMword page;
152	ARMword ** pagetable;
153	ARMword * pageptr;
154
155	pagetable = (ARMword **)state->MemDataPtr;
156	for (page = 0 ; page < NUMPAGES ; page++)
157	{
158	pageptr = *(pagetable + page);
159	if (pageptr != NULL)
160	free ((char *)pageptr);
161	}
162	free ((char *)pagetable);
163	return;
164	}
165
166	/***************************************************************************\
167	* ReLoad Instruction *
168	\***************************************************************************/
169
170	ARMword
171	ARMul_ReLoadInstr (ARMul_State * state, ARMword address, ARMword isize)
172	{
173	#ifdef ABORTS
174	if (address >= LOWABORT && address < HIGHABORT)
175	{
176	ARMul_PREFETCHABORT (address);
177	return ARMul_ABORTWORD;
178	}
179	else
180	{
181	ARMul_CLEARABORT;
182	}
183	#endif
184
185	if ((isize == 2) && (address & 0x2))
186	{
187	/* We return the next two halfwords: */
188	ARMword lo = GetWord (state, address);
189	ARMword hi = GetWord (state, address + 4);
190
191	if (state->bigendSig == HIGH)
192	return (lo << 16) \| (hi >> 16);
193	else
194	return ((hi & 0xFFFF) << 16) \| (lo >> 16);
195	}
196
197	return GetWord (state, address);
198	}
199
200	/***************************************************************************\
201	* Load Instruction, Sequential Cycle *
202	\***************************************************************************/
203
204	ARMword
205	ARMul_LoadInstrS (ARMul_State * state, ARMword address, ARMword isize)
206	{
207	state->NumScycles ++;
208
209	#ifdef HOURGLASS
210	if (( state->NumScycles & HOURGLASS_RATE ) == 0)
211	{
212	HOURGLASS;
213	}
214	#endif
215
216	return ARMul_ReLoadInstr (state, address, isize);
217	}
218
219	/***************************************************************************\
220	* Load Instruction, Non Sequential Cycle *
221	\***************************************************************************/
222
223	ARMword
224	ARMul_LoadInstrN (ARMul_State * state, ARMword address, ARMword isize)
225	{
226	state->NumNcycles ++;
227
228	return ARMul_ReLoadInstr (state, address, isize);
229	}
230
231	/***************************************************************************\
232	* Read Word (but don't tell anyone!) *
233	\***************************************************************************/
234
235	ARMword
236	ARMul_ReadWord (ARMul_State * state, ARMword address)
237	{
238	#ifdef ABORTS
239	if (address >= LOWABORT && address < HIGHABORT)
240	{
241	ARMul_DATAABORT (address);
242	return ARMul_ABORTWORD;
243	}
244	else
245	{
246	ARMul_CLEARABORT;
247	}
248	#endif
249
250	return GetWord (state, address);
251	}
252
253	/***************************************************************************\
254	* Load Word, Sequential Cycle *
255	\***************************************************************************/
256
257	ARMword
258	ARMul_LoadWordS (ARMul_State * state, ARMword address)
259	{
260	state->NumScycles ++;
261
262	return ARMul_ReadWord (state, address);
263	}
264
265	/***************************************************************************\
266	* Load Word, Non Sequential Cycle *
267	\***************************************************************************/
268
269	ARMword
270	ARMul_LoadWordN (ARMul_State * state, ARMword address)
271	{
272	state->NumNcycles ++;
273
274	return ARMul_ReadWord (state, address);
275	}
276
277	/***************************************************************************\
278	* Load Halfword, (Non Sequential Cycle) *
279	\***************************************************************************/
280
281	ARMword
282	ARMul_LoadHalfWord (ARMul_State * state, ARMword address)
283	{
284	ARMword temp, offset;
285
286	state->NumNcycles ++;
287
288	temp = ARMul_ReadWord (state, address);
289	offset = (((ARMword)state->bigendSig * 2) ^ (address & 2)) << 3; /* bit offset into the word */
290
291	return (temp >> offset) & 0xffff;
292	}
293
294	/***************************************************************************\
295	* Read Byte (but don't tell anyone!) *
296	\***************************************************************************/
297
298	ARMword
299	ARMul_ReadByte (ARMul_State * state, ARMword address)
300	{
301	ARMword temp, offset;
302
303	temp = ARMul_ReadWord (state, address);
304	offset = (((ARMword)state->bigendSig * 3) ^ (address & 3)) << 3; /* bit offset into the word */
305
306	return (temp >> offset & 0xffL);
307	}
308
309	/***************************************************************************\
310	* Load Byte, (Non Sequential Cycle) *
311	\***************************************************************************/
312
313	ARMword
314	ARMul_LoadByte (ARMul_State * state, ARMword address)
315	{
316	state->NumNcycles ++;
317
318	return ARMul_ReadByte (state, address);
319	}
320
321	/***************************************************************************\
322	* Write Word (but don't tell anyone!) *
323	\***************************************************************************/
324
325	void
326	ARMul_WriteWord (ARMul_State * state, ARMword address, ARMword data)
327	{
328	#ifdef ABORTS
329	if (address >= LOWABORT && address < HIGHABORT)
330	{
331	ARMul_DATAABORT (address);
332	return;
333	}
334	else
335	{
336	ARMul_CLEARABORT;
337	}
338	#endif
339
340	PutWord (state, address, data);
341	}
342
343	/***************************************************************************\
344	* Store Word, Sequential Cycle *
345	\***************************************************************************/
346
347	void
348	ARMul_StoreWordS (ARMul_State * state, ARMword address, ARMword data)
349	{
350	state->NumScycles ++;
351
352	ARMul_WriteWord (state, address, data);
353	}
354
355	/***************************************************************************\
356	* Store Word, Non Sequential Cycle *
357	\***************************************************************************/
358
359	void
360	ARMul_StoreWordN (ARMul_State * state, ARMword address, ARMword data)
361	{
362	state->NumNcycles ++;
363
364	ARMul_WriteWord (state, address, data);
365	}
366
367	/***************************************************************************\
368	* Store HalfWord, (Non Sequential Cycle) *
369	\***************************************************************************/
370
371	void
372	ARMul_StoreHalfWord (ARMul_State * state, ARMword address, ARMword data)
373	{
374	ARMword temp, offset;
375
376	state->NumNcycles ++;
377
378	#ifdef VALIDATE
379	if (address == TUBE)
380	{
381	if (data == 4)
382	state->Emulate = FALSE;
383	else
384	(void) putc ((char)data, stderr); /* Write Char */
385	return;
386	}
387	#endif
388
389	temp = ARMul_ReadWord (state, address);
390	offset = (((ARMword)state->bigendSig * 2) ^ (address & 2)) << 3; /* bit offset into the word */
391
392	PutWord (state, address, (temp & ~(0xffffL << offset)) \| ((data & 0xffffL) << offset));
393	}
394
395	/***************************************************************************\
396	* Write Byte (but don't tell anyone!) *
397	\***************************************************************************/
398
399	void
400	ARMul_WriteByte (ARMul_State * state, ARMword address, ARMword data)
401	{
402	ARMword temp, offset;
403
404	temp = ARMul_ReadWord (state, address);
405	offset = (((ARMword)state->bigendSig * 3) ^ (address & 3)) << 3; /* bit offset into the word */
406
407	PutWord (state, address, (temp & ~(0xffL << offset)) \| ((data & 0xffL) << offset));
408	}
409
410	/***************************************************************************\
411	* Store Byte, (Non Sequential Cycle) *
412	\***************************************************************************/
413
414	void
415	ARMul_StoreByte (ARMul_State * state, ARMword address, ARMword data)
416	{
417	state->NumNcycles ++;
418
419	#ifdef VALIDATE
420	if (address == TUBE)
421	{
422	if (data == 4)
423	state->Emulate = FALSE;
424	else
425	(void) putc ((char)data,stderr); /* Write Char */
426	return;
427	}
428	#endif
429
430	ARMul_WriteByte (state, address, data);
431	}
432
433	/***************************************************************************\
434	* Swap Word, (Two Non Sequential Cycles) *
435	\***************************************************************************/
436
437	ARMword
438	ARMul_SwapWord (ARMul_State * state, ARMword address, ARMword data)
439	{
440	ARMword temp;
441
442	state->NumNcycles ++;
443
444	temp = ARMul_ReadWord (state, address);
445
446	state->NumNcycles ++;
447
448	PutWord (state, address, data);
449
450	return temp;
451	}
452
453	/***************************************************************************\
454	* Swap Byte, (Two Non Sequential Cycles) *
455	\***************************************************************************/
456
457	ARMword
458	ARMul_SwapByte (ARMul_State * state, ARMword address, ARMword data)
459	{
460	ARMword temp;
461
462	temp = ARMul_LoadByte (state, address);
463	ARMul_StoreByte (state, address, data);
464
465	return temp;
466	}
467
468	/***************************************************************************\
469	* Count I Cycles *
470	\***************************************************************************/
471
472	void
473	ARMul_Icycles (ARMul_State * state, unsigned number, ARMword address)
474	{
475	state->NumIcycles += number;
476	ARMul_CLEARABORT;
477	}
478
479	/***************************************************************************\
480	* Count C Cycles *
481	\***************************************************************************/
482
483	void
484	ARMul_Ccycles (ARMul_State * state, unsigned number, ARMword address)
485	{
486	state->NumCcycles += number;
487	ARMul_CLEARABORT;
488	}
489
490
491