[deliverable/binutils-gdb.git] / sim / arm / armvirt.c

/*  armvirt.c -- ARMulator virtual memory interace:  ARM6 Instruction Emulator.
    Copyright (C) 1994 Advanced RISC Machines Ltd.
 
    This program is free software; you can redistribute it and/or modify
    it under the terms of the GNU General Public License as published by
    the Free Software Foundation; either version 2 of the License, or
    (at your option) any later version.
 
    This program is distributed in the hope that it will be useful,
    but WITHOUT ANY WARRANTY; without even the implied warranty of
    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    GNU General Public License for more details.
 
    You should have received a copy of the GNU General Public License
    along with this program; if not, write to the Free Software
    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */

/* This file contains a complete ARMulator memory model, modelling a
"virtual memory" system. A much simpler model can be found in armfast.c,
and that model goes faster too, but has a fixed amount of memory. This
model's memory has 64K pages, allocated on demand from a 64K entry page
table. The routines PutWord and GetWord implement this. Pages are never
freed as they might be needed again. A single area of memory may be
defined to generate aborts. */

#include "armopts.h"
#include "armdefs.h"
#include "ansidecl.h"

#ifdef VALIDATE			/* for running the validate suite */
#define TUBE 48 * 1024 * 1024	/* write a char on the screen */
#define ABORTS 1
#endif

/* #define ABORTS */

#ifdef ABORTS			/* the memory system will abort */
/* For the old test suite Abort between 32 Kbytes and 32 Mbytes
   For the new test suite Abort between 8 Mbytes and 26 Mbytes */
/* #define LOWABORT 32 * 1024
#define HIGHABORT 32 * 1024 * 1024 */
#define LOWABORT 8 * 1024 * 1024
#define HIGHABORT 26 * 1024 * 1024

#endif

#define NUMPAGES 64 * 1024
#define PAGESIZE 64 * 1024
#define PAGEBITS 16
#define OFFSETBITS 0xffff

/***************************************************************************\
*        Get a Word from Virtual Memory, maybe allocating the page          *
\***************************************************************************/

static ARMword
GetWord (ARMul_State * state, ARMword address)
{
  ARMword page;
  ARMword offset;
  ARMword **pagetable;
  ARMword *pageptr;

  page = address >> PAGEBITS;
  offset = (address & OFFSETBITS) >> 2;
  pagetable = (ARMword **) state->MemDataPtr;
  pageptr = *(pagetable + page);

  if (pageptr == NULL)
    {
      pageptr = (ARMword *) malloc (PAGESIZE);

      if (pageptr == NULL)
	{
	  perror ("ARMulator can't allocate VM page");
	  exit (12);
	}

      *(pagetable + page) = pageptr;
    }

  return *(pageptr + offset);
}

/***************************************************************************\
*        Put a Word into Virtual Memory, maybe allocating the page          *
\***************************************************************************/

static void
PutWord (ARMul_State * state, ARMword address, ARMword data)
{
  ARMword page;
  ARMword offset;
  ARMword **pagetable;
  ARMword *pageptr;

  page = address >> PAGEBITS;
  offset = (address & OFFSETBITS) >> 2;
  pagetable = (ARMword **) state->MemDataPtr;
  pageptr = *(pagetable + page);

  if (pageptr == NULL)
    {
      pageptr = (ARMword *) malloc (PAGESIZE);
      if (pageptr == NULL)
	{
	  perror ("ARMulator can't allocate VM page");
	  exit (13);
	}

      *(pagetable + page) = pageptr;
    }

  *(pageptr + offset) = data;
}

/***************************************************************************\
*                      Initialise the memory interface                      *
\***************************************************************************/

unsigned
ARMul_MemoryInit (ARMul_State * state, unsigned long initmemsize)
{
  ARMword **pagetable;
  unsigned page;

  if (initmemsize)
    state->MemSize = initmemsize;

  pagetable = (ARMword **) malloc (sizeof (ARMword) * NUMPAGES);

  if (pagetable == NULL)
    return FALSE;

  for (page = 0; page < NUMPAGES; page++)
    *(pagetable + page) = NULL;

  state->MemDataPtr = (unsigned char *) pagetable;

  ARMul_ConsolePrint (state, ", 4 Gb memory");

  return TRUE;
}

/***************************************************************************\
*                         Remove the memory interface                       *
\***************************************************************************/

void
ARMul_MemoryExit (ARMul_State * state)
{
  ARMword page;
  ARMword **pagetable;
  ARMword *pageptr;

  pagetable = (ARMword **) state->MemDataPtr;
  for (page = 0; page < NUMPAGES; page++)
    {
      pageptr = *(pagetable + page);
      if (pageptr != NULL)
	free ((char *) pageptr);
    }
  free ((char *) pagetable);
  return;
}

/***************************************************************************\
*                   ReLoad Instruction                                     *
\***************************************************************************/

ARMword
ARMul_ReLoadInstr (ARMul_State * state, ARMword address, ARMword isize)
{
#ifdef ABORTS
  if (address >= LOWABORT && address < HIGHABORT)
    {
      ARMul_PREFETCHABORT (address);
      return ARMul_ABORTWORD;
    }
  else
    {
      ARMul_CLEARABORT;
    }
#endif

  if ((isize == 2) && (address & 0x2))
    {
      /* We return the next two halfwords: */
      ARMword lo = GetWord (state, address);
      ARMword hi = GetWord (state, address + 4);

      if (state->bigendSig == HIGH)
	return (lo << 16) | (hi >> 16);
      else
	return ((hi & 0xFFFF) << 16) | (lo >> 16);
    }

  return GetWord (state, address);
}

/***************************************************************************\
*                   Load Instruction, Sequential Cycle                      *
\***************************************************************************/

ARMword ARMul_LoadInstrS (ARMul_State * state, ARMword address, ARMword isize)
{
  state->NumScycles++;

#ifdef HOURGLASS
  if ((state->NumScycles & HOURGLASS_RATE) == 0)
    {
      HOURGLASS;
    }
#endif

  return ARMul_ReLoadInstr (state, address, isize);
}

/***************************************************************************\
*                 Load Instruction, Non Sequential Cycle                    *
\***************************************************************************/

ARMword ARMul_LoadInstrN (ARMul_State * state, ARMword address, ARMword isize)
{
  state->NumNcycles++;

  return ARMul_ReLoadInstr (state, address, isize);
}

/***************************************************************************\
*                      Read Word (but don't tell anyone!)                   *
\***************************************************************************/

ARMword ARMul_ReadWord (ARMul_State * state, ARMword address)
{
#ifdef ABORTS
  if (address >= LOWABORT && address < HIGHABORT)
    {
      ARMul_DATAABORT (address);
      return ARMul_ABORTWORD;
    }
  else
    {
      ARMul_CLEARABORT;
    }
#endif

  return GetWord (state, address);
}

/***************************************************************************\
*                        Load Word, Sequential Cycle                        *
\***************************************************************************/

ARMword ARMul_LoadWordS (ARMul_State * state, ARMword address)
{
  state->NumScycles++;

  return ARMul_ReadWord (state, address);
}

/***************************************************************************\
*                      Load Word, Non Sequential Cycle                      *
\***************************************************************************/

ARMword ARMul_LoadWordN (ARMul_State * state, ARMword address)
{
  state->NumNcycles++;

  return ARMul_ReadWord (state, address);
}

/***************************************************************************\
*                     Load Halfword, (Non Sequential Cycle)                 *
\***************************************************************************/

ARMword ARMul_LoadHalfWord (ARMul_State * state, ARMword address)
{
  ARMword temp, offset;

  state->NumNcycles++;

  temp = ARMul_ReadWord (state, address);
  offset = (((ARMword) state->bigendSig * 2) ^ (address & 2)) << 3;	/* bit offset into the word */

  return (temp >> offset) & 0xffff;
}

/***************************************************************************\
*                      Read Byte (but don't tell anyone!)                   *
\***************************************************************************/

ARMword ARMul_ReadByte (ARMul_State * state, ARMword address)
{
  ARMword temp, offset;

  temp = ARMul_ReadWord (state, address);
  offset = (((ARMword) state->bigendSig * 3) ^ (address & 3)) << 3;	/* bit offset into the word */

  return (temp >> offset & 0xffL);
}

/***************************************************************************\
*                     Load Byte, (Non Sequential Cycle)                     *
\***************************************************************************/

ARMword ARMul_LoadByte (ARMul_State * state, ARMword address)
{
  state->NumNcycles++;

  return ARMul_ReadByte (state, address);
}

/***************************************************************************\
*                     Write Word (but don't tell anyone!)                   *
\***************************************************************************/

void
ARMul_WriteWord (ARMul_State * state, ARMword address, ARMword data)
{
#ifdef ABORTS
  if (address >= LOWABORT && address < HIGHABORT)
    {
      ARMul_DATAABORT (address);
      return;
    }
  else
    {
      ARMul_CLEARABORT;
    }
#endif

  PutWord (state, address, data);
}

/***************************************************************************\
*                       Store Word, Sequential Cycle                        *
\***************************************************************************/

void
ARMul_StoreWordS (ARMul_State * state, ARMword address, ARMword data)
{
  state->NumScycles++;

  ARMul_WriteWord (state, address, data);
}

/***************************************************************************\
*                       Store Word, Non Sequential Cycle                        *
\***************************************************************************/

void
ARMul_StoreWordN (ARMul_State * state, ARMword address, ARMword data)
{
  state->NumNcycles++;

  ARMul_WriteWord (state, address, data);
}

/***************************************************************************\
*                    Store HalfWord, (Non Sequential Cycle)                 *
\***************************************************************************/

void
ARMul_StoreHalfWord (ARMul_State * state, ARMword address, ARMword data)
{
  ARMword temp, offset;

  state->NumNcycles++;

#ifdef VALIDATE
  if (address == TUBE)
    {
      if (data == 4)
	state->Emulate = FALSE;
      else
	(void) putc ((char) data, stderr);	/* Write Char */
      return;
    }
#endif

  temp = ARMul_ReadWord (state, address);
  offset = (((ARMword) state->bigendSig * 2) ^ (address & 2)) << 3;	/* bit offset into the word */

  PutWord (state, address,
	   (temp & ~(0xffffL << offset)) | ((data & 0xffffL) << offset));
}

/***************************************************************************\
*                     Write Byte (but don't tell anyone!)                   *
\***************************************************************************/

void
ARMul_WriteByte (ARMul_State * state, ARMword address, ARMword data)
{
  ARMword temp, offset;

  temp = ARMul_ReadWord (state, address);
  offset = (((ARMword) state->bigendSig * 3) ^ (address & 3)) << 3;	/* bit offset into the word */

  PutWord (state, address,
	   (temp & ~(0xffL << offset)) | ((data & 0xffL) << offset));
}

/***************************************************************************\
*                    Store Byte, (Non Sequential Cycle)                     *
\***************************************************************************/

void
ARMul_StoreByte (ARMul_State * state, ARMword address, ARMword data)
{
  state->NumNcycles++;

#ifdef VALIDATE
  if (address == TUBE)
    {
      if (data == 4)
	state->Emulate = FALSE;
      else
	(void) putc ((char) data, stderr);	/* Write Char */
      return;
    }
#endif

  ARMul_WriteByte (state, address, data);
}

/***************************************************************************\
*                   Swap Word, (Two Non Sequential Cycles)                  *
\***************************************************************************/

ARMword ARMul_SwapWord (ARMul_State * state, ARMword address, ARMword data)
{
  ARMword temp;

  state->NumNcycles++;

  temp = ARMul_ReadWord (state, address);

  state->NumNcycles++;

  PutWord (state, address, data);

  return temp;
}

/***************************************************************************\
*                   Swap Byte, (Two Non Sequential Cycles)                  *
\***************************************************************************/

ARMword ARMul_SwapByte (ARMul_State * state, ARMword address, ARMword data)
{
  ARMword temp;

  temp = ARMul_LoadByte (state, address);
  ARMul_StoreByte (state, address, data);

  return temp;
}

/***************************************************************************\
*                             Count I Cycles                                *
\***************************************************************************/

void
ARMul_Icycles (ARMul_State * state, unsigned number, ARMword address ATTRIBUTE_UNUSED)
{
  state->NumIcycles += number;
  ARMul_CLEARABORT;
}

/***************************************************************************\
*                             Count C Cycles                                *
\***************************************************************************/

void
ARMul_Ccycles (ARMul_State * state, unsigned number, ARMword address ATTRIBUTE_UNUSED)
{
  state->NumCcycles += number;
  ARMul_CLEARABORT;
}
Commit	Line	Data
c906108c SS	1	/* armvirt.c -- ARMulator virtual memory interace: ARM6 Instruction Emulator.
	2	Copyright (C) 1994 Advanced RISC Machines Ltd.
	3
	4	This program is free software; you can redistribute it and/or modify
	5	it under the terms of the GNU General Public License as published by
	6	the Free Software Foundation; either version 2 of the License, or
	7	(at your option) any later version.
	8
	9	This program is distributed in the hope that it will be useful,
	10	but WITHOUT ANY WARRANTY; without even the implied warranty of
	11	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	12	GNU General Public License for more details.
	13
	14	You should have received a copy of the GNU General Public License
	15	along with this program; if not, write to the Free Software
	16	Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
	17
	18	/* This file contains a complete ARMulator memory model, modelling a
	19	"virtual memory" system. A much simpler model can be found in armfast.c,
	20	and that model goes faster too, but has a fixed amount of memory. This
	21	model's memory has 64K pages, allocated on demand from a 64K entry page
	22	table. The routines PutWord and GetWord implement this. Pages are never
	23	freed as they might be needed again. A single area of memory may be
	24	defined to generate aborts. */
	25
	26	#include "armopts.h"
	27	#include "armdefs.h"
6d358e86	28	#include "ansidecl.h"
c906108c	29
dfcd3bfb JM	30	#ifdef VALIDATE /* for running the validate suite */
dfcd3bfb JM	31	#define TUBE 48 * 1024 * 1024 /* write a char on the screen */
c906108c SS	32	#define ABORTS 1
	33	#endif
	34
ae3c7619	35	/* #define ABORTS */
c906108c	36
dfcd3bfb	37	#ifdef ABORTS /* the memory system will abort */
c906108c SS	38	/* For the old test suite Abort between 32 Kbytes and 32 Mbytes
	39	For the new test suite Abort between 8 Mbytes and 26 Mbytes */
	40	/* #define LOWABORT 32 * 1024
	41	#define HIGHABORT 32 * 1024 * 1024 */
	42	#define LOWABORT 8 * 1024 * 1024
	43	#define HIGHABORT 26 * 1024 * 1024
	44
	45	#endif
	46
	47	#define NUMPAGES 64 * 1024
	48	#define PAGESIZE 64 * 1024
	49	#define PAGEBITS 16
	50	#define OFFSETBITS 0xffff
	51
	52	/***************************************************************************\
	53	* Get a Word from Virtual Memory, maybe allocating the page *
	54	\***************************************************************************/
	55
	56	static ARMword
	57	GetWord (ARMul_State * state, ARMword address)
	58	{
dfcd3bfb JM	59	ARMword page;
	60	ARMword offset;
	61	ARMword **pagetable;
	62	ARMword *pageptr;
c906108c	63
dfcd3bfb JM	64	page = address >> PAGEBITS;
dfcd3bfb JM	65	offset = (address & OFFSETBITS) >> 2;
c906108c	66	pagetable = (ARMword **) state->MemDataPtr;
dfcd3bfb JM	67	pageptr = *(pagetable + page);
dfcd3bfb JM	68
c906108c SS	69	if (pageptr == NULL)
	70	{
	71	pageptr = (ARMword *) malloc (PAGESIZE);
dfcd3bfb	72
c906108c SS	73	if (pageptr == NULL)
	74	{
	75	perror ("ARMulator can't allocate VM page");
	76	exit (12);
	77	}
dfcd3bfb	78
c906108c SS	79	*(pagetable + page) = pageptr;
c906108c SS	80	}
dfcd3bfb	81
c906108c SS	82	return *(pageptr + offset);
	83	}
	84
	85	/***************************************************************************\
	86	* Put a Word into Virtual Memory, maybe allocating the page *
	87	\***************************************************************************/
	88
	89	static void
	90	PutWord (ARMul_State * state, ARMword address, ARMword data)
	91	{
dfcd3bfb JM	92	ARMword page;
	93	ARMword offset;
	94	ARMword **pagetable;
	95	ARMword *pageptr;
	96
	97	page = address >> PAGEBITS;
	98	offset = (address & OFFSETBITS) >> 2;
	99	pagetable = (ARMword **) state->MemDataPtr;
	100	pageptr = *(pagetable + page);
	101
c906108c SS	102	if (pageptr == NULL)
	103	{
	104	pageptr = (ARMword *) malloc (PAGESIZE);
	105	if (pageptr == NULL)
	106	{
	107	perror ("ARMulator can't allocate VM page");
dfcd3bfb	108	exit (13);
c906108c	109	}
dfcd3bfb	110
c906108c SS	111	*(pagetable + page) = pageptr;
c906108c SS	112	}
dfcd3bfb	113
c906108c SS	114	*(pageptr + offset) = data;
	115	}
	116
	117	/***************************************************************************\
	118	* Initialise the memory interface *
	119	\***************************************************************************/
	120
	121	unsigned
	122	ARMul_MemoryInit (ARMul_State * state, unsigned long initmemsize)
	123	{
dfcd3bfb JM	124	ARMword **pagetable;
dfcd3bfb JM	125	unsigned page;
c906108c SS	126
	127	if (initmemsize)
	128	state->MemSize = initmemsize;
dfcd3bfb	129
c906108c	130	pagetable = (ARMword *) malloc (sizeof (ARMword) NUMPAGES);
dfcd3bfb	131
c906108c SS	132	if (pagetable == NULL)
c906108c SS	133	return FALSE;
dfcd3bfb JM	134
dfcd3bfb JM	135	for (page = 0; page < NUMPAGES; page++)
c906108c	136	*(pagetable + page) = NULL;
dfcd3bfb JM	137
dfcd3bfb JM	138	state->MemDataPtr = (unsigned char *) pagetable;
c906108c SS	139
c906108c SS	140	ARMul_ConsolePrint (state, ", 4 Gb memory");
dfcd3bfb JM	141
dfcd3bfb JM	142	return TRUE;
c906108c SS	143	}
	144
	145	/***************************************************************************\
	146	* Remove the memory interface *
	147	\***************************************************************************/
	148
	149	void
	150	ARMul_MemoryExit (ARMul_State * state)
	151	{
dfcd3bfb JM	152	ARMword page;
	153	ARMword **pagetable;
	154	ARMword *pageptr;
c906108c	155
dfcd3bfb JM	156	pagetable = (ARMword **) state->MemDataPtr;
dfcd3bfb JM	157	for (page = 0; page < NUMPAGES; page++)
c906108c SS	158	{
	159	pageptr = *(pagetable + page);
	160	if (pageptr != NULL)
dfcd3bfb	161	free ((char *) pageptr);
c906108c	162	}
dfcd3bfb	163	free ((char *) pagetable);
c906108c SS	164	return;
	165	}
	166
	167	/***************************************************************************\
	168	* ReLoad Instruction *
	169	\***************************************************************************/
	170
	171	ARMword
	172	ARMul_ReLoadInstr (ARMul_State * state, ARMword address, ARMword isize)
	173	{
	174	#ifdef ABORTS
dfcd3bfb	175	if (address >= LOWABORT && address < HIGHABORT)
c906108c SS	176	{
	177	ARMul_PREFETCHABORT (address);
	178	return ARMul_ABORTWORD;
	179	}
dfcd3bfb JM	180	else
	181	{
	182	ARMul_CLEARABORT;
	183	}
c906108c SS	184	#endif
c906108c SS	185
dfcd3bfb JM	186	if ((isize == 2) && (address & 0x2))
	187	{
	188	/* We return the next two halfwords: */
	189	ARMword lo = GetWord (state, address);
	190	ARMword hi = GetWord (state, address + 4);
c906108c	191
dfcd3bfb JM	192	if (state->bigendSig == HIGH)
	193	return (lo << 16) \| (hi >> 16);
	194	else
	195	return ((hi & 0xFFFF) << 16) \| (lo >> 16);
	196	}
c906108c SS	197
	198	return GetWord (state, address);
	199	}
	200
	201	/***************************************************************************\
	202	* Load Instruction, Sequential Cycle *
	203	\***************************************************************************/
	204
dfcd3bfb	205	ARMword ARMul_LoadInstrS (ARMul_State * state, ARMword address, ARMword isize)
c906108c	206	{
dfcd3bfb	207	state->NumScycles++;
c906108c SS	208
c906108c SS	209	#ifdef HOURGLASS
dfcd3bfb	210	if ((state->NumScycles & HOURGLASS_RATE) == 0)
c906108c SS	211	{
	212	HOURGLASS;
	213	}
	214	#endif
	215
	216	return ARMul_ReLoadInstr (state, address, isize);
	217	}
	218
	219	/***************************************************************************\
	220	* Load Instruction, Non Sequential Cycle *
	221	\***************************************************************************/
	222
dfcd3bfb	223	ARMword ARMul_LoadInstrN (ARMul_State * state, ARMword address, ARMword isize)
c906108c	224	{
dfcd3bfb	225	state->NumNcycles++;
c906108c SS	226
	227	return ARMul_ReLoadInstr (state, address, isize);
	228	}
	229
	230	/***************************************************************************\
	231	* Read Word (but don't tell anyone!) *
	232	\***************************************************************************/
	233
dfcd3bfb	234	ARMword ARMul_ReadWord (ARMul_State * state, ARMword address)
c906108c SS	235	{
	236	#ifdef ABORTS
	237	if (address >= LOWABORT && address < HIGHABORT)
	238	{
	239	ARMul_DATAABORT (address);
	240	return ARMul_ABORTWORD;
	241	}
	242	else
	243	{
	244	ARMul_CLEARABORT;
	245	}
	246	#endif
	247
	248	return GetWord (state, address);
	249	}
	250
	251	/***************************************************************************\
	252	* Load Word, Sequential Cycle *
	253	\***************************************************************************/
	254
dfcd3bfb	255	ARMword ARMul_LoadWordS (ARMul_State * state, ARMword address)
c906108c	256	{
dfcd3bfb	257	state->NumScycles++;
c906108c SS	258
	259	return ARMul_ReadWord (state, address);
	260	}
	261
	262	/***************************************************************************\
	263	* Load Word, Non Sequential Cycle *
	264	\***************************************************************************/
	265
dfcd3bfb	266	ARMword ARMul_LoadWordN (ARMul_State * state, ARMword address)
c906108c	267	{
dfcd3bfb JM	268	state->NumNcycles++;
dfcd3bfb JM	269
c906108c SS	270	return ARMul_ReadWord (state, address);
	271	}
	272
	273	/***************************************************************************\
	274	* Load Halfword, (Non Sequential Cycle) *
	275	\***************************************************************************/
	276
dfcd3bfb	277	ARMword ARMul_LoadHalfWord (ARMul_State * state, ARMword address)
c906108c SS	278	{
	279	ARMword temp, offset;
	280
dfcd3bfb	281	state->NumNcycles++;
c906108c	282
dfcd3bfb JM	283	temp = ARMul_ReadWord (state, address);
dfcd3bfb JM	284	offset = (((ARMword) state->bigendSig * 2) ^ (address & 2)) << 3; /* bit offset into the word */
c906108c SS	285
	286	return (temp >> offset) & 0xffff;
	287	}
	288
	289	/***************************************************************************\
	290	* Read Byte (but don't tell anyone!) *
	291	\***************************************************************************/
	292
dfcd3bfb	293	ARMword ARMul_ReadByte (ARMul_State * state, ARMword address)
c906108c SS	294	{
	295	ARMword temp, offset;
	296
dfcd3bfb JM	297	temp = ARMul_ReadWord (state, address);
dfcd3bfb JM	298	offset = (((ARMword) state->bigendSig * 3) ^ (address & 3)) << 3; /* bit offset into the word */
c906108c	299
dfcd3bfb	300	return (temp >> offset & 0xffL);
c906108c SS	301	}
	302
	303	/***************************************************************************\
	304	* Load Byte, (Non Sequential Cycle) *
	305	\***************************************************************************/
	306
dfcd3bfb	307	ARMword ARMul_LoadByte (ARMul_State * state, ARMword address)
c906108c	308	{
dfcd3bfb	309	state->NumNcycles++;
c906108c SS	310
	311	return ARMul_ReadByte (state, address);
	312	}
	313
	314	/***************************************************************************\
	315	* Write Word (but don't tell anyone!) *
	316	\***************************************************************************/
	317
	318	void
	319	ARMul_WriteWord (ARMul_State * state, ARMword address, ARMword data)
	320	{
	321	#ifdef ABORTS
	322	if (address >= LOWABORT && address < HIGHABORT)
	323	{
	324	ARMul_DATAABORT (address);
	325	return;
	326	}
	327	else
	328	{
	329	ARMul_CLEARABORT;
	330	}
	331	#endif
	332
	333	PutWord (state, address, data);
	334	}
	335
	336	/***************************************************************************\
	337	* Store Word, Sequential Cycle *
	338	\***************************************************************************/
	339
	340	void
	341	ARMul_StoreWordS (ARMul_State * state, ARMword address, ARMword data)
	342	{
dfcd3bfb	343	state->NumScycles++;
c906108c SS	344
	345	ARMul_WriteWord (state, address, data);
	346	}
	347
	348	/***************************************************************************\
	349	* Store Word, Non Sequential Cycle *
	350	\***************************************************************************/
	351
	352	void
	353	ARMul_StoreWordN (ARMul_State * state, ARMword address, ARMword data)
	354	{
dfcd3bfb	355	state->NumNcycles++;
c906108c SS	356
	357	ARMul_WriteWord (state, address, data);
	358	}
	359
	360	/***************************************************************************\
	361	* Store HalfWord, (Non Sequential Cycle) *
	362	\***************************************************************************/
	363
	364	void
	365	ARMul_StoreHalfWord (ARMul_State * state, ARMword address, ARMword data)
	366	{
	367	ARMword temp, offset;
	368
dfcd3bfb JM	369	state->NumNcycles++;
dfcd3bfb JM	370
c906108c SS	371	#ifdef VALIDATE
	372	if (address == TUBE)
	373	{
	374	if (data == 4)
	375	state->Emulate = FALSE;
	376	else
dfcd3bfb	377	(void) putc ((char) data, stderr); /* Write Char */
c906108c SS	378	return;
	379	}
	380	#endif
	381
dfcd3bfb JM	382	temp = ARMul_ReadWord (state, address);
	383	offset = (((ARMword) state->bigendSig * 2) ^ (address & 2)) << 3; /* bit offset into the word */
	384
	385	PutWord (state, address,
	386	(temp & ~(0xffffL << offset)) \| ((data & 0xffffL) << offset));
c906108c SS	387	}
	388
	389	/***************************************************************************\
	390	* Write Byte (but don't tell anyone!) *
	391	\***************************************************************************/
	392
	393	void
	394	ARMul_WriteByte (ARMul_State * state, ARMword address, ARMword data)
	395	{
	396	ARMword temp, offset;
	397
dfcd3bfb JM	398	temp = ARMul_ReadWord (state, address);
	399	offset = (((ARMword) state->bigendSig * 3) ^ (address & 3)) << 3; /* bit offset into the word */
	400
	401	PutWord (state, address,
	402	(temp & ~(0xffL << offset)) \| ((data & 0xffL) << offset));
c906108c SS	403	}
	404
	405	/***************************************************************************\
	406	* Store Byte, (Non Sequential Cycle) *
	407	\***************************************************************************/
	408
	409	void
	410	ARMul_StoreByte (ARMul_State * state, ARMword address, ARMword data)
	411	{
dfcd3bfb	412	state->NumNcycles++;
c906108c SS	413
	414	#ifdef VALIDATE
	415	if (address == TUBE)
	416	{
	417	if (data == 4)
	418	state->Emulate = FALSE;
	419	else
dfcd3bfb	420	(void) putc ((char) data, stderr); /* Write Char */
c906108c SS	421	return;
	422	}
	423	#endif
	424
	425	ARMul_WriteByte (state, address, data);
	426	}
	427
	428	/***************************************************************************\
	429	* Swap Word, (Two Non Sequential Cycles) *
	430	\***************************************************************************/
	431
dfcd3bfb	432	ARMword ARMul_SwapWord (ARMul_State * state, ARMword address, ARMword data)
c906108c SS	433	{
	434	ARMword temp;
	435
dfcd3bfb	436	state->NumNcycles++;
c906108c SS	437
c906108c SS	438	temp = ARMul_ReadWord (state, address);
dfcd3bfb JM	439
	440	state->NumNcycles++;
	441
c906108c	442	PutWord (state, address, data);
dfcd3bfb	443
c906108c SS	444	return temp;
	445	}
	446
	447	/***************************************************************************\
	448	* Swap Byte, (Two Non Sequential Cycles) *
	449	\***************************************************************************/
	450
dfcd3bfb	451	ARMword ARMul_SwapByte (ARMul_State * state, ARMword address, ARMword data)
c906108c SS	452	{
	453	ARMword temp;
	454
	455	temp = ARMul_LoadByte (state, address);
	456	ARMul_StoreByte (state, address, data);
dfcd3bfb	457
c906108c SS	458	return temp;
	459	}
	460
	461	/***************************************************************************\
	462	* Count I Cycles *
	463	\***************************************************************************/
	464
	465	void
6d358e86	466	ARMul_Icycles (ARMul_State * state, unsigned number, ARMword address ATTRIBUTE_UNUSED)
c906108c SS	467	{
	468	state->NumIcycles += number;
	469	ARMul_CLEARABORT;
	470	}
	471
	472	/***************************************************************************\
	473	* Count C Cycles *
	474	\***************************************************************************/
	475
	476	void
6d358e86	477	ARMul_Ccycles (ARMul_State * state, unsigned number, ARMword address ATTRIBUTE_UNUSED)
c906108c SS	478	{
	479	state->NumCcycles += number;
	480	ARMul_CLEARABORT;
	481	}