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ef016f83 MF |
1 | /* Blackfin Event Vector Table (EVT) model. |
2 | ||
3 | Copyright (C) 2010-2011 Free Software Foundation, Inc. | |
4 | Contributed by Analog Devices, Inc. | |
5 | ||
6 | This file is part of simulators. | |
7 | ||
8 | This program is free software; you can redistribute it and/or modify | |
9 | it under the terms of the GNU General Public License as published by | |
10 | the Free Software Foundation; either version 3 of the License, or | |
11 | (at your option) any later version. | |
12 | ||
13 | This program is distributed in the hope that it will be useful, | |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
17 | ||
18 | You should have received a copy of the GNU General Public License | |
19 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ | |
20 | ||
21 | #include "config.h" | |
22 | ||
23 | #include "sim-main.h" | |
24 | #include "devices.h" | |
25 | #include "dv-bfin_cec.h" | |
26 | #include "dv-bfin_evt.h" | |
27 | ||
28 | struct bfin_evt | |
29 | { | |
30 | bu32 base; | |
31 | ||
32 | /* Order after here is important -- matches hardware MMR layout. */ | |
33 | bu32 evt[16]; | |
34 | }; | |
35 | #define mmr_base() offsetof(struct bfin_evt, evt[0]) | |
36 | #define mmr_offset(mmr) (offsetof(struct bfin_evt, mmr) - mmr_base()) | |
37 | ||
38 | static const char * const mmr_names[] = { | |
39 | "EVT0", "EVT1", "EVT2", "EVT3", "EVT4", "EVT5", "EVT6", "EVT7", "EVT8", | |
40 | "EVT9", "EVT10", "EVT11", "EVT12", "EVT13", "EVT14", "EVT15", | |
41 | }; | |
42 | #define mmr_name(off) mmr_names[(off) / 4] | |
43 | ||
44 | static unsigned | |
45 | bfin_evt_io_write_buffer (struct hw *me, const void *source, | |
46 | int space, address_word addr, unsigned nr_bytes) | |
47 | { | |
48 | struct bfin_evt *evt = hw_data (me); | |
49 | bu32 mmr_off; | |
50 | bu32 value; | |
51 | ||
52 | value = dv_load_4 (source); | |
53 | mmr_off = addr - evt->base; | |
54 | ||
55 | HW_TRACE_WRITE (); | |
56 | ||
57 | evt->evt[mmr_off / 4] = value; | |
58 | ||
59 | return nr_bytes; | |
60 | } | |
61 | ||
62 | static unsigned | |
63 | bfin_evt_io_read_buffer (struct hw *me, void *dest, | |
64 | int space, address_word addr, unsigned nr_bytes) | |
65 | { | |
66 | struct bfin_evt *evt = hw_data (me); | |
67 | bu32 mmr_off; | |
68 | bu32 value; | |
69 | ||
70 | mmr_off = addr - evt->base; | |
71 | ||
72 | HW_TRACE_READ (); | |
73 | ||
74 | value = evt->evt[mmr_off / 4]; | |
75 | ||
76 | dv_store_4 (dest, value); | |
77 | ||
78 | return nr_bytes; | |
79 | } | |
80 | ||
81 | static void | |
82 | attach_bfin_evt_regs (struct hw *me, struct bfin_evt *evt) | |
83 | { | |
84 | address_word attach_address; | |
85 | int attach_space; | |
86 | unsigned attach_size; | |
87 | reg_property_spec reg; | |
88 | ||
89 | if (hw_find_property (me, "reg") == NULL) | |
90 | hw_abort (me, "Missing \"reg\" property"); | |
91 | ||
92 | if (!hw_find_reg_array_property (me, "reg", 0, ®)) | |
93 | hw_abort (me, "\"reg\" property must contain three addr/size entries"); | |
94 | ||
95 | hw_unit_address_to_attach_address (hw_parent (me), | |
96 | ®.address, | |
97 | &attach_space, &attach_address, me); | |
98 | hw_unit_size_to_attach_size (hw_parent (me), ®.size, &attach_size, me); | |
99 | ||
100 | if (attach_size != BFIN_COREMMR_EVT_SIZE) | |
101 | hw_abort (me, "\"reg\" size must be %#x", BFIN_COREMMR_EVT_SIZE); | |
102 | ||
103 | hw_attach_address (hw_parent (me), | |
104 | 0, attach_space, attach_address, attach_size, me); | |
105 | ||
106 | evt->base = attach_address; | |
107 | } | |
108 | ||
109 | static void | |
110 | bfin_evt_finish (struct hw *me) | |
111 | { | |
112 | struct bfin_evt *evt; | |
113 | ||
114 | evt = HW_ZALLOC (me, struct bfin_evt); | |
115 | ||
116 | set_hw_data (me, evt); | |
117 | set_hw_io_read_buffer (me, bfin_evt_io_read_buffer); | |
118 | set_hw_io_write_buffer (me, bfin_evt_io_write_buffer); | |
119 | ||
120 | attach_bfin_evt_regs (me, evt); | |
121 | } | |
122 | ||
123 | const struct hw_descriptor dv_bfin_evt_descriptor[] = { | |
124 | {"bfin_evt", bfin_evt_finish,}, | |
125 | {NULL, NULL}, | |
126 | }; | |
127 | ||
128 | #define EVT_STATE(cpu) DV_STATE_CACHED (cpu, evt) | |
129 | ||
130 | void | |
131 | cec_set_evt (SIM_CPU *cpu, int ivg, bu32 handler_addr) | |
132 | { | |
133 | if (ivg > IVG15 || ivg < 0) | |
134 | sim_io_error (CPU_STATE (cpu), "%s: ivg %i out of range !", __func__, ivg); | |
135 | ||
136 | EVT_STATE (cpu)->evt[ivg] = handler_addr; | |
137 | } | |
138 | ||
139 | bu32 | |
140 | cec_get_evt (SIM_CPU *cpu, int ivg) | |
141 | { | |
142 | if (ivg > IVG15 || ivg < 0) | |
143 | sim_io_error (CPU_STATE (cpu), "%s: ivg %i out of range !", __func__, ivg); | |
144 | ||
145 | return EVT_STATE (cpu)->evt[ivg]; | |
146 | } | |
147 | ||
148 | bu32 | |
149 | cec_get_reset_evt (SIM_CPU *cpu) | |
150 | { | |
151 | /* XXX: This should tail into the model to get via BMODE pins. */ | |
152 | return 0xef000000; | |
153 | } |