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ef016f83 MF |
1 | /* Blackfin Real Time Clock (RTC) model. |
2 | ||
e2882c85 | 3 | Copyright (C) 2010-2018 Free Software Foundation, Inc. |
ef016f83 MF |
4 | Contributed by Analog Devices, Inc. |
5 | ||
6 | This file is part of simulators. | |
7 | ||
8 | This program is free software; you can redistribute it and/or modify | |
9 | it under the terms of the GNU General Public License as published by | |
10 | the Free Software Foundation; either version 3 of the License, or | |
11 | (at your option) any later version. | |
12 | ||
13 | This program is distributed in the hope that it will be useful, | |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
17 | ||
18 | You should have received a copy of the GNU General Public License | |
19 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ | |
20 | ||
21 | #include "config.h" | |
22 | ||
23 | #include <time.h> | |
24 | #include "sim-main.h" | |
25 | #include "dv-sockser.h" | |
26 | #include "devices.h" | |
27 | #include "dv-bfin_rtc.h" | |
28 | ||
29 | /* XXX: This read-only stub setup is based on host system clock. */ | |
30 | ||
31 | struct bfin_rtc | |
32 | { | |
33 | bu32 base; | |
34 | bu32 stat_shadow; | |
35 | ||
36 | /* Order after here is important -- matches hardware MMR layout. */ | |
37 | bu32 stat; | |
38 | bu16 BFIN_MMR_16(ictl); | |
39 | bu16 BFIN_MMR_16(istat); | |
40 | bu16 BFIN_MMR_16(swcnt); | |
41 | bu32 alarm; | |
42 | bu16 BFIN_MMR_16(pren); | |
43 | }; | |
44 | #define mmr_base() offsetof(struct bfin_rtc, stat) | |
45 | #define mmr_offset(mmr) (offsetof(struct bfin_rtc, mmr) - mmr_base()) | |
46 | ||
990d19fd MF |
47 | static const char * const mmr_names[] = |
48 | { | |
ef016f83 MF |
49 | "RTC_STAT", "RTC_ICTL", "RTC_ISTAT", "RTC_SWCNT", "RTC_ALARM", "RTC_PREN", |
50 | }; | |
51 | #define mmr_name(off) mmr_names[(off) / 4] | |
52 | ||
53 | static unsigned | |
54 | bfin_rtc_io_write_buffer (struct hw *me, const void *source, | |
55 | int space, address_word addr, unsigned nr_bytes) | |
56 | { | |
57 | struct bfin_rtc *rtc = hw_data (me); | |
58 | bu32 mmr_off; | |
59 | bu32 value; | |
60 | bu16 *value16p; | |
61 | bu32 *value32p; | |
62 | void *valuep; | |
63 | ||
466b619e MF |
64 | /* Invalid access mode is higher priority than missing register. */ |
65 | if (!dv_bfin_mmr_require_16_32 (me, addr, nr_bytes, true)) | |
66 | return 0; | |
67 | ||
ef016f83 MF |
68 | if (nr_bytes == 4) |
69 | value = dv_load_4 (source); | |
70 | else | |
71 | value = dv_load_2 (source); | |
72 | ||
73 | mmr_off = addr - rtc->base; | |
74 | valuep = (void *)((unsigned long)rtc + mmr_base() + mmr_off); | |
75 | value16p = valuep; | |
76 | value32p = valuep; | |
77 | ||
78 | HW_TRACE_WRITE (); | |
79 | ||
80 | /* XXX: These probably need more work. */ | |
81 | switch (mmr_off) | |
82 | { | |
83 | case mmr_offset(stat): | |
84 | /* XXX: Ignore these since we are wired to host. */ | |
85 | break; | |
86 | case mmr_offset(istat): | |
9922f803 | 87 | dv_w1c_2 (value16p, value, ~(1 << 14)); |
ef016f83 MF |
88 | break; |
89 | case mmr_offset(alarm): | |
90 | break; | |
91 | case mmr_offset(ictl): | |
92 | /* XXX: This should schedule an event handler. */ | |
93 | case mmr_offset(swcnt): | |
94 | case mmr_offset(pren): | |
95 | break; | |
96 | } | |
97 | ||
98 | return nr_bytes; | |
99 | } | |
100 | ||
101 | static unsigned | |
102 | bfin_rtc_io_read_buffer (struct hw *me, void *dest, | |
103 | int space, address_word addr, unsigned nr_bytes) | |
104 | { | |
105 | struct bfin_rtc *rtc = hw_data (me); | |
106 | bu32 mmr_off; | |
107 | bu16 *value16p; | |
108 | bu32 *value32p; | |
109 | void *valuep; | |
110 | ||
466b619e MF |
111 | /* Invalid access mode is higher priority than missing register. */ |
112 | if (!dv_bfin_mmr_require_16_32 (me, addr, nr_bytes, false)) | |
113 | return 0; | |
114 | ||
ef016f83 MF |
115 | mmr_off = addr - rtc->base; |
116 | valuep = (void *)((unsigned long)rtc + mmr_base() + mmr_off); | |
117 | value16p = valuep; | |
118 | value32p = valuep; | |
119 | ||
120 | HW_TRACE_READ (); | |
121 | ||
122 | switch (mmr_off) | |
123 | { | |
124 | case mmr_offset(stat): | |
125 | { | |
126 | time_t t = time (NULL); | |
127 | struct tm *tm = localtime (&t); | |
128 | bu32 value = | |
129 | (((tm->tm_year - 70) * 365 + tm->tm_yday) << 17) | | |
130 | (tm->tm_hour << 12) | | |
131 | (tm->tm_min << 6) | | |
132 | (tm->tm_sec << 0); | |
133 | dv_store_4 (dest, value); | |
134 | break; | |
135 | } | |
136 | case mmr_offset(alarm): | |
137 | dv_store_4 (dest, *value32p); | |
138 | break; | |
139 | case mmr_offset(istat): | |
140 | case mmr_offset(ictl): | |
141 | case mmr_offset(swcnt): | |
142 | case mmr_offset(pren): | |
143 | dv_store_2 (dest, *value16p); | |
144 | break; | |
145 | } | |
146 | ||
147 | return nr_bytes; | |
148 | } | |
149 | ||
990d19fd MF |
150 | static const struct hw_port_descriptor bfin_rtc_ports[] = |
151 | { | |
ef016f83 MF |
152 | { "rtc", 0, 0, output_port, }, |
153 | { NULL, 0, 0, 0, }, | |
154 | }; | |
155 | ||
156 | static void | |
157 | attach_bfin_rtc_regs (struct hw *me, struct bfin_rtc *rtc) | |
158 | { | |
159 | address_word attach_address; | |
160 | int attach_space; | |
161 | unsigned attach_size; | |
162 | reg_property_spec reg; | |
163 | ||
164 | if (hw_find_property (me, "reg") == NULL) | |
165 | hw_abort (me, "Missing \"reg\" property"); | |
166 | ||
167 | if (!hw_find_reg_array_property (me, "reg", 0, ®)) | |
168 | hw_abort (me, "\"reg\" property must contain three addr/size entries"); | |
169 | ||
170 | hw_unit_address_to_attach_address (hw_parent (me), | |
171 | ®.address, | |
172 | &attach_space, &attach_address, me); | |
173 | hw_unit_size_to_attach_size (hw_parent (me), ®.size, &attach_size, me); | |
174 | ||
175 | if (attach_size != BFIN_MMR_RTC_SIZE) | |
176 | hw_abort (me, "\"reg\" size must be %#x", BFIN_MMR_RTC_SIZE); | |
177 | ||
178 | hw_attach_address (hw_parent (me), | |
179 | 0, attach_space, attach_address, attach_size, me); | |
180 | ||
181 | rtc->base = attach_address; | |
182 | } | |
183 | ||
184 | static void | |
185 | bfin_rtc_finish (struct hw *me) | |
186 | { | |
187 | struct bfin_rtc *rtc; | |
188 | ||
189 | rtc = HW_ZALLOC (me, struct bfin_rtc); | |
190 | ||
191 | set_hw_data (me, rtc); | |
192 | set_hw_io_read_buffer (me, bfin_rtc_io_read_buffer); | |
193 | set_hw_io_write_buffer (me, bfin_rtc_io_write_buffer); | |
194 | set_hw_ports (me, bfin_rtc_ports); | |
195 | ||
196 | attach_bfin_rtc_regs (me, rtc); | |
197 | ||
198 | /* Initialize the RTC. */ | |
199 | } | |
200 | ||
81d126c3 MF |
201 | const struct hw_descriptor dv_bfin_rtc_descriptor[] = |
202 | { | |
ef016f83 MF |
203 | {"bfin_rtc", bfin_rtc_finish,}, |
204 | {NULL, NULL}, | |
205 | }; |