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b9c8cd10 DE |
1 | /* Memory ops header for CGEN-based simlators. |
2 | ||
3 | This file is machine generated. | |
4 | ||
5 | Copyright (C) 1996, 1997 Free Software Foundation, Inc. | |
6 | ||
7 | This file is part of the GNU Binutils and/or GDB, the GNU debugger. | |
8 | ||
9 | This program is free software; you can redistribute it and/or modify | |
10 | it under the terms of the GNU General Public License as published by | |
11 | the Free Software Foundation; either version 2, or (at your option) | |
12 | any later version. | |
13 | ||
14 | This program is distributed in the hope that it will be useful, | |
15 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | GNU General Public License for more details. | |
18 | ||
19 | You should have received a copy of the GNU General Public License along | |
20 | with this program; if not, write to the Free Software Foundation, Inc., | |
21 | 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. | |
22 | ||
23 | */ | |
24 | ||
25 | #ifndef CGEN_MEM_H | |
26 | #define CGEN_MEM_H | |
27 | ||
28 | #ifdef MEMOPS_DEFINE_INLINE | |
29 | #define MEMOPS_INLINE | |
30 | #else | |
31 | #define MEMOPS_INLINE extern inline | |
32 | #endif | |
33 | ||
34 | /* Only used in this file. */ | |
35 | typedef unsigned char *ptr; | |
36 | ||
37 | #if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE) | |
38 | MEMOPS_INLINE QI | |
39 | GETTQI (ptr p) | |
40 | { | |
41 | if (TARGET_BIG_ENDIAN) | |
42 | return p[0]; | |
43 | else | |
44 | return p[0]; | |
45 | } | |
46 | #else | |
47 | extern QI GETTQI (ptr); | |
48 | #endif | |
49 | ||
50 | #if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE) | |
51 | MEMOPS_INLINE HI | |
52 | GETTHI (ptr p) | |
53 | { | |
54 | if (TARGET_BIG_ENDIAN) | |
55 | return ((p[0] << 8) | p[1]); | |
56 | else | |
57 | return ((p[1] << 8) | p[0]); | |
58 | } | |
59 | #else | |
60 | extern HI GETTHI (ptr); | |
61 | #endif | |
62 | ||
63 | #if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE) | |
64 | MEMOPS_INLINE SI | |
65 | GETTSI (ptr p) | |
66 | { | |
67 | if (TARGET_BIG_ENDIAN) | |
68 | return ((p[0] << 24) | (p[1] << 16) | (p[2] << 8) | p[3]); | |
69 | else | |
70 | return ((p[3] << 24) | (p[2] << 16) | (p[1] << 8) | p[0]); | |
71 | } | |
72 | #else | |
73 | extern SI GETTSI (ptr); | |
74 | #endif | |
75 | ||
76 | #if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE) | |
77 | MEMOPS_INLINE DI | |
78 | GETTDI (ptr p) | |
79 | { | |
80 | if (TARGET_BIG_ENDIAN) | |
81 | return MAKEDI ((p[0] << 24) | (p[1] << 16) | (p[2] << 8) | p[3], (p[4] << 24) | (p[5] << 16) | (p[6] << 8) | p[7]); | |
82 | else | |
83 | return MAKEDI ((p[7] << 24) | (p[6] << 16) | (p[5] << 8) | p[4], (p[3] << 24) | (p[2] << 16) | (p[1] << 8) | p[0]); | |
84 | } | |
85 | #else | |
86 | extern DI GETTDI (ptr); | |
87 | #endif | |
88 | ||
89 | #if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE) | |
90 | MEMOPS_INLINE UQI | |
91 | GETTUQI (ptr p) | |
92 | { | |
93 | if (TARGET_BIG_ENDIAN) | |
94 | return p[0]; | |
95 | else | |
96 | return p[0]; | |
97 | } | |
98 | #else | |
99 | extern UQI GETTUQI (ptr); | |
100 | #endif | |
101 | ||
102 | #if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE) | |
103 | MEMOPS_INLINE UHI | |
104 | GETTUHI (ptr p) | |
105 | { | |
106 | if (TARGET_BIG_ENDIAN) | |
107 | return ((p[0] << 8) | p[1]); | |
108 | else | |
109 | return ((p[1] << 8) | p[0]); | |
110 | } | |
111 | #else | |
112 | extern UHI GETTUHI (ptr); | |
113 | #endif | |
114 | ||
115 | #if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE) | |
116 | MEMOPS_INLINE USI | |
117 | GETTUSI (ptr p) | |
118 | { | |
119 | if (TARGET_BIG_ENDIAN) | |
120 | return ((p[0] << 24) | (p[1] << 16) | (p[2] << 8) | p[3]); | |
121 | else | |
122 | return ((p[3] << 24) | (p[2] << 16) | (p[1] << 8) | p[0]); | |
123 | } | |
124 | #else | |
125 | extern USI GETTUSI (ptr); | |
126 | #endif | |
127 | ||
128 | #if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE) | |
129 | MEMOPS_INLINE UDI | |
130 | GETTUDI (ptr p) | |
131 | { | |
132 | if (TARGET_BIG_ENDIAN) | |
133 | return MAKEDI ((p[0] << 24) | (p[1] << 16) | (p[2] << 8) | p[3], (p[4] << 24) | (p[5] << 16) | (p[6] << 8) | p[7]); | |
134 | else | |
135 | return MAKEDI ((p[7] << 24) | (p[6] << 16) | (p[5] << 8) | p[4], (p[3] << 24) | (p[2] << 16) | (p[1] << 8) | p[0]); | |
136 | } | |
137 | #else | |
138 | extern UDI GETTUDI (ptr); | |
139 | #endif | |
140 | ||
141 | #if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE) | |
142 | MEMOPS_INLINE void | |
143 | SETTQI (ptr p, QI val) | |
144 | { | |
145 | if (TARGET_BIG_ENDIAN) | |
146 | do { p[0] = val; } while (0); | |
147 | else | |
148 | do { p[0] = val; } while (0); | |
149 | } | |
150 | #else | |
151 | extern void SETTQI (ptr, QI); | |
152 | #endif | |
153 | ||
154 | #if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE) | |
155 | MEMOPS_INLINE void | |
156 | SETTHI (ptr p, HI val) | |
157 | { | |
158 | if (TARGET_BIG_ENDIAN) | |
159 | do { p[0] = val >> 8; p[1] = val; } while (0); | |
160 | else | |
161 | do { p[1] = val >> 8; p[0] = val; } while (0); | |
162 | } | |
163 | #else | |
164 | extern void SETTHI (ptr, HI); | |
165 | #endif | |
166 | ||
167 | #if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE) | |
168 | MEMOPS_INLINE void | |
169 | SETTSI (ptr p, SI val) | |
170 | { | |
171 | if (TARGET_BIG_ENDIAN) | |
172 | do { p[0] = val >> 24; p[1] = val >> 16; p[2] = val >> 8; p[3] = val; } while (0); | |
173 | else | |
174 | do { p[3] = val >> 24; p[2] = val >> 16; p[1] = val >> 8; p[0] = val; } while (0); | |
175 | } | |
176 | #else | |
177 | extern void SETTSI (ptr, SI); | |
178 | #endif | |
179 | ||
180 | #if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE) | |
181 | MEMOPS_INLINE void | |
182 | SETTDI (ptr p, DI val) | |
183 | { | |
184 | if (TARGET_BIG_ENDIAN) | |
185 | do { SI t = GETHIDI (val); p[0] = t >> 24; p[1] = t >> 16; p[2] = t >> 8; p[3] = t; t = GETLODI (val); p[4] = t >> 24; p[5] = t >> 16; p[6] = t >> 8; p[7] = t; } while (0); | |
186 | else | |
187 | do { SI t = GETHIDI (val); p[7] = t >> 24; p[6] = t >> 16; p[5] = t >> 8; p[4] = t; t = GETLODI (val); p[3] = t >> 24; p[2] = t >> 16; p[1] = t >> 8; p[0] = t; } while (0); | |
188 | } | |
189 | #else | |
190 | extern void SETTDI (ptr, DI); | |
191 | #endif | |
192 | ||
193 | #if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE) | |
194 | MEMOPS_INLINE void | |
195 | SETTUQI (ptr p, UQI val) | |
196 | { | |
197 | if (TARGET_BIG_ENDIAN) | |
198 | do { p[0] = val; } while (0); | |
199 | else | |
200 | do { p[0] = val; } while (0); | |
201 | } | |
202 | #else | |
203 | extern void SETTUQI (ptr, UQI); | |
204 | #endif | |
205 | ||
206 | #if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE) | |
207 | MEMOPS_INLINE void | |
208 | SETTUHI (ptr p, UHI val) | |
209 | { | |
210 | if (TARGET_BIG_ENDIAN) | |
211 | do { p[0] = val >> 8; p[1] = val; } while (0); | |
212 | else | |
213 | do { p[1] = val >> 8; p[0] = val; } while (0); | |
214 | } | |
215 | #else | |
216 | extern void SETTUHI (ptr, UHI); | |
217 | #endif | |
218 | ||
219 | #if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE) | |
220 | MEMOPS_INLINE void | |
221 | SETTUSI (ptr p, USI val) | |
222 | { | |
223 | if (TARGET_BIG_ENDIAN) | |
224 | do { p[0] = val >> 24; p[1] = val >> 16; p[2] = val >> 8; p[3] = val; } while (0); | |
225 | else | |
226 | do { p[3] = val >> 24; p[2] = val >> 16; p[1] = val >> 8; p[0] = val; } while (0); | |
227 | } | |
228 | #else | |
229 | extern void SETTUSI (ptr, USI); | |
230 | #endif | |
231 | ||
232 | #if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE) | |
233 | MEMOPS_INLINE void | |
234 | SETTUDI (ptr p, UDI val) | |
235 | { | |
236 | if (TARGET_BIG_ENDIAN) | |
237 | do { SI t = GETHIDI (val); p[0] = t >> 24; p[1] = t >> 16; p[2] = t >> 8; p[3] = t; t = GETLODI (val); p[4] = t >> 24; p[5] = t >> 16; p[6] = t >> 8; p[7] = t; } while (0); | |
238 | else | |
239 | do { SI t = GETHIDI (val); p[7] = t >> 24; p[6] = t >> 16; p[5] = t >> 8; p[4] = t; t = GETLODI (val); p[3] = t >> 24; p[2] = t >> 16; p[1] = t >> 8; p[0] = t; } while (0); | |
240 | } | |
241 | #else | |
242 | extern void SETTUDI (ptr, UDI); | |
243 | #endif | |
244 | ||
245 | ||
246 | /* FIXME: Need to merge with sim-core. */ | |
247 | /* FIXME: Don't perform >= 4, text section checks if OEA. */ | |
248 | #ifndef MEM_CHECK_READ | |
249 | #define MEM_CHECK_READ(addr, type) \ | |
250 | ((addr) >= 4 /*&& (addr) < STATE_MEM_SIZE (current_state)*/) | |
251 | #endif | |
252 | #ifndef MEM_CHECK_WRITE | |
253 | #define MEM_CHECK_WRITE(addr, type) \ | |
254 | ((addr) >= 4 /*&& (addr) < STATE_MEM_SIZE (current_state)*/ \ | |
255 | && ((addr) >= STATE_TEXT_END (current_state) \ | |
256 | || (addr) < STATE_TEXT_START (current_state))) | |
257 | #endif | |
258 | #ifndef MEM_CHECK_ALIGNMENT | |
259 | #define MEM_CHECK_ALIGNMENT(addr, type) \ | |
260 | (((addr) & (sizeof (type) - 1)) == 0) | |
261 | #endif | |
262 | ||
263 | #if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE) | |
264 | MEMOPS_INLINE QI | |
265 | GETMEMQI (SIM_CPU *cpu, ADDR a) | |
266 | { | |
267 | if (! MEM_CHECK_READ (a, QI)) | |
268 | { engine_signal (cpu, SIM_SIGACCESS); } | |
269 | if (! MEM_CHECK_ALIGNMENT (a, QI)) | |
270 | { engine_signal (cpu, SIM_SIGALIGN); } | |
271 | PROFILE_COUNT_READ (cpu, a, MODE_QI); | |
272 | return sim_core_read_1 (CPU_STATE (cpu), sim_core_read_map, a); | |
273 | } | |
274 | #else | |
275 | extern QI GETMEMQI (SIM_CPU *, ADDR); | |
276 | #endif | |
277 | ||
278 | #if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE) | |
279 | MEMOPS_INLINE HI | |
280 | GETMEMHI (SIM_CPU *cpu, ADDR a) | |
281 | { | |
282 | if (! MEM_CHECK_READ (a, HI)) | |
283 | { engine_signal (cpu, SIM_SIGACCESS); } | |
284 | if (! MEM_CHECK_ALIGNMENT (a, HI)) | |
285 | { engine_signal (cpu, SIM_SIGALIGN); } | |
286 | PROFILE_COUNT_READ (cpu, a, MODE_HI); | |
287 | return sim_core_read_2 (CPU_STATE (cpu), sim_core_read_map, a); | |
288 | } | |
289 | #else | |
290 | extern HI GETMEMHI (SIM_CPU *, ADDR); | |
291 | #endif | |
292 | ||
293 | #if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE) | |
294 | MEMOPS_INLINE SI | |
295 | GETMEMSI (SIM_CPU *cpu, ADDR a) | |
296 | { | |
297 | if (! MEM_CHECK_READ (a, SI)) | |
298 | { engine_signal (cpu, SIM_SIGACCESS); } | |
299 | if (! MEM_CHECK_ALIGNMENT (a, SI)) | |
300 | { engine_signal (cpu, SIM_SIGALIGN); } | |
301 | PROFILE_COUNT_READ (cpu, a, MODE_SI); | |
302 | return sim_core_read_4 (CPU_STATE (cpu), sim_core_read_map, a); | |
303 | } | |
304 | #else | |
305 | extern SI GETMEMSI (SIM_CPU *, ADDR); | |
306 | #endif | |
307 | ||
308 | #if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE) | |
309 | MEMOPS_INLINE DI | |
310 | GETMEMDI (SIM_CPU *cpu, ADDR a) | |
311 | { | |
312 | if (! MEM_CHECK_READ (a, DI)) | |
313 | { engine_signal (cpu, SIM_SIGACCESS); } | |
314 | if (! MEM_CHECK_ALIGNMENT (a, DI)) | |
315 | { engine_signal (cpu, SIM_SIGALIGN); } | |
316 | PROFILE_COUNT_READ (cpu, a, MODE_DI); | |
317 | return sim_core_read_8 (CPU_STATE (cpu), sim_core_read_map, a); | |
318 | } | |
319 | #else | |
320 | extern DI GETMEMDI (SIM_CPU *, ADDR); | |
321 | #endif | |
322 | ||
323 | #if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE) | |
324 | MEMOPS_INLINE UQI | |
325 | GETMEMUQI (SIM_CPU *cpu, ADDR a) | |
326 | { | |
327 | if (! MEM_CHECK_READ (a, UQI)) | |
328 | { engine_signal (cpu, SIM_SIGACCESS); } | |
329 | if (! MEM_CHECK_ALIGNMENT (a, UQI)) | |
330 | { engine_signal (cpu, SIM_SIGALIGN); } | |
331 | PROFILE_COUNT_READ (cpu, a, MODE_UQI); | |
332 | return sim_core_read_1 (CPU_STATE (cpu), sim_core_read_map, a); | |
333 | } | |
334 | #else | |
335 | extern UQI GETMEMUQI (SIM_CPU *, ADDR); | |
336 | #endif | |
337 | ||
338 | #if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE) | |
339 | MEMOPS_INLINE UHI | |
340 | GETMEMUHI (SIM_CPU *cpu, ADDR a) | |
341 | { | |
342 | if (! MEM_CHECK_READ (a, UHI)) | |
343 | { engine_signal (cpu, SIM_SIGACCESS); } | |
344 | if (! MEM_CHECK_ALIGNMENT (a, UHI)) | |
345 | { engine_signal (cpu, SIM_SIGALIGN); } | |
346 | PROFILE_COUNT_READ (cpu, a, MODE_UHI); | |
347 | return sim_core_read_2 (CPU_STATE (cpu), sim_core_read_map, a); | |
348 | } | |
349 | #else | |
350 | extern UHI GETMEMUHI (SIM_CPU *, ADDR); | |
351 | #endif | |
352 | ||
353 | #if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE) | |
354 | MEMOPS_INLINE USI | |
355 | GETMEMUSI (SIM_CPU *cpu, ADDR a) | |
356 | { | |
357 | if (! MEM_CHECK_READ (a, USI)) | |
358 | { engine_signal (cpu, SIM_SIGACCESS); } | |
359 | if (! MEM_CHECK_ALIGNMENT (a, USI)) | |
360 | { engine_signal (cpu, SIM_SIGALIGN); } | |
361 | PROFILE_COUNT_READ (cpu, a, MODE_USI); | |
362 | return sim_core_read_4 (CPU_STATE (cpu), sim_core_read_map, a); | |
363 | } | |
364 | #else | |
365 | extern USI GETMEMUSI (SIM_CPU *, ADDR); | |
366 | #endif | |
367 | ||
368 | #if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE) | |
369 | MEMOPS_INLINE UDI | |
370 | GETMEMUDI (SIM_CPU *cpu, ADDR a) | |
371 | { | |
372 | if (! MEM_CHECK_READ (a, UDI)) | |
373 | { engine_signal (cpu, SIM_SIGACCESS); } | |
374 | if (! MEM_CHECK_ALIGNMENT (a, UDI)) | |
375 | { engine_signal (cpu, SIM_SIGALIGN); } | |
376 | PROFILE_COUNT_READ (cpu, a, MODE_UDI); | |
377 | return sim_core_read_8 (CPU_STATE (cpu), sim_core_read_map, a); | |
378 | } | |
379 | #else | |
380 | extern UDI GETMEMUDI (SIM_CPU *, ADDR); | |
381 | #endif | |
382 | ||
383 | #if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE) | |
384 | MEMOPS_INLINE void | |
385 | SETMEMQI (SIM_CPU *cpu, ADDR a, QI val) | |
386 | { | |
387 | if (! MEM_CHECK_WRITE (a, QI)) | |
388 | { engine_signal (cpu, SIM_SIGACCESS); return; } | |
389 | if (! MEM_CHECK_ALIGNMENT (a, QI)) | |
390 | { engine_signal (cpu, SIM_SIGALIGN); return; } | |
391 | PROFILE_COUNT_WRITE (cpu, a, MODE_QI); | |
392 | sim_core_write_1 (CPU_STATE (cpu), sim_core_read_map, a, val); | |
393 | } | |
394 | #else | |
395 | extern void SETMEMQI (SIM_CPU *, ADDR, QI); | |
396 | #endif | |
397 | ||
398 | #if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE) | |
399 | MEMOPS_INLINE void | |
400 | SETMEMHI (SIM_CPU *cpu, ADDR a, HI val) | |
401 | { | |
402 | if (! MEM_CHECK_WRITE (a, HI)) | |
403 | { engine_signal (cpu, SIM_SIGACCESS); return; } | |
404 | if (! MEM_CHECK_ALIGNMENT (a, HI)) | |
405 | { engine_signal (cpu, SIM_SIGALIGN); return; } | |
406 | PROFILE_COUNT_WRITE (cpu, a, MODE_HI); | |
407 | sim_core_write_2 (CPU_STATE (cpu), sim_core_read_map, a, val); | |
408 | } | |
409 | #else | |
410 | extern void SETMEMHI (SIM_CPU *, ADDR, HI); | |
411 | #endif | |
412 | ||
413 | #if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE) | |
414 | MEMOPS_INLINE void | |
415 | SETMEMSI (SIM_CPU *cpu, ADDR a, SI val) | |
416 | { | |
417 | if (! MEM_CHECK_WRITE (a, SI)) | |
418 | { engine_signal (cpu, SIM_SIGACCESS); return; } | |
419 | if (! MEM_CHECK_ALIGNMENT (a, SI)) | |
420 | { engine_signal (cpu, SIM_SIGALIGN); return; } | |
421 | PROFILE_COUNT_WRITE (cpu, a, MODE_SI); | |
422 | sim_core_write_4 (CPU_STATE (cpu), sim_core_read_map, a, val); | |
423 | } | |
424 | #else | |
425 | extern void SETMEMSI (SIM_CPU *, ADDR, SI); | |
426 | #endif | |
427 | ||
428 | #if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE) | |
429 | MEMOPS_INLINE void | |
430 | SETMEMDI (SIM_CPU *cpu, ADDR a, DI val) | |
431 | { | |
432 | if (! MEM_CHECK_WRITE (a, DI)) | |
433 | { engine_signal (cpu, SIM_SIGACCESS); return; } | |
434 | if (! MEM_CHECK_ALIGNMENT (a, DI)) | |
435 | { engine_signal (cpu, SIM_SIGALIGN); return; } | |
436 | PROFILE_COUNT_WRITE (cpu, a, MODE_DI); | |
437 | sim_core_write_8 (CPU_STATE (cpu), sim_core_read_map, a, val); | |
438 | } | |
439 | #else | |
440 | extern void SETMEMDI (SIM_CPU *, ADDR, DI); | |
441 | #endif | |
442 | ||
443 | #if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE) | |
444 | MEMOPS_INLINE void | |
445 | SETMEMUQI (SIM_CPU *cpu, ADDR a, UQI val) | |
446 | { | |
447 | if (! MEM_CHECK_WRITE (a, UQI)) | |
448 | { engine_signal (cpu, SIM_SIGACCESS); return; } | |
449 | if (! MEM_CHECK_ALIGNMENT (a, UQI)) | |
450 | { engine_signal (cpu, SIM_SIGALIGN); return; } | |
451 | PROFILE_COUNT_WRITE (cpu, a, MODE_UQI); | |
452 | sim_core_write_1 (CPU_STATE (cpu), sim_core_read_map, a, val); | |
453 | } | |
454 | #else | |
455 | extern void SETMEMUQI (SIM_CPU *, ADDR, UQI); | |
456 | #endif | |
457 | ||
458 | #if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE) | |
459 | MEMOPS_INLINE void | |
460 | SETMEMUHI (SIM_CPU *cpu, ADDR a, UHI val) | |
461 | { | |
462 | if (! MEM_CHECK_WRITE (a, UHI)) | |
463 | { engine_signal (cpu, SIM_SIGACCESS); return; } | |
464 | if (! MEM_CHECK_ALIGNMENT (a, UHI)) | |
465 | { engine_signal (cpu, SIM_SIGALIGN); return; } | |
466 | PROFILE_COUNT_WRITE (cpu, a, MODE_UHI); | |
467 | sim_core_write_2 (CPU_STATE (cpu), sim_core_read_map, a, val); | |
468 | } | |
469 | #else | |
470 | extern void SETMEMUHI (SIM_CPU *, ADDR, UHI); | |
471 | #endif | |
472 | ||
473 | #if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE) | |
474 | MEMOPS_INLINE void | |
475 | SETMEMUSI (SIM_CPU *cpu, ADDR a, USI val) | |
476 | { | |
477 | if (! MEM_CHECK_WRITE (a, USI)) | |
478 | { engine_signal (cpu, SIM_SIGACCESS); return; } | |
479 | if (! MEM_CHECK_ALIGNMENT (a, USI)) | |
480 | { engine_signal (cpu, SIM_SIGALIGN); return; } | |
481 | PROFILE_COUNT_WRITE (cpu, a, MODE_USI); | |
482 | sim_core_write_4 (CPU_STATE (cpu), sim_core_read_map, a, val); | |
483 | } | |
484 | #else | |
485 | extern void SETMEMUSI (SIM_CPU *, ADDR, USI); | |
486 | #endif | |
487 | ||
488 | #if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE) | |
489 | MEMOPS_INLINE void | |
490 | SETMEMUDI (SIM_CPU *cpu, ADDR a, UDI val) | |
491 | { | |
492 | if (! MEM_CHECK_WRITE (a, UDI)) | |
493 | { engine_signal (cpu, SIM_SIGACCESS); return; } | |
494 | if (! MEM_CHECK_ALIGNMENT (a, UDI)) | |
495 | { engine_signal (cpu, SIM_SIGALIGN); return; } | |
496 | PROFILE_COUNT_WRITE (cpu, a, MODE_UDI); | |
497 | sim_core_write_8 (CPU_STATE (cpu), sim_core_read_map, a, val); | |
498 | } | |
499 | #else | |
500 | extern void SETMEMUDI (SIM_CPU *, ADDR, UDI); | |
501 | #endif | |
502 | ||
503 | #endif /* CGEN_MEMS_H */ |