* cgen-mem.h, cgen-scache.[ch], cgen-sem.h, cgen-sim.h: New files.
[deliverable/binutils-gdb.git] / sim / common / cgen-mem.h
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1/* Memory ops header for CGEN-based simlators.
2
3This file is machine generated.
4
5Copyright (C) 1996, 1997 Free Software Foundation, Inc.
6
7This file is part of the GNU Binutils and/or GDB, the GNU debugger.
8
9This program is free software; you can redistribute it and/or modify
10it under the terms of the GNU General Public License as published by
11the Free Software Foundation; either version 2, or (at your option)
12any later version.
13
14This program is distributed in the hope that it will be useful,
15but WITHOUT ANY WARRANTY; without even the implied warranty of
16MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17GNU General Public License for more details.
18
19You should have received a copy of the GNU General Public License along
20with this program; if not, write to the Free Software Foundation, Inc.,
2159 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
22
23*/
24
25#ifndef CGEN_MEM_H
26#define CGEN_MEM_H
27
28#ifdef MEMOPS_DEFINE_INLINE
29#define MEMOPS_INLINE
30#else
31#define MEMOPS_INLINE extern inline
32#endif
33
34/* Only used in this file. */
35typedef unsigned char *ptr;
36
37#if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE)
38MEMOPS_INLINE QI
39GETTQI (ptr p)
40{
41 if (TARGET_BIG_ENDIAN)
42 return p[0];
43 else
44 return p[0];
45}
46#else
47extern QI GETTQI (ptr);
48#endif
49
50#if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE)
51MEMOPS_INLINE HI
52GETTHI (ptr p)
53{
54 if (TARGET_BIG_ENDIAN)
55 return ((p[0] << 8) | p[1]);
56 else
57 return ((p[1] << 8) | p[0]);
58}
59#else
60extern HI GETTHI (ptr);
61#endif
62
63#if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE)
64MEMOPS_INLINE SI
65GETTSI (ptr p)
66{
67 if (TARGET_BIG_ENDIAN)
68 return ((p[0] << 24) | (p[1] << 16) | (p[2] << 8) | p[3]);
69 else
70 return ((p[3] << 24) | (p[2] << 16) | (p[1] << 8) | p[0]);
71}
72#else
73extern SI GETTSI (ptr);
74#endif
75
76#if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE)
77MEMOPS_INLINE DI
78GETTDI (ptr p)
79{
80 if (TARGET_BIG_ENDIAN)
81 return MAKEDI ((p[0] << 24) | (p[1] << 16) | (p[2] << 8) | p[3], (p[4] << 24) | (p[5] << 16) | (p[6] << 8) | p[7]);
82 else
83 return MAKEDI ((p[7] << 24) | (p[6] << 16) | (p[5] << 8) | p[4], (p[3] << 24) | (p[2] << 16) | (p[1] << 8) | p[0]);
84}
85#else
86extern DI GETTDI (ptr);
87#endif
88
89#if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE)
90MEMOPS_INLINE UQI
91GETTUQI (ptr p)
92{
93 if (TARGET_BIG_ENDIAN)
94 return p[0];
95 else
96 return p[0];
97}
98#else
99extern UQI GETTUQI (ptr);
100#endif
101
102#if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE)
103MEMOPS_INLINE UHI
104GETTUHI (ptr p)
105{
106 if (TARGET_BIG_ENDIAN)
107 return ((p[0] << 8) | p[1]);
108 else
109 return ((p[1] << 8) | p[0]);
110}
111#else
112extern UHI GETTUHI (ptr);
113#endif
114
115#if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE)
116MEMOPS_INLINE USI
117GETTUSI (ptr p)
118{
119 if (TARGET_BIG_ENDIAN)
120 return ((p[0] << 24) | (p[1] << 16) | (p[2] << 8) | p[3]);
121 else
122 return ((p[3] << 24) | (p[2] << 16) | (p[1] << 8) | p[0]);
123}
124#else
125extern USI GETTUSI (ptr);
126#endif
127
128#if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE)
129MEMOPS_INLINE UDI
130GETTUDI (ptr p)
131{
132 if (TARGET_BIG_ENDIAN)
133 return MAKEDI ((p[0] << 24) | (p[1] << 16) | (p[2] << 8) | p[3], (p[4] << 24) | (p[5] << 16) | (p[6] << 8) | p[7]);
134 else
135 return MAKEDI ((p[7] << 24) | (p[6] << 16) | (p[5] << 8) | p[4], (p[3] << 24) | (p[2] << 16) | (p[1] << 8) | p[0]);
136}
137#else
138extern UDI GETTUDI (ptr);
139#endif
140
141#if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE)
142MEMOPS_INLINE void
143SETTQI (ptr p, QI val)
144{
145 if (TARGET_BIG_ENDIAN)
146 do { p[0] = val; } while (0);
147else
148 do { p[0] = val; } while (0);
149}
150#else
151extern void SETTQI (ptr, QI);
152#endif
153
154#if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE)
155MEMOPS_INLINE void
156SETTHI (ptr p, HI val)
157{
158 if (TARGET_BIG_ENDIAN)
159 do { p[0] = val >> 8; p[1] = val; } while (0);
160else
161 do { p[1] = val >> 8; p[0] = val; } while (0);
162}
163#else
164extern void SETTHI (ptr, HI);
165#endif
166
167#if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE)
168MEMOPS_INLINE void
169SETTSI (ptr p, SI val)
170{
171 if (TARGET_BIG_ENDIAN)
172 do { p[0] = val >> 24; p[1] = val >> 16; p[2] = val >> 8; p[3] = val; } while (0);
173else
174 do { p[3] = val >> 24; p[2] = val >> 16; p[1] = val >> 8; p[0] = val; } while (0);
175}
176#else
177extern void SETTSI (ptr, SI);
178#endif
179
180#if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE)
181MEMOPS_INLINE void
182SETTDI (ptr p, DI val)
183{
184 if (TARGET_BIG_ENDIAN)
185 do { SI t = GETHIDI (val); p[0] = t >> 24; p[1] = t >> 16; p[2] = t >> 8; p[3] = t; t = GETLODI (val); p[4] = t >> 24; p[5] = t >> 16; p[6] = t >> 8; p[7] = t; } while (0);
186else
187 do { SI t = GETHIDI (val); p[7] = t >> 24; p[6] = t >> 16; p[5] = t >> 8; p[4] = t; t = GETLODI (val); p[3] = t >> 24; p[2] = t >> 16; p[1] = t >> 8; p[0] = t; } while (0);
188}
189#else
190extern void SETTDI (ptr, DI);
191#endif
192
193#if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE)
194MEMOPS_INLINE void
195SETTUQI (ptr p, UQI val)
196{
197 if (TARGET_BIG_ENDIAN)
198 do { p[0] = val; } while (0);
199else
200 do { p[0] = val; } while (0);
201}
202#else
203extern void SETTUQI (ptr, UQI);
204#endif
205
206#if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE)
207MEMOPS_INLINE void
208SETTUHI (ptr p, UHI val)
209{
210 if (TARGET_BIG_ENDIAN)
211 do { p[0] = val >> 8; p[1] = val; } while (0);
212else
213 do { p[1] = val >> 8; p[0] = val; } while (0);
214}
215#else
216extern void SETTUHI (ptr, UHI);
217#endif
218
219#if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE)
220MEMOPS_INLINE void
221SETTUSI (ptr p, USI val)
222{
223 if (TARGET_BIG_ENDIAN)
224 do { p[0] = val >> 24; p[1] = val >> 16; p[2] = val >> 8; p[3] = val; } while (0);
225else
226 do { p[3] = val >> 24; p[2] = val >> 16; p[1] = val >> 8; p[0] = val; } while (0);
227}
228#else
229extern void SETTUSI (ptr, USI);
230#endif
231
232#if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE)
233MEMOPS_INLINE void
234SETTUDI (ptr p, UDI val)
235{
236 if (TARGET_BIG_ENDIAN)
237 do { SI t = GETHIDI (val); p[0] = t >> 24; p[1] = t >> 16; p[2] = t >> 8; p[3] = t; t = GETLODI (val); p[4] = t >> 24; p[5] = t >> 16; p[6] = t >> 8; p[7] = t; } while (0);
238else
239 do { SI t = GETHIDI (val); p[7] = t >> 24; p[6] = t >> 16; p[5] = t >> 8; p[4] = t; t = GETLODI (val); p[3] = t >> 24; p[2] = t >> 16; p[1] = t >> 8; p[0] = t; } while (0);
240}
241#else
242extern void SETTUDI (ptr, UDI);
243#endif
244
245
246/* FIXME: Need to merge with sim-core. */
247/* FIXME: Don't perform >= 4, text section checks if OEA. */
248#ifndef MEM_CHECK_READ
249#define MEM_CHECK_READ(addr, type) \
250 ((addr) >= 4 /*&& (addr) < STATE_MEM_SIZE (current_state)*/)
251#endif
252#ifndef MEM_CHECK_WRITE
253#define MEM_CHECK_WRITE(addr, type) \
254 ((addr) >= 4 /*&& (addr) < STATE_MEM_SIZE (current_state)*/ \
255 && ((addr) >= STATE_TEXT_END (current_state) \
256 || (addr) < STATE_TEXT_START (current_state)))
257#endif
258#ifndef MEM_CHECK_ALIGNMENT
259#define MEM_CHECK_ALIGNMENT(addr, type) \
260 (((addr) & (sizeof (type) - 1)) == 0)
261#endif
262
263#if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE)
264MEMOPS_INLINE QI
265GETMEMQI (SIM_CPU *cpu, ADDR a)
266{
267 if (! MEM_CHECK_READ (a, QI))
268 { engine_signal (cpu, SIM_SIGACCESS); }
269 if (! MEM_CHECK_ALIGNMENT (a, QI))
270 { engine_signal (cpu, SIM_SIGALIGN); }
271 PROFILE_COUNT_READ (cpu, a, MODE_QI);
272 return sim_core_read_1 (CPU_STATE (cpu), sim_core_read_map, a);
273}
274#else
275extern QI GETMEMQI (SIM_CPU *, ADDR);
276#endif
277
278#if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE)
279MEMOPS_INLINE HI
280GETMEMHI (SIM_CPU *cpu, ADDR a)
281{
282 if (! MEM_CHECK_READ (a, HI))
283 { engine_signal (cpu, SIM_SIGACCESS); }
284 if (! MEM_CHECK_ALIGNMENT (a, HI))
285 { engine_signal (cpu, SIM_SIGALIGN); }
286 PROFILE_COUNT_READ (cpu, a, MODE_HI);
287 return sim_core_read_2 (CPU_STATE (cpu), sim_core_read_map, a);
288}
289#else
290extern HI GETMEMHI (SIM_CPU *, ADDR);
291#endif
292
293#if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE)
294MEMOPS_INLINE SI
295GETMEMSI (SIM_CPU *cpu, ADDR a)
296{
297 if (! MEM_CHECK_READ (a, SI))
298 { engine_signal (cpu, SIM_SIGACCESS); }
299 if (! MEM_CHECK_ALIGNMENT (a, SI))
300 { engine_signal (cpu, SIM_SIGALIGN); }
301 PROFILE_COUNT_READ (cpu, a, MODE_SI);
302 return sim_core_read_4 (CPU_STATE (cpu), sim_core_read_map, a);
303}
304#else
305extern SI GETMEMSI (SIM_CPU *, ADDR);
306#endif
307
308#if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE)
309MEMOPS_INLINE DI
310GETMEMDI (SIM_CPU *cpu, ADDR a)
311{
312 if (! MEM_CHECK_READ (a, DI))
313 { engine_signal (cpu, SIM_SIGACCESS); }
314 if (! MEM_CHECK_ALIGNMENT (a, DI))
315 { engine_signal (cpu, SIM_SIGALIGN); }
316 PROFILE_COUNT_READ (cpu, a, MODE_DI);
317 return sim_core_read_8 (CPU_STATE (cpu), sim_core_read_map, a);
318}
319#else
320extern DI GETMEMDI (SIM_CPU *, ADDR);
321#endif
322
323#if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE)
324MEMOPS_INLINE UQI
325GETMEMUQI (SIM_CPU *cpu, ADDR a)
326{
327 if (! MEM_CHECK_READ (a, UQI))
328 { engine_signal (cpu, SIM_SIGACCESS); }
329 if (! MEM_CHECK_ALIGNMENT (a, UQI))
330 { engine_signal (cpu, SIM_SIGALIGN); }
331 PROFILE_COUNT_READ (cpu, a, MODE_UQI);
332 return sim_core_read_1 (CPU_STATE (cpu), sim_core_read_map, a);
333}
334#else
335extern UQI GETMEMUQI (SIM_CPU *, ADDR);
336#endif
337
338#if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE)
339MEMOPS_INLINE UHI
340GETMEMUHI (SIM_CPU *cpu, ADDR a)
341{
342 if (! MEM_CHECK_READ (a, UHI))
343 { engine_signal (cpu, SIM_SIGACCESS); }
344 if (! MEM_CHECK_ALIGNMENT (a, UHI))
345 { engine_signal (cpu, SIM_SIGALIGN); }
346 PROFILE_COUNT_READ (cpu, a, MODE_UHI);
347 return sim_core_read_2 (CPU_STATE (cpu), sim_core_read_map, a);
348}
349#else
350extern UHI GETMEMUHI (SIM_CPU *, ADDR);
351#endif
352
353#if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE)
354MEMOPS_INLINE USI
355GETMEMUSI (SIM_CPU *cpu, ADDR a)
356{
357 if (! MEM_CHECK_READ (a, USI))
358 { engine_signal (cpu, SIM_SIGACCESS); }
359 if (! MEM_CHECK_ALIGNMENT (a, USI))
360 { engine_signal (cpu, SIM_SIGALIGN); }
361 PROFILE_COUNT_READ (cpu, a, MODE_USI);
362 return sim_core_read_4 (CPU_STATE (cpu), sim_core_read_map, a);
363}
364#else
365extern USI GETMEMUSI (SIM_CPU *, ADDR);
366#endif
367
368#if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE)
369MEMOPS_INLINE UDI
370GETMEMUDI (SIM_CPU *cpu, ADDR a)
371{
372 if (! MEM_CHECK_READ (a, UDI))
373 { engine_signal (cpu, SIM_SIGACCESS); }
374 if (! MEM_CHECK_ALIGNMENT (a, UDI))
375 { engine_signal (cpu, SIM_SIGALIGN); }
376 PROFILE_COUNT_READ (cpu, a, MODE_UDI);
377 return sim_core_read_8 (CPU_STATE (cpu), sim_core_read_map, a);
378}
379#else
380extern UDI GETMEMUDI (SIM_CPU *, ADDR);
381#endif
382
383#if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE)
384MEMOPS_INLINE void
385SETMEMQI (SIM_CPU *cpu, ADDR a, QI val)
386{
387 if (! MEM_CHECK_WRITE (a, QI))
388 { engine_signal (cpu, SIM_SIGACCESS); return; }
389 if (! MEM_CHECK_ALIGNMENT (a, QI))
390 { engine_signal (cpu, SIM_SIGALIGN); return; }
391 PROFILE_COUNT_WRITE (cpu, a, MODE_QI);
392 sim_core_write_1 (CPU_STATE (cpu), sim_core_read_map, a, val);
393}
394#else
395extern void SETMEMQI (SIM_CPU *, ADDR, QI);
396#endif
397
398#if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE)
399MEMOPS_INLINE void
400SETMEMHI (SIM_CPU *cpu, ADDR a, HI val)
401{
402 if (! MEM_CHECK_WRITE (a, HI))
403 { engine_signal (cpu, SIM_SIGACCESS); return; }
404 if (! MEM_CHECK_ALIGNMENT (a, HI))
405 { engine_signal (cpu, SIM_SIGALIGN); return; }
406 PROFILE_COUNT_WRITE (cpu, a, MODE_HI);
407 sim_core_write_2 (CPU_STATE (cpu), sim_core_read_map, a, val);
408}
409#else
410extern void SETMEMHI (SIM_CPU *, ADDR, HI);
411#endif
412
413#if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE)
414MEMOPS_INLINE void
415SETMEMSI (SIM_CPU *cpu, ADDR a, SI val)
416{
417 if (! MEM_CHECK_WRITE (a, SI))
418 { engine_signal (cpu, SIM_SIGACCESS); return; }
419 if (! MEM_CHECK_ALIGNMENT (a, SI))
420 { engine_signal (cpu, SIM_SIGALIGN); return; }
421 PROFILE_COUNT_WRITE (cpu, a, MODE_SI);
422 sim_core_write_4 (CPU_STATE (cpu), sim_core_read_map, a, val);
423}
424#else
425extern void SETMEMSI (SIM_CPU *, ADDR, SI);
426#endif
427
428#if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE)
429MEMOPS_INLINE void
430SETMEMDI (SIM_CPU *cpu, ADDR a, DI val)
431{
432 if (! MEM_CHECK_WRITE (a, DI))
433 { engine_signal (cpu, SIM_SIGACCESS); return; }
434 if (! MEM_CHECK_ALIGNMENT (a, DI))
435 { engine_signal (cpu, SIM_SIGALIGN); return; }
436 PROFILE_COUNT_WRITE (cpu, a, MODE_DI);
437 sim_core_write_8 (CPU_STATE (cpu), sim_core_read_map, a, val);
438}
439#else
440extern void SETMEMDI (SIM_CPU *, ADDR, DI);
441#endif
442
443#if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE)
444MEMOPS_INLINE void
445SETMEMUQI (SIM_CPU *cpu, ADDR a, UQI val)
446{
447 if (! MEM_CHECK_WRITE (a, UQI))
448 { engine_signal (cpu, SIM_SIGACCESS); return; }
449 if (! MEM_CHECK_ALIGNMENT (a, UQI))
450 { engine_signal (cpu, SIM_SIGALIGN); return; }
451 PROFILE_COUNT_WRITE (cpu, a, MODE_UQI);
452 sim_core_write_1 (CPU_STATE (cpu), sim_core_read_map, a, val);
453}
454#else
455extern void SETMEMUQI (SIM_CPU *, ADDR, UQI);
456#endif
457
458#if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE)
459MEMOPS_INLINE void
460SETMEMUHI (SIM_CPU *cpu, ADDR a, UHI val)
461{
462 if (! MEM_CHECK_WRITE (a, UHI))
463 { engine_signal (cpu, SIM_SIGACCESS); return; }
464 if (! MEM_CHECK_ALIGNMENT (a, UHI))
465 { engine_signal (cpu, SIM_SIGALIGN); return; }
466 PROFILE_COUNT_WRITE (cpu, a, MODE_UHI);
467 sim_core_write_2 (CPU_STATE (cpu), sim_core_read_map, a, val);
468}
469#else
470extern void SETMEMUHI (SIM_CPU *, ADDR, UHI);
471#endif
472
473#if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE)
474MEMOPS_INLINE void
475SETMEMUSI (SIM_CPU *cpu, ADDR a, USI val)
476{
477 if (! MEM_CHECK_WRITE (a, USI))
478 { engine_signal (cpu, SIM_SIGACCESS); return; }
479 if (! MEM_CHECK_ALIGNMENT (a, USI))
480 { engine_signal (cpu, SIM_SIGALIGN); return; }
481 PROFILE_COUNT_WRITE (cpu, a, MODE_USI);
482 sim_core_write_4 (CPU_STATE (cpu), sim_core_read_map, a, val);
483}
484#else
485extern void SETMEMUSI (SIM_CPU *, ADDR, USI);
486#endif
487
488#if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE)
489MEMOPS_INLINE void
490SETMEMUDI (SIM_CPU *cpu, ADDR a, UDI val)
491{
492 if (! MEM_CHECK_WRITE (a, UDI))
493 { engine_signal (cpu, SIM_SIGACCESS); return; }
494 if (! MEM_CHECK_ALIGNMENT (a, UDI))
495 { engine_signal (cpu, SIM_SIGALIGN); return; }
496 PROFILE_COUNT_WRITE (cpu, a, MODE_UDI);
497 sim_core_write_8 (CPU_STATE (cpu), sim_core_read_map, a, val);
498}
499#else
500extern void SETMEMUDI (SIM_CPU *, ADDR, UDI);
501#endif
502
503#endif /* CGEN_MEMS_H */
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