projects / deliverable / binutils-gdb.git / blame
| Commit | Line | Data |
|---|---|---|
| b9c8cd10 DE |
1 | /* Simulator cache definitions for CGEN simulators (and maybe others). |
| 2 | Copyright (C) 1996, 1997 Free Software Foundation, Inc. | |
| 3 | Contributed by Cygnus Support. | |
| 4 | ||
| 5 | This file is part of GDB, the GNU debugger. | |
| 6 | ||
| 7 | This program is free software; you can redistribute it and/or modify | |
| 8 | it under the terms of the GNU General Public License as published by | |
| 9 | the Free Software Foundation; either version 2, or (at your option) | |
| 10 | any later version. | |
| 11 | ||
| 12 | This program is distributed in the hope that it will be useful, | |
| 13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 15 | GNU General Public License for more details. | |
| 16 | ||
| 17 | You should have received a copy of the GNU General Public License along | |
| 18 | with this program; if not, write to the Free Software Foundation, Inc., | |
| 19 | 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ | |
| 20 | ||
| 21 | #ifndef SCACHE_H | |
| 22 | #define SCACHE_H | |
| 23 | ||
| 24 | /* A cached insn. */ | |
| 25 | typedef struct scache { | |
| 26 | IADDR next; | |
| 27 | union { | |
| 28 | #ifdef USE_SEM_SWITCH | |
| 29 | #ifdef __GNUC__ | |
| 30 | void *sem_case; | |
| 31 | #else | |
| 32 | int sem_case; | |
| 33 | #endif | |
| 34 | #endif | |
| 35 | SEMANTIC_CACHE_FN *sem_fn; | |
| 36 | } semantic; | |
| 37 | ARGBUF argbuf; | |
| 38 | } SCACHE; | |
| 39 | ||
| 40 | /* Scache data for each cpu. */ | |
| 41 | ||
| 42 | typedef struct cpu_scache { | |
| 43 | /* Simulator cache size. */ | |
| 44 | int size; | |
| 45 | #define CPU_SCACHE_SIZE(cpu) ((cpu)->cgen_cpu.scache.size) | |
| 46 | /* Cache. */ | |
| 47 | SCACHE *cache; | |
| 48 | #define CPU_SCACHE_CACHE(cpu) ((cpu)->cgen_cpu.scache.cache) | |
| 49 | #if 0 /* FIXME: wip */ | |
| 50 | /* Free list. */ | |
| 51 | SCACHE *free; | |
| 52 | #define CPU_SCACHE_FREE(cpu) ((cpu)->cgen_cpu.scache.free) | |
| 53 | /* Hash table. */ | |
| 54 | SCACHE **hash_table; | |
| 55 | #define CPU_SCACHE_HASH_TABLE(cpu) ((cpu)->cgen_cpu.scache.hash_table) | |
| 56 | #endif | |
| 57 | ||
| 58 | #if WITH_PROFILE_SCACHE_P | |
| 59 | /* Cache hits, misses. */ | |
| 60 | unsigned long hits, misses; | |
| 61 | #define CPU_SCACHE_HITS(cpu) ((cpu)->cgen_cpu.scache.hits) | |
| 62 | #define CPU_SCACHE_MISSES(cpu) ((cpu)->cgen_cpu.scache.misses) | |
| 63 | #endif | |
| 64 | } CPU_SCACHE; | |
| 65 | ||
| 66 | /* Default number of cached blocks. */ | |
| 67 | #ifdef CONFIG_SIM_CACHE_SIZE | |
| 68 | #define SCACHE_DEFAULT_CACHE_SIZE CONFIG_SIM_CACHE_SIZE | |
| 69 | #else | |
| 70 | #define SCACHE_DEFAULT_CACHE_SIZE 1024 | |
| 71 | #endif | |
| 72 | ||
| 73 | /* Hash a PC value. */ | |
| 74 | /* FIXME: cpu specific */ | |
| 75 | #define SCACHE_HASH_PC(state, pc) \ | |
| 76 | (((pc) >> 1) & (STATE_SCACHE_SIZE (sd) - 1)) | |
| 77 | ||
| 78 | /* Non-zero if cache is in use. */ | |
| 79 | #define USING_SCACHE_P(sd) (STATE_SCACHE_SIZE (sd) > 0) | |
| 80 | ||
| 81 | /* Install the simulator cache into the simulator. */ | |
| 82 | MODULE_INSTALL_FN scache_install; | |
| 83 | ||
| 84 | /* Flush all cpu's caches. */ | |
| 85 | void scache_flush (SIM_DESC); | |
| 86 | \f | |
| 87 | /* Profiling support. */ | |
| 88 | ||
| 89 | /* Print summary scache usage information. */ | |
| 90 | void scache_print_profile (SIM_DESC sd, int verbose); | |
| 91 | ||
| 92 | #if WITH_PROFILE_SCACHE_P | |
| 93 | #define PROFILE_COUNT_SCACHE_HIT(cpu) \ | |
| 94 | do { \ | |
| 95 | if (CPU_PROFILE_FLAGS (cpu) [PROFILE_SCACHE_IDX]) \ | |
| 96 | ++ CPU_SCACHE_HITS (cpu); \ | |
| 97 | } while (0) | |
| 98 | #define PROFILE_COUNT_SCACHE_MISS(cpu) \ | |
| 99 | do { \ | |
| 100 | if (CPU_PROFILE_FLAGS (cpu) [PROFILE_SCACHE_IDX]) \ | |
| 101 | ++ CPU_SCACHE_MISSES (cpu); \ | |
| 102 | } while (0) | |
| 103 | #else | |
| 104 | #define PROFILE_COUNT_SCACHE_HIT(cpu) | |
| 105 | #define PROFILE_COUNT_SCACHE_MISS(cpu) | |
| 106 | #endif | |
| 107 | ||
| 108 | #endif /* SCACHE_H */ |