Simplify logic behind the generic configuration option --enable-sim-alignment.
[deliverable/binutils-gdb.git] / sim / common / sim-base.h
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1/* Simulator pseudo baseclass.
2 Copyright (C) 1997 Free Software Foundation, Inc.
3 Contributed by Cygnus Support.
4
5This file is part of GDB, the GNU debugger.
6
7This program is free software; you can redistribute it and/or modify
8it under the terms of the GNU General Public License as published by
9the Free Software Foundation; either version 2, or (at your option)
10any later version.
11
12This program is distributed in the hope that it will be useful,
13but WITHOUT ANY WARRANTY; without even the implied warranty of
14MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15GNU General Public License for more details.
16
17You should have received a copy of the GNU General Public License along
18with this program; if not, write to the Free Software Foundation, Inc.,
1959 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
20
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21
22/* Simulator state pseudo baseclass.
23
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24 Each simulator is required to have the file ``sim-main.h''. That
25 file includes ``sim-basics.h'', defines the base type ``sim_cia''
26 (the data type that contains complete current instruction address
27 information), include ``sim-base.h'':
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28
29 #include "sim-basics.h"
30 typedef address_word sim_cia;
31 #include "sim-base.h"
32
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33 finally, two data types ``struct _sim_cpu' and ``struct sim_state'
34 are defined:
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35
36 struct _sim_cpu {
37 ... simulator specific members ...
38 sim_cpu_base base;
39 };
40
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41 struct sim_state {
42 sim_cpu cpu[MAX_NR_PROCESSORS];
43 #if (WITH_SMP)
44 #define STATE_CPU(sd,n) (&(sd)->cpu[n])
45 #else
46 #define STATE_CPU(sd,n) (&(sd)->cpu[0])
47 #endif
48 ... simulator specific members ...
49 sim_state_base base;
50 };
51
52 Note that `base' appears last. This makes `base.magic' appear last
53 in the entire struct and helps catch miscompilation errors. */
54
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55
56#ifndef SIM_BASE_H
57#define SIM_BASE_H
58
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59/* Pre-declare certain types. */
60
61/* typedef <target-dependant> sim_cia; */
62#ifndef NULL_CIA
63#define NULL_CIA ((sim_cia) 0)
64#endif
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65#ifndef INVALID_INSTRUCTION_ADDRESS
66#define INVALID_INSTRUCTION_ADDRESS ((address_word)0 - 1)
67#endif
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68typedef struct _sim_cpu sim_cpu;
69
70#include "sim-module.h"
18c319ae 71
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72#include "sim-trace.h"
73#include "sim-profile.h"
74#include "sim-model.h"
75#include "sim-core.h"
76#include "sim-events.h"
77#include "sim-io.h"
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78#include "sim-engine.h"
79#include "sim-watch.h"
a34abff8 80#include "sim-memopt.h"
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81
82
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83/* Global pointer to current state while sim_resume is running.
84 On a machine with lots of registers, it might be possible to reserve
85 one of them for current_state. However on a machine with few registers
86 current_state can't permanently live in one and indirecting through it
87 will be slower [in which case one can have sim_resume set globals from
88 current_state for faster access].
89 If CURRENT_STATE_REG is defined, it means current_state is living in
90 a global register. */
91
e6a43446 92
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93#ifdef CURRENT_STATE_REG
94/* FIXME: wip */
95#else
96extern struct sim_state *current_state;
97#endif
98
e6a43446 99
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100/* The simulator may provide different (and faster) definition. */
101#ifndef CURRENT_STATE
102#define CURRENT_STATE current_state
103#endif
104
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105
106typedef struct {
e6a43446 107
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108 /* Simulator's argv[0]. */
109 const char *my_name;
110#define STATE_MY_NAME(sd) ((sd)->base.my_name)
111
112 /* Who opened the simulator. */
113 SIM_OPEN_KIND open_kind;
114#define STATE_OPEN_KIND(sd) ((sd)->base.open_kind)
115
116 /* The host callbacks. */
117 struct host_callback_struct *callback;
118#define STATE_CALLBACK(sd) ((sd)->base.callback)
119
120#if 0 /* FIXME: Not ready yet. */
121 /* Stuff defined in sim-config.h. */
122 struct sim_config config;
123#define STATE_CONFIG(sd) ((sd)->base.config)
124#endif
0f2811d1 125
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126 /* List of installed module `init' handlers. */
127 MODULE_INIT_LIST *init_list;
128#define STATE_INIT_LIST(sd) ((sd)->base.init_list)
129 /* List of installed module `uninstall' handlers. */
130 MODULE_UNINSTALL_LIST *uninstall_list;
131#define STATE_UNINSTALL_LIST(sd) ((sd)->base.uninstall_list)
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132 /* List of installed module `resume' handlers. */
133 MODULE_RESUME_LIST *resume_list;
134#define STATE_RESUME_LIST(sd) ((sd)->base.resume_list)
135 /* List of installed module `suspend' handlers. */
136 MODULE_SUSPEND_LIST *suspend_list;
137#define STATE_SUSPEND_LIST(sd) ((sd)->base.suspend_list)
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138
139 /* ??? This might be more appropriate in sim_cpu. */
140 /* Machine tables for this cpu. See sim-model.h. */
141 const MODEL *model;
142#define STATE_MODEL(sd) ((sd)->base.model)
143
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144 /* Supported options. */
145 struct option_list *options;
146#define STATE_OPTIONS(sd) ((sd)->base.options)
147
148 /* Non-zero if -v specified. */
149 int verbose_p;
150#define STATE_VERBOSE_P(sd) ((sd)->base.verbose_p)
151
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152 /* If non NULL, the BFD architecture specified on the command line */
153 const struct bfd_arch_info *architecture;
154#define STATE_ARCHITECTURE(sd) ((sd)->base.architecture)
155
156 /* If non NULL, the bfd target specified on the command line */
157 const char *target;
158#define STATE_TARGET(sd) ((sd)->base.target)
159
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160 /* In standalone simulator, this is the program's arguments passed
161 on the command line. */
162 char **prog_argv;
163#define STATE_PROG_ARGV(sd) ((sd)->base.prog_argv)
164
165 /* The program's bfd. */
166 struct _bfd *prog_bfd;
167#define STATE_PROG_BFD(sd) ((sd)->base.prog_bfd)
168
169 /* The program's text section. */
170 struct sec *text_section;
171 /* Starting and ending text section addresses from the bfd. */
172 SIM_ADDR text_start, text_end;
173#define STATE_TEXT_SECTION(sd) ((sd)->base.text_section)
174#define STATE_TEXT_START(sd) ((sd)->base.text_start)
175#define STATE_TEXT_END(sd) ((sd)->base.text_end)
176
177 /* Start address, set when the program is loaded from the bfd. */
178 SIM_ADDR start_addr;
179#define STATE_START_ADDR(sd) ((sd)->base.start_addr)
180
c967f187 181#if WITH_SCACHE
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182 /* Size of the simulator's cache, if any.
183 This is not the target's cache. It is the cache the simulator uses
184 to process instructions. */
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185 unsigned int scache_size;
186#define STATE_SCACHE_SIZE(sd) ((sd)->base.scache_size)
187#endif
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188
189 /* FIXME: Move to top level sim_state struct (as some struct)? */
190#ifdef SIM_HAVE_FLATMEM
191 unsigned int mem_size;
192#define STATE_MEM_SIZE(sd) ((sd)->base.mem_size)
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193 unsigned int mem_base;
194#define STATE_MEM_BASE(sd) ((sd)->base.mem_base)
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195 unsigned char *memory;
196#define STATE_MEMORY(sd) ((sd)->base.memory)
197#endif
198
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199 /* core memory bus */
200#define STATE_CORE(sd) (&(sd)->base.core)
201 sim_core core;
202
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203 /* memory-options for managing the core */
204#define STATE_MEMOPT(sd) ((sd)->base.memopt)
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205 sim_memopt *memopt;
206
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207 /* event handler */
208#define STATE_EVENTS(sd) (&(sd)->base.events)
209 sim_events events;
210
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211 /* generic halt/resume engine */
212 sim_engine engine;
213#define STATE_ENGINE(sd) (&(sd)->base.engine)
214
215 /* generic watchpoint support */
216 sim_watchpoints watchpoints;
217#define STATE_WATCHPOINTS(sd) (&(sd)->base.watchpoints)
218
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219 /* Marker for those wanting to do sanity checks.
220 This should remain the last member of this struct to help catch
221 miscompilation errors. */
222 int magic;
223#define SIM_MAGIC_NUMBER 0x4242
224#define STATE_MAGIC(sd) ((sd)->base.magic)
e6a43446 225
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226} sim_state_base;
227
e6a43446 228
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229/* Pseudo baseclass for each cpu. */
230
231typedef struct {
e6a43446 232
0f2811d1 233 /* Backlink to main state struct. */
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234 SIM_DESC state;
235#define CPU_STATE(cpu) ((cpu)->base.state)
0f2811d1 236
7a418800 237 /* Processor specific core data */
7a418800 238 sim_cpu_core core;
18c319ae 239#define CPU_CORE(cpu) (& (cpu)->base.core)
7a418800 240
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241 /* Trace data. See sim-trace.h. */
242 TRACE_DATA trace_data;
243#define CPU_TRACE_DATA(cpu) (& (cpu)->base.trace_data)
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244
245 /* Maximum number of debuggable entities.
246 This debugging is not intended for normal use.
247 It is only enabled when the simulator is configured with --with-debug
248 which shouldn't normally be specified. */
249#ifndef MAX_DEBUG_VALUES
250#define MAX_DEBUG_VALUES 4
251#endif
252
253 /* Boolean array of specified debugging flags. */
254 char debug_flags[MAX_DEBUG_VALUES];
255#define CPU_DEBUG_FLAGS(cpu) ((cpu)->base.debug_flags)
256 /* Standard values. */
257#define DEBUG_INSN_IDX 0
258#define DEBUG_NEXT_IDX 2 /* simulator specific debug bits begin here */
259
260 /* Debugging output goes to this or stderr if NULL.
261 We can't store `stderr' here as stderr goes through a callback. */
262 FILE *debug_file;
5bfbd725 263#define CPU_DEBUG_FILE(cpu) ((cpu)->base.debug_file)
0f2811d1 264
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265 /* Profile data. See sim-profile.h. */
266 PROFILE_DATA profile_data;
267#define CPU_PROFILE_DATA(cpu) (& (cpu)->base.profile_data)
e6a43446 268
0f2811d1 269} sim_cpu_base;
e77fd269 270
e6a43446 271
e77fd269 272/* Functions for allocating/freeing a sim_state. */
4b2a6aed 273SIM_DESC sim_state_alloc PARAMS ((SIM_OPEN_KIND kind, host_callback *callback));
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274void sim_state_free PARAMS ((SIM_DESC));
275
e6a43446 276
e77fd269 277#endif /* SIM_BASE_H */
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