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e77fd269 DE |
1 | /* Simulator pseudo baseclass. |
2 | Copyright (C) 1997 Free Software Foundation, Inc. | |
3 | Contributed by Cygnus Support. | |
4 | ||
5 | This file is part of GDB, the GNU debugger. | |
6 | ||
7 | This program is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2, or (at your option) | |
10 | any later version. | |
11 | ||
12 | This program is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License along | |
18 | with this program; if not, write to the Free Software Foundation, Inc., | |
19 | 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ | |
20 | ||
e6a43446 DE |
21 | |
22 | /* Simulator state pseudo baseclass. | |
23 | ||
4b2a6aed AC |
24 | Each simulator is required to have the file ``sim-main.h''. That |
25 | file includes ``sim-basics.h'', defines the base type ``sim_cia'' | |
26 | (the data type that contains complete current instruction address | |
27 | information), include ``sim-base.h'': | |
e6a43446 DE |
28 | |
29 | #include "sim-basics.h" | |
30 | typedef address_word sim_cia; | |
966df580 DE |
31 | /-* If `sim_cia' is not an integral value (e.g. a struct), define |
32 | CIA_ADDR to return the integral value. *-/ | |
33 | /-* #define CIA_ADDR(cia) (...) *-/ | |
e6a43446 DE |
34 | #include "sim-base.h" |
35 | ||
966df580 | 36 | finally, two data types `struct _sim_cpu' and `struct sim_state' |
4b2a6aed | 37 | are defined: |
e6a43446 DE |
38 | |
39 | struct _sim_cpu { | |
40 | ... simulator specific members ... | |
41 | sim_cpu_base base; | |
42 | }; | |
43 | ||
e6a43446 DE |
44 | struct sim_state { |
45 | sim_cpu cpu[MAX_NR_PROCESSORS]; | |
46 | #if (WITH_SMP) | |
47 | #define STATE_CPU(sd,n) (&(sd)->cpu[n]) | |
48 | #else | |
49 | #define STATE_CPU(sd,n) (&(sd)->cpu[0]) | |
50 | #endif | |
51 | ... simulator specific members ... | |
52 | sim_state_base base; | |
53 | }; | |
54 | ||
55 | Note that `base' appears last. This makes `base.magic' appear last | |
56 | in the entire struct and helps catch miscompilation errors. */ | |
57 | ||
e77fd269 DE |
58 | |
59 | #ifndef SIM_BASE_H | |
60 | #define SIM_BASE_H | |
61 | ||
e6a43446 DE |
62 | /* Pre-declare certain types. */ |
63 | ||
64 | /* typedef <target-dependant> sim_cia; */ | |
65 | #ifndef NULL_CIA | |
66 | #define NULL_CIA ((sim_cia) 0) | |
67 | #endif | |
e5ce1670 DE |
68 | /* Return the current instruction address as a number. |
69 | Some targets treat the current instruction address as a struct | |
70 | (e.g. for delay slot handling). */ | |
71 | #ifndef CIA_ADDR | |
72 | #define CIA_ADDR(cia) (cia) | |
73 | #endif | |
4b2a6aed AC |
74 | #ifndef INVALID_INSTRUCTION_ADDRESS |
75 | #define INVALID_INSTRUCTION_ADDRESS ((address_word)0 - 1) | |
76 | #endif | |
e5ce1670 | 77 | |
e6a43446 DE |
78 | typedef struct _sim_cpu sim_cpu; |
79 | ||
80 | #include "sim-module.h" | |
18c319ae | 81 | |
e6a43446 | 82 | #include "sim-trace.h" |
e6a43446 DE |
83 | #include "sim-core.h" |
84 | #include "sim-events.h" | |
4ca7d6d2 AC |
85 | #include "sim-profile.h" |
86 | #ifdef SIM_HAVE_MODEL | |
87 | #include "sim-model.h" | |
88 | #endif | |
e6a43446 | 89 | #include "sim-io.h" |
18c319ae AC |
90 | #include "sim-engine.h" |
91 | #include "sim-watch.h" | |
a34abff8 | 92 | #include "sim-memopt.h" |
e5ce1670 DE |
93 | #ifdef SIM_HAVE_BREAKPOINTS |
94 | #include "sim-break.h" | |
95 | #endif | |
e6a43446 | 96 | |
e77fd269 DE |
97 | /* Global pointer to current state while sim_resume is running. |
98 | On a machine with lots of registers, it might be possible to reserve | |
99 | one of them for current_state. However on a machine with few registers | |
100 | current_state can't permanently live in one and indirecting through it | |
101 | will be slower [in which case one can have sim_resume set globals from | |
102 | current_state for faster access]. | |
103 | If CURRENT_STATE_REG is defined, it means current_state is living in | |
104 | a global register. */ | |
105 | ||
e6a43446 | 106 | |
e77fd269 DE |
107 | #ifdef CURRENT_STATE_REG |
108 | /* FIXME: wip */ | |
109 | #else | |
110 | extern struct sim_state *current_state; | |
111 | #endif | |
112 | ||
e6a43446 | 113 | |
0f2811d1 DE |
114 | /* The simulator may provide different (and faster) definition. */ |
115 | #ifndef CURRENT_STATE | |
116 | #define CURRENT_STATE current_state | |
117 | #endif | |
118 | ||
0f2811d1 DE |
119 | |
120 | typedef struct { | |
e6a43446 | 121 | |
e77fd269 DE |
122 | /* Simulator's argv[0]. */ |
123 | const char *my_name; | |
124 | #define STATE_MY_NAME(sd) ((sd)->base.my_name) | |
125 | ||
126 | /* Who opened the simulator. */ | |
127 | SIM_OPEN_KIND open_kind; | |
128 | #define STATE_OPEN_KIND(sd) ((sd)->base.open_kind) | |
129 | ||
130 | /* The host callbacks. */ | |
131 | struct host_callback_struct *callback; | |
132 | #define STATE_CALLBACK(sd) ((sd)->base.callback) | |
133 | ||
bda9d8a3 DE |
134 | /* The type of simulation environment (user/operating). */ |
135 | enum sim_environment environment; | |
136 | #define STATE_ENVIRONMENT(sd) ((sd)->base.environment) | |
137 | ||
e77fd269 DE |
138 | #if 0 /* FIXME: Not ready yet. */ |
139 | /* Stuff defined in sim-config.h. */ | |
140 | struct sim_config config; | |
141 | #define STATE_CONFIG(sd) ((sd)->base.config) | |
142 | #endif | |
0f2811d1 | 143 | |
c967f187 | 144 | /* List of installed module `init' handlers. */ |
0e701ac3 AC |
145 | struct module_list *modules; |
146 | #define STATE_MODULES(sd) ((sd)->base.modules) | |
c967f187 | 147 | |
0f2811d1 DE |
148 | /* Supported options. */ |
149 | struct option_list *options; | |
150 | #define STATE_OPTIONS(sd) ((sd)->base.options) | |
151 | ||
152 | /* Non-zero if -v specified. */ | |
153 | int verbose_p; | |
154 | #define STATE_VERBOSE_P(sd) ((sd)->base.verbose_p) | |
155 | ||
e5ce1670 DE |
156 | /* Non cpu-specific trace data. See sim-trace.h. */ |
157 | TRACE_DATA trace_data; | |
158 | #define STATE_TRACE_DATA(sd) (& (sd)->base.trace_data) | |
159 | ||
18c319ae AC |
160 | /* If non NULL, the BFD architecture specified on the command line */ |
161 | const struct bfd_arch_info *architecture; | |
162 | #define STATE_ARCHITECTURE(sd) ((sd)->base.architecture) | |
163 | ||
164 | /* If non NULL, the bfd target specified on the command line */ | |
165 | const char *target; | |
166 | #define STATE_TARGET(sd) ((sd)->base.target) | |
167 | ||
0f2811d1 DE |
168 | /* In standalone simulator, this is the program's arguments passed |
169 | on the command line. */ | |
170 | char **prog_argv; | |
171 | #define STATE_PROG_ARGV(sd) ((sd)->base.prog_argv) | |
172 | ||
173 | /* The program's bfd. */ | |
174 | struct _bfd *prog_bfd; | |
175 | #define STATE_PROG_BFD(sd) ((sd)->base.prog_bfd) | |
176 | ||
177 | /* The program's text section. */ | |
178 | struct sec *text_section; | |
179 | /* Starting and ending text section addresses from the bfd. */ | |
180 | SIM_ADDR text_start, text_end; | |
181 | #define STATE_TEXT_SECTION(sd) ((sd)->base.text_section) | |
182 | #define STATE_TEXT_START(sd) ((sd)->base.text_start) | |
183 | #define STATE_TEXT_END(sd) ((sd)->base.text_end) | |
184 | ||
185 | /* Start address, set when the program is loaded from the bfd. */ | |
186 | SIM_ADDR start_addr; | |
187 | #define STATE_START_ADDR(sd) ((sd)->base.start_addr) | |
188 | ||
189 | /* Size of the simulator's cache, if any. | |
190 | This is not the target's cache. It is the cache the simulator uses | |
191 | to process instructions. */ | |
c967f187 DE |
192 | unsigned int scache_size; |
193 | #define STATE_SCACHE_SIZE(sd) ((sd)->base.scache_size) | |
0f2811d1 DE |
194 | |
195 | /* FIXME: Move to top level sim_state struct (as some struct)? */ | |
196 | #ifdef SIM_HAVE_FLATMEM | |
197 | unsigned int mem_size; | |
198 | #define STATE_MEM_SIZE(sd) ((sd)->base.mem_size) | |
18c319ae AC |
199 | unsigned int mem_base; |
200 | #define STATE_MEM_BASE(sd) ((sd)->base.mem_base) | |
0f2811d1 DE |
201 | unsigned char *memory; |
202 | #define STATE_MEMORY(sd) ((sd)->base.memory) | |
203 | #endif | |
204 | ||
e6a43446 DE |
205 | /* core memory bus */ |
206 | #define STATE_CORE(sd) (&(sd)->base.core) | |
207 | sim_core core; | |
208 | ||
b9bcce67 | 209 | /* Record of memory sections added via the memory-options interface. */ |
a34abff8 | 210 | #define STATE_MEMOPT(sd) ((sd)->base.memopt) |
a34abff8 AC |
211 | sim_memopt *memopt; |
212 | ||
e6a43446 DE |
213 | /* event handler */ |
214 | #define STATE_EVENTS(sd) (&(sd)->base.events) | |
215 | sim_events events; | |
216 | ||
18c319ae AC |
217 | /* generic halt/resume engine */ |
218 | sim_engine engine; | |
219 | #define STATE_ENGINE(sd) (&(sd)->base.engine) | |
220 | ||
221 | /* generic watchpoint support */ | |
222 | sim_watchpoints watchpoints; | |
223 | #define STATE_WATCHPOINTS(sd) (&(sd)->base.watchpoints) | |
224 | ||
e5ce1670 DE |
225 | /* Pointer to list of breakpoints */ |
226 | struct sim_breakpoint *breakpoints; | |
227 | #define STATE_BREAKPOINTS(sd) ((sd)->base.breakpoints) | |
228 | ||
0f2811d1 DE |
229 | /* Marker for those wanting to do sanity checks. |
230 | This should remain the last member of this struct to help catch | |
231 | miscompilation errors. */ | |
232 | int magic; | |
233 | #define SIM_MAGIC_NUMBER 0x4242 | |
234 | #define STATE_MAGIC(sd) ((sd)->base.magic) | |
235 | } sim_state_base; | |
236 | ||
e6a43446 | 237 | |
0f2811d1 DE |
238 | /* Pseudo baseclass for each cpu. */ |
239 | ||
240 | typedef struct { | |
e6a43446 | 241 | |
0f2811d1 | 242 | /* Backlink to main state struct. */ |
c967f187 DE |
243 | SIM_DESC state; |
244 | #define CPU_STATE(cpu) ((cpu)->base.state) | |
0f2811d1 | 245 | |
966df580 DE |
246 | /* The name of the cpu. */ |
247 | const char *name; | |
248 | #define CPU_NAME(cpu) ((cpu)->base.name) | |
249 | ||
250 | /* Options specific to this cpu. */ | |
251 | struct option_list *options; | |
252 | #define CPU_OPTIONS(cpu) ((cpu)->base.options) | |
253 | ||
7a418800 | 254 | /* Processor specific core data */ |
7a418800 | 255 | sim_cpu_core core; |
18c319ae | 256 | #define CPU_CORE(cpu) (& (cpu)->base.core) |
7a418800 | 257 | |
c967f187 DE |
258 | /* Trace data. See sim-trace.h. */ |
259 | TRACE_DATA trace_data; | |
260 | #define CPU_TRACE_DATA(cpu) (& (cpu)->base.trace_data) | |
0f2811d1 DE |
261 | |
262 | /* Maximum number of debuggable entities. | |
263 | This debugging is not intended for normal use. | |
264 | It is only enabled when the simulator is configured with --with-debug | |
265 | which shouldn't normally be specified. */ | |
266 | #ifndef MAX_DEBUG_VALUES | |
267 | #define MAX_DEBUG_VALUES 4 | |
268 | #endif | |
269 | ||
270 | /* Boolean array of specified debugging flags. */ | |
271 | char debug_flags[MAX_DEBUG_VALUES]; | |
272 | #define CPU_DEBUG_FLAGS(cpu) ((cpu)->base.debug_flags) | |
273 | /* Standard values. */ | |
274 | #define DEBUG_INSN_IDX 0 | |
275 | #define DEBUG_NEXT_IDX 2 /* simulator specific debug bits begin here */ | |
276 | ||
277 | /* Debugging output goes to this or stderr if NULL. | |
278 | We can't store `stderr' here as stderr goes through a callback. */ | |
279 | FILE *debug_file; | |
5bfbd725 | 280 | #define CPU_DEBUG_FILE(cpu) ((cpu)->base.debug_file) |
0f2811d1 | 281 | |
c967f187 DE |
282 | /* Profile data. See sim-profile.h. */ |
283 | PROFILE_DATA profile_data; | |
284 | #define CPU_PROFILE_DATA(cpu) (& (cpu)->base.profile_data) | |
e6a43446 | 285 | |
966df580 DE |
286 | #ifdef SIM_HAVE_MODEL |
287 | /* Machine tables for this cpu. See sim-model.h. */ | |
288 | const MACH *mach; | |
289 | #define CPU_MACH(cpu) ((cpu)->base.mach) | |
290 | /* The selected model. */ | |
291 | const MODEL *model; | |
292 | #define CPU_MODEL(cpu) ((cpu)->base.model) | |
293 | #endif | |
294 | ||
0f2811d1 | 295 | } sim_cpu_base; |
e77fd269 | 296 | |
e6a43446 | 297 | |
e77fd269 | 298 | /* Functions for allocating/freeing a sim_state. */ |
4b2a6aed | 299 | SIM_DESC sim_state_alloc PARAMS ((SIM_OPEN_KIND kind, host_callback *callback)); |
e77fd269 DE |
300 | void sim_state_free PARAMS ((SIM_DESC)); |
301 | ||
966df580 DE |
302 | /* Return a pointer to the cpu data for CPU_NAME, or NULL if not found. */ |
303 | sim_cpu *sim_cpu_lookup (SIM_DESC sd, const char *cpu_name); | |
304 | ||
e6a43446 | 305 | |
e77fd269 | 306 | #endif /* SIM_BASE_H */ |