[deliverable/binutils-gdb.git] / sim / common / sim-core.c

/*  This file is part of the program psim.

    Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au>

    This program is free software; you can redistribute it and/or modify
    it under the terms of the GNU General Public License as published by
    the Free Software Foundation; either version 2 of the License, or
    (at your option) any later version.

    This program is distributed in the hope that it will be useful,
    but WITHOUT ANY WARRANTY; without even the implied warranty of
    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    GNU General Public License for more details.
 
    You should have received a copy of the GNU General Public License
    along with this program; if not, write to the Free Software
    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
 
    */


#ifndef _SIM_CORE_C_
#define _SIM_CORE_C_

#include "sim-main.h"
#include "sim-assert.h"


/* "core" module install handler.
   This is called via sim_module_install to install the "core" subsystem
   into the simulator.  */

EXTERN_SIM_CORE\
(SIM_RC)
sim_core_install (SIM_DESC sd)
{
  SIM_ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
  sim_module_add_uninstall_fn (sd, sim_core_uninstall);
  sim_module_add_init_fn (sd, sim_core_init);
  return SIM_RC_OK;
}


/* Uninstall the "core" subsystem from the simulator.  */

EXTERN_SIM_CORE\
(void)
sim_core_uninstall (SIM_DESC sd)
{
  /* FIXME: free buffers, etc. */
}


EXTERN_SIM_CORE\
(SIM_RC)
sim_core_init (SIM_DESC sd)
{
  sim_core *memory = STATE_CORE(sd);
  sim_core_maps map;
  for (map = 0;
       map < nr_sim_core_maps;
       map++) {
    /* blow away old mappings */
    sim_core_mapping *curr = memory->map[map].first;
    while (curr != NULL) {
      sim_core_mapping *tbd = curr;
      curr = curr->next;
      if (tbd->free_buffer) {
	SIM_ASSERT(tbd->buffer != NULL);
	zfree(tbd->buffer);
      }
      zfree(tbd);
    }
    memory->map[map].first = NULL;
  }
  return SIM_RC_OK;
}


#ifndef SIM_CORE_SIGNAL
#define SIM_CORE_SIGNAL(SD,CPU,CIA,MAP,NR_BYTES,ADDR,TRANSFER,ERROR) \
sim_core_signal ((SD), (CPU), (CIA), (MAP), (NR_BYTES), (ADDR), (TRANSFER), (ERROR))

static void
sim_core_signal (SIM_DESC sd,
		 sim_cpu *cpu,
		 sim_cia cia,
		 sim_core_maps map,
		 int nr_bytes,
		 address_word addr,
		 transfer_type transfer,
		 sim_core_signals sig)
{
  const char *copy = (transfer == read_transfer ? "read" : "write");
  switch (sig)
    {
    case sim_core_unmapped_signal:
      sim_engine_abort (sd, cpu, cia, "sim-core: %d byte %s to unmaped address 0x%lx",
			nr_bytes, copy, (unsigned long) addr);
      break;
    case sim_core_unaligned_signal:
      sim_engine_abort (sd, cpu, cia, "sim-core: %d byte misaligned %s to address 0x%lx",
			nr_bytes, copy, (unsigned long) addr);
      break;
    default:
      sim_engine_abort (sd, cpu, cia, "sim_core_signal - internal error - bad switch");
    }
}


#endif

STATIC_INLINE_SIM_CORE\
(const char *)
sim_core_map_to_str (sim_core_maps map)
{
  switch (map)
    {
    case sim_core_read_map: return "read";
    case sim_core_write_map: return "write";
    case sim_core_execute_map: return "exec";
    default: return "(invalid-map)";
    }
}


STATIC_INLINE_SIM_CORE\
(sim_core_mapping *)
new_sim_core_mapping(SIM_DESC sd,
		     attach_type attach,
		     int space,
		     unsigned_word addr,
		     unsigned nr_bytes,
		     device *device,
		     void *buffer,
		     int free_buffer)
{
  sim_core_mapping *new_mapping = ZALLOC(sim_core_mapping);
  /* common */
  new_mapping->level = attach;
  new_mapping->space = space;
  new_mapping->base = addr;
  new_mapping->nr_bytes = nr_bytes;
  new_mapping->bound = addr + (nr_bytes - 1);
  if (attach == attach_raw_memory) {
    new_mapping->buffer = buffer;
    new_mapping->free_buffer = free_buffer;
  }
  else if (attach >= attach_callback) {
    new_mapping->device = device;
  }
  else {
    sim_io_error (sd, "new_sim_core_mapping - internal error - unknown attach type %d\n",
		 attach);
  }
  return new_mapping;
}


STATIC_INLINE_SIM_CORE\
(void)
sim_core_map_attach(SIM_DESC sd,
		    sim_core_map *access_map,
		    attach_type attach,
		    int space,
		    unsigned_word addr,
		    unsigned nr_bytes, /* host limited */
		    device *client, /*callback/default*/
		    void *buffer, /*raw_memory*/
		    int free_buffer) /*raw_memory*/
{
  /* find the insertion point for this additional mapping and then
     insert */
  sim_core_mapping *next_mapping;
  sim_core_mapping **last_mapping;

  SIM_ASSERT((attach >= attach_callback && client != NULL && buffer == NULL && !free_buffer)
	 || (attach == attach_raw_memory && client == NULL && buffer != NULL));

  /* actually do occasionally get a zero size map */
  if (nr_bytes == 0) {
#if (WITH_DEVICES)
    device_error(client, "called on sim_core_map_attach with size zero");
#else
    sim_io_error (sd, "called on sim_core_map_attach with size zero");
#endif
  }

  /* find the insertion point (between last/next) */
  next_mapping = access_map->first;
  last_mapping = &access_map->first;
  while(next_mapping != NULL
	&& (next_mapping->level < attach
	    || (next_mapping->level == attach
		&& next_mapping->bound < addr))) {
    /* provided levels are the same */
    /* assert: next_mapping->base > all bases before next_mapping */
    /* assert: next_mapping->bound >= all bounds before next_mapping */
    last_mapping = &next_mapping->next;
    next_mapping = next_mapping->next;
  }

  /* check insertion point correct */
  SIM_ASSERT(next_mapping == NULL || next_mapping->level >= attach);
  if (next_mapping != NULL && next_mapping->level == attach
      && next_mapping->base < (addr + (nr_bytes - 1))) {
#if (WITH_DEVICES)
    device_error(client, "map overlap when attaching %d:0x%lx (%ld)",
		 space, (long)addr, (long)nr_bytes);
#else
    sim_io_error (sd, "map overlap when attaching %d:0x%lx (%ld)",
		 space, (long)addr, (long)nr_bytes);
#endif
  }

  /* create/insert the new mapping */
  *last_mapping = new_sim_core_mapping(sd,
				   attach,
				   space, addr, nr_bytes,
				   client, buffer, free_buffer);
  (*last_mapping)->next = next_mapping;
}


INLINE_SIM_CORE\
(void)
sim_core_attach(SIM_DESC sd,
		sim_cpu *cpu,
		attach_type attach,
		access_type access,
		int space,
		unsigned_word addr,
		unsigned nr_bytes, /* host limited */
		device *client,
		void *optional_buffer)
{
  sim_core *memory = STATE_CORE(sd);
  sim_core_maps map;
  void *buffer;
  int buffer_freed;
  int i;

  /* check for for attempt to use unimplemented per-processor core map */
  if (cpu != NULL)
    sim_io_error (sd, "sim_core_map_attach - processor specific memory map not yet supported");

  if ((access & access_read_write_exec) == 0
      || (access & ~access_read_write_exec) != 0) {
#if (WITH_DEVICES)
    device_error(client, "invalid access for core attach");
#else
    sim_io_error (sd, "invalid access for core attach");
#endif
  }
  /* verify the attach type */
  if (attach == attach_raw_memory) {
    if (optional_buffer == NULL) {
      buffer = zalloc(nr_bytes);
      buffer_freed = 0;
    }
    else {
      buffer = optional_buffer;
      buffer_freed = 1;
    }
  }
  else if (attach >= attach_callback) {
    buffer = NULL;
    buffer_freed = 1;
  }
  else {
#if (WITH_DEVICES)
    device_error(client, "sim_core_attach - conflicting buffer and attach arguments");
#else
    sim_io_error (sd, "sim_core_attach - conflicting buffer and attach arguments");
#endif
    buffer = NULL;
    buffer_freed = 1;
  }
  /* attach the region to all applicable access maps */
  for (map = 0; 
       map < nr_sim_core_maps;
       map++) {
    switch (map) {
    case sim_core_read_map:
      if (access & access_read)
	sim_core_map_attach(sd, &memory->map[map],
			attach,
			space, addr, nr_bytes,
			client, buffer, !buffer_freed);
      buffer_freed ++;
      break;
    case sim_core_write_map:
      if (access & access_write)
	sim_core_map_attach(sd, &memory->map[map],
			attach,
			space, addr, nr_bytes,
			client, buffer, !buffer_freed);
      buffer_freed ++;
      break;
    case sim_core_execute_map:
      if (access & access_exec)
	sim_core_map_attach(sd, &memory->map[map],
			attach,
			space, addr, nr_bytes,
			client, buffer, !buffer_freed);
      buffer_freed ++;
      break;
    case nr_sim_core_maps:
      sim_io_error (sd, "sim_core_attach - internal error - bad switch");
      break;
    }
  }

  /* Just copy this map to each of the processor specific data structures.
     FIXME - later this will be replaced by true processor specific
     maps. */
  for (i = 0; i < MAX_NR_PROCESSORS; i++)
    *CPU_CORE (STATE_CPU (sd, i)) = *STATE_CORE (sd);
}


STATIC_INLINE_SIM_CORE\
(sim_core_mapping *)
sim_core_find_mapping(sim_core *core,
		      sim_core_maps map,
		      unsigned_word addr,
		      unsigned nr_bytes,
		      transfer_type transfer,
		      int abort, /*either 0 or 1 - hint to inline/-O */
		      sim_cpu *cpu, /* abort => cpu != NULL */
		      sim_cia cia)
{
  sim_core_mapping *mapping = core->map[map].first;
  ASSERT ((addr & (nr_bytes - 1)) == 0); /* must be aligned */
  ASSERT ((addr + (nr_bytes - 1)) >= addr); /* must not wrap */
  ASSERT (!abort || cpu != NULL); /* abort needs a non null CPU */
  while (mapping != NULL)
    {
      if (addr >= mapping->base
	  && (addr + (nr_bytes - 1)) <= mapping->bound)
	return mapping;
      mapping = mapping->next;
    }
  if (abort)
    {
      SIM_CORE_SIGNAL (CPU_STATE (cpu), cpu, cia, map, nr_bytes, addr, transfer,
		       sim_core_unmapped_signal);
    }
  return NULL;
}


STATIC_INLINE_SIM_CORE\
(void *)
sim_core_translate(sim_core_mapping *mapping,
	       unsigned_word addr)
{
  return (void *)(((char *)mapping->buffer) + addr - mapping->base);
}


INLINE_SIM_CORE\
(unsigned)
sim_core_read_buffer(SIM_DESC sd,
		     sim_core_maps map,
		     void *buffer,
		     unsigned_word addr,
		     unsigned len)
{
  unsigned count = 0;
  while (count < len) {
    unsigned_word raddr = addr + count;
    sim_core_mapping *mapping =
      sim_core_find_mapping(STATE_CORE (sd), map,
			    raddr, /*nr-bytes*/1,
			    read_transfer,
			    0, NULL, NULL_CIA); /*dont-abort*/
    if (mapping == NULL)
      break;
#if (WITH_DEVICES)
    if (mapping->device != NULL) {
      int nr_bytes = len - count;
      if (raddr + nr_bytes - 1> mapping->bound)
	nr_bytes = mapping->bound - raddr + 1;
      if (device_io_read_buffer(mapping->device,
				(unsigned_1*)buffer + count,
				mapping->space,
				raddr,
				nr_bytes) != nr_bytes)
	break;
      count += nr_bytes;
    }
    else
#endif
      {
	((unsigned_1*)buffer)[count] =
	  *(unsigned_1*)sim_core_translate(mapping, raddr);
	count += 1;
      }
  }
  return count;
}


INLINE_SIM_CORE\
(unsigned)
sim_core_write_buffer(SIM_DESC sd,
		      sim_core_maps map,
		      const void *buffer,
		      unsigned_word addr,
		      unsigned len)
{
  unsigned count = 0;
  while (count < len) {
    unsigned_word raddr = addr + count;
    sim_core_mapping *mapping = sim_core_find_mapping(STATE_CORE (sd), map,
						      raddr, /*nr-bytes*/1,
						      write_transfer,
						      0, NULL, NULL_CIA); /*dont-abort*/
    if (mapping == NULL)
      break;
#if (WITH_DEVICES)
    if (WITH_CALLBACK_MEMORY
	&& mapping->device != NULL) {
      int nr_bytes = len - count;
      if (raddr + nr_bytes - 1 > mapping->bound)
	nr_bytes = mapping->bound - raddr + 1;
      if (device_io_write_buffer(mapping->device,
				 (unsigned_1*)buffer + count,
				 mapping->space,
				 raddr,
				 nr_bytes) != nr_bytes)
	break;
      count += nr_bytes;
    }
    else
#endif
      {
	*(unsigned_1*)sim_core_translate(mapping, raddr) =
	  ((unsigned_1*)buffer)[count];
	count += 1;
      }
  }
  return count;
}


/* define the read/write 1/2/4/8/word functions */

#define N 1
#include "sim-n-core.h"
#undef N

#define N 2
#include "sim-n-core.h"
#undef N

#define N 4
#include "sim-n-core.h"
#undef N

#define N 8
#include "sim-n-core.h"
#undef N

#define N word
#include "sim-n-core.h"
#undef N

#endif
Commit	Line	Data
f2de7dfd AC	1	/* This file is part of the program psim.
	2
	3	Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au>
	4
	5	This program is free software; you can redistribute it and/or modify
	6	it under the terms of the GNU General Public License as published by
	7	the Free Software Foundation; either version 2 of the License, or
	8	(at your option) any later version.
	9
	10	This program is distributed in the hope that it will be useful,
	11	but WITHOUT ANY WARRANTY; without even the implied warranty of
	12	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	13	GNU General Public License for more details.
	14
	15	You should have received a copy of the GNU General Public License
	16	along with this program; if not, write to the Free Software
	17	Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
	18
	19	*/
	20
	21
	22	#ifndef _SIM_CORE_C_
	23	#define _SIM_CORE_C_
	24
c967f187 DE	25	#include "sim-main.h"
c967f187 DE	26	#include "sim-assert.h"
f2de7dfd AC	27
f2de7dfd AC	28
c967f187 DE	29	/* "core" module install handler.
	30	This is called via sim_module_install to install the "core" subsystem
	31	into the simulator. */
	32
	33	EXTERN_SIM_CORE\
	34	(SIM_RC)
	35	sim_core_install (SIM_DESC sd)
	36	{
50a2a691	37	SIM_ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
c967f187 DE	38	sim_module_add_uninstall_fn (sd, sim_core_uninstall);
	39	sim_module_add_init_fn (sd, sim_core_init);
	40	return SIM_RC_OK;
	41	}
	42
	43
	44	/* Uninstall the "core" subsystem from the simulator. */
	45
	46	EXTERN_SIM_CORE\
f2de7dfd	47	(void)
c967f187 DE	48	sim_core_uninstall (SIM_DESC sd)
	49	{
	50	/* FIXME: free buffers, etc. */
	51	}
	52
	53
	54	EXTERN_SIM_CORE\
	55	(SIM_RC)
	56	sim_core_init (SIM_DESC sd)
f2de7dfd	57	{
1fe05280	58	sim_core *memory = STATE_CORE(sd);
c967f187	59	sim_core_maps map;
f2de7dfd	60	for (map = 0;
c967f187	61	map < nr_sim_core_maps;
f2de7dfd AC	62	map++) {
f2de7dfd AC	63	/* blow away old mappings */
c967f187	64	sim_core_mapping *curr = memory->map[map].first;
f2de7dfd	65	while (curr != NULL) {
c967f187	66	sim_core_mapping *tbd = curr;
f2de7dfd AC	67	curr = curr->next;
f2de7dfd AC	68	if (tbd->free_buffer) {
c967f187	69	SIM_ASSERT(tbd->buffer != NULL);
f2de7dfd AC	70	zfree(tbd->buffer);
	71	}
	72	zfree(tbd);
	73	}
	74	memory->map[map].first = NULL;
	75	}
c967f187	76	return SIM_RC_OK;
f2de7dfd AC	77	}
	78
	79
	80
50a2a691 AC	81	#ifndef SIM_CORE_SIGNAL
	82	#define SIM_CORE_SIGNAL(SD,CPU,CIA,MAP,NR_BYTES,ADDR,TRANSFER,ERROR) \
	83	sim_core_signal ((SD), (CPU), (CIA), (MAP), (NR_BYTES), (ADDR), (TRANSFER), (ERROR))
	84
	85	static void
	86	sim_core_signal (SIM_DESC sd,
	87	sim_cpu *cpu,
	88	sim_cia cia,
	89	sim_core_maps map,
	90	int nr_bytes,
	91	address_word addr,
	92	transfer_type transfer,
	93	sim_core_signals sig)
	94	{
	95	const char *copy = (transfer == read_transfer ? "read" : "write");
	96	switch (sig)
	97	{
	98	case sim_core_unmapped_signal:
	99	sim_engine_abort (sd, cpu, cia, "sim-core: %d byte %s to unmaped address 0x%lx",
	100	nr_bytes, copy, (unsigned long) addr);
	101	break;
	102	case sim_core_unaligned_signal:
	103	sim_engine_abort (sd, cpu, cia, "sim-core: %d byte misaligned %s to address 0x%lx",
	104	nr_bytes, copy, (unsigned long) addr);
	105	break;
	106	default:
	107	sim_engine_abort (sd, cpu, cia, "sim_core_signal - internal error - bad switch");
	108	}
	109	}
	110
	111
	112
	113	#endif
	114
1fe05280 AC	115	STATIC_INLINE_SIM_CORE\
	116	(const char *)
	117	sim_core_map_to_str (sim_core_maps map)
	118	{
	119	switch (map)
	120	{
	121	case sim_core_read_map: return "read";
	122	case sim_core_write_map: return "write";
	123	case sim_core_execute_map: return "exec";
	124	default: return "(invalid-map)";
	125	}
	126	}
	127
	128
f2de7dfd	129	STATIC_INLINE_SIM_CORE\
c967f187 DE	130	(sim_core_mapping *)
c967f187 DE	131	new_sim_core_mapping(SIM_DESC sd,
50a2a691 AC	132	attach_type attach,
	133	int space,
	134	unsigned_word addr,
	135	unsigned nr_bytes,
	136	device *device,
	137	void *buffer,
	138	int free_buffer)
f2de7dfd	139	{
c967f187	140	sim_core_mapping *new_mapping = ZALLOC(sim_core_mapping);
f2de7dfd AC	141	/* common */
	142	new_mapping->level = attach;
	143	new_mapping->space = space;
	144	new_mapping->base = addr;
	145	new_mapping->nr_bytes = nr_bytes;
	146	new_mapping->bound = addr + (nr_bytes - 1);
	147	if (attach == attach_raw_memory) {
	148	new_mapping->buffer = buffer;
	149	new_mapping->free_buffer = free_buffer;
	150	}
	151	else if (attach >= attach_callback) {
	152	new_mapping->device = device;
	153	}
	154	else {
c967f187	155	sim_io_error (sd, "new_sim_core_mapping - internal error - unknown attach type %d\n",
f2de7dfd AC	156	attach);
	157	}
	158	return new_mapping;
	159	}
	160
	161
	162	STATIC_INLINE_SIM_CORE\
	163	(void)
c967f187	164	sim_core_map_attach(SIM_DESC sd,
7a418800 AC	165	sim_core_map *access_map,
	166	attach_type attach,
	167	int space,
	168	unsigned_word addr,
	169	unsigned nr_bytes, /* host limited */
	170	device client, /callback/default*/
	171	void buffer, /raw_memory*/
	172	int free_buffer) /raw_memory/
f2de7dfd AC	173	{
	174	/* find the insertion point for this additional mapping and then
	175	insert */
c967f187 DE	176	sim_core_mapping *next_mapping;
c967f187 DE	177	sim_core_mapping **last_mapping;
f2de7dfd	178
c967f187	179	SIM_ASSERT((attach >= attach_callback && client != NULL && buffer == NULL && !free_buffer)
f2de7dfd AC	180	\|\| (attach == attach_raw_memory && client == NULL && buffer != NULL));
	181
	182	/* actually do occasionally get a zero size map */
	183	if (nr_bytes == 0) {
	184	#if (WITH_DEVICES)
c967f187	185	device_error(client, "called on sim_core_map_attach with size zero");
f2de7dfd	186	#else
c967f187	187	sim_io_error (sd, "called on sim_core_map_attach with size zero");
f2de7dfd AC	188	#endif
	189	}
	190
	191	/* find the insertion point (between last/next) */
	192	next_mapping = access_map->first;
	193	last_mapping = &access_map->first;
	194	while(next_mapping != NULL
	195	&& (next_mapping->level < attach
	196	\|\| (next_mapping->level == attach
	197	&& next_mapping->bound < addr))) {
	198	/* provided levels are the same */
	199	/* assert: next_mapping->base > all bases before next_mapping */
	200	/* assert: next_mapping->bound >= all bounds before next_mapping */
	201	last_mapping = &next_mapping->next;
	202	next_mapping = next_mapping->next;
	203	}
	204
	205	/* check insertion point correct */
c967f187	206	SIM_ASSERT(next_mapping == NULL \|\| next_mapping->level >= attach);
f2de7dfd AC	207	if (next_mapping != NULL && next_mapping->level == attach
	208	&& next_mapping->base < (addr + (nr_bytes - 1))) {
	209	#if (WITH_DEVICES)
	210	device_error(client, "map overlap when attaching %d:0x%lx (%ld)",
	211	space, (long)addr, (long)nr_bytes);
	212	#else
c967f187	213	sim_io_error (sd, "map overlap when attaching %d:0x%lx (%ld)",
f2de7dfd AC	214	space, (long)addr, (long)nr_bytes);
	215	#endif
	216	}
	217
	218	/* create/insert the new mapping */
c967f187	219	*last_mapping = new_sim_core_mapping(sd,
f2de7dfd AC	220	attach,
	221	space, addr, nr_bytes,
	222	client, buffer, free_buffer);
	223	(*last_mapping)->next = next_mapping;
	224	}
	225
	226
	227	INLINE_SIM_CORE\
	228	(void)
c967f187	229	sim_core_attach(SIM_DESC sd,
7a418800 AC	230	sim_cpu *cpu,
	231	attach_type attach,
	232	access_type access,
	233	int space,
	234	unsigned_word addr,
	235	unsigned nr_bytes, /* host limited */
	236	device *client,
	237	void *optional_buffer)
f2de7dfd	238	{
1fe05280	239	sim_core *memory = STATE_CORE(sd);
c967f187	240	sim_core_maps map;
f2de7dfd AC	241	void *buffer;
f2de7dfd AC	242	int buffer_freed;
7a418800 AC	243	int i;
	244
	245	/* check for for attempt to use unimplemented per-processor core map */
	246	if (cpu != NULL)
	247	sim_io_error (sd, "sim_core_map_attach - processor specific memory map not yet supported");
	248
f2de7dfd AC	249	if ((access & access_read_write_exec) == 0
	250	\|\| (access & ~access_read_write_exec) != 0) {
	251	#if (WITH_DEVICES)
	252	device_error(client, "invalid access for core attach");
	253	#else
c967f187	254	sim_io_error (sd, "invalid access for core attach");
f2de7dfd AC	255	#endif
	256	}
	257	/* verify the attach type */
	258	if (attach == attach_raw_memory) {
	259	if (optional_buffer == NULL) {
	260	buffer = zalloc(nr_bytes);
	261	buffer_freed = 0;
	262	}
	263	else {
	264	buffer = optional_buffer;
	265	buffer_freed = 1;
	266	}
	267	}
	268	else if (attach >= attach_callback) {
	269	buffer = NULL;
	270	buffer_freed = 1;
	271	}
	272	else {
	273	#if (WITH_DEVICES)
c967f187	274	device_error(client, "sim_core_attach - conflicting buffer and attach arguments");
f2de7dfd	275	#else
c967f187	276	sim_io_error (sd, "sim_core_attach - conflicting buffer and attach arguments");
f2de7dfd AC	277	#endif
	278	buffer = NULL;
	279	buffer_freed = 1;
	280	}
	281	/* attach the region to all applicable access maps */
	282	for (map = 0;
c967f187	283	map < nr_sim_core_maps;
f2de7dfd AC	284	map++) {
f2de7dfd AC	285	switch (map) {
c967f187	286	case sim_core_read_map:
f2de7dfd	287	if (access & access_read)
c967f187	288	sim_core_map_attach(sd, &memory->map[map],
f2de7dfd AC	289	attach,
	290	space, addr, nr_bytes,
	291	client, buffer, !buffer_freed);
	292	buffer_freed ++;
	293	break;
c967f187	294	case sim_core_write_map:
f2de7dfd	295	if (access & access_write)
c967f187	296	sim_core_map_attach(sd, &memory->map[map],
f2de7dfd AC	297	attach,
	298	space, addr, nr_bytes,
	299	client, buffer, !buffer_freed);
	300	buffer_freed ++;
	301	break;
c967f187	302	case sim_core_execute_map:
f2de7dfd	303	if (access & access_exec)
c967f187	304	sim_core_map_attach(sd, &memory->map[map],
f2de7dfd AC	305	attach,
	306	space, addr, nr_bytes,
	307	client, buffer, !buffer_freed);
	308	buffer_freed ++;
	309	break;
c967f187 DE	310	case nr_sim_core_maps:
c967f187 DE	311	sim_io_error (sd, "sim_core_attach - internal error - bad switch");
f2de7dfd AC	312	break;
	313	}
	314	}
7a418800 AC	315
	316	/* Just copy this map to each of the processor specific data structures.
	317	FIXME - later this will be replaced by true processor specific
	318	maps. */
	319	for (i = 0; i < MAX_NR_PROCESSORS; i++)
	320	CPU_CORE (STATE_CPU (sd, i)) = STATE_CORE (sd);
f2de7dfd AC	321	}
	322
	323
	324	STATIC_INLINE_SIM_CORE\
c967f187	325	(sim_core_mapping *)
7a418800	326	sim_core_find_mapping(sim_core *core,
c967f187	327	sim_core_maps map,
f2de7dfd AC	328	unsigned_word addr,
f2de7dfd AC	329	unsigned nr_bytes,
50a2a691	330	transfer_type transfer,
7a418800 AC	331	int abort, /either 0 or 1 - hint to inline/-O /
7a418800 AC	332	sim_cpu cpu, / abort => cpu != NULL */
1fe05280	333	sim_cia cia)
f2de7dfd	334	{
7a418800 AC	335	sim_core_mapping *mapping = core->map[map].first;
	336	ASSERT ((addr & (nr_bytes - 1)) == 0); /* must be aligned */
	337	ASSERT ((addr + (nr_bytes - 1)) >= addr); /* must not wrap */
	338	ASSERT (!abort \|\| cpu != NULL); /* abort needs a non null CPU */
	339	while (mapping != NULL)
	340	{
	341	if (addr >= mapping->base
	342	&& (addr + (nr_bytes - 1)) <= mapping->bound)
	343	return mapping;
	344	mapping = mapping->next;
	345	}
f2de7dfd	346	if (abort)
7a418800	347	{
50a2a691 AC	348	SIM_CORE_SIGNAL (CPU_STATE (cpu), cpu, cia, map, nr_bytes, addr, transfer,
50a2a691 AC	349	sim_core_unmapped_signal);
7a418800	350	}
f2de7dfd AC	351	return NULL;
	352	}
	353
	354
	355	STATIC_INLINE_SIM_CORE\
	356	(void *)
c967f187	357	sim_core_translate(sim_core_mapping *mapping,
f2de7dfd AC	358	unsigned_word addr)
	359	{
	360	return (void )(((char )mapping->buffer) + addr - mapping->base);
	361	}
	362
	363
	364	INLINE_SIM_CORE\
	365	(unsigned)
c967f187 DE	366	sim_core_read_buffer(SIM_DESC sd,
c967f187 DE	367	sim_core_maps map,
f2de7dfd AC	368	void *buffer,
	369	unsigned_word addr,
	370	unsigned len)
	371	{
	372	unsigned count = 0;
	373	while (count < len) {
	374	unsigned_word raddr = addr + count;
c967f187	375	sim_core_mapping *mapping =
7a418800	376	sim_core_find_mapping(STATE_CORE (sd), map,
50a2a691 AC	377	raddr, /nr-bytes/1,
50a2a691 AC	378	read_transfer,
1fe05280	379	0, NULL, NULL_CIA); /dont-abort/
f2de7dfd AC	380	if (mapping == NULL)
	381	break;
	382	#if (WITH_DEVICES)
	383	if (mapping->device != NULL) {
	384	int nr_bytes = len - count;
	385	if (raddr + nr_bytes - 1> mapping->bound)
	386	nr_bytes = mapping->bound - raddr + 1;
	387	if (device_io_read_buffer(mapping->device,
	388	(unsigned_1*)buffer + count,
	389	mapping->space,
	390	raddr,
	391	nr_bytes) != nr_bytes)
	392	break;
	393	count += nr_bytes;
	394	}
	395	else
	396	#endif
	397	{
	398	((unsigned_1*)buffer)[count] =
c967f187	399	(unsigned_1)sim_core_translate(mapping, raddr);
f2de7dfd AC	400	count += 1;
	401	}
	402	}
	403	return count;
	404	}
	405
	406
	407	INLINE_SIM_CORE\
	408	(unsigned)
c967f187 DE	409	sim_core_write_buffer(SIM_DESC sd,
c967f187 DE	410	sim_core_maps map,
f2de7dfd AC	411	const void *buffer,
	412	unsigned_word addr,
	413	unsigned len)
	414	{
	415	unsigned count = 0;
	416	while (count < len) {
	417	unsigned_word raddr = addr + count;
7a418800	418	sim_core_mapping *mapping = sim_core_find_mapping(STATE_CORE (sd), map,
50a2a691 AC	419	raddr, /nr-bytes/1,
50a2a691 AC	420	write_transfer,
1fe05280	421	0, NULL, NULL_CIA); /dont-abort/
f2de7dfd AC	422	if (mapping == NULL)
	423	break;
	424	#if (WITH_DEVICES)
	425	if (WITH_CALLBACK_MEMORY
	426	&& mapping->device != NULL) {
	427	int nr_bytes = len - count;
	428	if (raddr + nr_bytes - 1 > mapping->bound)
	429	nr_bytes = mapping->bound - raddr + 1;
	430	if (device_io_write_buffer(mapping->device,
	431	(unsigned_1*)buffer + count,
	432	mapping->space,
	433	raddr,
	434	nr_bytes) != nr_bytes)
	435	break;
	436	count += nr_bytes;
	437	}
	438	else
	439	#endif
	440	{
c967f187	441	(unsigned_1)sim_core_translate(mapping, raddr) =
f2de7dfd AC	442	((unsigned_1*)buffer)[count];
	443	count += 1;
	444	}
	445	}
	446	return count;
	447	}
	448
	449
	450	/* define the read/write 1/2/4/8/word functions */
	451
	452	#define N 1
	453	#include "sim-n-core.h"
	454	#undef N
	455
	456	#define N 2
	457	#include "sim-n-core.h"
	458	#undef N
	459
	460	#define N 4
	461	#include "sim-n-core.h"
	462	#undef N
	463
	464	#define N 8
	465	#include "sim-n-core.h"
	466	#undef N
	467
	468	#define N word
	469	#include "sim-n-core.h"
	470	#undef N
	471
	472	#endif