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231de1b8 AC |
1 | /* This file is part of the program psim. |
2 | ||
3 | Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au> | |
4 | ||
5 | This program is free software; you can redistribute it and/or modify | |
6 | it under the terms of the GNU General Public License as published by | |
7 | the Free Software Foundation; either version 2 of the License, or | |
8 | (at your option) any later version. | |
9 | ||
10 | This program is distributed in the hope that it will be useful, | |
11 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
13 | GNU General Public License for more details. | |
14 | ||
15 | You should have received a copy of the GNU General Public License | |
16 | along with this program; if not, write to the Free Software | |
17 | Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. | |
18 | ||
19 | */ | |
20 | ||
21 | ||
22 | #ifndef _SIM_EVENTS_H_ | |
23 | #define _SIM_EVENTS_H_ | |
24 | ||
25 | ||
c445af5a | 26 | /* Notes: |
231de1b8 | 27 | |
c445af5a AC |
28 | When scheduling an event, the a delta of zero/one refers to the |
29 | timeline as follows: | |
30 | ||
31 | epoch 0|1 1|2 2|3 3| | |
32 | **queue**|--insn--|*queue*|--insn--|*queue*|--insn--|*queue*| | |
33 | | ^ ^ | ^ ^ | |
34 | `- +0 ------------ +1 --.. `----- +0 ------------- +1 --.. | |
35 | ||
36 | When the queue is initialized, the time is set to zero with a | |
37 | number of initialization events scheduled. Consequently, as also | |
38 | illustrated above, the event queue should be processed before the | |
39 | first instruction. That instruction being executed during tick 1. | |
40 | ||
f03b093c | 41 | The simulator main loop may take a form similar to: |
c445af5a | 42 | |
f03b093c AC |
43 | if (halt-/restart-setjmp) |
44 | { | |
c445af5a | 45 | |
f03b093c AC |
46 | .... // Determine who should go next |
47 | last-cpu-nr = get-last-cpu-nr (sd); | |
48 | next-cpu-nr = get-next-cpu-nr (sd); | |
49 | events-were-last? = (last-cpu-nr >= nr-cpus); | |
50 | events-were-next? = (next-cpu-nr >= nr-cpus); | |
c445af5a | 51 | |
f03b093c AC |
52 | .... // process any outstanding events |
53 | sim_events_preprocess (sd, events-were-last?, events-were-next?); | |
54 | if (events-were-next) | |
55 | next-cpu-nr = 0; | |
56 | ||
57 | .... // prime main loop | |
58 | ||
59 | while (1) | |
60 | { | |
61 | .... // model one insn of next-cpu-nr .. nr-cpus | |
62 | if (sim_events_tick (sd)) | |
63 | sim_events_process (sd); | |
64 | next-cpu-nr = 0 | |
65 | } | |
66 | } | |
67 | ||
68 | NB. In the above pseudo code it is assumed that any cpu-nr >= | |
69 | nr-cpus is a marker for the event queue. */ | |
70 | ||
71 | ||
72 | typedef void sim_event_handler(SIM_DESC sd, void *data); | |
c445af5a AC |
73 | |
74 | typedef struct _sim_event sim_event; | |
231de1b8 | 75 | |
c445af5a AC |
76 | typedef struct _sim_events sim_events; |
77 | struct _sim_events { | |
50a2a691 | 78 | int nr_ticks_to_process; |
c445af5a | 79 | sim_event *queue; |
f03b093c AC |
80 | sim_event *watchpoints; |
81 | sim_event *watchedpoints; | |
50a2a691 | 82 | sim_event *free_list; |
f03b093c AC |
83 | /* flag additional work needed */ |
84 | volatile int work_pending; | |
85 | /* the asynchronous event queue */ | |
50a2a691 AC |
86 | #ifndef MAX_NR_SIGNAL_SIM_EVENTS |
87 | #define MAX_NR_SIGNAL_SIM_EVENTS 2 | |
88 | #endif | |
89 | sim_event *held; | |
90 | volatile int nr_held; | |
f03b093c | 91 | /* timekeeping */ |
fdd64f95 AC |
92 | unsigned long elapsed_wallclock; |
93 | SIM_ELAPSED_TIME resume_wallclock; | |
231de1b8 | 94 | signed64 time_of_event; |
c445af5a | 95 | int time_from_event; |
231de1b8 AC |
96 | int trace; |
97 | }; | |
98 | ||
231de1b8 AC |
99 | |
100 | ||
f03b093c AC |
101 | /* Install the "events" module. */ |
102 | ||
103 | EXTERN_SIM_EVENTS\ | |
104 | (SIM_RC) sim_events_install (SIM_DESC sd); | |
105 | ||
106 | ||
c445af5a | 107 | /* Set Tracing Level */ |
231de1b8 | 108 | |
f03b093c | 109 | EXTERN_SIM_EVENTS\ |
c445af5a AC |
110 | (void) sim_events_set_trace |
111 | (SIM_DESC sd, | |
231de1b8 AC |
112 | int level); |
113 | ||
114 | ||
c445af5a | 115 | /* Schedule an event DELTA_TIME ticks into the future */ |
231de1b8 | 116 | |
f03b093c | 117 | EXTERN_SIM_EVENTS\ |
c445af5a AC |
118 | (sim_event *) sim_events_schedule |
119 | (SIM_DESC sd, | |
231de1b8 | 120 | signed64 delta_time, |
c445af5a | 121 | sim_event_handler *handler, |
231de1b8 AC |
122 | void *data); |
123 | ||
f03b093c | 124 | EXTERN_SIM_EVENTS\ |
50a2a691 | 125 | (void) sim_events_schedule_after_signal |
c445af5a | 126 | (SIM_DESC sd, |
231de1b8 | 127 | signed64 delta_time, |
c445af5a | 128 | sim_event_handler *handler, |
231de1b8 AC |
129 | void *data); |
130 | ||
c445af5a | 131 | |
50a2a691 AC |
132 | /* Schedule an event milli-seconds from NOW. The exact interpretation |
133 | of wallclock is host dependant. */ | |
c445af5a | 134 | |
f03b093c AC |
135 | EXTERN_SIM_EVENTS\ |
136 | (sim_event *) sim_events_watch_clock | |
c445af5a | 137 | (SIM_DESC sd, |
50a2a691 | 138 | unsigned delta_ms_time, |
c445af5a AC |
139 | sim_event_handler *handler, |
140 | void *data); | |
141 | ||
142 | ||
f90b720b AC |
143 | /* Schedule an event when the test (IS_WITHIN == (VAL >= LB && VAL <= |
144 | UB)) of the NR_BYTES value at HOST_ADDR with BYTE_ORDER endian is | |
145 | true. | |
c445af5a | 146 | |
f03b093c AC |
147 | HOST_ADDR: pointer into the host address space. |
148 | BYTE_ORDER: 0 - host endian; BIG_ENDIAN; LITTLE_ENDIAN */ | |
149 | ||
150 | EXTERN_SIM_EVENTS\ | |
151 | (sim_event*) sim_events_watch_sim | |
c445af5a | 152 | (SIM_DESC sd, |
f03b093c AC |
153 | void *host_addr, |
154 | int nr_bytes, | |
155 | int byte_order, | |
f90b720b | 156 | int is_within, |
c445af5a AC |
157 | unsigned64 lb, |
158 | unsigned64 ub, | |
159 | sim_event_handler *handler, | |
160 | void *data); | |
c445af5a AC |
161 | |
162 | ||
f90b720b AC |
163 | /* Schedule an event when the test (IS_WITHIN == (VAL >= LB && VAL <= |
164 | UB)) of the NR_BYTES value at CORE_ADDR in BYTE_ORDER endian is | |
165 | true. | |
c445af5a | 166 | |
f03b093c AC |
167 | CORE_ADDR/MAP: pointer into the target address space. |
168 | BYTE_ORDER: 0 - current target endian; BIG_ENDIAN; LITTLE_ENDIAN */ | |
169 | ||
170 | EXTERN_SIM_EVENTS\ | |
171 | (sim_event*) sim_events_watch_core | |
c445af5a | 172 | (SIM_DESC sd, |
f03b093c AC |
173 | address_word core_addr, |
174 | sim_core_maps core_map, | |
175 | int nr_bytes, | |
176 | int byte_order, | |
f90b720b | 177 | int is_within, |
c445af5a AC |
178 | unsigned64 lb, |
179 | unsigned64 ub, | |
180 | sim_event_handler *handler, | |
181 | void *data); | |
c445af5a | 182 | |
c445af5a AC |
183 | /* Deschedule the specified event */ |
184 | ||
f03b093c | 185 | EXTERN_SIM_EVENTS\ |
c445af5a AC |
186 | (void) sim_events_deschedule |
187 | (SIM_DESC sd, | |
188 | sim_event *event_to_remove); | |
189 | ||
231de1b8 | 190 | |
f03b093c AC |
191 | /* Prepare for main simulator loop. Ensure that the next thing to do |
192 | is not event processing. | |
193 | ||
194 | If the simulator halted part way through event processing then both | |
195 | EVENTS_WERE_LAST and EVENTS_WERE_FIRST shall be true. | |
196 | ||
197 | If the simulator halted after processing the last cpu, then only | |
198 | EVENTS_WERE_NEXT shall be true. */ | |
199 | ||
200 | INLINE_SIM_EVENTS\ | |
201 | (void) sim_events_preprocess | |
202 | (SIM_DESC sd, | |
203 | int events_were_last, | |
204 | int events_were_next); | |
231de1b8 | 205 | |
f03b093c AC |
206 | |
207 | /* Progress time - separated into two parts so that the main loop can | |
50a2a691 AC |
208 | save its context before the event queue is processed. |
209 | ||
f90b720b | 210 | sim_events_tickn advances the clock by N cycles (1..MAXINT) */ |
231de1b8 AC |
211 | |
212 | INLINE_SIM_EVENTS\ | |
c445af5a AC |
213 | (int) sim_events_tick |
214 | (SIM_DESC sd); | |
231de1b8 | 215 | |
50a2a691 AC |
216 | INLINE_SIM_EVENTS\ |
217 | (int) sim_events_tickn | |
218 | (SIM_DESC sd, | |
f90b720b | 219 | int n); |
50a2a691 | 220 | |
231de1b8 | 221 | INLINE_SIM_EVENTS\ |
c445af5a AC |
222 | (void) sim_events_process |
223 | (SIM_DESC sd); | |
231de1b8 AC |
224 | |
225 | ||
50a2a691 AC |
226 | /* Progress time such that an event shall occure upon the next call to |
227 | sim_events tick */ | |
228 | ||
229 | #if 0 | |
230 | INLINE_SIM_EVENTS\ | |
231 | (void) sim_events_timewarp | |
232 | (SIM_DESC sd); | |
233 | #endif | |
234 | ||
f03b093c | 235 | |
231de1b8 AC |
236 | /* local concept of time */ |
237 | ||
238 | INLINE_SIM_EVENTS\ | |
c445af5a AC |
239 | (signed64) sim_events_time |
240 | (SIM_DESC sd); | |
231de1b8 AC |
241 | |
242 | ||
243 | #endif |