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231de1b8 AC |
1 | /* This file is part of the program psim. |
2 | ||
3 | Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au> | |
4 | ||
5 | This program is free software; you can redistribute it and/or modify | |
6 | it under the terms of the GNU General Public License as published by | |
7 | the Free Software Foundation; either version 2 of the License, or | |
8 | (at your option) any later version. | |
9 | ||
10 | This program is distributed in the hope that it will be useful, | |
11 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
13 | GNU General Public License for more details. | |
14 | ||
15 | You should have received a copy of the GNU General Public License | |
16 | along with this program; if not, write to the Free Software | |
17 | Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. | |
18 | ||
19 | */ | |
20 | ||
21 | ||
22 | #ifndef _SIM_EVENTS_H_ | |
23 | #define _SIM_EVENTS_H_ | |
24 | ||
25 | ||
c445af5a | 26 | /* Notes: |
231de1b8 | 27 | |
c445af5a AC |
28 | When scheduling an event, the a delta of zero/one refers to the |
29 | timeline as follows: | |
30 | ||
31 | epoch 0|1 1|2 2|3 3| | |
32 | **queue**|--insn--|*queue*|--insn--|*queue*|--insn--|*queue*| | |
33 | | ^ ^ | ^ ^ | |
34 | `- +0 ------------ +1 --.. `----- +0 ------------- +1 --.. | |
35 | ||
36 | When the queue is initialized, the time is set to zero with a | |
37 | number of initialization events scheduled. Consequently, as also | |
38 | illustrated above, the event queue should be processed before the | |
39 | first instruction. That instruction being executed during tick 1. | |
40 | ||
f03b093c | 41 | The simulator main loop may take a form similar to: |
c445af5a | 42 | |
f03b093c AC |
43 | if (halt-/restart-setjmp) |
44 | { | |
c445af5a | 45 | |
f03b093c AC |
46 | .... // Determine who should go next |
47 | last-cpu-nr = get-last-cpu-nr (sd); | |
48 | next-cpu-nr = get-next-cpu-nr (sd); | |
49 | events-were-last? = (last-cpu-nr >= nr-cpus); | |
50 | events-were-next? = (next-cpu-nr >= nr-cpus); | |
c445af5a | 51 | |
f03b093c AC |
52 | .... // process any outstanding events |
53 | sim_events_preprocess (sd, events-were-last?, events-were-next?); | |
54 | if (events-were-next) | |
55 | next-cpu-nr = 0; | |
56 | ||
57 | .... // prime main loop | |
58 | ||
59 | while (1) | |
60 | { | |
61 | .... // model one insn of next-cpu-nr .. nr-cpus | |
62 | if (sim_events_tick (sd)) | |
63 | sim_events_process (sd); | |
64 | next-cpu-nr = 0 | |
65 | } | |
66 | } | |
67 | ||
68 | NB. In the above pseudo code it is assumed that any cpu-nr >= | |
69 | nr-cpus is a marker for the event queue. */ | |
70 | ||
71 | ||
72 | typedef void sim_event_handler(SIM_DESC sd, void *data); | |
c445af5a AC |
73 | |
74 | typedef struct _sim_event sim_event; | |
231de1b8 | 75 | |
c445af5a AC |
76 | typedef struct _sim_events sim_events; |
77 | struct _sim_events { | |
50a2a691 | 78 | int nr_ticks_to_process; |
c445af5a | 79 | sim_event *queue; |
f03b093c AC |
80 | sim_event *watchpoints; |
81 | sim_event *watchedpoints; | |
50a2a691 | 82 | sim_event *free_list; |
f03b093c AC |
83 | /* flag additional work needed */ |
84 | volatile int work_pending; | |
85 | /* the asynchronous event queue */ | |
50a2a691 AC |
86 | #ifndef MAX_NR_SIGNAL_SIM_EVENTS |
87 | #define MAX_NR_SIGNAL_SIM_EVENTS 2 | |
88 | #endif | |
89 | sim_event *held; | |
90 | volatile int nr_held; | |
f03b093c AC |
91 | /* timekeeping */ |
92 | SIM_ELAPSED_TIME initial_wallclock; | |
231de1b8 | 93 | signed64 time_of_event; |
c445af5a | 94 | int time_from_event; |
231de1b8 AC |
95 | int trace; |
96 | }; | |
97 | ||
231de1b8 AC |
98 | |
99 | ||
f03b093c AC |
100 | /* Install the "events" module. */ |
101 | ||
102 | EXTERN_SIM_EVENTS\ | |
103 | (SIM_RC) sim_events_install (SIM_DESC sd); | |
104 | ||
105 | ||
106 | /* Uninstall the "events" subsystem. */ | |
107 | ||
108 | EXTERN_SIM_EVENTS\ | |
109 | (void) | |
110 | sim_events_uninstall (SIM_DESC sd); | |
111 | ||
112 | ||
113 | ||
231de1b8 AC |
114 | /* Initialization */ |
115 | ||
f03b093c AC |
116 | EXTERN_SIM_EVENTS\ |
117 | (SIM_RC) sim_events_init (SIM_DESC sd); | |
231de1b8 AC |
118 | |
119 | ||
c445af5a | 120 | /* Set Tracing Level */ |
231de1b8 | 121 | |
f03b093c | 122 | EXTERN_SIM_EVENTS\ |
c445af5a AC |
123 | (void) sim_events_set_trace |
124 | (SIM_DESC sd, | |
231de1b8 AC |
125 | int level); |
126 | ||
127 | ||
c445af5a | 128 | /* Schedule an event DELTA_TIME ticks into the future */ |
231de1b8 | 129 | |
f03b093c | 130 | EXTERN_SIM_EVENTS\ |
c445af5a AC |
131 | (sim_event *) sim_events_schedule |
132 | (SIM_DESC sd, | |
231de1b8 | 133 | signed64 delta_time, |
c445af5a | 134 | sim_event_handler *handler, |
231de1b8 AC |
135 | void *data); |
136 | ||
f03b093c | 137 | EXTERN_SIM_EVENTS\ |
50a2a691 | 138 | (void) sim_events_schedule_after_signal |
c445af5a | 139 | (SIM_DESC sd, |
231de1b8 | 140 | signed64 delta_time, |
c445af5a | 141 | sim_event_handler *handler, |
231de1b8 AC |
142 | void *data); |
143 | ||
c445af5a | 144 | |
50a2a691 AC |
145 | /* Schedule an event milli-seconds from NOW. The exact interpretation |
146 | of wallclock is host dependant. */ | |
c445af5a | 147 | |
f03b093c AC |
148 | EXTERN_SIM_EVENTS\ |
149 | (sim_event *) sim_events_watch_clock | |
c445af5a | 150 | (SIM_DESC sd, |
50a2a691 | 151 | unsigned delta_ms_time, |
c445af5a AC |
152 | sim_event_handler *handler, |
153 | void *data); | |
154 | ||
155 | ||
f03b093c AC |
156 | /* Schedule an event when the NR_BYTES value at HOST_ADDR with |
157 | BYTE_ORDER lies within LB..UB (unsigned). | |
c445af5a | 158 | |
f03b093c AC |
159 | HOST_ADDR: pointer into the host address space. |
160 | BYTE_ORDER: 0 - host endian; BIG_ENDIAN; LITTLE_ENDIAN */ | |
161 | ||
162 | EXTERN_SIM_EVENTS\ | |
163 | (sim_event*) sim_events_watch_sim | |
c445af5a | 164 | (SIM_DESC sd, |
f03b093c AC |
165 | void *host_addr, |
166 | int nr_bytes, | |
167 | int byte_order, | |
c445af5a AC |
168 | unsigned64 lb, |
169 | unsigned64 ub, | |
170 | sim_event_handler *handler, | |
171 | void *data); | |
c445af5a AC |
172 | |
173 | ||
f03b093c AC |
174 | /* Schedule an event when the NR_BYTES value at CORE_ADDR with BYTE_ORDER |
175 | lies between LB..UB. | |
c445af5a | 176 | |
f03b093c AC |
177 | CORE_ADDR/MAP: pointer into the target address space. |
178 | BYTE_ORDER: 0 - current target endian; BIG_ENDIAN; LITTLE_ENDIAN */ | |
179 | ||
180 | EXTERN_SIM_EVENTS\ | |
181 | (sim_event*) sim_events_watch_core | |
c445af5a | 182 | (SIM_DESC sd, |
f03b093c AC |
183 | address_word core_addr, |
184 | sim_core_maps core_map, | |
185 | int nr_bytes, | |
186 | int byte_order, | |
c445af5a AC |
187 | unsigned64 lb, |
188 | unsigned64 ub, | |
189 | sim_event_handler *handler, | |
190 | void *data); | |
c445af5a | 191 | |
c445af5a AC |
192 | /* Deschedule the specified event */ |
193 | ||
f03b093c | 194 | EXTERN_SIM_EVENTS\ |
c445af5a AC |
195 | (void) sim_events_deschedule |
196 | (SIM_DESC sd, | |
197 | sim_event *event_to_remove); | |
198 | ||
231de1b8 | 199 | |
f03b093c AC |
200 | /* Prepare for main simulator loop. Ensure that the next thing to do |
201 | is not event processing. | |
202 | ||
203 | If the simulator halted part way through event processing then both | |
204 | EVENTS_WERE_LAST and EVENTS_WERE_FIRST shall be true. | |
205 | ||
206 | If the simulator halted after processing the last cpu, then only | |
207 | EVENTS_WERE_NEXT shall be true. */ | |
208 | ||
209 | INLINE_SIM_EVENTS\ | |
210 | (void) sim_events_preprocess | |
211 | (SIM_DESC sd, | |
212 | int events_were_last, | |
213 | int events_were_next); | |
231de1b8 | 214 | |
f03b093c AC |
215 | |
216 | /* Progress time - separated into two parts so that the main loop can | |
50a2a691 AC |
217 | save its context before the event queue is processed. |
218 | ||
219 | sim_events_tickn advances the clock by N cycles. */ | |
231de1b8 AC |
220 | |
221 | INLINE_SIM_EVENTS\ | |
c445af5a AC |
222 | (int) sim_events_tick |
223 | (SIM_DESC sd); | |
231de1b8 | 224 | |
50a2a691 AC |
225 | INLINE_SIM_EVENTS\ |
226 | (int) sim_events_tickn | |
227 | (SIM_DESC sd, | |
228 | unsigned n); | |
229 | ||
231de1b8 | 230 | INLINE_SIM_EVENTS\ |
c445af5a AC |
231 | (void) sim_events_process |
232 | (SIM_DESC sd); | |
231de1b8 AC |
233 | |
234 | ||
50a2a691 AC |
235 | /* Progress time such that an event shall occure upon the next call to |
236 | sim_events tick */ | |
237 | ||
238 | #if 0 | |
239 | INLINE_SIM_EVENTS\ | |
240 | (void) sim_events_timewarp | |
241 | (SIM_DESC sd); | |
242 | #endif | |
243 | ||
f03b093c | 244 | |
231de1b8 AC |
245 | /* local concept of time */ |
246 | ||
247 | INLINE_SIM_EVENTS\ | |
c445af5a AC |
248 | (signed64) sim_events_time |
249 | (SIM_DESC sd); | |
231de1b8 AC |
250 | |
251 | ||
252 | #endif |