[deliverable/binutils-gdb.git] / sim / common / sim-fpu.h

/* Simulator Floating-point support.
   Copyright (C) 1997 Free Software Foundation, Inc.
   Contributed by Cygnus Support.

This file is part of GDB, the GNU debugger.

This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.

This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
GNU General Public License for more details.

You should have received a copy of the GNU General Public License along
with this program; if not, write to the Free Software Foundation, Inc.,
59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */


#ifndef SIM_FPU_H
#define SIM_FPU_H


/* The FPU intermediate type - this object, passed by reference,
   should be treated as opaque.


   Pragmatics - pass struct by ref:

   The alternatives for this object/interface that were considered
   were: a packed 64 bit value; an unpacked structure passed by value;
   and an unpacked structure passed by reference.

   The packed 64 bit value was rejected because: it limited the
   precision of intermediate values; reasonable performance would only
   be achieved when the sim_fpu package was in-lined allowing repeated
   unpacking operations to be eliminated.

   For unpacked structures (passed by value and reference), the code
   quality of GCC-2.7 (on x86) for each alternative was compared.
   Needless to say the results, while better then for a packed 64 bit
   object, were still poor (GCC had only limited support for the
   optimization of references to structure members).  Regardless, the
   struct-by-ref alternative achieved better results when compiled
   with (better speed) and without (better code density) in-lining.
   Here's looking forward to an improved GCC optimizer.


   Pragmatics - avoid host FP hardware:

   FP operations can be implemented by either: the host's floating
   point hardware; or by emulating the FP operations using integer
   only routines.  This is direct tradeoff between speed, portability
   and correctness.

   The two principal reasons for selecting portability and correctness
   over speed are:

   1 - Correctness.  The assumption that FP correctness wasn't an
   issue for code being run on simulators was wrong.  Instead of
   running FP tolerant (?) code, simulator users instead typically run
   very aggressive FP code sequences.  The sole purpose of those
   sequences being to test the target ISA's FP implementation.

   2 - Portability.  The host FP implementation is not predictable.  A
   simulator modeling aggressive FP code sequences using the hosts FPU
   relies heavily on the correctness of the hosts FP implementation.
   It turns out that such trust can be misplaced.  The behavior of
   host FP implementations when handling edge conditions such as SNaNs
   and exceptions varied widely.


   */


typedef enum
{
  sim_fpu_class_zero,
  sim_fpu_class_snan,
  sim_fpu_class_qnan,
  sim_fpu_class_number,
  sim_fpu_class_denorm,
  sim_fpu_class_infinity,
} sim_fpu_class;

typedef struct _sim_fpu {
  sim_fpu_class class;
  int sign;
  unsigned64 fraction;
  int normal_exp;
} sim_fpu;


/* Rounding options.

   The value zero (sim_fpu_round_default) for ALU operations indicates
   that, when possible, rounding should be avoided. */

typedef enum
{
  sim_fpu_round_default = 0,
  sim_fpu_round_near = 1,
  sim_fpu_round_zero = 2,
  sim_fpu_round_up = 3,
  sim_fpu_round_down = 4,
} sim_fpu_round;


/* Options when handling denormalized numbers.  */

typedef enum
{
  sim_fpu_denorm_default = 0,
  sim_fpu_denorm_underflow_inexact = 1,
  sim_fpu_denorm_zero = 2,
} sim_fpu_denorm;


/* Status values returned by FPU operators.

   When checking the result of an FP sequence (ex 32to, add, single,
   to32) the caller may either: check the return value of each FP
   operator; or form the union (OR) of the returned values and examine
   them once at the end.

   FIXME: This facility is still being developed.  The choice of
   status values returned and their exact meaning may changed in the
   future.  */

typedef enum
{
  sim_fpu_status_invalid_snan = 1,
  sim_fpu_status_invalid_qnan = 2,
  sim_fpu_status_invalid_isi = 4, /* (inf - inf) */
  sim_fpu_status_invalid_idi = 8, /* (inf / inf) */
  sim_fpu_status_invalid_zdz = 16, /* (0 / 0) */
  sim_fpu_status_invalid_imz = 32, /* (inf * 0) */
  sim_fpu_status_invalid_cvi = 64, /* convert to integer */
  sim_fpu_status_invalid_div0 = 128, /* (X / 0) */
  sim_fpu_status_invalid_cmp = 256, /* compare */
  sim_fpu_status_invalid_sqrt = 512,
  sim_fpu_status_rounded = 1024,
  sim_fpu_status_inexact = 2048,
  sim_fpu_status_overflow = 4096,
  sim_fpu_status_underflow = 8192,
  sim_fpu_status_denorm = 16384,
} sim_fpu_status;


/* Directly map between a 32/64 bit register and the sim_fpu internal
   type.

   When converting from the 32/64 bit packed format to the sim_fpu
   internal type, the operation is exact.

   When converting from the sim_fpu internal type to 32/64 bit packed
   format, the operation may result in a loss of precision. The
   configuration macro WITH_FPU_CONVERSION controls this.  By default,
   silent round to nearest is performed.  Alternativly, round up,
   round down and round to zero can be performed.  In a simulator
   emulating exact FPU behavour, sim_fpu_round_{32,64} should be
   called before packing the sim_fpu value.  */

INLINE_SIM_FPU (void) sim_fpu_32to (sim_fpu *f, unsigned32 s);
INLINE_SIM_FPU (void) sim_fpu_232to (sim_fpu *f, unsigned32 h, unsigned32 l);
INLINE_SIM_FPU (void) sim_fpu_64to (sim_fpu *f, unsigned64 d);

INLINE_SIM_FPU (void) sim_fpu_to32 (unsigned32 *s, const sim_fpu *f);
INLINE_SIM_FPU (void) sim_fpu_to232 (unsigned32 *h, unsigned32 *l, const sim_fpu *f);
INLINE_SIM_FPU (void) sim_fpu_to64 (unsigned64 *d, const sim_fpu *f);


/* Rounding operators.

   Force an intermediate result to an exact 32/64 bit
   representation. */

INLINE_SIM_FPU (int) sim_fpu_round_32 (sim_fpu *f,
				       sim_fpu_round round,
				       sim_fpu_denorm denorm);
INLINE_SIM_FPU (int) sim_fpu_round_64 (sim_fpu *f,
				       sim_fpu_round round,
				       sim_fpu_denorm denorm);


/* Arrithmetic operators.

   FIXME: In the future, additional arguments ROUNDING and BITSIZE may
   be added. */

typedef int (sim_fpu_op1) (sim_fpu *f,
			   const sim_fpu *l);
typedef int (sim_fpu_op2) (sim_fpu *f,
			   const sim_fpu *l,
			   const sim_fpu *r);

INLINE_SIM_FPU (int) sim_fpu_add (sim_fpu *f,
				  const sim_fpu *l, const sim_fpu *r);
INLINE_SIM_FPU (int) sim_fpu_sub (sim_fpu *f,
				  const sim_fpu *l, const sim_fpu *r);
INLINE_SIM_FPU (int) sim_fpu_mul (sim_fpu *f,
				  const sim_fpu *l, const sim_fpu *r);
INLINE_SIM_FPU (int) sim_fpu_div (sim_fpu *f,
				  const sim_fpu *l, const sim_fpu *r);
INLINE_SIM_FPU (int) sim_fpu_max (sim_fpu *f,
				  const sim_fpu *l, const sim_fpu *r);
INLINE_SIM_FPU (int) sim_fpu_min (sim_fpu *f,
				  const sim_fpu *l, const sim_fpu *r);
INLINE_SIM_FPU (int) sim_fpu_neg (sim_fpu *f,
				  const sim_fpu *a);
INLINE_SIM_FPU (int) sim_fpu_abs (sim_fpu *f,
				  const sim_fpu *a);
INLINE_SIM_FPU (int) sim_fpu_inv (sim_fpu *f,
				  const sim_fpu *a);
INLINE_SIM_FPU (int) sim_fpu_sqrt (sim_fpu *f,
				   const sim_fpu *sqr);


/* Conversion of integer <-> floating point. */

INLINE_SIM_FPU (int) sim_fpu_i32to (sim_fpu *f, signed32 i,
				    sim_fpu_round round);
INLINE_SIM_FPU (int) sim_fpu_u32to (sim_fpu *f, unsigned32 u,
				    sim_fpu_round round);
INLINE_SIM_FPU (int) sim_fpu_i64to (sim_fpu *f, signed64 i,
				    sim_fpu_round round);
INLINE_SIM_FPU (int) sim_fpu_u64to (sim_fpu *f, unsigned64 u,
				    sim_fpu_round round);
#if 0
INLINE_SIM_FPU (int) sim_fpu_i232to (sim_fpu *f, signed32 h, signed32 l,
				     sim_fpu_round round);
#endif
#if 0
INLINE_SIM_FPU (int) sim_fpu_u232to (sim_fpu *f, unsigned32 h, unsigned32 l,
				     sim_fpu_round round);
#endif

INLINE_SIM_FPU (int) sim_fpu_to32i (signed32 *i, const sim_fpu *f,
				    sim_fpu_round round);
INLINE_SIM_FPU (int) sim_fpu_to32u (unsigned32 *u, const sim_fpu *f,
				    sim_fpu_round round);
INLINE_SIM_FPU (int) sim_fpu_to64i (signed64 *i, const sim_fpu *f,
				    sim_fpu_round round);
INLINE_SIM_FPU (int) sim_fpu_to64u (unsigned64 *u, const sim_fpu *f,
				    sim_fpu_round round);
#if 0
INLINE_SIM_FPU (int) sim_fpu_to232i (signed64 *h, signed64 *l, const sim_fpu *f,
				     sim_fpu_round round);
#endif
#if 0
INLINE_SIM_FPU (int) sim_fpu_to232u (unsigned64 *h, unsigned64 *l, const sim_fpu *f,
				     sim_fpu_round round);
#endif


/* Conversion of internal sim_fpu type to host double format.

   For debuging/tracing only.  A SNaN is never returned. */

/* INLINE_SIM_FPU (float) sim_fpu_2f (const sim_fpu *f); */
INLINE_SIM_FPU (double) sim_fpu_2d (const sim_fpu *d);

/* INLINE_SIM_FPU (void) sim_fpu_f2 (sim_fpu *f, float s); */
INLINE_SIM_FPU (void) sim_fpu_d2 (sim_fpu *f, double d);


/* Specific number classes.

   NB: When either, a 32/64 bit floating points is converted to
   internal format, or an internal format number is rounded to 32/64
   bit precision, a special marker is retained that indicates that the
   value was normalized.  For such numbers both is_number and
   is_denorm return true. */

INLINE_SIM_FPU (int) sim_fpu_is_nan (const sim_fpu *s); /* 1 => SNaN or QNaN */
INLINE_SIM_FPU (int) sim_fpu_is_snan (const sim_fpu *s); /* 1 => SNaN */
INLINE_SIM_FPU (int) sim_fpu_is_qnan (const sim_fpu *s); /* 1 => QNaN */

INLINE_SIM_FPU (int) sim_fpu_is_zero (const sim_fpu *s);
INLINE_SIM_FPU (int) sim_fpu_is_infinity (const sim_fpu *s);
INLINE_SIM_FPU (int) sim_fpu_is_number (const sim_fpu *s); /* !zero */
INLINE_SIM_FPU (int) sim_fpu_is_denorm (const sim_fpu *s); /* !zero */


/* Floating point fields */

INLINE_SIM_FPU (int) sim_fpu_sign (const sim_fpu *s);
INLINE_SIM_FPU (int) sim_fpu_exp (const sim_fpu *s);


/* Specific comparison operators

   For NaNs et.al., the comparison operators will set IS to zero and
   return a nonzero result. */

INLINE_SIM_FPU (int) sim_fpu_lt (int *is, const sim_fpu *l, const sim_fpu *r);
INLINE_SIM_FPU (int) sim_fpu_le (int *is, const sim_fpu *l, const sim_fpu *r);
INLINE_SIM_FPU (int) sim_fpu_eq (int *is, const sim_fpu *l, const sim_fpu *r);
INLINE_SIM_FPU (int) sim_fpu_ne (int *is, const sim_fpu *l, const sim_fpu *r);
INLINE_SIM_FPU (int) sim_fpu_ge (int *is, const sim_fpu *l, const sim_fpu *r);
INLINE_SIM_FPU (int) sim_fpu_gt (int *is, const sim_fpu *l, const sim_fpu *r);

INLINE_SIM_FPU (int) sim_fpu_is_lt (const sim_fpu *l, const sim_fpu *r);
INLINE_SIM_FPU (int) sim_fpu_is_le (const sim_fpu *l, const sim_fpu *r);
INLINE_SIM_FPU (int) sim_fpu_is_eq (const sim_fpu *l, const sim_fpu *r);
INLINE_SIM_FPU (int) sim_fpu_is_ne (const sim_fpu *l, const sim_fpu *r);
INLINE_SIM_FPU (int) sim_fpu_is_ge (const sim_fpu *l, const sim_fpu *r);
INLINE_SIM_FPU (int) sim_fpu_is_gt (const sim_fpu *l, const sim_fpu *r);


/* General number class and comparison operators.

   The result of the comparison is indicated by returning one of the
   values below.  Efficient emulation of a target FP compare
   instruction can be achieved by redefining the values below to match
   corresponding target FP status bits.

   For instance.  SIM_FPU_QNAN may be redefined to be the bit
   `INVALID' while SIM_FPU_NINF might be redefined as the bits
   `NEGATIVE | INFINITY | VALID'. */

#ifndef SIM_FPU_IS_SNAN
enum {
  SIM_FPU_IS_SNAN = 1, /* Noisy not-a-number */
  SIM_FPU_IS_QNAN = 2, /* Quite not-a-number */
  SIM_FPU_IS_NINF = 3, /* -infinity */
  SIM_FPU_IS_PINF = 4, /* +infinity */
  SIM_FPU_IS_NNUMBER = 5, /* -number - [ -MAX .. -MIN ] */
  SIM_FPU_IS_PNUMBER = 6, /* +number - [ +MIN .. +MAX ] */
  SIM_FPU_IS_NDENORM = 7, /* -denorm - ( MIN .. 0 ) */
  SIM_FPU_IS_PDENORM = 8, /* +denorm - ( 0 .. MIN ) */
  SIM_FPU_IS_NZERO = 9, /* -0 */
  SIM_FPU_IS_PZERO = 10, /* +0 */
};
#endif

INLINE_SIM_FPU (int) sim_fpu_is (const sim_fpu *l);
INLINE_SIM_FPU (int) sim_fpu_cmp (const sim_fpu *l, const sim_fpu *r);


/* A constant of useful numbers */

EXTERN_SIM_FPU (const sim_fpu) sim_fpu_zero;
EXTERN_SIM_FPU (const sim_fpu) sim_fpu_one;
EXTERN_SIM_FPU (const sim_fpu) sim_fpu_two;
EXTERN_SIM_FPU (const sim_fpu) sim_fpu_qnan;
EXTERN_SIM_FPU (const sim_fpu) sim_fpu_max32;
EXTERN_SIM_FPU (const sim_fpu) sim_fpu_max64;


/* Select the applicable functions for the fp_word type */

#if WITH_TARGET_FLOATING_POINT_BITSIZE == 32
#define sim_fpu_tofp sim_fpu_to32
#define sim_fpu_fpto sim_fpu_32to
#define sim_fpu_round_fp sim_fpu_round_32
#define sim_fpu_maxfp sim_fpu_max32
#endif
#if WITH_TARGET_FLOATING_POINT_BITSIZE == 64
#define sim_fpu_tofp sim_fpu_to64
#define sim_fpu_fpto sim_fpu_64to
#define sim_fpu_round_fp sim_fpu_round_64
#define sim_fpu_maxfp sim_fpu_max64
#endif


/* For debugging */

typedef void sim_fpu_print_func (void *, char *, ...);

INLINE_SIM_FPU (void) sim_fpu_print_fpu (const sim_fpu *f,
					 sim_fpu_print_func *print,
					 void *arg);

INLINE_SIM_FPU (void) sim_fpu_print_status (int status,
					    sim_fpu_print_func *print,
					    void *arg);

#if H_REVEALS_MODULE_P (SIM_FPU_INLINE)
#include "sim-fpu.c"
#endif

#endif
Commit	Line	Data
3971886a AC	1	/* Simulator Floating-point support.
	2	Copyright (C) 1997 Free Software Foundation, Inc.
	3	Contributed by Cygnus Support.
	4
	5	This file is part of GDB, the GNU debugger.
	6
	7	This program is free software; you can redistribute it and/or modify
	8	it under the terms of the GNU General Public License as published by
	9	the Free Software Foundation; either version 2, or (at your option)
	10	any later version.
	11
	12	This program is distributed in the hope that it will be useful,
	13	but WITHOUT ANY WARRANTY; without even the implied warranty of
	14	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	15	GNU General Public License for more details.
	16
	17	You should have received a copy of the GNU General Public License along
	18	with this program; if not, write to the Free Software Foundation, Inc.,
	19	59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
	20
	21
	22
bdfe5c04 AC	23	#ifndef SIM_FPU_H
bdfe5c04 AC	24	#define SIM_FPU_H
3971886a	25
bdfe5c04 AC	26
	27
	28	/* The FPU intermediate type - this object, passed by reference,
	29	should be treated as opaque.
	30
	31
	32	Pragmatics - pass struct by ref:
	33
	34	The alternatives for this object/interface that were considered
	35	were: a packed 64 bit value; an unpacked structure passed by value;
	36	and an unpacked structure passed by reference.
	37
	38	The packed 64 bit value was rejected because: it limited the
	39	precision of intermediate values; reasonable performance would only
	40	be achieved when the sim_fpu package was in-lined allowing repeated
	41	unpacking operations to be eliminated.
	42
	43	For unpacked structures (passed by value and reference), the code
	44	quality of GCC-2.7 (on x86) for each alternative was compared.
	45	Needless to say the results, while better then for a packed 64 bit
	46	object, were still poor (GCC had only limited support for the
	47	optimization of references to structure members). Regardless, the
	48	struct-by-ref alternative achieved better results when compiled
	49	with (better speed) and without (better code density) in-lining.
	50	Here's looking forward to an improved GCC optimizer.
	51
	52
	53	Pragmatics - avoid host FP hardware:
	54
	55	FP operations can be implemented by either: the host's floating
	56	point hardware; or by emulating the FP operations using integer
	57	only routines. This is direct tradeoff between speed, portability
	58	and correctness.
	59
	60	The two principal reasons for selecting portability and correctness
	61	over speed are:
	62
	63	1 - Correctness. The assumption that FP correctness wasn't an
	64	issue for code being run on simulators was wrong. Instead of
	65	running FP tolerant (?) code, simulator users instead typically run
	66	very aggressive FP code sequences. The sole purpose of those
	67	sequences being to test the target ISA's FP implementation.
	68
	69	2 - Portability. The host FP implementation is not predictable. A
	70	simulator modeling aggressive FP code sequences using the hosts FPU
	71	relies heavily on the correctness of the hosts FP implementation.
	72	It turns out that such trust can be misplaced. The behavior of
	73	host FP implementations when handling edge conditions such as SNaNs
	74	and exceptions varied widely.
	75
	76
	77	*/
	78
	79
	80	typedef enum
	81	{
	82	sim_fpu_class_zero,
	83	sim_fpu_class_snan,
	84	sim_fpu_class_qnan,
	85	sim_fpu_class_number,
	86	sim_fpu_class_denorm,
	87	sim_fpu_class_infinity,
	88	} sim_fpu_class;
3971886a AC	89
3971886a AC	90	typedef struct _sim_fpu {
bdfe5c04	91	sim_fpu_class class;
bdfe5c04 AC	92	int sign;
bdfe5c04 AC	93	unsigned64 fraction;
278bda40	94	int normal_exp;
3971886a AC	95	} sim_fpu;
	96
	97
d24f06ee	98
bdfe5c04 AC	99	/* Rounding options.
	100
	101	The value zero (sim_fpu_round_default) for ALU operations indicates
	102	that, when possible, rounding should be avoided. */
d24f06ee	103
bdfe5c04 AC	104	typedef enum
	105	{
	106	sim_fpu_round_default = 0,
	107	sim_fpu_round_near = 1,
	108	sim_fpu_round_zero = 2,
	109	sim_fpu_round_up = 3,
	110	sim_fpu_round_down = 4,
	111	} sim_fpu_round;
d24f06ee AC	112
d24f06ee AC	113
bdfe5c04	114	/* Options when handling denormalized numbers. */
3971886a	115
bdfe5c04 AC	116	typedef enum
bdfe5c04 AC	117	{
278bda40	118	sim_fpu_denorm_default = 0,
bdfe5c04 AC	119	sim_fpu_denorm_underflow_inexact = 1,
	120	sim_fpu_denorm_zero = 2,
	121	} sim_fpu_denorm;
3971886a AC	122
3971886a AC	123
3971886a	124
bdfe5c04	125	/* Status values returned by FPU operators.
3971886a	126
bdfe5c04 AC	127	When checking the result of an FP sequence (ex 32to, add, single,
	128	to32) the caller may either: check the return value of each FP
	129	operator; or form the union (OR) of the returned values and examine
	130	them once at the end.
d24f06ee	131
bdfe5c04 AC	132	FIXME: This facility is still being developed. The choice of
	133	status values returned and their exact meaning may changed in the
	134	future. */
3971886a	135
bdfe5c04 AC	136	typedef enum
	137	{
	138	sim_fpu_status_invalid_snan = 1,
	139	sim_fpu_status_invalid_qnan = 2,
	140	sim_fpu_status_invalid_isi = 4, /* (inf - inf) */
	141	sim_fpu_status_invalid_idi = 8, /* (inf / inf) */
	142	sim_fpu_status_invalid_zdz = 16, /* (0 / 0) */
	143	sim_fpu_status_invalid_imz = 32, /* (inf * 0) */
	144	sim_fpu_status_invalid_cvi = 64, /* convert to integer */
	145	sim_fpu_status_invalid_div0 = 128, /* (X / 0) */
	146	sim_fpu_status_invalid_cmp = 256, /* compare */
	147	sim_fpu_status_invalid_sqrt = 512,
	148	sim_fpu_status_rounded = 1024,
	149	sim_fpu_status_inexact = 2048,
	150	sim_fpu_status_overflow = 4096,
	151	sim_fpu_status_underflow = 8192,
	152	sim_fpu_status_denorm = 16384,
	153	} sim_fpu_status;
3971886a	154
bdfe5c04 AC	155
	156
	157
	158	/* Directly map between a 32/64 bit register and the sim_fpu internal
	159	type.
	160
	161	When converting from the 32/64 bit packed format to the sim_fpu
	162	internal type, the operation is exact.
	163
	164	When converting from the sim_fpu internal type to 32/64 bit packed
	165	format, the operation may result in a loss of precision. The
	166	configuration macro WITH_FPU_CONVERSION controls this. By default,
	167	silent round to nearest is performed. Alternativly, round up,
	168	round down and round to zero can be performed. In a simulator
	169	emulating exact FPU behavour, sim_fpu_round_{32,64} should be
	170	called before packing the sim_fpu value. */
	171
	172	INLINE_SIM_FPU (void) sim_fpu_32to (sim_fpu *f, unsigned32 s);
	173	INLINE_SIM_FPU (void) sim_fpu_232to (sim_fpu *f, unsigned32 h, unsigned32 l);
	174	INLINE_SIM_FPU (void) sim_fpu_64to (sim_fpu *f, unsigned64 d);
	175
	176	INLINE_SIM_FPU (void) sim_fpu_to32 (unsigned32 s, const sim_fpu f);
	177	INLINE_SIM_FPU (void) sim_fpu_to232 (unsigned32 h, unsigned32 l, const sim_fpu *f);
	178	INLINE_SIM_FPU (void) sim_fpu_to64 (unsigned64 d, const sim_fpu f);
	179
3971886a AC	180
3971886a AC	181
bdfe5c04 AC	182	/* Rounding operators.
	183
	184	Force an intermediate result to an exact 32/64 bit
	185	representation. */
	186
	187	INLINE_SIM_FPU (int) sim_fpu_round_32 (sim_fpu *f,
	188	sim_fpu_round round,
	189	sim_fpu_denorm denorm);
	190	INLINE_SIM_FPU (int) sim_fpu_round_64 (sim_fpu *f,
	191	sim_fpu_round round,
	192	sim_fpu_denorm denorm);
	193
	194
	195
	196	/* Arrithmetic operators.
	197
	198	FIXME: In the future, additional arguments ROUNDING and BITSIZE may
	199	be added. */
	200
278bda40 AC	201	typedef int (sim_fpu_op1) (sim_fpu *f,
	202	const sim_fpu *l);
	203	typedef int (sim_fpu_op2) (sim_fpu *f,
	204	const sim_fpu *l,
	205	const sim_fpu *r);
	206
bdfe5c04 AC	207	INLINE_SIM_FPU (int) sim_fpu_add (sim_fpu *f,
	208	const sim_fpu l, const sim_fpu r);
	209	INLINE_SIM_FPU (int) sim_fpu_sub (sim_fpu *f,
	210	const sim_fpu l, const sim_fpu r);
	211	INLINE_SIM_FPU (int) sim_fpu_mul (sim_fpu *f,
	212	const sim_fpu l, const sim_fpu r);
	213	INLINE_SIM_FPU (int) sim_fpu_div (sim_fpu *f,
	214	const sim_fpu l, const sim_fpu r);
278bda40 AC	215	INLINE_SIM_FPU (int) sim_fpu_max (sim_fpu *f,
	216	const sim_fpu l, const sim_fpu r);
	217	INLINE_SIM_FPU (int) sim_fpu_min (sim_fpu *f,
	218	const sim_fpu l, const sim_fpu r);
bdfe5c04 AC	219	INLINE_SIM_FPU (int) sim_fpu_neg (sim_fpu *f,
	220	const sim_fpu *a);
	221	INLINE_SIM_FPU (int) sim_fpu_abs (sim_fpu *f,
	222	const sim_fpu *a);
	223	INLINE_SIM_FPU (int) sim_fpu_inv (sim_fpu *f,
	224	const sim_fpu *a);
	225	INLINE_SIM_FPU (int) sim_fpu_sqrt (sim_fpu *f,
	226	const sim_fpu *sqr);
	227
	228
	229
	230	/* Conversion of integer <-> floating point. */
	231
	232	INLINE_SIM_FPU (int) sim_fpu_i32to (sim_fpu *f, signed32 i,
	233	sim_fpu_round round);
	234	INLINE_SIM_FPU (int) sim_fpu_u32to (sim_fpu *f, unsigned32 u,
	235	sim_fpu_round round);
	236	INLINE_SIM_FPU (int) sim_fpu_i64to (sim_fpu *f, signed64 i,
	237	sim_fpu_round round);
	238	INLINE_SIM_FPU (int) sim_fpu_u64to (sim_fpu *f, unsigned64 u,
	239	sim_fpu_round round);
278bda40	240	#if 0
bdfe5c04 AC	241	INLINE_SIM_FPU (int) sim_fpu_i232to (sim_fpu *f, signed32 h, signed32 l,
bdfe5c04 AC	242	sim_fpu_round round);
278bda40 AC	243	#endif
278bda40 AC	244	#if 0
bdfe5c04 AC	245	INLINE_SIM_FPU (int) sim_fpu_u232to (sim_fpu *f, unsigned32 h, unsigned32 l,
bdfe5c04 AC	246	sim_fpu_round round);
278bda40	247	#endif
bdfe5c04 AC	248
	249	INLINE_SIM_FPU (int) sim_fpu_to32i (signed32 i, const sim_fpu f,
	250	sim_fpu_round round);
	251	INLINE_SIM_FPU (int) sim_fpu_to32u (unsigned32 u, const sim_fpu f,
	252	sim_fpu_round round);
	253	INLINE_SIM_FPU (int) sim_fpu_to64i (signed64 i, const sim_fpu f,
	254	sim_fpu_round round);
	255	INLINE_SIM_FPU (int) sim_fpu_to64u (unsigned64 u, const sim_fpu f,
	256	sim_fpu_round round);
278bda40	257	#if 0
bdfe5c04 AC	258	INLINE_SIM_FPU (int) sim_fpu_to232i (signed64 h, signed64 l, const sim_fpu *f,
bdfe5c04 AC	259	sim_fpu_round round);
278bda40 AC	260	#endif
278bda40 AC	261	#if 0
bdfe5c04 AC	262	INLINE_SIM_FPU (int) sim_fpu_to232u (unsigned64 h, unsigned64 l, const sim_fpu *f,
bdfe5c04 AC	263	sim_fpu_round round);
278bda40	264	#endif
bdfe5c04 AC	265
	266
	267	/* Conversion of internal sim_fpu type to host double format.
	268
	269	For debuging/tracing only. A SNaN is never returned. */
	270
	271	/* INLINE_SIM_FPU (float) sim_fpu_2f (const sim_fpu f); /
	272	INLINE_SIM_FPU (double) sim_fpu_2d (const sim_fpu *d);
	273
	274	/* INLINE_SIM_FPU (void) sim_fpu_f2 (sim_fpu f, float s); /
	275	INLINE_SIM_FPU (void) sim_fpu_d2 (sim_fpu *f, double d);
	276
	277
	278
	279	/* Specific number classes.
	280
278bda40	281	NB: When either, a 32/64 bit floating points is converted to
bdfe5c04 AC	282	internal format, or an internal format number is rounded to 32/64
	283	bit precision, a special marker is retained that indicates that the
	284	value was normalized. For such numbers both is_number and
278bda40	285	is_denorm return true. */
bdfe5c04 AC	286
	287	INLINE_SIM_FPU (int) sim_fpu_is_nan (const sim_fpu s); / 1 => SNaN or QNaN */
	288	INLINE_SIM_FPU (int) sim_fpu_is_snan (const sim_fpu s); / 1 => SNaN */
	289	INLINE_SIM_FPU (int) sim_fpu_is_qnan (const sim_fpu s); / 1 => QNaN */
	290
	291	INLINE_SIM_FPU (int) sim_fpu_is_zero (const sim_fpu *s);
	292	INLINE_SIM_FPU (int) sim_fpu_is_infinity (const sim_fpu *s);
	293	INLINE_SIM_FPU (int) sim_fpu_is_number (const sim_fpu s); / !zero */
	294	INLINE_SIM_FPU (int) sim_fpu_is_denorm (const sim_fpu s); / !zero */
	295
	296
278bda40 AC	297
	298	/* Floating point fields */
	299
	300	INLINE_SIM_FPU (int) sim_fpu_sign (const sim_fpu *s);
	301	INLINE_SIM_FPU (int) sim_fpu_exp (const sim_fpu *s);
	302
	303
	304
bdfe5c04 AC	305	/* Specific comparison operators
bdfe5c04 AC	306
278bda40 AC	307	For NaNs et.al., the comparison operators will set IS to zero and
278bda40 AC	308	return a nonzero result. */
bdfe5c04 AC	309
	310	INLINE_SIM_FPU (int) sim_fpu_lt (int is, const sim_fpu l, const sim_fpu *r);
	311	INLINE_SIM_FPU (int) sim_fpu_le (int is, const sim_fpu l, const sim_fpu *r);
	312	INLINE_SIM_FPU (int) sim_fpu_eq (int is, const sim_fpu l, const sim_fpu *r);
	313	INLINE_SIM_FPU (int) sim_fpu_ne (int is, const sim_fpu l, const sim_fpu *r);
	314	INLINE_SIM_FPU (int) sim_fpu_ge (int is, const sim_fpu l, const sim_fpu *r);
	315	INLINE_SIM_FPU (int) sim_fpu_gt (int is, const sim_fpu l, const sim_fpu *r);
	316
	317	INLINE_SIM_FPU (int) sim_fpu_is_lt (const sim_fpu l, const sim_fpu r);
	318	INLINE_SIM_FPU (int) sim_fpu_is_le (const sim_fpu l, const sim_fpu r);
	319	INLINE_SIM_FPU (int) sim_fpu_is_eq (const sim_fpu l, const sim_fpu r);
	320	INLINE_SIM_FPU (int) sim_fpu_is_ne (const sim_fpu l, const sim_fpu r);
	321	INLINE_SIM_FPU (int) sim_fpu_is_ge (const sim_fpu l, const sim_fpu r);
	322	INLINE_SIM_FPU (int) sim_fpu_is_gt (const sim_fpu l, const sim_fpu r);
	323
	324
	325
	326	/* General number class and comparison operators.
	327
	328	The result of the comparison is indicated by returning one of the
	329	values below. Efficient emulation of a target FP compare
	330	instruction can be achieved by redefining the values below to match
	331	corresponding target FP status bits.
	332
	333	For instance. SIM_FPU_QNAN may be redefined to be the bit
	334	`INVALID' while SIM_FPU_NINF might be redefined as the bits
	335	`NEGATIVE \| INFINITY \| VALID'. */
	336
	337	#ifndef SIM_FPU_IS_SNAN
	338	enum {
	339	SIM_FPU_IS_SNAN = 1, /* Noisy not-a-number */
	340	SIM_FPU_IS_QNAN = 2, /* Quite not-a-number */
	341	SIM_FPU_IS_NINF = 3, /* -infinity */
	342	SIM_FPU_IS_PINF = 4, /* +infinity */
	343	SIM_FPU_IS_NNUMBER = 5, /* -number - [ -MAX .. -MIN ] */
	344	SIM_FPU_IS_PNUMBER = 6, /* +number - [ +MIN .. +MAX ] */
	345	SIM_FPU_IS_NDENORM = 7, /* -denorm - ( MIN .. 0 ) */
	346	SIM_FPU_IS_PDENORM = 8, /* +denorm - ( 0 .. MIN ) */
	347	SIM_FPU_IS_NZERO = 9, /* -0 */
	348	SIM_FPU_IS_PZERO = 10, /* +0 */
	349	};
	350	#endif
	351
	352	INLINE_SIM_FPU (int) sim_fpu_is (const sim_fpu *l);
	353	INLINE_SIM_FPU (int) sim_fpu_cmp (const sim_fpu l, const sim_fpu r);
	354
	355
	356
	357	/* A constant of useful numbers */
	358
278bda40 AC	359	EXTERN_SIM_FPU (const sim_fpu) sim_fpu_zero;
	360	EXTERN_SIM_FPU (const sim_fpu) sim_fpu_one;
	361	EXTERN_SIM_FPU (const sim_fpu) sim_fpu_two;
	362	EXTERN_SIM_FPU (const sim_fpu) sim_fpu_qnan;
	363	EXTERN_SIM_FPU (const sim_fpu) sim_fpu_max32;
	364	EXTERN_SIM_FPU (const sim_fpu) sim_fpu_max64;
	365
	366
	367	/* Select the applicable functions for the fp_word type */
	368
	369	#if WITH_TARGET_FLOATING_POINT_BITSIZE == 32
	370	#define sim_fpu_tofp sim_fpu_to32
	371	#define sim_fpu_fpto sim_fpu_32to
	372	#define sim_fpu_round_fp sim_fpu_round_32
	373	#define sim_fpu_maxfp sim_fpu_max32
	374	#endif
	375	#if WITH_TARGET_FLOATING_POINT_BITSIZE == 64
	376	#define sim_fpu_tofp sim_fpu_to64
	377	#define sim_fpu_fpto sim_fpu_64to
	378	#define sim_fpu_round_fp sim_fpu_round_64
	379	#define sim_fpu_maxfp sim_fpu_max64
	380	#endif
	381
bdfe5c04	382
3971886a	383
bdfe5c04	384	/* For debugging */
3971886a	385
bdfe5c04	386	typedef void sim_fpu_print_func (void , char , ...);
3971886a	387
bdfe5c04 AC	388	INLINE_SIM_FPU (void) sim_fpu_print_fpu (const sim_fpu *f,
	389	sim_fpu_print_func *print,
	390	void *arg);
3971886a	391
bdfe5c04 AC	392	INLINE_SIM_FPU (void) sim_fpu_print_status (int status,
	393	sim_fpu_print_func *print,
	394	void *arg);
3971886a	395
278bda40 AC	396	#if H_REVEALS_MODULE_P (SIM_FPU_INLINE)
	397	#include "sim-fpu.c"
	398	#endif
	399
3971886a	400	#endif