sim: bfin: use store buffer for VIT_MAX insns
[deliverable/binutils-gdb.git] / sim / common / sim-reg.c
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c906108c 1/* Generic register read/write.
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2 Copyright (C) 1998, 2007, 2008, 2009, 2010, 2011
3 Free Software Foundation, Inc.
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4 Contributed by Cygnus Solutions.
5
6This file is part of GDB, the GNU debugger.
7
8This program is free software; you can redistribute it and/or modify
9it under the terms of the GNU General Public License as published by
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10the Free Software Foundation; either version 3 of the License, or
11(at your option) any later version.
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12
13This program is distributed in the hope that it will be useful,
14but WITHOUT ANY WARRANTY; without even the implied warranty of
15MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16GNU General Public License for more details.
17
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18You should have received a copy of the GNU General Public License
19along with this program. If not, see <http://www.gnu.org/licenses/>. */
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20
21#include "sim-main.h"
22#include "sim-assert.h"
23
24/* Generic implementation of sim_fetch_register for simulators using
25 CPU_REG_FETCH.
26 The contents of BUF are in target byte order. */
27/* ??? Obviously the interface needs to be extended to handle multiple
28 cpus. */
29
30int
31sim_fetch_register (SIM_DESC sd, int rn, unsigned char *buf, int length)
32{
33 SIM_CPU *cpu = STATE_CPU (sd, 0);
34
35 SIM_ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
36 return (* CPU_REG_FETCH (cpu)) (cpu, rn, buf, length);
37}
38
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39/* Generic implementation of sim_store_register for simulators using
40 CPU_REG_STORE.
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41 The contents of BUF are in target byte order. */
42/* ??? Obviously the interface needs to be extended to handle multiple
43 cpus. */
44
45int
46sim_store_register (SIM_DESC sd, int rn, unsigned char *buf, int length)
47{
48 SIM_CPU *cpu = STATE_CPU (sd, 0);
49
50 SIM_ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
51 return (* CPU_REG_STORE (cpu)) (cpu, rn, buf, length);
52}
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