Commit | Line | Data |
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c906108c SS |
1 | /* Generic register read/write. |
2 | Copyright (C) 1998 Free Software Foundation, Inc. | |
3 | Contributed by Cygnus Solutions. | |
4 | ||
5 | This file is part of GDB, the GNU debugger. | |
6 | ||
7 | This program is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2, or (at your option) | |
10 | any later version. | |
11 | ||
12 | This program is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License along | |
18 | with this program; if not, write to the Free Software Foundation, Inc., | |
19 | 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ | |
20 | ||
21 | #include "sim-main.h" | |
22 | #include "sim-assert.h" | |
23 | ||
24 | /* Generic implementation of sim_fetch_register for simulators using | |
25 | CPU_REG_FETCH. | |
26 | The contents of BUF are in target byte order. */ | |
27 | /* ??? Obviously the interface needs to be extended to handle multiple | |
28 | cpus. */ | |
29 | ||
30 | int | |
31 | sim_fetch_register (SIM_DESC sd, int rn, unsigned char *buf, int length) | |
32 | { | |
33 | SIM_CPU *cpu = STATE_CPU (sd, 0); | |
34 | ||
35 | SIM_ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER); | |
36 | return (* CPU_REG_FETCH (cpu)) (cpu, rn, buf, length); | |
37 | } | |
38 | ||
39 | /* Generic implementation of sim_fetch_register for simulators using | |
40 | CPU_REG_FETCH. | |
41 | The contents of BUF are in target byte order. */ | |
42 | /* ??? Obviously the interface needs to be extended to handle multiple | |
43 | cpus. */ | |
44 | ||
45 | int | |
46 | sim_store_register (SIM_DESC sd, int rn, unsigned char *buf, int length) | |
47 | { | |
48 | SIM_CPU *cpu = STATE_CPU (sd, 0); | |
49 | ||
50 | SIM_ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER); | |
51 | return (* CPU_REG_STORE (cpu)) (cpu, rn, buf, length); | |
52 | } |