aarch64: Remove support for CSRE
[deliverable/binutils-gdb.git] / sim / configure.tgt
CommitLineData
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1dnl Note that this file is intended to be included at the m4 level and not
2dnl the shell level, so use sinclude(...) to pull it in.
3
4# WHEN ADDING ENTRIES TO THIS MATRIX:
5
6# Make sure that the left side always has two dashes. Otherwise you
7# can get spurious matches. Even for unambiguous cases, do this as a
8# convention, else the table becomes a real mess to understand and
9# maintain.
10
11dnl glue to avoid code duplication at top level
12m4_ifndef([SIM_ARCH], [AC_DEFUN([SIM_ARCH],[sim_arch=$1])])
13
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14sim_igen=no
15sim_arch=
16case "${target}" in
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17 aarch64*-*-*)
18 SIM_ARCH(aarch64)
19 ;;
4d393d60 20 arm*-*-*)
119da465 21 SIM_ARCH(arm)
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22 ;;
23 avr*-*-*)
24 SIM_ARCH(avr)
25 ;;
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26 bfin-*-*)
27 SIM_ARCH(bfin)
28 ;;
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29 bpf-*-*)
30 SIM_ARCH(bpf)
31 ;;
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32 cr16*-*-*)
33 SIM_ARCH(cr16)
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34 ;;
35 cris-*-* | crisv32-*-*)
36 SIM_ARCH(cris)
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37 ;;
38 d10v-*-*)
39 SIM_ARCH(d10v)
40 ;;
41 frv-*-*)
42 SIM_ARCH(frv)
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43 ;;
44 h8300*-*-*)
45 SIM_ARCH(h8300)
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46 ;;
47 iq2000-*-*)
48 SIM_ARCH(iq2000)
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49 ;;
50 lm32-*-*)
51 SIM_ARCH(lm32)
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52 ;;
53 m32c-*-*)
54 SIM_ARCH(m32c)
55 ;;
56 m32r-*-*)
57 SIM_ARCH(m32r)
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58 ;;
59 m68hc11-*-*|m6811-*-*)
60 SIM_ARCH(m68hc11)
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61 ;;
62 mcore-*-*)
63 SIM_ARCH(mcore)
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64 ;;
65 microblaze-*-*)
66 SIM_ARCH(microblaze)
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67 ;;
68 mips*-*-*)
69 SIM_ARCH(mips)
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70 sim_igen=yes
71 ;;
72 mn10300*-*-*)
73 SIM_ARCH(mn10300)
74 sim_igen=yes
75 ;;
76 moxie-*-*)
77 SIM_ARCH(moxie)
119da465 78 ;;
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79 msp430*-*-*)
80 SIM_ARCH(msp430)
81 ;;
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82 or1k-*-* | or1knd-*-*)
83 SIM_ARCH(or1k)
84 ;;
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85 pru*-*-*)
86 SIM_ARCH(pru)
87 ;;
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88 rl78-*-*)
89 SIM_ARCH(rl78)
90 ;;
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91 rx-*-*)
92 SIM_ARCH(rx)
93 ;;
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94 sh*-*-*)
95 SIM_ARCH(sh)
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96 ;;
97 sparc-*-rtems*|sparc-*-elf*)
98 SIM_ARCH(erc32)
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99 ;;
100 powerpc*-*-*)
101 SIM_ARCH(ppc)
102 ;;
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103 ft32-*-*)
104 SIM_ARCH(ft32)
f46e4eb7 105 ;;
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106 v850*-*-*)
107 SIM_ARCH(v850)
108 sim_igen=yes
119da465 109 ;;
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110esac
111AC_SUBST(sim_arch)
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