Commit | Line | Data |
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fee8ec00 | 1 | /* Simulation code for the CR16 processor. |
32d0add0 | 2 | Copyright (C) 2008-2015 Free Software Foundation, Inc. |
fee8ec00 SR |
3 | Contributed by M Ranga Swami Reddy <MR.Swami.Reddy@nsc.com> |
4 | ||
5 | This file is part of GDB, the GNU debugger. | |
6 | ||
7 | This program is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
dc3cf14f | 9 | the Free Software Foundation; either version 3, or (at your option) |
fee8ec00 SR |
10 | any later version. |
11 | ||
12 | This program is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
948b4ede SR |
17 | You should have received a copy of the GNU General Public License |
18 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ | |
fee8ec00 SR |
19 | |
20 | ||
21 | #include "config.h" | |
22 | #include <stdio.h> | |
23 | #include <ctype.h> | |
24 | #include <limits.h> | |
5aedb83b | 25 | #include <string.h> |
fee8ec00 SR |
26 | #include "ansidecl.h" |
27 | #include "opcode/cr16.h" | |
28 | ||
bdca5ee4 TT |
29 | static void write_header (void); |
30 | static void write_opcodes (void); | |
31 | static void write_template (void); | |
fee8ec00 SR |
32 | |
33 | int | |
948b4ede | 34 | main (int argc, char *argv[]) |
fee8ec00 SR |
35 | { |
36 | if ((argc > 1) && (strcmp (argv[1],"-h") == 0)) | |
37 | write_header(); | |
38 | else if ((argc > 1) && (strcmp (argv[1],"-t") == 0)) | |
39 | write_template (); | |
40 | else | |
41 | write_opcodes(); | |
42 | return 0; | |
43 | } | |
44 | ||
45 | ||
46 | static void | |
5aedb83b | 47 | write_header (void) |
fee8ec00 SR |
48 | { |
49 | int i = 0; | |
50 | ||
51 | /* Start searching from end of instruction table. */ | |
52 | const inst *instruction = &cr16_instruction[NUMOPCODES - 1]; | |
53 | ||
54 | /* Loop over instruction table until a full match is found. */ | |
55 | for ( ; i < NUMOPCODES; i++) | |
5aedb83b MF |
56 | printf("void OP_%lX_%X (void);\t\t/* %s */\n", cr16_instruction[i].match, |
57 | (32 - cr16_instruction[i].match_bits), cr16_instruction[i].mnemonic); | |
fee8ec00 SR |
58 | } |
59 | ||
60 | ||
948b4ede SR |
61 | /* write_template creates a file all required functions, |
62 | ready to be filled out. */ | |
fee8ec00 SR |
63 | |
64 | static void | |
5aedb83b | 65 | write_template (void) |
fee8ec00 SR |
66 | { |
67 | int i = 0,j, k, flags; | |
68 | ||
69 | printf ("#include \"cr16_sim.h\"\n"); | |
70 | printf ("#include \"simops.h\"\n\n"); | |
71 | ||
72 | for ( ; i < NUMOPCODES; i++) | |
73 | { | |
74 | if (cr16_instruction[i].size != 0) | |
948b4ede | 75 | { |
5aedb83b MF |
76 | printf("/* %s */\nvoid\nOP_%lX_%X ()\n{\n", cr16_instruction[i].mnemonic, |
77 | cr16_instruction[i].match, (32 - cr16_instruction[i].match_bits)); | |
948b4ede SR |
78 | |
79 | /* count operands. */ | |
80 | j = 0; | |
81 | for (k=0;k<5;k++) | |
82 | { | |
83 | if (cr16_instruction[i].operands[k].op_type == dummy) | |
fee8ec00 SR |
84 | break; |
85 | else | |
86 | j++; | |
948b4ede SR |
87 | } |
88 | switch (j) | |
89 | { | |
90 | case 0: | |
91 | printf ("printf(\" %s\\n\");\n",cr16_instruction[i].mnemonic); | |
92 | break; | |
93 | case 1: | |
94 | printf ("printf(\" %s\\t%%x\\n\",OP[0]);\n",cr16_instruction[i].mnemonic); | |
95 | break; | |
96 | case 2: | |
97 | printf ("printf(\" %s\\t%%x,%%x\\n\",OP[0],OP[1]);\n",cr16_instruction[i].mnemonic); | |
98 | break; | |
99 | case 3: | |
100 | printf ("printf(\" %s\\t%%x,%%x,%%x\\n\",OP[0],OP[1],OP[2]);\n",cr16_instruction[i].mnemonic); | |
101 | break; | |
102 | default: | |
103 | fprintf (stderr,"Too many operands: %d\n",j); | |
104 | } | |
105 | printf ("}\n\n"); | |
106 | } | |
fee8ec00 SR |
107 | } |
108 | } | |
109 | ||
110 | ||
111 | long Opcodes[512]; | |
112 | static int curop=0; | |
113 | ||
5aedb83b MF |
114 | #if 0 |
115 | static void | |
fee8ec00 SR |
116 | check_opcodes( long op) |
117 | { | |
118 | int i; | |
119 | ||
120 | for (i=0;i<curop;i++) | |
121 | if (Opcodes[i] == op) | |
5aedb83b | 122 | fprintf(stderr,"DUPLICATE OPCODES: %lx\n", op); |
fee8ec00 | 123 | } |
5aedb83b | 124 | #endif |
fee8ec00 SR |
125 | |
126 | static void | |
5aedb83b | 127 | write_opcodes (void) |
fee8ec00 SR |
128 | { |
129 | int i = 0, j = 0, k; | |
130 | ||
948b4ede | 131 | /* write out opcode table. */ |
fee8ec00 SR |
132 | printf ("#include \"cr16_sim.h\"\n"); |
133 | printf ("#include \"simops.h\"\n\n"); | |
134 | printf ("struct simops Simops[] = {\n"); | |
135 | ||
948b4ede | 136 | for (i = NUMOPCODES-1; i >= 0; --i) |
fee8ec00 SR |
137 | { |
138 | if (cr16_instruction[i].size != 0) | |
948b4ede | 139 | { |
5aedb83b | 140 | printf (" { \"%s\", %u, %d, %ld, %u, \"OP_%lX_%X\", OP_%lX_%X, ", |
fee8ec00 SR |
141 | cr16_instruction[i].mnemonic, cr16_instruction[i].size, |
142 | cr16_instruction[i].match_bits, cr16_instruction[i].match, | |
143 | cr16_instruction[i].flags, ((BIN(cr16_instruction[i].match, cr16_instruction[i].match_bits))>>(cr16_instruction[i].match_bits)), | |
948b4ede | 144 | (32 - cr16_instruction[i].match_bits), |
fee8ec00 SR |
145 | ((BIN(cr16_instruction[i].match, cr16_instruction[i].match_bits))>>(cr16_instruction[i].match_bits)), (32 - cr16_instruction[i].match_bits)); |
146 | ||
948b4ede SR |
147 | j = 0; |
148 | for (k=0;k<5;k++) | |
149 | { | |
150 | if (cr16_instruction[i].operands[k].op_type == dummy) | |
fee8ec00 SR |
151 | break; |
152 | else | |
153 | j++; | |
fee8ec00 | 154 | } |
948b4ede SR |
155 | printf ("%d, ",j); |
156 | ||
157 | j = 0; | |
158 | for (k=0;k<4;k++) | |
159 | { | |
160 | int optype = cr16_instruction[i].operands[k].op_type; | |
161 | int shift = cr16_instruction[i].operands[k].shift; | |
162 | if (j == 0) | |
163 | printf ("{"); | |
164 | else | |
165 | printf (", "); | |
166 | printf ("{"); | |
167 | printf ("%d,%d",optype, shift); | |
168 | printf ("}"); | |
169 | j = 1; | |
170 | } | |
171 | if (j) | |
172 | printf ("}"); | |
173 | printf ("},\n"); | |
174 | } | |
175 | } | |
5aedb83b | 176 | printf (" { \"NULL\",1,8,0,0,\"OP_0_20\",OP_0_20,0,{{0,0},{0,0},{0,0},{0,0}}},\n};\n"); |
fee8ec00 | 177 | } |