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fee8ec00 SR |
1 | /* Simulation code for the CR16 processor. |
2 | Copyright (C) 2008 Free Software Foundation, Inc. | |
3 | Contributed by M Ranga Swami Reddy <MR.Swami.Reddy@nsc.com> | |
4 | ||
5 | This file is part of GDB, the GNU debugger. | |
6 | ||
7 | This program is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 3, or (at your option) | |
10 | any later version. | |
11 | ||
12 | This program is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License along | |
18 | with this program. If not, see <http://www.gnu.org/licenses/>. */ | |
19 | ||
20 | ||
21 | #include "config.h" | |
22 | #include <stdio.h> | |
23 | #include <ctype.h> | |
24 | #include <limits.h> | |
25 | #include "ansidecl.h" | |
26 | #include "opcode/cr16.h" | |
27 | ||
28 | static void write_header PARAMS ((void)); | |
29 | static void write_opcodes PARAMS ((void)); | |
30 | static void write_template PARAMS ((void)); | |
31 | ||
32 | int | |
33 | main (argc, argv) | |
34 | int argc; | |
35 | char *argv[]; | |
36 | { | |
37 | if ((argc > 1) && (strcmp (argv[1],"-h") == 0)) | |
38 | write_header(); | |
39 | else if ((argc > 1) && (strcmp (argv[1],"-t") == 0)) | |
40 | write_template (); | |
41 | else | |
42 | write_opcodes(); | |
43 | return 0; | |
44 | } | |
45 | ||
46 | ||
47 | static void | |
48 | write_header () | |
49 | { | |
50 | int i = 0; | |
51 | ||
52 | /* Start searching from end of instruction table. */ | |
53 | const inst *instruction = &cr16_instruction[NUMOPCODES - 1]; | |
54 | ||
55 | /* Loop over instruction table until a full match is found. */ | |
56 | for ( ; i < NUMOPCODES; i++) | |
57 | { | |
58 | printf("void OP_%X_%X PARAMS ((void));\t\t/* %s */\n",cr16_instruction[i].match, (32 - cr16_instruction[i].match_bits), cr16_instruction[i].mnemonic); | |
59 | } | |
60 | } | |
61 | ||
62 | ||
63 | /* write_template creates a file all required functions, ready */ | |
64 | /* to be filled out */ | |
65 | ||
66 | static void | |
67 | write_template () | |
68 | { | |
69 | int i = 0,j, k, flags; | |
70 | ||
71 | printf ("#include \"cr16_sim.h\"\n"); | |
72 | printf ("#include \"simops.h\"\n\n"); | |
73 | ||
74 | for ( ; i < NUMOPCODES; i++) | |
75 | { | |
76 | if (cr16_instruction[i].size != 0) | |
77 | { | |
78 | printf("/* %s */\nvoid\nOP_%X_%X ()\n{\n",cr16_instruction[i].mnemonic,cr16_instruction[i].match,(32 - cr16_instruction[i].match_bits)); | |
79 | ||
80 | /* count operands */ | |
81 | j = 0; | |
82 | for (k=0;k<5;k++) | |
83 | { | |
84 | if (cr16_instruction[i].operands[k].op_type == dummy) | |
85 | break; | |
86 | else | |
87 | j++; | |
88 | } | |
89 | switch (j) | |
90 | { | |
91 | case 0: | |
92 | printf ("printf(\" %s\\n\");\n",cr16_instruction[i].mnemonic); | |
93 | break; | |
94 | case 1: | |
95 | printf ("printf(\" %s\\t%%x\\n\",OP[0]);\n",cr16_instruction[i].mnemonic); | |
96 | break; | |
97 | case 2: | |
98 | printf ("printf(\" %s\\t%%x,%%x\\n\",OP[0],OP[1]);\n",cr16_instruction[i].mnemonic); | |
99 | break; | |
100 | case 3: | |
101 | printf ("printf(\" %s\\t%%x,%%x,%%x\\n\",OP[0],OP[1],OP[2]);\n",cr16_instruction[i].mnemonic); | |
102 | break; | |
103 | default: | |
104 | fprintf (stderr,"Too many operands: %d\n",j); | |
105 | } | |
106 | printf ("}\n\n"); | |
107 | } | |
108 | } | |
109 | } | |
110 | ||
111 | ||
112 | long Opcodes[512]; | |
113 | static int curop=0; | |
114 | ||
115 | check_opcodes( long op) | |
116 | { | |
117 | int i; | |
118 | ||
119 | for (i=0;i<curop;i++) | |
120 | if (Opcodes[i] == op) | |
121 | fprintf(stderr,"DUPLICATE OPCODES: %x\n",op); | |
122 | } | |
123 | ||
124 | ||
125 | static void | |
126 | write_opcodes () | |
127 | { | |
128 | int i = 0, j = 0, k; | |
129 | ||
130 | unsigned long mask; | |
131 | /* write out opcode table */ | |
132 | printf ("#include \"cr16_sim.h\"\n"); | |
133 | printf ("#include \"simops.h\"\n\n"); | |
134 | printf ("struct simops Simops[] = {\n"); | |
135 | ||
136 | for ( ; i < NUMOPCODES; i++) | |
137 | { | |
138 | if (cr16_instruction[i].size != 0) | |
139 | { | |
140 | printf (" { \"%s\", %ld, %d, %d, %d, \"OP_%X_%X\", OP_%X_%X, ", | |
141 | cr16_instruction[i].mnemonic, cr16_instruction[i].size, | |
142 | cr16_instruction[i].match_bits, cr16_instruction[i].match, | |
143 | cr16_instruction[i].flags, ((BIN(cr16_instruction[i].match, cr16_instruction[i].match_bits))>>(cr16_instruction[i].match_bits)), | |
144 | (32 - cr16_instruction[i].match_bits), | |
145 | ((BIN(cr16_instruction[i].match, cr16_instruction[i].match_bits))>>(cr16_instruction[i].match_bits)), (32 - cr16_instruction[i].match_bits)); | |
146 | ||
147 | j = 0; | |
148 | for (k=0;k<5;k++) | |
149 | { | |
150 | if (cr16_instruction[i].operands[k].op_type == dummy) | |
151 | break; | |
152 | else | |
153 | j++; | |
154 | } | |
155 | printf ("%d, ",j); | |
156 | ||
157 | j = 0; | |
158 | for (k=0;k<4;k++) | |
159 | { | |
160 | int flags = cr16_instruction[i].operands[k].op_type; | |
161 | int match_bits = cr16_instruction[i].operands[k].shift; | |
162 | { | |
163 | if (j == 0) | |
164 | printf ("{"); | |
165 | else | |
166 | printf (", "); | |
167 | // if (cr16_instruction[i].size == 2) | |
168 | // match_bits += 15; | |
169 | printf ("{"); | |
170 | printf ("%d,%d",cr16_instruction[i].operands[k].shift,flags); | |
171 | printf ("}"); | |
172 | j = 1; | |
173 | } | |
174 | } | |
175 | if (j) | |
176 | printf ("}"); | |
177 | printf ("},\n"); | |
178 | } | |
179 | } | |
180 | //printf (" { 0,0,0,0,(void (*)(void))0,0,{0,0,0}},\n};\n"); | |
181 | printf (" { \"NULL\",1,8,0,0,\"OP_0_20\",OP_0_20,0,{0,0,0}},\n};\n"); | |
182 | } |