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sim: bfin: add missing GPIO pin 15
[deliverable/binutils-gdb.git] / sim / cris / semcrisv10f-switch.c
CommitLineData
f6bcefef
HPN		 1/* Simulator instruction semantics for crisv10f.
2
3THIS FILE IS MACHINE GENERATED WITH CGEN.
4
0f51e9bf 5Copyright 1996-2010 Free Software Foundation, Inc.
f6bcefef
HPN		 6
7This file is part of the GNU simulators.
8
c9b3544a
HPN		 9 This file is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3, or (at your option)
12 any later version.
f6bcefef 13
c9b3544a
HPN		 14 It is distributed in the hope that it will be useful, but WITHOUT
15 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
16 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
17 License for more details.
f6bcefef 18
c9b3544a
HPN		 19 You should have received a copy of the GNU General Public License along
20 with this program; if not, write to the Free Software Foundation, Inc.,
21 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
f6bcefef
HPN		 22
23*/
24
25#ifdef DEFINE_LABELS
26
27 /* The labels have the case they have because the enum of insn types
28 is all uppercase and in the non-stdc case the insn symbol is built
29 into the enum name. */
30
31 static struct {
32 int index;
33 void *label;
34 } labels[] = {
35 { CRISV10F_INSN_X_INVALID, && case_sem_INSN_X_INVALID },
36 { CRISV10F_INSN_X_AFTER, && case_sem_INSN_X_AFTER },
37 { CRISV10F_INSN_X_BEFORE, && case_sem_INSN_X_BEFORE },
38 { CRISV10F_INSN_X_CTI_CHAIN, && case_sem_INSN_X_CTI_CHAIN },
39 { CRISV10F_INSN_X_CHAIN, && case_sem_INSN_X_CHAIN },
40 { CRISV10F_INSN_X_BEGIN, && case_sem_INSN_X_BEGIN },
41 { CRISV10F_INSN_NOP, && case_sem_INSN_NOP },
42 { CRISV10F_INSN_MOVE_B_R, && case_sem_INSN_MOVE_B_R },
43 { CRISV10F_INSN_MOVE_W_R, && case_sem_INSN_MOVE_W_R },
44 { CRISV10F_INSN_MOVE_D_R, && case_sem_INSN_MOVE_D_R },
45 { CRISV10F_INSN_MOVEPCR, && case_sem_INSN_MOVEPCR },
46 { CRISV10F_INSN_MOVEQ, && case_sem_INSN_MOVEQ },
47 { CRISV10F_INSN_MOVS_B_R, && case_sem_INSN_MOVS_B_R },
48 { CRISV10F_INSN_MOVS_W_R, && case_sem_INSN_MOVS_W_R },
49 { CRISV10F_INSN_MOVU_B_R, && case_sem_INSN_MOVU_B_R },
50 { CRISV10F_INSN_MOVU_W_R, && case_sem_INSN_MOVU_W_R },
51 { CRISV10F_INSN_MOVECBR, && case_sem_INSN_MOVECBR },
52 { CRISV10F_INSN_MOVECWR, && case_sem_INSN_MOVECWR },
53 { CRISV10F_INSN_MOVECDR, && case_sem_INSN_MOVECDR },
54 { CRISV10F_INSN_MOVSCBR, && case_sem_INSN_MOVSCBR },
55 { CRISV10F_INSN_MOVSCWR, && case_sem_INSN_MOVSCWR },
56 { CRISV10F_INSN_MOVUCBR, && case_sem_INSN_MOVUCBR },
57 { CRISV10F_INSN_MOVUCWR, && case_sem_INSN_MOVUCWR },
58 { CRISV10F_INSN_ADDQ, && case_sem_INSN_ADDQ },
59 { CRISV10F_INSN_SUBQ, && case_sem_INSN_SUBQ },
60 { CRISV10F_INSN_CMP_R_B_R, && case_sem_INSN_CMP_R_B_R },
61 { CRISV10F_INSN_CMP_R_W_R, && case_sem_INSN_CMP_R_W_R },
62 { CRISV10F_INSN_CMP_R_D_R, && case_sem_INSN_CMP_R_D_R },
63 { CRISV10F_INSN_CMP_M_B_M, && case_sem_INSN_CMP_M_B_M },
64 { CRISV10F_INSN_CMP_M_W_M, && case_sem_INSN_CMP_M_W_M },
65 { CRISV10F_INSN_CMP_M_D_M, && case_sem_INSN_CMP_M_D_M },
66 { CRISV10F_INSN_CMPCBR, && case_sem_INSN_CMPCBR },
67 { CRISV10F_INSN_CMPCWR, && case_sem_INSN_CMPCWR },
68 { CRISV10F_INSN_CMPCDR, && case_sem_INSN_CMPCDR },
69 { CRISV10F_INSN_CMPQ, && case_sem_INSN_CMPQ },
70 { CRISV10F_INSN_CMPS_M_B_M, && case_sem_INSN_CMPS_M_B_M },
71 { CRISV10F_INSN_CMPS_M_W_M, && case_sem_INSN_CMPS_M_W_M },
72 { CRISV10F_INSN_CMPSCBR, && case_sem_INSN_CMPSCBR },
73 { CRISV10F_INSN_CMPSCWR, && case_sem_INSN_CMPSCWR },
74 { CRISV10F_INSN_CMPU_M_B_M, && case_sem_INSN_CMPU_M_B_M },
75 { CRISV10F_INSN_CMPU_M_W_M, && case_sem_INSN_CMPU_M_W_M },
76 { CRISV10F_INSN_CMPUCBR, && case_sem_INSN_CMPUCBR },
77 { CRISV10F_INSN_CMPUCWR, && case_sem_INSN_CMPUCWR },
78 { CRISV10F_INSN_MOVE_M_B_M, && case_sem_INSN_MOVE_M_B_M },
79 { CRISV10F_INSN_MOVE_M_W_M, && case_sem_INSN_MOVE_M_W_M },
80 { CRISV10F_INSN_MOVE_M_D_M, && case_sem_INSN_MOVE_M_D_M },
81 { CRISV10F_INSN_MOVS_M_B_M, && case_sem_INSN_MOVS_M_B_M },
82 { CRISV10F_INSN_MOVS_M_W_M, && case_sem_INSN_MOVS_M_W_M },
83 { CRISV10F_INSN_MOVU_M_B_M, && case_sem_INSN_MOVU_M_B_M },
84 { CRISV10F_INSN_MOVU_M_W_M, && case_sem_INSN_MOVU_M_W_M },
85 { CRISV10F_INSN_MOVE_R_SPRV10, && case_sem_INSN_MOVE_R_SPRV10 },
86 { CRISV10F_INSN_MOVE_SPR_RV10, && case_sem_INSN_MOVE_SPR_RV10 },
87 { CRISV10F_INSN_RET_TYPE, && case_sem_INSN_RET_TYPE },
88 { CRISV10F_INSN_MOVE_M_SPRV10, && case_sem_INSN_MOVE_M_SPRV10 },
f6bcefef 89 { CRISV10F_INSN_MOVE_C_SPRV10_P5, && case_sem_INSN_MOVE_C_SPRV10_P5 },
f6bcefef
HPN		 90 { CRISV10F_INSN_MOVE_C_SPRV10_P9, && case_sem_INSN_MOVE_C_SPRV10_P9 },
91 { CRISV10F_INSN_MOVE_C_SPRV10_P10, && case_sem_INSN_MOVE_C_SPRV10_P10 },
92 { CRISV10F_INSN_MOVE_C_SPRV10_P11, && case_sem_INSN_MOVE_C_SPRV10_P11 },
93 { CRISV10F_INSN_MOVE_C_SPRV10_P12, && case_sem_INSN_MOVE_C_SPRV10_P12 },
94 { CRISV10F_INSN_MOVE_C_SPRV10_P13, && case_sem_INSN_MOVE_C_SPRV10_P13 },
95 { CRISV10F_INSN_MOVE_C_SPRV10_P7, && case_sem_INSN_MOVE_C_SPRV10_P7 },
96 { CRISV10F_INSN_MOVE_C_SPRV10_P14, && case_sem_INSN_MOVE_C_SPRV10_P14 },
97 { CRISV10F_INSN_MOVE_C_SPRV10_P15, && case_sem_INSN_MOVE_C_SPRV10_P15 },
98 { CRISV10F_INSN_MOVE_SPR_MV10, && case_sem_INSN_MOVE_SPR_MV10 },
99 { CRISV10F_INSN_SBFS, && case_sem_INSN_SBFS },
100 { CRISV10F_INSN_MOVEM_R_M, && case_sem_INSN_MOVEM_R_M },
101 { CRISV10F_INSN_MOVEM_M_R, && case_sem_INSN_MOVEM_M_R },
102 { CRISV10F_INSN_MOVEM_M_PC, && case_sem_INSN_MOVEM_M_PC },
103 { CRISV10F_INSN_ADD_B_R, && case_sem_INSN_ADD_B_R },
104 { CRISV10F_INSN_ADD_W_R, && case_sem_INSN_ADD_W_R },
105 { CRISV10F_INSN_ADD_D_R, && case_sem_INSN_ADD_D_R },
106 { CRISV10F_INSN_ADD_M_B_M, && case_sem_INSN_ADD_M_B_M },
107 { CRISV10F_INSN_ADD_M_W_M, && case_sem_INSN_ADD_M_W_M },
108 { CRISV10F_INSN_ADD_M_D_M, && case_sem_INSN_ADD_M_D_M },
109 { CRISV10F_INSN_ADDCBR, && case_sem_INSN_ADDCBR },
110 { CRISV10F_INSN_ADDCWR, && case_sem_INSN_ADDCWR },
111 { CRISV10F_INSN_ADDCDR, && case_sem_INSN_ADDCDR },
112 { CRISV10F_INSN_ADDCPC, && case_sem_INSN_ADDCPC },
113 { CRISV10F_INSN_ADDS_B_R, && case_sem_INSN_ADDS_B_R },
114 { CRISV10F_INSN_ADDS_W_R, && case_sem_INSN_ADDS_W_R },
115 { CRISV10F_INSN_ADDS_M_B_M, && case_sem_INSN_ADDS_M_B_M },
116 { CRISV10F_INSN_ADDS_M_W_M, && case_sem_INSN_ADDS_M_W_M },
117 { CRISV10F_INSN_ADDSCBR, && case_sem_INSN_ADDSCBR },
118 { CRISV10F_INSN_ADDSCWR, && case_sem_INSN_ADDSCWR },
119 { CRISV10F_INSN_ADDSPCPC, && case_sem_INSN_ADDSPCPC },
120 { CRISV10F_INSN_ADDU_B_R, && case_sem_INSN_ADDU_B_R },
121 { CRISV10F_INSN_ADDU_W_R, && case_sem_INSN_ADDU_W_R },
122 { CRISV10F_INSN_ADDU_M_B_M, && case_sem_INSN_ADDU_M_B_M },
123 { CRISV10F_INSN_ADDU_M_W_M, && case_sem_INSN_ADDU_M_W_M },
124 { CRISV10F_INSN_ADDUCBR, && case_sem_INSN_ADDUCBR },
125 { CRISV10F_INSN_ADDUCWR, && case_sem_INSN_ADDUCWR },
126 { CRISV10F_INSN_SUB_B_R, && case_sem_INSN_SUB_B_R },
127 { CRISV10F_INSN_SUB_W_R, && case_sem_INSN_SUB_W_R },
128 { CRISV10F_INSN_SUB_D_R, && case_sem_INSN_SUB_D_R },
129 { CRISV10F_INSN_SUB_M_B_M, && case_sem_INSN_SUB_M_B_M },
130 { CRISV10F_INSN_SUB_M_W_M, && case_sem_INSN_SUB_M_W_M },
131 { CRISV10F_INSN_SUB_M_D_M, && case_sem_INSN_SUB_M_D_M },
132 { CRISV10F_INSN_SUBCBR, && case_sem_INSN_SUBCBR },
133 { CRISV10F_INSN_SUBCWR, && case_sem_INSN_SUBCWR },
134 { CRISV10F_INSN_SUBCDR, && case_sem_INSN_SUBCDR },
135 { CRISV10F_INSN_SUBS_B_R, && case_sem_INSN_SUBS_B_R },
136 { CRISV10F_INSN_SUBS_W_R, && case_sem_INSN_SUBS_W_R },
137 { CRISV10F_INSN_SUBS_M_B_M, && case_sem_INSN_SUBS_M_B_M },
138 { CRISV10F_INSN_SUBS_M_W_M, && case_sem_INSN_SUBS_M_W_M },
139 { CRISV10F_INSN_SUBSCBR, && case_sem_INSN_SUBSCBR },
140 { CRISV10F_INSN_SUBSCWR, && case_sem_INSN_SUBSCWR },
141 { CRISV10F_INSN_SUBU_B_R, && case_sem_INSN_SUBU_B_R },
142 { CRISV10F_INSN_SUBU_W_R, && case_sem_INSN_SUBU_W_R },
143 { CRISV10F_INSN_SUBU_M_B_M, && case_sem_INSN_SUBU_M_B_M },
144 { CRISV10F_INSN_SUBU_M_W_M, && case_sem_INSN_SUBU_M_W_M },
145 { CRISV10F_INSN_SUBUCBR, && case_sem_INSN_SUBUCBR },
146 { CRISV10F_INSN_SUBUCWR, && case_sem_INSN_SUBUCWR },
147 { CRISV10F_INSN_ADDI_B_R, && case_sem_INSN_ADDI_B_R },
148 { CRISV10F_INSN_ADDI_W_R, && case_sem_INSN_ADDI_W_R },
149 { CRISV10F_INSN_ADDI_D_R, && case_sem_INSN_ADDI_D_R },
150 { CRISV10F_INSN_NEG_B_R, && case_sem_INSN_NEG_B_R },
151 { CRISV10F_INSN_NEG_W_R, && case_sem_INSN_NEG_W_R },
152 { CRISV10F_INSN_NEG_D_R, && case_sem_INSN_NEG_D_R },
153 { CRISV10F_INSN_TEST_M_B_M, && case_sem_INSN_TEST_M_B_M },
154 { CRISV10F_INSN_TEST_M_W_M, && case_sem_INSN_TEST_M_W_M },
155 { CRISV10F_INSN_TEST_M_D_M, && case_sem_INSN_TEST_M_D_M },
156 { CRISV10F_INSN_MOVE_R_M_B_M, && case_sem_INSN_MOVE_R_M_B_M },
157 { CRISV10F_INSN_MOVE_R_M_W_M, && case_sem_INSN_MOVE_R_M_W_M },
158 { CRISV10F_INSN_MOVE_R_M_D_M, && case_sem_INSN_MOVE_R_M_D_M },
159 { CRISV10F_INSN_MULS_B, && case_sem_INSN_MULS_B },
160 { CRISV10F_INSN_MULS_W, && case_sem_INSN_MULS_W },
161 { CRISV10F_INSN_MULS_D, && case_sem_INSN_MULS_D },
162 { CRISV10F_INSN_MULU_B, && case_sem_INSN_MULU_B },
163 { CRISV10F_INSN_MULU_W, && case_sem_INSN_MULU_W },
164 { CRISV10F_INSN_MULU_D, && case_sem_INSN_MULU_D },
165 { CRISV10F_INSN_MSTEP, && case_sem_INSN_MSTEP },
166 { CRISV10F_INSN_DSTEP, && case_sem_INSN_DSTEP },
167 { CRISV10F_INSN_ABS, && case_sem_INSN_ABS },
168 { CRISV10F_INSN_AND_B_R, && case_sem_INSN_AND_B_R },
169 { CRISV10F_INSN_AND_W_R, && case_sem_INSN_AND_W_R },
170 { CRISV10F_INSN_AND_D_R, && case_sem_INSN_AND_D_R },
171 { CRISV10F_INSN_AND_M_B_M, && case_sem_INSN_AND_M_B_M },
172 { CRISV10F_INSN_AND_M_W_M, && case_sem_INSN_AND_M_W_M },
173 { CRISV10F_INSN_AND_M_D_M, && case_sem_INSN_AND_M_D_M },
174 { CRISV10F_INSN_ANDCBR, && case_sem_INSN_ANDCBR },
175 { CRISV10F_INSN_ANDCWR, && case_sem_INSN_ANDCWR },
176 { CRISV10F_INSN_ANDCDR, && case_sem_INSN_ANDCDR },
177 { CRISV10F_INSN_ANDQ, && case_sem_INSN_ANDQ },
178 { CRISV10F_INSN_ORR_B_R, && case_sem_INSN_ORR_B_R },
179 { CRISV10F_INSN_ORR_W_R, && case_sem_INSN_ORR_W_R },
180 { CRISV10F_INSN_ORR_D_R, && case_sem_INSN_ORR_D_R },
181 { CRISV10F_INSN_OR_M_B_M, && case_sem_INSN_OR_M_B_M },
182 { CRISV10F_INSN_OR_M_W_M, && case_sem_INSN_OR_M_W_M },
183 { CRISV10F_INSN_OR_M_D_M, && case_sem_INSN_OR_M_D_M },
184 { CRISV10F_INSN_ORCBR, && case_sem_INSN_ORCBR },
185 { CRISV10F_INSN_ORCWR, && case_sem_INSN_ORCWR },
186 { CRISV10F_INSN_ORCDR, && case_sem_INSN_ORCDR },
187 { CRISV10F_INSN_ORQ, && case_sem_INSN_ORQ },
188 { CRISV10F_INSN_XOR, && case_sem_INSN_XOR },
189 { CRISV10F_INSN_SWAP, && case_sem_INSN_SWAP },
190 { CRISV10F_INSN_ASRR_B_R, && case_sem_INSN_ASRR_B_R },
191 { CRISV10F_INSN_ASRR_W_R, && case_sem_INSN_ASRR_W_R },
192 { CRISV10F_INSN_ASRR_D_R, && case_sem_INSN_ASRR_D_R },
193 { CRISV10F_INSN_ASRQ, && case_sem_INSN_ASRQ },
194 { CRISV10F_INSN_LSRR_B_R, && case_sem_INSN_LSRR_B_R },
195 { CRISV10F_INSN_LSRR_W_R, && case_sem_INSN_LSRR_W_R },
196 { CRISV10F_INSN_LSRR_D_R, && case_sem_INSN_LSRR_D_R },
197 { CRISV10F_INSN_LSRQ, && case_sem_INSN_LSRQ },
198 { CRISV10F_INSN_LSLR_B_R, && case_sem_INSN_LSLR_B_R },
199 { CRISV10F_INSN_LSLR_W_R, && case_sem_INSN_LSLR_W_R },
200 { CRISV10F_INSN_LSLR_D_R, && case_sem_INSN_LSLR_D_R },
201 { CRISV10F_INSN_LSLQ, && case_sem_INSN_LSLQ },
202 { CRISV10F_INSN_BTST, && case_sem_INSN_BTST },
203 { CRISV10F_INSN_BTSTQ, && case_sem_INSN_BTSTQ },
204 { CRISV10F_INSN_SETF, && case_sem_INSN_SETF },
205 { CRISV10F_INSN_CLEARF, && case_sem_INSN_CLEARF },
206 { CRISV10F_INSN_BCC_B, && case_sem_INSN_BCC_B },
207 { CRISV10F_INSN_BA_B, && case_sem_INSN_BA_B },
208 { CRISV10F_INSN_BCC_W, && case_sem_INSN_BCC_W },
209 { CRISV10F_INSN_BA_W, && case_sem_INSN_BA_W },
210 { CRISV10F_INSN_JUMP_R, && case_sem_INSN_JUMP_R },
211 { CRISV10F_INSN_JUMP_M, && case_sem_INSN_JUMP_M },
212 { CRISV10F_INSN_JUMP_C, && case_sem_INSN_JUMP_C },
213 { CRISV10F_INSN_BREAK, && case_sem_INSN_BREAK },
214 { CRISV10F_INSN_BOUND_R_B_R, && case_sem_INSN_BOUND_R_B_R },
215 { CRISV10F_INSN_BOUND_R_W_R, && case_sem_INSN_BOUND_R_W_R },
216 { CRISV10F_INSN_BOUND_R_D_R, && case_sem_INSN_BOUND_R_D_R },
217 { CRISV10F_INSN_BOUND_M_B_M, && case_sem_INSN_BOUND_M_B_M },
218 { CRISV10F_INSN_BOUND_M_W_M, && case_sem_INSN_BOUND_M_W_M },
219 { CRISV10F_INSN_BOUND_M_D_M, && case_sem_INSN_BOUND_M_D_M },
220 { CRISV10F_INSN_BOUND_CB, && case_sem_INSN_BOUND_CB },
221 { CRISV10F_INSN_BOUND_CW, && case_sem_INSN_BOUND_CW },
222 { CRISV10F_INSN_BOUND_CD, && case_sem_INSN_BOUND_CD },
223 { CRISV10F_INSN_SCC, && case_sem_INSN_SCC },
224 { CRISV10F_INSN_LZ, && case_sem_INSN_LZ },
225 { CRISV10F_INSN_ADDOQ, && case_sem_INSN_ADDOQ },
226 { CRISV10F_INSN_BDAPQPC, && case_sem_INSN_BDAPQPC },
392753ae
HPN		 227 { CRISV10F_INSN_BDAP_32_PC, && case_sem_INSN_BDAP_32_PC },
228 { CRISV10F_INSN_MOVE_M_PCPLUS_P0, && case_sem_INSN_MOVE_M_PCPLUS_P0 },
229 { CRISV10F_INSN_MOVE_M_SPPLUS_P8, && case_sem_INSN_MOVE_M_SPPLUS_P8 },
f6bcefef
HPN		 230 { CRISV10F_INSN_ADDO_M_B_M, && case_sem_INSN_ADDO_M_B_M },
231 { CRISV10F_INSN_ADDO_M_W_M, && case_sem_INSN_ADDO_M_W_M },
232 { CRISV10F_INSN_ADDO_M_D_M, && case_sem_INSN_ADDO_M_D_M },
233 { CRISV10F_INSN_ADDO_CB, && case_sem_INSN_ADDO_CB },
234 { CRISV10F_INSN_ADDO_CW, && case_sem_INSN_ADDO_CW },
235 { CRISV10F_INSN_ADDO_CD, && case_sem_INSN_ADDO_CD },
236 { CRISV10F_INSN_DIP_M, && case_sem_INSN_DIP_M },
237 { CRISV10F_INSN_DIP_C, && case_sem_INSN_DIP_C },
238 { CRISV10F_INSN_ADDI_ACR_B_R, && case_sem_INSN_ADDI_ACR_B_R },
239 { CRISV10F_INSN_ADDI_ACR_W_R, && case_sem_INSN_ADDI_ACR_W_R },
240 { CRISV10F_INSN_ADDI_ACR_D_R, && case_sem_INSN_ADDI_ACR_D_R },
241 { CRISV10F_INSN_BIAP_PC_B_R, && case_sem_INSN_BIAP_PC_B_R },
242 { CRISV10F_INSN_BIAP_PC_W_R, && case_sem_INSN_BIAP_PC_W_R },
243 { CRISV10F_INSN_BIAP_PC_D_R, && case_sem_INSN_BIAP_PC_D_R },
244 { 0, 0 }
245 };
246 int i;
247
248 for (i = 0; labels[i].label != 0; ++i)
249 {
250#if FAST_P
251 CPU_IDESC (current_cpu) [labels[i].index].sem_fast_lab = labels[i].label;
252#else
253 CPU_IDESC (current_cpu) [labels[i].index].sem_full_lab = labels[i].label;
254#endif
255 }
256
257#undef DEFINE_LABELS
258#endif /* DEFINE_LABELS */
259
260#ifdef DEFINE_SWITCH
261
262/* If hyper-fast [well not unnecessarily slow] execution is selected, turn
263 off frills like tracing and profiling. */
264/* FIXME: A better way would be to have TRACE_RESULT check for something
265 that can cause it to be optimized out. Another way would be to emit
266 special handlers into the instruction "stream". */
267
268#if FAST_P
269#undef TRACE_RESULT
270#define TRACE_RESULT(cpu, abuf, name, type, val)
271#endif
272
273#undef GET_ATTR
f6bcefef 274#define GET_ATTR(cpu, num, attr) CGEN_ATTR_VALUE (NULL, abuf->idesc->attrs, CGEN_INSN_##attr)
f6bcefef
HPN		 275
276{
277
278#if WITH_SCACHE_PBB
279
280/* Branch to next handler without going around main loop. */
281#define NEXT(vpc) goto * SEM_ARGBUF (vpc) -> semantic.sem_case
282SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
283
284#else /* ! WITH_SCACHE_PBB */
285
286#define NEXT(vpc) BREAK (sem)
287#ifdef __GNUC__
288#if FAST_P
289 SWITCH (sem, SEM_ARGBUF (sc) -> idesc->sem_fast_lab)
290#else
291 SWITCH (sem, SEM_ARGBUF (sc) -> idesc->sem_full_lab)
292#endif
293#else
294 SWITCH (sem, SEM_ARGBUF (sc) -> idesc->num)
295#endif
296
297#endif /* ! WITH_SCACHE_PBB */
298
299 {
300
301 CASE (sem, INSN_X_INVALID) : /* --invalid-- */
302{
303 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
304 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2310652a 305#define FLD(f) abuf->fields.sfmt_empty.f
f6bcefef
HPN		 306 int UNUSED written = 0;
307 IADDR UNUSED pc = abuf->addr;
308 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
309
310 {
311 /* Update the recorded pc in the cpu state struct.
312 Only necessary for WITH_SCACHE case, but to avoid the
313 conditional compilation .... */
314 SET_H_PC (pc);
315 /* Virtual insns have zero size. Overwrite vpc with address of next insn
316 using the default-insn-bitsize spec. When executing insns in parallel
317 we may want to queue the fault and continue execution. */
318 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
319 vpc = sim_engine_invalid_insn (current_cpu, pc, vpc);
320 }
321
322#undef FLD
323}
324 NEXT (vpc);
325
326 CASE (sem, INSN_X_AFTER) : /* --after-- */
327{
328 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
329 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2310652a 330#define FLD(f) abuf->fields.sfmt_empty.f
f6bcefef
HPN		 331 int UNUSED written = 0;
332 IADDR UNUSED pc = abuf->addr;
333 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
334
335 {
336#if WITH_SCACHE_PBB_CRISV10F
337 crisv10f_pbb_after (current_cpu, sem_arg);
338#endif
339 }
340
341#undef FLD
342}
343 NEXT (vpc);
344
345 CASE (sem, INSN_X_BEFORE) : /* --before-- */
346{
347 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
348 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2310652a 349#define FLD(f) abuf->fields.sfmt_empty.f
f6bcefef
HPN		 350 int UNUSED written = 0;
351 IADDR UNUSED pc = abuf->addr;
352 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
353
354 {
355#if WITH_SCACHE_PBB_CRISV10F
356 crisv10f_pbb_before (current_cpu, sem_arg);
357#endif
358 }
359
360#undef FLD
361}
362 NEXT (vpc);
363
364 CASE (sem, INSN_X_CTI_CHAIN) : /* --cti-chain-- */
365{
366 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
367 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2310652a 368#define FLD(f) abuf->fields.sfmt_empty.f
f6bcefef
HPN		 369 int UNUSED written = 0;
370 IADDR UNUSED pc = abuf->addr;
371 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
372
373 {
374#if WITH_SCACHE_PBB_CRISV10F
375#ifdef DEFINE_SWITCH
376 vpc = crisv10f_pbb_cti_chain (current_cpu, sem_arg,
377 pbb_br_type, pbb_br_npc);
378 BREAK (sem);
379#else
380 /* FIXME: Allow provision of explicit ifmt spec in insn spec. */
381 vpc = crisv10f_pbb_cti_chain (current_cpu, sem_arg,
382 CPU_PBB_BR_TYPE (current_cpu),
383 CPU_PBB_BR_NPC (current_cpu));
384#endif
385#endif
386 }
387
388#undef FLD
389}
390 NEXT (vpc);
391
392 CASE (sem, INSN_X_CHAIN) : /* --chain-- */
393{
394 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
395 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2310652a 396#define FLD(f) abuf->fields.sfmt_empty.f
f6bcefef
HPN		 397 int UNUSED written = 0;
398 IADDR UNUSED pc = abuf->addr;
399 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
400
401 {
402#if WITH_SCACHE_PBB_CRISV10F
403 vpc = crisv10f_pbb_chain (current_cpu, sem_arg);
404#ifdef DEFINE_SWITCH
405 BREAK (sem);
406#endif
407#endif
408 }
409
410#undef FLD
411}
412 NEXT (vpc);
413
414 CASE (sem, INSN_X_BEGIN) : /* --begin-- */
415{
416 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
417 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2310652a 418#define FLD(f) abuf->fields.sfmt_empty.f
f6bcefef
HPN		 419 int UNUSED written = 0;
420 IADDR UNUSED pc = abuf->addr;
421 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
422
423 {
424#if WITH_SCACHE_PBB_CRISV10F
425#if defined DEFINE_SWITCH || defined FAST_P
426 /* In the switch case FAST_P is a constant, allowing several optimizations
427 in any called inline functions. */
428 vpc = crisv10f_pbb_begin (current_cpu, FAST_P);
429#else
430#if 0 /* cgen engine can't handle dynamic fast/full switching yet. */
431 vpc = crisv10f_pbb_begin (current_cpu, STATE_RUN_FAST_P (CPU_STATE (current_cpu)));
432#else
433 vpc = crisv10f_pbb_begin (current_cpu, 0);
434#endif
435#endif
436#endif
437 }
438
439#undef FLD
440}
441 NEXT (vpc);
442
443 CASE (sem, INSN_NOP) : /* nop */
444{
445 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
446 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2310652a 447#define FLD(f) abuf->fields.sfmt_empty.f
f6bcefef
HPN		 448 int UNUSED written = 0;
449 IADDR UNUSED pc = abuf->addr;
450 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
451
452{
453 {
454 BI opval = 0;
455 CPU (h_xbit) = opval;
456 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
457 }
458 {
459 BI opval = 0;
460 SET_H_INSN_PREFIXED_P (opval);
461 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
462 }
463}
464
465#undef FLD
466}
467 NEXT (vpc);
468
469 CASE (sem, INSN_MOVE_B_R) : /* move.b move.m ${Rs},${Rd} */
470{
471 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
472 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
473#define FLD(f) abuf->fields.sfmt_add_b_r.f
474 int UNUSED written = 0;
475 IADDR UNUSED pc = abuf->addr;
476 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
477
478{
479 QI tmp_newval;
480 tmp_newval = GET_H_GR (FLD (f_operand1));
481{
482 SI tmp_oldregval;
483 tmp_oldregval = GET_H_RAW_GR_PC (FLD (f_operand2));
484 {
485 SI opval = ORSI (ANDSI (tmp_newval, 255), ANDSI (tmp_oldregval, 0xffffff00));
486 SET_H_GR (FLD (f_operand2), opval);
487 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
488 }
489}
490{
491 {
492 BI opval = LTQI (tmp_newval, 0);
493 CPU (h_nbit) = opval;
494 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
495 }
496 {
497 BI opval = ANDIF (EQQI (tmp_newval, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
498 CPU (h_zbit) = opval;
499 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
500 }
501SET_H_CBIT_MOVE (0);
502SET_H_VBIT_MOVE (0);
503{
504 {
505 BI opval = 0;
506 CPU (h_xbit) = opval;
507 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
508 }
509 {
510 BI opval = 0;
511 SET_H_INSN_PREFIXED_P (opval);
512 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
513 }
514}
515}
516}
517
518#undef FLD
519}
520 NEXT (vpc);
521
522 CASE (sem, INSN_MOVE_W_R) : /* move.w move.m ${Rs},${Rd} */
523{
524 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
525 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
526#define FLD(f) abuf->fields.sfmt_add_b_r.f
527 int UNUSED written = 0;
528 IADDR UNUSED pc = abuf->addr;
529 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
530
531{
532 HI tmp_newval;
533 tmp_newval = GET_H_GR (FLD (f_operand1));
534{
535 SI tmp_oldregval;
536 tmp_oldregval = GET_H_RAW_GR_PC (FLD (f_operand2));
537 {
538 SI opval = ORSI (ANDSI (tmp_newval, 65535), ANDSI (tmp_oldregval, 0xffff0000));
539 SET_H_GR (FLD (f_operand2), opval);
540 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
541 }
542}
543{
544 {
545 BI opval = LTHI (tmp_newval, 0);
546 CPU (h_nbit) = opval;
547 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
548 }
549 {
550 BI opval = ANDIF (EQHI (tmp_newval, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
551 CPU (h_zbit) = opval;
552 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
553 }
554SET_H_CBIT_MOVE (0);
555SET_H_VBIT_MOVE (0);
556{
557 {
558 BI opval = 0;
559 CPU (h_xbit) = opval;
560 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
561 }
562 {
563 BI opval = 0;
564 SET_H_INSN_PREFIXED_P (opval);
565 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
566 }
567}
568}
569}
570
571#undef FLD
572}
573 NEXT (vpc);
574
575 CASE (sem, INSN_MOVE_D_R) : /* move.d move.m ${Rs},${Rd} */
576{
577 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
578 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
579#define FLD(f) abuf->fields.sfmt_add_b_r.f
580 int UNUSED written = 0;
581 IADDR UNUSED pc = abuf->addr;
582 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
583
584{
585 SI tmp_newval;
586 tmp_newval = GET_H_GR (FLD (f_operand1));
587 {
588 SI opval = tmp_newval;
589 SET_H_GR (FLD (f_operand2), opval);
590 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
591 }
592{
593 {
594 BI opval = LTSI (tmp_newval, 0);
595 CPU (h_nbit) = opval;
596 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
597 }
598 {
599 BI opval = ANDIF (EQSI (tmp_newval, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
600 CPU (h_zbit) = opval;
601 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
602 }
603SET_H_CBIT_MOVE (0);
604SET_H_VBIT_MOVE (0);
605{
606 {
607 BI opval = 0;
608 CPU (h_xbit) = opval;
609 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
610 }
611 {
612 BI opval = 0;
613 SET_H_INSN_PREFIXED_P (opval);
614 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
615 }
616}
617}
618}
619
620#undef FLD
621}
622 NEXT (vpc);
623
624 CASE (sem, INSN_MOVEPCR) : /* move.d PC,${Rd} */
625{
626 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
627 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
628#define FLD(f) abuf->fields.sfmt_moveq.f
629 int UNUSED written = 0;
630 IADDR UNUSED pc = abuf->addr;
631 SEM_BRANCH_INIT
632 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
633
634{
635 SI tmp_pcval;
636 tmp_pcval = ADDSI (pc, 2);
637 {
638 SI opval = tmp_pcval;
639 SET_H_GR (FLD (f_operand2), opval);
640 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
641 }
642{
643 {
644 BI opval = LTSI (tmp_pcval, 0);
645 CPU (h_nbit) = opval;
646 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
647 }
648 {
649 BI opval = ANDIF (EQSI (tmp_pcval, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
650 CPU (h_zbit) = opval;
651 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
652 }
653SET_H_CBIT_MOVE (0);
654SET_H_VBIT_MOVE (0);
655{
656 {
657 BI opval = 0;
658 CPU (h_xbit) = opval;
659 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
660 }
661 {
662 BI opval = 0;
663 SET_H_INSN_PREFIXED_P (opval);
664 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
665 }
666}
667}
668}
669
670 SEM_BRANCH_FINI (vpc);
671#undef FLD
672}
673 NEXT (vpc);
674
675 CASE (sem, INSN_MOVEQ) : /* moveq $i,$Rd */
676{
677 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
678 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
679#define FLD(f) abuf->fields.sfmt_moveq.f
680 int UNUSED written = 0;
681 IADDR UNUSED pc = abuf->addr;
682 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
683
684{
685 SI tmp_newval;
686 tmp_newval = FLD (f_s6);
687 {
688 SI opval = tmp_newval;
689 SET_H_GR (FLD (f_operand2), opval);
690 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
691 }
692{
693SET_H_NBIT_MOVE (LTSI (tmp_newval, 0));
694SET_H_ZBIT_MOVE (ANDIF (EQSI (tmp_newval, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1))));
695SET_H_CBIT_MOVE (0);
696SET_H_VBIT_MOVE (0);
697{
698 {
699 BI opval = 0;
700 CPU (h_xbit) = opval;
701 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
702 }
703 {
704 BI opval = 0;
705 SET_H_INSN_PREFIXED_P (opval);
706 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
707 }
708}
709}
710}
711
712#undef FLD
713}
714 NEXT (vpc);
715
716 CASE (sem, INSN_MOVS_B_R) : /* movs.b movs.m ${Rs},${Rd} */
717{
718 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
719 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
720#define FLD(f) abuf->fields.sfmt_muls_b.f
721 int UNUSED written = 0;
722 IADDR UNUSED pc = abuf->addr;
723 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
724
725{
c9b3544a
HPN		 726 QI tmp_tmpops;
727 SI tmp_newval;
728 tmp_tmpops = GET_H_GR (FLD (f_operand1));
729 tmp_newval = EXTQISI (tmp_tmpops);
f6bcefef 730 {
c9b3544a 731 SI opval = tmp_newval;
f6bcefef
HPN		 732 SET_H_GR (FLD (f_operand2), opval);
733 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
734 }
735{
736 {
737 BI opval = LTSI (tmp_newval, 0);
738 CPU (h_nbit) = opval;
739 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
740 }
741 {
742 BI opval = ANDIF (EQSI (tmp_newval, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
743 CPU (h_zbit) = opval;
744 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
745 }
746SET_H_CBIT_MOVE (0);
747SET_H_VBIT_MOVE (0);
748{
749 {
750 BI opval = 0;
751 CPU (h_xbit) = opval;
752 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
753 }
754 {
755 BI opval = 0;
756 SET_H_INSN_PREFIXED_P (opval);
757 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
758 }
759}
760}
761}
762
763#undef FLD
764}
765 NEXT (vpc);
766
767 CASE (sem, INSN_MOVS_W_R) : /* movs.w movs.m ${Rs},${Rd} */
768{
769 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
770 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
771#define FLD(f) abuf->fields.sfmt_muls_b.f
772 int UNUSED written = 0;
773 IADDR UNUSED pc = abuf->addr;
774 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
775
776{
c9b3544a
HPN		 777 HI tmp_tmpops;
778 SI tmp_newval;
779 tmp_tmpops = GET_H_GR (FLD (f_operand1));
780 tmp_newval = EXTHISI (tmp_tmpops);
f6bcefef 781 {
c9b3544a 782 SI opval = tmp_newval;
f6bcefef
HPN		 783 SET_H_GR (FLD (f_operand2), opval);
784 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
785 }
786{
787 {
788 BI opval = LTSI (tmp_newval, 0);
789 CPU (h_nbit) = opval;
790 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
791 }
792 {
793 BI opval = ANDIF (EQSI (tmp_newval, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
794 CPU (h_zbit) = opval;
795 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
796 }
797SET_H_CBIT_MOVE (0);
798SET_H_VBIT_MOVE (0);
799{
800 {
801 BI opval = 0;
802 CPU (h_xbit) = opval;
803 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
804 }
805 {
806 BI opval = 0;
807 SET_H_INSN_PREFIXED_P (opval);
808 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
809 }
810}
811}
812}
813
814#undef FLD
815}
816 NEXT (vpc);
817
818 CASE (sem, INSN_MOVU_B_R) : /* movu.b movu.m ${Rs},${Rd} */
819{
820 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
821 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
822#define FLD(f) abuf->fields.sfmt_muls_b.f
823 int UNUSED written = 0;
824 IADDR UNUSED pc = abuf->addr;
825 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
826
827{
c9b3544a
HPN		 828 QI tmp_tmpops;
829 SI tmp_newval;
830 tmp_tmpops = GET_H_GR (FLD (f_operand1));
831 tmp_newval = ZEXTQISI (tmp_tmpops);
f6bcefef 832 {
c9b3544a 833 SI opval = tmp_newval;
f6bcefef
HPN		 834 SET_H_GR (FLD (f_operand2), opval);
835 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
836 }
837{
838 {
839 BI opval = LTSI (tmp_newval, 0);
840 CPU (h_nbit) = opval;
841 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
842 }
843 {
844 BI opval = ANDIF (EQSI (tmp_newval, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
845 CPU (h_zbit) = opval;
846 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
847 }
848SET_H_CBIT_MOVE (0);
849SET_H_VBIT_MOVE (0);
850{
851 {
852 BI opval = 0;
853 CPU (h_xbit) = opval;
854 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
855 }
856 {
857 BI opval = 0;
858 SET_H_INSN_PREFIXED_P (opval);
859 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
860 }
861}
862}
863}
864
865#undef FLD
866}
867 NEXT (vpc);
868
869 CASE (sem, INSN_MOVU_W_R) : /* movu.w movu.m ${Rs},${Rd} */
870{
871 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
872 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
873#define FLD(f) abuf->fields.sfmt_muls_b.f
874 int UNUSED written = 0;
875 IADDR UNUSED pc = abuf->addr;
876 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
877
878{
c9b3544a
HPN		 879 HI tmp_tmpops;
880 SI tmp_newval;
881 tmp_tmpops = GET_H_GR (FLD (f_operand1));
882 tmp_newval = ZEXTHISI (tmp_tmpops);
f6bcefef 883 {
c9b3544a 884 SI opval = tmp_newval;
f6bcefef
HPN		 885 SET_H_GR (FLD (f_operand2), opval);
886 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
887 }
888{
889 {
890 BI opval = LTSI (tmp_newval, 0);
891 CPU (h_nbit) = opval;
892 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
893 }
894 {
895 BI opval = ANDIF (EQSI (tmp_newval, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
896 CPU (h_zbit) = opval;
897 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
898 }
899SET_H_CBIT_MOVE (0);
900SET_H_VBIT_MOVE (0);
901{
902 {
903 BI opval = 0;
904 CPU (h_xbit) = opval;
905 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
906 }
907 {
908 BI opval = 0;
909 SET_H_INSN_PREFIXED_P (opval);
910 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
911 }
912}
913}
914}
915
916#undef FLD
917}
918 NEXT (vpc);
919
920 CASE (sem, INSN_MOVECBR) : /* move.b ${sconst8},${Rd} */
921{
922 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
923 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
924#define FLD(f) abuf->fields.sfmt_addcbr.f
925 int UNUSED written = 0;
926 IADDR UNUSED pc = abuf->addr;
927 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
928
929{
930 QI tmp_newval;
931 tmp_newval = FLD (f_indir_pc__byte);
932{
933 SI tmp_oldregval;
934 tmp_oldregval = GET_H_RAW_GR_PC (FLD (f_operand2));
935 {
936 SI opval = ORSI (ANDSI (tmp_newval, 255), ANDSI (tmp_oldregval, 0xffffff00));
937 SET_H_GR (FLD (f_operand2), opval);
938 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
939 }
940}
941{
942 {
943 BI opval = LTQI (tmp_newval, 0);
944 CPU (h_nbit) = opval;
945 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
946 }
947 {
948 BI opval = ANDIF (EQQI (tmp_newval, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
949 CPU (h_zbit) = opval;
950 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
951 }
952SET_H_CBIT_MOVE (0);
953SET_H_VBIT_MOVE (0);
954{
955 {
956 BI opval = 0;
957 CPU (h_xbit) = opval;
958 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
959 }
960 {
961 BI opval = 0;
962 SET_H_INSN_PREFIXED_P (opval);
963 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
964 }
965}
966}
967}
968
969#undef FLD
970}
971 NEXT (vpc);
972
973 CASE (sem, INSN_MOVECWR) : /* move.w ${sconst16},${Rd} */
974{
975 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
976 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
977#define FLD(f) abuf->fields.sfmt_addcwr.f
978 int UNUSED written = 0;
979 IADDR UNUSED pc = abuf->addr;
980 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
981
982{
983 HI tmp_newval;
984 tmp_newval = FLD (f_indir_pc__word);
985{
986 SI tmp_oldregval;
987 tmp_oldregval = GET_H_RAW_GR_PC (FLD (f_operand2));
988 {
989 SI opval = ORSI (ANDSI (tmp_newval, 65535), ANDSI (tmp_oldregval, 0xffff0000));
990 SET_H_GR (FLD (f_operand2), opval);
991 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
992 }
993}
994{
995 {
996 BI opval = LTHI (tmp_newval, 0);
997 CPU (h_nbit) = opval;
998 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
999 }
1000 {
1001 BI opval = ANDIF (EQHI (tmp_newval, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
1002 CPU (h_zbit) = opval;
1003 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
1004 }
1005SET_H_CBIT_MOVE (0);
1006SET_H_VBIT_MOVE (0);
1007{
1008 {
1009 BI opval = 0;
1010 CPU (h_xbit) = opval;
1011 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
1012 }
1013 {
1014 BI opval = 0;
1015 SET_H_INSN_PREFIXED_P (opval);
1016 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
1017 }
1018}
1019}
1020}
1021
1022#undef FLD
1023}
1024 NEXT (vpc);
1025
1026 CASE (sem, INSN_MOVECDR) : /* move.d ${const32},${Rd} */
1027{
1028 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1029 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1030#define FLD(f) abuf->fields.sfmt_bound_cd.f
1031 int UNUSED written = 0;
1032 IADDR UNUSED pc = abuf->addr;
1033 vpc = SEM_NEXT_VPC (sem_arg, pc, 6);
1034
1035{
1036 SI tmp_newval;
1037 tmp_newval = FLD (f_indir_pc__dword);
1038 {
1039 SI opval = tmp_newval;
1040 SET_H_GR (FLD (f_operand2), opval);
1041 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1042 }
1043{
1044 {
1045 BI opval = LTSI (tmp_newval, 0);
1046 CPU (h_nbit) = opval;
1047 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
1048 }
1049 {
1050 BI opval = ANDIF (EQSI (tmp_newval, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
1051 CPU (h_zbit) = opval;
1052 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
1053 }
1054SET_H_CBIT_MOVE (0);
1055SET_H_VBIT_MOVE (0);
1056{
1057 {
1058 BI opval = 0;
1059 CPU (h_xbit) = opval;
1060 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
1061 }
1062 {
1063 BI opval = 0;
1064 SET_H_INSN_PREFIXED_P (opval);
1065 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
1066 }
1067}
1068}
1069}
1070
1071#undef FLD
1072}
1073 NEXT (vpc);
1074
1075 CASE (sem, INSN_MOVSCBR) : /* movs.b ${sconst8},${Rd} */
1076{
1077 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1078 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1079#define FLD(f) abuf->fields.sfmt_bound_cb.f
1080 int UNUSED written = 0;
1081 IADDR UNUSED pc = abuf->addr;
1082 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1083
1084{
1085 SI tmp_newval;
1086 tmp_newval = EXTQISI (TRUNCSIQI (FLD (f_indir_pc__byte)));
1087 {
1088 SI opval = tmp_newval;
1089 SET_H_GR (FLD (f_operand2), opval);
1090 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1091 }
1092{
1093 {
1094 BI opval = LTSI (tmp_newval, 0);
1095 CPU (h_nbit) = opval;
1096 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
1097 }
1098 {
1099 BI opval = ANDIF (EQSI (tmp_newval, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
1100 CPU (h_zbit) = opval;
1101 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
1102 }
1103SET_H_CBIT_MOVE (0);
1104SET_H_VBIT_MOVE (0);
1105{
1106 {
1107 BI opval = 0;
1108 CPU (h_xbit) = opval;
1109 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
1110 }
1111 {
1112 BI opval = 0;
1113 SET_H_INSN_PREFIXED_P (opval);
1114 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
1115 }
1116}
1117}
1118}
1119
1120#undef FLD
1121}
1122 NEXT (vpc);
1123
1124 CASE (sem, INSN_MOVSCWR) : /* movs.w ${sconst16},${Rd} */
1125{
1126 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1127 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1128#define FLD(f) abuf->fields.sfmt_bound_cw.f
1129 int UNUSED written = 0;
1130 IADDR UNUSED pc = abuf->addr;
1131 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1132
1133{
1134 SI tmp_newval;
1135 tmp_newval = EXTHISI (TRUNCSIHI (FLD (f_indir_pc__word)));
1136 {
1137 SI opval = tmp_newval;
1138 SET_H_GR (FLD (f_operand2), opval);
1139 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1140 }
1141{
1142 {
1143 BI opval = LTSI (tmp_newval, 0);
1144 CPU (h_nbit) = opval;
1145 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
1146 }
1147 {
1148 BI opval = ANDIF (EQSI (tmp_newval, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
1149 CPU (h_zbit) = opval;
1150 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
1151 }
1152SET_H_CBIT_MOVE (0);
1153SET_H_VBIT_MOVE (0);
1154{
1155 {
1156 BI opval = 0;
1157 CPU (h_xbit) = opval;
1158 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
1159 }
1160 {
1161 BI opval = 0;
1162 SET_H_INSN_PREFIXED_P (opval);
1163 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
1164 }
1165}
1166}
1167}
1168
1169#undef FLD
1170}
1171 NEXT (vpc);
1172
1173 CASE (sem, INSN_MOVUCBR) : /* movu.b ${uconst8},${Rd} */
1174{
1175 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1176 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1177#define FLD(f) abuf->fields.sfmt_bound_cb.f
1178 int UNUSED written = 0;
1179 IADDR UNUSED pc = abuf->addr;
1180 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1181
1182{
1183 SI tmp_newval;
1184 tmp_newval = ZEXTQISI (TRUNCSIQI (FLD (f_indir_pc__byte)));
1185 {
1186 SI opval = tmp_newval;
1187 SET_H_GR (FLD (f_operand2), opval);
1188 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1189 }
1190{
1191 {
1192 BI opval = LTSI (tmp_newval, 0);
1193 CPU (h_nbit) = opval;
1194 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
1195 }
1196 {
1197 BI opval = ANDIF (EQSI (tmp_newval, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
1198 CPU (h_zbit) = opval;
1199 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
1200 }
1201SET_H_CBIT_MOVE (0);
1202SET_H_VBIT_MOVE (0);
1203{
1204 {
1205 BI opval = 0;
1206 CPU (h_xbit) = opval;
1207 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
1208 }
1209 {
1210 BI opval = 0;
1211 SET_H_INSN_PREFIXED_P (opval);
1212 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
1213 }
1214}
1215}
1216}
1217
1218#undef FLD
1219}
1220 NEXT (vpc);
1221
1222 CASE (sem, INSN_MOVUCWR) : /* movu.w ${uconst16},${Rd} */
1223{
1224 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1225 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1226#define FLD(f) abuf->fields.sfmt_bound_cw.f
1227 int UNUSED written = 0;
1228 IADDR UNUSED pc = abuf->addr;
1229 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1230
1231{
1232 SI tmp_newval;
1233 tmp_newval = ZEXTHISI (TRUNCSIHI (FLD (f_indir_pc__word)));
1234 {
1235 SI opval = tmp_newval;
1236 SET_H_GR (FLD (f_operand2), opval);
1237 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1238 }
1239{
1240 {
1241 BI opval = LTSI (tmp_newval, 0);
1242 CPU (h_nbit) = opval;
1243 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
1244 }
1245 {
1246 BI opval = ANDIF (EQSI (tmp_newval, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
1247 CPU (h_zbit) = opval;
1248 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
1249 }
1250SET_H_CBIT_MOVE (0);
1251SET_H_VBIT_MOVE (0);
1252{
1253 {
1254 BI opval = 0;
1255 CPU (h_xbit) = opval;
1256 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
1257 }
1258 {
1259 BI opval = 0;
1260 SET_H_INSN_PREFIXED_P (opval);
1261 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
1262 }
1263}
1264}
1265}
1266
1267#undef FLD
1268}
1269 NEXT (vpc);
1270
1271 CASE (sem, INSN_ADDQ) : /* addq $j,$Rd */
1272{
1273 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1274 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1275#define FLD(f) abuf->fields.sfmt_addq.f
1276 int UNUSED written = 0;
1277 IADDR UNUSED pc = abuf->addr;
1278 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1279
1280{
1281 SI tmp_tmpopd;
1282 SI tmp_tmpops;
1283 BI tmp_carry;
1284 SI tmp_newval;
1285 tmp_tmpops = FLD (f_u6);
1286 tmp_tmpopd = GET_H_GR (FLD (f_operand2));
1287 tmp_carry = CPU (h_cbit);
1288 tmp_newval = ADDCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
1289 {
1290 SI opval = tmp_newval;
1291 SET_H_GR (FLD (f_operand2), opval);
1292 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1293 }
1294{
1295 {
1296 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), ORIF (ANDIF (LTSI (tmp_tmpopd, 0), GESI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_newval, 0))));
1297 CPU (h_cbit) = opval;
1298 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
1299 }
1300 {
1301 BI opval = LTSI (tmp_newval, 0);
1302 CPU (h_nbit) = opval;
1303 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
1304 }
1305 {
1306 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
1307 CPU (h_zbit) = opval;
1308 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
1309 }
1310 {
1311 BI opval = ORIF (ANDIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (GESI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0)));
1312 CPU (h_vbit) = opval;
1313 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
1314 }
1315{
1316 {
1317 BI opval = 0;
1318 CPU (h_xbit) = opval;
1319 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
1320 }
1321 {
1322 BI opval = 0;
1323 SET_H_INSN_PREFIXED_P (opval);
1324 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
1325 }
1326}
1327}
1328}
1329
1330#undef FLD
1331}
1332 NEXT (vpc);
1333
1334 CASE (sem, INSN_SUBQ) : /* subq $j,$Rd */
1335{
1336 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1337 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1338#define FLD(f) abuf->fields.sfmt_addq.f
1339 int UNUSED written = 0;
1340 IADDR UNUSED pc = abuf->addr;
1341 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1342
1343{
1344 SI tmp_tmpopd;
1345 SI tmp_tmpops;
1346 BI tmp_carry;
1347 SI tmp_newval;
1348 tmp_tmpops = FLD (f_u6);
1349 tmp_tmpopd = GET_H_GR (FLD (f_operand2));
1350 tmp_carry = CPU (h_cbit);
1351 tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
1352 {
1353 SI opval = tmp_newval;
1354 SET_H_GR (FLD (f_operand2), opval);
1355 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1356 }
1357{
1358 {
1359 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0))));
1360 CPU (h_cbit) = opval;
1361 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
1362 }
1363 {
1364 BI opval = LTSI (tmp_newval, 0);
1365 CPU (h_nbit) = opval;
1366 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
1367 }
1368 {
1369 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
1370 CPU (h_zbit) = opval;
1371 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
1372 }
1373 {
1374 BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0)));
1375 CPU (h_vbit) = opval;
1376 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
1377 }
1378{
1379 {
1380 BI opval = 0;
1381 CPU (h_xbit) = opval;
1382 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
1383 }
1384 {
1385 BI opval = 0;
1386 SET_H_INSN_PREFIXED_P (opval);
1387 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
1388 }
1389}
1390}
1391}
1392
1393#undef FLD
1394}
1395 NEXT (vpc);
1396
1397 CASE (sem, INSN_CMP_R_B_R) : /* cmp-r.b $Rs,$Rd */
1398{
1399 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1400 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1401#define FLD(f) abuf->fields.sfmt_add_b_r.f
1402 int UNUSED written = 0;
1403 IADDR UNUSED pc = abuf->addr;
1404 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1405
1406{
1407 QI tmp_tmpopd;
1408 QI tmp_tmpops;
1409 BI tmp_carry;
1410 QI tmp_newval;
1411 tmp_tmpops = GET_H_GR (FLD (f_operand1));
1412 tmp_tmpopd = GET_H_GR (FLD (f_operand2));
1413 tmp_carry = CPU (h_cbit);
1414 tmp_newval = SUBCQI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
1415((void) 0); /*nop*/
1416{
1417 {
1418 BI opval = ORIF (ANDIF (LTQI (tmp_tmpops, 0), GEQI (tmp_tmpopd, 0)), ORIF (ANDIF (GEQI (tmp_tmpopd, 0), LTQI (tmp_newval, 0)), ANDIF (LTQI (tmp_tmpops, 0), LTQI (tmp_newval, 0))));
1419 CPU (h_cbit) = opval;
1420 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
1421 }
1422 {
1423 BI opval = LTQI (tmp_newval, 0);
1424 CPU (h_nbit) = opval;
1425 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
1426 }
1427 {
1428 BI opval = ANDIF (EQQI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
1429 CPU (h_zbit) = opval;
1430 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
1431 }
1432 {
1433 BI opval = ORIF (ANDIF (ANDIF (GEQI (tmp_tmpops, 0), LTQI (tmp_tmpopd, 0)), GEQI (tmp_newval, 0)), ANDIF (ANDIF (LTQI (tmp_tmpops, 0), GEQI (tmp_tmpopd, 0)), LTQI (tmp_newval, 0)));
1434 CPU (h_vbit) = opval;
1435 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
1436 }
1437{
1438 {
1439 BI opval = 0;
1440 CPU (h_xbit) = opval;
1441 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
1442 }
1443 {
1444 BI opval = 0;
1445 SET_H_INSN_PREFIXED_P (opval);
1446 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
1447 }
1448}
1449}
1450}
1451
1452#undef FLD
1453}
1454 NEXT (vpc);
1455
1456 CASE (sem, INSN_CMP_R_W_R) : /* cmp-r.w $Rs,$Rd */
1457{
1458 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1459 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1460#define FLD(f) abuf->fields.sfmt_add_b_r.f
1461 int UNUSED written = 0;
1462 IADDR UNUSED pc = abuf->addr;
1463 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1464
1465{
1466 HI tmp_tmpopd;
1467 HI tmp_tmpops;
1468 BI tmp_carry;
1469 HI tmp_newval;
1470 tmp_tmpops = GET_H_GR (FLD (f_operand1));
1471 tmp_tmpopd = GET_H_GR (FLD (f_operand2));
1472 tmp_carry = CPU (h_cbit);
1473 tmp_newval = SUBCHI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
1474((void) 0); /*nop*/
1475{
1476 {
1477 BI opval = ORIF (ANDIF (LTHI (tmp_tmpops, 0), GEHI (tmp_tmpopd, 0)), ORIF (ANDIF (GEHI (tmp_tmpopd, 0), LTHI (tmp_newval, 0)), ANDIF (LTHI (tmp_tmpops, 0), LTHI (tmp_newval, 0))));
1478 CPU (h_cbit) = opval;
1479 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
1480 }
1481 {
1482 BI opval = LTHI (tmp_newval, 0);
1483 CPU (h_nbit) = opval;
1484 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
1485 }
1486 {
1487 BI opval = ANDIF (EQHI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
1488 CPU (h_zbit) = opval;
1489 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
1490 }
1491 {
1492 BI opval = ORIF (ANDIF (ANDIF (GEHI (tmp_tmpops, 0), LTHI (tmp_tmpopd, 0)), GEHI (tmp_newval, 0)), ANDIF (ANDIF (LTHI (tmp_tmpops, 0), GEHI (tmp_tmpopd, 0)), LTHI (tmp_newval, 0)));
1493 CPU (h_vbit) = opval;
1494 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
1495 }
1496{
1497 {
1498 BI opval = 0;
1499 CPU (h_xbit) = opval;
1500 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
1501 }
1502 {
1503 BI opval = 0;
1504 SET_H_INSN_PREFIXED_P (opval);
1505 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
1506 }
1507}
1508}
1509}
1510
1511#undef FLD
1512}
1513 NEXT (vpc);
1514
1515 CASE (sem, INSN_CMP_R_D_R) : /* cmp-r.d $Rs,$Rd */
1516{
1517 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1518 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1519#define FLD(f) abuf->fields.sfmt_add_b_r.f
1520 int UNUSED written = 0;
1521 IADDR UNUSED pc = abuf->addr;
1522 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1523
1524{
1525 SI tmp_tmpopd;
1526 SI tmp_tmpops;
1527 BI tmp_carry;
1528 SI tmp_newval;
1529 tmp_tmpops = GET_H_GR (FLD (f_operand1));
1530 tmp_tmpopd = GET_H_GR (FLD (f_operand2));
1531 tmp_carry = CPU (h_cbit);
1532 tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
1533((void) 0); /*nop*/
1534{
1535 {
1536 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0))));
1537 CPU (h_cbit) = opval;
1538 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
1539 }
1540 {
1541 BI opval = LTSI (tmp_newval, 0);
1542 CPU (h_nbit) = opval;
1543 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
1544 }
1545 {
1546 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
1547 CPU (h_zbit) = opval;
1548 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
1549 }
1550 {
1551 BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0)));
1552 CPU (h_vbit) = opval;
1553 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
1554 }
1555{
1556 {
1557 BI opval = 0;
1558 CPU (h_xbit) = opval;
1559 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
1560 }
1561 {
1562 BI opval = 0;
1563 SET_H_INSN_PREFIXED_P (opval);
1564 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
1565 }
1566}
1567}
1568}
1569
1570#undef FLD
1571}
1572 NEXT (vpc);
1573
1574 CASE (sem, INSN_CMP_M_B_M) : /* cmp-m.b [${Rs}${inc}],${Rd} */
1575{
1576 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1577 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1578#define FLD(f) abuf->fields.sfmt_bound_m_b_m.f
1579 int UNUSED written = 0;
1580 IADDR UNUSED pc = abuf->addr;
1581 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1582
1583{
1584 QI tmp_tmpopd;
1585 QI tmp_tmpops;
1586 BI tmp_carry;
1587 QI tmp_newval;
1588 tmp_tmpops = ({ SI tmp_addr;
1589 QI tmp_tmp_mem;
1590 BI tmp_postinc;
1591 tmp_postinc = FLD (f_memmode);
1592; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
1593; tmp_tmp_mem = GETMEMQI (current_cpu, pc, tmp_addr);
1594; if (NEBI (tmp_postinc, 0)) {
1595{
1596if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
1597 tmp_addr = ADDSI (tmp_addr, 1);
1598}
1599 {
1600 SI opval = tmp_addr;
1601 SET_H_GR (FLD (f_operand1), opval);
1602 written |= (1 << 9);
1603 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1604 }
1605}
1606}
1607; tmp_tmp_mem; });
1608 tmp_tmpopd = GET_H_GR (FLD (f_operand2));
1609 tmp_carry = CPU (h_cbit);
1610 tmp_newval = SUBCQI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
1611((void) 0); /*nop*/
1612{
1613 {
1614 BI opval = ORIF (ANDIF (LTQI (tmp_tmpops, 0), GEQI (tmp_tmpopd, 0)), ORIF (ANDIF (GEQI (tmp_tmpopd, 0), LTQI (tmp_newval, 0)), ANDIF (LTQI (tmp_tmpops, 0), LTQI (tmp_newval, 0))));
1615 CPU (h_cbit) = opval;
1616 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
1617 }
1618 {
1619 BI opval = LTQI (tmp_newval, 0);
1620 CPU (h_nbit) = opval;
1621 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
1622 }
1623 {
1624 BI opval = ANDIF (EQQI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
1625 CPU (h_zbit) = opval;
1626 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
1627 }
1628 {
1629 BI opval = ORIF (ANDIF (ANDIF (GEQI (tmp_tmpops, 0), LTQI (tmp_tmpopd, 0)), GEQI (tmp_newval, 0)), ANDIF (ANDIF (LTQI (tmp_tmpops, 0), GEQI (tmp_tmpopd, 0)), LTQI (tmp_newval, 0)));
1630 CPU (h_vbit) = opval;
1631 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
1632 }
1633{
1634 {
1635 BI opval = 0;
1636 CPU (h_xbit) = opval;
1637 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
1638 }
1639 {
1640 BI opval = 0;
1641 SET_H_INSN_PREFIXED_P (opval);
1642 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
1643 }
1644}
1645}
1646}
1647
1648 abuf->written = written;
1649#undef FLD
1650}
1651 NEXT (vpc);
1652
1653 CASE (sem, INSN_CMP_M_W_M) : /* cmp-m.w [${Rs}${inc}],${Rd} */
1654{
1655 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1656 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1657#define FLD(f) abuf->fields.sfmt_bound_m_b_m.f
1658 int UNUSED written = 0;
1659 IADDR UNUSED pc = abuf->addr;
1660 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1661
1662{
1663 HI tmp_tmpopd;
1664 HI tmp_tmpops;
1665 BI tmp_carry;
1666 HI tmp_newval;
1667 tmp_tmpops = ({ SI tmp_addr;
1668 HI tmp_tmp_mem;
1669 BI tmp_postinc;
1670 tmp_postinc = FLD (f_memmode);
1671; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
1672; tmp_tmp_mem = GETMEMHI (current_cpu, pc, tmp_addr);
1673; if (NEBI (tmp_postinc, 0)) {
1674{
1675if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
1676 tmp_addr = ADDSI (tmp_addr, 2);
1677}
1678 {
1679 SI opval = tmp_addr;
1680 SET_H_GR (FLD (f_operand1), opval);
1681 written |= (1 << 9);
1682 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1683 }
1684}
1685}
1686; tmp_tmp_mem; });
1687 tmp_tmpopd = GET_H_GR (FLD (f_operand2));
1688 tmp_carry = CPU (h_cbit);
1689 tmp_newval = SUBCHI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
1690((void) 0); /*nop*/
1691{
1692 {
1693 BI opval = ORIF (ANDIF (LTHI (tmp_tmpops, 0), GEHI (tmp_tmpopd, 0)), ORIF (ANDIF (GEHI (tmp_tmpopd, 0), LTHI (tmp_newval, 0)), ANDIF (LTHI (tmp_tmpops, 0), LTHI (tmp_newval, 0))));
1694 CPU (h_cbit) = opval;
1695 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
1696 }
1697 {
1698 BI opval = LTHI (tmp_newval, 0);
1699 CPU (h_nbit) = opval;
1700 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
1701 }
1702 {
1703 BI opval = ANDIF (EQHI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
1704 CPU (h_zbit) = opval;
1705 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
1706 }
1707 {
1708 BI opval = ORIF (ANDIF (ANDIF (GEHI (tmp_tmpops, 0), LTHI (tmp_tmpopd, 0)), GEHI (tmp_newval, 0)), ANDIF (ANDIF (LTHI (tmp_tmpops, 0), GEHI (tmp_tmpopd, 0)), LTHI (tmp_newval, 0)));
1709 CPU (h_vbit) = opval;
1710 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
1711 }
1712{
1713 {
1714 BI opval = 0;
1715 CPU (h_xbit) = opval;
1716 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
1717 }
1718 {
1719 BI opval = 0;
1720 SET_H_INSN_PREFIXED_P (opval);
1721 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
1722 }
1723}
1724}
1725}
1726
1727 abuf->written = written;
1728#undef FLD
1729}
1730 NEXT (vpc);
1731
1732 CASE (sem, INSN_CMP_M_D_M) : /* cmp-m.d [${Rs}${inc}],${Rd} */
1733{
1734 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1735 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1736#define FLD(f) abuf->fields.sfmt_bound_m_b_m.f
1737 int UNUSED written = 0;
1738 IADDR UNUSED pc = abuf->addr;
1739 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1740
1741{
1742 SI tmp_tmpopd;
1743 SI tmp_tmpops;
1744 BI tmp_carry;
1745 SI tmp_newval;
1746 tmp_tmpops = ({ SI tmp_addr;
1747 SI tmp_tmp_mem;
1748 BI tmp_postinc;
1749 tmp_postinc = FLD (f_memmode);
1750; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
1751; tmp_tmp_mem = GETMEMSI (current_cpu, pc, tmp_addr);
1752; if (NEBI (tmp_postinc, 0)) {
1753{
1754if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
1755 tmp_addr = ADDSI (tmp_addr, 4);
1756}
1757 {
1758 SI opval = tmp_addr;
1759 SET_H_GR (FLD (f_operand1), opval);
1760 written |= (1 << 9);
1761 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1762 }
1763}
1764}
1765; tmp_tmp_mem; });
1766 tmp_tmpopd = GET_H_GR (FLD (f_operand2));
1767 tmp_carry = CPU (h_cbit);
1768 tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
1769((void) 0); /*nop*/
1770{
1771 {
1772 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0))));
1773 CPU (h_cbit) = opval;
1774 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
1775 }
1776 {
1777 BI opval = LTSI (tmp_newval, 0);
1778 CPU (h_nbit) = opval;
1779 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
1780 }
1781 {
1782 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
1783 CPU (h_zbit) = opval;
1784 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
1785 }
1786 {
1787 BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0)));
1788 CPU (h_vbit) = opval;
1789 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
1790 }
1791{
1792 {
1793 BI opval = 0;
1794 CPU (h_xbit) = opval;
1795 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
1796 }
1797 {
1798 BI opval = 0;
1799 SET_H_INSN_PREFIXED_P (opval);
1800 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
1801 }
1802}
1803}
1804}
1805
1806 abuf->written = written;
1807#undef FLD
1808}
1809 NEXT (vpc);
1810
1811 CASE (sem, INSN_CMPCBR) : /* cmp.b $sconst8,$Rd */
1812{
1813 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1814 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1815#define FLD(f) abuf->fields.sfmt_bound_cb.f
1816 int UNUSED written = 0;
1817 IADDR UNUSED pc = abuf->addr;
1818 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1819
1820{
1821 QI tmp_tmpopd;
1822 QI tmp_tmpops;
1823 BI tmp_carry;
1824 QI tmp_newval;
1825 tmp_tmpops = TRUNCSIQI (FLD (f_indir_pc__byte));
1826 tmp_tmpopd = GET_H_GR (FLD (f_operand2));
1827 tmp_carry = CPU (h_cbit);
1828 tmp_newval = SUBCQI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
1829((void) 0); /*nop*/
1830{
1831 {
1832 BI opval = ORIF (ANDIF (LTQI (tmp_tmpops, 0), GEQI (tmp_tmpopd, 0)), ORIF (ANDIF (GEQI (tmp_tmpopd, 0), LTQI (tmp_newval, 0)), ANDIF (LTQI (tmp_tmpops, 0), LTQI (tmp_newval, 0))));
1833 CPU (h_cbit) = opval;
1834 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
1835 }
1836 {
1837 BI opval = LTQI (tmp_newval, 0);
1838 CPU (h_nbit) = opval;
1839 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
1840 }
1841 {
1842 BI opval = ANDIF (EQQI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
1843 CPU (h_zbit) = opval;
1844 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
1845 }
1846 {
1847 BI opval = ORIF (ANDIF (ANDIF (GEQI (tmp_tmpops, 0), LTQI (tmp_tmpopd, 0)), GEQI (tmp_newval, 0)), ANDIF (ANDIF (LTQI (tmp_tmpops, 0), GEQI (tmp_tmpopd, 0)), LTQI (tmp_newval, 0)));
1848 CPU (h_vbit) = opval;
1849 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
1850 }
1851{
1852 {
1853 BI opval = 0;
1854 CPU (h_xbit) = opval;
1855 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
1856 }
1857 {
1858 BI opval = 0;
1859 SET_H_INSN_PREFIXED_P (opval);
1860 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
1861 }
1862}
1863}
1864}
1865
1866#undef FLD
1867}
1868 NEXT (vpc);
1869
1870 CASE (sem, INSN_CMPCWR) : /* cmp.w $sconst16,$Rd */
1871{
1872 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1873 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1874#define FLD(f) abuf->fields.sfmt_bound_cw.f
1875 int UNUSED written = 0;
1876 IADDR UNUSED pc = abuf->addr;
1877 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1878
1879{
1880 HI tmp_tmpopd;
1881 HI tmp_tmpops;
1882 BI tmp_carry;
1883 HI tmp_newval;
1884 tmp_tmpops = TRUNCSIHI (FLD (f_indir_pc__word));
1885 tmp_tmpopd = GET_H_GR (FLD (f_operand2));
1886 tmp_carry = CPU (h_cbit);
1887 tmp_newval = SUBCHI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
1888((void) 0); /*nop*/
1889{
1890 {
1891 BI opval = ORIF (ANDIF (LTHI (tmp_tmpops, 0), GEHI (tmp_tmpopd, 0)), ORIF (ANDIF (GEHI (tmp_tmpopd, 0), LTHI (tmp_newval, 0)), ANDIF (LTHI (tmp_tmpops, 0), LTHI (tmp_newval, 0))));
1892 CPU (h_cbit) = opval;
1893 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
1894 }
1895 {
1896 BI opval = LTHI (tmp_newval, 0);
1897 CPU (h_nbit) = opval;
1898 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
1899 }
1900 {
1901 BI opval = ANDIF (EQHI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
1902 CPU (h_zbit) = opval;
1903 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
1904 }
1905 {
1906 BI opval = ORIF (ANDIF (ANDIF (GEHI (tmp_tmpops, 0), LTHI (tmp_tmpopd, 0)), GEHI (tmp_newval, 0)), ANDIF (ANDIF (LTHI (tmp_tmpops, 0), GEHI (tmp_tmpopd, 0)), LTHI (tmp_newval, 0)));
1907 CPU (h_vbit) = opval;
1908 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
1909 }
1910{
1911 {
1912 BI opval = 0;
1913 CPU (h_xbit) = opval;
1914 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
1915 }
1916 {
1917 BI opval = 0;
1918 SET_H_INSN_PREFIXED_P (opval);
1919 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
1920 }
1921}
1922}
1923}
1924
1925#undef FLD
1926}
1927 NEXT (vpc);
1928
1929 CASE (sem, INSN_CMPCDR) : /* cmp.d $const32,$Rd */
1930{
1931 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1932 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1933#define FLD(f) abuf->fields.sfmt_bound_cd.f
1934 int UNUSED written = 0;
1935 IADDR UNUSED pc = abuf->addr;
1936 vpc = SEM_NEXT_VPC (sem_arg, pc, 6);
1937
1938{
1939 SI tmp_tmpopd;
1940 SI tmp_tmpops;
1941 BI tmp_carry;
1942 SI tmp_newval;
1943 tmp_tmpops = FLD (f_indir_pc__dword);
1944 tmp_tmpopd = GET_H_GR (FLD (f_operand2));
1945 tmp_carry = CPU (h_cbit);
1946 tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
1947((void) 0); /*nop*/
1948{
1949 {
1950 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0))));
1951 CPU (h_cbit) = opval;
1952 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
1953 }
1954 {
1955 BI opval = LTSI (tmp_newval, 0);
1956 CPU (h_nbit) = opval;
1957 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
1958 }
1959 {
1960 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
1961 CPU (h_zbit) = opval;
1962 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
1963 }
1964 {
1965 BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0)));
1966 CPU (h_vbit) = opval;
1967 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
1968 }
1969{
1970 {
1971 BI opval = 0;
1972 CPU (h_xbit) = opval;
1973 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
1974 }
1975 {
1976 BI opval = 0;
1977 SET_H_INSN_PREFIXED_P (opval);
1978 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
1979 }
1980}
1981}
1982}
1983
1984#undef FLD
1985}
1986 NEXT (vpc);
1987
1988 CASE (sem, INSN_CMPQ) : /* cmpq $i,$Rd */
1989{
1990 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1991 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1992#define FLD(f) abuf->fields.sfmt_andq.f
1993 int UNUSED written = 0;
1994 IADDR UNUSED pc = abuf->addr;
1995 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1996
1997{
1998 SI tmp_tmpopd;
1999 SI tmp_tmpops;
2000 BI tmp_carry;
2001 SI tmp_newval;
2002 tmp_tmpops = FLD (f_s6);
2003 tmp_tmpopd = GET_H_GR (FLD (f_operand2));
2004 tmp_carry = CPU (h_cbit);
2005 tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
2006((void) 0); /*nop*/
2007{
2008 {
2009 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0))));
2010 CPU (h_cbit) = opval;
2011 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
2012 }
2013 {
2014 BI opval = LTSI (tmp_newval, 0);
2015 CPU (h_nbit) = opval;
2016 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
2017 }
2018 {
2019 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
2020 CPU (h_zbit) = opval;
2021 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
2022 }
2023 {
2024 BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0)));
2025 CPU (h_vbit) = opval;
2026 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
2027 }
2028{
2029 {
2030 BI opval = 0;
2031 CPU (h_xbit) = opval;
2032 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
2033 }
2034 {
2035 BI opval = 0;
2036 SET_H_INSN_PREFIXED_P (opval);
2037 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
2038 }
2039}
2040}
2041}
2042
2043#undef FLD
2044}
2045 NEXT (vpc);
2046
2047 CASE (sem, INSN_CMPS_M_B_M) : /* cmps-m.b [${Rs}${inc}],$Rd */
2048{
2049 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2050 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2051#define FLD(f) abuf->fields.sfmt_bound_m_b_m.f
2052 int UNUSED written = 0;
2053 IADDR UNUSED pc = abuf->addr;
2054 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2055
2056{
2057 SI tmp_tmpopd;
2058 SI tmp_tmpops;
2059 BI tmp_carry;
2060 SI tmp_newval;
2061 tmp_tmpops = EXTQISI (({ SI tmp_addr;
2062 QI tmp_tmp_mem;
2063 BI tmp_postinc;
2064 tmp_postinc = FLD (f_memmode);
2065; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
2066; tmp_tmp_mem = GETMEMQI (current_cpu, pc, tmp_addr);
2067; if (NEBI (tmp_postinc, 0)) {
2068{
2069if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
2070 tmp_addr = ADDSI (tmp_addr, 1);
2071}
2072 {
2073 SI opval = tmp_addr;
2074 SET_H_GR (FLD (f_operand1), opval);
2075 written |= (1 << 9);
2076 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2077 }
2078}
2079}
2080; tmp_tmp_mem; }));
2081 tmp_tmpopd = GET_H_GR (FLD (f_operand2));
2082 tmp_carry = CPU (h_cbit);
2083 tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
2084((void) 0); /*nop*/
2085{
2086 {
2087 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0))));
2088 CPU (h_cbit) = opval;
2089 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
2090 }
2091 {
2092 BI opval = LTSI (tmp_newval, 0);
2093 CPU (h_nbit) = opval;
2094 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
2095 }
2096 {
2097 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
2098 CPU (h_zbit) = opval;
2099 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
2100 }
2101 {
2102 BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0)));
2103 CPU (h_vbit) = opval;
2104 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
2105 }
2106{
2107 {
2108 BI opval = 0;
2109 CPU (h_xbit) = opval;
2110 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
2111 }
2112 {
2113 BI opval = 0;
2114 SET_H_INSN_PREFIXED_P (opval);
2115 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
2116 }
2117}
2118}
2119}
2120
2121 abuf->written = written;
2122#undef FLD
2123}
2124 NEXT (vpc);
2125
2126 CASE (sem, INSN_CMPS_M_W_M) : /* cmps-m.w [${Rs}${inc}],$Rd */
2127{
2128 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2129 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2130#define FLD(f) abuf->fields.sfmt_bound_m_b_m.f
2131 int UNUSED written = 0;
2132 IADDR UNUSED pc = abuf->addr;
2133 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2134
2135{
2136 SI tmp_tmpopd;
2137 SI tmp_tmpops;
2138 BI tmp_carry;
2139 SI tmp_newval;
2140 tmp_tmpops = EXTHISI (({ SI tmp_addr;
2141 HI tmp_tmp_mem;
2142 BI tmp_postinc;
2143 tmp_postinc = FLD (f_memmode);
2144; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
2145; tmp_tmp_mem = GETMEMHI (current_cpu, pc, tmp_addr);
2146; if (NEBI (tmp_postinc, 0)) {
2147{
2148if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
2149 tmp_addr = ADDSI (tmp_addr, 2);
2150}
2151 {
2152 SI opval = tmp_addr;
2153 SET_H_GR (FLD (f_operand1), opval);
2154 written |= (1 << 9);
2155 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2156 }
2157}
2158}
2159; tmp_tmp_mem; }));
2160 tmp_tmpopd = GET_H_GR (FLD (f_operand2));
2161 tmp_carry = CPU (h_cbit);
2162 tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
2163((void) 0); /*nop*/
2164{
2165 {
2166 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0))));
2167 CPU (h_cbit) = opval;
2168 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
2169 }
2170 {
2171 BI opval = LTSI (tmp_newval, 0);
2172 CPU (h_nbit) = opval;
2173 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
2174 }
2175 {
2176 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
2177 CPU (h_zbit) = opval;
2178 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
2179 }
2180 {
2181 BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0)));
2182 CPU (h_vbit) = opval;
2183 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
2184 }
2185{
2186 {
2187 BI opval = 0;
2188 CPU (h_xbit) = opval;
2189 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
2190 }
2191 {
2192 BI opval = 0;
2193 SET_H_INSN_PREFIXED_P (opval);
2194 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
2195 }
2196}
2197}
2198}
2199
2200 abuf->written = written;
2201#undef FLD
2202}
2203 NEXT (vpc);
2204
2205 CASE (sem, INSN_CMPSCBR) : /* [${Rs}${inc}],$Rd */
2206{
2207 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2208 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2209#define FLD(f) abuf->fields.sfmt_bound_cb.f
2210 int UNUSED written = 0;
2211 IADDR UNUSED pc = abuf->addr;
2212 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2213
2214{
2215 SI tmp_tmpopd;
2216 SI tmp_tmpops;
2217 BI tmp_carry;
2218 SI tmp_newval;
2219 tmp_tmpops = EXTQISI (TRUNCSIQI (FLD (f_indir_pc__byte)));
2220 tmp_tmpopd = GET_H_GR (FLD (f_operand2));
2221 tmp_carry = CPU (h_cbit);
2222 tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
2223((void) 0); /*nop*/
2224{
2225 {
2226 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0))));
2227 CPU (h_cbit) = opval;
2228 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
2229 }
2230 {
2231 BI opval = LTSI (tmp_newval, 0);
2232 CPU (h_nbit) = opval;
2233 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
2234 }
2235 {
2236 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
2237 CPU (h_zbit) = opval;
2238 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
2239 }
2240 {
2241 BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0)));
2242 CPU (h_vbit) = opval;
2243 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
2244 }
2245{
2246 {
2247 BI opval = 0;
2248 CPU (h_xbit) = opval;
2249 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
2250 }
2251 {
2252 BI opval = 0;
2253 SET_H_INSN_PREFIXED_P (opval);
2254 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
2255 }
2256}
2257}
2258}
2259
2260#undef FLD
2261}
2262 NEXT (vpc);
2263
2264 CASE (sem, INSN_CMPSCWR) : /* [${Rs}${inc}],$Rd */
2265{
2266 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2267 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2268#define FLD(f) abuf->fields.sfmt_bound_cw.f
2269 int UNUSED written = 0;
2270 IADDR UNUSED pc = abuf->addr;
2271 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2272
2273{
2274 SI tmp_tmpopd;
2275 SI tmp_tmpops;
2276 BI tmp_carry;
2277 SI tmp_newval;
2278 tmp_tmpops = EXTHISI (TRUNCSIHI (FLD (f_indir_pc__word)));
2279 tmp_tmpopd = GET_H_GR (FLD (f_operand2));
2280 tmp_carry = CPU (h_cbit);
2281 tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
2282((void) 0); /*nop*/
2283{
2284 {
2285 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0))));
2286 CPU (h_cbit) = opval;
2287 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
2288 }
2289 {
2290 BI opval = LTSI (tmp_newval, 0);
2291 CPU (h_nbit) = opval;
2292 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
2293 }
2294 {
2295 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
2296 CPU (h_zbit) = opval;
2297 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
2298 }
2299 {
2300 BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0)));
2301 CPU (h_vbit) = opval;
2302 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
2303 }
2304{
2305 {
2306 BI opval = 0;
2307 CPU (h_xbit) = opval;
2308 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
2309 }
2310 {
2311 BI opval = 0;
2312 SET_H_INSN_PREFIXED_P (opval);
2313 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
2314 }
2315}
2316}
2317}
2318
2319#undef FLD
2320}
2321 NEXT (vpc);
2322
2323 CASE (sem, INSN_CMPU_M_B_M) : /* cmpu-m.b [${Rs}${inc}],$Rd */
2324{
2325 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2326 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2327#define FLD(f) abuf->fields.sfmt_bound_m_b_m.f
2328 int UNUSED written = 0;
2329 IADDR UNUSED pc = abuf->addr;
2330 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2331
2332{
2333 SI tmp_tmpopd;
2334 SI tmp_tmpops;
2335 BI tmp_carry;
2336 SI tmp_newval;
2337 tmp_tmpops = ZEXTQISI (({ SI tmp_addr;
2338 QI tmp_tmp_mem;
2339 BI tmp_postinc;
2340 tmp_postinc = FLD (f_memmode);
2341; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
2342; tmp_tmp_mem = GETMEMQI (current_cpu, pc, tmp_addr);
2343; if (NEBI (tmp_postinc, 0)) {
2344{
2345if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
2346 tmp_addr = ADDSI (tmp_addr, 1);
2347}
2348 {
2349 SI opval = tmp_addr;
2350 SET_H_GR (FLD (f_operand1), opval);
2351 written |= (1 << 9);
2352 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2353 }
2354}
2355}
2356; tmp_tmp_mem; }));
2357 tmp_tmpopd = GET_H_GR (FLD (f_operand2));
2358 tmp_carry = CPU (h_cbit);
2359 tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
2360((void) 0); /*nop*/
2361{
2362 {
2363 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0))));
2364 CPU (h_cbit) = opval;
2365 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
2366 }
2367 {
2368 BI opval = LTSI (tmp_newval, 0);
2369 CPU (h_nbit) = opval;
2370 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
2371 }
2372 {
2373 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
2374 CPU (h_zbit) = opval;
2375 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
2376 }
2377 {
2378 BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0)));
2379 CPU (h_vbit) = opval;
2380 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
2381 }
2382{
2383 {
2384 BI opval = 0;
2385 CPU (h_xbit) = opval;
2386 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
2387 }
2388 {
2389 BI opval = 0;
2390 SET_H_INSN_PREFIXED_P (opval);
2391 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
2392 }
2393}
2394}
2395}
2396
2397 abuf->written = written;
2398#undef FLD
2399}
2400 NEXT (vpc);
2401
2402 CASE (sem, INSN_CMPU_M_W_M) : /* cmpu-m.w [${Rs}${inc}],$Rd */
2403{
2404 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2405 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2406#define FLD(f) abuf->fields.sfmt_bound_m_b_m.f
2407 int UNUSED written = 0;
2408 IADDR UNUSED pc = abuf->addr;
2409 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2410
2411{
2412 SI tmp_tmpopd;
2413 SI tmp_tmpops;
2414 BI tmp_carry;
2415 SI tmp_newval;
2416 tmp_tmpops = ZEXTHISI (({ SI tmp_addr;
2417 HI tmp_tmp_mem;
2418 BI tmp_postinc;
2419 tmp_postinc = FLD (f_memmode);
2420; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
2421; tmp_tmp_mem = GETMEMHI (current_cpu, pc, tmp_addr);
2422; if (NEBI (tmp_postinc, 0)) {
2423{
2424if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
2425 tmp_addr = ADDSI (tmp_addr, 2);
2426}
2427 {
2428 SI opval = tmp_addr;
2429 SET_H_GR (FLD (f_operand1), opval);
2430 written |= (1 << 9);
2431 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2432 }
2433}
2434}
2435; tmp_tmp_mem; }));
2436 tmp_tmpopd = GET_H_GR (FLD (f_operand2));
2437 tmp_carry = CPU (h_cbit);
2438 tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
2439((void) 0); /*nop*/
2440{
2441 {
2442 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0))));
2443 CPU (h_cbit) = opval;
2444 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
2445 }
2446 {
2447 BI opval = LTSI (tmp_newval, 0);
2448 CPU (h_nbit) = opval;
2449 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
2450 }
2451 {
2452 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
2453 CPU (h_zbit) = opval;
2454 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
2455 }
2456 {
2457 BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0)));
2458 CPU (h_vbit) = opval;
2459 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
2460 }
2461{
2462 {
2463 BI opval = 0;
2464 CPU (h_xbit) = opval;
2465 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
2466 }
2467 {
2468 BI opval = 0;
2469 SET_H_INSN_PREFIXED_P (opval);
2470 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
2471 }
2472}
2473}
2474}
2475
2476 abuf->written = written;
2477#undef FLD
2478}
2479 NEXT (vpc);
2480
2481 CASE (sem, INSN_CMPUCBR) : /* [${Rs}${inc}],$Rd */
2482{
2483 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2484 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2485#define FLD(f) abuf->fields.sfmt_bound_cb.f
2486 int UNUSED written = 0;
2487 IADDR UNUSED pc = abuf->addr;
2488 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2489
2490{
2491 SI tmp_tmpopd;
2492 SI tmp_tmpops;
2493 BI tmp_carry;
2494 SI tmp_newval;
2495 tmp_tmpops = ZEXTQISI (TRUNCSIQI (FLD (f_indir_pc__byte)));
2496 tmp_tmpopd = GET_H_GR (FLD (f_operand2));
2497 tmp_carry = CPU (h_cbit);
2498 tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
2499((void) 0); /*nop*/
2500{
2501 {
2502 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0))));
2503 CPU (h_cbit) = opval;
2504 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
2505 }
2506 {
2507 BI opval = LTSI (tmp_newval, 0);
2508 CPU (h_nbit) = opval;
2509 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
2510 }
2511 {
2512 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
2513 CPU (h_zbit) = opval;
2514 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
2515 }
2516 {
2517 BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0)));
2518 CPU (h_vbit) = opval;
2519 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
2520 }
2521{
2522 {
2523 BI opval = 0;
2524 CPU (h_xbit) = opval;
2525 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
2526 }
2527 {
2528 BI opval = 0;
2529 SET_H_INSN_PREFIXED_P (opval);
2530 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
2531 }
2532}
2533}
2534}
2535
2536#undef FLD
2537}
2538 NEXT (vpc);
2539
2540 CASE (sem, INSN_CMPUCWR) : /* [${Rs}${inc}],$Rd */
2541{
2542 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2543 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2544#define FLD(f) abuf->fields.sfmt_bound_cw.f
2545 int UNUSED written = 0;
2546 IADDR UNUSED pc = abuf->addr;
2547 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2548
2549{
2550 SI tmp_tmpopd;
2551 SI tmp_tmpops;
2552 BI tmp_carry;
2553 SI tmp_newval;
2554 tmp_tmpops = ZEXTHISI (TRUNCSIHI (FLD (f_indir_pc__word)));
2555 tmp_tmpopd = GET_H_GR (FLD (f_operand2));
2556 tmp_carry = CPU (h_cbit);
2557 tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
2558((void) 0); /*nop*/
2559{
2560 {
2561 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0))));
2562 CPU (h_cbit) = opval;
2563 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
2564 }
2565 {
2566 BI opval = LTSI (tmp_newval, 0);
2567 CPU (h_nbit) = opval;
2568 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
2569 }
2570 {
2571 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
2572 CPU (h_zbit) = opval;
2573 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
2574 }
2575 {
2576 BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0)));
2577 CPU (h_vbit) = opval;
2578 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
2579 }
2580{
2581 {
2582 BI opval = 0;
2583 CPU (h_xbit) = opval;
2584 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
2585 }
2586 {
2587 BI opval = 0;
2588 SET_H_INSN_PREFIXED_P (opval);
2589 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
2590 }
2591}
2592}
2593}
2594
2595#undef FLD
2596}
2597 NEXT (vpc);
2598
2599 CASE (sem, INSN_MOVE_M_B_M) : /* move-m.b [${Rs}${inc}],${Rd} */
2600{
2601 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2602 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2603#define FLD(f) abuf->fields.sfmt_add_m_b_m.f
2604 int UNUSED written = 0;
2605 IADDR UNUSED pc = abuf->addr;
2606 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2607
2608{
2609 SI tmp_tmp;
2610 tmp_tmp = ({ SI tmp_addr;
2611 QI tmp_tmp_mem;
2612 BI tmp_postinc;
2613 tmp_postinc = FLD (f_memmode);
2614; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
2615; tmp_tmp_mem = GETMEMQI (current_cpu, pc, tmp_addr);
2616; if (NEBI (tmp_postinc, 0)) {
2617{
2618if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
2619 tmp_addr = ADDSI (tmp_addr, 1);
2620}
2621 {
2622 SI opval = tmp_addr;
2623 SET_H_GR (FLD (f_operand1), opval);
2624 written |= (1 << 10);
2625 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2626 }
2627}
2628}
2629; tmp_tmp_mem; });
2630{
2631 SI tmp_oldregval;
2632 tmp_oldregval = GET_H_RAW_GR_PC (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))));
2633 {
2634 SI opval = ORSI (ANDSI (tmp_tmp, 255), ANDSI (tmp_oldregval, 0xffffff00));
2635 SET_H_GR (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))), opval);
2636 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2637 }
2638}
2639{
2640 {
2641 BI opval = LTQI (tmp_tmp, 0);
2642 CPU (h_nbit) = opval;
2643 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
2644 }
2645 {
2646 BI opval = ANDIF (EQQI (tmp_tmp, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
2647 CPU (h_zbit) = opval;
2648 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
2649 }
2650SET_H_CBIT_MOVE (0);
2651SET_H_VBIT_MOVE (0);
2652{
2653 {
2654 BI opval = 0;
2655 CPU (h_xbit) = opval;
2656 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
2657 }
2658 {
2659 BI opval = 0;
2660 SET_H_INSN_PREFIXED_P (opval);
2661 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
2662 }
2663}
2664}
2665}
2666
2667 abuf->written = written;
2668#undef FLD
2669}
2670 NEXT (vpc);
2671
2672 CASE (sem, INSN_MOVE_M_W_M) : /* move-m.w [${Rs}${inc}],${Rd} */
2673{
2674 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2675 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2676#define FLD(f) abuf->fields.sfmt_add_m_b_m.f
2677 int UNUSED written = 0;
2678 IADDR UNUSED pc = abuf->addr;
2679 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2680
2681{
2682 SI tmp_tmp;
2683 tmp_tmp = ({ SI tmp_addr;
2684 HI tmp_tmp_mem;
2685 BI tmp_postinc;
2686 tmp_postinc = FLD (f_memmode);
2687; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
2688; tmp_tmp_mem = GETMEMHI (current_cpu, pc, tmp_addr);
2689; if (NEBI (tmp_postinc, 0)) {
2690{
2691if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
2692 tmp_addr = ADDSI (tmp_addr, 2);
2693}
2694 {
2695 SI opval = tmp_addr;
2696 SET_H_GR (FLD (f_operand1), opval);
2697 written |= (1 << 10);
2698 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2699 }
2700}
2701}
2702; tmp_tmp_mem; });
2703{
2704 SI tmp_oldregval;
2705 tmp_oldregval = GET_H_RAW_GR_PC (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))));
2706 {
2707 SI opval = ORSI (ANDSI (tmp_tmp, 65535), ANDSI (tmp_oldregval, 0xffff0000));
2708 SET_H_GR (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))), opval);
2709 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2710 }
2711}
2712{
2713 {
2714 BI opval = LTHI (tmp_tmp, 0);
2715 CPU (h_nbit) = opval;
2716 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
2717 }
2718 {
2719 BI opval = ANDIF (EQHI (tmp_tmp, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
2720 CPU (h_zbit) = opval;
2721 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
2722 }
2723SET_H_CBIT_MOVE (0);
2724SET_H_VBIT_MOVE (0);
2725{
2726 {
2727 BI opval = 0;
2728 CPU (h_xbit) = opval;
2729 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
2730 }
2731 {
2732 BI opval = 0;
2733 SET_H_INSN_PREFIXED_P (opval);
2734 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
2735 }
2736}
2737}
2738}
2739
2740 abuf->written = written;
2741#undef FLD
2742}
2743 NEXT (vpc);
2744
2745 CASE (sem, INSN_MOVE_M_D_M) : /* move-m.d [${Rs}${inc}],${Rd} */
2746{
2747 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2748 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2749#define FLD(f) abuf->fields.sfmt_add_m_b_m.f
2750 int UNUSED written = 0;
2751 IADDR UNUSED pc = abuf->addr;
2752 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2753
2754{
2755 SI tmp_tmp;
2756 tmp_tmp = ({ SI tmp_addr;
2757 SI tmp_tmp_mem;
2758 BI tmp_postinc;
2759 tmp_postinc = FLD (f_memmode);
2760; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
2761; tmp_tmp_mem = GETMEMSI (current_cpu, pc, tmp_addr);
2762; if (NEBI (tmp_postinc, 0)) {
2763{
2764if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
2765 tmp_addr = ADDSI (tmp_addr, 4);
2766}
2767 {
2768 SI opval = tmp_addr;
2769 SET_H_GR (FLD (f_operand1), opval);
2770 written |= (1 << 9);
2771 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2772 }
2773}
2774}
2775; tmp_tmp_mem; });
2776 {
2777 SI opval = tmp_tmp;
2778 SET_H_GR (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))), opval);
2779 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2780 }
2781{
2782 {
2783 BI opval = LTSI (tmp_tmp, 0);
2784 CPU (h_nbit) = opval;
2785 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
2786 }
2787 {
2788 BI opval = ANDIF (EQSI (tmp_tmp, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
2789 CPU (h_zbit) = opval;
2790 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
2791 }
2792SET_H_CBIT_MOVE (0);
2793SET_H_VBIT_MOVE (0);
2794{
2795 {
2796 BI opval = 0;
2797 CPU (h_xbit) = opval;
2798 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
2799 }
2800 {
2801 BI opval = 0;
2802 SET_H_INSN_PREFIXED_P (opval);
2803 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
2804 }
2805}
2806}
2807}
2808
2809 abuf->written = written;
2810#undef FLD
2811}
2812 NEXT (vpc);
2813
2814 CASE (sem, INSN_MOVS_M_B_M) : /* movs-m.b [${Rs}${inc}],${Rd} */
2815{
2816 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2817 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2818#define FLD(f) abuf->fields.sfmt_bound_m_b_m.f
2819 int UNUSED written = 0;
2820 IADDR UNUSED pc = abuf->addr;
2821 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2822
2823{
2824 SI tmp_tmp;
2825 tmp_tmp = EXTQISI (({ SI tmp_addr;
2826 QI tmp_tmp_mem;
2827 BI tmp_postinc;
2828 tmp_postinc = FLD (f_memmode);
2829; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
2830; tmp_tmp_mem = GETMEMQI (current_cpu, pc, tmp_addr);
2831; if (NEBI (tmp_postinc, 0)) {
2832{
2833if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
2834 tmp_addr = ADDSI (tmp_addr, 1);
2835}
2836 {
2837 SI opval = tmp_addr;
2838 SET_H_GR (FLD (f_operand1), opval);
2839 written |= (1 << 8);
2840 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2841 }
2842}
2843}
2844; tmp_tmp_mem; }));
2845if (ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) {
2846 {
2847 SI opval = tmp_tmp;
2848 SET_H_GR (FLD (f_operand1), opval);
2849 written |= (1 << 8);
2850 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2851 }
2852} else {
2853 {
2854 SI opval = tmp_tmp;
2855 SET_H_GR (FLD (f_operand2), opval);
2856 written |= (1 << 7);
2857 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2858 }
2859}
2860{
2861 {
2862 BI opval = LTSI (tmp_tmp, 0);
2863 CPU (h_nbit) = opval;
2864 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
2865 }
2866 {
2867 BI opval = ANDIF (EQSI (tmp_tmp, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
2868 CPU (h_zbit) = opval;
2869 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
2870 }
2871SET_H_CBIT_MOVE (0);
2872SET_H_VBIT_MOVE (0);
2873{
2874 {
2875 BI opval = 0;
2876 CPU (h_xbit) = opval;
2877 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
2878 }
2879 {
2880 BI opval = 0;
2881 SET_H_INSN_PREFIXED_P (opval);
2882 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
2883 }
2884}
2885}
2886}
2887
2888 abuf->written = written;
2889#undef FLD
2890}
2891 NEXT (vpc);
2892
2893 CASE (sem, INSN_MOVS_M_W_M) : /* movs-m.w [${Rs}${inc}],${Rd} */
2894{
2895 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2896 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2897#define FLD(f) abuf->fields.sfmt_bound_m_b_m.f
2898 int UNUSED written = 0;
2899 IADDR UNUSED pc = abuf->addr;
2900 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2901
2902{
2903 SI tmp_tmp;
2904 tmp_tmp = EXTHISI (({ SI tmp_addr;
2905 HI tmp_tmp_mem;
2906 BI tmp_postinc;
2907 tmp_postinc = FLD (f_memmode);
2908; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
2909; tmp_tmp_mem = GETMEMHI (current_cpu, pc, tmp_addr);
2910; if (NEBI (tmp_postinc, 0)) {
2911{
2912if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
2913 tmp_addr = ADDSI (tmp_addr, 2);
2914}
2915 {
2916 SI opval = tmp_addr;
2917 SET_H_GR (FLD (f_operand1), opval);
2918 written |= (1 << 8);
2919 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2920 }
2921}
2922}
2923; tmp_tmp_mem; }));
2924if (ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) {
2925 {
2926 SI opval = tmp_tmp;
2927 SET_H_GR (FLD (f_operand1), opval);
2928 written |= (1 << 8);
2929 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2930 }
2931} else {
2932 {
2933 SI opval = tmp_tmp;
2934 SET_H_GR (FLD (f_operand2), opval);
2935 written |= (1 << 7);
2936 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2937 }
2938}
2939{
2940 {
2941 BI opval = LTSI (tmp_tmp, 0);
2942 CPU (h_nbit) = opval;
2943 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
2944 }
2945 {
2946 BI opval = ANDIF (EQSI (tmp_tmp, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
2947 CPU (h_zbit) = opval;
2948 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
2949 }
2950SET_H_CBIT_MOVE (0);
2951SET_H_VBIT_MOVE (0);
2952{
2953 {
2954 BI opval = 0;
2955 CPU (h_xbit) = opval;
2956 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
2957 }
2958 {
2959 BI opval = 0;
2960 SET_H_INSN_PREFIXED_P (opval);
2961 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
2962 }
2963}
2964}
2965}
2966
2967 abuf->written = written;
2968#undef FLD
2969}
2970 NEXT (vpc);
2971
2972 CASE (sem, INSN_MOVU_M_B_M) : /* movu-m.b [${Rs}${inc}],${Rd} */
2973{
2974 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2975 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2976#define FLD(f) abuf->fields.sfmt_bound_m_b_m.f
2977 int UNUSED written = 0;
2978 IADDR UNUSED pc = abuf->addr;
2979 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2980
2981{
2982 SI tmp_tmp;
2983 tmp_tmp = ZEXTQISI (({ SI tmp_addr;
2984 QI tmp_tmp_mem;
2985 BI tmp_postinc;
2986 tmp_postinc = FLD (f_memmode);
2987; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
2988; tmp_tmp_mem = GETMEMQI (current_cpu, pc, tmp_addr);
2989; if (NEBI (tmp_postinc, 0)) {
2990{
2991if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
2992 tmp_addr = ADDSI (tmp_addr, 1);
2993}
2994 {
2995 SI opval = tmp_addr;
2996 SET_H_GR (FLD (f_operand1), opval);
2997 written |= (1 << 8);
2998 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2999 }
3000}
3001}
3002; tmp_tmp_mem; }));
3003if (ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) {
3004 {
3005 SI opval = tmp_tmp;
3006 SET_H_GR (FLD (f_operand1), opval);
3007 written |= (1 << 8);
3008 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3009 }
3010} else {
3011 {
3012 SI opval = tmp_tmp;
3013 SET_H_GR (FLD (f_operand2), opval);
3014 written |= (1 << 7);
3015 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3016 }
3017}
3018{
3019 {
3020 BI opval = LTSI (tmp_tmp, 0);
3021 CPU (h_nbit) = opval;
3022 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
3023 }
3024 {
3025 BI opval = ANDIF (EQSI (tmp_tmp, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
3026 CPU (h_zbit) = opval;
3027 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
3028 }
3029SET_H_CBIT_MOVE (0);
3030SET_H_VBIT_MOVE (0);
3031{
3032 {
3033 BI opval = 0;
3034 CPU (h_xbit) = opval;
3035 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
3036 }
3037 {
3038 BI opval = 0;
3039 SET_H_INSN_PREFIXED_P (opval);
3040 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
3041 }
3042}
3043}
3044}
3045
3046 abuf->written = written;
3047#undef FLD
3048}
3049 NEXT (vpc);
3050
3051 CASE (sem, INSN_MOVU_M_W_M) : /* movu-m.w [${Rs}${inc}],${Rd} */
3052{
3053 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3054 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3055#define FLD(f) abuf->fields.sfmt_bound_m_b_m.f
3056 int UNUSED written = 0;
3057 IADDR UNUSED pc = abuf->addr;
3058 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3059
3060{
3061 SI tmp_tmp;
3062 tmp_tmp = ZEXTHISI (({ SI tmp_addr;
3063 HI tmp_tmp_mem;
3064 BI tmp_postinc;
3065 tmp_postinc = FLD (f_memmode);
3066; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
3067; tmp_tmp_mem = GETMEMHI (current_cpu, pc, tmp_addr);
3068; if (NEBI (tmp_postinc, 0)) {
3069{
3070if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
3071 tmp_addr = ADDSI (tmp_addr, 2);
3072}
3073 {
3074 SI opval = tmp_addr;
3075 SET_H_GR (FLD (f_operand1), opval);
3076 written |= (1 << 8);
3077 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3078 }
3079}
3080}
3081; tmp_tmp_mem; }));
3082if (ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) {
3083 {
3084 SI opval = tmp_tmp;
3085 SET_H_GR (FLD (f_operand1), opval);
3086 written |= (1 << 8);
3087 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3088 }
3089} else {
3090 {
3091 SI opval = tmp_tmp;
3092 SET_H_GR (FLD (f_operand2), opval);
3093 written |= (1 << 7);
3094 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3095 }
3096}
3097{
3098 {
3099 BI opval = LTSI (tmp_tmp, 0);
3100 CPU (h_nbit) = opval;
3101 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
3102 }
3103 {
3104 BI opval = ANDIF (EQSI (tmp_tmp, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
3105 CPU (h_zbit) = opval;
3106 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
3107 }
3108SET_H_CBIT_MOVE (0);
3109SET_H_VBIT_MOVE (0);
3110{
3111 {
3112 BI opval = 0;
3113 CPU (h_xbit) = opval;
3114 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
3115 }
3116 {
3117 BI opval = 0;
3118 SET_H_INSN_PREFIXED_P (opval);
3119 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
3120 }
3121}
3122}
3123}
3124
3125 abuf->written = written;
3126#undef FLD
3127}
3128 NEXT (vpc);
3129
3130 CASE (sem, INSN_MOVE_R_SPRV10) : /* move ${Rs},${Pd} */
3131{
3132 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3133 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3134#define FLD(f) abuf->fields.sfmt_move_m_sprv10.f
3135 int UNUSED written = 0;
3136 IADDR UNUSED pc = abuf->addr;
3137 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3138
3139{
3140 SI tmp_tmp;
3141 SI tmp_rno;
3142 tmp_tmp = GET_H_GR (FLD (f_operand1));
3143 tmp_rno = FLD (f_operand2);
3144if (ORIF (ORIF (EQSI (tmp_rno, 0), EQSI (tmp_rno, 1)), ORIF (EQSI (tmp_rno, 4), EQSI (tmp_rno, 8)))) {
3145cgen_rtx_error (current_cpu, "move-r-spr: trying to set a read-only special register");
3146}
3147 else {
3148 {
3149 SI opval = tmp_tmp;
3150 SET_H_SR (FLD (f_operand2), opval);
3151 written |= (1 << 2);
3152 TRACE_RESULT (current_cpu, abuf, "sr", 'x', opval);
3153 }
3154}
3155{
3156 {
3157 BI opval = 0;
3158 CPU (h_xbit) = opval;
3159 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
3160 }
3161 {
3162 BI opval = 0;
3163 SET_H_INSN_PREFIXED_P (opval);
3164 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
3165 }
3166}
3167}
3168
3169 abuf->written = written;
3170#undef FLD
3171}
3172 NEXT (vpc);
3173
3174 CASE (sem, INSN_MOVE_SPR_RV10) : /* move ${Ps},${Rd-sfield} */
3175{
3176 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3177 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3178#define FLD(f) abuf->fields.sfmt_move_spr_rv10.f
3179 int UNUSED written = 0;
3180 IADDR UNUSED pc = abuf->addr;
3181 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3182
3183{
3184 SI tmp_grno;
3185 SI tmp_prno;
3186 SI tmp_newval;
3187 tmp_prno = FLD (f_operand2);
3188 tmp_newval = GET_H_SR (FLD (f_operand2));
392753ae 3189if (EQSI (tmp_prno, 5)) {
f6bcefef
HPN		 3190{
3191 SI tmp_oldregval;
3192 tmp_oldregval = GET_H_RAW_GR_PC (FLD (f_operand1));
3193 {
392753ae 3194 SI opval = ORSI (ANDSI (tmp_newval, 65535), ANDSI (tmp_oldregval, 0xffff0000));
f6bcefef
HPN		 3195 SET_H_GR (FLD (f_operand1), opval);
3196 written |= (1 << 4);
3197 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3198 }
3199}
3200}
392753ae 3201 else if (EQSI (tmp_prno, 9)) {
f6bcefef 3202 {
392753ae 3203 SI opval = tmp_newval;
f6bcefef
HPN		 3204 SET_H_GR (FLD (f_operand1), opval);
3205 written |= (1 << 4);
3206 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3207 }
3208}
392753ae 3209 else if (EQSI (tmp_prno, 10)) {
f6bcefef 3210 {
392753ae 3211 SI opval = tmp_newval;
f6bcefef
HPN		 3212 SET_H_GR (FLD (f_operand1), opval);
3213 written |= (1 << 4);
3214 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3215 }
3216}
392753ae 3217 else if (EQSI (tmp_prno, 11)) {
f6bcefef 3218 {
392753ae 3219 SI opval = tmp_newval;
f6bcefef
HPN		 3220 SET_H_GR (FLD (f_operand1), opval);
3221 written |= (1 << 4);
3222 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3223 }
3224}
392753ae 3225 else if (EQSI (tmp_prno, 12)) {
f6bcefef
HPN		 3226 {
3227 SI opval = tmp_newval;
3228 SET_H_GR (FLD (f_operand1), opval);
3229 written |= (1 << 4);
3230 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3231 }
3232}
392753ae 3233 else if (EQSI (tmp_prno, 13)) {
f6bcefef
HPN		 3234 {
3235 SI opval = tmp_newval;
3236 SET_H_GR (FLD (f_operand1), opval);
3237 written |= (1 << 4);
3238 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3239 }
3240}
392753ae
HPN		 3241 else if (EQSI (tmp_prno, 0)) {
3242{
3243 SI tmp_oldregval;
3244 tmp_oldregval = GET_H_RAW_GR_PC (FLD (f_operand1));
f6bcefef 3245 {
392753ae 3246 SI opval = ORSI (ANDSI (tmp_newval, 255), ANDSI (tmp_oldregval, 0xffffff00));
f6bcefef
HPN		 3247 SET_H_GR (FLD (f_operand1), opval);
3248 written |= (1 << 4);
3249 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3250 }
3251}
392753ae
HPN		 3252}
3253 else if (EQSI (tmp_prno, 1)) {
3254{
3255 SI tmp_oldregval;
3256 tmp_oldregval = GET_H_RAW_GR_PC (FLD (f_operand1));
f6bcefef 3257 {
392753ae 3258 SI opval = ORSI (ANDSI (tmp_newval, 255), ANDSI (tmp_oldregval, 0xffffff00));
f6bcefef
HPN		 3259 SET_H_GR (FLD (f_operand1), opval);
3260 written |= (1 << 4);
3261 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3262 }
3263}
392753ae
HPN		 3264}
3265 else if (EQSI (tmp_prno, 4)) {
3266{
3267 SI tmp_oldregval;
3268 tmp_oldregval = GET_H_RAW_GR_PC (FLD (f_operand1));
f6bcefef 3269 {
392753ae 3270 SI opval = ORSI (ANDSI (tmp_newval, 65535), ANDSI (tmp_oldregval, 0xffff0000));
f6bcefef
HPN		 3271 SET_H_GR (FLD (f_operand1), opval);
3272 written |= (1 << 4);
3273 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3274 }
3275}
392753ae
HPN		 3276}
3277 else if (EQSI (tmp_prno, 8)) {
f6bcefef
HPN		 3278 {
3279 SI opval = tmp_newval;
3280 SET_H_GR (FLD (f_operand1), opval);
3281 written |= (1 << 4);
3282 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3283 }
3284}
3285 else if (EQSI (tmp_prno, 7)) {
3286 {
3287 SI opval = tmp_newval;
3288 SET_H_GR (FLD (f_operand1), opval);
3289 written |= (1 << 4);
3290 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3291 }
3292}
3293 else if (EQSI (tmp_prno, 14)) {
3294 {
3295 SI opval = tmp_newval;
3296 SET_H_GR (FLD (f_operand1), opval);
3297 written |= (1 << 4);
3298 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3299 }
3300}
3301 else if (EQSI (tmp_prno, 15)) {
3302 {
3303 SI opval = tmp_newval;
3304 SET_H_GR (FLD (f_operand1), opval);
3305 written |= (1 << 4);
3306 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3307 }
3308}
3309 else {
3310cgen_rtx_error (current_cpu, "move-spr-r from unimplemented register");
3311}
3312{
3313 {
3314 BI opval = 0;
3315 CPU (h_xbit) = opval;
3316 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
3317 }
3318 {
3319 BI opval = 0;
3320 SET_H_INSN_PREFIXED_P (opval);
3321 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
3322 }
3323}
3324}
3325
3326 abuf->written = written;
3327#undef FLD
3328}
3329 NEXT (vpc);
3330
3331 CASE (sem, INSN_RET_TYPE) : /* ret/reti/retb */
3332{
3333 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3334 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3335#define FLD(f) abuf->fields.sfmt_move_spr_rv10.f
3336 int UNUSED written = 0;
3337 IADDR UNUSED pc = abuf->addr;
3338 SEM_BRANCH_INIT
3339 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3340
3341{
3342 SI tmp_retaddr;
3343 tmp_retaddr = GET_H_SR (FLD (f_operand2));
3344{
3345 {
3346 BI opval = 0;
3347 CPU (h_xbit) = opval;
3348 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
3349 }
3350 {
3351 BI opval = 0;
3352 SET_H_INSN_PREFIXED_P (opval);
3353 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
3354 }
3355}
3356{
3357 {
3358 USI opval = tmp_retaddr;
3359 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
3360 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3361 }
3362}
3363}
3364
3365 SEM_BRANCH_FINI (vpc);
3366#undef FLD
3367}
3368 NEXT (vpc);
3369
3370 CASE (sem, INSN_MOVE_M_SPRV10) : /* move [${Rs}${inc}],${Pd} */
3371{
3372 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3373 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3374#define FLD(f) abuf->fields.sfmt_move_m_sprv10.f
3375 int UNUSED written = 0;
3376 IADDR UNUSED pc = abuf->addr;
3377 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3378
3379{
3380 SI tmp_rno;
3381 SI tmp_newval;
3382 tmp_rno = FLD (f_operand2);
392753ae 3383if (EQSI (tmp_rno, 5)) {
f6bcefef
HPN		 3384 tmp_newval = EXTHISI (({ SI tmp_addr;
3385 HI tmp_tmp_mem;
3386 BI tmp_postinc;
3387 tmp_postinc = FLD (f_memmode);
3388; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
3389; tmp_tmp_mem = GETMEMHI (current_cpu, pc, tmp_addr);
3390; if (NEBI (tmp_postinc, 0)) {
3391{
3392if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
3393 tmp_addr = ADDSI (tmp_addr, 2);
3394}
3395 {
3396 SI opval = tmp_addr;
3397 SET_H_GR (FLD (f_operand1), opval);
392753ae 3398 written |= (1 << 8);
f6bcefef
HPN		 3399 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3400 }
3401}
3402}
3403; tmp_tmp_mem; }));
f6bcefef
HPN		 3404}
3405 else if (EQSI (tmp_rno, 9)) {
3406 tmp_newval = ({ SI tmp_addr;
3407 SI tmp_tmp_mem;
3408 BI tmp_postinc;
3409 tmp_postinc = FLD (f_memmode);
3410; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
3411; tmp_tmp_mem = GETMEMSI (current_cpu, pc, tmp_addr);
3412; if (NEBI (tmp_postinc, 0)) {
3413{
3414if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
3415 tmp_addr = ADDSI (tmp_addr, 4);
3416}
3417 {
3418 SI opval = tmp_addr;
3419 SET_H_GR (FLD (f_operand1), opval);
392753ae 3420 written |= (1 << 8);
f6bcefef
HPN		 3421 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3422 }
3423}
3424}
3425; tmp_tmp_mem; });
3426}
3427 else if (EQSI (tmp_rno, 10)) {
3428 tmp_newval = ({ SI tmp_addr;
3429 SI tmp_tmp_mem;
3430 BI tmp_postinc;
3431 tmp_postinc = FLD (f_memmode);
3432; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
3433; tmp_tmp_mem = GETMEMSI (current_cpu, pc, tmp_addr);
3434; if (NEBI (tmp_postinc, 0)) {
3435{
3436if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
3437 tmp_addr = ADDSI (tmp_addr, 4);
3438}
3439 {
3440 SI opval = tmp_addr;
3441 SET_H_GR (FLD (f_operand1), opval);
392753ae 3442 written |= (1 << 8);
f6bcefef
HPN		 3443 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3444 }
3445}
3446}
3447; tmp_tmp_mem; });
3448}
3449 else if (EQSI (tmp_rno, 11)) {
3450 tmp_newval = ({ SI tmp_addr;
3451 SI tmp_tmp_mem;
3452 BI tmp_postinc;
3453 tmp_postinc = FLD (f_memmode);
3454; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
3455; tmp_tmp_mem = GETMEMSI (current_cpu, pc, tmp_addr);
3456; if (NEBI (tmp_postinc, 0)) {
3457{
3458if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
3459 tmp_addr = ADDSI (tmp_addr, 4);
3460}
3461 {
3462 SI opval = tmp_addr;
3463 SET_H_GR (FLD (f_operand1), opval);
392753ae 3464 written |= (1 << 8);
f6bcefef
HPN		 3465 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3466 }
3467}
3468}
3469; tmp_tmp_mem; });
3470}
3471 else if (EQSI (tmp_rno, 12)) {
3472 tmp_newval = ({ SI tmp_addr;
3473 SI tmp_tmp_mem;
3474 BI tmp_postinc;
3475 tmp_postinc = FLD (f_memmode);
3476; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
3477; tmp_tmp_mem = GETMEMSI (current_cpu, pc, tmp_addr);
3478; if (NEBI (tmp_postinc, 0)) {
3479{
3480if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
3481 tmp_addr = ADDSI (tmp_addr, 4);
3482}
3483 {
3484 SI opval = tmp_addr;
3485 SET_H_GR (FLD (f_operand1), opval);
392753ae 3486 written |= (1 << 8);
f6bcefef
HPN		 3487 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3488 }
3489}
3490}
3491; tmp_tmp_mem; });
3492}
3493 else if (EQSI (tmp_rno, 13)) {
3494 tmp_newval = ({ SI tmp_addr;
3495 SI tmp_tmp_mem;
3496 BI tmp_postinc;
3497 tmp_postinc = FLD (f_memmode);
3498; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
3499; tmp_tmp_mem = GETMEMSI (current_cpu, pc, tmp_addr);
3500; if (NEBI (tmp_postinc, 0)) {
3501{
3502if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
3503 tmp_addr = ADDSI (tmp_addr, 4);
3504}
3505 {
3506 SI opval = tmp_addr;
3507 SET_H_GR (FLD (f_operand1), opval);
392753ae 3508 written |= (1 << 8);
f6bcefef
HPN		 3509 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3510 }
3511}
3512}
3513; tmp_tmp_mem; });
3514}
3515 else if (EQSI (tmp_rno, 7)) {
3516 tmp_newval = ({ SI tmp_addr;
3517 SI tmp_tmp_mem;
3518 BI tmp_postinc;
3519 tmp_postinc = FLD (f_memmode);
3520; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
3521; tmp_tmp_mem = GETMEMSI (current_cpu, pc, tmp_addr);
3522; if (NEBI (tmp_postinc, 0)) {
3523{
3524if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
3525 tmp_addr = ADDSI (tmp_addr, 4);
3526}
3527 {
3528 SI opval = tmp_addr;
3529 SET_H_GR (FLD (f_operand1), opval);
392753ae 3530 written |= (1 << 8);
f6bcefef
HPN		 3531 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3532 }
3533}
3534}
3535; tmp_tmp_mem; });
3536}
3537 else if (EQSI (tmp_rno, 14)) {
3538 tmp_newval = ({ SI tmp_addr;
3539 SI tmp_tmp_mem;
3540 BI tmp_postinc;
3541 tmp_postinc = FLD (f_memmode);
3542; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
3543; tmp_tmp_mem = GETMEMSI (current_cpu, pc, tmp_addr);
3544; if (NEBI (tmp_postinc, 0)) {
3545{
3546if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
3547 tmp_addr = ADDSI (tmp_addr, 4);
3548}
3549 {
3550 SI opval = tmp_addr;
3551 SET_H_GR (FLD (f_operand1), opval);
392753ae 3552 written |= (1 << 8);
f6bcefef
HPN		 3553 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3554 }
3555}
3556}
3557; tmp_tmp_mem; });
3558}
3559 else if (EQSI (tmp_rno, 15)) {
3560 tmp_newval = ({ SI tmp_addr;
3561 SI tmp_tmp_mem;
3562 BI tmp_postinc;
3563 tmp_postinc = FLD (f_memmode);
3564; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
3565; tmp_tmp_mem = GETMEMSI (current_cpu, pc, tmp_addr);
3566; if (NEBI (tmp_postinc, 0)) {
3567{
3568if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
3569 tmp_addr = ADDSI (tmp_addr, 4);
3570}
3571 {
3572 SI opval = tmp_addr;
3573 SET_H_GR (FLD (f_operand1), opval);
392753ae 3574 written |= (1 << 8);
f6bcefef
HPN		 3575 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3576 }
3577}
3578}
392753ae
HPN		 3579; tmp_tmp_mem; });
3580}
3581 else {
3582cgen_rtx_error (current_cpu, "Trying to set unimplemented special register");
3583}
f6bcefef 3584 {
392753ae 3585 SI opval = tmp_newval;
f6bcefef
HPN		 3586 SET_H_SR (FLD (f_operand2), opval);
3587 TRACE_RESULT (current_cpu, abuf, "sr", 'x', opval);
3588 }
3589{
3590 {
3591 BI opval = 0;
3592 CPU (h_xbit) = opval;
3593 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
3594 }
3595 {
3596 BI opval = 0;
3597 SET_H_INSN_PREFIXED_P (opval);
3598 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
3599 }
3600}
3601}
3602
392753ae 3603 abuf->written = written;
f6bcefef
HPN		 3604#undef FLD
3605}
3606 NEXT (vpc);
3607
392753ae 3608 CASE (sem, INSN_MOVE_C_SPRV10_P5) : /* move ${sconst16},${Pd} */
f6bcefef
HPN		 3609{
3610 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3611 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
392753ae 3612#define FLD(f) abuf->fields.sfmt_move_c_sprv10_p5.f
f6bcefef
HPN		 3613 int UNUSED written = 0;
3614 IADDR UNUSED pc = abuf->addr;
392753ae 3615 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
f6bcefef
HPN		 3616
3617{
3618 {
392753ae 3619 SI opval = FLD (f_indir_pc__word);
f6bcefef
HPN		 3620 SET_H_SR (FLD (f_operand2), opval);
3621 TRACE_RESULT (current_cpu, abuf, "sr", 'x', opval);
3622 }
3623{
3624 {
3625 BI opval = 0;
3626 CPU (h_xbit) = opval;
3627 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
3628 }
3629 {
3630 BI opval = 0;
3631 SET_H_INSN_PREFIXED_P (opval);
3632 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
3633 }
3634}
3635}
3636
3637#undef FLD
3638}
3639 NEXT (vpc);
3640
3641 CASE (sem, INSN_MOVE_C_SPRV10_P9) : /* move ${const32},${Pd} */
3642{
3643 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3644 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
392753ae 3645#define FLD(f) abuf->fields.sfmt_move_c_sprv10_p9.f
f6bcefef
HPN		 3646 int UNUSED written = 0;
3647 IADDR UNUSED pc = abuf->addr;
3648 vpc = SEM_NEXT_VPC (sem_arg, pc, 6);
3649
3650{
3651 {
3652 SI opval = FLD (f_indir_pc__dword);
3653 SET_H_SR (FLD (f_operand2), opval);
3654 TRACE_RESULT (current_cpu, abuf, "sr", 'x', opval);
3655 }
3656{
3657 {
3658 BI opval = 0;
3659 CPU (h_xbit) = opval;
3660 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
3661 }
3662 {
3663 BI opval = 0;
3664 SET_H_INSN_PREFIXED_P (opval);
3665 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
3666 }
3667}
3668}
3669
3670#undef FLD
3671}
3672 NEXT (vpc);
3673
3674 CASE (sem, INSN_MOVE_C_SPRV10_P10) : /* move ${const32},${Pd} */
3675{
3676 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3677 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
392753ae 3678#define FLD(f) abuf->fields.sfmt_move_c_sprv10_p9.f
f6bcefef
HPN		 3679 int UNUSED written = 0;
3680 IADDR UNUSED pc = abuf->addr;
3681 vpc = SEM_NEXT_VPC (sem_arg, pc, 6);
3682
3683{
3684 {
3685 SI opval = FLD (f_indir_pc__dword);
3686 SET_H_SR (FLD (f_operand2), opval);
3687 TRACE_RESULT (current_cpu, abuf, "sr", 'x', opval);
3688 }
3689{
3690 {
3691 BI opval = 0;
3692 CPU (h_xbit) = opval;
3693 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
3694 }
3695 {
3696 BI opval = 0;
3697 SET_H_INSN_PREFIXED_P (opval);
3698 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
3699 }
3700}
3701}
3702
3703#undef FLD
3704}
3705 NEXT (vpc);
3706
3707 CASE (sem, INSN_MOVE_C_SPRV10_P11) : /* move ${const32},${Pd} */
3708{
3709 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3710 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
392753ae 3711#define FLD(f) abuf->fields.sfmt_move_c_sprv10_p9.f
f6bcefef
HPN		 3712 int UNUSED written = 0;
3713 IADDR UNUSED pc = abuf->addr;
3714 vpc = SEM_NEXT_VPC (sem_arg, pc, 6);
3715
3716{
3717 {
3718 SI opval = FLD (f_indir_pc__dword);
3719 SET_H_SR (FLD (f_operand2), opval);
3720 TRACE_RESULT (current_cpu, abuf, "sr", 'x', opval);
3721 }
3722{
3723 {
3724 BI opval = 0;
3725 CPU (h_xbit) = opval;
3726 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
3727 }
3728 {
3729 BI opval = 0;
3730 SET_H_INSN_PREFIXED_P (opval);
3731 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
3732 }
3733}
3734}
3735
3736#undef FLD
3737}
3738 NEXT (vpc);
3739
3740 CASE (sem, INSN_MOVE_C_SPRV10_P12) : /* move ${const32},${Pd} */
3741{
3742 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3743 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
392753ae 3744#define FLD(f) abuf->fields.sfmt_move_c_sprv10_p9.f
f6bcefef
HPN		 3745 int UNUSED written = 0;
3746 IADDR UNUSED pc = abuf->addr;
3747 vpc = SEM_NEXT_VPC (sem_arg, pc, 6);
3748
3749{
3750 {
3751 SI opval = FLD (f_indir_pc__dword);
3752 SET_H_SR (FLD (f_operand2), opval);
3753 TRACE_RESULT (current_cpu, abuf, "sr", 'x', opval);
3754 }
3755{
3756 {
3757 BI opval = 0;
3758 CPU (h_xbit) = opval;
3759 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
3760 }
3761 {
3762 BI opval = 0;
3763 SET_H_INSN_PREFIXED_P (opval);
3764 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
3765 }
3766}
3767}
3768
3769#undef FLD
3770}
3771 NEXT (vpc);
3772
3773 CASE (sem, INSN_MOVE_C_SPRV10_P13) : /* move ${const32},${Pd} */
3774{
3775 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3776 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
392753ae 3777#define FLD(f) abuf->fields.sfmt_move_c_sprv10_p9.f
f6bcefef
HPN		 3778 int UNUSED written = 0;
3779 IADDR UNUSED pc = abuf->addr;
3780 vpc = SEM_NEXT_VPC (sem_arg, pc, 6);
3781
3782{
3783 {
3784 SI opval = FLD (f_indir_pc__dword);
3785 SET_H_SR (FLD (f_operand2), opval);
3786 TRACE_RESULT (current_cpu, abuf, "sr", 'x', opval);
3787 }
3788{
3789 {
3790 BI opval = 0;
3791 CPU (h_xbit) = opval;
3792 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
3793 }
3794 {
3795 BI opval = 0;
3796 SET_H_INSN_PREFIXED_P (opval);
3797 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
3798 }
3799}
3800}
3801
3802#undef FLD
3803}
3804 NEXT (vpc);
3805
3806 CASE (sem, INSN_MOVE_C_SPRV10_P7) : /* move ${const32},${Pd} */
3807{
3808 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3809 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
392753ae 3810#define FLD(f) abuf->fields.sfmt_move_c_sprv10_p9.f
f6bcefef
HPN		 3811 int UNUSED written = 0;
3812 IADDR UNUSED pc = abuf->addr;
3813 vpc = SEM_NEXT_VPC (sem_arg, pc, 6);
3814
3815{
3816 {
3817 SI opval = FLD (f_indir_pc__dword);
3818 SET_H_SR (FLD (f_operand2), opval);
3819 TRACE_RESULT (current_cpu, abuf, "sr", 'x', opval);
3820 }
3821{
3822 {
3823 BI opval = 0;
3824 CPU (h_xbit) = opval;
3825 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
3826 }
3827 {
3828 BI opval = 0;
3829 SET_H_INSN_PREFIXED_P (opval);
3830 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
3831 }
3832}
3833}
3834
3835#undef FLD
3836}
3837 NEXT (vpc);
3838
3839 CASE (sem, INSN_MOVE_C_SPRV10_P14) : /* move ${const32},${Pd} */
3840{
3841 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3842 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
392753ae 3843#define FLD(f) abuf->fields.sfmt_move_c_sprv10_p9.f
f6bcefef
HPN		 3844 int UNUSED written = 0;
3845 IADDR UNUSED pc = abuf->addr;
3846 vpc = SEM_NEXT_VPC (sem_arg, pc, 6);
3847
3848{
3849 {
3850 SI opval = FLD (f_indir_pc__dword);
3851 SET_H_SR (FLD (f_operand2), opval);
3852 TRACE_RESULT (current_cpu, abuf, "sr", 'x', opval);
3853 }
3854{
3855 {
3856 BI opval = 0;
3857 CPU (h_xbit) = opval;
3858 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
3859 }
3860 {
3861 BI opval = 0;
3862 SET_H_INSN_PREFIXED_P (opval);
3863 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
3864 }
3865}
3866}
3867
3868#undef FLD
3869}
3870 NEXT (vpc);
3871
3872 CASE (sem, INSN_MOVE_C_SPRV10_P15) : /* move ${const32},${Pd} */
3873{
3874 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3875 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
392753ae 3876#define FLD(f) abuf->fields.sfmt_move_c_sprv10_p9.f
f6bcefef
HPN		 3877 int UNUSED written = 0;
3878 IADDR UNUSED pc = abuf->addr;
3879 vpc = SEM_NEXT_VPC (sem_arg, pc, 6);
3880
3881{
3882 {
3883 SI opval = FLD (f_indir_pc__dword);
3884 SET_H_SR (FLD (f_operand2), opval);
3885 TRACE_RESULT (current_cpu, abuf, "sr", 'x', opval);
3886 }
3887{
3888 {
3889 BI opval = 0;
3890 CPU (h_xbit) = opval;
3891 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
3892 }
3893 {
3894 BI opval = 0;
3895 SET_H_INSN_PREFIXED_P (opval);
3896 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
3897 }
3898}
3899}
3900
3901#undef FLD
3902}
3903 NEXT (vpc);
3904
3905 CASE (sem, INSN_MOVE_SPR_MV10) : /* move ${Ps},[${Rd-sfield}${inc}] */
3906{
3907 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3908 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3909#define FLD(f) abuf->fields.sfmt_move_spr_mv10.f
3910 int UNUSED written = 0;
3911 IADDR UNUSED pc = abuf->addr;
3912 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3913
3914{
3915 SI tmp_rno;
3916 tmp_rno = FLD (f_operand2);
392753ae 3917if (EQSI (tmp_rno, 5)) {
f6bcefef
HPN		 3918{
3919 SI tmp_addr;
3920 BI tmp_postinc;
3921 tmp_postinc = FLD (f_memmode);
3922 tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
3923if (ANDIF (GET_H_V32_NON_V32 (), NEBI (CPU (h_xbit), 0))) {
3924if (EQBI (CPU (h_pbit), 0)) {
3925{
3926 {
392753ae
HPN		 3927 HI opval = GET_H_SR (FLD (f_operand2));
3928 SETMEMHI (current_cpu, pc, tmp_addr, opval);
3929 written |= (1 << 11);
f6bcefef
HPN		 3930 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
3931 }
3932 {
3933 BI opval = CPU (h_pbit);
3934 CPU (h_cbit) = opval;
3935 written |= (1 << 10);
3936 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
3937 }
3938}
3939} else {
3940 {
3941 BI opval = 1;
3942 CPU (h_cbit) = opval;
3943 written |= (1 << 10);
3944 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
3945 }
3946}
3947} else {
3948 {
392753ae
HPN		 3949 HI opval = GET_H_SR (FLD (f_operand2));
3950 SETMEMHI (current_cpu, pc, tmp_addr, opval);
3951 written |= (1 << 11);
f6bcefef
HPN		 3952 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
3953 }
3954}
3955if (NEBI (tmp_postinc, 0)) {
3956{
3957if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
392753ae 3958 tmp_addr = ADDSI (tmp_addr, 2);
f6bcefef
HPN		 3959}
3960 {
3961 SI opval = tmp_addr;
3962 SET_H_GR (FLD (f_operand1), opval);
3963 written |= (1 << 9);
3964 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3965 }
3966}
3967}
3968}
3969}
392753ae 3970 else if (EQSI (tmp_rno, 9)) {
f6bcefef
HPN		 3971{
3972 SI tmp_addr;
3973 BI tmp_postinc;
3974 tmp_postinc = FLD (f_memmode);
3975 tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
3976if (ANDIF (GET_H_V32_NON_V32 (), NEBI (CPU (h_xbit), 0))) {
3977if (EQBI (CPU (h_pbit), 0)) {
3978{
3979 {
392753ae
HPN		 3980 SI opval = GET_H_SR (FLD (f_operand2));
3981 SETMEMSI (current_cpu, pc, tmp_addr, opval);
3982 written |= (1 << 13);
f6bcefef
HPN		 3983 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
3984 }
3985 {
3986 BI opval = CPU (h_pbit);
3987 CPU (h_cbit) = opval;
3988 written |= (1 << 10);
3989 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
3990 }
3991}
3992} else {
3993 {
3994 BI opval = 1;
3995 CPU (h_cbit) = opval;
3996 written |= (1 << 10);
3997 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
3998 }
3999}
4000} else {
4001 {
392753ae
HPN		 4002 SI opval = GET_H_SR (FLD (f_operand2));
4003 SETMEMSI (current_cpu, pc, tmp_addr, opval);
4004 written |= (1 << 13);
f6bcefef
HPN		 4005 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
4006 }
4007}
4008if (NEBI (tmp_postinc, 0)) {
4009{
4010if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
392753ae 4011 tmp_addr = ADDSI (tmp_addr, 4);
f6bcefef
HPN		 4012}
4013 {
4014 SI opval = tmp_addr;
4015 SET_H_GR (FLD (f_operand1), opval);
4016 written |= (1 << 9);
4017 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4018 }
4019}
4020}
4021}
4022}
392753ae 4023 else if (EQSI (tmp_rno, 10)) {
f6bcefef
HPN		 4024{
4025 SI tmp_addr;
4026 BI tmp_postinc;
4027 tmp_postinc = FLD (f_memmode);
4028 tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
4029if (ANDIF (GET_H_V32_NON_V32 (), NEBI (CPU (h_xbit), 0))) {
4030if (EQBI (CPU (h_pbit), 0)) {
4031{
4032 {
392753ae
HPN		 4033 SI opval = GET_H_SR (FLD (f_operand2));
4034 SETMEMSI (current_cpu, pc, tmp_addr, opval);
4035 written |= (1 << 13);
f6bcefef
HPN		 4036 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
4037 }
4038 {
4039 BI opval = CPU (h_pbit);
4040 CPU (h_cbit) = opval;
4041 written |= (1 << 10);
4042 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
4043 }
4044}
4045} else {
4046 {
4047 BI opval = 1;
4048 CPU (h_cbit) = opval;
4049 written |= (1 << 10);
4050 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
4051 }
4052}
4053} else {
4054 {
392753ae
HPN		 4055 SI opval = GET_H_SR (FLD (f_operand2));
4056 SETMEMSI (current_cpu, pc, tmp_addr, opval);
4057 written |= (1 << 13);
f6bcefef
HPN		 4058 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
4059 }
4060}
4061if (NEBI (tmp_postinc, 0)) {
4062{
4063if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
392753ae 4064 tmp_addr = ADDSI (tmp_addr, 4);
f6bcefef
HPN		 4065}
4066 {
4067 SI opval = tmp_addr;
4068 SET_H_GR (FLD (f_operand1), opval);
4069 written |= (1 << 9);
4070 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4071 }
4072}
4073}
4074}
4075}
392753ae 4076 else if (EQSI (tmp_rno, 11)) {
f6bcefef
HPN		 4077{
4078 SI tmp_addr;
4079 BI tmp_postinc;
4080 tmp_postinc = FLD (f_memmode);
4081 tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
4082if (ANDIF (GET_H_V32_NON_V32 (), NEBI (CPU (h_xbit), 0))) {
4083if (EQBI (CPU (h_pbit), 0)) {
4084{
4085 {
392753ae
HPN		 4086 SI opval = GET_H_SR (FLD (f_operand2));
4087 SETMEMSI (current_cpu, pc, tmp_addr, opval);
4088 written |= (1 << 13);
f6bcefef
HPN		 4089 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
4090 }
4091 {
4092 BI opval = CPU (h_pbit);
4093 CPU (h_cbit) = opval;
4094 written |= (1 << 10);
4095 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
4096 }
4097}
4098} else {
4099 {
4100 BI opval = 1;
4101 CPU (h_cbit) = opval;
4102 written |= (1 << 10);
4103 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
4104 }
4105}
4106} else {
4107 {
392753ae
HPN		 4108 SI opval = GET_H_SR (FLD (f_operand2));
4109 SETMEMSI (current_cpu, pc, tmp_addr, opval);
4110 written |= (1 << 13);
f6bcefef
HPN		 4111 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
4112 }
4113}
4114if (NEBI (tmp_postinc, 0)) {
4115{
4116if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
392753ae 4117 tmp_addr = ADDSI (tmp_addr, 4);
f6bcefef
HPN		 4118}
4119 {
4120 SI opval = tmp_addr;
4121 SET_H_GR (FLD (f_operand1), opval);
4122 written |= (1 << 9);
4123 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4124 }
4125}
4126}
4127}
4128}
392753ae 4129 else if (EQSI (tmp_rno, 12)) {
f6bcefef
HPN		 4130{
4131 SI tmp_addr;
4132 BI tmp_postinc;
4133 tmp_postinc = FLD (f_memmode);
4134 tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
4135if (ANDIF (GET_H_V32_NON_V32 (), NEBI (CPU (h_xbit), 0))) {
4136if (EQBI (CPU (h_pbit), 0)) {
4137{
4138 {
4139 SI opval = GET_H_SR (FLD (f_operand2));
4140 SETMEMSI (current_cpu, pc, tmp_addr, opval);
4141 written |= (1 << 13);
4142 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
4143 }
4144 {
4145 BI opval = CPU (h_pbit);
4146 CPU (h_cbit) = opval;
4147 written |= (1 << 10);
4148 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
4149 }
4150}
4151} else {
4152 {
4153 BI opval = 1;
4154 CPU (h_cbit) = opval;
4155 written |= (1 << 10);
4156 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
4157 }
4158}
4159} else {
4160 {
4161 SI opval = GET_H_SR (FLD (f_operand2));
4162 SETMEMSI (current_cpu, pc, tmp_addr, opval);
4163 written |= (1 << 13);
4164 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
4165 }
4166}
4167if (NEBI (tmp_postinc, 0)) {
4168{
4169if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
4170 tmp_addr = ADDSI (tmp_addr, 4);
4171}
4172 {
4173 SI opval = tmp_addr;
4174 SET_H_GR (FLD (f_operand1), opval);
4175 written |= (1 << 9);
4176 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4177 }
4178}
4179}
4180}
4181}
392753ae 4182 else if (EQSI (tmp_rno, 13)) {
f6bcefef
HPN		 4183{
4184 SI tmp_addr;
4185 BI tmp_postinc;
4186 tmp_postinc = FLD (f_memmode);
4187 tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
4188if (ANDIF (GET_H_V32_NON_V32 (), NEBI (CPU (h_xbit), 0))) {
4189if (EQBI (CPU (h_pbit), 0)) {
4190{
4191 {
4192 SI opval = GET_H_SR (FLD (f_operand2));
4193 SETMEMSI (current_cpu, pc, tmp_addr, opval);
4194 written |= (1 << 13);
4195 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
4196 }
4197 {
4198 BI opval = CPU (h_pbit);
4199 CPU (h_cbit) = opval;
4200 written |= (1 << 10);
4201 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
4202 }
4203}
4204} else {
4205 {
4206 BI opval = 1;
4207 CPU (h_cbit) = opval;
4208 written |= (1 << 10);
4209 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
4210 }
4211}
4212} else {
4213 {
4214 SI opval = GET_H_SR (FLD (f_operand2));
4215 SETMEMSI (current_cpu, pc, tmp_addr, opval);
4216 written |= (1 << 13);
4217 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
4218 }
4219}
4220if (NEBI (tmp_postinc, 0)) {
4221{
4222if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
4223 tmp_addr = ADDSI (tmp_addr, 4);
4224}
4225 {
4226 SI opval = tmp_addr;
4227 SET_H_GR (FLD (f_operand1), opval);
4228 written |= (1 << 9);
4229 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4230 }
4231}
4232}
4233}
4234}
392753ae 4235 else if (EQSI (tmp_rno, 0)) {
f6bcefef
HPN		 4236{
4237 SI tmp_addr;
4238 BI tmp_postinc;
4239 tmp_postinc = FLD (f_memmode);
4240 tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
4241if (ANDIF (GET_H_V32_NON_V32 (), NEBI (CPU (h_xbit), 0))) {
4242if (EQBI (CPU (h_pbit), 0)) {
4243{
4244 {
392753ae
HPN		 4245 QI opval = GET_H_SR (FLD (f_operand2));
4246 SETMEMQI (current_cpu, pc, tmp_addr, opval);
4247 written |= (1 << 12);
f6bcefef
HPN		 4248 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
4249 }
4250 {
4251 BI opval = CPU (h_pbit);
4252 CPU (h_cbit) = opval;
4253 written |= (1 << 10);
4254 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
4255 }
4256}
4257} else {
4258 {
4259 BI opval = 1;
4260 CPU (h_cbit) = opval;
4261 written |= (1 << 10);
4262 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
4263 }
4264}
4265} else {
4266 {
392753ae
HPN		 4267 QI opval = GET_H_SR (FLD (f_operand2));
4268 SETMEMQI (current_cpu, pc, tmp_addr, opval);
4269 written |= (1 << 12);
f6bcefef
HPN		 4270 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
4271 }
4272}
4273if (NEBI (tmp_postinc, 0)) {
4274{
4275if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
392753ae 4276 tmp_addr = ADDSI (tmp_addr, 1);
f6bcefef
HPN		 4277}
4278 {
4279 SI opval = tmp_addr;
4280 SET_H_GR (FLD (f_operand1), opval);
4281 written |= (1 << 9);
4282 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4283 }
4284}
4285}
4286}
4287}
392753ae 4288 else if (EQSI (tmp_rno, 1)) {
f6bcefef
HPN		 4289{
4290 SI tmp_addr;
4291 BI tmp_postinc;
4292 tmp_postinc = FLD (f_memmode);
4293 tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
4294if (ANDIF (GET_H_V32_NON_V32 (), NEBI (CPU (h_xbit), 0))) {
4295if (EQBI (CPU (h_pbit), 0)) {
4296{
4297 {
392753ae
HPN		 4298 QI opval = GET_H_SR (FLD (f_operand2));
4299 SETMEMQI (current_cpu, pc, tmp_addr, opval);
4300 written |= (1 << 12);
f6bcefef
HPN		 4301 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
4302 }
4303 {
4304 BI opval = CPU (h_pbit);
4305 CPU (h_cbit) = opval;
4306 written |= (1 << 10);
4307 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
4308 }
4309}
4310} else {
4311 {
4312 BI opval = 1;
4313 CPU (h_cbit) = opval;
4314 written |= (1 << 10);
4315 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
4316 }
4317}
4318} else {
4319 {
392753ae
HPN		 4320 QI opval = GET_H_SR (FLD (f_operand2));
4321 SETMEMQI (current_cpu, pc, tmp_addr, opval);
4322 written |= (1 << 12);
f6bcefef
HPN		 4323 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
4324 }
4325}
4326if (NEBI (tmp_postinc, 0)) {
4327{
4328if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
392753ae 4329 tmp_addr = ADDSI (tmp_addr, 1);
f6bcefef
HPN		 4330}
4331 {
4332 SI opval = tmp_addr;
4333 SET_H_GR (FLD (f_operand1), opval);
4334 written |= (1 << 9);
4335 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4336 }
4337}
4338}
4339}
4340}
392753ae 4341 else if (EQSI (tmp_rno, 4)) {
f6bcefef
HPN		 4342{
4343 SI tmp_addr;
4344 BI tmp_postinc;
4345 tmp_postinc = FLD (f_memmode);
4346 tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
4347if (ANDIF (GET_H_V32_NON_V32 (), NEBI (CPU (h_xbit), 0))) {
4348if (EQBI (CPU (h_pbit), 0)) {
4349{
4350 {
392753ae
HPN		 4351 HI opval = GET_H_SR (FLD (f_operand2));
4352 SETMEMHI (current_cpu, pc, tmp_addr, opval);
4353 written |= (1 << 11);
f6bcefef
HPN		 4354 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
4355 }
4356 {
4357 BI opval = CPU (h_pbit);
4358 CPU (h_cbit) = opval;
4359 written |= (1 << 10);
4360 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
4361 }
4362}
4363} else {
4364 {
4365 BI opval = 1;
4366 CPU (h_cbit) = opval;
4367 written |= (1 << 10);
4368 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
4369 }
4370}
4371} else {
4372 {
392753ae
HPN		 4373 HI opval = GET_H_SR (FLD (f_operand2));
4374 SETMEMHI (current_cpu, pc, tmp_addr, opval);
4375 written |= (1 << 11);
f6bcefef
HPN		 4376 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
4377 }
4378}
4379if (NEBI (tmp_postinc, 0)) {
4380{
4381if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
392753ae 4382 tmp_addr = ADDSI (tmp_addr, 2);
f6bcefef
HPN		 4383}
4384 {
4385 SI opval = tmp_addr;
4386 SET_H_GR (FLD (f_operand1), opval);
4387 written |= (1 << 9);
4388 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4389 }
4390}
4391}
4392}
4393}
392753ae 4394 else if (EQSI (tmp_rno, 8)) {
f6bcefef
HPN		 4395{
4396 SI tmp_addr;
4397 BI tmp_postinc;
4398 tmp_postinc = FLD (f_memmode);
4399 tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
4400if (ANDIF (GET_H_V32_NON_V32 (), NEBI (CPU (h_xbit), 0))) {
4401if (EQBI (CPU (h_pbit), 0)) {
4402{
4403 {
4404 SI opval = GET_H_SR (FLD (f_operand2));
4405 SETMEMSI (current_cpu, pc, tmp_addr, opval);
4406 written |= (1 << 13);
4407 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
4408 }
4409 {
4410 BI opval = CPU (h_pbit);
4411 CPU (h_cbit) = opval;
4412 written |= (1 << 10);
4413 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
4414 }
4415}
4416} else {
4417 {
4418 BI opval = 1;
4419 CPU (h_cbit) = opval;
4420 written |= (1 << 10);
4421 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
4422 }
4423}
4424} else {
4425 {
4426 SI opval = GET_H_SR (FLD (f_operand2));
4427 SETMEMSI (current_cpu, pc, tmp_addr, opval);
4428 written |= (1 << 13);
4429 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
4430 }
4431}
4432if (NEBI (tmp_postinc, 0)) {
4433{
4434if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
4435 tmp_addr = ADDSI (tmp_addr, 4);
4436}
4437 {
4438 SI opval = tmp_addr;
4439 SET_H_GR (FLD (f_operand1), opval);
4440 written |= (1 << 9);
4441 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4442 }
4443}
4444}
4445}
4446}
4447 else if (EQSI (tmp_rno, 7)) {
4448{
4449 SI tmp_addr;
4450 BI tmp_postinc;
4451 tmp_postinc = FLD (f_memmode);
4452 tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
4453if (ANDIF (GET_H_V32_NON_V32 (), NEBI (CPU (h_xbit), 0))) {
4454if (EQBI (CPU (h_pbit), 0)) {
4455{
4456 {
4457 SI opval = GET_H_SR (FLD (f_operand2));
4458 SETMEMSI (current_cpu, pc, tmp_addr, opval);
4459 written |= (1 << 13);
4460 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
4461 }
4462 {
4463 BI opval = CPU (h_pbit);
4464 CPU (h_cbit) = opval;
4465 written |= (1 << 10);
4466 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
4467 }
4468}
4469} else {
4470 {
4471 BI opval = 1;
4472 CPU (h_cbit) = opval;
4473 written |= (1 << 10);
4474 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
4475 }
4476}
4477} else {
4478 {
4479 SI opval = GET_H_SR (FLD (f_operand2));
4480 SETMEMSI (current_cpu, pc, tmp_addr, opval);
4481 written |= (1 << 13);
4482 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
4483 }
4484}
4485if (NEBI (tmp_postinc, 0)) {
4486{
4487if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
4488 tmp_addr = ADDSI (tmp_addr, 4);
4489}
4490 {
4491 SI opval = tmp_addr;
4492 SET_H_GR (FLD (f_operand1), opval);
4493 written |= (1 << 9);
4494 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4495 }
4496}
4497}
4498}
4499}
4500 else if (EQSI (tmp_rno, 14)) {
4501{
4502 SI tmp_addr;
4503 BI tmp_postinc;
4504 tmp_postinc = FLD (f_memmode);
4505 tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
4506if (ANDIF (GET_H_V32_NON_V32 (), NEBI (CPU (h_xbit), 0))) {
4507if (EQBI (CPU (h_pbit), 0)) {
4508{
4509 {
4510 SI opval = GET_H_SR (FLD (f_operand2));
4511 SETMEMSI (current_cpu, pc, tmp_addr, opval);
4512 written |= (1 << 13);
4513 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
4514 }
4515 {
4516 BI opval = CPU (h_pbit);
4517 CPU (h_cbit) = opval;
4518 written |= (1 << 10);
4519 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
4520 }
4521}
4522} else {
4523 {
4524 BI opval = 1;
4525 CPU (h_cbit) = opval;
4526 written |= (1 << 10);
4527 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
4528 }
4529}
4530} else {
4531 {
4532 SI opval = GET_H_SR (FLD (f_operand2));
4533 SETMEMSI (current_cpu, pc, tmp_addr, opval);
4534 written |= (1 << 13);
4535 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
4536 }
4537}
4538if (NEBI (tmp_postinc, 0)) {
4539{
4540if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
4541 tmp_addr = ADDSI (tmp_addr, 4);
4542}
4543 {
4544 SI opval = tmp_addr;
4545 SET_H_GR (FLD (f_operand1), opval);
4546 written |= (1 << 9);
4547 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4548 }
4549}
4550}
4551}
4552}
4553 else if (EQSI (tmp_rno, 15)) {
4554{
4555 SI tmp_addr;
4556 BI tmp_postinc;
4557 tmp_postinc = FLD (f_memmode);
4558 tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
4559if (ANDIF (GET_H_V32_NON_V32 (), NEBI (CPU (h_xbit), 0))) {
4560if (EQBI (CPU (h_pbit), 0)) {
4561{
4562 {
4563 SI opval = GET_H_SR (FLD (f_operand2));
4564 SETMEMSI (current_cpu, pc, tmp_addr, opval);
4565 written |= (1 << 13);
4566 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
4567 }
4568 {
4569 BI opval = CPU (h_pbit);
4570 CPU (h_cbit) = opval;
4571 written |= (1 << 10);
4572 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
4573 }
4574}
4575} else {
4576 {
4577 BI opval = 1;
4578 CPU (h_cbit) = opval;
4579 written |= (1 << 10);
4580 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
4581 }
4582}
4583} else {
4584 {
4585 SI opval = GET_H_SR (FLD (f_operand2));
4586 SETMEMSI (current_cpu, pc, tmp_addr, opval);
4587 written |= (1 << 13);
4588 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
4589 }
4590}
4591if (NEBI (tmp_postinc, 0)) {
4592{
4593if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
4594 tmp_addr = ADDSI (tmp_addr, 4);
4595}
4596 {
4597 SI opval = tmp_addr;
4598 SET_H_GR (FLD (f_operand1), opval);
4599 written |= (1 << 9);
4600 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4601 }
4602}
4603}
4604}
4605}
4606 else {
4607cgen_rtx_error (current_cpu, "write from unimplemented special register");
4608}
4609{
4610 {
4611 BI opval = 0;
4612 CPU (h_xbit) = opval;
4613 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
4614 }
4615 {
4616 BI opval = 0;
4617 SET_H_INSN_PREFIXED_P (opval);
4618 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
4619 }
4620}
4621}
4622
4623 abuf->written = written;
4624#undef FLD
4625}
4626 NEXT (vpc);
4627
4628 CASE (sem, INSN_SBFS) : /* sbfs [${Rd-sfield}${inc}] */
4629{
4630 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4631 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2310652a 4632#define FLD(f) abuf->fields.sfmt_empty.f
f6bcefef
HPN		 4633 int UNUSED written = 0;
4634 IADDR UNUSED pc = abuf->addr;
4635 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4636
4637cgen_rtx_error (current_cpu, "SBFS isn't implemented");
4638
4639#undef FLD
4640}
4641 NEXT (vpc);
4642
4643 CASE (sem, INSN_MOVEM_R_M) : /* movem ${Rs-dfield},[${Rd-sfield}${inc}] */
4644{
4645 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4646 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4647#define FLD(f) abuf->fields.sfmt_movem_r_m.f
4648 int UNUSED written = 0;
4649 IADDR UNUSED pc = abuf->addr;
4650 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4651
4652{
4653 SI tmp_addr;
4654 BI tmp_postinc;
4655 tmp_postinc = FLD (f_memmode);
4656{
4657 SI tmp_dummy;
4658 tmp_dummy = GET_H_GR (FLD (f_operand2));
4659}
4660 tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
4661{
4662if (GESI (FLD (f_operand2), 15)) {
4663{
4664 SI tmp_tmp;
4665 tmp_tmp = GET_H_GR (((UINT) 15));
4666 {
4667 SI opval = tmp_tmp;
4668 SETMEMSI (current_cpu, pc, tmp_addr, opval);
4669 written |= (1 << 23);
4670 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
4671 }
4672 tmp_addr = ADDSI (tmp_addr, 4);
4673}
4674}
4675if (GESI (FLD (f_operand2), 14)) {
4676{
4677 SI tmp_tmp;
4678 tmp_tmp = GET_H_GR (((UINT) 14));
4679 {
4680 SI opval = tmp_tmp;
4681 SETMEMSI (current_cpu, pc, tmp_addr, opval);
4682 written |= (1 << 23);
4683 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
4684 }
4685 tmp_addr = ADDSI (tmp_addr, 4);
4686}
4687}
4688if (GESI (FLD (f_operand2), 13)) {
4689{
4690 SI tmp_tmp;
4691 tmp_tmp = GET_H_GR (((UINT) 13));
4692 {
4693 SI opval = tmp_tmp;
4694 SETMEMSI (current_cpu, pc, tmp_addr, opval);
4695 written |= (1 << 23);
4696 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
4697 }
4698 tmp_addr = ADDSI (tmp_addr, 4);
4699}
4700}
4701if (GESI (FLD (f_operand2), 12)) {
4702{
4703 SI tmp_tmp;
4704 tmp_tmp = GET_H_GR (((UINT) 12));
4705 {
4706 SI opval = tmp_tmp;
4707 SETMEMSI (current_cpu, pc, tmp_addr, opval);
4708 written |= (1 << 23);
4709 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
4710 }
4711 tmp_addr = ADDSI (tmp_addr, 4);
4712}
4713}
4714if (GESI (FLD (f_operand2), 11)) {
4715{
4716 SI tmp_tmp;
4717 tmp_tmp = GET_H_GR (((UINT) 11));
4718 {
4719 SI opval = tmp_tmp;
4720 SETMEMSI (current_cpu, pc, tmp_addr, opval);
4721 written |= (1 << 23);
4722 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
4723 }
4724 tmp_addr = ADDSI (tmp_addr, 4);
4725}
4726}
4727if (GESI (FLD (f_operand2), 10)) {
4728{
4729 SI tmp_tmp;
4730 tmp_tmp = GET_H_GR (((UINT) 10));
4731 {
4732 SI opval = tmp_tmp;
4733 SETMEMSI (current_cpu, pc, tmp_addr, opval);
4734 written |= (1 << 23);
4735 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
4736 }
4737 tmp_addr = ADDSI (tmp_addr, 4);
4738}
4739}
4740if (GESI (FLD (f_operand2), 9)) {
4741{
4742 SI tmp_tmp;
4743 tmp_tmp = GET_H_GR (((UINT) 9));
4744 {
4745 SI opval = tmp_tmp;
4746 SETMEMSI (current_cpu, pc, tmp_addr, opval);
4747 written |= (1 << 23);
4748 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
4749 }
4750 tmp_addr = ADDSI (tmp_addr, 4);
4751}
4752}
4753if (GESI (FLD (f_operand2), 8)) {
4754{
4755 SI tmp_tmp;
4756 tmp_tmp = GET_H_GR (((UINT) 8));
4757 {
4758 SI opval = tmp_tmp;
4759 SETMEMSI (current_cpu, pc, tmp_addr, opval);
4760 written |= (1 << 23);
4761 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
4762 }
4763 tmp_addr = ADDSI (tmp_addr, 4);
4764}
4765}
4766if (GESI (FLD (f_operand2), 7)) {
4767{
4768 SI tmp_tmp;
4769 tmp_tmp = GET_H_GR (((UINT) 7));
4770 {
4771 SI opval = tmp_tmp;
4772 SETMEMSI (current_cpu, pc, tmp_addr, opval);
4773 written |= (1 << 23);
4774 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
4775 }
4776 tmp_addr = ADDSI (tmp_addr, 4);
4777}
4778}
4779if (GESI (FLD (f_operand2), 6)) {
4780{
4781 SI tmp_tmp;
4782 tmp_tmp = GET_H_GR (((UINT) 6));
4783 {
4784 SI opval = tmp_tmp;
4785 SETMEMSI (current_cpu, pc, tmp_addr, opval);
4786 written |= (1 << 23);
4787 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
4788 }
4789 tmp_addr = ADDSI (tmp_addr, 4);
4790}
4791}
4792if (GESI (FLD (f_operand2), 5)) {
4793{
4794 SI tmp_tmp;
4795 tmp_tmp = GET_H_GR (((UINT) 5));
4796 {
4797 SI opval = tmp_tmp;
4798 SETMEMSI (current_cpu, pc, tmp_addr, opval);
4799 written |= (1 << 23);
4800 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
4801 }
4802 tmp_addr = ADDSI (tmp_addr, 4);
4803}
4804}
4805if (GESI (FLD (f_operand2), 4)) {
4806{
4807 SI tmp_tmp;
4808 tmp_tmp = GET_H_GR (((UINT) 4));
4809 {
4810 SI opval = tmp_tmp;
4811 SETMEMSI (current_cpu, pc, tmp_addr, opval);
4812 written |= (1 << 23);
4813 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
4814 }
4815 tmp_addr = ADDSI (tmp_addr, 4);
4816}
4817}
4818if (GESI (FLD (f_operand2), 3)) {
4819{
4820 SI tmp_tmp;
4821 tmp_tmp = GET_H_GR (((UINT) 3));
4822 {
4823 SI opval = tmp_tmp;
4824 SETMEMSI (current_cpu, pc, tmp_addr, opval);
4825 written |= (1 << 23);
4826 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
4827 }
4828 tmp_addr = ADDSI (tmp_addr, 4);
4829}
4830}
4831if (GESI (FLD (f_operand2), 2)) {
4832{
4833 SI tmp_tmp;
4834 tmp_tmp = GET_H_GR (((UINT) 2));
4835 {
4836 SI opval = tmp_tmp;
4837 SETMEMSI (current_cpu, pc, tmp_addr, opval);
4838 written |= (1 << 23);
4839 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
4840 }
4841 tmp_addr = ADDSI (tmp_addr, 4);
4842}
4843}
4844if (GESI (FLD (f_operand2), 1)) {
4845{
4846 SI tmp_tmp;
4847 tmp_tmp = GET_H_GR (((UINT) 1));
4848 {
4849 SI opval = tmp_tmp;
4850 SETMEMSI (current_cpu, pc, tmp_addr, opval);
4851 written |= (1 << 23);
4852 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
4853 }
4854 tmp_addr = ADDSI (tmp_addr, 4);
4855}
4856}
4857if (GESI (FLD (f_operand2), 0)) {
4858{
4859 SI tmp_tmp;
4860 tmp_tmp = GET_H_GR (((UINT) 0));
4861 {
4862 SI opval = tmp_tmp;
4863 SETMEMSI (current_cpu, pc, tmp_addr, opval);
4864 written |= (1 << 23);
4865 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
4866 }
4867 tmp_addr = ADDSI (tmp_addr, 4);
4868}
4869}
4870}
4871if (NEBI (tmp_postinc, 0)) {
4872 {
4873 SI opval = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (tmp_addr) : (CPU (h_prefixreg_pre_v32)));
4874 SET_H_GR (FLD (f_operand1), opval);
4875 written |= (1 << 22);
4876 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4877 }
4878}
4879{
4880 {
4881 BI opval = 0;
4882 CPU (h_xbit) = opval;
4883 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
4884 }
4885 {
4886 BI opval = 0;
4887 SET_H_INSN_PREFIXED_P (opval);
4888 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
4889 }
4890}
4891}
4892
4893 abuf->written = written;
4894#undef FLD
4895}
4896 NEXT (vpc);
4897
4898 CASE (sem, INSN_MOVEM_M_R) : /* movem [${Rs}${inc}],${Rd} */
4899{
4900 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4901 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4902#define FLD(f) abuf->fields.sfmt_movem_m_r.f
4903 int UNUSED written = 0;
4904 IADDR UNUSED pc = abuf->addr;
4905 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4906
4907{
4908 SI tmp_addr;
4909 BI tmp_postinc;
4910 tmp_postinc = FLD (f_memmode);
4911 tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
4912{
4913 SI tmp_dummy;
4914 tmp_dummy = GET_H_GR (FLD (f_operand2));
4915}
4916{
4917if (GESI (FLD (f_operand2), 14)) {
4918{
4919 SI tmp_tmp;
4920 tmp_tmp = GETMEMSI (current_cpu, pc, tmp_addr);
4921 {
4922 SI opval = tmp_tmp;
4923 SET_H_GR (((UINT) 14), opval);
4924 written |= (1 << 14);
4925 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4926 }
4927 tmp_addr = ADDSI (tmp_addr, 4);
4928}
4929}
4930if (GESI (FLD (f_operand2), 13)) {
4931{
4932 SI tmp_tmp;
4933 tmp_tmp = GETMEMSI (current_cpu, pc, tmp_addr);
4934 {
4935 SI opval = tmp_tmp;
4936 SET_H_GR (((UINT) 13), opval);
4937 written |= (1 << 13);
4938 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4939 }
4940 tmp_addr = ADDSI (tmp_addr, 4);
4941}
4942}
4943if (GESI (FLD (f_operand2), 12)) {
4944{
4945 SI tmp_tmp;
4946 tmp_tmp = GETMEMSI (current_cpu, pc, tmp_addr);
4947 {
4948 SI opval = tmp_tmp;
4949 SET_H_GR (((UINT) 12), opval);
4950 written |= (1 << 12);
4951 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4952 }
4953 tmp_addr = ADDSI (tmp_addr, 4);
4954}
4955}
4956if (GESI (FLD (f_operand2), 11)) {
4957{
4958 SI tmp_tmp;
4959 tmp_tmp = GETMEMSI (current_cpu, pc, tmp_addr);
4960 {
4961 SI opval = tmp_tmp;
4962 SET_H_GR (((UINT) 11), opval);
4963 written |= (1 << 11);
4964 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4965 }
4966 tmp_addr = ADDSI (tmp_addr, 4);
4967}
4968}
4969if (GESI (FLD (f_operand2), 10)) {
4970{
4971 SI tmp_tmp;
4972 tmp_tmp = GETMEMSI (current_cpu, pc, tmp_addr);
4973 {
4974 SI opval = tmp_tmp;
4975 SET_H_GR (((UINT) 10), opval);
4976 written |= (1 << 10);
4977 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4978 }
4979 tmp_addr = ADDSI (tmp_addr, 4);
4980}
4981}
4982if (GESI (FLD (f_operand2), 9)) {
4983{
4984 SI tmp_tmp;
4985 tmp_tmp = GETMEMSI (current_cpu, pc, tmp_addr);
4986 {
4987 SI opval = tmp_tmp;
4988 SET_H_GR (((UINT) 9), opval);
4989 written |= (1 << 22);
4990 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4991 }
4992 tmp_addr = ADDSI (tmp_addr, 4);
4993}
4994}
4995if (GESI (FLD (f_operand2), 8)) {
4996{
4997 SI tmp_tmp;
4998 tmp_tmp = GETMEMSI (current_cpu, pc, tmp_addr);
4999 {
5000 SI opval = tmp_tmp;
5001 SET_H_GR (((UINT) 8), opval);
5002 written |= (1 << 21);
5003 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5004 }
5005 tmp_addr = ADDSI (tmp_addr, 4);
5006}
5007}
5008if (GESI (FLD (f_operand2), 7)) {
5009{
5010 SI tmp_tmp;
5011 tmp_tmp = GETMEMSI (current_cpu, pc, tmp_addr);
5012 {
5013 SI opval = tmp_tmp;
5014 SET_H_GR (((UINT) 7), opval);
5015 written |= (1 << 20);
5016 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5017 }
5018 tmp_addr = ADDSI (tmp_addr, 4);
5019}
5020}
5021if (GESI (FLD (f_operand2), 6)) {
5022{
5023 SI tmp_tmp;
5024 tmp_tmp = GETMEMSI (current_cpu, pc, tmp_addr);
5025 {
5026 SI opval = tmp_tmp;
5027 SET_H_GR (((UINT) 6), opval);
5028 written |= (1 << 19);
5029 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5030 }
5031 tmp_addr = ADDSI (tmp_addr, 4);
5032}
5033}
5034if (GESI (FLD (f_operand2), 5)) {
5035{
5036 SI tmp_tmp;
5037 tmp_tmp = GETMEMSI (current_cpu, pc, tmp_addr);
5038 {
5039 SI opval = tmp_tmp;
5040 SET_H_GR (((UINT) 5), opval);
5041 written |= (1 << 18);
5042 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5043 }
5044 tmp_addr = ADDSI (tmp_addr, 4);
5045}
5046}
5047if (GESI (FLD (f_operand2), 4)) {
5048{
5049 SI tmp_tmp;
5050 tmp_tmp = GETMEMSI (current_cpu, pc, tmp_addr);
5051 {
5052 SI opval = tmp_tmp;
5053 SET_H_GR (((UINT) 4), opval);
5054 written |= (1 << 17);
5055 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5056 }
5057 tmp_addr = ADDSI (tmp_addr, 4);
5058}
5059}
5060if (GESI (FLD (f_operand2), 3)) {
5061{
5062 SI tmp_tmp;
5063 tmp_tmp = GETMEMSI (current_cpu, pc, tmp_addr);
5064 {
5065 SI opval = tmp_tmp;
5066 SET_H_GR (((UINT) 3), opval);
5067 written |= (1 << 16);
5068 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5069 }
5070 tmp_addr = ADDSI (tmp_addr, 4);
5071}
5072}
5073if (GESI (FLD (f_operand2), 2)) {
5074{
5075 SI tmp_tmp;
5076 tmp_tmp = GETMEMSI (current_cpu, pc, tmp_addr);
5077 {
5078 SI opval = tmp_tmp;
5079 SET_H_GR (((UINT) 2), opval);
5080 written |= (1 << 15);
5081 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5082 }
5083 tmp_addr = ADDSI (tmp_addr, 4);
5084}
5085}
5086if (GESI (FLD (f_operand2), 1)) {
5087{
5088 SI tmp_tmp;
5089 tmp_tmp = GETMEMSI (current_cpu, pc, tmp_addr);
5090 {
5091 SI opval = tmp_tmp;
5092 SET_H_GR (((UINT) 1), opval);
5093 written |= (1 << 9);
5094 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5095 }
5096 tmp_addr = ADDSI (tmp_addr, 4);
5097}
5098}
5099if (GESI (FLD (f_operand2), 0)) {
5100{
5101 SI tmp_tmp;
5102 tmp_tmp = GETMEMSI (current_cpu, pc, tmp_addr);
5103 {
5104 SI opval = tmp_tmp;
5105 SET_H_GR (((UINT) 0), opval);
5106 written |= (1 << 8);
5107 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5108 }
5109 tmp_addr = ADDSI (tmp_addr, 4);
5110}
5111}
5112}
5113if (NEBI (tmp_postinc, 0)) {
5114 {
5115 SI opval = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (tmp_addr) : (CPU (h_prefixreg_pre_v32)));
5116 SET_H_GR (FLD (f_operand1), opval);
5117 written |= (1 << 7);
5118 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5119 }
5120}
5121{
5122 {
5123 BI opval = 0;
5124 CPU (h_xbit) = opval;
5125 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
5126 }
5127 {
5128 BI opval = 0;
5129 SET_H_INSN_PREFIXED_P (opval);
5130 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
5131 }
5132}
5133}
5134
5135 abuf->written = written;
5136#undef FLD
5137}
5138 NEXT (vpc);
5139
5140 CASE (sem, INSN_MOVEM_M_PC) : /* movem [${Rs}${inc}],${Rd} */
5141{
5142 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5143 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5144#define FLD(f) abuf->fields.sfmt_movem_m_r.f
5145 int UNUSED written = 0;
5146 IADDR UNUSED pc = abuf->addr;
5147 SEM_BRANCH_INIT
5148 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5149
5150{
5151 SI tmp_addr;
5152 BI tmp_postinc;
5153 tmp_postinc = FLD (f_memmode);
5154 tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
5155{
5156 {
5157 USI opval = GETMEMSI (current_cpu, pc, tmp_addr);
5158 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
5159 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
5160 }
5161 tmp_addr = ADDSI (tmp_addr, 4);
5162{
5163 SI tmp_tmp;
5164 tmp_tmp = GETMEMSI (current_cpu, pc, tmp_addr);
5165 {
5166 SI opval = tmp_tmp;
5167 SET_H_GR (((UINT) 14), opval);
5168 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5169 }
5170 tmp_addr = ADDSI (tmp_addr, 4);
5171}
5172{
5173 SI tmp_tmp;
5174 tmp_tmp = GETMEMSI (current_cpu, pc, tmp_addr);
5175 {
5176 SI opval = tmp_tmp;
5177 SET_H_GR (((UINT) 13), opval);
5178 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5179 }
5180 tmp_addr = ADDSI (tmp_addr, 4);
5181}
5182{
5183 SI tmp_tmp;
5184 tmp_tmp = GETMEMSI (current_cpu, pc, tmp_addr);
5185 {
5186 SI opval = tmp_tmp;
5187 SET_H_GR (((UINT) 12), opval);
5188 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5189 }
5190 tmp_addr = ADDSI (tmp_addr, 4);
5191}
5192{
5193 SI tmp_tmp;
5194 tmp_tmp = GETMEMSI (current_cpu, pc, tmp_addr);
5195 {
5196 SI opval = tmp_tmp;
5197 SET_H_GR (((UINT) 11), opval);
5198 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5199 }
5200 tmp_addr = ADDSI (tmp_addr, 4);
5201}
5202{
5203 SI tmp_tmp;
5204 tmp_tmp = GETMEMSI (current_cpu, pc, tmp_addr);
5205 {
5206 SI opval = tmp_tmp;
5207 SET_H_GR (((UINT) 10), opval);
5208 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5209 }
5210 tmp_addr = ADDSI (tmp_addr, 4);
5211}
5212{
5213 SI tmp_tmp;
5214 tmp_tmp = GETMEMSI (current_cpu, pc, tmp_addr);
5215 {
5216 SI opval = tmp_tmp;
5217 SET_H_GR (((UINT) 9), opval);
5218 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5219 }
5220 tmp_addr = ADDSI (tmp_addr, 4);
5221}
5222{
5223 SI tmp_tmp;
5224 tmp_tmp = GETMEMSI (current_cpu, pc, tmp_addr);
5225 {
5226 SI opval = tmp_tmp;
5227 SET_H_GR (((UINT) 8), opval);
5228 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5229 }
5230 tmp_addr = ADDSI (tmp_addr, 4);
5231}
5232{
5233 SI tmp_tmp;
5234 tmp_tmp = GETMEMSI (current_cpu, pc, tmp_addr);
5235 {
5236 SI opval = tmp_tmp;
5237 SET_H_GR (((UINT) 7), opval);
5238 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5239 }
5240 tmp_addr = ADDSI (tmp_addr, 4);
5241}
5242{
5243 SI tmp_tmp;
5244 tmp_tmp = GETMEMSI (current_cpu, pc, tmp_addr);
5245 {
5246 SI opval = tmp_tmp;
5247 SET_H_GR (((UINT) 6), opval);
5248 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5249 }
5250 tmp_addr = ADDSI (tmp_addr, 4);
5251}
5252{
5253 SI tmp_tmp;
5254 tmp_tmp = GETMEMSI (current_cpu, pc, tmp_addr);
5255 {
5256 SI opval = tmp_tmp;
5257 SET_H_GR (((UINT) 5), opval);
5258 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5259 }
5260 tmp_addr = ADDSI (tmp_addr, 4);
5261}
5262{
5263 SI tmp_tmp;
5264 tmp_tmp = GETMEMSI (current_cpu, pc, tmp_addr);
5265 {
5266 SI opval = tmp_tmp;
5267 SET_H_GR (((UINT) 4), opval);
5268 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5269 }
5270 tmp_addr = ADDSI (tmp_addr, 4);
5271}
5272{
5273 SI tmp_tmp;
5274 tmp_tmp = GETMEMSI (current_cpu, pc, tmp_addr);
5275 {
5276 SI opval = tmp_tmp;
5277 SET_H_GR (((UINT) 3), opval);
5278 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5279 }
5280 tmp_addr = ADDSI (tmp_addr, 4);
5281}
5282{
5283 SI tmp_tmp;
5284 tmp_tmp = GETMEMSI (current_cpu, pc, tmp_addr);
5285 {
5286 SI opval = tmp_tmp;
5287 SET_H_GR (((UINT) 2), opval);
5288 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5289 }
5290 tmp_addr = ADDSI (tmp_addr, 4);
5291}
5292{
5293 SI tmp_tmp;
5294 tmp_tmp = GETMEMSI (current_cpu, pc, tmp_addr);
5295 {
5296 SI opval = tmp_tmp;
5297 SET_H_GR (((UINT) 1), opval);
5298 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5299 }
5300 tmp_addr = ADDSI (tmp_addr, 4);
5301}
5302{
5303 SI tmp_tmp;
5304 tmp_tmp = GETMEMSI (current_cpu, pc, tmp_addr);
5305 {
5306 SI opval = tmp_tmp;
5307 SET_H_GR (((UINT) 0), opval);
5308 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5309 }
5310 tmp_addr = ADDSI (tmp_addr, 4);
5311}
5312}
5313if (NEBI (tmp_postinc, 0)) {
5314 {
5315 SI opval = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (tmp_addr) : (CPU (h_prefixreg_pre_v32)));
5316 SET_H_GR (FLD (f_operand1), opval);
5317 written |= (1 << 5);
5318 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5319 }
5320}
5321{
5322 {
5323 BI opval = 0;
5324 CPU (h_xbit) = opval;
5325 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
5326 }
5327 {
5328 BI opval = 0;
5329 SET_H_INSN_PREFIXED_P (opval);
5330 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
5331 }
5332}
5333}
5334
5335 abuf->written = written;
5336 SEM_BRANCH_FINI (vpc);
5337#undef FLD
5338}
5339 NEXT (vpc);
5340
5341 CASE (sem, INSN_ADD_B_R) : /* add.b $Rs,$Rd */
5342{
5343 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5344 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5345#define FLD(f) abuf->fields.sfmt_add_b_r.f
5346 int UNUSED written = 0;
5347 IADDR UNUSED pc = abuf->addr;
5348 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5349
5350{
5351 QI tmp_tmpopd;
5352 QI tmp_tmpops;
5353 BI tmp_carry;
5354 QI tmp_newval;
5355 tmp_tmpops = GET_H_GR (FLD (f_operand1));
5356 tmp_tmpopd = GET_H_GR (FLD (f_operand2));
5357 tmp_carry = CPU (h_cbit);
5358 tmp_newval = ADDCQI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
5359{
5360 SI tmp_oldregval;
5361 tmp_oldregval = GET_H_RAW_GR_PC (FLD (f_operand2));
5362 {
5363 SI opval = ORSI (ANDSI (tmp_newval, 255), ANDSI (tmp_oldregval, 0xffffff00));
5364 SET_H_GR (FLD (f_operand2), opval);
5365 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5366 }
5367}
5368{
5369 {
5370 BI opval = ORIF (ANDIF (LTQI (tmp_tmpops, 0), LTQI (tmp_tmpopd, 0)), ORIF (ANDIF (LTQI (tmp_tmpopd, 0), GEQI (tmp_newval, 0)), ANDIF (LTQI (tmp_tmpops, 0), GEQI (tmp_newval, 0))));
5371 CPU (h_cbit) = opval;
5372 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
5373 }
5374 {
5375 BI opval = LTQI (tmp_newval, 0);
5376 CPU (h_nbit) = opval;
5377 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
5378 }
5379 {
5380 BI opval = ANDIF (EQQI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
5381 CPU (h_zbit) = opval;
5382 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
5383 }
5384 {
5385 BI opval = ORIF (ANDIF (ANDIF (LTQI (tmp_tmpops, 0), LTQI (tmp_tmpopd, 0)), GEQI (tmp_newval, 0)), ANDIF (ANDIF (GEQI (tmp_tmpops, 0), GEQI (tmp_tmpopd, 0)), LTQI (tmp_newval, 0)));
5386 CPU (h_vbit) = opval;
5387 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
5388 }
5389{
5390 {
5391 BI opval = 0;
5392 CPU (h_xbit) = opval;
5393 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
5394 }
5395 {
5396 BI opval = 0;
5397 SET_H_INSN_PREFIXED_P (opval);
5398 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
5399 }
5400}
5401}
5402}
5403
5404#undef FLD
5405}
5406 NEXT (vpc);
5407
5408 CASE (sem, INSN_ADD_W_R) : /* add.w $Rs,$Rd */
5409{
5410 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5411 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5412#define FLD(f) abuf->fields.sfmt_add_b_r.f
5413 int UNUSED written = 0;
5414 IADDR UNUSED pc = abuf->addr;
5415 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5416
5417{
5418 HI tmp_tmpopd;
5419 HI tmp_tmpops;
5420 BI tmp_carry;
5421 HI tmp_newval;
5422 tmp_tmpops = GET_H_GR (FLD (f_operand1));
5423 tmp_tmpopd = GET_H_GR (FLD (f_operand2));
5424 tmp_carry = CPU (h_cbit);
5425 tmp_newval = ADDCHI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
5426{
5427 SI tmp_oldregval;
5428 tmp_oldregval = GET_H_RAW_GR_PC (FLD (f_operand2));
5429 {
5430 SI opval = ORSI (ANDSI (tmp_newval, 65535), ANDSI (tmp_oldregval, 0xffff0000));
5431 SET_H_GR (FLD (f_operand2), opval);
5432 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5433 }
5434}
5435{
5436 {
5437 BI opval = ORIF (ANDIF (LTHI (tmp_tmpops, 0), LTHI (tmp_tmpopd, 0)), ORIF (ANDIF (LTHI (tmp_tmpopd, 0), GEHI (tmp_newval, 0)), ANDIF (LTHI (tmp_tmpops, 0), GEHI (tmp_newval, 0))));
5438 CPU (h_cbit) = opval;
5439 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
5440 }
5441 {
5442 BI opval = LTHI (tmp_newval, 0);
5443 CPU (h_nbit) = opval;
5444 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
5445 }
5446 {
5447 BI opval = ANDIF (EQHI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
5448 CPU (h_zbit) = opval;
5449 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
5450 }
5451 {
5452 BI opval = ORIF (ANDIF (ANDIF (LTHI (tmp_tmpops, 0), LTHI (tmp_tmpopd, 0)), GEHI (tmp_newval, 0)), ANDIF (ANDIF (GEHI (tmp_tmpops, 0), GEHI (tmp_tmpopd, 0)), LTHI (tmp_newval, 0)));
5453 CPU (h_vbit) = opval;
5454 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
5455 }
5456{
5457 {
5458 BI opval = 0;
5459 CPU (h_xbit) = opval;
5460 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
5461 }
5462 {
5463 BI opval = 0;
5464 SET_H_INSN_PREFIXED_P (opval);
5465 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
5466 }
5467}
5468}
5469}
5470
5471#undef FLD
5472}
5473 NEXT (vpc);
5474
5475 CASE (sem, INSN_ADD_D_R) : /* add.d $Rs,$Rd */
5476{
5477 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5478 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5479#define FLD(f) abuf->fields.sfmt_add_b_r.f
5480 int UNUSED written = 0;
5481 IADDR UNUSED pc = abuf->addr;
5482 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5483
5484{
5485 SI tmp_tmpopd;
5486 SI tmp_tmpops;
5487 BI tmp_carry;
5488 SI tmp_newval;
5489 tmp_tmpops = GET_H_GR (FLD (f_operand1));
5490 tmp_tmpopd = GET_H_GR (FLD (f_operand2));
5491 tmp_carry = CPU (h_cbit);
5492 tmp_newval = ADDCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
5493 {
5494 SI opval = tmp_newval;
5495 SET_H_GR (FLD (f_operand2), opval);
5496 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5497 }
5498{
5499 {
5500 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), ORIF (ANDIF (LTSI (tmp_tmpopd, 0), GESI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_newval, 0))));
5501 CPU (h_cbit) = opval;
5502 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
5503 }
5504 {
5505 BI opval = LTSI (tmp_newval, 0);
5506 CPU (h_nbit) = opval;
5507 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
5508 }
5509 {
5510 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
5511 CPU (h_zbit) = opval;
5512 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
5513 }
5514 {
5515 BI opval = ORIF (ANDIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (GESI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0)));
5516 CPU (h_vbit) = opval;
5517 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
5518 }
5519{
5520 {
5521 BI opval = 0;
5522 CPU (h_xbit) = opval;
5523 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
5524 }
5525 {
5526 BI opval = 0;
5527 SET_H_INSN_PREFIXED_P (opval);
5528 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
5529 }
5530}
5531}
5532}
5533
5534#undef FLD
5535}
5536 NEXT (vpc);
5537
5538 CASE (sem, INSN_ADD_M_B_M) : /* add-m.b [${Rs}${inc}],${Rd} */
5539{
5540 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5541 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5542#define FLD(f) abuf->fields.sfmt_add_m_b_m.f
5543 int UNUSED written = 0;
5544 IADDR UNUSED pc = abuf->addr;
5545 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5546
5547{
5548 QI tmp_tmpopd;
5549 QI tmp_tmpops;
5550 BI tmp_carry;
5551 QI tmp_newval;
5552 tmp_tmpops = ({ SI tmp_addr;
5553 QI tmp_tmp_mem;
5554 BI tmp_postinc;
5555 tmp_postinc = FLD (f_memmode);
5556; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
5557; tmp_tmp_mem = GETMEMQI (current_cpu, pc, tmp_addr);
5558; if (NEBI (tmp_postinc, 0)) {
5559{
5560if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
5561 tmp_addr = ADDSI (tmp_addr, 1);
5562}
5563 {
5564 SI opval = tmp_addr;
5565 SET_H_GR (FLD (f_operand1), opval);
5566 written |= (1 << 12);
5567 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5568 }
5569}
5570}
5571; tmp_tmp_mem; });
5572 tmp_tmpopd = GET_H_GR (FLD (f_operand2));
5573 tmp_carry = CPU (h_cbit);
5574 tmp_newval = ADDCQI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
5575{
5576 SI tmp_oldregval;
5577 tmp_oldregval = GET_H_RAW_GR_PC (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))));
5578 {
5579 SI opval = ORSI (ANDSI (tmp_newval, 255), ANDSI (tmp_oldregval, 0xffffff00));
5580 SET_H_GR (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))), opval);
5581 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5582 }
5583}
5584{
5585 {
5586 BI opval = ORIF (ANDIF (LTQI (tmp_tmpops, 0), LTQI (tmp_tmpopd, 0)), ORIF (ANDIF (LTQI (tmp_tmpopd, 0), GEQI (tmp_newval, 0)), ANDIF (LTQI (tmp_tmpops, 0), GEQI (tmp_newval, 0))));
5587 CPU (h_cbit) = opval;
5588 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
5589 }
5590 {
5591 BI opval = LTQI (tmp_newval, 0);
5592 CPU (h_nbit) = opval;
5593 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
5594 }
5595 {
5596 BI opval = ANDIF (EQQI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
5597 CPU (h_zbit) = opval;
5598 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
5599 }
5600 {
5601 BI opval = ORIF (ANDIF (ANDIF (LTQI (tmp_tmpops, 0), LTQI (tmp_tmpopd, 0)), GEQI (tmp_newval, 0)), ANDIF (ANDIF (GEQI (tmp_tmpops, 0), GEQI (tmp_tmpopd, 0)), LTQI (tmp_newval, 0)));
5602 CPU (h_vbit) = opval;
5603 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
5604 }
5605{
5606 {
5607 BI opval = 0;
5608 CPU (h_xbit) = opval;
5609 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
5610 }
5611 {
5612 BI opval = 0;
5613 SET_H_INSN_PREFIXED_P (opval);
5614 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
5615 }
5616}
5617}
5618}
5619
5620 abuf->written = written;
5621#undef FLD
5622}
5623 NEXT (vpc);
5624
5625 CASE (sem, INSN_ADD_M_W_M) : /* add-m.w [${Rs}${inc}],${Rd} */
5626{
5627 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5628 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5629#define FLD(f) abuf->fields.sfmt_add_m_b_m.f
5630 int UNUSED written = 0;
5631 IADDR UNUSED pc = abuf->addr;
5632 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5633
5634{
5635 HI tmp_tmpopd;
5636 HI tmp_tmpops;
5637 BI tmp_carry;
5638 HI tmp_newval;
5639 tmp_tmpops = ({ SI tmp_addr;
5640 HI tmp_tmp_mem;
5641 BI tmp_postinc;
5642 tmp_postinc = FLD (f_memmode);
5643; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
5644; tmp_tmp_mem = GETMEMHI (current_cpu, pc, tmp_addr);
5645; if (NEBI (tmp_postinc, 0)) {
5646{
5647if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
5648 tmp_addr = ADDSI (tmp_addr, 2);
5649}
5650 {
5651 SI opval = tmp_addr;
5652 SET_H_GR (FLD (f_operand1), opval);
5653 written |= (1 << 12);
5654 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5655 }
5656}
5657}
5658; tmp_tmp_mem; });
5659 tmp_tmpopd = GET_H_GR (FLD (f_operand2));
5660 tmp_carry = CPU (h_cbit);
5661 tmp_newval = ADDCHI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
5662{
5663 SI tmp_oldregval;
5664 tmp_oldregval = GET_H_RAW_GR_PC (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))));
5665 {
5666 SI opval = ORSI (ANDSI (tmp_newval, 65535), ANDSI (tmp_oldregval, 0xffff0000));
5667 SET_H_GR (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))), opval);
5668 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5669 }
5670}
5671{
5672 {
5673 BI opval = ORIF (ANDIF (LTHI (tmp_tmpops, 0), LTHI (tmp_tmpopd, 0)), ORIF (ANDIF (LTHI (tmp_tmpopd, 0), GEHI (tmp_newval, 0)), ANDIF (LTHI (tmp_tmpops, 0), GEHI (tmp_newval, 0))));
5674 CPU (h_cbit) = opval;
5675 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
5676 }
5677 {
5678 BI opval = LTHI (tmp_newval, 0);
5679 CPU (h_nbit) = opval;
5680 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
5681 }
5682 {
5683 BI opval = ANDIF (EQHI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
5684 CPU (h_zbit) = opval;
5685 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
5686 }
5687 {
5688 BI opval = ORIF (ANDIF (ANDIF (LTHI (tmp_tmpops, 0), LTHI (tmp_tmpopd, 0)), GEHI (tmp_newval, 0)), ANDIF (ANDIF (GEHI (tmp_tmpops, 0), GEHI (tmp_tmpopd, 0)), LTHI (tmp_newval, 0)));
5689 CPU (h_vbit) = opval;
5690 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
5691 }
5692{
5693 {
5694 BI opval = 0;
5695 CPU (h_xbit) = opval;
5696 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
5697 }
5698 {
5699 BI opval = 0;
5700 SET_H_INSN_PREFIXED_P (opval);
5701 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
5702 }
5703}
5704}
5705}
5706
5707 abuf->written = written;
5708#undef FLD
5709}
5710 NEXT (vpc);
5711
5712 CASE (sem, INSN_ADD_M_D_M) : /* add-m.d [${Rs}${inc}],${Rd} */
5713{
5714 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5715 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5716#define FLD(f) abuf->fields.sfmt_add_m_b_m.f
5717 int UNUSED written = 0;
5718 IADDR UNUSED pc = abuf->addr;
5719 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5720
5721{
5722 SI tmp_tmpopd;
5723 SI tmp_tmpops;
5724 BI tmp_carry;
5725 SI tmp_newval;
5726 tmp_tmpops = ({ SI tmp_addr;
5727 SI tmp_tmp_mem;
5728 BI tmp_postinc;
5729 tmp_postinc = FLD (f_memmode);
5730; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
5731; tmp_tmp_mem = GETMEMSI (current_cpu, pc, tmp_addr);
5732; if (NEBI (tmp_postinc, 0)) {
5733{
5734if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
5735 tmp_addr = ADDSI (tmp_addr, 4);
5736}
5737 {
5738 SI opval = tmp_addr;
5739 SET_H_GR (FLD (f_operand1), opval);
5740 written |= (1 << 11);
5741 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5742 }
5743}
5744}
5745; tmp_tmp_mem; });
5746 tmp_tmpopd = GET_H_GR (FLD (f_operand2));
5747 tmp_carry = CPU (h_cbit);
5748 tmp_newval = ADDCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
5749 {
5750 SI opval = tmp_newval;
5751 SET_H_GR (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))), opval);
5752 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5753 }
5754{
5755 {
5756 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), ORIF (ANDIF (LTSI (tmp_tmpopd, 0), GESI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_newval, 0))));
5757 CPU (h_cbit) = opval;
5758 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
5759 }
5760 {
5761 BI opval = LTSI (tmp_newval, 0);
5762 CPU (h_nbit) = opval;
5763 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
5764 }
5765 {
5766 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
5767 CPU (h_zbit) = opval;
5768 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
5769 }
5770 {
5771 BI opval = ORIF (ANDIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (GESI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0)));
5772 CPU (h_vbit) = opval;
5773 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
5774 }
5775{
5776 {
5777 BI opval = 0;
5778 CPU (h_xbit) = opval;
5779 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
5780 }
5781 {
5782 BI opval = 0;
5783 SET_H_INSN_PREFIXED_P (opval);
5784 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
5785 }
5786}
5787}
5788}
5789
5790 abuf->written = written;
5791#undef FLD
5792}
5793 NEXT (vpc);
5794
5795 CASE (sem, INSN_ADDCBR) : /* add.b ${sconst8}],${Rd} */
5796{
5797 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5798 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5799#define FLD(f) abuf->fields.sfmt_addcbr.f
5800 int UNUSED written = 0;
5801 IADDR UNUSED pc = abuf->addr;
5802 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
5803
5804{
5805 QI tmp_tmpopd;
5806 QI tmp_tmpops;
5807 BI tmp_carry;
5808 QI tmp_newval;
5809 tmp_tmpops = FLD (f_indir_pc__byte);
5810 tmp_tmpopd = GET_H_GR (FLD (f_operand2));
5811 tmp_carry = CPU (h_cbit);
5812 tmp_newval = ADDCQI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
5813{
5814 SI tmp_oldregval;
5815 tmp_oldregval = GET_H_RAW_GR_PC (FLD (f_operand2));
5816 {
5817 SI opval = ORSI (ANDSI (tmp_newval, 255), ANDSI (tmp_oldregval, 0xffffff00));
5818 SET_H_GR (FLD (f_operand2), opval);
5819 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5820 }
5821}
5822{
5823 {
5824 BI opval = ORIF (ANDIF (LTQI (tmp_tmpops, 0), LTQI (tmp_tmpopd, 0)), ORIF (ANDIF (LTQI (tmp_tmpopd, 0), GEQI (tmp_newval, 0)), ANDIF (LTQI (tmp_tmpops, 0), GEQI (tmp_newval, 0))));
5825 CPU (h_cbit) = opval;
5826 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
5827 }
5828 {
5829 BI opval = LTQI (tmp_newval, 0);
5830 CPU (h_nbit) = opval;
5831 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
5832 }
5833 {
5834 BI opval = ANDIF (EQQI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
5835 CPU (h_zbit) = opval;
5836 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
5837 }
5838 {
5839 BI opval = ORIF (ANDIF (ANDIF (LTQI (tmp_tmpops, 0), LTQI (tmp_tmpopd, 0)), GEQI (tmp_newval, 0)), ANDIF (ANDIF (GEQI (tmp_tmpops, 0), GEQI (tmp_tmpopd, 0)), LTQI (tmp_newval, 0)));
5840 CPU (h_vbit) = opval;
5841 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
5842 }
5843{
5844 {
5845 BI opval = 0;
5846 CPU (h_xbit) = opval;
5847 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
5848 }
5849 {
5850 BI opval = 0;
5851 SET_H_INSN_PREFIXED_P (opval);
5852 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
5853 }
5854}
5855}
5856}
5857
5858#undef FLD
5859}
5860 NEXT (vpc);
5861
5862 CASE (sem, INSN_ADDCWR) : /* add.w ${sconst16}],${Rd} */
5863{
5864 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5865 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5866#define FLD(f) abuf->fields.sfmt_addcwr.f
5867 int UNUSED written = 0;
5868 IADDR UNUSED pc = abuf->addr;
5869 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
5870
5871{
5872 HI tmp_tmpopd;
5873 HI tmp_tmpops;
5874 BI tmp_carry;
5875 HI tmp_newval;
5876 tmp_tmpops = FLD (f_indir_pc__word);
5877 tmp_tmpopd = GET_H_GR (FLD (f_operand2));
5878 tmp_carry = CPU (h_cbit);
5879 tmp_newval = ADDCHI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
5880{
5881 SI tmp_oldregval;
5882 tmp_oldregval = GET_H_RAW_GR_PC (FLD (f_operand2));
5883 {
5884 SI opval = ORSI (ANDSI (tmp_newval, 65535), ANDSI (tmp_oldregval, 0xffff0000));
5885 SET_H_GR (FLD (f_operand2), opval);
5886 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5887 }
5888}
5889{
5890 {
5891 BI opval = ORIF (ANDIF (LTHI (tmp_tmpops, 0), LTHI (tmp_tmpopd, 0)), ORIF (ANDIF (LTHI (tmp_tmpopd, 0), GEHI (tmp_newval, 0)), ANDIF (LTHI (tmp_tmpops, 0), GEHI (tmp_newval, 0))));
5892 CPU (h_cbit) = opval;
5893 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
5894 }
5895 {
5896 BI opval = LTHI (tmp_newval, 0);
5897 CPU (h_nbit) = opval;
5898 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
5899 }
5900 {
5901 BI opval = ANDIF (EQHI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
5902 CPU (h_zbit) = opval;
5903 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
5904 }
5905 {
5906 BI opval = ORIF (ANDIF (ANDIF (LTHI (tmp_tmpops, 0), LTHI (tmp_tmpopd, 0)), GEHI (tmp_newval, 0)), ANDIF (ANDIF (GEHI (tmp_tmpops, 0), GEHI (tmp_tmpopd, 0)), LTHI (tmp_newval, 0)));
5907 CPU (h_vbit) = opval;
5908 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
5909 }
5910{
5911 {
5912 BI opval = 0;
5913 CPU (h_xbit) = opval;
5914 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
5915 }
5916 {
5917 BI opval = 0;
5918 SET_H_INSN_PREFIXED_P (opval);
5919 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
5920 }
5921}
5922}
5923}
5924
5925#undef FLD
5926}
5927 NEXT (vpc);
5928
5929 CASE (sem, INSN_ADDCDR) : /* add.d ${const32}],${Rd} */
5930{
5931 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5932 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5933#define FLD(f) abuf->fields.sfmt_addcdr.f
5934 int UNUSED written = 0;
5935 IADDR UNUSED pc = abuf->addr;
5936 vpc = SEM_NEXT_VPC (sem_arg, pc, 6);
5937
5938{
5939 SI tmp_tmpopd;
5940 SI tmp_tmpops;
5941 BI tmp_carry;
5942 SI tmp_newval;
5943 tmp_tmpops = FLD (f_indir_pc__dword);
5944 tmp_tmpopd = GET_H_GR (FLD (f_operand2));
5945 tmp_carry = CPU (h_cbit);
5946 tmp_newval = ADDCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
5947 {
5948 SI opval = tmp_newval;
5949 SET_H_GR (FLD (f_operand2), opval);
5950 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5951 }
5952{
5953 {
5954 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), ORIF (ANDIF (LTSI (tmp_tmpopd, 0), GESI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_newval, 0))));
5955 CPU (h_cbit) = opval;
5956 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
5957 }
5958 {
5959 BI opval = LTSI (tmp_newval, 0);
5960 CPU (h_nbit) = opval;
5961 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
5962 }
5963 {
5964 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
5965 CPU (h_zbit) = opval;
5966 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
5967 }
5968 {
5969 BI opval = ORIF (ANDIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (GESI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0)));
5970 CPU (h_vbit) = opval;
5971 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
5972 }
5973{
5974 {
5975 BI opval = 0;
5976 CPU (h_xbit) = opval;
5977 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
5978 }
5979 {
5980 BI opval = 0;
5981 SET_H_INSN_PREFIXED_P (opval);
5982 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
5983 }
5984}
5985}
5986}
5987
5988#undef FLD
5989}
5990 NEXT (vpc);
5991
5992 CASE (sem, INSN_ADDCPC) : /* add.d ${sconst32},PC */
5993{
5994 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5995 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
392753ae 5996#define FLD(f) abuf->fields.sfmt_move_c_sprv10_p9.f
f6bcefef
HPN		 5997 int UNUSED written = 0;
5998 IADDR UNUSED pc = abuf->addr;
5999 SEM_BRANCH_INIT
6000 vpc = SEM_NEXT_VPC (sem_arg, pc, 6);
6001
6002{
6003 SI tmp_newpc;
6004 SI tmp_oldpc;
6005 SI tmp_offs;
6006 tmp_offs = FLD (f_indir_pc__dword);
6007 tmp_oldpc = ADDSI (pc, 6);
6008 tmp_newpc = ADDSI (tmp_oldpc, tmp_offs);
6009 {
6010 USI opval = tmp_newpc;
6011 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
6012 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
6013 }
6014{
6015 {
6016 BI opval = ORIF (ANDIF (LTSI (tmp_offs, 0), LTSI (tmp_oldpc, 0)), ORIF (ANDIF (LTSI (tmp_oldpc, 0), GESI (tmp_newpc, 0)), ANDIF (LTSI (tmp_offs, 0), GESI (tmp_newpc, 0))));
6017 CPU (h_cbit) = opval;
6018 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
6019 }
6020 {
6021 BI opval = LTSI (tmp_newpc, 0);
6022 CPU (h_nbit) = opval;
6023 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
6024 }
6025 {
6026 BI opval = ANDIF (EQSI (tmp_newpc, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
6027 CPU (h_zbit) = opval;
6028 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
6029 }
6030 {
6031 BI opval = ORIF (ANDIF (ANDIF (LTSI (tmp_offs, 0), LTSI (tmp_oldpc, 0)), GESI (tmp_newpc, 0)), ANDIF (ANDIF (GESI (tmp_offs, 0), GESI (tmp_oldpc, 0)), LTSI (tmp_newpc, 0)));
6032 CPU (h_vbit) = opval;
6033 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
6034 }
6035{
6036 {
6037 BI opval = 0;
6038 CPU (h_xbit) = opval;
6039 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
6040 }
6041 {
6042 BI opval = 0;
6043 SET_H_INSN_PREFIXED_P (opval);
6044 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
6045 }
6046}
6047}
6048}
6049
6050 SEM_BRANCH_FINI (vpc);
6051#undef FLD
6052}
6053 NEXT (vpc);
6054
6055 CASE (sem, INSN_ADDS_B_R) : /* adds.b $Rs,$Rd */
6056{
6057 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6058 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6059#define FLD(f) abuf->fields.sfmt_add_b_r.f
6060 int UNUSED written = 0;
6061 IADDR UNUSED pc = abuf->addr;
6062 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6063
6064{
6065 SI tmp_tmpopd;
6066 SI tmp_tmpops;
6067 BI tmp_carry;
6068 SI tmp_newval;
6069 tmp_tmpops = EXTQISI (TRUNCSIQI (GET_H_GR (FLD (f_operand1))));
6070 tmp_tmpopd = GET_H_GR (FLD (f_operand2));
6071 tmp_carry = CPU (h_cbit);
6072 tmp_newval = ADDCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
6073 {
6074 SI opval = tmp_newval;
6075 SET_H_GR (FLD (f_operand2), opval);
6076 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
6077 }
6078{
6079 {
6080 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), ORIF (ANDIF (LTSI (tmp_tmpopd, 0), GESI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_newval, 0))));
6081 CPU (h_cbit) = opval;
6082 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
6083 }
6084 {
6085 BI opval = LTSI (tmp_newval, 0);
6086 CPU (h_nbit) = opval;
6087 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
6088 }
6089 {
6090 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
6091 CPU (h_zbit) = opval;
6092 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
6093 }
6094 {
6095 BI opval = ORIF (ANDIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (GESI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0)));
6096 CPU (h_vbit) = opval;
6097 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
6098 }
6099{
6100 {
6101 BI opval = 0;
6102 CPU (h_xbit) = opval;
6103 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
6104 }
6105 {
6106 BI opval = 0;
6107 SET_H_INSN_PREFIXED_P (opval);
6108 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
6109 }
6110}
6111}
6112}
6113
6114#undef FLD
6115}
6116 NEXT (vpc);
6117
6118 CASE (sem, INSN_ADDS_W_R) : /* adds.w $Rs,$Rd */
6119{
6120 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6121 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6122#define FLD(f) abuf->fields.sfmt_add_b_r.f
6123 int UNUSED written = 0;
6124 IADDR UNUSED pc = abuf->addr;
6125 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6126
6127{
6128 SI tmp_tmpopd;
6129 SI tmp_tmpops;
6130 BI tmp_carry;
6131 SI tmp_newval;
6132 tmp_tmpops = EXTHISI (TRUNCSIHI (GET_H_GR (FLD (f_operand1))));
6133 tmp_tmpopd = GET_H_GR (FLD (f_operand2));
6134 tmp_carry = CPU (h_cbit);
6135 tmp_newval = ADDCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
6136 {
6137 SI opval = tmp_newval;
6138 SET_H_GR (FLD (f_operand2), opval);
6139 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
6140 }
6141{
6142 {
6143 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), ORIF (ANDIF (LTSI (tmp_tmpopd, 0), GESI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_newval, 0))));
6144 CPU (h_cbit) = opval;
6145 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
6146 }
6147 {
6148 BI opval = LTSI (tmp_newval, 0);
6149 CPU (h_nbit) = opval;
6150 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
6151 }
6152 {
6153 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
6154 CPU (h_zbit) = opval;
6155 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
6156 }
6157 {
6158 BI opval = ORIF (ANDIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (GESI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0)));
6159 CPU (h_vbit) = opval;
6160 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
6161 }
6162{
6163 {
6164 BI opval = 0;
6165 CPU (h_xbit) = opval;
6166 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
6167 }
6168 {
6169 BI opval = 0;
6170 SET_H_INSN_PREFIXED_P (opval);
6171 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
6172 }
6173}
6174}
6175}
6176
6177#undef FLD
6178}
6179 NEXT (vpc);
6180
6181 CASE (sem, INSN_ADDS_M_B_M) : /* adds-m.b [${Rs}${inc}],$Rd */
6182{
6183 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6184 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6185#define FLD(f) abuf->fields.sfmt_add_m_b_m.f
6186 int UNUSED written = 0;
6187 IADDR UNUSED pc = abuf->addr;
6188 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6189
6190{
6191 SI tmp_tmpopd;
6192 SI tmp_tmpops;
6193 BI tmp_carry;
6194 SI tmp_newval;
6195 tmp_tmpops = EXTQISI (({ SI tmp_addr;
6196 QI tmp_tmp_mem;
6197 BI tmp_postinc;
6198 tmp_postinc = FLD (f_memmode);
6199; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
6200; tmp_tmp_mem = GETMEMQI (current_cpu, pc, tmp_addr);
6201; if (NEBI (tmp_postinc, 0)) {
6202{
6203if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
6204 tmp_addr = ADDSI (tmp_addr, 1);
6205}
6206 {
6207 SI opval = tmp_addr;
6208 SET_H_GR (FLD (f_operand1), opval);
6209 written |= (1 << 11);
6210 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
6211 }
6212}
6213}
6214; tmp_tmp_mem; }));
6215 tmp_tmpopd = GET_H_GR (FLD (f_operand2));
6216 tmp_carry = CPU (h_cbit);
6217 tmp_newval = ADDCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
6218 {
6219 SI opval = tmp_newval;
6220 SET_H_GR (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))), opval);
6221 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
6222 }
6223{
6224 {
6225 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), ORIF (ANDIF (LTSI (tmp_tmpopd, 0), GESI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_newval, 0))));
6226 CPU (h_cbit) = opval;
6227 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
6228 }
6229 {
6230 BI opval = LTSI (tmp_newval, 0);
6231 CPU (h_nbit) = opval;
6232 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
6233 }
6234 {
6235 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
6236 CPU (h_zbit) = opval;
6237 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
6238 }
6239 {
6240 BI opval = ORIF (ANDIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (GESI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0)));
6241 CPU (h_vbit) = opval;
6242 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
6243 }
6244{
6245 {
6246 BI opval = 0;
6247 CPU (h_xbit) = opval;
6248 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
6249 }
6250 {
6251 BI opval = 0;
6252 SET_H_INSN_PREFIXED_P (opval);
6253 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
6254 }
6255}
6256}
6257}
6258
6259 abuf->written = written;
6260#undef FLD
6261}
6262 NEXT (vpc);
6263
6264 CASE (sem, INSN_ADDS_M_W_M) : /* adds-m.w [${Rs}${inc}],$Rd */
6265{
6266 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6267 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6268#define FLD(f) abuf->fields.sfmt_add_m_b_m.f
6269 int UNUSED written = 0;
6270 IADDR UNUSED pc = abuf->addr;
6271 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6272
6273{
6274 SI tmp_tmpopd;
6275 SI tmp_tmpops;
6276 BI tmp_carry;
6277 SI tmp_newval;
6278 tmp_tmpops = EXTHISI (({ SI tmp_addr;
6279 HI tmp_tmp_mem;
6280 BI tmp_postinc;
6281 tmp_postinc = FLD (f_memmode);
6282; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
6283; tmp_tmp_mem = GETMEMHI (current_cpu, pc, tmp_addr);
6284; if (NEBI (tmp_postinc, 0)) {
6285{
6286if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
6287 tmp_addr = ADDSI (tmp_addr, 2);
6288}
6289 {
6290 SI opval = tmp_addr;
6291 SET_H_GR (FLD (f_operand1), opval);
6292 written |= (1 << 11);
6293 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
6294 }
6295}
6296}
6297; tmp_tmp_mem; }));
6298 tmp_tmpopd = GET_H_GR (FLD (f_operand2));
6299 tmp_carry = CPU (h_cbit);
6300 tmp_newval = ADDCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
6301 {
6302 SI opval = tmp_newval;
6303 SET_H_GR (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))), opval);
6304 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
6305 }
6306{
6307 {
6308 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), ORIF (ANDIF (LTSI (tmp_tmpopd, 0), GESI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_newval, 0))));
6309 CPU (h_cbit) = opval;
6310 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
6311 }
6312 {
6313 BI opval = LTSI (tmp_newval, 0);
6314 CPU (h_nbit) = opval;
6315 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
6316 }
6317 {
6318 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
6319 CPU (h_zbit) = opval;
6320 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
6321 }
6322 {
6323 BI opval = ORIF (ANDIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (GESI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0)));
6324 CPU (h_vbit) = opval;
6325 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
6326 }
6327{
6328 {
6329 BI opval = 0;
6330 CPU (h_xbit) = opval;
6331 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
6332 }
6333 {
6334 BI opval = 0;
6335 SET_H_INSN_PREFIXED_P (opval);
6336 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
6337 }
6338}
6339}
6340}
6341
6342 abuf->written = written;
6343#undef FLD
6344}
6345 NEXT (vpc);
6346
6347 CASE (sem, INSN_ADDSCBR) : /* [${Rs}${inc}],$Rd */
6348{
6349 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6350 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6351#define FLD(f) abuf->fields.sfmt_addcbr.f
6352 int UNUSED written = 0;
6353 IADDR UNUSED pc = abuf->addr;
6354 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
6355
6356{
6357 SI tmp_tmpopd;
6358 SI tmp_tmpops;
6359 BI tmp_carry;
6360 SI tmp_newval;
6361 tmp_tmpops = EXTQISI (TRUNCSIQI (FLD (f_indir_pc__byte)));
6362 tmp_tmpopd = GET_H_GR (FLD (f_operand2));
6363 tmp_carry = CPU (h_cbit);
6364 tmp_newval = ADDCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
6365 {
6366 SI opval = tmp_newval;
6367 SET_H_GR (FLD (f_operand2), opval);
6368 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
6369 }
6370{
6371 {
6372 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), ORIF (ANDIF (LTSI (tmp_tmpopd, 0), GESI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_newval, 0))));
6373 CPU (h_cbit) = opval;
6374 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
6375 }
6376 {
6377 BI opval = LTSI (tmp_newval, 0);
6378 CPU (h_nbit) = opval;
6379 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
6380 }
6381 {
6382 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
6383 CPU (h_zbit) = opval;
6384 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
6385 }
6386 {
6387 BI opval = ORIF (ANDIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (GESI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0)));
6388 CPU (h_vbit) = opval;
6389 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
6390 }
6391{
6392 {
6393 BI opval = 0;
6394 CPU (h_xbit) = opval;
6395 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
6396 }
6397 {
6398 BI opval = 0;
6399 SET_H_INSN_PREFIXED_P (opval);
6400 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
6401 }
6402}
6403}
6404}
6405
6406#undef FLD
6407}
6408 NEXT (vpc);
6409
6410 CASE (sem, INSN_ADDSCWR) : /* [${Rs}${inc}],$Rd */
6411{
6412 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6413 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6414#define FLD(f) abuf->fields.sfmt_addcwr.f
6415 int UNUSED written = 0;
6416 IADDR UNUSED pc = abuf->addr;
6417 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
6418
6419{
6420 SI tmp_tmpopd;
6421 SI tmp_tmpops;
6422 BI tmp_carry;
6423 SI tmp_newval;
6424 tmp_tmpops = EXTHISI (TRUNCSIHI (FLD (f_indir_pc__word)));
6425 tmp_tmpopd = GET_H_GR (FLD (f_operand2));
6426 tmp_carry = CPU (h_cbit);
6427 tmp_newval = ADDCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
6428 {
6429 SI opval = tmp_newval;
6430 SET_H_GR (FLD (f_operand2), opval);
6431 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
6432 }
6433{
6434 {
6435 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), ORIF (ANDIF (LTSI (tmp_tmpopd, 0), GESI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_newval, 0))));
6436 CPU (h_cbit) = opval;
6437 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
6438 }
6439 {
6440 BI opval = LTSI (tmp_newval, 0);
6441 CPU (h_nbit) = opval;
6442 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
6443 }
6444 {
6445 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
6446 CPU (h_zbit) = opval;
6447 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
6448 }
6449 {
6450 BI opval = ORIF (ANDIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (GESI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0)));
6451 CPU (h_vbit) = opval;
6452 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
6453 }
6454{
6455 {
6456 BI opval = 0;
6457 CPU (h_xbit) = opval;
6458 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
6459 }
6460 {
6461 BI opval = 0;
6462 SET_H_INSN_PREFIXED_P (opval);
6463 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
6464 }
6465}
6466}
6467}
6468
6469#undef FLD
6470}
6471 NEXT (vpc);
6472
6473 CASE (sem, INSN_ADDSPCPC) : /* adds.w [PC],PC */
6474{
6475 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6476 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2310652a 6477#define FLD(f) abuf->fields.sfmt_empty.f
f6bcefef
HPN		 6478 int UNUSED written = 0;
6479 IADDR UNUSED pc = abuf->addr;
6480 SEM_BRANCH_INIT
6481 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6482
6483{
6484 SI tmp_newpc;
6485 SI tmp_oldpc;
6486 HI tmp_offs;
6487if (NOTBI (GET_H_INSN_PREFIXED_P ())) {
6488cgen_rtx_error (current_cpu, "Unexpected adds.w [PC],PC without prefix");
6489}
6490 tmp_offs = GETMEMHI (current_cpu, pc, CPU (h_prefixreg_pre_v32));
6491 tmp_oldpc = ADDSI (pc, 2);
6492 tmp_newpc = ADDSI (tmp_oldpc, tmp_offs);
6493 {
6494 USI opval = tmp_newpc;
6495 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
6496 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
6497 }
6498{
6499 {
6500 BI opval = ORIF (ANDIF (LTSI (EXTHISI (tmp_offs), 0), LTSI (tmp_oldpc, 0)), ORIF (ANDIF (LTSI (tmp_oldpc, 0), GESI (tmp_newpc, 0)), ANDIF (LTSI (EXTHISI (tmp_offs), 0), GESI (tmp_newpc, 0))));
6501 CPU (h_cbit) = opval;
6502 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
6503 }
6504 {
6505 BI opval = LTSI (tmp_newpc, 0);
6506 CPU (h_nbit) = opval;
6507 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
6508 }
6509 {
6510 BI opval = ANDIF (EQSI (tmp_newpc, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
6511 CPU (h_zbit) = opval;
6512 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
6513 }
6514 {
6515 BI opval = ORIF (ANDIF (ANDIF (LTSI (EXTHISI (tmp_offs), 0), LTSI (tmp_oldpc, 0)), GESI (tmp_newpc, 0)), ANDIF (ANDIF (GESI (EXTHISI (tmp_offs), 0), GESI (tmp_oldpc, 0)), LTSI (tmp_newpc, 0)));
6516 CPU (h_vbit) = opval;
6517 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
6518 }
6519{
6520 {
6521 BI opval = 0;
6522 CPU (h_xbit) = opval;
6523 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
6524 }
6525 {
6526 BI opval = 0;
6527 SET_H_INSN_PREFIXED_P (opval);
6528 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
6529 }
6530}
6531}
6532}
6533
6534 SEM_BRANCH_FINI (vpc);
6535#undef FLD
6536}
6537 NEXT (vpc);
6538
6539 CASE (sem, INSN_ADDU_B_R) : /* addu.b $Rs,$Rd */
6540{
6541 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6542 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6543#define FLD(f) abuf->fields.sfmt_add_b_r.f
6544 int UNUSED written = 0;
6545 IADDR UNUSED pc = abuf->addr;
6546 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6547
6548{
6549 SI tmp_tmpopd;
6550 SI tmp_tmpops;
6551 BI tmp_carry;
6552 SI tmp_newval;
6553 tmp_tmpops = ZEXTQISI (TRUNCSIQI (GET_H_GR (FLD (f_operand1))));
6554 tmp_tmpopd = GET_H_GR (FLD (f_operand2));
6555 tmp_carry = CPU (h_cbit);
6556 tmp_newval = ADDCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
6557 {
6558 SI opval = tmp_newval;
6559 SET_H_GR (FLD (f_operand2), opval);
6560 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
6561 }
6562{
6563 {
6564 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), ORIF (ANDIF (LTSI (tmp_tmpopd, 0), GESI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_newval, 0))));
6565 CPU (h_cbit) = opval;
6566 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
6567 }
6568 {
6569 BI opval = LTSI (tmp_newval, 0);
6570 CPU (h_nbit) = opval;
6571 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
6572 }
6573 {
6574 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
6575 CPU (h_zbit) = opval;
6576 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
6577 }
6578 {
6579 BI opval = ORIF (ANDIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (GESI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0)));
6580 CPU (h_vbit) = opval;
6581 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
6582 }
6583{
6584 {
6585 BI opval = 0;
6586 CPU (h_xbit) = opval;
6587 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
6588 }
6589 {
6590 BI opval = 0;
6591 SET_H_INSN_PREFIXED_P (opval);
6592 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
6593 }
6594}
6595}
6596}
6597
6598#undef FLD
6599}
6600 NEXT (vpc);
6601
6602 CASE (sem, INSN_ADDU_W_R) : /* addu.w $Rs,$Rd */
6603{
6604 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6605 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6606#define FLD(f) abuf->fields.sfmt_add_b_r.f
6607 int UNUSED written = 0;
6608 IADDR UNUSED pc = abuf->addr;
6609 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6610
6611{
6612 SI tmp_tmpopd;
6613 SI tmp_tmpops;
6614 BI tmp_carry;
6615 SI tmp_newval;
6616 tmp_tmpops = ZEXTHISI (TRUNCSIHI (GET_H_GR (FLD (f_operand1))));
6617 tmp_tmpopd = GET_H_GR (FLD (f_operand2));
6618 tmp_carry = CPU (h_cbit);
6619 tmp_newval = ADDCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
6620 {
6621 SI opval = tmp_newval;
6622 SET_H_GR (FLD (f_operand2), opval);
6623 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
6624 }
6625{
6626 {
6627 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), ORIF (ANDIF (LTSI (tmp_tmpopd, 0), GESI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_newval, 0))));
6628 CPU (h_cbit) = opval;
6629 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
6630 }
6631 {
6632 BI opval = LTSI (tmp_newval, 0);
6633 CPU (h_nbit) = opval;
6634 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
6635 }
6636 {
6637 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
6638 CPU (h_zbit) = opval;
6639 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
6640 }
6641 {
6642 BI opval = ORIF (ANDIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (GESI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0)));
6643 CPU (h_vbit) = opval;
6644 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
6645 }
6646{
6647 {
6648 BI opval = 0;
6649 CPU (h_xbit) = opval;
6650 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
6651 }
6652 {
6653 BI opval = 0;
6654 SET_H_INSN_PREFIXED_P (opval);
6655 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
6656 }
6657}
6658}
6659}
6660
6661#undef FLD
6662}
6663 NEXT (vpc);
6664
6665 CASE (sem, INSN_ADDU_M_B_M) : /* addu-m.b [${Rs}${inc}],$Rd */
6666{
6667 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6668 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6669#define FLD(f) abuf->fields.sfmt_add_m_b_m.f
6670 int UNUSED written = 0;
6671 IADDR UNUSED pc = abuf->addr;
6672 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6673
6674{
6675 SI tmp_tmpopd;
6676 SI tmp_tmpops;
6677 BI tmp_carry;
6678 SI tmp_newval;
6679 tmp_tmpops = ZEXTQISI (({ SI tmp_addr;
6680 QI tmp_tmp_mem;
6681 BI tmp_postinc;
6682 tmp_postinc = FLD (f_memmode);
6683; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
6684; tmp_tmp_mem = GETMEMQI (current_cpu, pc, tmp_addr);
6685; if (NEBI (tmp_postinc, 0)) {
6686{
6687if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
6688 tmp_addr = ADDSI (tmp_addr, 1);
6689}
6690 {
6691 SI opval = tmp_addr;
6692 SET_H_GR (FLD (f_operand1), opval);
6693 written |= (1 << 11);
6694 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
6695 }
6696}
6697}
6698; tmp_tmp_mem; }));
6699 tmp_tmpopd = GET_H_GR (FLD (f_operand2));
6700 tmp_carry = CPU (h_cbit);
6701 tmp_newval = ADDCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
6702 {
6703 SI opval = tmp_newval;
6704 SET_H_GR (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))), opval);
6705 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
6706 }
6707{
6708 {
6709 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), ORIF (ANDIF (LTSI (tmp_tmpopd, 0), GESI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_newval, 0))));
6710 CPU (h_cbit) = opval;
6711 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
6712 }
6713 {
6714 BI opval = LTSI (tmp_newval, 0);
6715 CPU (h_nbit) = opval;
6716 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
6717 }
6718 {
6719 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
6720 CPU (h_zbit) = opval;
6721 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
6722 }
6723 {
6724 BI opval = ORIF (ANDIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (GESI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0)));
6725 CPU (h_vbit) = opval;
6726 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
6727 }
6728{
6729 {
6730 BI opval = 0;
6731 CPU (h_xbit) = opval;
6732 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
6733 }
6734 {
6735 BI opval = 0;
6736 SET_H_INSN_PREFIXED_P (opval);
6737 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
6738 }
6739}
6740}
6741}
6742
6743 abuf->written = written;
6744#undef FLD
6745}
6746 NEXT (vpc);
6747
6748 CASE (sem, INSN_ADDU_M_W_M) : /* addu-m.w [${Rs}${inc}],$Rd */
6749{
6750 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6751 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6752#define FLD(f) abuf->fields.sfmt_add_m_b_m.f
6753 int UNUSED written = 0;
6754 IADDR UNUSED pc = abuf->addr;
6755 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6756
6757{
6758 SI tmp_tmpopd;
6759 SI tmp_tmpops;
6760 BI tmp_carry;
6761 SI tmp_newval;
6762 tmp_tmpops = ZEXTHISI (({ SI tmp_addr;
6763 HI tmp_tmp_mem;
6764 BI tmp_postinc;
6765 tmp_postinc = FLD (f_memmode);
6766; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
6767; tmp_tmp_mem = GETMEMHI (current_cpu, pc, tmp_addr);
6768; if (NEBI (tmp_postinc, 0)) {
6769{
6770if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
6771 tmp_addr = ADDSI (tmp_addr, 2);
6772}
6773 {
6774 SI opval = tmp_addr;
6775 SET_H_GR (FLD (f_operand1), opval);
6776 written |= (1 << 11);
6777 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
6778 }
6779}
6780}
6781; tmp_tmp_mem; }));
6782 tmp_tmpopd = GET_H_GR (FLD (f_operand2));
6783 tmp_carry = CPU (h_cbit);
6784 tmp_newval = ADDCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
6785 {
6786 SI opval = tmp_newval;
6787 SET_H_GR (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))), opval);
6788 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
6789 }
6790{
6791 {
6792 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), ORIF (ANDIF (LTSI (tmp_tmpopd, 0), GESI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_newval, 0))));
6793 CPU (h_cbit) = opval;
6794 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
6795 }
6796 {
6797 BI opval = LTSI (tmp_newval, 0);
6798 CPU (h_nbit) = opval;
6799 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
6800 }
6801 {
6802 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
6803 CPU (h_zbit) = opval;
6804 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
6805 }
6806 {
6807 BI opval = ORIF (ANDIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (GESI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0)));
6808 CPU (h_vbit) = opval;
6809 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
6810 }
6811{
6812 {
6813 BI opval = 0;
6814 CPU (h_xbit) = opval;
6815 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
6816 }
6817 {
6818 BI opval = 0;
6819 SET_H_INSN_PREFIXED_P (opval);
6820 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
6821 }
6822}
6823}
6824}
6825
6826 abuf->written = written;
6827#undef FLD
6828}
6829 NEXT (vpc);
6830
6831 CASE (sem, INSN_ADDUCBR) : /* [${Rs}${inc}],$Rd */
6832{
6833 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6834 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6835#define FLD(f) abuf->fields.sfmt_addcbr.f
6836 int UNUSED written = 0;
6837 IADDR UNUSED pc = abuf->addr;
6838 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
6839
6840{
6841 SI tmp_tmpopd;
6842 SI tmp_tmpops;
6843 BI tmp_carry;
6844 SI tmp_newval;
6845 tmp_tmpops = ZEXTQISI (TRUNCSIQI (FLD (f_indir_pc__byte)));
6846 tmp_tmpopd = GET_H_GR (FLD (f_operand2));
6847 tmp_carry = CPU (h_cbit);
6848 tmp_newval = ADDCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
6849 {
6850 SI opval = tmp_newval;
6851 SET_H_GR (FLD (f_operand2), opval);
6852 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
6853 }
6854{
6855 {
6856 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), ORIF (ANDIF (LTSI (tmp_tmpopd, 0), GESI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_newval, 0))));
6857 CPU (h_cbit) = opval;
6858 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
6859 }
6860 {
6861 BI opval = LTSI (tmp_newval, 0);
6862 CPU (h_nbit) = opval;
6863 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
6864 }
6865 {
6866 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
6867 CPU (h_zbit) = opval;
6868 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
6869 }
6870 {
6871 BI opval = ORIF (ANDIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (GESI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0)));
6872 CPU (h_vbit) = opval;
6873 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
6874 }
6875{
6876 {
6877 BI opval = 0;
6878 CPU (h_xbit) = opval;
6879 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
6880 }
6881 {
6882 BI opval = 0;
6883 SET_H_INSN_PREFIXED_P (opval);
6884 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
6885 }
6886}
6887}
6888}
6889
6890#undef FLD
6891}
6892 NEXT (vpc);
6893
6894 CASE (sem, INSN_ADDUCWR) : /* [${Rs}${inc}],$Rd */
6895{
6896 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6897 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6898#define FLD(f) abuf->fields.sfmt_addcwr.f
6899 int UNUSED written = 0;
6900 IADDR UNUSED pc = abuf->addr;
6901 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
6902
6903{
6904 SI tmp_tmpopd;
6905 SI tmp_tmpops;
6906 BI tmp_carry;
6907 SI tmp_newval;
6908 tmp_tmpops = ZEXTHISI (TRUNCSIHI (FLD (f_indir_pc__word)));
6909 tmp_tmpopd = GET_H_GR (FLD (f_operand2));
6910 tmp_carry = CPU (h_cbit);
6911 tmp_newval = ADDCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
6912 {
6913 SI opval = tmp_newval;
6914 SET_H_GR (FLD (f_operand2), opval);
6915 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
6916 }
6917{
6918 {
6919 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), ORIF (ANDIF (LTSI (tmp_tmpopd, 0), GESI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_newval, 0))));
6920 CPU (h_cbit) = opval;
6921 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
6922 }
6923 {
6924 BI opval = LTSI (tmp_newval, 0);
6925 CPU (h_nbit) = opval;
6926 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
6927 }
6928 {
6929 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
6930 CPU (h_zbit) = opval;
6931 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
6932 }
6933 {
6934 BI opval = ORIF (ANDIF (ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (GESI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0)));
6935 CPU (h_vbit) = opval;
6936 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
6937 }
6938{
6939 {
6940 BI opval = 0;
6941 CPU (h_xbit) = opval;
6942 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
6943 }
6944 {
6945 BI opval = 0;
6946 SET_H_INSN_PREFIXED_P (opval);
6947 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
6948 }
6949}
6950}
6951}
6952
6953#undef FLD
6954}
6955 NEXT (vpc);
6956
6957 CASE (sem, INSN_SUB_B_R) : /* sub.b $Rs,$Rd */
6958{
6959 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6960 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6961#define FLD(f) abuf->fields.sfmt_add_b_r.f
6962 int UNUSED written = 0;
6963 IADDR UNUSED pc = abuf->addr;
6964 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6965
6966{
6967 QI tmp_tmpopd;
6968 QI tmp_tmpops;
6969 BI tmp_carry;
6970 QI tmp_newval;
6971 tmp_tmpops = GET_H_GR (FLD (f_operand1));
6972 tmp_tmpopd = GET_H_GR (FLD (f_operand2));
6973 tmp_carry = CPU (h_cbit);
6974 tmp_newval = SUBCQI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
6975{
6976 SI tmp_oldregval;
6977 tmp_oldregval = GET_H_RAW_GR_PC (FLD (f_operand2));
6978 {
6979 SI opval = ORSI (ANDSI (tmp_newval, 255), ANDSI (tmp_oldregval, 0xffffff00));
6980 SET_H_GR (FLD (f_operand2), opval);
6981 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
6982 }
6983}
6984{
6985 {
6986 BI opval = ORIF (ANDIF (LTQI (tmp_tmpops, 0), GEQI (tmp_tmpopd, 0)), ORIF (ANDIF (GEQI (tmp_tmpopd, 0), LTQI (tmp_newval, 0)), ANDIF (LTQI (tmp_tmpops, 0), LTQI (tmp_newval, 0))));
6987 CPU (h_cbit) = opval;
6988 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
6989 }
6990 {
6991 BI opval = LTQI (tmp_newval, 0);
6992 CPU (h_nbit) = opval;
6993 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
6994 }
6995 {
6996 BI opval = ANDIF (EQQI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
6997 CPU (h_zbit) = opval;
6998 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
6999 }
7000 {
7001 BI opval = ORIF (ANDIF (ANDIF (GEQI (tmp_tmpops, 0), LTQI (tmp_tmpopd, 0)), GEQI (tmp_newval, 0)), ANDIF (ANDIF (LTQI (tmp_tmpops, 0), GEQI (tmp_tmpopd, 0)), LTQI (tmp_newval, 0)));
7002 CPU (h_vbit) = opval;
7003 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
7004 }
7005{
7006 {
7007 BI opval = 0;
7008 CPU (h_xbit) = opval;
7009 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
7010 }
7011 {
7012 BI opval = 0;
7013 SET_H_INSN_PREFIXED_P (opval);
7014 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
7015 }
7016}
7017}
7018}
7019
7020#undef FLD
7021}
7022 NEXT (vpc);
7023
7024 CASE (sem, INSN_SUB_W_R) : /* sub.w $Rs,$Rd */
7025{
7026 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
7027 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
7028#define FLD(f) abuf->fields.sfmt_add_b_r.f
7029 int UNUSED written = 0;
7030 IADDR UNUSED pc = abuf->addr;
7031 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
7032
7033{
7034 HI tmp_tmpopd;
7035 HI tmp_tmpops;
7036 BI tmp_carry;
7037 HI tmp_newval;
7038 tmp_tmpops = GET_H_GR (FLD (f_operand1));
7039 tmp_tmpopd = GET_H_GR (FLD (f_operand2));
7040 tmp_carry = CPU (h_cbit);
7041 tmp_newval = SUBCHI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
7042{
7043 SI tmp_oldregval;
7044 tmp_oldregval = GET_H_RAW_GR_PC (FLD (f_operand2));
7045 {
7046 SI opval = ORSI (ANDSI (tmp_newval, 65535), ANDSI (tmp_oldregval, 0xffff0000));
7047 SET_H_GR (FLD (f_operand2), opval);
7048 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
7049 }
7050}
7051{
7052 {
7053 BI opval = ORIF (ANDIF (LTHI (tmp_tmpops, 0), GEHI (tmp_tmpopd, 0)), ORIF (ANDIF (GEHI (tmp_tmpopd, 0), LTHI (tmp_newval, 0)), ANDIF (LTHI (tmp_tmpops, 0), LTHI (tmp_newval, 0))));
7054 CPU (h_cbit) = opval;
7055 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
7056 }
7057 {
7058 BI opval = LTHI (tmp_newval, 0);
7059 CPU (h_nbit) = opval;
7060 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
7061 }
7062 {
7063 BI opval = ANDIF (EQHI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
7064 CPU (h_zbit) = opval;
7065 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
7066 }
7067 {
7068 BI opval = ORIF (ANDIF (ANDIF (GEHI (tmp_tmpops, 0), LTHI (tmp_tmpopd, 0)), GEHI (tmp_newval, 0)), ANDIF (ANDIF (LTHI (tmp_tmpops, 0), GEHI (tmp_tmpopd, 0)), LTHI (tmp_newval, 0)));
7069 CPU (h_vbit) = opval;
7070 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
7071 }
7072{
7073 {
7074 BI opval = 0;
7075 CPU (h_xbit) = opval;
7076 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
7077 }
7078 {
7079 BI opval = 0;
7080 SET_H_INSN_PREFIXED_P (opval);
7081 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
7082 }
7083}
7084}
7085}
7086
7087#undef FLD
7088}
7089 NEXT (vpc);
7090
7091 CASE (sem, INSN_SUB_D_R) : /* sub.d $Rs,$Rd */
7092{
7093 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
7094 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
7095#define FLD(f) abuf->fields.sfmt_add_b_r.f
7096 int UNUSED written = 0;
7097 IADDR UNUSED pc = abuf->addr;
7098 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
7099
7100{
7101 SI tmp_tmpopd;
7102 SI tmp_tmpops;
7103 BI tmp_carry;
7104 SI tmp_newval;
7105 tmp_tmpops = GET_H_GR (FLD (f_operand1));
7106 tmp_tmpopd = GET_H_GR (FLD (f_operand2));
7107 tmp_carry = CPU (h_cbit);
7108 tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
7109 {
7110 SI opval = tmp_newval;
7111 SET_H_GR (FLD (f_operand2), opval);
7112 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
7113 }
7114{
7115 {
7116 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0))));
7117 CPU (h_cbit) = opval;
7118 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
7119 }
7120 {
7121 BI opval = LTSI (tmp_newval, 0);
7122 CPU (h_nbit) = opval;
7123 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
7124 }
7125 {
7126 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
7127 CPU (h_zbit) = opval;
7128 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
7129 }
7130 {
7131 BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0)));
7132 CPU (h_vbit) = opval;
7133 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
7134 }
7135{
7136 {
7137 BI opval = 0;
7138 CPU (h_xbit) = opval;
7139 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
7140 }
7141 {
7142 BI opval = 0;
7143 SET_H_INSN_PREFIXED_P (opval);
7144 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
7145 }
7146}
7147}
7148}
7149
7150#undef FLD
7151}
7152 NEXT (vpc);
7153
7154 CASE (sem, INSN_SUB_M_B_M) : /* sub-m.b [${Rs}${inc}],${Rd} */
7155{
7156 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
7157 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
7158#define FLD(f) abuf->fields.sfmt_add_m_b_m.f
7159 int UNUSED written = 0;
7160 IADDR UNUSED pc = abuf->addr;
7161 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
7162
7163{
7164 QI tmp_tmpopd;
7165 QI tmp_tmpops;
7166 BI tmp_carry;
7167 QI tmp_newval;
7168 tmp_tmpops = ({ SI tmp_addr;
7169 QI tmp_tmp_mem;
7170 BI tmp_postinc;
7171 tmp_postinc = FLD (f_memmode);
7172; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
7173; tmp_tmp_mem = GETMEMQI (current_cpu, pc, tmp_addr);
7174; if (NEBI (tmp_postinc, 0)) {
7175{
7176if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
7177 tmp_addr = ADDSI (tmp_addr, 1);
7178}
7179 {
7180 SI opval = tmp_addr;
7181 SET_H_GR (FLD (f_operand1), opval);
7182 written |= (1 << 12);
7183 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
7184 }
7185}
7186}
7187; tmp_tmp_mem; });
7188 tmp_tmpopd = GET_H_GR (FLD (f_operand2));
7189 tmp_carry = CPU (h_cbit);
7190 tmp_newval = SUBCQI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
7191{
7192 SI tmp_oldregval;
7193 tmp_oldregval = GET_H_RAW_GR_PC (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))));
7194 {
7195 SI opval = ORSI (ANDSI (tmp_newval, 255), ANDSI (tmp_oldregval, 0xffffff00));
7196 SET_H_GR (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))), opval);
7197 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
7198 }
7199}
7200{
7201 {
7202 BI opval = ORIF (ANDIF (LTQI (tmp_tmpops, 0), GEQI (tmp_tmpopd, 0)), ORIF (ANDIF (GEQI (tmp_tmpopd, 0), LTQI (tmp_newval, 0)), ANDIF (LTQI (tmp_tmpops, 0), LTQI (tmp_newval, 0))));
7203 CPU (h_cbit) = opval;
7204 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
7205 }
7206 {
7207 BI opval = LTQI (tmp_newval, 0);
7208 CPU (h_nbit) = opval;
7209 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
7210 }
7211 {
7212 BI opval = ANDIF (EQQI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
7213 CPU (h_zbit) = opval;
7214 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
7215 }
7216 {
7217 BI opval = ORIF (ANDIF (ANDIF (GEQI (tmp_tmpops, 0), LTQI (tmp_tmpopd, 0)), GEQI (tmp_newval, 0)), ANDIF (ANDIF (LTQI (tmp_tmpops, 0), GEQI (tmp_tmpopd, 0)), LTQI (tmp_newval, 0)));
7218 CPU (h_vbit) = opval;
7219 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
7220 }
7221{
7222 {
7223 BI opval = 0;
7224 CPU (h_xbit) = opval;
7225 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
7226 }
7227 {
7228 BI opval = 0;
7229 SET_H_INSN_PREFIXED_P (opval);
7230 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
7231 }
7232}
7233}
7234}
7235
7236 abuf->written = written;
7237#undef FLD
7238}
7239 NEXT (vpc);
7240
7241 CASE (sem, INSN_SUB_M_W_M) : /* sub-m.w [${Rs}${inc}],${Rd} */
7242{
7243 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
7244 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
7245#define FLD(f) abuf->fields.sfmt_add_m_b_m.f
7246 int UNUSED written = 0;
7247 IADDR UNUSED pc = abuf->addr;
7248 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
7249
7250{
7251 HI tmp_tmpopd;
7252 HI tmp_tmpops;
7253 BI tmp_carry;
7254 HI tmp_newval;
7255 tmp_tmpops = ({ SI tmp_addr;
7256 HI tmp_tmp_mem;
7257 BI tmp_postinc;
7258 tmp_postinc = FLD (f_memmode);
7259; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
7260; tmp_tmp_mem = GETMEMHI (current_cpu, pc, tmp_addr);
7261; if (NEBI (tmp_postinc, 0)) {
7262{
7263if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
7264 tmp_addr = ADDSI (tmp_addr, 2);
7265}
7266 {
7267 SI opval = tmp_addr;
7268 SET_H_GR (FLD (f_operand1), opval);
7269 written |= (1 << 12);
7270 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
7271 }
7272}
7273}
7274; tmp_tmp_mem; });
7275 tmp_tmpopd = GET_H_GR (FLD (f_operand2));
7276 tmp_carry = CPU (h_cbit);
7277 tmp_newval = SUBCHI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
7278{
7279 SI tmp_oldregval;
7280 tmp_oldregval = GET_H_RAW_GR_PC (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))));
7281 {
7282 SI opval = ORSI (ANDSI (tmp_newval, 65535), ANDSI (tmp_oldregval, 0xffff0000));
7283 SET_H_GR (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))), opval);
7284 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
7285 }
7286}
7287{
7288 {
7289 BI opval = ORIF (ANDIF (LTHI (tmp_tmpops, 0), GEHI (tmp_tmpopd, 0)), ORIF (ANDIF (GEHI (tmp_tmpopd, 0), LTHI (tmp_newval, 0)), ANDIF (LTHI (tmp_tmpops, 0), LTHI (tmp_newval, 0))));
7290 CPU (h_cbit) = opval;
7291 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
7292 }
7293 {
7294 BI opval = LTHI (tmp_newval, 0);
7295 CPU (h_nbit) = opval;
7296 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
7297 }
7298 {
7299 BI opval = ANDIF (EQHI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
7300 CPU (h_zbit) = opval;
7301 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
7302 }
7303 {
7304 BI opval = ORIF (ANDIF (ANDIF (GEHI (tmp_tmpops, 0), LTHI (tmp_tmpopd, 0)), GEHI (tmp_newval, 0)), ANDIF (ANDIF (LTHI (tmp_tmpops, 0), GEHI (tmp_tmpopd, 0)), LTHI (tmp_newval, 0)));
7305 CPU (h_vbit) = opval;
7306 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
7307 }
7308{
7309 {
7310 BI opval = 0;
7311 CPU (h_xbit) = opval;
7312 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
7313 }
7314 {
7315 BI opval = 0;
7316 SET_H_INSN_PREFIXED_P (opval);
7317 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
7318 }
7319}
7320}
7321}
7322
7323 abuf->written = written;
7324#undef FLD
7325}
7326 NEXT (vpc);
7327
7328 CASE (sem, INSN_SUB_M_D_M) : /* sub-m.d [${Rs}${inc}],${Rd} */
7329{
7330 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
7331 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
7332#define FLD(f) abuf->fields.sfmt_add_m_b_m.f
7333 int UNUSED written = 0;
7334 IADDR UNUSED pc = abuf->addr;
7335 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
7336
7337{
7338 SI tmp_tmpopd;
7339 SI tmp_tmpops;
7340 BI tmp_carry;
7341 SI tmp_newval;
7342 tmp_tmpops = ({ SI tmp_addr;
7343 SI tmp_tmp_mem;
7344 BI tmp_postinc;
7345 tmp_postinc = FLD (f_memmode);
7346; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
7347; tmp_tmp_mem = GETMEMSI (current_cpu, pc, tmp_addr);
7348; if (NEBI (tmp_postinc, 0)) {
7349{
7350if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
7351 tmp_addr = ADDSI (tmp_addr, 4);
7352}
7353 {
7354 SI opval = tmp_addr;
7355 SET_H_GR (FLD (f_operand1), opval);
7356 written |= (1 << 11);
7357 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
7358 }
7359}
7360}
7361; tmp_tmp_mem; });
7362 tmp_tmpopd = GET_H_GR (FLD (f_operand2));
7363 tmp_carry = CPU (h_cbit);
7364 tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
7365 {
7366 SI opval = tmp_newval;
7367 SET_H_GR (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))), opval);
7368 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
7369 }
7370{
7371 {
7372 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0))));
7373 CPU (h_cbit) = opval;
7374 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
7375 }
7376 {
7377 BI opval = LTSI (tmp_newval, 0);
7378 CPU (h_nbit) = opval;
7379 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
7380 }
7381 {
7382 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
7383 CPU (h_zbit) = opval;
7384 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
7385 }
7386 {
7387 BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0)));
7388 CPU (h_vbit) = opval;
7389 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
7390 }
7391{
7392 {
7393 BI opval = 0;
7394 CPU (h_xbit) = opval;
7395 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
7396 }
7397 {
7398 BI opval = 0;
7399 SET_H_INSN_PREFIXED_P (opval);
7400 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
7401 }
7402}
7403}
7404}
7405
7406 abuf->written = written;
7407#undef FLD
7408}
7409 NEXT (vpc);
7410
7411 CASE (sem, INSN_SUBCBR) : /* sub.b ${sconst8}],${Rd} */
7412{
7413 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
7414 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
7415#define FLD(f) abuf->fields.sfmt_addcbr.f
7416 int UNUSED written = 0;
7417 IADDR UNUSED pc = abuf->addr;
7418 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
7419
7420{
7421 QI tmp_tmpopd;
7422 QI tmp_tmpops;
7423 BI tmp_carry;
7424 QI tmp_newval;
7425 tmp_tmpops = FLD (f_indir_pc__byte);
7426 tmp_tmpopd = GET_H_GR (FLD (f_operand2));
7427 tmp_carry = CPU (h_cbit);
7428 tmp_newval = SUBCQI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
7429{
7430 SI tmp_oldregval;
7431 tmp_oldregval = GET_H_RAW_GR_PC (FLD (f_operand2));
7432 {
7433 SI opval = ORSI (ANDSI (tmp_newval, 255), ANDSI (tmp_oldregval, 0xffffff00));
7434 SET_H_GR (FLD (f_operand2), opval);
7435 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
7436 }
7437}
7438{
7439 {
7440 BI opval = ORIF (ANDIF (LTQI (tmp_tmpops, 0), GEQI (tmp_tmpopd, 0)), ORIF (ANDIF (GEQI (tmp_tmpopd, 0), LTQI (tmp_newval, 0)), ANDIF (LTQI (tmp_tmpops, 0), LTQI (tmp_newval, 0))));
7441 CPU (h_cbit) = opval;
7442 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
7443 }
7444 {
7445 BI opval = LTQI (tmp_newval, 0);
7446 CPU (h_nbit) = opval;
7447 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
7448 }
7449 {
7450 BI opval = ANDIF (EQQI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
7451 CPU (h_zbit) = opval;
7452 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
7453 }
7454 {
7455 BI opval = ORIF (ANDIF (ANDIF (GEQI (tmp_tmpops, 0), LTQI (tmp_tmpopd, 0)), GEQI (tmp_newval, 0)), ANDIF (ANDIF (LTQI (tmp_tmpops, 0), GEQI (tmp_tmpopd, 0)), LTQI (tmp_newval, 0)));
7456 CPU (h_vbit) = opval;
7457 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
7458 }
7459{
7460 {
7461 BI opval = 0;
7462 CPU (h_xbit) = opval;
7463 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
7464 }
7465 {
7466 BI opval = 0;
7467 SET_H_INSN_PREFIXED_P (opval);
7468 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
7469 }
7470}
7471}
7472}
7473
7474#undef FLD
7475}
7476 NEXT (vpc);
7477
7478 CASE (sem, INSN_SUBCWR) : /* sub.w ${sconst16}],${Rd} */
7479{
7480 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
7481 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
7482#define FLD(f) abuf->fields.sfmt_addcwr.f
7483 int UNUSED written = 0;
7484 IADDR UNUSED pc = abuf->addr;
7485 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
7486
7487{
7488 HI tmp_tmpopd;
7489 HI tmp_tmpops;
7490 BI tmp_carry;
7491 HI tmp_newval;
7492 tmp_tmpops = FLD (f_indir_pc__word);
7493 tmp_tmpopd = GET_H_GR (FLD (f_operand2));
7494 tmp_carry = CPU (h_cbit);
7495 tmp_newval = SUBCHI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
7496{
7497 SI tmp_oldregval;
7498 tmp_oldregval = GET_H_RAW_GR_PC (FLD (f_operand2));
7499 {
7500 SI opval = ORSI (ANDSI (tmp_newval, 65535), ANDSI (tmp_oldregval, 0xffff0000));
7501 SET_H_GR (FLD (f_operand2), opval);
7502 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
7503 }
7504}
7505{
7506 {
7507 BI opval = ORIF (ANDIF (LTHI (tmp_tmpops, 0), GEHI (tmp_tmpopd, 0)), ORIF (ANDIF (GEHI (tmp_tmpopd, 0), LTHI (tmp_newval, 0)), ANDIF (LTHI (tmp_tmpops, 0), LTHI (tmp_newval, 0))));
7508 CPU (h_cbit) = opval;
7509 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
7510 }
7511 {
7512 BI opval = LTHI (tmp_newval, 0);
7513 CPU (h_nbit) = opval;
7514 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
7515 }
7516 {
7517 BI opval = ANDIF (EQHI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
7518 CPU (h_zbit) = opval;
7519 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
7520 }
7521 {
7522 BI opval = ORIF (ANDIF (ANDIF (GEHI (tmp_tmpops, 0), LTHI (tmp_tmpopd, 0)), GEHI (tmp_newval, 0)), ANDIF (ANDIF (LTHI (tmp_tmpops, 0), GEHI (tmp_tmpopd, 0)), LTHI (tmp_newval, 0)));
7523 CPU (h_vbit) = opval;
7524 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
7525 }
7526{
7527 {
7528 BI opval = 0;
7529 CPU (h_xbit) = opval;
7530 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
7531 }
7532 {
7533 BI opval = 0;
7534 SET_H_INSN_PREFIXED_P (opval);
7535 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
7536 }
7537}
7538}
7539}
7540
7541#undef FLD
7542}
7543 NEXT (vpc);
7544
7545 CASE (sem, INSN_SUBCDR) : /* sub.d ${const32}],${Rd} */
7546{
7547 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
7548 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
7549#define FLD(f) abuf->fields.sfmt_addcdr.f
7550 int UNUSED written = 0;
7551 IADDR UNUSED pc = abuf->addr;
7552 vpc = SEM_NEXT_VPC (sem_arg, pc, 6);
7553
7554{
7555 SI tmp_tmpopd;
7556 SI tmp_tmpops;
7557 BI tmp_carry;
7558 SI tmp_newval;
7559 tmp_tmpops = FLD (f_indir_pc__dword);
7560 tmp_tmpopd = GET_H_GR (FLD (f_operand2));
7561 tmp_carry = CPU (h_cbit);
7562 tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
7563 {
7564 SI opval = tmp_newval;
7565 SET_H_GR (FLD (f_operand2), opval);
7566 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
7567 }
7568{
7569 {
7570 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0))));
7571 CPU (h_cbit) = opval;
7572 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
7573 }
7574 {
7575 BI opval = LTSI (tmp_newval, 0);
7576 CPU (h_nbit) = opval;
7577 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
7578 }
7579 {
7580 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
7581 CPU (h_zbit) = opval;
7582 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
7583 }
7584 {
7585 BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0)));
7586 CPU (h_vbit) = opval;
7587 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
7588 }
7589{
7590 {
7591 BI opval = 0;
7592 CPU (h_xbit) = opval;
7593 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
7594 }
7595 {
7596 BI opval = 0;
7597 SET_H_INSN_PREFIXED_P (opval);
7598 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
7599 }
7600}
7601}
7602}
7603
7604#undef FLD
7605}
7606 NEXT (vpc);
7607
7608 CASE (sem, INSN_SUBS_B_R) : /* subs.b $Rs,$Rd */
7609{
7610 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
7611 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
7612#define FLD(f) abuf->fields.sfmt_add_b_r.f
7613 int UNUSED written = 0;
7614 IADDR UNUSED pc = abuf->addr;
7615 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
7616
7617{
7618 SI tmp_tmpopd;
7619 SI tmp_tmpops;
7620 BI tmp_carry;
7621 SI tmp_newval;
7622 tmp_tmpops = EXTQISI (TRUNCSIQI (GET_H_GR (FLD (f_operand1))));
7623 tmp_tmpopd = GET_H_GR (FLD (f_operand2));
7624 tmp_carry = CPU (h_cbit);
7625 tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
7626 {
7627 SI opval = tmp_newval;
7628 SET_H_GR (FLD (f_operand2), opval);
7629 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
7630 }
7631{
7632 {
7633 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0))));
7634 CPU (h_cbit) = opval;
7635 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
7636 }
7637 {
7638 BI opval = LTSI (tmp_newval, 0);
7639 CPU (h_nbit) = opval;
7640 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
7641 }
7642 {
7643 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
7644 CPU (h_zbit) = opval;
7645 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
7646 }
7647 {
7648 BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0)));
7649 CPU (h_vbit) = opval;
7650 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
7651 }
7652{
7653 {
7654 BI opval = 0;
7655 CPU (h_xbit) = opval;
7656 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
7657 }
7658 {
7659 BI opval = 0;
7660 SET_H_INSN_PREFIXED_P (opval);
7661 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
7662 }
7663}
7664}
7665}
7666
7667#undef FLD
7668}
7669 NEXT (vpc);
7670
7671 CASE (sem, INSN_SUBS_W_R) : /* subs.w $Rs,$Rd */
7672{
7673 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
7674 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
7675#define FLD(f) abuf->fields.sfmt_add_b_r.f
7676 int UNUSED written = 0;
7677 IADDR UNUSED pc = abuf->addr;
7678 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
7679
7680{
7681 SI tmp_tmpopd;
7682 SI tmp_tmpops;
7683 BI tmp_carry;
7684 SI tmp_newval;
7685 tmp_tmpops = EXTHISI (TRUNCSIHI (GET_H_GR (FLD (f_operand1))));
7686 tmp_tmpopd = GET_H_GR (FLD (f_operand2));
7687 tmp_carry = CPU (h_cbit);
7688 tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
7689 {
7690 SI opval = tmp_newval;
7691 SET_H_GR (FLD (f_operand2), opval);
7692 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
7693 }
7694{
7695 {
7696 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0))));
7697 CPU (h_cbit) = opval;
7698 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
7699 }
7700 {
7701 BI opval = LTSI (tmp_newval, 0);
7702 CPU (h_nbit) = opval;
7703 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
7704 }
7705 {
7706 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
7707 CPU (h_zbit) = opval;
7708 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
7709 }
7710 {
7711 BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0)));
7712 CPU (h_vbit) = opval;
7713 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
7714 }
7715{
7716 {
7717 BI opval = 0;
7718 CPU (h_xbit) = opval;
7719 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
7720 }
7721 {
7722 BI opval = 0;
7723 SET_H_INSN_PREFIXED_P (opval);
7724 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
7725 }
7726}
7727}
7728}
7729
7730#undef FLD
7731}
7732 NEXT (vpc);
7733
7734 CASE (sem, INSN_SUBS_M_B_M) : /* subs-m.b [${Rs}${inc}],$Rd */
7735{
7736 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
7737 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
7738#define FLD(f) abuf->fields.sfmt_add_m_b_m.f
7739 int UNUSED written = 0;
7740 IADDR UNUSED pc = abuf->addr;
7741 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
7742
7743{
7744 SI tmp_tmpopd;
7745 SI tmp_tmpops;
7746 BI tmp_carry;
7747 SI tmp_newval;
7748 tmp_tmpops = EXTQISI (({ SI tmp_addr;
7749 QI tmp_tmp_mem;
7750 BI tmp_postinc;
7751 tmp_postinc = FLD (f_memmode);
7752; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
7753; tmp_tmp_mem = GETMEMQI (current_cpu, pc, tmp_addr);
7754; if (NEBI (tmp_postinc, 0)) {
7755{
7756if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
7757 tmp_addr = ADDSI (tmp_addr, 1);
7758}
7759 {
7760 SI opval = tmp_addr;
7761 SET_H_GR (FLD (f_operand1), opval);
7762 written |= (1 << 11);
7763 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
7764 }
7765}
7766}
7767; tmp_tmp_mem; }));
7768 tmp_tmpopd = GET_H_GR (FLD (f_operand2));
7769 tmp_carry = CPU (h_cbit);
7770 tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
7771 {
7772 SI opval = tmp_newval;
7773 SET_H_GR (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))), opval);
7774 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
7775 }
7776{
7777 {
7778 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0))));
7779 CPU (h_cbit) = opval;
7780 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
7781 }
7782 {
7783 BI opval = LTSI (tmp_newval, 0);
7784 CPU (h_nbit) = opval;
7785 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
7786 }
7787 {
7788 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
7789 CPU (h_zbit) = opval;
7790 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
7791 }
7792 {
7793 BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0)));
7794 CPU (h_vbit) = opval;
7795 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
7796 }
7797{
7798 {
7799 BI opval = 0;
7800 CPU (h_xbit) = opval;
7801 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
7802 }
7803 {
7804 BI opval = 0;
7805 SET_H_INSN_PREFIXED_P (opval);
7806 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
7807 }
7808}
7809}
7810}
7811
7812 abuf->written = written;
7813#undef FLD
7814}
7815 NEXT (vpc);
7816
7817 CASE (sem, INSN_SUBS_M_W_M) : /* subs-m.w [${Rs}${inc}],$Rd */
7818{
7819 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
7820 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
7821#define FLD(f) abuf->fields.sfmt_add_m_b_m.f
7822 int UNUSED written = 0;
7823 IADDR UNUSED pc = abuf->addr;
7824 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
7825
7826{
7827 SI tmp_tmpopd;
7828 SI tmp_tmpops;
7829 BI tmp_carry;
7830 SI tmp_newval;
7831 tmp_tmpops = EXTHISI (({ SI tmp_addr;
7832 HI tmp_tmp_mem;
7833 BI tmp_postinc;
7834 tmp_postinc = FLD (f_memmode);
7835; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
7836; tmp_tmp_mem = GETMEMHI (current_cpu, pc, tmp_addr);
7837; if (NEBI (tmp_postinc, 0)) {
7838{
7839if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
7840 tmp_addr = ADDSI (tmp_addr, 2);
7841}
7842 {
7843 SI opval = tmp_addr;
7844 SET_H_GR (FLD (f_operand1), opval);
7845 written |= (1 << 11);
7846 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
7847 }
7848}
7849}
7850; tmp_tmp_mem; }));
7851 tmp_tmpopd = GET_H_GR (FLD (f_operand2));
7852 tmp_carry = CPU (h_cbit);
7853 tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
7854 {
7855 SI opval = tmp_newval;
7856 SET_H_GR (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))), opval);
7857 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
7858 }
7859{
7860 {
7861 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0))));
7862 CPU (h_cbit) = opval;
7863 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
7864 }
7865 {
7866 BI opval = LTSI (tmp_newval, 0);
7867 CPU (h_nbit) = opval;
7868 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
7869 }
7870 {
7871 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
7872 CPU (h_zbit) = opval;
7873 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
7874 }
7875 {
7876 BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0)));
7877 CPU (h_vbit) = opval;
7878 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
7879 }
7880{
7881 {
7882 BI opval = 0;
7883 CPU (h_xbit) = opval;
7884 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
7885 }
7886 {
7887 BI opval = 0;
7888 SET_H_INSN_PREFIXED_P (opval);
7889 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
7890 }
7891}
7892}
7893}
7894
7895 abuf->written = written;
7896#undef FLD
7897}
7898 NEXT (vpc);
7899
7900 CASE (sem, INSN_SUBSCBR) : /* [${Rs}${inc}],$Rd */
7901{
7902 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
7903 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
7904#define FLD(f) abuf->fields.sfmt_addcbr.f
7905 int UNUSED written = 0;
7906 IADDR UNUSED pc = abuf->addr;
7907 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
7908
7909{
7910 SI tmp_tmpopd;
7911 SI tmp_tmpops;
7912 BI tmp_carry;
7913 SI tmp_newval;
7914 tmp_tmpops = EXTQISI (TRUNCSIQI (FLD (f_indir_pc__byte)));
7915 tmp_tmpopd = GET_H_GR (FLD (f_operand2));
7916 tmp_carry = CPU (h_cbit);
7917 tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
7918 {
7919 SI opval = tmp_newval;
7920 SET_H_GR (FLD (f_operand2), opval);
7921 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
7922 }
7923{
7924 {
7925 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0))));
7926 CPU (h_cbit) = opval;
7927 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
7928 }
7929 {
7930 BI opval = LTSI (tmp_newval, 0);
7931 CPU (h_nbit) = opval;
7932 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
7933 }
7934 {
7935 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
7936 CPU (h_zbit) = opval;
7937 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
7938 }
7939 {
7940 BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0)));
7941 CPU (h_vbit) = opval;
7942 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
7943 }
7944{
7945 {
7946 BI opval = 0;
7947 CPU (h_xbit) = opval;
7948 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
7949 }
7950 {
7951 BI opval = 0;
7952 SET_H_INSN_PREFIXED_P (opval);
7953 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
7954 }
7955}
7956}
7957}
7958
7959#undef FLD
7960}
7961 NEXT (vpc);
7962
7963 CASE (sem, INSN_SUBSCWR) : /* [${Rs}${inc}],$Rd */
7964{
7965 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
7966 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
7967#define FLD(f) abuf->fields.sfmt_addcwr.f
7968 int UNUSED written = 0;
7969 IADDR UNUSED pc = abuf->addr;
7970 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
7971
7972{
7973 SI tmp_tmpopd;
7974 SI tmp_tmpops;
7975 BI tmp_carry;
7976 SI tmp_newval;
7977 tmp_tmpops = EXTHISI (TRUNCSIHI (FLD (f_indir_pc__word)));
7978 tmp_tmpopd = GET_H_GR (FLD (f_operand2));
7979 tmp_carry = CPU (h_cbit);
7980 tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
7981 {
7982 SI opval = tmp_newval;
7983 SET_H_GR (FLD (f_operand2), opval);
7984 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
7985 }
7986{
7987 {
7988 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0))));
7989 CPU (h_cbit) = opval;
7990 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
7991 }
7992 {
7993 BI opval = LTSI (tmp_newval, 0);
7994 CPU (h_nbit) = opval;
7995 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
7996 }
7997 {
7998 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
7999 CPU (h_zbit) = opval;
8000 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
8001 }
8002 {
8003 BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0)));
8004 CPU (h_vbit) = opval;
8005 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
8006 }
8007{
8008 {
8009 BI opval = 0;
8010 CPU (h_xbit) = opval;
8011 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
8012 }
8013 {
8014 BI opval = 0;
8015 SET_H_INSN_PREFIXED_P (opval);
8016 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
8017 }
8018}
8019}
8020}
8021
8022#undef FLD
8023}
8024 NEXT (vpc);
8025
8026 CASE (sem, INSN_SUBU_B_R) : /* subu.b $Rs,$Rd */
8027{
8028 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
8029 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
8030#define FLD(f) abuf->fields.sfmt_add_b_r.f
8031 int UNUSED written = 0;
8032 IADDR UNUSED pc = abuf->addr;
8033 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
8034
8035{
8036 SI tmp_tmpopd;
8037 SI tmp_tmpops;
8038 BI tmp_carry;
8039 SI tmp_newval;
8040 tmp_tmpops = ZEXTQISI (TRUNCSIQI (GET_H_GR (FLD (f_operand1))));
8041 tmp_tmpopd = GET_H_GR (FLD (f_operand2));
8042 tmp_carry = CPU (h_cbit);
8043 tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
8044 {
8045 SI opval = tmp_newval;
8046 SET_H_GR (FLD (f_operand2), opval);
8047 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
8048 }
8049{
8050 {
8051 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0))));
8052 CPU (h_cbit) = opval;
8053 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
8054 }
8055 {
8056 BI opval = LTSI (tmp_newval, 0);
8057 CPU (h_nbit) = opval;
8058 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
8059 }
8060 {
8061 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
8062 CPU (h_zbit) = opval;
8063 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
8064 }
8065 {
8066 BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0)));
8067 CPU (h_vbit) = opval;
8068 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
8069 }
8070{
8071 {
8072 BI opval = 0;
8073 CPU (h_xbit) = opval;
8074 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
8075 }
8076 {
8077 BI opval = 0;
8078 SET_H_INSN_PREFIXED_P (opval);
8079 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
8080 }
8081}
8082}
8083}
8084
8085#undef FLD
8086}
8087 NEXT (vpc);
8088
8089 CASE (sem, INSN_SUBU_W_R) : /* subu.w $Rs,$Rd */
8090{
8091 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
8092 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
8093#define FLD(f) abuf->fields.sfmt_add_b_r.f
8094 int UNUSED written = 0;
8095 IADDR UNUSED pc = abuf->addr;
8096 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
8097
8098{
8099 SI tmp_tmpopd;
8100 SI tmp_tmpops;
8101 BI tmp_carry;
8102 SI tmp_newval;
8103 tmp_tmpops = ZEXTHISI (TRUNCSIHI (GET_H_GR (FLD (f_operand1))));
8104 tmp_tmpopd = GET_H_GR (FLD (f_operand2));
8105 tmp_carry = CPU (h_cbit);
8106 tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
8107 {
8108 SI opval = tmp_newval;
8109 SET_H_GR (FLD (f_operand2), opval);
8110 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
8111 }
8112{
8113 {
8114 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0))));
8115 CPU (h_cbit) = opval;
8116 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
8117 }
8118 {
8119 BI opval = LTSI (tmp_newval, 0);
8120 CPU (h_nbit) = opval;
8121 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
8122 }
8123 {
8124 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
8125 CPU (h_zbit) = opval;
8126 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
8127 }
8128 {
8129 BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0)));
8130 CPU (h_vbit) = opval;
8131 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
8132 }
8133{
8134 {
8135 BI opval = 0;
8136 CPU (h_xbit) = opval;
8137 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
8138 }
8139 {
8140 BI opval = 0;
8141 SET_H_INSN_PREFIXED_P (opval);
8142 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
8143 }
8144}
8145}
8146}
8147
8148#undef FLD
8149}
8150 NEXT (vpc);
8151
8152 CASE (sem, INSN_SUBU_M_B_M) : /* subu-m.b [${Rs}${inc}],$Rd */
8153{
8154 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
8155 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
8156#define FLD(f) abuf->fields.sfmt_add_m_b_m.f
8157 int UNUSED written = 0;
8158 IADDR UNUSED pc = abuf->addr;
8159 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
8160
8161{
8162 SI tmp_tmpopd;
8163 SI tmp_tmpops;
8164 BI tmp_carry;
8165 SI tmp_newval;
8166 tmp_tmpops = ZEXTQISI (({ SI tmp_addr;
8167 QI tmp_tmp_mem;
8168 BI tmp_postinc;
8169 tmp_postinc = FLD (f_memmode);
8170; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
8171; tmp_tmp_mem = GETMEMQI (current_cpu, pc, tmp_addr);
8172; if (NEBI (tmp_postinc, 0)) {
8173{
8174if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
8175 tmp_addr = ADDSI (tmp_addr, 1);
8176}
8177 {
8178 SI opval = tmp_addr;
8179 SET_H_GR (FLD (f_operand1), opval);
8180 written |= (1 << 11);
8181 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
8182 }
8183}
8184}
8185; tmp_tmp_mem; }));
8186 tmp_tmpopd = GET_H_GR (FLD (f_operand2));
8187 tmp_carry = CPU (h_cbit);
8188 tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
8189 {
8190 SI opval = tmp_newval;
8191 SET_H_GR (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))), opval);
8192 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
8193 }
8194{
8195 {
8196 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0))));
8197 CPU (h_cbit) = opval;
8198 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
8199 }
8200 {
8201 BI opval = LTSI (tmp_newval, 0);
8202 CPU (h_nbit) = opval;
8203 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
8204 }
8205 {
8206 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
8207 CPU (h_zbit) = opval;
8208 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
8209 }
8210 {
8211 BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0)));
8212 CPU (h_vbit) = opval;
8213 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
8214 }
8215{
8216 {
8217 BI opval = 0;
8218 CPU (h_xbit) = opval;
8219 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
8220 }
8221 {
8222 BI opval = 0;
8223 SET_H_INSN_PREFIXED_P (opval);
8224 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
8225 }
8226}
8227}
8228}
8229
8230 abuf->written = written;
8231#undef FLD
8232}
8233 NEXT (vpc);
8234
8235 CASE (sem, INSN_SUBU_M_W_M) : /* subu-m.w [${Rs}${inc}],$Rd */
8236{
8237 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
8238 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
8239#define FLD(f) abuf->fields.sfmt_add_m_b_m.f
8240 int UNUSED written = 0;
8241 IADDR UNUSED pc = abuf->addr;
8242 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
8243
8244{
8245 SI tmp_tmpopd;
8246 SI tmp_tmpops;
8247 BI tmp_carry;
8248 SI tmp_newval;
8249 tmp_tmpops = ZEXTHISI (({ SI tmp_addr;
8250 HI tmp_tmp_mem;
8251 BI tmp_postinc;
8252 tmp_postinc = FLD (f_memmode);
8253; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
8254; tmp_tmp_mem = GETMEMHI (current_cpu, pc, tmp_addr);
8255; if (NEBI (tmp_postinc, 0)) {
8256{
8257if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
8258 tmp_addr = ADDSI (tmp_addr, 2);
8259}
8260 {
8261 SI opval = tmp_addr;
8262 SET_H_GR (FLD (f_operand1), opval);
8263 written |= (1 << 11);
8264 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
8265 }
8266}
8267}
8268; tmp_tmp_mem; }));
8269 tmp_tmpopd = GET_H_GR (FLD (f_operand2));
8270 tmp_carry = CPU (h_cbit);
8271 tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
8272 {
8273 SI opval = tmp_newval;
8274 SET_H_GR (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))), opval);
8275 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
8276 }
8277{
8278 {
8279 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0))));
8280 CPU (h_cbit) = opval;
8281 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
8282 }
8283 {
8284 BI opval = LTSI (tmp_newval, 0);
8285 CPU (h_nbit) = opval;
8286 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
8287 }
8288 {
8289 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
8290 CPU (h_zbit) = opval;
8291 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
8292 }
8293 {
8294 BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0)));
8295 CPU (h_vbit) = opval;
8296 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
8297 }
8298{
8299 {
8300 BI opval = 0;
8301 CPU (h_xbit) = opval;
8302 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
8303 }
8304 {
8305 BI opval = 0;
8306 SET_H_INSN_PREFIXED_P (opval);
8307 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
8308 }
8309}
8310}
8311}
8312
8313 abuf->written = written;
8314#undef FLD
8315}
8316 NEXT (vpc);
8317
8318 CASE (sem, INSN_SUBUCBR) : /* [${Rs}${inc}],$Rd */
8319{
8320 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
8321 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
8322#define FLD(f) abuf->fields.sfmt_addcbr.f
8323 int UNUSED written = 0;
8324 IADDR UNUSED pc = abuf->addr;
8325 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
8326
8327{
8328 SI tmp_tmpopd;
8329 SI tmp_tmpops;
8330 BI tmp_carry;
8331 SI tmp_newval;
8332 tmp_tmpops = ZEXTQISI (TRUNCSIQI (FLD (f_indir_pc__byte)));
8333 tmp_tmpopd = GET_H_GR (FLD (f_operand2));
8334 tmp_carry = CPU (h_cbit);
8335 tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
8336 {
8337 SI opval = tmp_newval;
8338 SET_H_GR (FLD (f_operand2), opval);
8339 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
8340 }
8341{
8342 {
8343 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0))));
8344 CPU (h_cbit) = opval;
8345 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
8346 }
8347 {
8348 BI opval = LTSI (tmp_newval, 0);
8349 CPU (h_nbit) = opval;
8350 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
8351 }
8352 {
8353 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
8354 CPU (h_zbit) = opval;
8355 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
8356 }
8357 {
8358 BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0)));
8359 CPU (h_vbit) = opval;
8360 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
8361 }
8362{
8363 {
8364 BI opval = 0;
8365 CPU (h_xbit) = opval;
8366 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
8367 }
8368 {
8369 BI opval = 0;
8370 SET_H_INSN_PREFIXED_P (opval);
8371 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
8372 }
8373}
8374}
8375}
8376
8377#undef FLD
8378}
8379 NEXT (vpc);
8380
8381 CASE (sem, INSN_SUBUCWR) : /* [${Rs}${inc}],$Rd */
8382{
8383 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
8384 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
8385#define FLD(f) abuf->fields.sfmt_addcwr.f
8386 int UNUSED written = 0;
8387 IADDR UNUSED pc = abuf->addr;
8388 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
8389
8390{
8391 SI tmp_tmpopd;
8392 SI tmp_tmpops;
8393 BI tmp_carry;
8394 SI tmp_newval;
8395 tmp_tmpops = ZEXTHISI (TRUNCSIHI (FLD (f_indir_pc__word)));
8396 tmp_tmpopd = GET_H_GR (FLD (f_operand2));
8397 tmp_carry = CPU (h_cbit);
8398 tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
8399 {
8400 SI opval = tmp_newval;
8401 SET_H_GR (FLD (f_operand2), opval);
8402 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
8403 }
8404{
8405 {
8406 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0))));
8407 CPU (h_cbit) = opval;
8408 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
8409 }
8410 {
8411 BI opval = LTSI (tmp_newval, 0);
8412 CPU (h_nbit) = opval;
8413 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
8414 }
8415 {
8416 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
8417 CPU (h_zbit) = opval;
8418 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
8419 }
8420 {
8421 BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0)));
8422 CPU (h_vbit) = opval;
8423 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
8424 }
8425{
8426 {
8427 BI opval = 0;
8428 CPU (h_xbit) = opval;
8429 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
8430 }
8431 {
8432 BI opval = 0;
8433 SET_H_INSN_PREFIXED_P (opval);
8434 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
8435 }
8436}
8437}
8438}
8439
8440#undef FLD
8441}
8442 NEXT (vpc);
8443
8444 CASE (sem, INSN_ADDI_B_R) : /* addi.b ${Rs-dfield}.m,${Rd-sfield} */
8445{
8446 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
8447 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
8448#define FLD(f) abuf->fields.sfmt_bound_m_b_m.f
8449 int UNUSED written = 0;
8450 IADDR UNUSED pc = abuf->addr;
8451 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
8452
8453{
8454 {
8455 SI opval = ADDSI (GET_H_GR (FLD (f_operand1)), MULSI (GET_H_GR (FLD (f_operand2)), 1));
8456 SET_H_GR (FLD (f_operand1), opval);
8457 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
8458 }
8459{
8460 {
8461 BI opval = 0;
8462 CPU (h_xbit) = opval;
8463 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
8464 }
8465 {
8466 BI opval = 0;
8467 SET_H_INSN_PREFIXED_P (opval);
8468 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
8469 }
8470}
8471}
8472
8473#undef FLD
8474}
8475 NEXT (vpc);
8476
8477 CASE (sem, INSN_ADDI_W_R) : /* addi.w ${Rs-dfield}.m,${Rd-sfield} */
8478{
8479 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
8480 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
8481#define FLD(f) abuf->fields.sfmt_bound_m_b_m.f
8482 int UNUSED written = 0;
8483 IADDR UNUSED pc = abuf->addr;
8484 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
8485
8486{
8487 {
8488 SI opval = ADDSI (GET_H_GR (FLD (f_operand1)), MULSI (GET_H_GR (FLD (f_operand2)), 2));
8489 SET_H_GR (FLD (f_operand1), opval);
8490 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
8491 }
8492{
8493 {
8494 BI opval = 0;
8495 CPU (h_xbit) = opval;
8496 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
8497 }
8498 {
8499 BI opval = 0;
8500 SET_H_INSN_PREFIXED_P (opval);
8501 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
8502 }
8503}
8504}
8505
8506#undef FLD
8507}
8508 NEXT (vpc);
8509
8510 CASE (sem, INSN_ADDI_D_R) : /* addi.d ${Rs-dfield}.m,${Rd-sfield} */
8511{
8512 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
8513 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
8514#define FLD(f) abuf->fields.sfmt_bound_m_b_m.f
8515 int UNUSED written = 0;
8516 IADDR UNUSED pc = abuf->addr;
8517 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
8518
8519{
8520 {
8521 SI opval = ADDSI (GET_H_GR (FLD (f_operand1)), MULSI (GET_H_GR (FLD (f_operand2)), 4));
8522 SET_H_GR (FLD (f_operand1), opval);
8523 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
8524 }
8525{
8526 {
8527 BI opval = 0;
8528 CPU (h_xbit) = opval;
8529 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
8530 }
8531 {
8532 BI opval = 0;
8533 SET_H_INSN_PREFIXED_P (opval);
8534 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
8535 }
8536}
8537}
8538
8539#undef FLD
8540}
8541 NEXT (vpc);
8542
8543 CASE (sem, INSN_NEG_B_R) : /* neg.b $Rs,$Rd */
8544{
8545 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
8546 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
8547#define FLD(f) abuf->fields.sfmt_add_b_r.f
8548 int UNUSED written = 0;
8549 IADDR UNUSED pc = abuf->addr;
8550 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
8551
8552{
8553 QI tmp_tmpopd;
8554 QI tmp_tmpops;
8555 BI tmp_carry;
8556 QI tmp_newval;
8557 tmp_tmpops = GET_H_GR (FLD (f_operand1));
8558 tmp_tmpopd = 0;
8559 tmp_carry = CPU (h_cbit);
8560 tmp_newval = SUBCQI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
8561{
8562 SI tmp_oldregval;
8563 tmp_oldregval = GET_H_RAW_GR_PC (FLD (f_operand2));
8564 {
8565 SI opval = ORSI (ANDSI (tmp_newval, 255), ANDSI (tmp_oldregval, 0xffffff00));
8566 SET_H_GR (FLD (f_operand2), opval);
8567 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
8568 }
8569}
8570{
8571 {
8572 BI opval = ORIF (ANDIF (LTQI (tmp_tmpops, 0), GEQI (tmp_tmpopd, 0)), ORIF (ANDIF (GEQI (tmp_tmpopd, 0), LTQI (tmp_newval, 0)), ANDIF (LTQI (tmp_tmpops, 0), LTQI (tmp_newval, 0))));
8573 CPU (h_cbit) = opval;
8574 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
8575 }
8576 {
8577 BI opval = LTQI (tmp_newval, 0);
8578 CPU (h_nbit) = opval;
8579 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
8580 }
8581 {
8582 BI opval = ANDIF (EQQI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
8583 CPU (h_zbit) = opval;
8584 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
8585 }
8586 {
8587 BI opval = ORIF (ANDIF (ANDIF (GEQI (tmp_tmpops, 0), LTQI (tmp_tmpopd, 0)), GEQI (tmp_newval, 0)), ANDIF (ANDIF (LTQI (tmp_tmpops, 0), GEQI (tmp_tmpopd, 0)), LTQI (tmp_newval, 0)));
8588 CPU (h_vbit) = opval;
8589 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
8590 }
8591{
8592 {
8593 BI opval = 0;
8594 CPU (h_xbit) = opval;
8595 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
8596 }
8597 {
8598 BI opval = 0;
8599 SET_H_INSN_PREFIXED_P (opval);
8600 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
8601 }
8602}
8603}
8604}
8605
8606#undef FLD
8607}
8608 NEXT (vpc);
8609
8610 CASE (sem, INSN_NEG_W_R) : /* neg.w $Rs,$Rd */
8611{
8612 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
8613 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
8614#define FLD(f) abuf->fields.sfmt_add_b_r.f
8615 int UNUSED written = 0;
8616 IADDR UNUSED pc = abuf->addr;
8617 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
8618
8619{
8620 HI tmp_tmpopd;
8621 HI tmp_tmpops;
8622 BI tmp_carry;
8623 HI tmp_newval;
8624 tmp_tmpops = GET_H_GR (FLD (f_operand1));
8625 tmp_tmpopd = 0;
8626 tmp_carry = CPU (h_cbit);
8627 tmp_newval = SUBCHI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
8628{
8629 SI tmp_oldregval;
8630 tmp_oldregval = GET_H_RAW_GR_PC (FLD (f_operand2));
8631 {
8632 SI opval = ORSI (ANDSI (tmp_newval, 65535), ANDSI (tmp_oldregval, 0xffff0000));
8633 SET_H_GR (FLD (f_operand2), opval);
8634 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
8635 }
8636}
8637{
8638 {
8639 BI opval = ORIF (ANDIF (LTHI (tmp_tmpops, 0), GEHI (tmp_tmpopd, 0)), ORIF (ANDIF (GEHI (tmp_tmpopd, 0), LTHI (tmp_newval, 0)), ANDIF (LTHI (tmp_tmpops, 0), LTHI (tmp_newval, 0))));
8640 CPU (h_cbit) = opval;
8641 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
8642 }
8643 {
8644 BI opval = LTHI (tmp_newval, 0);
8645 CPU (h_nbit) = opval;
8646 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
8647 }
8648 {
8649 BI opval = ANDIF (EQHI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
8650 CPU (h_zbit) = opval;
8651 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
8652 }
8653 {
8654 BI opval = ORIF (ANDIF (ANDIF (GEHI (tmp_tmpops, 0), LTHI (tmp_tmpopd, 0)), GEHI (tmp_newval, 0)), ANDIF (ANDIF (LTHI (tmp_tmpops, 0), GEHI (tmp_tmpopd, 0)), LTHI (tmp_newval, 0)));
8655 CPU (h_vbit) = opval;
8656 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
8657 }
8658{
8659 {
8660 BI opval = 0;
8661 CPU (h_xbit) = opval;
8662 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
8663 }
8664 {
8665 BI opval = 0;
8666 SET_H_INSN_PREFIXED_P (opval);
8667 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
8668 }
8669}
8670}
8671}
8672
8673#undef FLD
8674}
8675 NEXT (vpc);
8676
8677 CASE (sem, INSN_NEG_D_R) : /* neg.d $Rs,$Rd */
8678{
8679 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
8680 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
8681#define FLD(f) abuf->fields.sfmt_add_b_r.f
8682 int UNUSED written = 0;
8683 IADDR UNUSED pc = abuf->addr;
8684 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
8685
8686{
8687 SI tmp_tmpopd;
8688 SI tmp_tmpops;
8689 BI tmp_carry;
8690 SI tmp_newval;
8691 tmp_tmpops = GET_H_GR (FLD (f_operand1));
8692 tmp_tmpopd = 0;
8693 tmp_carry = CPU (h_cbit);
8694 tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
8695 {
8696 SI opval = tmp_newval;
8697 SET_H_GR (FLD (f_operand2), opval);
8698 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
8699 }
8700{
8701 {
8702 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0))));
8703 CPU (h_cbit) = opval;
8704 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
8705 }
8706 {
8707 BI opval = LTSI (tmp_newval, 0);
8708 CPU (h_nbit) = opval;
8709 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
8710 }
8711 {
8712 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
8713 CPU (h_zbit) = opval;
8714 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
8715 }
8716 {
8717 BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0)));
8718 CPU (h_vbit) = opval;
8719 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
8720 }
8721{
8722 {
8723 BI opval = 0;
8724 CPU (h_xbit) = opval;
8725 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
8726 }
8727 {
8728 BI opval = 0;
8729 SET_H_INSN_PREFIXED_P (opval);
8730 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
8731 }
8732}
8733}
8734}
8735
8736#undef FLD
8737}
8738 NEXT (vpc);
8739
8740 CASE (sem, INSN_TEST_M_B_M) : /* test-m.b [${Rs}${inc}] */
8741{
8742 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
8743 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
8744#define FLD(f) abuf->fields.sfmt_move_spr_mv10.f
8745 int UNUSED written = 0;
8746 IADDR UNUSED pc = abuf->addr;
8747 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
8748
8749{
8750 QI tmp_tmpd;
8751 tmp_tmpd = ({ SI tmp_addr;
8752 QI tmp_tmp_mem;
8753 BI tmp_postinc;
8754 tmp_postinc = FLD (f_memmode);
8755; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
8756; tmp_tmp_mem = GETMEMQI (current_cpu, pc, tmp_addr);
8757; if (NEBI (tmp_postinc, 0)) {
8758{
8759if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
8760 tmp_addr = ADDSI (tmp_addr, 1);
8761}
8762 {
8763 SI opval = tmp_addr;
8764 SET_H_GR (FLD (f_operand1), opval);
8765 written |= (1 << 8);
8766 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
8767 }
8768}
8769}
8770; tmp_tmp_mem; });
8771{
8772 QI tmp_tmpopd;
8773 QI tmp_tmpops;
8774 BI tmp_carry;
8775 QI tmp_newval;
8776 tmp_tmpops = 0;
8777 tmp_tmpopd = tmp_tmpd;
8778 tmp_carry = CPU (h_cbit);
8779 tmp_newval = SUBCQI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
8780((void) 0); /*nop*/
8781{
8782 {
8783 BI opval = ORIF (ANDIF (LTQI (tmp_tmpops, 0), GEQI (tmp_tmpopd, 0)), ORIF (ANDIF (GEQI (tmp_tmpopd, 0), LTQI (tmp_newval, 0)), ANDIF (LTQI (tmp_tmpops, 0), LTQI (tmp_newval, 0))));
8784 CPU (h_cbit) = opval;
8785 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
8786 }
8787 {
8788 BI opval = LTQI (tmp_newval, 0);
8789 CPU (h_nbit) = opval;
8790 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
8791 }
8792 {
8793 BI opval = ANDIF (EQQI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
8794 CPU (h_zbit) = opval;
8795 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
8796 }
8797 {
8798 BI opval = ORIF (ANDIF (ANDIF (GEQI (tmp_tmpops, 0), LTQI (tmp_tmpopd, 0)), GEQI (tmp_newval, 0)), ANDIF (ANDIF (LTQI (tmp_tmpops, 0), GEQI (tmp_tmpopd, 0)), LTQI (tmp_newval, 0)));
8799 CPU (h_vbit) = opval;
8800 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
8801 }
8802{
8803 {
8804 BI opval = 0;
8805 CPU (h_xbit) = opval;
8806 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
8807 }
8808 {
8809 BI opval = 0;
8810 SET_H_INSN_PREFIXED_P (opval);
8811 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
8812 }
8813}
8814}
8815}
8816}
8817
8818 abuf->written = written;
8819#undef FLD
8820}
8821 NEXT (vpc);
8822
8823 CASE (sem, INSN_TEST_M_W_M) : /* test-m.w [${Rs}${inc}] */
8824{
8825 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
8826 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
8827#define FLD(f) abuf->fields.sfmt_move_spr_mv10.f
8828 int UNUSED written = 0;
8829 IADDR UNUSED pc = abuf->addr;
8830 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
8831
8832{
8833 HI tmp_tmpd;
8834 tmp_tmpd = ({ SI tmp_addr;
8835 HI tmp_tmp_mem;
8836 BI tmp_postinc;
8837 tmp_postinc = FLD (f_memmode);
8838; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
8839; tmp_tmp_mem = GETMEMHI (current_cpu, pc, tmp_addr);
8840; if (NEBI (tmp_postinc, 0)) {
8841{
8842if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
8843 tmp_addr = ADDSI (tmp_addr, 2);
8844}
8845 {
8846 SI opval = tmp_addr;
8847 SET_H_GR (FLD (f_operand1), opval);
8848 written |= (1 << 8);
8849 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
8850 }
8851}
8852}
8853; tmp_tmp_mem; });
8854{
8855 HI tmp_tmpopd;
8856 HI tmp_tmpops;
8857 BI tmp_carry;
8858 HI tmp_newval;
8859 tmp_tmpops = 0;
8860 tmp_tmpopd = tmp_tmpd;
8861 tmp_carry = CPU (h_cbit);
8862 tmp_newval = SUBCHI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
8863((void) 0); /*nop*/
8864{
8865 {
8866 BI opval = ORIF (ANDIF (LTHI (tmp_tmpops, 0), GEHI (tmp_tmpopd, 0)), ORIF (ANDIF (GEHI (tmp_tmpopd, 0), LTHI (tmp_newval, 0)), ANDIF (LTHI (tmp_tmpops, 0), LTHI (tmp_newval, 0))));
8867 CPU (h_cbit) = opval;
8868 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
8869 }
8870 {
8871 BI opval = LTHI (tmp_newval, 0);
8872 CPU (h_nbit) = opval;
8873 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
8874 }
8875 {
8876 BI opval = ANDIF (EQHI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
8877 CPU (h_zbit) = opval;
8878 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
8879 }
8880 {
8881 BI opval = ORIF (ANDIF (ANDIF (GEHI (tmp_tmpops, 0), LTHI (tmp_tmpopd, 0)), GEHI (tmp_newval, 0)), ANDIF (ANDIF (LTHI (tmp_tmpops, 0), GEHI (tmp_tmpopd, 0)), LTHI (tmp_newval, 0)));
8882 CPU (h_vbit) = opval;
8883 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
8884 }
8885{
8886 {
8887 BI opval = 0;
8888 CPU (h_xbit) = opval;
8889 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
8890 }
8891 {
8892 BI opval = 0;
8893 SET_H_INSN_PREFIXED_P (opval);
8894 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
8895 }
8896}
8897}
8898}
8899}
8900
8901 abuf->written = written;
8902#undef FLD
8903}
8904 NEXT (vpc);
8905
8906 CASE (sem, INSN_TEST_M_D_M) : /* test-m.d [${Rs}${inc}] */
8907{
8908 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
8909 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
8910#define FLD(f) abuf->fields.sfmt_move_spr_mv10.f
8911 int UNUSED written = 0;
8912 IADDR UNUSED pc = abuf->addr;
8913 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
8914
8915{
8916 SI tmp_tmpd;
8917 tmp_tmpd = ({ SI tmp_addr;
8918 SI tmp_tmp_mem;
8919 BI tmp_postinc;
8920 tmp_postinc = FLD (f_memmode);
8921; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
8922; tmp_tmp_mem = GETMEMSI (current_cpu, pc, tmp_addr);
8923; if (NEBI (tmp_postinc, 0)) {
8924{
8925if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
8926 tmp_addr = ADDSI (tmp_addr, 4);
8927}
8928 {
8929 SI opval = tmp_addr;
8930 SET_H_GR (FLD (f_operand1), opval);
8931 written |= (1 << 8);
8932 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
8933 }
8934}
8935}
8936; tmp_tmp_mem; });
8937{
8938 SI tmp_tmpopd;
8939 SI tmp_tmpops;
8940 BI tmp_carry;
8941 SI tmp_newval;
8942 tmp_tmpops = 0;
8943 tmp_tmpopd = tmp_tmpd;
8944 tmp_carry = CPU (h_cbit);
8945 tmp_newval = SUBCSI (tmp_tmpopd, tmp_tmpops, ((EQBI (CPU (h_xbit), 0)) ? (0) : (tmp_carry)));
8946((void) 0); /*nop*/
8947{
8948 {
8949 BI opval = ORIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), ORIF (ANDIF (GESI (tmp_tmpopd, 0), LTSI (tmp_newval, 0)), ANDIF (LTSI (tmp_tmpops, 0), LTSI (tmp_newval, 0))));
8950 CPU (h_cbit) = opval;
8951 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
8952 }
8953 {
8954 BI opval = LTSI (tmp_newval, 0);
8955 CPU (h_nbit) = opval;
8956 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
8957 }
8958 {
8959 BI opval = ANDIF (EQSI (tmp_newval, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
8960 CPU (h_zbit) = opval;
8961 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
8962 }
8963 {
8964 BI opval = ORIF (ANDIF (ANDIF (GESI (tmp_tmpops, 0), LTSI (tmp_tmpopd, 0)), GESI (tmp_newval, 0)), ANDIF (ANDIF (LTSI (tmp_tmpops, 0), GESI (tmp_tmpopd, 0)), LTSI (tmp_newval, 0)));
8965 CPU (h_vbit) = opval;
8966 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
8967 }
8968{
8969 {
8970 BI opval = 0;
8971 CPU (h_xbit) = opval;
8972 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
8973 }
8974 {
8975 BI opval = 0;
8976 SET_H_INSN_PREFIXED_P (opval);
8977 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
8978 }
8979}
8980}
8981}
8982}
8983
8984 abuf->written = written;
8985#undef FLD
8986}
8987 NEXT (vpc);
8988
8989 CASE (sem, INSN_MOVE_R_M_B_M) : /* move-r-m.b ${Rs-dfield},[${Rd-sfield}${inc}] */
8990{
8991 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
8992 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
8993#define FLD(f) abuf->fields.sfmt_bound_m_b_m.f
8994 int UNUSED written = 0;
8995 IADDR UNUSED pc = abuf->addr;
8996 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
8997
8998{
8999 QI tmp_tmpd;
9000 tmp_tmpd = GET_H_GR (FLD (f_operand2));
9001{
9002 SI tmp_addr;
9003 BI tmp_postinc;
9004 tmp_postinc = FLD (f_memmode);
9005 tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
9006if (ANDIF (GET_H_V32_NON_V32 (), NEBI (CPU (h_xbit), 0))) {
9007if (EQBI (CPU (h_pbit), 0)) {
9008{
9009 {
9010 QI opval = tmp_tmpd;
9011 SETMEMQI (current_cpu, pc, tmp_addr, opval);
9012 written |= (1 << 10);
9013 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
9014 }
9015 {
9016 BI opval = CPU (h_pbit);
9017 CPU (h_cbit) = opval;
9018 written |= (1 << 9);
9019 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
9020 }
9021}
9022} else {
9023 {
9024 BI opval = 1;
9025 CPU (h_cbit) = opval;
9026 written |= (1 << 9);
9027 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
9028 }
9029}
9030} else {
9031 {
9032 QI opval = tmp_tmpd;
9033 SETMEMQI (current_cpu, pc, tmp_addr, opval);
9034 written |= (1 << 10);
9035 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
9036 }
9037}
9038if (NEBI (tmp_postinc, 0)) {
9039{
9040if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
9041 tmp_addr = ADDSI (tmp_addr, 1);
9042}
9043 {
9044 SI opval = tmp_addr;
9045 SET_H_GR (FLD (f_operand1), opval);
9046 written |= (1 << 8);
9047 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
9048 }
9049}
9050}
9051}
9052{
9053 {
9054 BI opval = 0;
9055 CPU (h_xbit) = opval;
9056 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
9057 }
9058 {
9059 BI opval = 0;
9060 SET_H_INSN_PREFIXED_P (opval);
9061 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
9062 }
9063}
9064}
9065
9066 abuf->written = written;
9067#undef FLD
9068}
9069 NEXT (vpc);
9070
9071 CASE (sem, INSN_MOVE_R_M_W_M) : /* move-r-m.w ${Rs-dfield},[${Rd-sfield}${inc}] */
9072{
9073 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
9074 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
9075#define FLD(f) abuf->fields.sfmt_bound_m_b_m.f
9076 int UNUSED written = 0;
9077 IADDR UNUSED pc = abuf->addr;
9078 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
9079
9080{
9081 HI tmp_tmpd;
9082 tmp_tmpd = GET_H_GR (FLD (f_operand2));
9083{
9084 SI tmp_addr;
9085 BI tmp_postinc;
9086 tmp_postinc = FLD (f_memmode);
9087 tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
9088if (ANDIF (GET_H_V32_NON_V32 (), NEBI (CPU (h_xbit), 0))) {
9089if (EQBI (CPU (h_pbit), 0)) {
9090{
9091 {
9092 HI opval = tmp_tmpd;
9093 SETMEMHI (current_cpu, pc, tmp_addr, opval);
9094 written |= (1 << 10);
9095 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
9096 }
9097 {
9098 BI opval = CPU (h_pbit);
9099 CPU (h_cbit) = opval;
9100 written |= (1 << 9);
9101 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
9102 }
9103}
9104} else {
9105 {
9106 BI opval = 1;
9107 CPU (h_cbit) = opval;
9108 written |= (1 << 9);
9109 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
9110 }
9111}
9112} else {
9113 {
9114 HI opval = tmp_tmpd;
9115 SETMEMHI (current_cpu, pc, tmp_addr, opval);
9116 written |= (1 << 10);
9117 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
9118 }
9119}
9120if (NEBI (tmp_postinc, 0)) {
9121{
9122if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
9123 tmp_addr = ADDSI (tmp_addr, 2);
9124}
9125 {
9126 SI opval = tmp_addr;
9127 SET_H_GR (FLD (f_operand1), opval);
9128 written |= (1 << 8);
9129 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
9130 }
9131}
9132}
9133}
9134{
9135 {
9136 BI opval = 0;
9137 CPU (h_xbit) = opval;
9138 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
9139 }
9140 {
9141 BI opval = 0;
9142 SET_H_INSN_PREFIXED_P (opval);
9143 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
9144 }
9145}
9146}
9147
9148 abuf->written = written;
9149#undef FLD
9150}
9151 NEXT (vpc);
9152
9153 CASE (sem, INSN_MOVE_R_M_D_M) : /* move-r-m.d ${Rs-dfield},[${Rd-sfield}${inc}] */
9154{
9155 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
9156 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
9157#define FLD(f) abuf->fields.sfmt_bound_m_b_m.f
9158 int UNUSED written = 0;
9159 IADDR UNUSED pc = abuf->addr;
9160 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
9161
9162{
9163 SI tmp_tmpd;
9164 tmp_tmpd = GET_H_GR (FLD (f_operand2));
9165{
9166 SI tmp_addr;
9167 BI tmp_postinc;
9168 tmp_postinc = FLD (f_memmode);
9169 tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
9170if (ANDIF (GET_H_V32_NON_V32 (), NEBI (CPU (h_xbit), 0))) {
9171if (EQBI (CPU (h_pbit), 0)) {
9172{
9173 {
9174 SI opval = tmp_tmpd;
9175 SETMEMSI (current_cpu, pc, tmp_addr, opval);
9176 written |= (1 << 10);
9177 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
9178 }
9179 {
9180 BI opval = CPU (h_pbit);
9181 CPU (h_cbit) = opval;
9182 written |= (1 << 9);
9183 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
9184 }
9185}
9186} else {
9187 {
9188 BI opval = 1;
9189 CPU (h_cbit) = opval;
9190 written |= (1 << 9);
9191 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
9192 }
9193}
9194} else {
9195 {
9196 SI opval = tmp_tmpd;
9197 SETMEMSI (current_cpu, pc, tmp_addr, opval);
9198 written |= (1 << 10);
9199 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
9200 }
9201}
9202if (NEBI (tmp_postinc, 0)) {
9203{
9204if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
9205 tmp_addr = ADDSI (tmp_addr, 4);
9206}
9207 {
9208 SI opval = tmp_addr;
9209 SET_H_GR (FLD (f_operand1), opval);
9210 written |= (1 << 8);
9211 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
9212 }
9213}
9214}
9215}
9216{
9217 {
9218 BI opval = 0;
9219 CPU (h_xbit) = opval;
9220 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
9221 }
9222 {
9223 BI opval = 0;
9224 SET_H_INSN_PREFIXED_P (opval);
9225 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
9226 }
9227}
9228}
9229
9230 abuf->written = written;
9231#undef FLD
9232}
9233 NEXT (vpc);
9234
9235 CASE (sem, INSN_MULS_B) : /* muls.b $Rs,$Rd */
9236{
9237 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
9238 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
9239#define FLD(f) abuf->fields.sfmt_muls_b.f
9240 int UNUSED written = 0;
9241 IADDR UNUSED pc = abuf->addr;
9242 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
9243
9244{
9245 DI tmp_src1;
9246 DI tmp_src2;
9247 DI tmp_tmpr;
9248 tmp_src1 = EXTQIDI (TRUNCSIQI (GET_H_GR (FLD (f_operand1))));
9249 tmp_src2 = EXTQIDI (TRUNCSIQI (GET_H_GR (FLD (f_operand2))));
9250 tmp_tmpr = MULDI (tmp_src1, tmp_src2);
9251 {
9252 SI opval = TRUNCDISI (tmp_tmpr);
9253 SET_H_GR (FLD (f_operand2), opval);
9254 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
9255 }
9256 {
9257 SI opval = TRUNCDISI (SRLDI (tmp_tmpr, 32));
9258 SET_H_SR (((UINT) 7), opval);
9259 TRACE_RESULT (current_cpu, abuf, "sr", 'x', opval);
9260 }
9261{
9262 {
9263 BI opval = ANDIF (GET_H_V32_NON_V32 (), CPU (h_cbit));
9264 CPU (h_cbit) = opval;
9265 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
9266 }
9267 {
9268 BI opval = LTDI (tmp_tmpr, 0);
9269 CPU (h_nbit) = opval;
9270 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
9271 }
9272 {
9273 BI opval = ANDIF (EQDI (tmp_tmpr, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
9274 CPU (h_zbit) = opval;
9275 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
9276 }
9277 {
9278 BI opval = NEDI (tmp_tmpr, EXTSIDI (TRUNCDISI (tmp_tmpr)));
9279 CPU (h_vbit) = opval;
9280 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
9281 }
9282{
9283 {
9284 BI opval = 0;
9285 CPU (h_xbit) = opval;
9286 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
9287 }
9288 {
9289 BI opval = 0;
9290 SET_H_INSN_PREFIXED_P (opval);
9291 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
9292 }
9293}
9294}
9295}
9296
9297#undef FLD
9298}
9299 NEXT (vpc);
9300
9301 CASE (sem, INSN_MULS_W) : /* muls.w $Rs,$Rd */
9302{
9303 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
9304 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
9305#define FLD(f) abuf->fields.sfmt_muls_b.f
9306 int UNUSED written = 0;
9307 IADDR UNUSED pc = abuf->addr;
9308 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
9309
9310{
9311 DI tmp_src1;
9312 DI tmp_src2;
9313 DI tmp_tmpr;
9314 tmp_src1 = EXTHIDI (TRUNCSIHI (GET_H_GR (FLD (f_operand1))));
9315 tmp_src2 = EXTHIDI (TRUNCSIHI (GET_H_GR (FLD (f_operand2))));
9316 tmp_tmpr = MULDI (tmp_src1, tmp_src2);
9317 {
9318 SI opval = TRUNCDISI (tmp_tmpr);
9319 SET_H_GR (FLD (f_operand2), opval);
9320 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
9321 }
9322 {
9323 SI opval = TRUNCDISI (SRLDI (tmp_tmpr, 32));
9324 SET_H_SR (((UINT) 7), opval);
9325 TRACE_RESULT (current_cpu, abuf, "sr", 'x', opval);
9326 }
9327{
9328 {
9329 BI opval = ANDIF (GET_H_V32_NON_V32 (), CPU (h_cbit));
9330 CPU (h_cbit) = opval;
9331 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
9332 }
9333 {
9334 BI opval = LTDI (tmp_tmpr, 0);
9335 CPU (h_nbit) = opval;
9336 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
9337 }
9338 {
9339 BI opval = ANDIF (EQDI (tmp_tmpr, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
9340 CPU (h_zbit) = opval;
9341 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
9342 }
9343 {
9344 BI opval = NEDI (tmp_tmpr, EXTSIDI (TRUNCDISI (tmp_tmpr)));
9345 CPU (h_vbit) = opval;
9346 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
9347 }
9348{
9349 {
9350 BI opval = 0;
9351 CPU (h_xbit) = opval;
9352 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
9353 }
9354 {
9355 BI opval = 0;
9356 SET_H_INSN_PREFIXED_P (opval);
9357 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
9358 }
9359}
9360}
9361}
9362
9363#undef FLD
9364}
9365 NEXT (vpc);
9366
9367 CASE (sem, INSN_MULS_D) : /* muls.d $Rs,$Rd */
9368{
9369 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
9370 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
9371#define FLD(f) abuf->fields.sfmt_muls_b.f
9372 int UNUSED written = 0;
9373 IADDR UNUSED pc = abuf->addr;
9374 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
9375
9376{
9377 DI tmp_src1;
9378 DI tmp_src2;
9379 DI tmp_tmpr;
9380 tmp_src1 = EXTSIDI (TRUNCSISI (GET_H_GR (FLD (f_operand1))));
9381 tmp_src2 = EXTSIDI (TRUNCSISI (GET_H_GR (FLD (f_operand2))));
9382 tmp_tmpr = MULDI (tmp_src1, tmp_src2);
9383 {
9384 SI opval = TRUNCDISI (tmp_tmpr);
9385 SET_H_GR (FLD (f_operand2), opval);
9386 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
9387 }
9388 {
9389 SI opval = TRUNCDISI (SRLDI (tmp_tmpr, 32));
9390 SET_H_SR (((UINT) 7), opval);
9391 TRACE_RESULT (current_cpu, abuf, "sr", 'x', opval);
9392 }
9393{
9394 {
9395 BI opval = ANDIF (GET_H_V32_NON_V32 (), CPU (h_cbit));
9396 CPU (h_cbit) = opval;
9397 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
9398 }
9399 {
9400 BI opval = LTDI (tmp_tmpr, 0);
9401 CPU (h_nbit) = opval;
9402 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
9403 }
9404 {
9405 BI opval = ANDIF (EQDI (tmp_tmpr, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
9406 CPU (h_zbit) = opval;
9407 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
9408 }
9409 {
9410 BI opval = NEDI (tmp_tmpr, EXTSIDI (TRUNCDISI (tmp_tmpr)));
9411 CPU (h_vbit) = opval;
9412 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
9413 }
9414{
9415 {
9416 BI opval = 0;
9417 CPU (h_xbit) = opval;
9418 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
9419 }
9420 {
9421 BI opval = 0;
9422 SET_H_INSN_PREFIXED_P (opval);
9423 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
9424 }
9425}
9426}
9427}
9428
9429#undef FLD
9430}
9431 NEXT (vpc);
9432
9433 CASE (sem, INSN_MULU_B) : /* mulu.b $Rs,$Rd */
9434{
9435 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
9436 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
9437#define FLD(f) abuf->fields.sfmt_muls_b.f
9438 int UNUSED written = 0;
9439 IADDR UNUSED pc = abuf->addr;
9440 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
9441
9442{
9443 DI tmp_src1;
9444 DI tmp_src2;
9445 DI tmp_tmpr;
9446 tmp_src1 = ZEXTQIDI (TRUNCSIQI (GET_H_GR (FLD (f_operand1))));
9447 tmp_src2 = ZEXTQIDI (TRUNCSIQI (GET_H_GR (FLD (f_operand2))));
9448 tmp_tmpr = MULDI (tmp_src1, tmp_src2);
9449 {
9450 SI opval = TRUNCDISI (tmp_tmpr);
9451 SET_H_GR (FLD (f_operand2), opval);
9452 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
9453 }
9454 {
9455 SI opval = TRUNCDISI (SRLDI (tmp_tmpr, 32));
9456 SET_H_SR (((UINT) 7), opval);
9457 TRACE_RESULT (current_cpu, abuf, "sr", 'x', opval);
9458 }
9459{
9460 {
9461 BI opval = ANDIF (GET_H_V32_NON_V32 (), CPU (h_cbit));
9462 CPU (h_cbit) = opval;
9463 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
9464 }
9465 {
9466 BI opval = LTDI (tmp_tmpr, 0);
9467 CPU (h_nbit) = opval;
9468 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
9469 }
9470 {
9471 BI opval = ANDIF (EQDI (tmp_tmpr, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
9472 CPU (h_zbit) = opval;
9473 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
9474 }
9475 {
9476 BI opval = NEDI (tmp_tmpr, ZEXTSIDI (TRUNCDISI (tmp_tmpr)));
9477 CPU (h_vbit) = opval;
9478 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
9479 }
9480{
9481 {
9482 BI opval = 0;
9483 CPU (h_xbit) = opval;
9484 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
9485 }
9486 {
9487 BI opval = 0;
9488 SET_H_INSN_PREFIXED_P (opval);
9489 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
9490 }
9491}
9492}
9493}
9494
9495#undef FLD
9496}
9497 NEXT (vpc);
9498
9499 CASE (sem, INSN_MULU_W) : /* mulu.w $Rs,$Rd */
9500{
9501 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
9502 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
9503#define FLD(f) abuf->fields.sfmt_muls_b.f
9504 int UNUSED written = 0;
9505 IADDR UNUSED pc = abuf->addr;
9506 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
9507
9508{
9509 DI tmp_src1;
9510 DI tmp_src2;
9511 DI tmp_tmpr;
9512 tmp_src1 = ZEXTHIDI (TRUNCSIHI (GET_H_GR (FLD (f_operand1))));
9513 tmp_src2 = ZEXTHIDI (TRUNCSIHI (GET_H_GR (FLD (f_operand2))));
9514 tmp_tmpr = MULDI (tmp_src1, tmp_src2);
9515 {
9516 SI opval = TRUNCDISI (tmp_tmpr);
9517 SET_H_GR (FLD (f_operand2), opval);
9518 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
9519 }
9520 {
9521 SI opval = TRUNCDISI (SRLDI (tmp_tmpr, 32));
9522 SET_H_SR (((UINT) 7), opval);
9523 TRACE_RESULT (current_cpu, abuf, "sr", 'x', opval);
9524 }
9525{
9526 {
9527 BI opval = ANDIF (GET_H_V32_NON_V32 (), CPU (h_cbit));
9528 CPU (h_cbit) = opval;
9529 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
9530 }
9531 {
9532 BI opval = LTDI (tmp_tmpr, 0);
9533 CPU (h_nbit) = opval;
9534 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
9535 }
9536 {
9537 BI opval = ANDIF (EQDI (tmp_tmpr, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
9538 CPU (h_zbit) = opval;
9539 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
9540 }
9541 {
9542 BI opval = NEDI (tmp_tmpr, ZEXTSIDI (TRUNCDISI (tmp_tmpr)));
9543 CPU (h_vbit) = opval;
9544 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
9545 }
9546{
9547 {
9548 BI opval = 0;
9549 CPU (h_xbit) = opval;
9550 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
9551 }
9552 {
9553 BI opval = 0;
9554 SET_H_INSN_PREFIXED_P (opval);
9555 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
9556 }
9557}
9558}
9559}
9560
9561#undef FLD
9562}
9563 NEXT (vpc);
9564
9565 CASE (sem, INSN_MULU_D) : /* mulu.d $Rs,$Rd */
9566{
9567 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
9568 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
9569#define FLD(f) abuf->fields.sfmt_muls_b.f
9570 int UNUSED written = 0;
9571 IADDR UNUSED pc = abuf->addr;
9572 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
9573
9574{
9575 DI tmp_src1;
9576 DI tmp_src2;
9577 DI tmp_tmpr;
9578 tmp_src1 = ZEXTSIDI (TRUNCSISI (GET_H_GR (FLD (f_operand1))));
9579 tmp_src2 = ZEXTSIDI (TRUNCSISI (GET_H_GR (FLD (f_operand2))));
9580 tmp_tmpr = MULDI (tmp_src1, tmp_src2);
9581 {
9582 SI opval = TRUNCDISI (tmp_tmpr);
9583 SET_H_GR (FLD (f_operand2), opval);
9584 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
9585 }
9586 {
9587 SI opval = TRUNCDISI (SRLDI (tmp_tmpr, 32));
9588 SET_H_SR (((UINT) 7), opval);
9589 TRACE_RESULT (current_cpu, abuf, "sr", 'x', opval);
9590 }
9591{
9592 {
9593 BI opval = ANDIF (GET_H_V32_NON_V32 (), CPU (h_cbit));
9594 CPU (h_cbit) = opval;
9595 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
9596 }
9597 {
9598 BI opval = LTDI (tmp_tmpr, 0);
9599 CPU (h_nbit) = opval;
9600 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
9601 }
9602 {
9603 BI opval = ANDIF (EQDI (tmp_tmpr, 0), ORIF (CPU (h_zbit), NOTBI (CPU (h_xbit))));
9604 CPU (h_zbit) = opval;
9605 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
9606 }
9607 {
9608 BI opval = NEDI (tmp_tmpr, ZEXTSIDI (TRUNCDISI (tmp_tmpr)));
9609 CPU (h_vbit) = opval;
9610 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
9611 }
9612{
9613 {
9614 BI opval = 0;
9615 CPU (h_xbit) = opval;
9616 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
9617 }
9618 {
9619 BI opval = 0;
9620 SET_H_INSN_PREFIXED_P (opval);
9621 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
9622 }
9623}
9624}
9625}
9626
9627#undef FLD
9628}
9629 NEXT (vpc);
9630
9631 CASE (sem, INSN_MSTEP) : /* mstep $Rs,$Rd */
9632{
9633 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
9634 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
9635#define FLD(f) abuf->fields.sfmt_muls_b.f
9636 int UNUSED written = 0;
9637 IADDR UNUSED pc = abuf->addr;
9638 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
9639
9640{
9641 SI tmp_tmpd;
9642 SI tmp_tmps;
9643 tmp_tmps = GET_H_GR (FLD (f_operand1));
9644 tmp_tmpd = ADDSI (SLLSI (GET_H_GR (FLD (f_operand2)), 1), ((CPU (h_nbit)) ? (tmp_tmps) : (0)));
9645 {
9646 SI opval = tmp_tmpd;
9647 SET_H_GR (FLD (f_operand2), opval);
9648 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
9649 }
9650{
9651 {
9652 BI opval = LTSI (tmp_tmpd, 0);
9653 CPU (h_nbit) = opval;
9654 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
9655 }
9656 {
9657 BI opval = ANDIF (EQSI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
9658 CPU (h_zbit) = opval;
9659 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
9660 }
9661SET_H_CBIT_MOVE (0);
9662SET_H_VBIT_MOVE (0);
9663{
9664 {
9665 BI opval = 0;
9666 CPU (h_xbit) = opval;
9667 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
9668 }
9669 {
9670 BI opval = 0;
9671 SET_H_INSN_PREFIXED_P (opval);
9672 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
9673 }
9674}
9675}
9676}
9677
9678#undef FLD
9679}
9680 NEXT (vpc);
9681
9682 CASE (sem, INSN_DSTEP) : /* dstep $Rs,$Rd */
9683{
9684 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
9685 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
9686#define FLD(f) abuf->fields.sfmt_muls_b.f
9687 int UNUSED written = 0;
9688 IADDR UNUSED pc = abuf->addr;
9689 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
9690
9691{
9692 SI tmp_tmp;
9693 SI tmp_tmps;
9694 SI tmp_tmpd;
9695 tmp_tmps = GET_H_GR (FLD (f_operand1));
9696 tmp_tmp = SLLSI (GET_H_GR (FLD (f_operand2)), 1);
9697 tmp_tmpd = ((GEUSI (tmp_tmp, tmp_tmps)) ? (SUBSI (tmp_tmp, tmp_tmps)) : (tmp_tmp));
9698 {
9699 SI opval = tmp_tmpd;
9700 SET_H_GR (FLD (f_operand2), opval);
9701 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
9702 }
9703{
9704 {
9705 BI opval = LTSI (tmp_tmpd, 0);
9706 CPU (h_nbit) = opval;
9707 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
9708 }
9709 {
9710 BI opval = ANDIF (EQSI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
9711 CPU (h_zbit) = opval;
9712 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
9713 }
9714SET_H_CBIT_MOVE (0);
9715SET_H_VBIT_MOVE (0);
9716{
9717 {
9718 BI opval = 0;
9719 CPU (h_xbit) = opval;
9720 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
9721 }
9722 {
9723 BI opval = 0;
9724 SET_H_INSN_PREFIXED_P (opval);
9725 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
9726 }
9727}
9728}
9729}
9730
9731#undef FLD
9732}
9733 NEXT (vpc);
9734
9735 CASE (sem, INSN_ABS) : /* abs $Rs,$Rd */
9736{
9737 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
9738 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
9739#define FLD(f) abuf->fields.sfmt_muls_b.f
9740 int UNUSED written = 0;
9741 IADDR UNUSED pc = abuf->addr;
9742 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
9743
9744{
9745 SI tmp_tmpd;
9746 tmp_tmpd = ABSSI (GET_H_GR (FLD (f_operand1)));
9747 {
9748 SI opval = tmp_tmpd;
9749 SET_H_GR (FLD (f_operand2), opval);
9750 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
9751 }
9752{
9753 {
9754 BI opval = LTSI (tmp_tmpd, 0);
9755 CPU (h_nbit) = opval;
9756 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
9757 }
9758 {
9759 BI opval = ANDIF (EQSI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
9760 CPU (h_zbit) = opval;
9761 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
9762 }
9763SET_H_CBIT_MOVE (0);
9764SET_H_VBIT_MOVE (0);
9765{
9766 {
9767 BI opval = 0;
9768 CPU (h_xbit) = opval;
9769 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
9770 }
9771 {
9772 BI opval = 0;
9773 SET_H_INSN_PREFIXED_P (opval);
9774 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
9775 }
9776}
9777}
9778}
9779
9780#undef FLD
9781}
9782 NEXT (vpc);
9783
9784 CASE (sem, INSN_AND_B_R) : /* and.b $Rs,$Rd */
9785{
9786 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
9787 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
9788#define FLD(f) abuf->fields.sfmt_add_b_r.f
9789 int UNUSED written = 0;
9790 IADDR UNUSED pc = abuf->addr;
9791 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
9792
9793{
9794 QI tmp_tmpd;
9795 tmp_tmpd = ANDQI (GET_H_GR (FLD (f_operand2)), GET_H_GR (FLD (f_operand1)));
9796{
9797 SI tmp_oldregval;
9798 tmp_oldregval = GET_H_RAW_GR_PC (FLD (f_operand2));
9799 {
9800 SI opval = ORSI (ANDSI (tmp_tmpd, 255), ANDSI (tmp_oldregval, 0xffffff00));
9801 SET_H_GR (FLD (f_operand2), opval);
9802 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
9803 }
9804}
9805{
9806 {
9807 BI opval = LTQI (tmp_tmpd, 0);
9808 CPU (h_nbit) = opval;
9809 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
9810 }
9811 {
9812 BI opval = ANDIF (EQQI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
9813 CPU (h_zbit) = opval;
9814 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
9815 }
9816SET_H_CBIT_MOVE (0);
9817SET_H_VBIT_MOVE (0);
9818{
9819 {
9820 BI opval = 0;
9821 CPU (h_xbit) = opval;
9822 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
9823 }
9824 {
9825 BI opval = 0;
9826 SET_H_INSN_PREFIXED_P (opval);
9827 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
9828 }
9829}
9830}
9831}
9832
9833#undef FLD
9834}
9835 NEXT (vpc);
9836
9837 CASE (sem, INSN_AND_W_R) : /* and.w $Rs,$Rd */
9838{
9839 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
9840 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
9841#define FLD(f) abuf->fields.sfmt_add_b_r.f
9842 int UNUSED written = 0;
9843 IADDR UNUSED pc = abuf->addr;
9844 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
9845
9846{
9847 HI tmp_tmpd;
9848 tmp_tmpd = ANDHI (GET_H_GR (FLD (f_operand2)), GET_H_GR (FLD (f_operand1)));
9849{
9850 SI tmp_oldregval;
9851 tmp_oldregval = GET_H_RAW_GR_PC (FLD (f_operand2));
9852 {
9853 SI opval = ORSI (ANDSI (tmp_tmpd, 65535), ANDSI (tmp_oldregval, 0xffff0000));
9854 SET_H_GR (FLD (f_operand2), opval);
9855 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
9856 }
9857}
9858{
9859 {
9860 BI opval = LTHI (tmp_tmpd, 0);
9861 CPU (h_nbit) = opval;
9862 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
9863 }
9864 {
9865 BI opval = ANDIF (EQHI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
9866 CPU (h_zbit) = opval;
9867 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
9868 }
9869SET_H_CBIT_MOVE (0);
9870SET_H_VBIT_MOVE (0);
9871{
9872 {
9873 BI opval = 0;
9874 CPU (h_xbit) = opval;
9875 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
9876 }
9877 {
9878 BI opval = 0;
9879 SET_H_INSN_PREFIXED_P (opval);
9880 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
9881 }
9882}
9883}
9884}
9885
9886#undef FLD
9887}
9888 NEXT (vpc);
9889
9890 CASE (sem, INSN_AND_D_R) : /* and.d $Rs,$Rd */
9891{
9892 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
9893 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
9894#define FLD(f) abuf->fields.sfmt_add_b_r.f
9895 int UNUSED written = 0;
9896 IADDR UNUSED pc = abuf->addr;
9897 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
9898
9899{
9900 SI tmp_tmpd;
9901 tmp_tmpd = ANDSI (GET_H_GR (FLD (f_operand2)), GET_H_GR (FLD (f_operand1)));
9902 {
9903 SI opval = tmp_tmpd;
9904 SET_H_GR (FLD (f_operand2), opval);
9905 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
9906 }
9907{
9908 {
9909 BI opval = LTSI (tmp_tmpd, 0);
9910 CPU (h_nbit) = opval;
9911 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
9912 }
9913 {
9914 BI opval = ANDIF (EQSI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
9915 CPU (h_zbit) = opval;
9916 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
9917 }
9918SET_H_CBIT_MOVE (0);
9919SET_H_VBIT_MOVE (0);
9920{
9921 {
9922 BI opval = 0;
9923 CPU (h_xbit) = opval;
9924 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
9925 }
9926 {
9927 BI opval = 0;
9928 SET_H_INSN_PREFIXED_P (opval);
9929 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
9930 }
9931}
9932}
9933}
9934
9935#undef FLD
9936}
9937 NEXT (vpc);
9938
9939 CASE (sem, INSN_AND_M_B_M) : /* and-m.b [${Rs}${inc}],${Rd} */
9940{
9941 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
9942 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
9943#define FLD(f) abuf->fields.sfmt_add_m_b_m.f
9944 int UNUSED written = 0;
9945 IADDR UNUSED pc = abuf->addr;
9946 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
9947
9948{
9949 QI tmp_tmpd;
9950 tmp_tmpd = ANDQI (GET_H_GR (FLD (f_operand2)), ({ SI tmp_addr;
9951 QI tmp_tmp_mem;
9952 BI tmp_postinc;
9953 tmp_postinc = FLD (f_memmode);
9954; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
9955; tmp_tmp_mem = GETMEMQI (current_cpu, pc, tmp_addr);
9956; if (NEBI (tmp_postinc, 0)) {
9957{
9958if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
9959 tmp_addr = ADDSI (tmp_addr, 1);
9960}
9961 {
9962 SI opval = tmp_addr;
9963 SET_H_GR (FLD (f_operand1), opval);
9964 written |= (1 << 11);
9965 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
9966 }
9967}
9968}
9969; tmp_tmp_mem; }));
9970{
9971 SI tmp_oldregval;
9972 tmp_oldregval = GET_H_RAW_GR_PC (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))));
9973 {
9974 SI opval = ORSI (ANDSI (tmp_tmpd, 255), ANDSI (tmp_oldregval, 0xffffff00));
9975 SET_H_GR (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))), opval);
9976 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
9977 }
9978}
9979{
9980 {
9981 BI opval = LTQI (tmp_tmpd, 0);
9982 CPU (h_nbit) = opval;
9983 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
9984 }
9985 {
9986 BI opval = ANDIF (EQQI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
9987 CPU (h_zbit) = opval;
9988 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
9989 }
9990SET_H_CBIT_MOVE (0);
9991SET_H_VBIT_MOVE (0);
9992{
9993 {
9994 BI opval = 0;
9995 CPU (h_xbit) = opval;
9996 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
9997 }
9998 {
9999 BI opval = 0;
10000 SET_H_INSN_PREFIXED_P (opval);
10001 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
10002 }
10003}
10004}
10005}
10006
10007 abuf->written = written;
10008#undef FLD
10009}
10010 NEXT (vpc);
10011
10012 CASE (sem, INSN_AND_M_W_M) : /* and-m.w [${Rs}${inc}],${Rd} */
10013{
10014 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
10015 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
10016#define FLD(f) abuf->fields.sfmt_add_m_b_m.f
10017 int UNUSED written = 0;
10018 IADDR UNUSED pc = abuf->addr;
10019 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
10020
10021{
10022 HI tmp_tmpd;
10023 tmp_tmpd = ANDHI (GET_H_GR (FLD (f_operand2)), ({ SI tmp_addr;
10024 HI tmp_tmp_mem;
10025 BI tmp_postinc;
10026 tmp_postinc = FLD (f_memmode);
10027; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
10028; tmp_tmp_mem = GETMEMHI (current_cpu, pc, tmp_addr);
10029; if (NEBI (tmp_postinc, 0)) {
10030{
10031if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
10032 tmp_addr = ADDSI (tmp_addr, 2);
10033}
10034 {
10035 SI opval = tmp_addr;
10036 SET_H_GR (FLD (f_operand1), opval);
10037 written |= (1 << 11);
10038 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
10039 }
10040}
10041}
10042; tmp_tmp_mem; }));
10043{
10044 SI tmp_oldregval;
10045 tmp_oldregval = GET_H_RAW_GR_PC (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))));
10046 {
10047 SI opval = ORSI (ANDSI (tmp_tmpd, 65535), ANDSI (tmp_oldregval, 0xffff0000));
10048 SET_H_GR (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))), opval);
10049 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
10050 }
10051}
10052{
10053 {
10054 BI opval = LTHI (tmp_tmpd, 0);
10055 CPU (h_nbit) = opval;
10056 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
10057 }
10058 {
10059 BI opval = ANDIF (EQHI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
10060 CPU (h_zbit) = opval;
10061 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
10062 }
10063SET_H_CBIT_MOVE (0);
10064SET_H_VBIT_MOVE (0);
10065{
10066 {
10067 BI opval = 0;
10068 CPU (h_xbit) = opval;
10069 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
10070 }
10071 {
10072 BI opval = 0;
10073 SET_H_INSN_PREFIXED_P (opval);
10074 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
10075 }
10076}
10077}
10078}
10079
10080 abuf->written = written;
10081#undef FLD
10082}
10083 NEXT (vpc);
10084
10085 CASE (sem, INSN_AND_M_D_M) : /* and-m.d [${Rs}${inc}],${Rd} */
10086{
10087 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
10088 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
10089#define FLD(f) abuf->fields.sfmt_add_m_b_m.f
10090 int UNUSED written = 0;
10091 IADDR UNUSED pc = abuf->addr;
10092 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
10093
10094{
10095 SI tmp_tmpd;
10096 tmp_tmpd = ANDSI (GET_H_GR (FLD (f_operand2)), ({ SI tmp_addr;
10097 SI tmp_tmp_mem;
10098 BI tmp_postinc;
10099 tmp_postinc = FLD (f_memmode);
10100; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
10101; tmp_tmp_mem = GETMEMSI (current_cpu, pc, tmp_addr);
10102; if (NEBI (tmp_postinc, 0)) {
10103{
10104if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
10105 tmp_addr = ADDSI (tmp_addr, 4);
10106}
10107 {
10108 SI opval = tmp_addr;
10109 SET_H_GR (FLD (f_operand1), opval);
10110 written |= (1 << 10);
10111 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
10112 }
10113}
10114}
10115; tmp_tmp_mem; }));
10116 {
10117 SI opval = tmp_tmpd;
10118 SET_H_GR (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))), opval);
10119 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
10120 }
10121{
10122 {
10123 BI opval = LTSI (tmp_tmpd, 0);
10124 CPU (h_nbit) = opval;
10125 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
10126 }
10127 {
10128 BI opval = ANDIF (EQSI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
10129 CPU (h_zbit) = opval;
10130 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
10131 }
10132SET_H_CBIT_MOVE (0);
10133SET_H_VBIT_MOVE (0);
10134{
10135 {
10136 BI opval = 0;
10137 CPU (h_xbit) = opval;
10138 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
10139 }
10140 {
10141 BI opval = 0;
10142 SET_H_INSN_PREFIXED_P (opval);
10143 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
10144 }
10145}
10146}
10147}
10148
10149 abuf->written = written;
10150#undef FLD
10151}
10152 NEXT (vpc);
10153
10154 CASE (sem, INSN_ANDCBR) : /* and.b ${sconst8}],${Rd} */
10155{
10156 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
10157 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
10158#define FLD(f) abuf->fields.sfmt_addcbr.f
10159 int UNUSED written = 0;
10160 IADDR UNUSED pc = abuf->addr;
10161 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
10162
10163{
10164 QI tmp_tmpd;
10165 tmp_tmpd = ANDQI (GET_H_GR (FLD (f_operand2)), FLD (f_indir_pc__byte));
10166{
10167 SI tmp_oldregval;
10168 tmp_oldregval = GET_H_RAW_GR_PC (FLD (f_operand2));
10169 {
10170 SI opval = ORSI (ANDSI (tmp_tmpd, 255), ANDSI (tmp_oldregval, 0xffffff00));
10171 SET_H_GR (FLD (f_operand2), opval);
10172 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
10173 }
10174}
10175{
10176 {
10177 BI opval = LTQI (tmp_tmpd, 0);
10178 CPU (h_nbit) = opval;
10179 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
10180 }
10181 {
10182 BI opval = ANDIF (EQQI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
10183 CPU (h_zbit) = opval;
10184 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
10185 }
10186SET_H_CBIT_MOVE (0);
10187SET_H_VBIT_MOVE (0);
10188{
10189 {
10190 BI opval = 0;
10191 CPU (h_xbit) = opval;
10192 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
10193 }
10194 {
10195 BI opval = 0;
10196 SET_H_INSN_PREFIXED_P (opval);
10197 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
10198 }
10199}
10200}
10201}
10202
10203#undef FLD
10204}
10205 NEXT (vpc);
10206
10207 CASE (sem, INSN_ANDCWR) : /* and.w ${sconst16}],${Rd} */
10208{
10209 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
10210 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
10211#define FLD(f) abuf->fields.sfmt_addcwr.f
10212 int UNUSED written = 0;
10213 IADDR UNUSED pc = abuf->addr;
10214 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
10215
10216{
10217 HI tmp_tmpd;
10218 tmp_tmpd = ANDHI (GET_H_GR (FLD (f_operand2)), FLD (f_indir_pc__word));
10219{
10220 SI tmp_oldregval;
10221 tmp_oldregval = GET_H_RAW_GR_PC (FLD (f_operand2));
10222 {
10223 SI opval = ORSI (ANDSI (tmp_tmpd, 65535), ANDSI (tmp_oldregval, 0xffff0000));
10224 SET_H_GR (FLD (f_operand2), opval);
10225 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
10226 }
10227}
10228{
10229 {
10230 BI opval = LTHI (tmp_tmpd, 0);
10231 CPU (h_nbit) = opval;
10232 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
10233 }
10234 {
10235 BI opval = ANDIF (EQHI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
10236 CPU (h_zbit) = opval;
10237 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
10238 }
10239SET_H_CBIT_MOVE (0);
10240SET_H_VBIT_MOVE (0);
10241{
10242 {
10243 BI opval = 0;
10244 CPU (h_xbit) = opval;
10245 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
10246 }
10247 {
10248 BI opval = 0;
10249 SET_H_INSN_PREFIXED_P (opval);
10250 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
10251 }
10252}
10253}
10254}
10255
10256#undef FLD
10257}
10258 NEXT (vpc);
10259
10260 CASE (sem, INSN_ANDCDR) : /* and.d ${const32}],${Rd} */
10261{
10262 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
10263 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
10264#define FLD(f) abuf->fields.sfmt_addcdr.f
10265 int UNUSED written = 0;
10266 IADDR UNUSED pc = abuf->addr;
10267 vpc = SEM_NEXT_VPC (sem_arg, pc, 6);
10268
10269{
10270 SI tmp_tmpd;
10271 tmp_tmpd = ANDSI (GET_H_GR (FLD (f_operand2)), FLD (f_indir_pc__dword));
10272 {
10273 SI opval = tmp_tmpd;
10274 SET_H_GR (FLD (f_operand2), opval);
10275 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
10276 }
10277{
10278 {
10279 BI opval = LTSI (tmp_tmpd, 0);
10280 CPU (h_nbit) = opval;
10281 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
10282 }
10283 {
10284 BI opval = ANDIF (EQSI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
10285 CPU (h_zbit) = opval;
10286 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
10287 }
10288SET_H_CBIT_MOVE (0);
10289SET_H_VBIT_MOVE (0);
10290{
10291 {
10292 BI opval = 0;
10293 CPU (h_xbit) = opval;
10294 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
10295 }
10296 {
10297 BI opval = 0;
10298 SET_H_INSN_PREFIXED_P (opval);
10299 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
10300 }
10301}
10302}
10303}
10304
10305#undef FLD
10306}
10307 NEXT (vpc);
10308
10309 CASE (sem, INSN_ANDQ) : /* andq $i,$Rd */
10310{
10311 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
10312 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
10313#define FLD(f) abuf->fields.sfmt_andq.f
10314 int UNUSED written = 0;
10315 IADDR UNUSED pc = abuf->addr;
10316 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
10317
10318{
10319 SI tmp_tmpd;
10320 tmp_tmpd = ANDSI (GET_H_GR (FLD (f_operand2)), FLD (f_s6));
10321 {
10322 SI opval = tmp_tmpd;
10323 SET_H_GR (FLD (f_operand2), opval);
10324 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
10325 }
10326{
10327 {
10328 BI opval = LTSI (tmp_tmpd, 0);
10329 CPU (h_nbit) = opval;
10330 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
10331 }
10332 {
10333 BI opval = ANDIF (EQSI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
10334 CPU (h_zbit) = opval;
10335 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
10336 }
10337SET_H_CBIT_MOVE (0);
10338SET_H_VBIT_MOVE (0);
10339{
10340 {
10341 BI opval = 0;
10342 CPU (h_xbit) = opval;
10343 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
10344 }
10345 {
10346 BI opval = 0;
10347 SET_H_INSN_PREFIXED_P (opval);
10348 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
10349 }
10350}
10351}
10352}
10353
10354#undef FLD
10355}
10356 NEXT (vpc);
10357
10358 CASE (sem, INSN_ORR_B_R) : /* orr.b $Rs,$Rd */
10359{
10360 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
10361 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
10362#define FLD(f) abuf->fields.sfmt_add_b_r.f
10363 int UNUSED written = 0;
10364 IADDR UNUSED pc = abuf->addr;
10365 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
10366
10367{
10368 QI tmp_tmpd;
10369 tmp_tmpd = ORQI (GET_H_GR (FLD (f_operand2)), GET_H_GR (FLD (f_operand1)));
10370{
10371 SI tmp_oldregval;
10372 tmp_oldregval = GET_H_RAW_GR_PC (FLD (f_operand2));
10373 {
10374 SI opval = ORSI (ANDSI (tmp_tmpd, 255), ANDSI (tmp_oldregval, 0xffffff00));
10375 SET_H_GR (FLD (f_operand2), opval);
10376 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
10377 }
10378}
10379{
10380 {
10381 BI opval = LTQI (tmp_tmpd, 0);
10382 CPU (h_nbit) = opval;
10383 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
10384 }
10385 {
10386 BI opval = ANDIF (EQQI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
10387 CPU (h_zbit) = opval;
10388 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
10389 }
10390SET_H_CBIT_MOVE (0);
10391SET_H_VBIT_MOVE (0);
10392{
10393 {
10394 BI opval = 0;
10395 CPU (h_xbit) = opval;
10396 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
10397 }
10398 {
10399 BI opval = 0;
10400 SET_H_INSN_PREFIXED_P (opval);
10401 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
10402 }
10403}
10404}
10405}
10406
10407#undef FLD
10408}
10409 NEXT (vpc);
10410
10411 CASE (sem, INSN_ORR_W_R) : /* orr.w $Rs,$Rd */
10412{
10413 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
10414 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
10415#define FLD(f) abuf->fields.sfmt_add_b_r.f
10416 int UNUSED written = 0;
10417 IADDR UNUSED pc = abuf->addr;
10418 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
10419
10420{
10421 HI tmp_tmpd;
10422 tmp_tmpd = ORHI (GET_H_GR (FLD (f_operand2)), GET_H_GR (FLD (f_operand1)));
10423{
10424 SI tmp_oldregval;
10425 tmp_oldregval = GET_H_RAW_GR_PC (FLD (f_operand2));
10426 {
10427 SI opval = ORSI (ANDSI (tmp_tmpd, 65535), ANDSI (tmp_oldregval, 0xffff0000));
10428 SET_H_GR (FLD (f_operand2), opval);
10429 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
10430 }
10431}
10432{
10433 {
10434 BI opval = LTHI (tmp_tmpd, 0);
10435 CPU (h_nbit) = opval;
10436 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
10437 }
10438 {
10439 BI opval = ANDIF (EQHI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
10440 CPU (h_zbit) = opval;
10441 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
10442 }
10443SET_H_CBIT_MOVE (0);
10444SET_H_VBIT_MOVE (0);
10445{
10446 {
10447 BI opval = 0;
10448 CPU (h_xbit) = opval;
10449 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
10450 }
10451 {
10452 BI opval = 0;
10453 SET_H_INSN_PREFIXED_P (opval);
10454 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
10455 }
10456}
10457}
10458}
10459
10460#undef FLD
10461}
10462 NEXT (vpc);
10463
10464 CASE (sem, INSN_ORR_D_R) : /* orr.d $Rs,$Rd */
10465{
10466 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
10467 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
10468#define FLD(f) abuf->fields.sfmt_add_b_r.f
10469 int UNUSED written = 0;
10470 IADDR UNUSED pc = abuf->addr;
10471 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
10472
10473{
10474 SI tmp_tmpd;
10475 tmp_tmpd = ORSI (GET_H_GR (FLD (f_operand2)), GET_H_GR (FLD (f_operand1)));
10476 {
10477 SI opval = tmp_tmpd;
10478 SET_H_GR (FLD (f_operand2), opval);
10479 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
10480 }
10481{
10482 {
10483 BI opval = LTSI (tmp_tmpd, 0);
10484 CPU (h_nbit) = opval;
10485 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
10486 }
10487 {
10488 BI opval = ANDIF (EQSI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
10489 CPU (h_zbit) = opval;
10490 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
10491 }
10492SET_H_CBIT_MOVE (0);
10493SET_H_VBIT_MOVE (0);
10494{
10495 {
10496 BI opval = 0;
10497 CPU (h_xbit) = opval;
10498 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
10499 }
10500 {
10501 BI opval = 0;
10502 SET_H_INSN_PREFIXED_P (opval);
10503 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
10504 }
10505}
10506}
10507}
10508
10509#undef FLD
10510}
10511 NEXT (vpc);
10512
10513 CASE (sem, INSN_OR_M_B_M) : /* or-m.b [${Rs}${inc}],${Rd} */
10514{
10515 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
10516 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
10517#define FLD(f) abuf->fields.sfmt_add_m_b_m.f
10518 int UNUSED written = 0;
10519 IADDR UNUSED pc = abuf->addr;
10520 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
10521
10522{
10523 QI tmp_tmpd;
10524 tmp_tmpd = ORQI (GET_H_GR (FLD (f_operand2)), ({ SI tmp_addr;
10525 QI tmp_tmp_mem;
10526 BI tmp_postinc;
10527 tmp_postinc = FLD (f_memmode);
10528; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
10529; tmp_tmp_mem = GETMEMQI (current_cpu, pc, tmp_addr);
10530; if (NEBI (tmp_postinc, 0)) {
10531{
10532if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
10533 tmp_addr = ADDSI (tmp_addr, 1);
10534}
10535 {
10536 SI opval = tmp_addr;
10537 SET_H_GR (FLD (f_operand1), opval);
10538 written |= (1 << 11);
10539 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
10540 }
10541}
10542}
10543; tmp_tmp_mem; }));
10544{
10545 SI tmp_oldregval;
10546 tmp_oldregval = GET_H_RAW_GR_PC (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))));
10547 {
10548 SI opval = ORSI (ANDSI (tmp_tmpd, 255), ANDSI (tmp_oldregval, 0xffffff00));
10549 SET_H_GR (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))), opval);
10550 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
10551 }
10552}
10553{
10554 {
10555 BI opval = LTQI (tmp_tmpd, 0);
10556 CPU (h_nbit) = opval;
10557 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
10558 }
10559 {
10560 BI opval = ANDIF (EQQI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
10561 CPU (h_zbit) = opval;
10562 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
10563 }
10564SET_H_CBIT_MOVE (0);
10565SET_H_VBIT_MOVE (0);
10566{
10567 {
10568 BI opval = 0;
10569 CPU (h_xbit) = opval;
10570 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
10571 }
10572 {
10573 BI opval = 0;
10574 SET_H_INSN_PREFIXED_P (opval);
10575 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
10576 }
10577}
10578}
10579}
10580
10581 abuf->written = written;
10582#undef FLD
10583}
10584 NEXT (vpc);
10585
10586 CASE (sem, INSN_OR_M_W_M) : /* or-m.w [${Rs}${inc}],${Rd} */
10587{
10588 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
10589 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
10590#define FLD(f) abuf->fields.sfmt_add_m_b_m.f
10591 int UNUSED written = 0;
10592 IADDR UNUSED pc = abuf->addr;
10593 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
10594
10595{
10596 HI tmp_tmpd;
10597 tmp_tmpd = ORHI (GET_H_GR (FLD (f_operand2)), ({ SI tmp_addr;
10598 HI tmp_tmp_mem;
10599 BI tmp_postinc;
10600 tmp_postinc = FLD (f_memmode);
10601; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
10602; tmp_tmp_mem = GETMEMHI (current_cpu, pc, tmp_addr);
10603; if (NEBI (tmp_postinc, 0)) {
10604{
10605if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
10606 tmp_addr = ADDSI (tmp_addr, 2);
10607}
10608 {
10609 SI opval = tmp_addr;
10610 SET_H_GR (FLD (f_operand1), opval);
10611 written |= (1 << 11);
10612 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
10613 }
10614}
10615}
10616; tmp_tmp_mem; }));
10617{
10618 SI tmp_oldregval;
10619 tmp_oldregval = GET_H_RAW_GR_PC (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))));
10620 {
10621 SI opval = ORSI (ANDSI (tmp_tmpd, 65535), ANDSI (tmp_oldregval, 0xffff0000));
10622 SET_H_GR (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))), opval);
10623 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
10624 }
10625}
10626{
10627 {
10628 BI opval = LTHI (tmp_tmpd, 0);
10629 CPU (h_nbit) = opval;
10630 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
10631 }
10632 {
10633 BI opval = ANDIF (EQHI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
10634 CPU (h_zbit) = opval;
10635 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
10636 }
10637SET_H_CBIT_MOVE (0);
10638SET_H_VBIT_MOVE (0);
10639{
10640 {
10641 BI opval = 0;
10642 CPU (h_xbit) = opval;
10643 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
10644 }
10645 {
10646 BI opval = 0;
10647 SET_H_INSN_PREFIXED_P (opval);
10648 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
10649 }
10650}
10651}
10652}
10653
10654 abuf->written = written;
10655#undef FLD
10656}
10657 NEXT (vpc);
10658
10659 CASE (sem, INSN_OR_M_D_M) : /* or-m.d [${Rs}${inc}],${Rd} */
10660{
10661 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
10662 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
10663#define FLD(f) abuf->fields.sfmt_add_m_b_m.f
10664 int UNUSED written = 0;
10665 IADDR UNUSED pc = abuf->addr;
10666 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
10667
10668{
10669 SI tmp_tmpd;
10670 tmp_tmpd = ORSI (GET_H_GR (FLD (f_operand2)), ({ SI tmp_addr;
10671 SI tmp_tmp_mem;
10672 BI tmp_postinc;
10673 tmp_postinc = FLD (f_memmode);
10674; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
10675; tmp_tmp_mem = GETMEMSI (current_cpu, pc, tmp_addr);
10676; if (NEBI (tmp_postinc, 0)) {
10677{
10678if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
10679 tmp_addr = ADDSI (tmp_addr, 4);
10680}
10681 {
10682 SI opval = tmp_addr;
10683 SET_H_GR (FLD (f_operand1), opval);
10684 written |= (1 << 10);
10685 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
10686 }
10687}
10688}
10689; tmp_tmp_mem; }));
10690 {
10691 SI opval = tmp_tmpd;
10692 SET_H_GR (((ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) ? (FLD (f_operand1)) : (FLD (f_operand2))), opval);
10693 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
10694 }
10695{
10696 {
10697 BI opval = LTSI (tmp_tmpd, 0);
10698 CPU (h_nbit) = opval;
10699 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
10700 }
10701 {
10702 BI opval = ANDIF (EQSI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
10703 CPU (h_zbit) = opval;
10704 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
10705 }
10706SET_H_CBIT_MOVE (0);
10707SET_H_VBIT_MOVE (0);
10708{
10709 {
10710 BI opval = 0;
10711 CPU (h_xbit) = opval;
10712 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
10713 }
10714 {
10715 BI opval = 0;
10716 SET_H_INSN_PREFIXED_P (opval);
10717 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
10718 }
10719}
10720}
10721}
10722
10723 abuf->written = written;
10724#undef FLD
10725}
10726 NEXT (vpc);
10727
10728 CASE (sem, INSN_ORCBR) : /* or.b ${sconst8}],${Rd} */
10729{
10730 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
10731 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
10732#define FLD(f) abuf->fields.sfmt_addcbr.f
10733 int UNUSED written = 0;
10734 IADDR UNUSED pc = abuf->addr;
10735 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
10736
10737{
10738 QI tmp_tmpd;
10739 tmp_tmpd = ORQI (GET_H_GR (FLD (f_operand2)), FLD (f_indir_pc__byte));
10740{
10741 SI tmp_oldregval;
10742 tmp_oldregval = GET_H_RAW_GR_PC (FLD (f_operand2));
10743 {
10744 SI opval = ORSI (ANDSI (tmp_tmpd, 255), ANDSI (tmp_oldregval, 0xffffff00));
10745 SET_H_GR (FLD (f_operand2), opval);
10746 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
10747 }
10748}
10749{
10750 {
10751 BI opval = LTQI (tmp_tmpd, 0);
10752 CPU (h_nbit) = opval;
10753 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
10754 }
10755 {
10756 BI opval = ANDIF (EQQI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
10757 CPU (h_zbit) = opval;
10758 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
10759 }
10760SET_H_CBIT_MOVE (0);
10761SET_H_VBIT_MOVE (0);
10762{
10763 {
10764 BI opval = 0;
10765 CPU (h_xbit) = opval;
10766 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
10767 }
10768 {
10769 BI opval = 0;
10770 SET_H_INSN_PREFIXED_P (opval);
10771 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
10772 }
10773}
10774}
10775}
10776
10777#undef FLD
10778}
10779 NEXT (vpc);
10780
10781 CASE (sem, INSN_ORCWR) : /* or.w ${sconst16}],${Rd} */
10782{
10783 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
10784 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
10785#define FLD(f) abuf->fields.sfmt_addcwr.f
10786 int UNUSED written = 0;
10787 IADDR UNUSED pc = abuf->addr;
10788 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
10789
10790{
10791 HI tmp_tmpd;
10792 tmp_tmpd = ORHI (GET_H_GR (FLD (f_operand2)), FLD (f_indir_pc__word));
10793{
10794 SI tmp_oldregval;
10795 tmp_oldregval = GET_H_RAW_GR_PC (FLD (f_operand2));
10796 {
10797 SI opval = ORSI (ANDSI (tmp_tmpd, 65535), ANDSI (tmp_oldregval, 0xffff0000));
10798 SET_H_GR (FLD (f_operand2), opval);
10799 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
10800 }
10801}
10802{
10803 {
10804 BI opval = LTHI (tmp_tmpd, 0);
10805 CPU (h_nbit) = opval;
10806 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
10807 }
10808 {
10809 BI opval = ANDIF (EQHI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
10810 CPU (h_zbit) = opval;
10811 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
10812 }
10813SET_H_CBIT_MOVE (0);
10814SET_H_VBIT_MOVE (0);
10815{
10816 {
10817 BI opval = 0;
10818 CPU (h_xbit) = opval;
10819 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
10820 }
10821 {
10822 BI opval = 0;
10823 SET_H_INSN_PREFIXED_P (opval);
10824 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
10825 }
10826}
10827}
10828}
10829
10830#undef FLD
10831}
10832 NEXT (vpc);
10833
10834 CASE (sem, INSN_ORCDR) : /* or.d ${const32}],${Rd} */
10835{
10836 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
10837 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
10838#define FLD(f) abuf->fields.sfmt_addcdr.f
10839 int UNUSED written = 0;
10840 IADDR UNUSED pc = abuf->addr;
10841 vpc = SEM_NEXT_VPC (sem_arg, pc, 6);
10842
10843{
10844 SI tmp_tmpd;
10845 tmp_tmpd = ORSI (GET_H_GR (FLD (f_operand2)), FLD (f_indir_pc__dword));
10846 {
10847 SI opval = tmp_tmpd;
10848 SET_H_GR (FLD (f_operand2), opval);
10849 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
10850 }
10851{
10852 {
10853 BI opval = LTSI (tmp_tmpd, 0);
10854 CPU (h_nbit) = opval;
10855 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
10856 }
10857 {
10858 BI opval = ANDIF (EQSI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
10859 CPU (h_zbit) = opval;
10860 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
10861 }
10862SET_H_CBIT_MOVE (0);
10863SET_H_VBIT_MOVE (0);
10864{
10865 {
10866 BI opval = 0;
10867 CPU (h_xbit) = opval;
10868 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
10869 }
10870 {
10871 BI opval = 0;
10872 SET_H_INSN_PREFIXED_P (opval);
10873 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
10874 }
10875}
10876}
10877}
10878
10879#undef FLD
10880}
10881 NEXT (vpc);
10882
10883 CASE (sem, INSN_ORQ) : /* orq $i,$Rd */
10884{
10885 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
10886 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
10887#define FLD(f) abuf->fields.sfmt_andq.f
10888 int UNUSED written = 0;
10889 IADDR UNUSED pc = abuf->addr;
10890 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
10891
10892{
10893 SI tmp_tmpd;
10894 tmp_tmpd = ORSI (GET_H_GR (FLD (f_operand2)), FLD (f_s6));
10895 {
10896 SI opval = tmp_tmpd;
10897 SET_H_GR (FLD (f_operand2), opval);
10898 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
10899 }
10900{
10901 {
10902 BI opval = LTSI (tmp_tmpd, 0);
10903 CPU (h_nbit) = opval;
10904 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
10905 }
10906 {
10907 BI opval = ANDIF (EQSI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
10908 CPU (h_zbit) = opval;
10909 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
10910 }
10911SET_H_CBIT_MOVE (0);
10912SET_H_VBIT_MOVE (0);
10913{
10914 {
10915 BI opval = 0;
10916 CPU (h_xbit) = opval;
10917 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
10918 }
10919 {
10920 BI opval = 0;
10921 SET_H_INSN_PREFIXED_P (opval);
10922 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
10923 }
10924}
10925}
10926}
10927
10928#undef FLD
10929}
10930 NEXT (vpc);
10931
10932 CASE (sem, INSN_XOR) : /* xor $Rs,$Rd */
10933{
10934 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
10935 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
10936#define FLD(f) abuf->fields.sfmt_muls_b.f
10937 int UNUSED written = 0;
10938 IADDR UNUSED pc = abuf->addr;
10939 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
10940
10941{
10942 SI tmp_tmpd;
10943 tmp_tmpd = XORSI (GET_H_GR (FLD (f_operand2)), GET_H_GR (FLD (f_operand1)));
10944 {
10945 SI opval = tmp_tmpd;
10946 SET_H_GR (FLD (f_operand2), opval);
10947 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
10948 }
10949{
10950 {
10951 BI opval = LTSI (tmp_tmpd, 0);
10952 CPU (h_nbit) = opval;
10953 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
10954 }
10955 {
10956 BI opval = ANDIF (EQSI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
10957 CPU (h_zbit) = opval;
10958 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
10959 }
10960SET_H_CBIT_MOVE (0);
10961SET_H_VBIT_MOVE (0);
10962{
10963 {
10964 BI opval = 0;
10965 CPU (h_xbit) = opval;
10966 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
10967 }
10968 {
10969 BI opval = 0;
10970 SET_H_INSN_PREFIXED_P (opval);
10971 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
10972 }
10973}
10974}
10975}
10976
10977#undef FLD
10978}
10979 NEXT (vpc);
10980
10981 CASE (sem, INSN_SWAP) : /* swap${swapoption} ${Rs} */
10982{
10983 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
10984 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
10985#define FLD(f) abuf->fields.sfmt_move_spr_mv10.f
10986 int UNUSED written = 0;
10987 IADDR UNUSED pc = abuf->addr;
10988 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
10989
10990{
10991 SI tmp_tmps;
10992 SI tmp_tmpd;
10993 tmp_tmps = GET_H_GR (FLD (f_operand1));
10994 tmp_tmpd = ({ SI tmp_tmpcode;
10995 SI tmp_tmpval;
10996 SI tmp_tmpres;
10997 tmp_tmpcode = FLD (f_operand2);
10998; tmp_tmpval = tmp_tmps;
10999; if (EQSI (tmp_tmpcode, 0)) {
11000 tmp_tmpres = (cgen_rtx_error (current_cpu, "SWAP without swap modifier isn't implemented"), 0);
11001}
11002 else if (EQSI (tmp_tmpcode, 1)) {
11003 tmp_tmpres = ({ SI tmp_tmpr;
11004 tmp_tmpr = tmp_tmpval;
11005; ORSI (SLLSI (ANDSI (tmp_tmpr, 16843009), 7), ORSI (SLLSI (ANDSI (tmp_tmpr, 33686018), 5), ORSI (SLLSI (ANDSI (tmp_tmpr, 67372036), 3), ORSI (SLLSI (ANDSI (tmp_tmpr, 134744072), 1), ORSI (SRLSI (ANDSI (tmp_tmpr, 269488144), 1), ORSI (SRLSI (ANDSI (tmp_tmpr, 538976288), 3), ORSI (SRLSI (ANDSI (tmp_tmpr, 1077952576), 5), SRLSI (ANDSI (tmp_tmpr, 0x80808080), 7)))))))); });
11006}
11007 else if (EQSI (tmp_tmpcode, 2)) {
11008 tmp_tmpres = ({ SI tmp_tmpb;
11009 tmp_tmpb = tmp_tmpval;
11010; ORSI (ANDSI (SLLSI (tmp_tmpb, 8), 0xff00ff00), ANDSI (SRLSI (tmp_tmpb, 8), 16711935)); });
11011}
11012 else if (EQSI (tmp_tmpcode, 3)) {
11013 tmp_tmpres = ({ SI tmp_tmpr;
11014 tmp_tmpr = ({ SI tmp_tmpb;
11015 tmp_tmpb = tmp_tmpval;
11016; ORSI (ANDSI (SLLSI (tmp_tmpb, 8), 0xff00ff00), ANDSI (SRLSI (tmp_tmpb, 8), 16711935)); });
11017; ORSI (SLLSI (ANDSI (tmp_tmpr, 16843009), 7), ORSI (SLLSI (ANDSI (tmp_tmpr, 33686018), 5), ORSI (SLLSI (ANDSI (tmp_tmpr, 67372036), 3), ORSI (SLLSI (ANDSI (tmp_tmpr, 134744072), 1), ORSI (SRLSI (ANDSI (tmp_tmpr, 269488144), 1), ORSI (SRLSI (ANDSI (tmp_tmpr, 538976288), 3), ORSI (SRLSI (ANDSI (tmp_tmpr, 1077952576), 5), SRLSI (ANDSI (tmp_tmpr, 0x80808080), 7)))))))); });
11018}
11019 else if (EQSI (tmp_tmpcode, 4)) {
11020 tmp_tmpres = ({ SI tmp_tmpb;
11021 tmp_tmpb = tmp_tmpval;
11022; ORSI (ANDSI (SLLSI (tmp_tmpb, 16), 0xffff0000), ANDSI (SRLSI (tmp_tmpb, 16), 65535)); });
11023}
11024 else if (EQSI (tmp_tmpcode, 5)) {
11025 tmp_tmpres = ({ SI tmp_tmpr;
11026 tmp_tmpr = ({ SI tmp_tmpb;
11027 tmp_tmpb = tmp_tmpval;
11028; ORSI (ANDSI (SLLSI (tmp_tmpb, 16), 0xffff0000), ANDSI (SRLSI (tmp_tmpb, 16), 65535)); });
11029; ORSI (SLLSI (ANDSI (tmp_tmpr, 16843009), 7), ORSI (SLLSI (ANDSI (tmp_tmpr, 33686018), 5), ORSI (SLLSI (ANDSI (tmp_tmpr, 67372036), 3), ORSI (SLLSI (ANDSI (tmp_tmpr, 134744072), 1), ORSI (SRLSI (ANDSI (tmp_tmpr, 269488144), 1), ORSI (SRLSI (ANDSI (tmp_tmpr, 538976288), 3), ORSI (SRLSI (ANDSI (tmp_tmpr, 1077952576), 5), SRLSI (ANDSI (tmp_tmpr, 0x80808080), 7)))))))); });
11030}
11031 else if (EQSI (tmp_tmpcode, 6)) {
11032 tmp_tmpres = ({ SI tmp_tmpb;
11033 tmp_tmpb = ({ SI tmp_tmpb;
11034 tmp_tmpb = tmp_tmpval;
11035; ORSI (ANDSI (SLLSI (tmp_tmpb, 16), 0xffff0000), ANDSI (SRLSI (tmp_tmpb, 16), 65535)); });
11036; ORSI (ANDSI (SLLSI (tmp_tmpb, 8), 0xff00ff00), ANDSI (SRLSI (tmp_tmpb, 8), 16711935)); });
11037}
11038 else if (EQSI (tmp_tmpcode, 7)) {
11039 tmp_tmpres = ({ SI tmp_tmpr;
11040 tmp_tmpr = ({ SI tmp_tmpb;
11041 tmp_tmpb = ({ SI tmp_tmpb;
11042 tmp_tmpb = tmp_tmpval;
11043; ORSI (ANDSI (SLLSI (tmp_tmpb, 16), 0xffff0000), ANDSI (SRLSI (tmp_tmpb, 16), 65535)); });
11044; ORSI (ANDSI (SLLSI (tmp_tmpb, 8), 0xff00ff00), ANDSI (SRLSI (tmp_tmpb, 8), 16711935)); });
11045; ORSI (SLLSI (ANDSI (tmp_tmpr, 16843009), 7), ORSI (SLLSI (ANDSI (tmp_tmpr, 33686018), 5), ORSI (SLLSI (ANDSI (tmp_tmpr, 67372036), 3), ORSI (SLLSI (ANDSI (tmp_tmpr, 134744072), 1), ORSI (SRLSI (ANDSI (tmp_tmpr, 269488144), 1), ORSI (SRLSI (ANDSI (tmp_tmpr, 538976288), 3), ORSI (SRLSI (ANDSI (tmp_tmpr, 1077952576), 5), SRLSI (ANDSI (tmp_tmpr, 0x80808080), 7)))))))); });
11046}
11047 else if (EQSI (tmp_tmpcode, 8)) {
11048 tmp_tmpres = INVSI (tmp_tmpval);
11049}
11050 else if (EQSI (tmp_tmpcode, 9)) {
11051 tmp_tmpres = ({ SI tmp_tmpr;
11052 tmp_tmpr = INVSI (tmp_tmpval);
11053; ORSI (SLLSI (ANDSI (tmp_tmpr, 16843009), 7), ORSI (SLLSI (ANDSI (tmp_tmpr, 33686018), 5), ORSI (SLLSI (ANDSI (tmp_tmpr, 67372036), 3), ORSI (SLLSI (ANDSI (tmp_tmpr, 134744072), 1), ORSI (SRLSI (ANDSI (tmp_tmpr, 269488144), 1), ORSI (SRLSI (ANDSI (tmp_tmpr, 538976288), 3), ORSI (SRLSI (ANDSI (tmp_tmpr, 1077952576), 5), SRLSI (ANDSI (tmp_tmpr, 0x80808080), 7)))))))); });
11054}
11055 else if (EQSI (tmp_tmpcode, 10)) {
11056 tmp_tmpres = ({ SI tmp_tmpb;
11057 tmp_tmpb = INVSI (tmp_tmpval);
11058; ORSI (ANDSI (SLLSI (tmp_tmpb, 8), 0xff00ff00), ANDSI (SRLSI (tmp_tmpb, 8), 16711935)); });
11059}
11060 else if (EQSI (tmp_tmpcode, 11)) {
11061 tmp_tmpres = ({ SI tmp_tmpr;
11062 tmp_tmpr = ({ SI tmp_tmpb;
11063 tmp_tmpb = INVSI (tmp_tmpval);
11064; ORSI (ANDSI (SLLSI (tmp_tmpb, 8), 0xff00ff00), ANDSI (SRLSI (tmp_tmpb, 8), 16711935)); });
11065; ORSI (SLLSI (ANDSI (tmp_tmpr, 16843009), 7), ORSI (SLLSI (ANDSI (tmp_tmpr, 33686018), 5), ORSI (SLLSI (ANDSI (tmp_tmpr, 67372036), 3), ORSI (SLLSI (ANDSI (tmp_tmpr, 134744072), 1), ORSI (SRLSI (ANDSI (tmp_tmpr, 269488144), 1), ORSI (SRLSI (ANDSI (tmp_tmpr, 538976288), 3), ORSI (SRLSI (ANDSI (tmp_tmpr, 1077952576), 5), SRLSI (ANDSI (tmp_tmpr, 0x80808080), 7)))))))); });
11066}
11067 else if (EQSI (tmp_tmpcode, 12)) {
11068 tmp_tmpres = ({ SI tmp_tmpb;
11069 tmp_tmpb = INVSI (tmp_tmpval);
11070; ORSI (ANDSI (SLLSI (tmp_tmpb, 16), 0xffff0000), ANDSI (SRLSI (tmp_tmpb, 16), 65535)); });
11071}
11072 else if (EQSI (tmp_tmpcode, 13)) {
11073 tmp_tmpres = ({ SI tmp_tmpr;
11074 tmp_tmpr = ({ SI tmp_tmpb;
11075 tmp_tmpb = INVSI (tmp_tmpval);
11076; ORSI (ANDSI (SLLSI (tmp_tmpb, 16), 0xffff0000), ANDSI (SRLSI (tmp_tmpb, 16), 65535)); });
11077; ORSI (SLLSI (ANDSI (tmp_tmpr, 16843009), 7), ORSI (SLLSI (ANDSI (tmp_tmpr, 33686018), 5), ORSI (SLLSI (ANDSI (tmp_tmpr, 67372036), 3), ORSI (SLLSI (ANDSI (tmp_tmpr, 134744072), 1), ORSI (SRLSI (ANDSI (tmp_tmpr, 269488144), 1), ORSI (SRLSI (ANDSI (tmp_tmpr, 538976288), 3), ORSI (SRLSI (ANDSI (tmp_tmpr, 1077952576), 5), SRLSI (ANDSI (tmp_tmpr, 0x80808080), 7)))))))); });
11078}
11079 else if (EQSI (tmp_tmpcode, 14)) {
11080 tmp_tmpres = ({ SI tmp_tmpb;
11081 tmp_tmpb = ({ SI tmp_tmpb;
11082 tmp_tmpb = INVSI (tmp_tmpval);
11083; ORSI (ANDSI (SLLSI (tmp_tmpb, 16), 0xffff0000), ANDSI (SRLSI (tmp_tmpb, 16), 65535)); });
11084; ORSI (ANDSI (SLLSI (tmp_tmpb, 8), 0xff00ff00), ANDSI (SRLSI (tmp_tmpb, 8), 16711935)); });
11085}
11086 else if (EQSI (tmp_tmpcode, 15)) {
11087 tmp_tmpres = ({ SI tmp_tmpr;
11088 tmp_tmpr = ({ SI tmp_tmpb;
11089 tmp_tmpb = ({ SI tmp_tmpb;
11090 tmp_tmpb = INVSI (tmp_tmpval);
11091; ORSI (ANDSI (SLLSI (tmp_tmpb, 16), 0xffff0000), ANDSI (SRLSI (tmp_tmpb, 16), 65535)); });
11092; ORSI (ANDSI (SLLSI (tmp_tmpb, 8), 0xff00ff00), ANDSI (SRLSI (tmp_tmpb, 8), 16711935)); });
11093; ORSI (SLLSI (ANDSI (tmp_tmpr, 16843009), 7), ORSI (SLLSI (ANDSI (tmp_tmpr, 33686018), 5), ORSI (SLLSI (ANDSI (tmp_tmpr, 67372036), 3), ORSI (SLLSI (ANDSI (tmp_tmpr, 134744072), 1), ORSI (SRLSI (ANDSI (tmp_tmpr, 269488144), 1), ORSI (SRLSI (ANDSI (tmp_tmpr, 538976288), 3), ORSI (SRLSI (ANDSI (tmp_tmpr, 1077952576), 5), SRLSI (ANDSI (tmp_tmpr, 0x80808080), 7)))))))); });
11094}
11095; tmp_tmpres; });
11096 {
11097 SI opval = tmp_tmpd;
11098 SET_H_GR (FLD (f_operand1), opval);
11099 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
11100 }
11101{
11102 {
11103 BI opval = LTSI (tmp_tmpd, 0);
11104 CPU (h_nbit) = opval;
11105 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
11106 }
11107 {
11108 BI opval = ANDIF (EQSI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
11109 CPU (h_zbit) = opval;
11110 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
11111 }
11112SET_H_CBIT_MOVE (0);
11113SET_H_VBIT_MOVE (0);
11114{
11115 {
11116 BI opval = 0;
11117 CPU (h_xbit) = opval;
11118 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
11119 }
11120 {
11121 BI opval = 0;
11122 SET_H_INSN_PREFIXED_P (opval);
11123 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
11124 }
11125}
11126}
11127}
11128
11129#undef FLD
11130}
11131 NEXT (vpc);
11132
11133 CASE (sem, INSN_ASRR_B_R) : /* asrr.b $Rs,$Rd */
11134{
11135 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
11136 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
11137#define FLD(f) abuf->fields.sfmt_add_b_r.f
11138 int UNUSED written = 0;
11139 IADDR UNUSED pc = abuf->addr;
11140 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
11141
11142{
11143 QI tmp_tmpd;
11144 SI tmp_cnt1;
11145 SI tmp_cnt2;
11146 tmp_cnt1 = GET_H_GR (FLD (f_operand1));
11147 tmp_cnt2 = ((NESI (ANDSI (tmp_cnt1, 32), 0)) ? (31) : (ANDSI (tmp_cnt1, 31)));
11148 tmp_tmpd = SRASI (EXTQISI (TRUNCSIQI (GET_H_GR (FLD (f_operand2)))), tmp_cnt2);
11149{
11150 SI tmp_oldregval;
11151 tmp_oldregval = GET_H_RAW_GR_PC (FLD (f_operand2));
11152 {
11153 SI opval = ORSI (ANDSI (tmp_tmpd, 255), ANDSI (tmp_oldregval, 0xffffff00));
11154 SET_H_GR (FLD (f_operand2), opval);
11155 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
11156 }
11157}
11158{
11159 {
11160 BI opval = LTQI (tmp_tmpd, 0);
11161 CPU (h_nbit) = opval;
11162 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
11163 }
11164 {
11165 BI opval = ANDIF (EQQI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
11166 CPU (h_zbit) = opval;
11167 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
11168 }
11169SET_H_CBIT_MOVE (0);
11170SET_H_VBIT_MOVE (0);
11171{
11172 {
11173 BI opval = 0;
11174 CPU (h_xbit) = opval;
11175 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
11176 }
11177 {
11178 BI opval = 0;
11179 SET_H_INSN_PREFIXED_P (opval);
11180 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
11181 }
11182}
11183}
11184}
11185
11186#undef FLD
11187}
11188 NEXT (vpc);
11189
11190 CASE (sem, INSN_ASRR_W_R) : /* asrr.w $Rs,$Rd */
11191{
11192 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
11193 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
11194#define FLD(f) abuf->fields.sfmt_add_b_r.f
11195 int UNUSED written = 0;
11196 IADDR UNUSED pc = abuf->addr;
11197 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
11198
11199{
11200 HI tmp_tmpd;
11201 SI tmp_cnt1;
11202 SI tmp_cnt2;
11203 tmp_cnt1 = GET_H_GR (FLD (f_operand1));
11204 tmp_cnt2 = ((NESI (ANDSI (tmp_cnt1, 32), 0)) ? (31) : (ANDSI (tmp_cnt1, 31)));
11205 tmp_tmpd = SRASI (EXTHISI (TRUNCSIHI (GET_H_GR (FLD (f_operand2)))), tmp_cnt2);
11206{
11207 SI tmp_oldregval;
11208 tmp_oldregval = GET_H_RAW_GR_PC (FLD (f_operand2));
11209 {
11210 SI opval = ORSI (ANDSI (tmp_tmpd, 65535), ANDSI (tmp_oldregval, 0xffff0000));
11211 SET_H_GR (FLD (f_operand2), opval);
11212 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
11213 }
11214}
11215{
11216 {
11217 BI opval = LTHI (tmp_tmpd, 0);
11218 CPU (h_nbit) = opval;
11219 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
11220 }
11221 {
11222 BI opval = ANDIF (EQHI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
11223 CPU (h_zbit) = opval;
11224 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
11225 }
11226SET_H_CBIT_MOVE (0);
11227SET_H_VBIT_MOVE (0);
11228{
11229 {
11230 BI opval = 0;
11231 CPU (h_xbit) = opval;
11232 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
11233 }
11234 {
11235 BI opval = 0;
11236 SET_H_INSN_PREFIXED_P (opval);
11237 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
11238 }
11239}
11240}
11241}
11242
11243#undef FLD
11244}
11245 NEXT (vpc);
11246
11247 CASE (sem, INSN_ASRR_D_R) : /* asrr.d $Rs,$Rd */
11248{
11249 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
11250 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
11251#define FLD(f) abuf->fields.sfmt_add_b_r.f
11252 int UNUSED written = 0;
11253 IADDR UNUSED pc = abuf->addr;
11254 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
11255
11256{
11257 SI tmp_tmpd;
11258 SI tmp_cnt1;
11259 SI tmp_cnt2;
11260 tmp_cnt1 = GET_H_GR (FLD (f_operand1));
11261 tmp_cnt2 = ((NESI (ANDSI (tmp_cnt1, 32), 0)) ? (31) : (ANDSI (tmp_cnt1, 31)));
11262 tmp_tmpd = SRASI (EXTSISI (TRUNCSISI (GET_H_GR (FLD (f_operand2)))), tmp_cnt2);
11263 {
11264 SI opval = tmp_tmpd;
11265 SET_H_GR (FLD (f_operand2), opval);
11266 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
11267 }
11268{
11269 {
11270 BI opval = LTSI (tmp_tmpd, 0);
11271 CPU (h_nbit) = opval;
11272 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
11273 }
11274 {
11275 BI opval = ANDIF (EQSI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
11276 CPU (h_zbit) = opval;
11277 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
11278 }
11279SET_H_CBIT_MOVE (0);
11280SET_H_VBIT_MOVE (0);
11281{
11282 {
11283 BI opval = 0;
11284 CPU (h_xbit) = opval;
11285 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
11286 }
11287 {
11288 BI opval = 0;
11289 SET_H_INSN_PREFIXED_P (opval);
11290 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
11291 }
11292}
11293}
11294}
11295
11296#undef FLD
11297}
11298 NEXT (vpc);
11299
11300 CASE (sem, INSN_ASRQ) : /* asrq $c,${Rd} */
11301{
11302 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
11303 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
11304#define FLD(f) abuf->fields.sfmt_asrq.f
11305 int UNUSED written = 0;
11306 IADDR UNUSED pc = abuf->addr;
11307 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
11308
11309{
11310 SI tmp_tmpd;
11311 tmp_tmpd = SRASI (GET_H_GR (FLD (f_operand2)), FLD (f_u5));
11312 {
11313 SI opval = tmp_tmpd;
11314 SET_H_GR (FLD (f_operand2), opval);
11315 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
11316 }
11317{
11318 {
11319 BI opval = LTSI (tmp_tmpd, 0);
11320 CPU (h_nbit) = opval;
11321 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
11322 }
11323 {
11324 BI opval = ANDIF (EQSI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
11325 CPU (h_zbit) = opval;
11326 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
11327 }
11328SET_H_CBIT_MOVE (0);
11329SET_H_VBIT_MOVE (0);
11330{
11331 {
11332 BI opval = 0;
11333 CPU (h_xbit) = opval;
11334 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
11335 }
11336 {
11337 BI opval = 0;
11338 SET_H_INSN_PREFIXED_P (opval);
11339 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
11340 }
11341}
11342}
11343}
11344
11345#undef FLD
11346}
11347 NEXT (vpc);
11348
11349 CASE (sem, INSN_LSRR_B_R) : /* lsrr.b $Rs,$Rd */
11350{
11351 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
11352 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
11353#define FLD(f) abuf->fields.sfmt_add_b_r.f
11354 int UNUSED written = 0;
11355 IADDR UNUSED pc = abuf->addr;
11356 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
11357
11358{
11359 SI tmp_tmpd;
11360 SI tmp_cnt;
11361 tmp_cnt = ANDSI (GET_H_GR (FLD (f_operand1)), 63);
11362 tmp_tmpd = ((NESI (ANDSI (tmp_cnt, 32), 0)) ? (0) : (SRLSI (ZEXTQISI (TRUNCSIQI (GET_H_GR (FLD (f_operand2)))), ANDSI (tmp_cnt, 31))));
11363{
11364 SI tmp_oldregval;
11365 tmp_oldregval = GET_H_RAW_GR_PC (FLD (f_operand2));
11366 {
11367 SI opval = ORSI (ANDSI (tmp_tmpd, 255), ANDSI (tmp_oldregval, 0xffffff00));
11368 SET_H_GR (FLD (f_operand2), opval);
11369 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
11370 }
11371}
11372{
11373 {
11374 BI opval = LTQI (tmp_tmpd, 0);
11375 CPU (h_nbit) = opval;
11376 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
11377 }
11378 {
11379 BI opval = ANDIF (EQQI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
11380 CPU (h_zbit) = opval;
11381 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
11382 }
11383SET_H_CBIT_MOVE (0);
11384SET_H_VBIT_MOVE (0);
11385{
11386 {
11387 BI opval = 0;
11388 CPU (h_xbit) = opval;
11389 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
11390 }
11391 {
11392 BI opval = 0;
11393 SET_H_INSN_PREFIXED_P (opval);
11394 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
11395 }
11396}
11397}
11398}
11399
11400#undef FLD
11401}
11402 NEXT (vpc);
11403
11404 CASE (sem, INSN_LSRR_W_R) : /* lsrr.w $Rs,$Rd */
11405{
11406 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
11407 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
11408#define FLD(f) abuf->fields.sfmt_add_b_r.f
11409 int UNUSED written = 0;
11410 IADDR UNUSED pc = abuf->addr;
11411 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
11412
11413{
11414 SI tmp_tmpd;
11415 SI tmp_cnt;
11416 tmp_cnt = ANDSI (GET_H_GR (FLD (f_operand1)), 63);
11417 tmp_tmpd = ((NESI (ANDSI (tmp_cnt, 32), 0)) ? (0) : (SRLSI (ZEXTHISI (TRUNCSIHI (GET_H_GR (FLD (f_operand2)))), ANDSI (tmp_cnt, 31))));
11418{
11419 SI tmp_oldregval;
11420 tmp_oldregval = GET_H_RAW_GR_PC (FLD (f_operand2));
11421 {
11422 SI opval = ORSI (ANDSI (tmp_tmpd, 65535), ANDSI (tmp_oldregval, 0xffff0000));
11423 SET_H_GR (FLD (f_operand2), opval);
11424 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
11425 }
11426}
11427{
11428 {
11429 BI opval = LTHI (tmp_tmpd, 0);
11430 CPU (h_nbit) = opval;
11431 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
11432 }
11433 {
11434 BI opval = ANDIF (EQHI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
11435 CPU (h_zbit) = opval;
11436 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
11437 }
11438SET_H_CBIT_MOVE (0);
11439SET_H_VBIT_MOVE (0);
11440{
11441 {
11442 BI opval = 0;
11443 CPU (h_xbit) = opval;
11444 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
11445 }
11446 {
11447 BI opval = 0;
11448 SET_H_INSN_PREFIXED_P (opval);
11449 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
11450 }
11451}
11452}
11453}
11454
11455#undef FLD
11456}
11457 NEXT (vpc);
11458
11459 CASE (sem, INSN_LSRR_D_R) : /* lsrr.d $Rs,$Rd */
11460{
11461 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
11462 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
11463#define FLD(f) abuf->fields.sfmt_add_b_r.f
11464 int UNUSED written = 0;
11465 IADDR UNUSED pc = abuf->addr;
11466 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
11467
11468{
11469 SI tmp_tmpd;
11470 SI tmp_cnt;
11471 tmp_cnt = ANDSI (GET_H_GR (FLD (f_operand1)), 63);
11472 tmp_tmpd = ((NESI (ANDSI (tmp_cnt, 32), 0)) ? (0) : (SRLSI (ZEXTSISI (TRUNCSISI (GET_H_GR (FLD (f_operand2)))), ANDSI (tmp_cnt, 31))));
11473 {
11474 SI opval = tmp_tmpd;
11475 SET_H_GR (FLD (f_operand2), opval);
11476 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
11477 }
11478{
11479 {
11480 BI opval = LTSI (tmp_tmpd, 0);
11481 CPU (h_nbit) = opval;
11482 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
11483 }
11484 {
11485 BI opval = ANDIF (EQSI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
11486 CPU (h_zbit) = opval;
11487 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
11488 }
11489SET_H_CBIT_MOVE (0);
11490SET_H_VBIT_MOVE (0);
11491{
11492 {
11493 BI opval = 0;
11494 CPU (h_xbit) = opval;
11495 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
11496 }
11497 {
11498 BI opval = 0;
11499 SET_H_INSN_PREFIXED_P (opval);
11500 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
11501 }
11502}
11503}
11504}
11505
11506#undef FLD
11507}
11508 NEXT (vpc);
11509
11510 CASE (sem, INSN_LSRQ) : /* lsrq $c,${Rd} */
11511{
11512 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
11513 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
11514#define FLD(f) abuf->fields.sfmt_asrq.f
11515 int UNUSED written = 0;
11516 IADDR UNUSED pc = abuf->addr;
11517 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
11518
11519{
11520 SI tmp_tmpd;
11521 tmp_tmpd = SRLSI (GET_H_GR (FLD (f_operand2)), FLD (f_u5));
11522 {
11523 SI opval = tmp_tmpd;
11524 SET_H_GR (FLD (f_operand2), opval);
11525 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
11526 }
11527{
11528 {
11529 BI opval = LTSI (tmp_tmpd, 0);
11530 CPU (h_nbit) = opval;
11531 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
11532 }
11533 {
11534 BI opval = ANDIF (EQSI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
11535 CPU (h_zbit) = opval;
11536 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
11537 }
11538SET_H_CBIT_MOVE (0);
11539SET_H_VBIT_MOVE (0);
11540{
11541 {
11542 BI opval = 0;
11543 CPU (h_xbit) = opval;
11544 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
11545 }
11546 {
11547 BI opval = 0;
11548 SET_H_INSN_PREFIXED_P (opval);
11549 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
11550 }
11551}
11552}
11553}
11554
11555#undef FLD
11556}
11557 NEXT (vpc);
11558
11559 CASE (sem, INSN_LSLR_B_R) : /* lslr.b $Rs,$Rd */
11560{
11561 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
11562 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
11563#define FLD(f) abuf->fields.sfmt_add_b_r.f
11564 int UNUSED written = 0;
11565 IADDR UNUSED pc = abuf->addr;
11566 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
11567
11568{
11569 SI tmp_tmpd;
11570 SI tmp_cnt;
11571 tmp_cnt = ANDSI (GET_H_GR (FLD (f_operand1)), 63);
11572 tmp_tmpd = ((NESI (ANDSI (tmp_cnt, 32), 0)) ? (0) : (SLLSI (ZEXTQISI (TRUNCSIQI (GET_H_GR (FLD (f_operand2)))), ANDSI (tmp_cnt, 31))));
11573{
11574 SI tmp_oldregval;
11575 tmp_oldregval = GET_H_RAW_GR_PC (FLD (f_operand2));
11576 {
11577 SI opval = ORSI (ANDSI (tmp_tmpd, 255), ANDSI (tmp_oldregval, 0xffffff00));
11578 SET_H_GR (FLD (f_operand2), opval);
11579 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
11580 }
11581}
11582{
11583 {
11584 BI opval = LTQI (tmp_tmpd, 0);
11585 CPU (h_nbit) = opval;
11586 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
11587 }
11588 {
11589 BI opval = ANDIF (EQQI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
11590 CPU (h_zbit) = opval;
11591 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
11592 }
11593SET_H_CBIT_MOVE (0);
11594SET_H_VBIT_MOVE (0);
11595{
11596 {
11597 BI opval = 0;
11598 CPU (h_xbit) = opval;
11599 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
11600 }
11601 {
11602 BI opval = 0;
11603 SET_H_INSN_PREFIXED_P (opval);
11604 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
11605 }
11606}
11607}
11608}
11609
11610#undef FLD
11611}
11612 NEXT (vpc);
11613
11614 CASE (sem, INSN_LSLR_W_R) : /* lslr.w $Rs,$Rd */
11615{
11616 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
11617 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
11618#define FLD(f) abuf->fields.sfmt_add_b_r.f
11619 int UNUSED written = 0;
11620 IADDR UNUSED pc = abuf->addr;
11621 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
11622
11623{
11624 SI tmp_tmpd;
11625 SI tmp_cnt;
11626 tmp_cnt = ANDSI (GET_H_GR (FLD (f_operand1)), 63);
11627 tmp_tmpd = ((NESI (ANDSI (tmp_cnt, 32), 0)) ? (0) : (SLLSI (ZEXTHISI (TRUNCSIHI (GET_H_GR (FLD (f_operand2)))), ANDSI (tmp_cnt, 31))));
11628{
11629 SI tmp_oldregval;
11630 tmp_oldregval = GET_H_RAW_GR_PC (FLD (f_operand2));
11631 {
11632 SI opval = ORSI (ANDSI (tmp_tmpd, 65535), ANDSI (tmp_oldregval, 0xffff0000));
11633 SET_H_GR (FLD (f_operand2), opval);
11634 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
11635 }
11636}
11637{
11638 {
11639 BI opval = LTHI (tmp_tmpd, 0);
11640 CPU (h_nbit) = opval;
11641 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
11642 }
11643 {
11644 BI opval = ANDIF (EQHI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
11645 CPU (h_zbit) = opval;
11646 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
11647 }
11648SET_H_CBIT_MOVE (0);
11649SET_H_VBIT_MOVE (0);
11650{
11651 {
11652 BI opval = 0;
11653 CPU (h_xbit) = opval;
11654 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
11655 }
11656 {
11657 BI opval = 0;
11658 SET_H_INSN_PREFIXED_P (opval);
11659 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
11660 }
11661}
11662}
11663}
11664
11665#undef FLD
11666}
11667 NEXT (vpc);
11668
11669 CASE (sem, INSN_LSLR_D_R) : /* lslr.d $Rs,$Rd */
11670{
11671 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
11672 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
11673#define FLD(f) abuf->fields.sfmt_add_b_r.f
11674 int UNUSED written = 0;
11675 IADDR UNUSED pc = abuf->addr;
11676 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
11677
11678{
11679 SI tmp_tmpd;
11680 SI tmp_cnt;
11681 tmp_cnt = ANDSI (GET_H_GR (FLD (f_operand1)), 63);
11682 tmp_tmpd = ((NESI (ANDSI (tmp_cnt, 32), 0)) ? (0) : (SLLSI (ZEXTSISI (TRUNCSISI (GET_H_GR (FLD (f_operand2)))), ANDSI (tmp_cnt, 31))));
11683 {
11684 SI opval = tmp_tmpd;
11685 SET_H_GR (FLD (f_operand2), opval);
11686 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
11687 }
11688{
11689 {
11690 BI opval = LTSI (tmp_tmpd, 0);
11691 CPU (h_nbit) = opval;
11692 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
11693 }
11694 {
11695 BI opval = ANDIF (EQSI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
11696 CPU (h_zbit) = opval;
11697 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
11698 }
11699SET_H_CBIT_MOVE (0);
11700SET_H_VBIT_MOVE (0);
11701{
11702 {
11703 BI opval = 0;
11704 CPU (h_xbit) = opval;
11705 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
11706 }
11707 {
11708 BI opval = 0;
11709 SET_H_INSN_PREFIXED_P (opval);
11710 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
11711 }
11712}
11713}
11714}
11715
11716#undef FLD
11717}
11718 NEXT (vpc);
11719
11720 CASE (sem, INSN_LSLQ) : /* lslq $c,${Rd} */
11721{
11722 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
11723 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
11724#define FLD(f) abuf->fields.sfmt_asrq.f
11725 int UNUSED written = 0;
11726 IADDR UNUSED pc = abuf->addr;
11727 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
11728
11729{
11730 SI tmp_tmpd;
11731 tmp_tmpd = SLLSI (GET_H_GR (FLD (f_operand2)), FLD (f_u5));
11732 {
11733 SI opval = tmp_tmpd;
11734 SET_H_GR (FLD (f_operand2), opval);
11735 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
11736 }
11737{
11738 {
11739 BI opval = LTSI (tmp_tmpd, 0);
11740 CPU (h_nbit) = opval;
11741 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
11742 }
11743 {
11744 BI opval = ANDIF (EQSI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
11745 CPU (h_zbit) = opval;
11746 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
11747 }
11748SET_H_CBIT_MOVE (0);
11749SET_H_VBIT_MOVE (0);
11750{
11751 {
11752 BI opval = 0;
11753 CPU (h_xbit) = opval;
11754 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
11755 }
11756 {
11757 BI opval = 0;
11758 SET_H_INSN_PREFIXED_P (opval);
11759 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
11760 }
11761}
11762}
11763}
11764
11765#undef FLD
11766}
11767 NEXT (vpc);
11768
11769 CASE (sem, INSN_BTST) : /* $Rs,$Rd */
11770{
11771 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
11772 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
11773#define FLD(f) abuf->fields.sfmt_add_b_r.f
11774 int UNUSED written = 0;
11775 IADDR UNUSED pc = abuf->addr;
11776 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
11777
11778{
11779 SI tmp_tmpd;
11780 SI tmp_cnt;
11781 tmp_tmpd = SLLSI (GET_H_GR (FLD (f_operand2)), SUBSI (31, ANDSI (GET_H_GR (FLD (f_operand1)), 31)));
11782{
11783 {
11784 BI opval = LTSI (tmp_tmpd, 0);
11785 CPU (h_nbit) = opval;
11786 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
11787 }
11788 {
11789 BI opval = ANDIF (EQSI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
11790 CPU (h_zbit) = opval;
11791 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
11792 }
11793SET_H_CBIT_MOVE (0);
11794SET_H_VBIT_MOVE (0);
11795{
11796 {
11797 BI opval = 0;
11798 CPU (h_xbit) = opval;
11799 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
11800 }
11801 {
11802 BI opval = 0;
11803 SET_H_INSN_PREFIXED_P (opval);
11804 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
11805 }
11806}
11807}
11808}
11809
11810#undef FLD
11811}
11812 NEXT (vpc);
11813
11814 CASE (sem, INSN_BTSTQ) : /* btstq $c,${Rd} */
11815{
11816 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
11817 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
11818#define FLD(f) abuf->fields.sfmt_asrq.f
11819 int UNUSED written = 0;
11820 IADDR UNUSED pc = abuf->addr;
11821 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
11822
11823{
11824 SI tmp_tmpd;
11825 tmp_tmpd = SLLSI (GET_H_GR (FLD (f_operand2)), SUBSI (31, FLD (f_u5)));
11826{
11827 {
11828 BI opval = LTSI (tmp_tmpd, 0);
11829 CPU (h_nbit) = opval;
11830 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
11831 }
11832 {
11833 BI opval = ANDIF (EQSI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
11834 CPU (h_zbit) = opval;
11835 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
11836 }
11837SET_H_CBIT_MOVE (0);
11838SET_H_VBIT_MOVE (0);
11839{
11840 {
11841 BI opval = 0;
11842 CPU (h_xbit) = opval;
11843 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
11844 }
11845 {
11846 BI opval = 0;
11847 SET_H_INSN_PREFIXED_P (opval);
11848 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
11849 }
11850}
11851}
11852}
11853
11854#undef FLD
11855}
11856 NEXT (vpc);
11857
11858 CASE (sem, INSN_SETF) : /* setf ${list-of-flags} */
11859{
11860 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
11861 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
11862#define FLD(f) abuf->fields.sfmt_setf.f
11863 int UNUSED written = 0;
11864 IADDR UNUSED pc = abuf->addr;
11865 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
11866
11867{
11868 SI tmp_tmp;
11869 tmp_tmp = FLD (f_dstsrc);
11870if (NESI (ANDSI (tmp_tmp, SLLSI (1, 0)), 0)) {
11871 {
11872 BI opval = 1;
11873 CPU (h_cbit) = opval;
11874 written |= (1 << 1);
11875 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
11876 }
11877}
11878if (NESI (ANDSI (tmp_tmp, SLLSI (1, 1)), 0)) {
11879 {
11880 BI opval = 1;
11881 CPU (h_vbit) = opval;
11882 written |= (1 << 7);
11883 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
11884 }
11885}
11886if (NESI (ANDSI (tmp_tmp, SLLSI (1, 2)), 0)) {
11887 {
11888 BI opval = 1;
11889 CPU (h_zbit) = opval;
11890 written |= (1 << 9);
11891 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
11892 }
11893}
11894if (NESI (ANDSI (tmp_tmp, SLLSI (1, 3)), 0)) {
11895 {
11896 BI opval = 1;
11897 CPU (h_nbit) = opval;
11898 written |= (1 << 3);
11899 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
11900 }
11901}
11902if (NESI (ANDSI (tmp_tmp, SLLSI (1, 4)), 0)) {
11903 {
11904 BI opval = 1;
11905 CPU (h_xbit) = opval;
11906 written |= (1 << 8);
11907 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
11908 }
11909}
11910if (NESI (ANDSI (tmp_tmp, SLLSI (1, 5)), 0)) {
11911 {
11912 BI opval = 1;
11913 SET_H_IBIT (opval);
11914 written |= (1 << 2);
11915 TRACE_RESULT (current_cpu, abuf, "ibit", 'x', opval);
11916 }
11917}
11918if (NESI (ANDSI (tmp_tmp, SLLSI (1, 6)), 0)) {
11919 {
11920 BI opval = 1;
11921 SET_H_UBIT (opval);
11922 written |= (1 << 6);
11923 TRACE_RESULT (current_cpu, abuf, "ubit", 'x', opval);
11924 }
11925}
11926if (NESI (ANDSI (tmp_tmp, SLLSI (1, 7)), 0)) {
11927 {
11928 BI opval = 1;
11929 CPU (h_pbit) = opval;
11930 written |= (1 << 4);
11931 TRACE_RESULT (current_cpu, abuf, "pbit", 'x', opval);
11932 }
11933}
11934 {
11935 BI opval = 0;
11936 SET_H_INSN_PREFIXED_P (opval);
11937 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
11938 }
11939if (EQSI (ANDSI (tmp_tmp, SLLSI (1, 4)), 0)) {
11940 {
11941 BI opval = 0;
11942 CPU (h_xbit) = opval;
11943 written |= (1 << 8);
11944 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
11945 }
11946}
11947}
11948
11949 abuf->written = written;
11950#undef FLD
11951}
11952 NEXT (vpc);
11953
11954 CASE (sem, INSN_CLEARF) : /* clearf ${list-of-flags} */
11955{
11956 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
11957 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
11958#define FLD(f) abuf->fields.sfmt_setf.f
11959 int UNUSED written = 0;
11960 IADDR UNUSED pc = abuf->addr;
11961 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
11962
11963{
11964 SI tmp_tmp;
11965 tmp_tmp = FLD (f_dstsrc);
11966if (NESI (ANDSI (tmp_tmp, SLLSI (1, 0)), 0)) {
11967 {
11968 BI opval = 0;
11969 CPU (h_cbit) = opval;
11970 written |= (1 << 1);
11971 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
11972 }
11973}
11974if (NESI (ANDSI (tmp_tmp, SLLSI (1, 1)), 0)) {
11975 {
11976 BI opval = 0;
11977 CPU (h_vbit) = opval;
11978 written |= (1 << 7);
11979 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
11980 }
11981}
11982if (NESI (ANDSI (tmp_tmp, SLLSI (1, 2)), 0)) {
11983 {
11984 BI opval = 0;
11985 CPU (h_zbit) = opval;
11986 written |= (1 << 9);
11987 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
11988 }
11989}
11990if (NESI (ANDSI (tmp_tmp, SLLSI (1, 3)), 0)) {
11991 {
11992 BI opval = 0;
11993 CPU (h_nbit) = opval;
11994 written |= (1 << 3);
11995 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
11996 }
11997}
11998if (NESI (ANDSI (tmp_tmp, SLLSI (1, 4)), 0)) {
11999 {
12000 BI opval = 0;
12001 CPU (h_xbit) = opval;
12002 written |= (1 << 8);
12003 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
12004 }
12005}
12006if (NESI (ANDSI (tmp_tmp, SLLSI (1, 5)), 0)) {
12007 {
12008 BI opval = 0;
12009 SET_H_IBIT (opval);
12010 written |= (1 << 2);
12011 TRACE_RESULT (current_cpu, abuf, "ibit", 'x', opval);
12012 }
12013}
12014if (NESI (ANDSI (tmp_tmp, SLLSI (1, 6)), 0)) {
12015 {
12016 BI opval = 0;
12017 SET_H_UBIT (opval);
12018 written |= (1 << 6);
12019 TRACE_RESULT (current_cpu, abuf, "ubit", 'x', opval);
12020 }
12021}
12022if (NESI (ANDSI (tmp_tmp, SLLSI (1, 7)), 0)) {
12023 {
12024 BI opval = 0;
12025 CPU (h_pbit) = opval;
12026 written |= (1 << 4);
12027 TRACE_RESULT (current_cpu, abuf, "pbit", 'x', opval);
12028 }
12029}
12030{
12031 {
12032 BI opval = 0;
12033 CPU (h_xbit) = opval;
12034 written |= (1 << 8);
12035 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
12036 }
12037 {
12038 BI opval = 0;
12039 SET_H_INSN_PREFIXED_P (opval);
12040 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
12041 }
12042}
12043}
12044
12045 abuf->written = written;
12046#undef FLD
12047}
12048 NEXT (vpc);
12049
12050 CASE (sem, INSN_BCC_B) : /* b${cc} ${o-pcrel} */
12051{
12052 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
12053 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
12054#define FLD(f) abuf->fields.sfmt_bcc_b.f
12055 int UNUSED written = 0;
12056 IADDR UNUSED pc = abuf->addr;
12057 SEM_BRANCH_INIT
12058 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
12059
12060{
12061 BI tmp_truthval;
12062 tmp_truthval = ({ SI tmp_tmpcond;
12063 BI tmp_condres;
12064 tmp_tmpcond = FLD (f_operand2);
12065; if (EQSI (tmp_tmpcond, 0)) {
12066 tmp_condres = NOTBI (CPU (h_cbit));
12067}
12068 else if (EQSI (tmp_tmpcond, 1)) {
12069 tmp_condres = CPU (h_cbit);
12070}
12071 else if (EQSI (tmp_tmpcond, 2)) {
12072 tmp_condres = NOTBI (CPU (h_zbit));
12073}
12074 else if (EQSI (tmp_tmpcond, 3)) {
12075 tmp_condres = CPU (h_zbit);
12076}
12077 else if (EQSI (tmp_tmpcond, 4)) {
12078 tmp_condres = NOTBI (CPU (h_vbit));
12079}
12080 else if (EQSI (tmp_tmpcond, 5)) {
12081 tmp_condres = CPU (h_vbit);
12082}
12083 else if (EQSI (tmp_tmpcond, 6)) {
12084 tmp_condres = NOTBI (CPU (h_nbit));
12085}
12086 else if (EQSI (tmp_tmpcond, 7)) {
12087 tmp_condres = CPU (h_nbit);
12088}
12089 else if (EQSI (tmp_tmpcond, 8)) {
12090 tmp_condres = ORBI (CPU (h_cbit), CPU (h_zbit));
12091}
12092 else if (EQSI (tmp_tmpcond, 9)) {
12093 tmp_condres = NOTBI (ORBI (CPU (h_cbit), CPU (h_zbit)));
12094}
12095 else if (EQSI (tmp_tmpcond, 10)) {
12096 tmp_condres = NOTBI (XORBI (CPU (h_vbit), CPU (h_nbit)));
12097}
12098 else if (EQSI (tmp_tmpcond, 11)) {
12099 tmp_condres = XORBI (CPU (h_vbit), CPU (h_nbit));
12100}
12101 else if (EQSI (tmp_tmpcond, 12)) {
12102 tmp_condres = NOTBI (ORBI (XORBI (CPU (h_vbit), CPU (h_nbit)), CPU (h_zbit)));
12103}
12104 else if (EQSI (tmp_tmpcond, 13)) {
12105 tmp_condres = ORBI (XORBI (CPU (h_vbit), CPU (h_nbit)), CPU (h_zbit));
12106}
12107 else if (EQSI (tmp_tmpcond, 14)) {
12108 tmp_condres = 1;
12109}
12110 else if (EQSI (tmp_tmpcond, 15)) {
12111 tmp_condres = CPU (h_pbit);
12112}
12113; tmp_condres; });
12114crisv10f_branch_taken (current_cpu, pc, FLD (i_o_pcrel), tmp_truthval);
12115{
12116 {
12117 BI opval = 0;
12118 CPU (h_xbit) = opval;
12119 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
12120 }
12121 {
12122 BI opval = 0;
12123 SET_H_INSN_PREFIXED_P (opval);
12124 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
12125 }
12126}
12127if (tmp_truthval) {
12128{
12129 {
12130 USI opval = FLD (i_o_pcrel);
12131 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
12132 written |= (1 << 8);
12133 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
12134 }
12135}
12136}
12137}
12138
12139 abuf->written = written;
12140 SEM_BRANCH_FINI (vpc);
12141#undef FLD
12142}
12143 NEXT (vpc);
12144
12145 CASE (sem, INSN_BA_B) : /* ba ${o-pcrel} */
12146{
12147 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
12148 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
12149#define FLD(f) abuf->fields.sfmt_bcc_b.f
12150 int UNUSED written = 0;
12151 IADDR UNUSED pc = abuf->addr;
12152 SEM_BRANCH_INIT
12153 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
12154
12155{
12156{
12157 {
12158 BI opval = 0;
12159 CPU (h_xbit) = opval;
12160 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
12161 }
12162 {
12163 BI opval = 0;
12164 SET_H_INSN_PREFIXED_P (opval);
12165 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
12166 }
12167}
12168{
12169 {
12170 USI opval = FLD (i_o_pcrel);
12171 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
12172 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
12173 }
12174}
12175}
12176
12177 SEM_BRANCH_FINI (vpc);
12178#undef FLD
12179}
12180 NEXT (vpc);
12181
12182 CASE (sem, INSN_BCC_W) : /* b${cc} ${o-word-pcrel} */
12183{
12184 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
12185 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
12186#define FLD(f) abuf->fields.sfmt_bcc_w.f
12187 int UNUSED written = 0;
12188 IADDR UNUSED pc = abuf->addr;
12189 SEM_BRANCH_INIT
12190 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
12191
12192{
12193 BI tmp_truthval;
12194 tmp_truthval = ({ SI tmp_tmpcond;
12195 BI tmp_condres;
12196 tmp_tmpcond = FLD (f_operand2);
12197; if (EQSI (tmp_tmpcond, 0)) {
12198 tmp_condres = NOTBI (CPU (h_cbit));
12199}
12200 else if (EQSI (tmp_tmpcond, 1)) {
12201 tmp_condres = CPU (h_cbit);
12202}
12203 else if (EQSI (tmp_tmpcond, 2)) {
12204 tmp_condres = NOTBI (CPU (h_zbit));
12205}
12206 else if (EQSI (tmp_tmpcond, 3)) {
12207 tmp_condres = CPU (h_zbit);
12208}
12209 else if (EQSI (tmp_tmpcond, 4)) {
12210 tmp_condres = NOTBI (CPU (h_vbit));
12211}
12212 else if (EQSI (tmp_tmpcond, 5)) {
12213 tmp_condres = CPU (h_vbit);
12214}
12215 else if (EQSI (tmp_tmpcond, 6)) {
12216 tmp_condres = NOTBI (CPU (h_nbit));
12217}
12218 else if (EQSI (tmp_tmpcond, 7)) {
12219 tmp_condres = CPU (h_nbit);
12220}
12221 else if (EQSI (tmp_tmpcond, 8)) {
12222 tmp_condres = ORBI (CPU (h_cbit), CPU (h_zbit));
12223}
12224 else if (EQSI (tmp_tmpcond, 9)) {
12225 tmp_condres = NOTBI (ORBI (CPU (h_cbit), CPU (h_zbit)));
12226}
12227 else if (EQSI (tmp_tmpcond, 10)) {
12228 tmp_condres = NOTBI (XORBI (CPU (h_vbit), CPU (h_nbit)));
12229}
12230 else if (EQSI (tmp_tmpcond, 11)) {
12231 tmp_condres = XORBI (CPU (h_vbit), CPU (h_nbit));
12232}
12233 else if (EQSI (tmp_tmpcond, 12)) {
12234 tmp_condres = NOTBI (ORBI (XORBI (CPU (h_vbit), CPU (h_nbit)), CPU (h_zbit)));
12235}
12236 else if (EQSI (tmp_tmpcond, 13)) {
12237 tmp_condres = ORBI (XORBI (CPU (h_vbit), CPU (h_nbit)), CPU (h_zbit));
12238}
12239 else if (EQSI (tmp_tmpcond, 14)) {
12240 tmp_condres = 1;
12241}
12242 else if (EQSI (tmp_tmpcond, 15)) {
12243 tmp_condres = CPU (h_pbit);
12244}
12245; tmp_condres; });
12246crisv10f_branch_taken (current_cpu, pc, FLD (i_o_word_pcrel), tmp_truthval);
12247{
12248 {
12249 BI opval = 0;
12250 CPU (h_xbit) = opval;
12251 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
12252 }
12253 {
12254 BI opval = 0;
12255 SET_H_INSN_PREFIXED_P (opval);
12256 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
12257 }
12258}
12259if (tmp_truthval) {
12260{
12261 {
12262 USI opval = FLD (i_o_word_pcrel);
12263 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
12264 written |= (1 << 8);
12265 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
12266 }
12267}
12268}
12269}
12270
12271 abuf->written = written;
12272 SEM_BRANCH_FINI (vpc);
12273#undef FLD
12274}
12275 NEXT (vpc);
12276
12277 CASE (sem, INSN_BA_W) : /* ba ${o-word-pcrel} */
12278{
12279 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
12280 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
12281#define FLD(f) abuf->fields.sfmt_bcc_w.f
12282 int UNUSED written = 0;
12283 IADDR UNUSED pc = abuf->addr;
12284 SEM_BRANCH_INIT
12285 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
12286
12287{
12288{
12289 {
12290 BI opval = 0;
12291 CPU (h_xbit) = opval;
12292 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
12293 }
12294 {
12295 BI opval = 0;
12296 SET_H_INSN_PREFIXED_P (opval);
12297 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
12298 }
12299}
12300{
12301 {
12302 USI opval = FLD (i_o_word_pcrel);
12303 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
12304 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
12305 }
12306}
12307}
12308
12309 SEM_BRANCH_FINI (vpc);
12310#undef FLD
12311}
12312 NEXT (vpc);
12313
12314 CASE (sem, INSN_JUMP_R) : /* jump/jsr/jir ${Rs} */
12315{
12316 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
12317 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
12318#define FLD(f) abuf->fields.sfmt_move_m_sprv10.f
12319 int UNUSED written = 0;
12320 IADDR UNUSED pc = abuf->addr;
12321 SEM_BRANCH_INIT
12322 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
12323
12324{
12325 {
12326 SI opval = ADDSI (pc, 2);
12327 SET_H_SR (FLD (f_operand2), opval);
12328 TRACE_RESULT (current_cpu, abuf, "sr", 'x', opval);
12329 }
12330 {
12331 USI opval = GET_H_GR (FLD (f_operand1));
12332 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
12333 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
12334 }
12335{
12336 {
12337 BI opval = 0;
12338 CPU (h_xbit) = opval;
12339 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
12340 }
12341 {
12342 BI opval = 0;
12343 SET_H_INSN_PREFIXED_P (opval);
12344 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
12345 }
12346}
12347}
12348
12349 SEM_BRANCH_FINI (vpc);
12350#undef FLD
12351}
12352 NEXT (vpc);
12353
12354 CASE (sem, INSN_JUMP_M) : /* jump/jsr/jir [${Rs}${inc}] */
12355{
12356 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
12357 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
12358#define FLD(f) abuf->fields.sfmt_move_m_sprv10.f
12359 int UNUSED written = 0;
12360 IADDR UNUSED pc = abuf->addr;
12361 SEM_BRANCH_INIT
12362 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
12363
12364{
12365 {
12366 SI opval = ADDSI (pc, 2);
12367 SET_H_SR (FLD (f_operand2), opval);
12368 TRACE_RESULT (current_cpu, abuf, "sr", 'x', opval);
12369 }
12370 {
12371 USI opval = ({ SI tmp_addr;
12372 SI tmp_tmp_mem;
12373 BI tmp_postinc;
12374 tmp_postinc = FLD (f_memmode);
12375; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
12376; tmp_tmp_mem = GETMEMSI (current_cpu, pc, tmp_addr);
12377; if (NEBI (tmp_postinc, 0)) {
12378{
12379if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
12380 tmp_addr = ADDSI (tmp_addr, 4);
12381}
12382 {
12383 SI opval = tmp_addr;
12384 SET_H_GR (FLD (f_operand1), opval);
12385 written |= (1 << 7);
12386 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
12387 }
12388}
12389}
12390; tmp_tmp_mem; });
12391 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
12392 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
12393 }
12394{
12395 {
12396 BI opval = 0;
12397 CPU (h_xbit) = opval;
12398 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
12399 }
12400 {
12401 BI opval = 0;
12402 SET_H_INSN_PREFIXED_P (opval);
12403 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
12404 }
12405}
12406}
12407
12408 abuf->written = written;
12409 SEM_BRANCH_FINI (vpc);
12410#undef FLD
12411}
12412 NEXT (vpc);
12413
12414 CASE (sem, INSN_JUMP_C) : /* jump/jsr/jir ${const32} */
12415{
12416 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
12417 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
392753ae 12418#define FLD(f) abuf->fields.sfmt_move_c_sprv10_p9.f
f6bcefef
HPN		 12419 int UNUSED written = 0;
12420 IADDR UNUSED pc = abuf->addr;
12421 SEM_BRANCH_INIT
12422 vpc = SEM_NEXT_VPC (sem_arg, pc, 6);
12423
12424{
12425 {
12426 SI opval = ADDSI (pc, 6);
12427 SET_H_SR (FLD (f_operand2), opval);
12428 TRACE_RESULT (current_cpu, abuf, "sr", 'x', opval);
12429 }
12430 {
12431 USI opval = FLD (f_indir_pc__dword);
12432 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
12433 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
12434 }
12435{
12436 {
12437 BI opval = 0;
12438 CPU (h_xbit) = opval;
12439 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
12440 }
12441 {
12442 BI opval = 0;
12443 SET_H_INSN_PREFIXED_P (opval);
12444 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
12445 }
12446}
12447}
12448
12449 SEM_BRANCH_FINI (vpc);
12450#undef FLD
12451}
12452 NEXT (vpc);
12453
12454 CASE (sem, INSN_BREAK) : /* break $n */
12455{
12456 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
12457 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
12458#define FLD(f) abuf->fields.sfmt_break.f
12459 int UNUSED written = 0;
12460 IADDR UNUSED pc = abuf->addr;
12461 SEM_BRANCH_INIT
12462 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
12463
12464{
12465{
12466 {
12467 BI opval = 0;
12468 CPU (h_xbit) = opval;
12469 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
12470 }
12471 {
12472 BI opval = 0;
12473 SET_H_INSN_PREFIXED_P (opval);
12474 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
12475 }
12476}
12477 {
12478 USI opval = crisv10f_break_handler (current_cpu, FLD (f_u4), pc);
12479 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
12480 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
12481 }
12482}
12483
12484 SEM_BRANCH_FINI (vpc);
12485#undef FLD
12486}
12487 NEXT (vpc);
12488
12489 CASE (sem, INSN_BOUND_R_B_R) : /* bound-r.b ${Rs},${Rd} */
12490{
12491 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
12492 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
12493#define FLD(f) abuf->fields.sfmt_muls_b.f
12494 int UNUSED written = 0;
12495 IADDR UNUSED pc = abuf->addr;
12496 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
12497
12498{
12499 SI tmp_tmpopd;
12500 SI tmp_tmpops;
12501 SI tmp_newval;
12502 tmp_tmpops = ZEXTQISI (TRUNCSIQI (GET_H_GR (FLD (f_operand1))));
12503 tmp_tmpopd = GET_H_GR (FLD (f_operand2));
12504 tmp_newval = ((LTUSI (tmp_tmpops, tmp_tmpopd)) ? (tmp_tmpops) : (tmp_tmpopd));
12505 {
12506 SI opval = tmp_newval;
12507 SET_H_GR (FLD (f_operand2), opval);
12508 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
12509 }
12510{
12511 {
12512 BI opval = LTSI (tmp_newval, 0);
12513 CPU (h_nbit) = opval;
12514 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
12515 }
12516 {
12517 BI opval = ANDIF (EQSI (tmp_newval, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
12518 CPU (h_zbit) = opval;
12519 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
12520 }
12521SET_H_CBIT_MOVE (0);
12522SET_H_VBIT_MOVE (0);
12523{
12524 {
12525 BI opval = 0;
12526 CPU (h_xbit) = opval;
12527 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
12528 }
12529 {
12530 BI opval = 0;
12531 SET_H_INSN_PREFIXED_P (opval);
12532 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
12533 }
12534}
12535}
12536}
12537
12538#undef FLD
12539}
12540 NEXT (vpc);
12541
12542 CASE (sem, INSN_BOUND_R_W_R) : /* bound-r.w ${Rs},${Rd} */
12543{
12544 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
12545 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
12546#define FLD(f) abuf->fields.sfmt_muls_b.f
12547 int UNUSED written = 0;
12548 IADDR UNUSED pc = abuf->addr;
12549 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
12550
12551{
12552 SI tmp_tmpopd;
12553 SI tmp_tmpops;
12554 SI tmp_newval;
12555 tmp_tmpops = ZEXTHISI (TRUNCSIHI (GET_H_GR (FLD (f_operand1))));
12556 tmp_tmpopd = GET_H_GR (FLD (f_operand2));
12557 tmp_newval = ((LTUSI (tmp_tmpops, tmp_tmpopd)) ? (tmp_tmpops) : (tmp_tmpopd));
12558 {
12559 SI opval = tmp_newval;
12560 SET_H_GR (FLD (f_operand2), opval);
12561 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
12562 }
12563{
12564 {
12565 BI opval = LTSI (tmp_newval, 0);
12566 CPU (h_nbit) = opval;
12567 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
12568 }
12569 {
12570 BI opval = ANDIF (EQSI (tmp_newval, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
12571 CPU (h_zbit) = opval;
12572 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
12573 }
12574SET_H_CBIT_MOVE (0);
12575SET_H_VBIT_MOVE (0);
12576{
12577 {
12578 BI opval = 0;
12579 CPU (h_xbit) = opval;
12580 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
12581 }
12582 {
12583 BI opval = 0;
12584 SET_H_INSN_PREFIXED_P (opval);
12585 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
12586 }
12587}
12588}
12589}
12590
12591#undef FLD
12592}
12593 NEXT (vpc);
12594
12595 CASE (sem, INSN_BOUND_R_D_R) : /* bound-r.d ${Rs},${Rd} */
12596{
12597 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
12598 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
12599#define FLD(f) abuf->fields.sfmt_muls_b.f
12600 int UNUSED written = 0;
12601 IADDR UNUSED pc = abuf->addr;
12602 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
12603
12604{
12605 SI tmp_tmpopd;
12606 SI tmp_tmpops;
12607 SI tmp_newval;
12608 tmp_tmpops = TRUNCSISI (GET_H_GR (FLD (f_operand1)));
12609 tmp_tmpopd = GET_H_GR (FLD (f_operand2));
12610 tmp_newval = ((LTUSI (tmp_tmpops, tmp_tmpopd)) ? (tmp_tmpops) : (tmp_tmpopd));
12611 {
12612 SI opval = tmp_newval;
12613 SET_H_GR (FLD (f_operand2), opval);
12614 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
12615 }
12616{
12617 {
12618 BI opval = LTSI (tmp_newval, 0);
12619 CPU (h_nbit) = opval;
12620 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
12621 }
12622 {
12623 BI opval = ANDIF (EQSI (tmp_newval, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
12624 CPU (h_zbit) = opval;
12625 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
12626 }
12627SET_H_CBIT_MOVE (0);
12628SET_H_VBIT_MOVE (0);
12629{
12630 {
12631 BI opval = 0;
12632 CPU (h_xbit) = opval;
12633 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
12634 }
12635 {
12636 BI opval = 0;
12637 SET_H_INSN_PREFIXED_P (opval);
12638 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
12639 }
12640}
12641}
12642}
12643
12644#undef FLD
12645}
12646 NEXT (vpc);
12647
12648 CASE (sem, INSN_BOUND_M_B_M) : /* bound-m.b [${Rs}${inc}],${Rd} */
12649{
12650 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
12651 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
12652#define FLD(f) abuf->fields.sfmt_bound_m_b_m.f
12653 int UNUSED written = 0;
12654 IADDR UNUSED pc = abuf->addr;
12655 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
12656
12657{
12658 SI tmp_tmpopd;
12659 SI tmp_tmpops;
12660 SI tmp_newval;
12661 tmp_tmpops = ZEXTQISI (({ SI tmp_addr;
12662 QI tmp_tmp_mem;
12663 BI tmp_postinc;
12664 tmp_postinc = FLD (f_memmode);
12665; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
12666; tmp_tmp_mem = GETMEMQI (current_cpu, pc, tmp_addr);
12667; if (NEBI (tmp_postinc, 0)) {
12668{
12669if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
12670 tmp_addr = ADDSI (tmp_addr, 1);
12671}
12672 {
12673 SI opval = tmp_addr;
12674 SET_H_GR (FLD (f_operand1), opval);
12675 written |= (1 << 9);
12676 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
12677 }
12678}
12679}
12680; tmp_tmp_mem; }));
12681 tmp_tmpopd = GET_H_GR (FLD (f_operand2));
12682 tmp_newval = ((LTUSI (tmp_tmpops, tmp_tmpopd)) ? (tmp_tmpops) : (tmp_tmpopd));
12683if (ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) {
12684 {
12685 SI opval = tmp_newval;
12686 SET_H_GR (FLD (f_operand1), opval);
12687 written |= (1 << 9);
12688 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
12689 }
12690} else {
12691 {
12692 SI opval = tmp_newval;
12693 SET_H_GR (FLD (f_operand2), opval);
12694 written |= (1 << 8);
12695 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
12696 }
12697}
12698{
12699 {
12700 BI opval = LTSI (tmp_newval, 0);
12701 CPU (h_nbit) = opval;
12702 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
12703 }
12704 {
12705 BI opval = ANDIF (EQSI (tmp_newval, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
12706 CPU (h_zbit) = opval;
12707 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
12708 }
12709SET_H_CBIT_MOVE (0);
12710SET_H_VBIT_MOVE (0);
12711{
12712 {
12713 BI opval = 0;
12714 CPU (h_xbit) = opval;
12715 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
12716 }
12717 {
12718 BI opval = 0;
12719 SET_H_INSN_PREFIXED_P (opval);
12720 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
12721 }
12722}
12723}
12724}
12725
12726 abuf->written = written;
12727#undef FLD
12728}
12729 NEXT (vpc);
12730
12731 CASE (sem, INSN_BOUND_M_W_M) : /* bound-m.w [${Rs}${inc}],${Rd} */
12732{
12733 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
12734 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
12735#define FLD(f) abuf->fields.sfmt_bound_m_b_m.f
12736 int UNUSED written = 0;
12737 IADDR UNUSED pc = abuf->addr;
12738 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
12739
12740{
12741 SI tmp_tmpopd;
12742 SI tmp_tmpops;
12743 SI tmp_newval;
12744 tmp_tmpops = ZEXTHISI (({ SI tmp_addr;
12745 HI tmp_tmp_mem;
12746 BI tmp_postinc;
12747 tmp_postinc = FLD (f_memmode);
12748; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
12749; tmp_tmp_mem = GETMEMHI (current_cpu, pc, tmp_addr);
12750; if (NEBI (tmp_postinc, 0)) {
12751{
12752if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
12753 tmp_addr = ADDSI (tmp_addr, 2);
12754}
12755 {
12756 SI opval = tmp_addr;
12757 SET_H_GR (FLD (f_operand1), opval);
12758 written |= (1 << 9);
12759 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
12760 }
12761}
12762}
12763; tmp_tmp_mem; }));
12764 tmp_tmpopd = GET_H_GR (FLD (f_operand2));
12765 tmp_newval = ((LTUSI (tmp_tmpops, tmp_tmpopd)) ? (tmp_tmpops) : (tmp_tmpopd));
12766if (ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) {
12767 {
12768 SI opval = tmp_newval;
12769 SET_H_GR (FLD (f_operand1), opval);
12770 written |= (1 << 9);
12771 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
12772 }
12773} else {
12774 {
12775 SI opval = tmp_newval;
12776 SET_H_GR (FLD (f_operand2), opval);
12777 written |= (1 << 8);
12778 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
12779 }
12780}
12781{
12782 {
12783 BI opval = LTSI (tmp_newval, 0);
12784 CPU (h_nbit) = opval;
12785 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
12786 }
12787 {
12788 BI opval = ANDIF (EQSI (tmp_newval, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
12789 CPU (h_zbit) = opval;
12790 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
12791 }
12792SET_H_CBIT_MOVE (0);
12793SET_H_VBIT_MOVE (0);
12794{
12795 {
12796 BI opval = 0;
12797 CPU (h_xbit) = opval;
12798 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
12799 }
12800 {
12801 BI opval = 0;
12802 SET_H_INSN_PREFIXED_P (opval);
12803 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
12804 }
12805}
12806}
12807}
12808
12809 abuf->written = written;
12810#undef FLD
12811}
12812 NEXT (vpc);
12813
12814 CASE (sem, INSN_BOUND_M_D_M) : /* bound-m.d [${Rs}${inc}],${Rd} */
12815{
12816 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
12817 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
12818#define FLD(f) abuf->fields.sfmt_bound_m_b_m.f
12819 int UNUSED written = 0;
12820 IADDR UNUSED pc = abuf->addr;
12821 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
12822
12823{
12824 SI tmp_tmpopd;
12825 SI tmp_tmpops;
12826 SI tmp_newval;
12827 tmp_tmpops = ({ SI tmp_addr;
12828 SI tmp_tmp_mem;
12829 BI tmp_postinc;
12830 tmp_postinc = FLD (f_memmode);
12831; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
12832; tmp_tmp_mem = GETMEMSI (current_cpu, pc, tmp_addr);
12833; if (NEBI (tmp_postinc, 0)) {
12834{
12835if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
12836 tmp_addr = ADDSI (tmp_addr, 4);
12837}
12838 {
12839 SI opval = tmp_addr;
12840 SET_H_GR (FLD (f_operand1), opval);
12841 written |= (1 << 9);
12842 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
12843 }
12844}
12845}
12846; tmp_tmp_mem; });
12847 tmp_tmpopd = GET_H_GR (FLD (f_operand2));
12848 tmp_newval = ((LTUSI (tmp_tmpops, tmp_tmpopd)) ? (tmp_tmpops) : (tmp_tmpopd));
12849if (ANDIF (GET_H_INSN_PREFIXED_P (), NOTSI (FLD (f_memmode)))) {
12850 {
12851 SI opval = tmp_newval;
12852 SET_H_GR (FLD (f_operand1), opval);
12853 written |= (1 << 9);
12854 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
12855 }
12856} else {
12857 {
12858 SI opval = tmp_newval;
12859 SET_H_GR (FLD (f_operand2), opval);
12860 written |= (1 << 8);
12861 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
12862 }
12863}
12864{
12865 {
12866 BI opval = LTSI (tmp_newval, 0);
12867 CPU (h_nbit) = opval;
12868 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
12869 }
12870 {
12871 BI opval = ANDIF (EQSI (tmp_newval, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
12872 CPU (h_zbit) = opval;
12873 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
12874 }
12875SET_H_CBIT_MOVE (0);
12876SET_H_VBIT_MOVE (0);
12877{
12878 {
12879 BI opval = 0;
12880 CPU (h_xbit) = opval;
12881 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
12882 }
12883 {
12884 BI opval = 0;
12885 SET_H_INSN_PREFIXED_P (opval);
12886 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
12887 }
12888}
12889}
12890}
12891
12892 abuf->written = written;
12893#undef FLD
12894}
12895 NEXT (vpc);
12896
12897 CASE (sem, INSN_BOUND_CB) : /* bound.b [PC+],${Rd} */
12898{
12899 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
12900 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
12901#define FLD(f) abuf->fields.sfmt_bound_cb.f
12902 int UNUSED written = 0;
12903 IADDR UNUSED pc = abuf->addr;
12904 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
12905
12906{
12907 SI tmp_tmpopd;
12908 SI tmp_tmpops;
12909 SI tmp_newval;
12910 tmp_tmpops = ZEXTQISI (TRUNCSIQI (FLD (f_indir_pc__byte)));
12911 tmp_tmpopd = GET_H_GR (FLD (f_operand2));
12912 tmp_newval = ((LTUSI (tmp_tmpops, tmp_tmpopd)) ? (tmp_tmpops) : (tmp_tmpopd));
12913 {
12914 SI opval = tmp_newval;
12915 SET_H_GR (FLD (f_operand2), opval);
12916 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
12917 }
12918{
12919 {
12920 BI opval = LTSI (tmp_newval, 0);
12921 CPU (h_nbit) = opval;
12922 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
12923 }
12924 {
12925 BI opval = ANDIF (EQSI (tmp_newval, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
12926 CPU (h_zbit) = opval;
12927 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
12928 }
12929SET_H_CBIT_MOVE (0);
12930SET_H_VBIT_MOVE (0);
12931{
12932 {
12933 BI opval = 0;
12934 CPU (h_xbit) = opval;
12935 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
12936 }
12937 {
12938 BI opval = 0;
12939 SET_H_INSN_PREFIXED_P (opval);
12940 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
12941 }
12942}
12943}
12944}
12945
12946#undef FLD
12947}
12948 NEXT (vpc);
12949
12950 CASE (sem, INSN_BOUND_CW) : /* bound.w [PC+],${Rd} */
12951{
12952 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
12953 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
12954#define FLD(f) abuf->fields.sfmt_bound_cw.f
12955 int UNUSED written = 0;
12956 IADDR UNUSED pc = abuf->addr;
12957 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
12958
12959{
12960 SI tmp_tmpopd;
12961 SI tmp_tmpops;
12962 SI tmp_newval;
12963 tmp_tmpops = ZEXTSISI (FLD (f_indir_pc__word));
12964 tmp_tmpopd = GET_H_GR (FLD (f_operand2));
12965 tmp_newval = ((LTUSI (tmp_tmpops, tmp_tmpopd)) ? (tmp_tmpops) : (tmp_tmpopd));
12966 {
12967 SI opval = tmp_newval;
12968 SET_H_GR (FLD (f_operand2), opval);
12969 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
12970 }
12971{
12972 {
12973 BI opval = LTSI (tmp_newval, 0);
12974 CPU (h_nbit) = opval;
12975 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
12976 }
12977 {
12978 BI opval = ANDIF (EQSI (tmp_newval, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
12979 CPU (h_zbit) = opval;
12980 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
12981 }
12982SET_H_CBIT_MOVE (0);
12983SET_H_VBIT_MOVE (0);
12984{
12985 {
12986 BI opval = 0;
12987 CPU (h_xbit) = opval;
12988 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
12989 }
12990 {
12991 BI opval = 0;
12992 SET_H_INSN_PREFIXED_P (opval);
12993 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
12994 }
12995}
12996}
12997}
12998
12999#undef FLD
13000}
13001 NEXT (vpc);
13002
13003 CASE (sem, INSN_BOUND_CD) : /* bound.d [PC+],${Rd} */
13004{
13005 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
13006 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
13007#define FLD(f) abuf->fields.sfmt_bound_cd.f
13008 int UNUSED written = 0;
13009 IADDR UNUSED pc = abuf->addr;
13010 vpc = SEM_NEXT_VPC (sem_arg, pc, 6);
13011
13012{
13013 SI tmp_tmpopd;
13014 SI tmp_tmpops;
13015 SI tmp_newval;
13016 tmp_tmpops = FLD (f_indir_pc__dword);
13017 tmp_tmpopd = GET_H_GR (FLD (f_operand2));
13018 tmp_newval = ((LTUSI (tmp_tmpops, tmp_tmpopd)) ? (tmp_tmpops) : (tmp_tmpopd));
13019 {
13020 SI opval = tmp_newval;
13021 SET_H_GR (FLD (f_operand2), opval);
13022 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
13023 }
13024{
13025 {
13026 BI opval = LTSI (tmp_newval, 0);
13027 CPU (h_nbit) = opval;
13028 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
13029 }
13030 {
13031 BI opval = ANDIF (EQSI (tmp_newval, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
13032 CPU (h_zbit) = opval;
13033 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
13034 }
13035SET_H_CBIT_MOVE (0);
13036SET_H_VBIT_MOVE (0);
13037{
13038 {
13039 BI opval = 0;
13040 CPU (h_xbit) = opval;
13041 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
13042 }
13043 {
13044 BI opval = 0;
13045 SET_H_INSN_PREFIXED_P (opval);
13046 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
13047 }
13048}
13049}
13050}
13051
13052#undef FLD
13053}
13054 NEXT (vpc);
13055
13056 CASE (sem, INSN_SCC) : /* s${cc} ${Rd-sfield} */
13057{
13058 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
13059 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
13060#define FLD(f) abuf->fields.sfmt_move_spr_mv10.f
13061 int UNUSED written = 0;
13062 IADDR UNUSED pc = abuf->addr;
13063 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
13064
13065{
13066 BI tmp_truthval;
13067 tmp_truthval = ({ SI tmp_tmpcond;
13068 BI tmp_condres;
13069 tmp_tmpcond = FLD (f_operand2);
13070; if (EQSI (tmp_tmpcond, 0)) {
13071 tmp_condres = NOTBI (CPU (h_cbit));
13072}
13073 else if (EQSI (tmp_tmpcond, 1)) {
13074 tmp_condres = CPU (h_cbit);
13075}
13076 else if (EQSI (tmp_tmpcond, 2)) {
13077 tmp_condres = NOTBI (CPU (h_zbit));
13078}
13079 else if (EQSI (tmp_tmpcond, 3)) {
13080 tmp_condres = CPU (h_zbit);
13081}
13082 else if (EQSI (tmp_tmpcond, 4)) {
13083 tmp_condres = NOTBI (CPU (h_vbit));
13084}
13085 else if (EQSI (tmp_tmpcond, 5)) {
13086 tmp_condres = CPU (h_vbit);
13087}
13088 else if (EQSI (tmp_tmpcond, 6)) {
13089 tmp_condres = NOTBI (CPU (h_nbit));
13090}
13091 else if (EQSI (tmp_tmpcond, 7)) {
13092 tmp_condres = CPU (h_nbit);
13093}
13094 else if (EQSI (tmp_tmpcond, 8)) {
13095 tmp_condres = ORBI (CPU (h_cbit), CPU (h_zbit));
13096}
13097 else if (EQSI (tmp_tmpcond, 9)) {
13098 tmp_condres = NOTBI (ORBI (CPU (h_cbit), CPU (h_zbit)));
13099}
13100 else if (EQSI (tmp_tmpcond, 10)) {
13101 tmp_condres = NOTBI (XORBI (CPU (h_vbit), CPU (h_nbit)));
13102}
13103 else if (EQSI (tmp_tmpcond, 11)) {
13104 tmp_condres = XORBI (CPU (h_vbit), CPU (h_nbit));
13105}
13106 else if (EQSI (tmp_tmpcond, 12)) {
13107 tmp_condres = NOTBI (ORBI (XORBI (CPU (h_vbit), CPU (h_nbit)), CPU (h_zbit)));
13108}
13109 else if (EQSI (tmp_tmpcond, 13)) {
13110 tmp_condres = ORBI (XORBI (CPU (h_vbit), CPU (h_nbit)), CPU (h_zbit));
13111}
13112 else if (EQSI (tmp_tmpcond, 14)) {
13113 tmp_condres = 1;
13114}
13115 else if (EQSI (tmp_tmpcond, 15)) {
13116 tmp_condres = CPU (h_pbit);
13117}
13118; tmp_condres; });
13119 {
13120 SI opval = ZEXTBISI (tmp_truthval);
13121 SET_H_GR (FLD (f_operand1), opval);
13122 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
13123 }
13124{
13125 {
13126 BI opval = 0;
13127 CPU (h_xbit) = opval;
13128 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
13129 }
13130 {
13131 BI opval = 0;
13132 SET_H_INSN_PREFIXED_P (opval);
13133 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
13134 }
13135}
13136}
13137
13138#undef FLD
13139}
13140 NEXT (vpc);
13141
13142 CASE (sem, INSN_LZ) : /* lz ${Rs},${Rd} */
13143{
13144 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
13145 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
13146#define FLD(f) abuf->fields.sfmt_muls_b.f
13147 int UNUSED written = 0;
13148 IADDR UNUSED pc = abuf->addr;
13149 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
13150
13151{
13152 SI tmp_tmpd;
13153 SI tmp_tmp;
13154 tmp_tmp = GET_H_GR (FLD (f_operand1));
13155 tmp_tmpd = 0;
13156{
13157if (GESI (tmp_tmp, 0)) {
13158{
13159 tmp_tmp = SLLSI (tmp_tmp, 1);
13160 tmp_tmpd = ADDSI (tmp_tmpd, 1);
13161}
13162}
13163if (GESI (tmp_tmp, 0)) {
13164{
13165 tmp_tmp = SLLSI (tmp_tmp, 1);
13166 tmp_tmpd = ADDSI (tmp_tmpd, 1);
13167}
13168}
13169if (GESI (tmp_tmp, 0)) {
13170{
13171 tmp_tmp = SLLSI (tmp_tmp, 1);
13172 tmp_tmpd = ADDSI (tmp_tmpd, 1);
13173}
13174}
13175if (GESI (tmp_tmp, 0)) {
13176{
13177 tmp_tmp = SLLSI (tmp_tmp, 1);
13178 tmp_tmpd = ADDSI (tmp_tmpd, 1);
13179}
13180}
13181if (GESI (tmp_tmp, 0)) {
13182{
13183 tmp_tmp = SLLSI (tmp_tmp, 1);
13184 tmp_tmpd = ADDSI (tmp_tmpd, 1);
13185}
13186}
13187if (GESI (tmp_tmp, 0)) {
13188{
13189 tmp_tmp = SLLSI (tmp_tmp, 1);
13190 tmp_tmpd = ADDSI (tmp_tmpd, 1);
13191}
13192}
13193if (GESI (tmp_tmp, 0)) {
13194{
13195 tmp_tmp = SLLSI (tmp_tmp, 1);
13196 tmp_tmpd = ADDSI (tmp_tmpd, 1);
13197}
13198}
13199if (GESI (tmp_tmp, 0)) {
13200{
13201 tmp_tmp = SLLSI (tmp_tmp, 1);
13202 tmp_tmpd = ADDSI (tmp_tmpd, 1);
13203}
13204}
13205if (GESI (tmp_tmp, 0)) {
13206{
13207 tmp_tmp = SLLSI (tmp_tmp, 1);
13208 tmp_tmpd = ADDSI (tmp_tmpd, 1);
13209}
13210}
13211if (GESI (tmp_tmp, 0)) {
13212{
13213 tmp_tmp = SLLSI (tmp_tmp, 1);
13214 tmp_tmpd = ADDSI (tmp_tmpd, 1);
13215}
13216}
13217if (GESI (tmp_tmp, 0)) {
13218{
13219 tmp_tmp = SLLSI (tmp_tmp, 1);
13220 tmp_tmpd = ADDSI (tmp_tmpd, 1);
13221}
13222}
13223if (GESI (tmp_tmp, 0)) {
13224{
13225 tmp_tmp = SLLSI (tmp_tmp, 1);
13226 tmp_tmpd = ADDSI (tmp_tmpd, 1);
13227}
13228}
13229if (GESI (tmp_tmp, 0)) {
13230{
13231 tmp_tmp = SLLSI (tmp_tmp, 1);
13232 tmp_tmpd = ADDSI (tmp_tmpd, 1);
13233}
13234}
13235if (GESI (tmp_tmp, 0)) {
13236{
13237 tmp_tmp = SLLSI (tmp_tmp, 1);
13238 tmp_tmpd = ADDSI (tmp_tmpd, 1);
13239}
13240}
13241if (GESI (tmp_tmp, 0)) {
13242{
13243 tmp_tmp = SLLSI (tmp_tmp, 1);
13244 tmp_tmpd = ADDSI (tmp_tmpd, 1);
13245}
13246}
13247if (GESI (tmp_tmp, 0)) {
13248{
13249 tmp_tmp = SLLSI (tmp_tmp, 1);
13250 tmp_tmpd = ADDSI (tmp_tmpd, 1);
13251}
13252}
13253if (GESI (tmp_tmp, 0)) {
13254{
13255 tmp_tmp = SLLSI (tmp_tmp, 1);
13256 tmp_tmpd = ADDSI (tmp_tmpd, 1);
13257}
13258}
13259if (GESI (tmp_tmp, 0)) {
13260{
13261 tmp_tmp = SLLSI (tmp_tmp, 1);
13262 tmp_tmpd = ADDSI (tmp_tmpd, 1);
13263}
13264}
13265if (GESI (tmp_tmp, 0)) {
13266{
13267 tmp_tmp = SLLSI (tmp_tmp, 1);
13268 tmp_tmpd = ADDSI (tmp_tmpd, 1);
13269}
13270}
13271if (GESI (tmp_tmp, 0)) {
13272{
13273 tmp_tmp = SLLSI (tmp_tmp, 1);
13274 tmp_tmpd = ADDSI (tmp_tmpd, 1);
13275}
13276}
13277if (GESI (tmp_tmp, 0)) {
13278{
13279 tmp_tmp = SLLSI (tmp_tmp, 1);
13280 tmp_tmpd = ADDSI (tmp_tmpd, 1);
13281}
13282}
13283if (GESI (tmp_tmp, 0)) {
13284{
13285 tmp_tmp = SLLSI (tmp_tmp, 1);
13286 tmp_tmpd = ADDSI (tmp_tmpd, 1);
13287}
13288}
13289if (GESI (tmp_tmp, 0)) {
13290{
13291 tmp_tmp = SLLSI (tmp_tmp, 1);
13292 tmp_tmpd = ADDSI (tmp_tmpd, 1);
13293}
13294}
13295if (GESI (tmp_tmp, 0)) {
13296{
13297 tmp_tmp = SLLSI (tmp_tmp, 1);
13298 tmp_tmpd = ADDSI (tmp_tmpd, 1);
13299}
13300}
13301if (GESI (tmp_tmp, 0)) {
13302{
13303 tmp_tmp = SLLSI (tmp_tmp, 1);
13304 tmp_tmpd = ADDSI (tmp_tmpd, 1);
13305}
13306}
13307if (GESI (tmp_tmp, 0)) {
13308{
13309 tmp_tmp = SLLSI (tmp_tmp, 1);
13310 tmp_tmpd = ADDSI (tmp_tmpd, 1);
13311}
13312}
13313if (GESI (tmp_tmp, 0)) {
13314{
13315 tmp_tmp = SLLSI (tmp_tmp, 1);
13316 tmp_tmpd = ADDSI (tmp_tmpd, 1);
13317}
13318}
13319if (GESI (tmp_tmp, 0)) {
13320{
13321 tmp_tmp = SLLSI (tmp_tmp, 1);
13322 tmp_tmpd = ADDSI (tmp_tmpd, 1);
13323}
13324}
13325if (GESI (tmp_tmp, 0)) {
13326{
13327 tmp_tmp = SLLSI (tmp_tmp, 1);
13328 tmp_tmpd = ADDSI (tmp_tmpd, 1);
13329}
13330}
13331if (GESI (tmp_tmp, 0)) {
13332{
13333 tmp_tmp = SLLSI (tmp_tmp, 1);
13334 tmp_tmpd = ADDSI (tmp_tmpd, 1);
13335}
13336}
13337if (GESI (tmp_tmp, 0)) {
13338{
13339 tmp_tmp = SLLSI (tmp_tmp, 1);
13340 tmp_tmpd = ADDSI (tmp_tmpd, 1);
13341}
13342}
13343if (GESI (tmp_tmp, 0)) {
13344{
13345 tmp_tmp = SLLSI (tmp_tmp, 1);
13346 tmp_tmpd = ADDSI (tmp_tmpd, 1);
13347}
13348}
13349}
13350 {
13351 SI opval = tmp_tmpd;
13352 SET_H_GR (FLD (f_operand2), opval);
13353 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
13354 }
13355{
13356 {
13357 BI opval = LTSI (tmp_tmpd, 0);
13358 CPU (h_nbit) = opval;
13359 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
13360 }
13361 {
13362 BI opval = ANDIF (EQSI (tmp_tmpd, 0), ((CPU (h_xbit)) ? (CPU (h_zbit)) : (1)));
13363 CPU (h_zbit) = opval;
13364 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
13365 }
13366SET_H_CBIT_MOVE (0);
13367SET_H_VBIT_MOVE (0);
13368{
13369 {
13370 BI opval = 0;
13371 CPU (h_xbit) = opval;
13372 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
13373 }
13374 {
13375 BI opval = 0;
13376 SET_H_INSN_PREFIXED_P (opval);
13377 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
13378 }
13379}
13380}
13381}
13382
13383#undef FLD
13384}
13385 NEXT (vpc);
13386
13387 CASE (sem, INSN_ADDOQ) : /* addoq $o,$Rs,ACR */
13388{
13389 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
13390 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
13391#define FLD(f) abuf->fields.sfmt_addoq.f
13392 int UNUSED written = 0;
13393 IADDR UNUSED pc = abuf->addr;
13394 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
13395
13396{
13397 {
13398 SI opval = ADDSI (GET_H_GR (FLD (f_operand2)), FLD (f_s8));
13399 CPU (h_prefixreg_pre_v32) = opval;
13400 TRACE_RESULT (current_cpu, abuf, "prefixreg", 'x', opval);
13401 }
13402 {
13403 BI opval = 1;
13404 SET_H_INSN_PREFIXED_P (opval);
13405 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
13406 }
13407}
13408
13409#undef FLD
13410}
13411 NEXT (vpc);
13412
13413 CASE (sem, INSN_BDAPQPC) : /* bdapq $o,PC */
13414{
13415 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
13416 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
13417#define FLD(f) abuf->fields.sfmt_addoq.f
13418 int UNUSED written = 0;
13419 IADDR UNUSED pc = abuf->addr;
13420 SEM_BRANCH_INIT
13421 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
13422
13423{
13424 {
13425 SI opval = ADDSI (ADDSI (pc, 2), FLD (f_s8));
13426 CPU (h_prefixreg_pre_v32) = opval;
13427 TRACE_RESULT (current_cpu, abuf, "prefixreg", 'x', opval);
13428 }
13429 {
13430 BI opval = 1;
13431 SET_H_INSN_PREFIXED_P (opval);
13432 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
13433 }
13434cris_flush_simulator_decode_cache (current_cpu, pc);
13435}
13436
13437 SEM_BRANCH_FINI (vpc);
13438#undef FLD
13439}
13440 NEXT (vpc);
13441
392753ae
HPN		 13442 CASE (sem, INSN_BDAP_32_PC) : /* bdap ${sconst32},PC */
13443{
13444 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
13445 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
13446#define FLD(f) abuf->fields.sfmt_move_c_sprv10_p9.f
13447 int UNUSED written = 0;
13448 IADDR UNUSED pc = abuf->addr;
13449 vpc = SEM_NEXT_VPC (sem_arg, pc, 6);
13450
13451{
13452 SI tmp_newpc;
13453 SI tmp_oldpc;
13454 SI tmp_offs;
13455 tmp_offs = FLD (f_indir_pc__dword);
13456 tmp_oldpc = ADDSI (pc, 6);
13457 tmp_newpc = ADDSI (tmp_oldpc, tmp_offs);
13458 {
13459 SI opval = tmp_newpc;
13460 CPU (h_prefixreg_pre_v32) = opval;
13461 TRACE_RESULT (current_cpu, abuf, "prefixreg", 'x', opval);
13462 }
13463 {
13464 BI opval = 1;
13465 SET_H_INSN_PREFIXED_P (opval);
13466 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
13467 }
13468}
13469
13470#undef FLD
13471}
13472 NEXT (vpc);
13473
13474 CASE (sem, INSN_MOVE_M_PCPLUS_P0) : /* move [PC+],P0 */
13475{
13476 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
13477 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
13478#define FLD(f) abuf->fields.sfmt_move_m_spplus_p8.f
13479 int UNUSED written = 0;
13480 IADDR UNUSED pc = abuf->addr;
13481 SEM_BRANCH_INIT
13482 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
13483
13484if (GET_H_INSN_PREFIXED_P ()) {
13485{
13486 QI tmp_dummy;
13487 tmp_dummy = ({ SI tmp_addr;
13488 QI tmp_tmp_mem;
13489 BI tmp_postinc;
13490 tmp_postinc = FLD (f_memmode);
13491; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (pc) : (CPU (h_prefixreg_pre_v32)));
13492; tmp_tmp_mem = GETMEMQI (current_cpu, pc, tmp_addr);
13493; if (NEBI (tmp_postinc, 0)) {
13494{
13495if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
13496 tmp_addr = ADDSI (tmp_addr, 1);
13497}
13498 {
13499 USI opval = tmp_addr;
13500 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
13501 written |= (1 << 5);
13502 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
13503 }
13504}
13505}
13506; tmp_tmp_mem; });
13507{
13508 {
13509 BI opval = 0;
13510 CPU (h_xbit) = opval;
13511 written |= (1 << 7);
13512 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
13513 }
13514 {
13515 BI opval = 0;
13516 SET_H_INSN_PREFIXED_P (opval);
13517 written |= (1 << 6);
13518 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
13519 }
13520}
13521}
13522} else {
13523cgen_rtx_error (current_cpu, "move [PC+],P0 without prefix is not implemented");
13524}
13525
13526 abuf->written = written;
13527 SEM_BRANCH_FINI (vpc);
13528#undef FLD
13529}
13530 NEXT (vpc);
13531
13532 CASE (sem, INSN_MOVE_M_SPPLUS_P8) : /* move [SP+],P8 */
13533{
13534 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
13535 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
13536#define FLD(f) abuf->fields.sfmt_move_m_spplus_p8.f
13537 int UNUSED written = 0;
13538 IADDR UNUSED pc = abuf->addr;
13539 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
13540
13541if (GET_H_INSN_PREFIXED_P ()) {
13542{
13543 SI tmp_dummy;
13544 tmp_dummy = ({ SI tmp_addr;
13545 SI tmp_tmp_mem;
13546 BI tmp_postinc;
13547 tmp_postinc = FLD (f_memmode);
13548; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (((UINT) 14))) : (CPU (h_prefixreg_pre_v32)));
13549; tmp_tmp_mem = GETMEMSI (current_cpu, pc, tmp_addr);
13550; if (NEBI (tmp_postinc, 0)) {
13551{
13552if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
13553 tmp_addr = ADDSI (tmp_addr, 4);
13554}
13555 {
13556 SI opval = tmp_addr;
13557 SET_H_GR (((UINT) 14), opval);
13558 written |= (1 << 5);
13559 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
13560 }
13561}
13562}
13563; tmp_tmp_mem; });
13564{
13565 {
13566 BI opval = 0;
13567 CPU (h_xbit) = opval;
13568 written |= (1 << 7);
13569 TRACE_RESULT (current_cpu, abuf, "xbit", 'x', opval);
13570 }
13571 {
13572 BI opval = 0;
13573 SET_H_INSN_PREFIXED_P (opval);
13574 written |= (1 << 6);
13575 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
13576 }
13577}
13578}
13579} else {
13580cgen_rtx_error (current_cpu, "move [SP+],P8 without prefix is not implemented");
13581}
13582
13583 abuf->written = written;
13584#undef FLD
13585}
13586 NEXT (vpc);
13587
f6bcefef
HPN		 13588 CASE (sem, INSN_ADDO_M_B_M) : /* addo-m.b [${Rs}${inc}],$Rd,ACR */
13589{
13590 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
13591 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
13592#define FLD(f) abuf->fields.sfmt_bound_m_b_m.f
13593 int UNUSED written = 0;
13594 IADDR UNUSED pc = abuf->addr;
13595 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
13596
13597{
13598 QI tmp_tmps;
13599 tmp_tmps = ({ SI tmp_addr;
13600 QI tmp_tmp_mem;
13601 BI tmp_postinc;
13602 tmp_postinc = FLD (f_memmode);
13603; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
13604; tmp_tmp_mem = GETMEMQI (current_cpu, pc, tmp_addr);
13605; if (NEBI (tmp_postinc, 0)) {
13606{
13607if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
13608 tmp_addr = ADDSI (tmp_addr, 1);
13609}
13610 {
13611 SI opval = tmp_addr;
13612 SET_H_GR (FLD (f_operand1), opval);
13613 written |= (1 << 6);
13614 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
13615 }
13616}
13617}
13618; tmp_tmp_mem; });
13619 {
13620 SI opval = ADDSI (GET_H_GR (FLD (f_operand2)), EXTQISI (tmp_tmps));
13621 CPU (h_prefixreg_pre_v32) = opval;
13622 TRACE_RESULT (current_cpu, abuf, "prefixreg", 'x', opval);
13623 }
13624 {
13625 BI opval = 1;
13626 SET_H_INSN_PREFIXED_P (opval);
13627 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
13628 }
13629}
13630
13631 abuf->written = written;
13632#undef FLD
13633}
13634 NEXT (vpc);
13635
13636 CASE (sem, INSN_ADDO_M_W_M) : /* addo-m.w [${Rs}${inc}],$Rd,ACR */
13637{
13638 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
13639 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
13640#define FLD(f) abuf->fields.sfmt_bound_m_b_m.f
13641 int UNUSED written = 0;
13642 IADDR UNUSED pc = abuf->addr;
13643 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
13644
13645{
13646 HI tmp_tmps;
13647 tmp_tmps = ({ SI tmp_addr;
13648 HI tmp_tmp_mem;
13649 BI tmp_postinc;
13650 tmp_postinc = FLD (f_memmode);
13651; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
13652; tmp_tmp_mem = GETMEMHI (current_cpu, pc, tmp_addr);
13653; if (NEBI (tmp_postinc, 0)) {
13654{
13655if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
13656 tmp_addr = ADDSI (tmp_addr, 2);
13657}
13658 {
13659 SI opval = tmp_addr;
13660 SET_H_GR (FLD (f_operand1), opval);
13661 written |= (1 << 6);
13662 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
13663 }
13664}
13665}
13666; tmp_tmp_mem; });
13667 {
13668 SI opval = ADDSI (GET_H_GR (FLD (f_operand2)), EXTHISI (tmp_tmps));
13669 CPU (h_prefixreg_pre_v32) = opval;
13670 TRACE_RESULT (current_cpu, abuf, "prefixreg", 'x', opval);
13671 }
13672 {
13673 BI opval = 1;
13674 SET_H_INSN_PREFIXED_P (opval);
13675 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
13676 }
13677}
13678
13679 abuf->written = written;
13680#undef FLD
13681}
13682 NEXT (vpc);
13683
13684 CASE (sem, INSN_ADDO_M_D_M) : /* addo-m.d [${Rs}${inc}],$Rd,ACR */
13685{
13686 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
13687 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
13688#define FLD(f) abuf->fields.sfmt_bound_m_b_m.f
13689 int UNUSED written = 0;
13690 IADDR UNUSED pc = abuf->addr;
13691 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
13692
13693{
13694 SI tmp_tmps;
13695 tmp_tmps = ({ SI tmp_addr;
13696 SI tmp_tmp_mem;
13697 BI tmp_postinc;
13698 tmp_postinc = FLD (f_memmode);
13699; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
13700; tmp_tmp_mem = GETMEMSI (current_cpu, pc, tmp_addr);
13701; if (NEBI (tmp_postinc, 0)) {
13702{
13703if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
13704 tmp_addr = ADDSI (tmp_addr, 4);
13705}
13706 {
13707 SI opval = tmp_addr;
13708 SET_H_GR (FLD (f_operand1), opval);
13709 written |= (1 << 6);
13710 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
13711 }
13712}
13713}
13714; tmp_tmp_mem; });
13715 {
13716 SI opval = ADDSI (GET_H_GR (FLD (f_operand2)), tmp_tmps);
13717 CPU (h_prefixreg_pre_v32) = opval;
13718 TRACE_RESULT (current_cpu, abuf, "prefixreg", 'x', opval);
13719 }
13720 {
13721 BI opval = 1;
13722 SET_H_INSN_PREFIXED_P (opval);
13723 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
13724 }
13725}
13726
13727 abuf->written = written;
13728#undef FLD
13729}
13730 NEXT (vpc);
13731
13732 CASE (sem, INSN_ADDO_CB) : /* addo.b [PC+],$Rd,ACR */
13733{
13734 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
13735 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
13736#define FLD(f) abuf->fields.sfmt_bound_cb.f
13737 int UNUSED written = 0;
13738 IADDR UNUSED pc = abuf->addr;
13739 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
13740
13741{
13742 {
13743 SI opval = ADDSI (GET_H_GR (FLD (f_operand2)), EXTQISI (TRUNCSIQI (FLD (f_indir_pc__byte))));
13744 CPU (h_prefixreg_pre_v32) = opval;
13745 TRACE_RESULT (current_cpu, abuf, "prefixreg", 'x', opval);
13746 }
13747 {
13748 BI opval = 1;
13749 SET_H_INSN_PREFIXED_P (opval);
13750 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
13751 }
13752}
13753
13754#undef FLD
13755}
13756 NEXT (vpc);
13757
13758 CASE (sem, INSN_ADDO_CW) : /* addo.w [PC+],$Rd,ACR */
13759{
13760 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
13761 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
13762#define FLD(f) abuf->fields.sfmt_bound_cw.f
13763 int UNUSED written = 0;
13764 IADDR UNUSED pc = abuf->addr;
13765 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
13766
13767{
13768 {
13769 SI opval = ADDSI (GET_H_GR (FLD (f_operand2)), EXTHISI (TRUNCSIHI (FLD (f_indir_pc__word))));
13770 CPU (h_prefixreg_pre_v32) = opval;
13771 TRACE_RESULT (current_cpu, abuf, "prefixreg", 'x', opval);
13772 }
13773 {
13774 BI opval = 1;
13775 SET_H_INSN_PREFIXED_P (opval);
13776 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
13777 }
13778}
13779
13780#undef FLD
13781}
13782 NEXT (vpc);
13783
13784 CASE (sem, INSN_ADDO_CD) : /* addo.d [PC+],$Rd,ACR */
13785{
13786 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
13787 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
13788#define FLD(f) abuf->fields.sfmt_bound_cd.f
13789 int UNUSED written = 0;
13790 IADDR UNUSED pc = abuf->addr;
13791 vpc = SEM_NEXT_VPC (sem_arg, pc, 6);
13792
13793{
13794 {
13795 SI opval = ADDSI (GET_H_GR (FLD (f_operand2)), FLD (f_indir_pc__dword));
13796 CPU (h_prefixreg_pre_v32) = opval;
13797 TRACE_RESULT (current_cpu, abuf, "prefixreg", 'x', opval);
13798 }
13799 {
13800 BI opval = 1;
13801 SET_H_INSN_PREFIXED_P (opval);
13802 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
13803 }
13804}
13805
13806#undef FLD
13807}
13808 NEXT (vpc);
13809
13810 CASE (sem, INSN_DIP_M) : /* dip [${Rs}${inc}] */
13811{
13812 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
13813 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
13814#define FLD(f) abuf->fields.sfmt_move_spr_mv10.f
13815 int UNUSED written = 0;
13816 IADDR UNUSED pc = abuf->addr;
13817 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
13818
13819{
13820 SI tmp_tmps;
13821 tmp_tmps = ({ SI tmp_addr;
13822 SI tmp_tmp_mem;
13823 BI tmp_postinc;
13824 tmp_postinc = FLD (f_memmode);
13825; tmp_addr = ((EQBI (GET_H_INSN_PREFIXED_P (), 0)) ? (GET_H_GR (FLD (f_operand1))) : (CPU (h_prefixreg_pre_v32)));
13826; tmp_tmp_mem = GETMEMSI (current_cpu, pc, tmp_addr);
13827; if (NEBI (tmp_postinc, 0)) {
13828{
13829if (EQBI (GET_H_INSN_PREFIXED_P (), 0)) {
13830 tmp_addr = ADDSI (tmp_addr, 4);
13831}
13832 {
13833 SI opval = tmp_addr;
13834 SET_H_GR (FLD (f_operand1), opval);
13835 written |= (1 << 5);
13836 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
13837 }
13838}
13839}
13840; tmp_tmp_mem; });
13841 {
13842 SI opval = tmp_tmps;
13843 CPU (h_prefixreg_pre_v32) = opval;
13844 TRACE_RESULT (current_cpu, abuf, "prefixreg", 'x', opval);
13845 }
13846 {
13847 BI opval = 1;
13848 SET_H_INSN_PREFIXED_P (opval);
13849 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
13850 }
13851}
13852
13853 abuf->written = written;
13854#undef FLD
13855}
13856 NEXT (vpc);
13857
13858 CASE (sem, INSN_DIP_C) : /* dip [PC+] */
13859{
13860 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
13861 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
392753ae 13862#define FLD(f) abuf->fields.sfmt_move_c_sprv10_p9.f
f6bcefef
HPN		 13863 int UNUSED written = 0;
13864 IADDR UNUSED pc = abuf->addr;
13865 vpc = SEM_NEXT_VPC (sem_arg, pc, 6);
13866
13867{
13868 {
13869 SI opval = FLD (f_indir_pc__dword);
13870 CPU (h_prefixreg_pre_v32) = opval;
13871 TRACE_RESULT (current_cpu, abuf, "prefixreg", 'x', opval);
13872 }
13873 {
13874 BI opval = 1;
13875 SET_H_INSN_PREFIXED_P (opval);
13876 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
13877 }
13878}
13879
13880#undef FLD
13881}
13882 NEXT (vpc);
13883
13884 CASE (sem, INSN_ADDI_ACR_B_R) : /* addi-acr.b ${Rs-dfield}.m,${Rd-sfield},ACR */
13885{
13886 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
13887 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
13888#define FLD(f) abuf->fields.sfmt_add_b_r.f
13889 int UNUSED written = 0;
13890 IADDR UNUSED pc = abuf->addr;
13891 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
13892
13893{
13894 {
13895 SI opval = ADDSI (GET_H_GR (FLD (f_operand1)), MULSI (GET_H_GR (FLD (f_operand2)), 1));
13896 CPU (h_prefixreg_pre_v32) = opval;
13897 TRACE_RESULT (current_cpu, abuf, "prefixreg", 'x', opval);
13898 }
13899 {
13900 BI opval = 1;
13901 SET_H_INSN_PREFIXED_P (opval);
13902 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
13903 }
13904}
13905
13906#undef FLD
13907}
13908 NEXT (vpc);
13909
13910 CASE (sem, INSN_ADDI_ACR_W_R) : /* addi-acr.w ${Rs-dfield}.m,${Rd-sfield},ACR */
13911{
13912 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
13913 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
13914#define FLD(f) abuf->fields.sfmt_add_b_r.f
13915 int UNUSED written = 0;
13916 IADDR UNUSED pc = abuf->addr;
13917 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
13918
13919{
13920 {
13921 SI opval = ADDSI (GET_H_GR (FLD (f_operand1)), MULSI (GET_H_GR (FLD (f_operand2)), 2));
13922 CPU (h_prefixreg_pre_v32) = opval;
13923 TRACE_RESULT (current_cpu, abuf, "prefixreg", 'x', opval);
13924 }
13925 {
13926 BI opval = 1;
13927 SET_H_INSN_PREFIXED_P (opval);
13928 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
13929 }
13930}
13931
13932#undef FLD
13933}
13934 NEXT (vpc);
13935
13936 CASE (sem, INSN_ADDI_ACR_D_R) : /* addi-acr.d ${Rs-dfield}.m,${Rd-sfield},ACR */
13937{
13938 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
13939 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
13940#define FLD(f) abuf->fields.sfmt_add_b_r.f
13941 int UNUSED written = 0;
13942 IADDR UNUSED pc = abuf->addr;
13943 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
13944
13945{
13946 {
13947 SI opval = ADDSI (GET_H_GR (FLD (f_operand1)), MULSI (GET_H_GR (FLD (f_operand2)), 4));
13948 CPU (h_prefixreg_pre_v32) = opval;
13949 TRACE_RESULT (current_cpu, abuf, "prefixreg", 'x', opval);
13950 }
13951 {
13952 BI opval = 1;
13953 SET_H_INSN_PREFIXED_P (opval);
13954 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
13955 }
13956}
13957
13958#undef FLD
13959}
13960 NEXT (vpc);
13961
13962 CASE (sem, INSN_BIAP_PC_B_R) : /* biap-pc.b ${Rs-dfield}.m,PC */
13963{
13964 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
13965 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
13966#define FLD(f) abuf->fields.sfmt_addoq.f
13967 int UNUSED written = 0;
13968 IADDR UNUSED pc = abuf->addr;
13969 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
13970
13971{
13972 {
13973 SI opval = ADDSI (ADDSI (pc, 4), MULSI (GET_H_GR (FLD (f_operand2)), 1));
13974 CPU (h_prefixreg_pre_v32) = opval;
13975 TRACE_RESULT (current_cpu, abuf, "prefixreg", 'x', opval);
13976 }
13977 {
13978 BI opval = 1;
13979 SET_H_INSN_PREFIXED_P (opval);
13980 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
13981 }
13982}
13983
13984#undef FLD
13985}
13986 NEXT (vpc);
13987
13988 CASE (sem, INSN_BIAP_PC_W_R) : /* biap-pc.w ${Rs-dfield}.m,PC */
13989{
13990 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
13991 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
13992#define FLD(f) abuf->fields.sfmt_addoq.f
13993 int UNUSED written = 0;
13994 IADDR UNUSED pc = abuf->addr;
13995 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
13996
13997{
13998 {
13999 SI opval = ADDSI (ADDSI (pc, 4), MULSI (GET_H_GR (FLD (f_operand2)), 2));
14000 CPU (h_prefixreg_pre_v32) = opval;
14001 TRACE_RESULT (current_cpu, abuf, "prefixreg", 'x', opval);
14002 }
14003 {
14004 BI opval = 1;
14005 SET_H_INSN_PREFIXED_P (opval);
14006 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
14007 }
14008}
14009
14010#undef FLD
14011}
14012 NEXT (vpc);
14013
14014 CASE (sem, INSN_BIAP_PC_D_R) : /* biap-pc.d ${Rs-dfield}.m,PC */
14015{
14016 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
14017 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
14018#define FLD(f) abuf->fields.sfmt_addoq.f
14019 int UNUSED written = 0;
14020 IADDR UNUSED pc = abuf->addr;
14021 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
14022
14023{
14024 {
14025 SI opval = ADDSI (ADDSI (pc, 4), MULSI (GET_H_GR (FLD (f_operand2)), 4));
14026 CPU (h_prefixreg_pre_v32) = opval;
14027 TRACE_RESULT (current_cpu, abuf, "prefixreg", 'x', opval);
14028 }
14029 {
14030 BI opval = 1;
14031 SET_H_INSN_PREFIXED_P (opval);
14032 TRACE_RESULT (current_cpu, abuf, "insn-prefixed-p", 'x', opval);
14033 }
14034}
14035
14036#undef FLD
14037}
14038 NEXT (vpc);
14039
14040
14041 }
14042 ENDSWITCH (sem) /* End of semantic switch. */
14043
14044 /* At this point `vpc' contains the next insn to execute. */
14045}
14046
14047#undef DEFINE_SWITCH
14048#endif /* DEFINE_SWITCH */
GDB Binutils - Deliverables
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