gas/
[deliverable/binutils-gdb.git] / sim / cris / sim-main.h
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1/* Main header for the CRIS simulator, based on the m32r header.
2 Copyright (C) 2004, 2005 Free Software Foundation, Inc.
3 Contributed by Axis Communications.
4
5This file is part of the GNU simulators.
6
7This program is free software; you can redistribute it and/or modify
8it under the terms of the GNU General Public License as published by
9the Free Software Foundation; either version 2 of the License, or
10(at your option) any later version.
11
12This program is distributed in the hope that it will be useful,
13but WITHOUT ANY WARRANTY; without even the implied warranty of
14MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15GNU General Public License for more details.
16
17You should have received a copy of the GNU General Public License along
18with this program; if not, write to the Free Software Foundation, Inc.,
1959 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
20
21/* All FIXME:s present in m32r apply here too; I just refuse to blindly
22 carry them over, as I don't know if they're really things that need
23 fixing. */
24
25#ifndef SIM_MAIN_H
26#define SIM_MAIN_H
27
28#define USING_SIM_BASE_H
29
30struct _sim_cpu;
31typedef struct _sim_cpu SIM_CPU;
32
33#include "symcat.h"
34#include "sim-basics.h"
35#include "cgen-types.h"
36#include "cris-desc.h"
37#include "cris-opc.h"
38#include "arch.h"
39
40/* These must be defined before sim-base.h. */
41typedef USI sim_cia;
42
43#define CIA_GET(cpu) CPU_PC_GET (cpu)
44#define CIA_SET(cpu,val) CPU_PC_SET ((cpu), (val))
45
46#define SIM_ENGINE_HALT_HOOK(sd, cpu, cia) \
47do { \
48 if (cpu) /* Null if ctrl-c. */ \
49 sim_pc_set ((cpu), (cia)); \
50} while (0)
51#define SIM_ENGINE_RESTART_HOOK(sd, cpu, cia) \
52do { \
53 sim_pc_set ((cpu), (cia)); \
54} while (0)
55
56#include "sim-base.h"
57#include "cgen-sim.h"
58#include "cris-sim.h"
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59\f
60struct cris_sim_mmapped_page {
61 USI addr;
62 struct cris_sim_mmapped_page *prev;
63};
64
65struct cris_thread_info {
66 /* Identifier for this thread. */
67 unsigned int threadid;
68
69 /* Identifier for parent thread. */
70 unsigned int parent_threadid;
71
72 /* Signal to send to parent at exit. */
73 int exitsig;
74
75 /* Exit status. */
76 int exitval;
77
78 /* Only as storage to return the "set" value to the "get" method.
79 I'm not sure whether this is useful per-thread. */
80 USI priority;
81
82 struct
83 {
84 USI altstack;
85 USI options;
86
87 char action;
88 char pending;
89 char blocked;
90 char blocked_suspendsave;
91 /* The handler stub unblocks the signal, so we don't need a separate
92 "temporary save" for that. */
93 } sigdata[64];
94
95 /* Register context, swapped with _sim_cpu.cpu_data. */
96 void *cpu_context;
97
98 /* Similar, temporary copy for the state at a signal call. */
99 void *cpu_context_atsignal;
100
101 /* The number of the reading and writing ends of a pipe if waiting for
102 the reader, else 0. */
103 int pipe_read_fd;
104 int pipe_write_fd;
105
106 /* System time at last context switch when this thread ran. */
107 USI last_execution;
108
109 /* Nonzero if we just executed a syscall. */
110 char at_syscall;
111
112 /* Nonzero if any of sigaction[0..64].pending is true. */
113 char sigpending;
114
115 /* Nonzero if in (rt_)sigsuspend call. Cleared at every sighandler
116 call. */
117 char sigsuspended;
118};
119
120struct _sim_cpu {
121 /* sim/common cpu base. */
122 sim_cpu_base base;
123
124 /* Static parts of cgen. */
125 CGEN_CPU cgen_cpu;
126
127 CRIS_MISC_PROFILE cris_misc_profile;
128#define CPU_CRIS_MISC_PROFILE(cpu) (& (cpu)->cris_misc_profile)
129
130 /* Copy of previous data; only valid when emitting trace-data after
131 each insn. */
132 CRIS_MISC_PROFILE cris_prev_misc_profile;
133#define CPU_CRIS_PREV_MISC_PROFILE(cpu) (& (cpu)->cris_prev_misc_profile)
134
135 /* Simulator environment data. */
136 USI endmem;
137 USI endbrk;
138 USI stack_low;
139 struct cris_sim_mmapped_page *highest_mmapped_page;
140
141 /* Number of syscalls performed or in progress, counting once extra
142 for every time a blocked thread (internally, when threading) polls
143 the (pipe) blockage. By default, this is also a time counter: to
144 minimize performance noise from minor compiler changes,
145 instructions take no time and syscalls always take 1ms. */
146 USI syscalls;
147
148 /* Number of execution contexts minus one. */
149 int m1threads;
150
151 /* Current thread number; index into thread_data when m1threads != 0. */
152 int threadno;
153
154 /* When a new thread is created, it gets a unique number, which we
155 count here. */
156 int max_threadid;
157
158 /* Thread-specific info, for simulator thread support, created at
159 "clone" call. Vector of [threads+1] when m1threads > 0. */
160 struct cris_thread_info *thread_data;
161
162 /* "If CLONE_SIGHAND is set, the calling process and the child pro-
163 cesses share the same table of signal handlers." ... "However, the
164 calling process and child processes still have distinct signal
165 masks and sets of pending signals." See struct cris_thread_info
166 for sigmasks and sigpendings. */
167 USI sighandler[64];
168
169 /* Function for initializing CPU thread context, which varies in size
170 with each CPU model. They should be in some constant parts or
171 initialized in *_init_cpu, but we can't modify that for now. */
172 void* (*make_thread_cpu_data) (SIM_CPU *, void *);
173 size_t thread_cpu_data_size;
174
175 /* CPU-model specific parts go here.
176 Note that in files that don't need to access these pieces WANT_CPU_FOO
177 won't be defined and thus these parts won't appear. This is ok in the
178 sense that things work. It is a source of bugs though.
179 One has to of course be careful to not take the size of this
180 struct and no structure members accessed in non-cpu specific files can
181 go after here. */
182#if defined (WANT_CPU_CRISV0F)
183 CRISV0F_CPU_DATA cpu_data;
184#elif defined (WANT_CPU_CRISV3F)
185 CRISV3F_CPU_DATA cpu_data;
186#elif defined (WANT_CPU_CRISV8F)
187 CRISV8F_CPU_DATA cpu_data;
188#elif defined (WANT_CPU_CRISV10F)
189 CRISV10F_CPU_DATA cpu_data;
190#elif defined (WANT_CPU_CRISV32F)
191 CRISV32F_CPU_DATA cpu_data;
192#else
193 /* Let's assume all cpu_data have the same alignment requirements, so
194 they all are laid out at the same address. Since we can't get the
195 exact definition, we also assume that it has no higher alignment
196 requirements than a vector of, say, 16 pointers. (A single member
197 is often special-cased, and possibly two as well so we don't want
198 that). */
199 union { void *dummy[16]; } cpu_data_placeholder;
200#endif
201};
202\f
203/* The sim_state struct. */
204
205struct sim_state {
206 sim_cpu *cpu;
207#define STATE_CPU(sd, n) (/*&*/ (sd)->cpu)
208
209 CGEN_STATE cgen_state;
210
211 sim_state_base base;
212};
213\f
214/* Misc. */
215
216/* Catch address exceptions. */
217extern SIM_CORE_SIGNAL_FN cris_core_signal;
218#define SIM_CORE_SIGNAL(SD,CPU,CIA,MAP,NR_BYTES,ADDR,TRANSFER,ERROR) \
219cris_core_signal ((SD), (CPU), (CIA), (MAP), (NR_BYTES), (ADDR), \
220 (TRANSFER), (ERROR))
221
222/* Default memory size. */
223#define CRIS_DEFAULT_MEM_SIZE 0x800000 /* 8M */
224
225extern device cris_devices;
226
227#endif /* SIM_MAIN_H */
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