[deliverable/binutils-gdb.git] / sim / d10v / d10v_sim.h

#include <stdio.h>
#include <ctype.h>
#include <limits.h>
#include "ansidecl.h"
#include "callback.h"
#include "opcode/d10v.h"

#define DEBUG_TRACE		0x00000001
#define DEBUG_VALUES		0x00000002
#define DEBUG_MEMSIZE		0x00000004
#define DEBUG_INSTRUCTION	0x00000008

extern int d10v_debug;

#if UCHAR_MAX == 255
typedef unsigned char uint8;
typedef signed char int8;
#else
#error "Char is not an 8-bit type"
#endif

#if SHRT_MAX == 32767
typedef unsigned short uint16;
typedef signed short int16;
#else
#error "Short is not a 16-bit type"
#endif

#if INT_MAX == 2147483647
typedef unsigned int uint32;
typedef signed int int32;

#elif LONG_MAX == 2147483647
typedef unsigned long uint32;
typedef signed long int32;

#else
#error "Neither int nor long is a 32-bit type"
#endif

#if LONG_MAX > 2147483647
typedef unsigned long uint64;
typedef signed long int64;

#elif __GNUC__
typedef unsigned long long uint64;
typedef signed long long int64;

#else
#error "Can't find an appropriate 64-bit type"
#endif

/* FIXME: D10V defines */
typedef uint16 reg_t;

struct simops 
{
  long opcode;
  long mask;
  int format;
  int cycles;
  int unit;
  int exec_type;
  void (*func)();
  int numops;
  int operands[9];
};

enum _ins_type
{
  INS_UNKNOWN,
  INS_LEFT,
  INS_RIGHT,
  INS_LEFT_PARALLEL,
  INS_RIGHT_PARALLEL,
  INS_LONG,
  INS_MAX
};

extern long ins_type_counters[ (int)INS_MAX ];
extern long left_nops, right_nops;

struct _state
{
  reg_t regs[16];		/* general-purpose registers */
  reg_t cregs[16];	/* control registers */
  int64 a[2];	/* accumulators */
  uint8 SM;
  uint8 EA;
  uint8 DB;
  uint8 IE;
  uint8 RP;
  uint8 MD;
  uint8 FX;
  uint8 ST;
  uint8 F0;
  uint8 F1;
  uint8 C;
  uint8 exe;
  uint8 *imem;
  uint8 *dmem;
  int   exception;
  enum _ins_type ins_type;
} State;

extern host_callback *d10v_callback;
extern uint16 OP[4];
extern struct simops Simops[];

#define PC	(State.cregs[2])
#define PSW	(State.cregs[0])
#define BPSW	(State.cregs[1])
#define BPC	(State.cregs[3])
#define RPT_C	(State.cregs[7])
#define RPT_S	(State.cregs[8])
#define RPT_E	(State.cregs[9])
#define MOD_S	(State.cregs[10])
#define MOD_E	(State.cregs[11])
#define IBA	(State.cregs[14])

#define SEXT3(x)	((((x)&0x7)^(~3))+4)	

/* sign-extend a 4-bit number */
#define SEXT4(x)	((((x)&0xf)^(~7))+8)	

/* sign-extend an 8-bit number */
#define SEXT8(x)	((((x)&0xff)^(~0x7f))+0x80)

/* sign-extend a 16-bit number */
#define SEXT16(x)	((((x)&0xffff)^(~0x7fff))+0x8000)

/* sign-extend a 32-bit number */
#define SEXT32(x)	((((x)&0xffffffffLL)^(~0x7fffffffLL))+0x80000000LL)

/* sign extend a 40 bit number */
#define SEXT40(x)	((((x)&0xffffffffffLL)^(~0x7fffffffffLL))+0x8000000000LL)

/* sign extend a 44 bit number */
#define SEXT44(x)	((((x)&0xfffffffffffLL)^(~0x7ffffffffffLL))+0x80000000000LL)

/* sign extend a 60 bit number */
#define SEXT60(x)	((((x)&0xfffffffffffffffLL)^(~0x7ffffffffffffffLL))+0x800000000000000LL)

#define MAX32	0x7fffffffLL
#define MIN32	0xff80000000LL
#define MASK32	0xffffffffLL
#define MASK40	0xffffffffffLL

#define INC_ADDR(x,i)	x = ((State.MD && x == MOD_E) ? MOD_S : (x)+(i))

#define	RB(x)	(*((uint8 *)((x)+State.imem)))
#define SB(addr,data)	( RB(addr) = (data & 0xff))

#ifdef WORDS_BIGENDIAN

#define RW(x)			(*((uint16 *)((x)+State.imem)))
#define RLW(x)			(*((uint32 *)((x)+State.imem)))
#define SW(addr,data)		RW(addr)=data
#define SLW(addr,data)		RLW(addr)=data
#define READ_16(x)		(*((int16 *)(x)))
#define WRITE_16(addr,data)	(*(int16 *)(addr)=data)	
#define READ_64(x)		(*((int64 *)(x)))
#define WRITE_64(addr,data)	(*(int64 *)(addr)=data)	

#else

uint32 get_longword PARAMS ((uint8 *));
uint16 get_word PARAMS ((uint8 *));
int64 get_longlong PARAMS ((uint8 *));
void write_word PARAMS ((uint8 *addr, uint16 data));
void write_longword PARAMS ((uint8 *addr, uint32 data));
void write_longlong PARAMS ((uint8 *addr, int64 data));

#define SW(addr,data)		write_word((long)(addr)+State.imem,data)
#define RW(x)			get_word((long)(x)+State.imem)
#define SLW(addr,data)  	write_longword((long)(addr)+State.imem,data)
#define RLW(x)			get_longword((long)(x)+State.imem)
#define READ_16(x)		get_word(x)
#define WRITE_16(addr,data)	write_word(addr,data)
#define READ_64(x)		get_longlong(x)
#define WRITE_64(addr,data)	write_longlong(addr,data)

#endif /* not WORDS_BIGENDIAN */
Commit	Line	Data
2934d1c9 MH	1	#include <stdio.h>
2934d1c9 MH	2	#include <ctype.h>
7eebfc62	3	#include <limits.h>
2934d1c9	4	#include "ansidecl.h"
87178dbd	5	#include "callback.h"
2934d1c9 MH	6	#include "opcode/d10v.h"
2934d1c9 MH	7
7eebfc62 MM	8	#define DEBUG_TRACE 0x00000001
	9	#define DEBUG_VALUES 0x00000002
	10	#define DEBUG_MEMSIZE 0x00000004
	11	#define DEBUG_INSTRUCTION 0x00000008
87178dbd	12
7eebfc62	13	extern int d10v_debug;
87178dbd	14
7eebfc62	15	#if UCHAR_MAX == 255
2934d1c9	16	typedef unsigned char uint8;
2934d1c9	17	typedef signed char int8;
7eebfc62 MM	18	#else
	19	#error "Char is not an 8-bit type"
	20	#endif
	21
	22	#if SHRT_MAX == 32767
	23	typedef unsigned short uint16;
2934d1c9	24	typedef signed short int16;
7eebfc62 MM	25	#else
	26	#error "Short is not a 16-bit type"
	27	#endif
	28
	29	#if INT_MAX == 2147483647
	30	typedef unsigned int uint32;
2934d1c9	31	typedef signed int int32;
7eebfc62 MM	32
	33	#elif LONG_MAX == 2147483647
	34	typedef unsigned long uint32;
	35	typedef signed long int32;
	36
	37	#else
	38	#error "Neither int nor long is a 32-bit type"
	39	#endif
	40
	41	#if LONG_MAX > 2147483647
	42	typedef unsigned long uint64;
	43	typedef signed long int64;
	44
	45	#elif __GNUC__
	46	typedef unsigned long long uint64;
2934d1c9 MH	47	typedef signed long long int64;
2934d1c9 MH	48
7eebfc62 MM	49	#else
	50	#error "Can't find an appropriate 64-bit type"
	51	#endif
	52
2934d1c9 MH	53	/* FIXME: D10V defines */
	54	typedef uint16 reg_t;
	55
	56	struct simops
	57	{
	58	long opcode;
	59	long mask;
	60	int format;
	61	int cycles;
	62	int unit;
	63	int exec_type;
	64	void (*func)();
	65	int numops;
	66	int operands[9];
	67	};
	68
87178dbd MM	69	enum _ins_type
	70	{
	71	INS_UNKNOWN,
	72	INS_LEFT,
	73	INS_RIGHT,
	74	INS_LEFT_PARALLEL,
	75	INS_RIGHT_PARALLEL,
7eebfc62 MM	76	INS_LONG,
7eebfc62 MM	77	INS_MAX
87178dbd MM	78	};
87178dbd MM	79
7eebfc62 MM	80	extern long ins_type_counters[ (int)INS_MAX ];
	81	extern long left_nops, right_nops;
	82
2934d1c9 MH	83	struct _state
	84	{
	85	reg_t regs[16]; /* general-purpose registers */
4f425a32	86	reg_t cregs[16]; /* control registers */
2934d1c9 MH	87	int64 a[2]; /* accumulators */
	88	uint8 SM;
	89	uint8 EA;
	90	uint8 DB;
	91	uint8 IE;
	92	uint8 RP;
	93	uint8 MD;
	94	uint8 FX;
	95	uint8 ST;
	96	uint8 F0;
	97	uint8 F1;
	98	uint8 C;
	99	uint8 exe;
	100	uint8 *imem;
	101	uint8 *dmem;
4f425a32	102	int exception;
87178dbd	103	enum _ins_type ins_type;
2934d1c9 MH	104	} State;
2934d1c9 MH	105
87178dbd	106	extern host_callback *d10v_callback;
2934d1c9 MH	107	extern uint16 OP[4];
	108	extern struct simops Simops[];
	109
	110	#define PC (State.cregs[2])
	111	#define PSW (State.cregs[0])
	112	#define BPSW (State.cregs[1])
	113	#define BPC (State.cregs[3])
	114	#define RPT_C (State.cregs[7])
	115	#define RPT_S (State.cregs[8])
	116	#define RPT_E (State.cregs[9])
	117	#define MOD_S (State.cregs[10])
	118	#define MOD_E (State.cregs[11])
	119	#define IBA (State.cregs[14])
	120
	121	#define SEXT3(x) ((((x)&0x7)^(~3))+4)
	122
	123	/* sign-extend a 4-bit number */
	124	#define SEXT4(x) ((((x)&0xf)^(~7))+8)
	125
	126	/* sign-extend an 8-bit number */
	127	#define SEXT8(x) ((((x)&0xff)^(~0x7f))+0x80)
	128
	129	/* sign-extend a 16-bit number */
	130	#define SEXT16(x) ((((x)&0xffff)^(~0x7fff))+0x8000)
	131
4f425a32 MH	132	/* sign-extend a 32-bit number */
	133	#define SEXT32(x) ((((x)&0xffffffffLL)^(~0x7fffffffLL))+0x80000000LL)
	134
4c38885c MH	135	/* sign extend a 40 bit number */
	136	#define SEXT40(x) ((((x)&0xffffffffffLL)^(~0x7fffffffffLL))+0x8000000000LL)
	137
d70b4d42 MH	138	/* sign extend a 44 bit number */
	139	#define SEXT44(x) ((((x)&0xfffffffffffLL)^(~0x7ffffffffffLL))+0x80000000000LL)
	140
	141	/* sign extend a 60 bit number */
	142	#define SEXT60(x) ((((x)&0xfffffffffffffffLL)^(~0x7ffffffffffffffLL))+0x800000000000000LL)
	143
2934d1c9 MH	144	#define MAX32 0x7fffffffLL
	145	#define MIN32 0xff80000000LL
	146	#define MASK32 0xffffffffLL
	147	#define MASK40 0xffffffffffLL
2934d1c9	148
4f425a32 MH	149	#define INC_ADDR(x,i) x = ((State.MD && x == MOD_E) ? MOD_S : (x)+(i))
4f425a32 MH	150
2934d1c9	151	#define RB(x) (((uint8 )((x)+State.imem)))
4c38885c	152	#define SB(addr,data) ( RB(addr) = (data & 0xff))
2934d1c9 MH	153
	154	#ifdef WORDS_BIGENDIAN
	155
d70b4d42 MH	156	#define RW(x) (((uint16 )((x)+State.imem)))
	157	#define RLW(x) (((uint32 )((x)+State.imem)))
	158	#define SW(addr,data) RW(addr)=data
87178dbd	159	#define SLW(addr,data) RLW(addr)=data
d70b4d42 MH	160	#define READ_16(x) (((int16 )(x)))
	161	#define WRITE_16(addr,data) ((int16 )(addr)=data)
	162	#define READ_64(x) (((int64 )(x)))
	163	#define WRITE_64(addr,data) ((int64 )(addr)=data)
2934d1c9 MH	164
	165	#else
	166
d70b4d42 MH	167	uint32 get_longword PARAMS ((uint8 *));
	168	uint16 get_word PARAMS ((uint8 *));
	169	int64 get_longlong PARAMS ((uint8 *));
	170	void write_word PARAMS ((uint8 *addr, uint16 data));
87178dbd	171	void write_longword PARAMS ((uint8 *addr, uint32 data));
d70b4d42 MH	172	void write_longlong PARAMS ((uint8 *addr, int64 data));
	173
	174	#define SW(addr,data) write_word((long)(addr)+State.imem,data)
	175	#define RW(x) get_word((long)(x)+State.imem)
87178dbd	176	#define SLW(addr,data) write_longword((long)(addr)+State.imem,data)
d70b4d42 MH	177	#define RLW(x) get_longword((long)(x)+State.imem)
	178	#define READ_16(x) get_word(x)
	179	#define WRITE_16(addr,data) write_word(addr,data)
	180	#define READ_64(x) get_longlong(x)
	181	#define WRITE_64(addr,data) write_longlong(addr,data)
2934d1c9 MH	182
2934d1c9 MH	183	#endif /* not WORDS_BIGENDIAN */