[deliverable/binutils-gdb.git] / sim / d10v / interp.c

#include <signal.h>
#include "sysdep.h"
#include "bfd.h"
#include "remote-sim.h"
#include "callback.h"

#include "d10v_sim.h"

#define IMEM_SIZE 18	/* D10V instruction memory size is 18 bits */
#define DMEM_SIZE 16	/* Data memory */

uint16 OP[4];

static struct hash_entry *lookup_hash PARAMS ((uint32 ins, int size));

#define MAX_HASH  63
struct hash_entry
{
  struct hash_entry *next;
  long opcode;
  long mask;
  struct simops *ops;
};

struct hash_entry hash_table[MAX_HASH+1];

static long 
hash(insn, format)
     long insn;
     int format;
{
  if (format & LONG_OPCODE)
    return ((insn & 0x3F000000) >> 24);
  else
    return((insn & 0x7E00) >> 9);
}

static struct hash_entry *
lookup_hash (ins, size)
     uint32 ins;
     int size;
{
  struct hash_entry *h;

  if (size)
    h = &hash_table[(ins & 0x3F000000) >> 24];
  else
    h = &hash_table[(ins & 0x7E00) >> 9];

  while ( (ins & h->mask) != h->opcode)
    {
      if (h->next == NULL)
	{
	  printf ("ERROR looking up hash for %x\n",ins);
	  exit(1);
	}
      h = h->next;
    }
  return (h);
}

uint32
get_longword (x)
      uint8 *x;
{
  uint8 *a = x;
  return (a[0]<<24) + (a[1]<<16) + (a[2]<<8) + (a[3]);
}

int64
get_longlong (x)
      uint8 *x;
{
  uint8 *a = x;
  return ((int64)a[0]<<56) + ((int64)a[1]<<48) + ((int64)a[2]<<40) + ((int64)a[3]<<32) +
    ((int64)a[4]<< 24) + ((int64)a[5]<<16) + ((int64)a[6]<<8) + (int64)a[7];
}

uint16
get_word (x)
      uint8 *x;
{
  uint8 *a = x;
  return ((uint16)a[0]<<8) + a[1];
}

void
write_word (addr, data)
     uint8 *addr;
     uint16 data;
{
  uint8 *a = addr;
  a[0] = data >> 8;
  a[1] = data & 0xff;
}

void
write_longlong (addr, data)
     uint8 *addr;
     int64 data;
{
  uint8 *a = addr;
  a[0] = data >> 56;
  a[1] = (data >> 48) & 0xff;
  a[2] = (data >> 40) & 0xff;
  a[3] = (data >> 32) & 0xff;
  a[4] = (data >> 24) & 0xff;
  a[5] = (data >> 16) & 0xff;
  a[6] = (data >> 8) & 0xff;
  a[7] = data & 0xff;
}


static void
get_operands (struct simops *s, uint32 ins)
{
  int i, shift, bits, flags;
  uint32 mask;
  for (i=0; i < s->numops; i++)
    {
      shift = s->operands[3*i];
      bits = s->operands[3*i+1];
      flags = s->operands[3*i+2];
      mask = 0x7FFFFFFF >> (31 - bits);
      OP[i] = (ins >> shift) & mask;
    }
}

static void
do_long (ins)
     uint32 ins;
{
  struct hash_entry *h;
  /*  printf ("do_long %x\n",ins); */
  h = lookup_hash (ins, 1);
  get_operands (h->ops, ins);
  (h->ops->func)();
}
static void
do_2_short (ins1, ins2)
     uint16 ins1, ins2;
{
  struct hash_entry *h;
  /*  printf ("do_2_short %x -> %x\n",ins1,ins2); */
  h = lookup_hash (ins1, 0);
  get_operands (h->ops, ins1);
  (h->ops->func)();
  h = lookup_hash (ins2, 0);
  get_operands (h->ops, ins2);
  (h->ops->func)();
}
static void
do_parallel (ins1, ins2)
     uint16 ins1, ins2;
{
  struct hash_entry *h1, *h2;
  /* printf ("do_parallel %x || %x\n",ins1,ins2); */
  h1 = lookup_hash (ins1, 0);
  h2 = lookup_hash (ins2, 0);

  if (h1->ops->exec_type == PARONLY)
    {
      get_operands (h1->ops, ins1);
      (h1->ops->func)();
      if (State.exe)
	{
	  get_operands (h2->ops, ins2);
	  (h2->ops->func)();
	}
    }
  else if (h2->ops->exec_type == PARONLY)
    {
      get_operands (h2->ops, ins2);
      (h2->ops->func)();
      if (State.exe)
	{
	  get_operands (h1->ops, ins1);
	  (h1->ops->func)();
	}
    }
  else
    {
      get_operands (h1->ops, ins1);
      (h1->ops->func)();
      get_operands (h2->ops, ins2);
      (h2->ops->func)();
    }
}
 

void
sim_size (power)
     int power;

{
  if (State.imem)
    {
      free (State.imem);
      free (State.dmem);
    }

  State.imem = (uint8 *)calloc(1,1<<IMEM_SIZE);
  State.dmem = (uint8 *)calloc(1,1<<DMEM_SIZE);
  if (!State.imem || !State.dmem )
    {
      fprintf (stderr,"Memory allocation failed.\n");
      exit(1);
    }
  printf ("Allocated %d bytes instruction memory and\n",1<<IMEM_SIZE);
  printf ("          %d bytes data memory.\n",1<<DMEM_SIZE);
}

static void
init_system ()
{
  if (!State.imem)
    sim_size(1);
}

int
sim_write (addr, buffer, size)
     SIM_ADDR addr;
     unsigned char *buffer;
     int size;
{
  int i;
  init_system ();

  /* printf ("sim_write %d bytes to 0x%x\n",size,addr); */
  for (i = 0; i < size; i++)
    {
      State.imem[i+addr] = buffer[i]; 
    }
  return size;
}

void
sim_open (args)
     char *args;
{
  struct simops *s;
  struct hash_entry *h, *prev;
  if (args != NULL)
      printf ("sim_open %s\n",args);

  /* put all the opcodes in the hash table */
  for (s = Simops; s->func; s++)
    {
      h = &hash_table[hash(s->opcode,s->format)];
      
      /* go to the last entry in the chain */
      while (h->next)
	  h = h->next;

      if (h->ops)
	{
	  h->next = calloc(1,sizeof(struct hash_entry));
	  h = h->next;
	}
      h->ops = s;
      h->mask = s->mask;
      h->opcode = s->opcode;
    }
}


void
sim_close (quitting)
     int quitting;
{
  /* nothing to do */
}

void
sim_set_profile (n)
     int n;
{
  printf ("sim_set_profile %d\n",n);
}

void
sim_set_profile_size (n)
     int n;
{
  printf ("sim_set_profile_size %d\n",n);
}

void
sim_resume (step, siggnal)
     int step, siggnal;
{
  uint32 inst;
  int i;
  reg_t oldpc;

/*   printf ("sim_resume (%d,%d)  PC=0x%x\n",step,siggnal,PC); */

 if (step)
   State.exception = SIGTRAP;
 else
   State.exception = 0;
 
 do
   {
     inst = RLW (PC << 2); 
     oldpc = PC;
     switch (inst & 0xC0000000)
       {
       case 0xC0000000:
	 /* long instruction */
	 do_long (inst & 0x3FFFFFFF);
	 break;
       case 0x80000000:
	 /* R -> L */
	 do_2_short ( inst & 0x7FFF, (inst & 0x3FFF8000) >> 15);
	 break;
       case 0x40000000:
	 /* L -> R */
	 do_2_short ((inst & 0x3FFF8000) >> 15, inst & 0x7FFF);
	 break;
       case 0:
	 do_parallel ((inst & 0x3FFF8000) >> 15, inst & 0x7FFF);
	 break;
       }
     
     if (State.RP && PC == RPT_E)
       {
	 RPT_C -= 1;
	 if (RPT_C == 0)
	   State.RP = 0;
	 else
	   PC = RPT_S;
       }
     
     /* FIXME */
     if (PC == oldpc)
       PC++;
   } 
 while (!State.exception);
}

int
sim_trace ()
{
  printf ("sim_trace\n");
  return 0;
}

void
sim_info (verbose)
     int verbose;
{
  printf ("sim_info\n");
}

void
sim_create_inferior (start_address, argv, env)
     SIM_ADDR start_address;
     char **argv;
     char **env;
{
  printf ("sim_create_inferior:  PC=0x%x\n",start_address);
  PC = start_address >> 2;
}


void
sim_kill ()
{
  /* nothing to do */
}

void
sim_set_callbacks(p)
     host_callback *p;
{
  printf ("sim_set_callbacks\n");
  /* callback = p; */
}

void
sim_stop_reason (reason, sigrc)
     enum sim_stop *reason;
     int *sigrc;
{
/*   printf ("sim_stop_reason:  PC=0x%x\n",PC<<2); */

  if (State.exception == SIGQUIT)
    {
      *reason = sim_exited;
      *sigrc = State.exception;
    }
  else
    {
      *reason = sim_stopped;
      *sigrc = State.exception;
    } 
}

void
sim_fetch_register (rn, memory)
     int rn;
     unsigned char *memory;
{
  if (rn > 31)
    {
      WRITE_64 (memory, State.a[rn-32]);
      /* printf ("sim_fetch_register %d 0x%llx\n",rn,State.a[rn-32]); */
    }
  else
    {
      WRITE_16 (memory, State.regs[rn]);
      /* printf ("sim_fetch_register %d 0x%x\n",rn,State.regs[rn]); */
    }
}
 
void
sim_store_register (rn, memory)
     int rn;
     unsigned char *memory;
{
  if (rn > 31)
    {
      State.a[rn-32] =  READ_64 (memory) & MASK40;
      /* printf ("store: a%d=0x%llx\n",rn-32,State.a[rn-32]); */
    }
  else
    {
      State.regs[rn]= READ_16 (memory);
      /* printf ("store: r%d=0x%x\n",rn,State.regs[rn]); */
    }
}

sim_read (addr, buffer, size)
     SIM_ADDR addr;
     unsigned char *buffer;
     int size;
{
  int i;
  for (i = 0; i < size; i++)
    {
      buffer[i] = State.imem[addr + i];
    }
  return size;
} 

void
sim_do_command (cmd)
     char *cmd;
{ 
  printf("sim_do_command: %s\n",cmd);
}

int
sim_load (prog, from_tty)
     char *prog;
     int from_tty;
{
  /* Return nonzero so GDB will handle it.  */
  return 1;
}
Commit	Line	Data
d70b4d42	1	#include <signal.h>
2934d1c9 MH	2	#include "sysdep.h"
	3	#include "bfd.h"
	4	#include "remote-sim.h"
	5	#include "callback.h"
	6
	7	#include "d10v_sim.h"
	8
	9	#define IMEM_SIZE 18 /* D10V instruction memory size is 18 bits */
	10	#define DMEM_SIZE 16 /* Data memory */
	11
	12	uint16 OP[4];
	13
	14	static struct hash_entry *lookup_hash PARAMS ((uint32 ins, int size));
	15
	16	#define MAX_HASH 63
	17	struct hash_entry
	18	{
	19	struct hash_entry *next;
	20	long opcode;
	21	long mask;
	22	struct simops *ops;
	23	};
	24
	25	struct hash_entry hash_table[MAX_HASH+1];
	26
	27	static long
	28	hash(insn, format)
	29	long insn;
	30	int format;
	31	{
	32	if (format & LONG_OPCODE)
	33	return ((insn & 0x3F000000) >> 24);
	34	else
	35	return((insn & 0x7E00) >> 9);
	36	}
	37
	38	static struct hash_entry *
	39	lookup_hash (ins, size)
	40	uint32 ins;
	41	int size;
	42	{
	43	struct hash_entry *h;
	44
	45	if (size)
	46	h = &hash_table[(ins & 0x3F000000) >> 24];
	47	else
	48	h = &hash_table[(ins & 0x7E00) >> 9];
	49
	50	while ( (ins & h->mask) != h->opcode)
	51	{
	52	if (h->next == NULL)
	53	{
	54	printf ("ERROR looking up hash for %x\n",ins);
	55	exit(1);
	56	}
	57	h = h->next;
	58	}
	59	return (h);
	60	}
	61
	62	uint32
d70b4d42 MH	63	get_longword (x)
d70b4d42 MH	64	uint8 *x;
2934d1c9	65	{
d70b4d42	66	uint8 *a = x;
2934d1c9 MH	67	return (a[0]<<24) + (a[1]<<16) + (a[2]<<8) + (a[3]);
	68	}
	69
d70b4d42 MH	70	int64
	71	get_longlong (x)
	72	uint8 *x;
	73	{
	74	uint8 *a = x;
	75	return ((int64)a[0]<<56) + ((int64)a[1]<<48) + ((int64)a[2]<<40) + ((int64)a[3]<<32) +
	76	((int64)a[4]<< 24) + ((int64)a[5]<<16) + ((int64)a[6]<<8) + (int64)a[7];
	77	}
	78
2934d1c9	79	uint16
d70b4d42 MH	80	get_word (x)
d70b4d42 MH	81	uint8 *x;
2934d1c9	82	{
d70b4d42 MH	83	uint8 *a = x;
d70b4d42 MH	84	return ((uint16)a[0]<<8) + a[1];
2934d1c9 MH	85	}
	86
	87	void
d70b4d42 MH	88	write_word (addr, data)
	89	uint8 *addr;
	90	uint16 data;
2934d1c9	91	{
d70b4d42	92	uint8 *a = addr;
2934d1c9 MH	93	a[0] = data >> 8;
	94	a[1] = data & 0xff;
	95	}
	96
d70b4d42 MH	97	void
	98	write_longlong (addr, data)
	99	uint8 *addr;
	100	int64 data;
	101	{
	102	uint8 *a = addr;
	103	a[0] = data >> 56;
	104	a[1] = (data >> 48) & 0xff;
	105	a[2] = (data >> 40) & 0xff;
	106	a[3] = (data >> 32) & 0xff;
	107	a[4] = (data >> 24) & 0xff;
	108	a[5] = (data >> 16) & 0xff;
	109	a[6] = (data >> 8) & 0xff;
	110	a[7] = data & 0xff;
	111	}
	112
2934d1c9 MH	113
	114	static void
	115	get_operands (struct simops *s, uint32 ins)
	116	{
	117	int i, shift, bits, flags;
	118	uint32 mask;
	119	for (i=0; i < s->numops; i++)
	120	{
	121	shift = s->operands[3*i];
	122	bits = s->operands[3*i+1];
	123	flags = s->operands[3*i+2];
	124	mask = 0x7FFFFFFF >> (31 - bits);
	125	OP[i] = (ins >> shift) & mask;
	126	}
	127	}
	128
	129	static void
	130	do_long (ins)
	131	uint32 ins;
	132	{
	133	struct hash_entry *h;
	134	/* printf ("do_long %x\n",ins); */
	135	h = lookup_hash (ins, 1);
	136	get_operands (h->ops, ins);
	137	(h->ops->func)();
	138	}
	139	static void
	140	do_2_short (ins1, ins2)
	141	uint16 ins1, ins2;
	142	{
	143	struct hash_entry *h;
	144	/* printf ("do_2_short %x -> %x\n",ins1,ins2); */
	145	h = lookup_hash (ins1, 0);
	146	get_operands (h->ops, ins1);
	147	(h->ops->func)();
	148	h = lookup_hash (ins2, 0);
	149	get_operands (h->ops, ins2);
	150	(h->ops->func)();
	151	}
	152	static void
	153	do_parallel (ins1, ins2)
	154	uint16 ins1, ins2;
	155	{
	156	struct hash_entry h1, h2;
d70b4d42	157	/* printf ("do_parallel %x \|\| %x\n",ins1,ins2); */
2934d1c9	158	h1 = lookup_hash (ins1, 0);
2934d1c9	159	h2 = lookup_hash (ins2, 0);
d70b4d42	160
2934d1c9 MH	161	if (h1->ops->exec_type == PARONLY)
2934d1c9 MH	162	{
d70b4d42	163	get_operands (h1->ops, ins1);
2934d1c9 MH	164	(h1->ops->func)();
2934d1c9 MH	165	if (State.exe)
d70b4d42 MH	166	{
	167	get_operands (h2->ops, ins2);
	168	(h2->ops->func)();
	169	}
2934d1c9 MH	170	}
	171	else if (h2->ops->exec_type == PARONLY)
	172	{
d70b4d42	173	get_operands (h2->ops, ins2);
2934d1c9 MH	174	(h2->ops->func)();
2934d1c9 MH	175	if (State.exe)
d70b4d42 MH	176	{
	177	get_operands (h1->ops, ins1);
	178	(h1->ops->func)();
	179	}
2934d1c9 MH	180	}
	181	else
	182	{
d70b4d42	183	get_operands (h1->ops, ins1);
2934d1c9	184	(h1->ops->func)();
d70b4d42	185	get_operands (h2->ops, ins2);
2934d1c9 MH	186	(h2->ops->func)();
	187	}
	188	}
	189
	190
	191	void
	192	sim_size (power)
	193	int power;
	194
	195	{
	196	if (State.imem)
	197	{
	198	free (State.imem);
	199	free (State.dmem);
	200	}
	201
	202	State.imem = (uint8 *)calloc(1,1<<IMEM_SIZE);
	203	State.dmem = (uint8 *)calloc(1,1<<DMEM_SIZE);
	204	if (!State.imem \|\| !State.dmem )
	205	{
	206	fprintf (stderr,"Memory allocation failed.\n");
	207	exit(1);
	208	}
	209	printf ("Allocated %d bytes instruction memory and\n",1<<IMEM_SIZE);
	210	printf (" %d bytes data memory.\n",1<<DMEM_SIZE);
	211	}
	212
	213	static void
	214	init_system ()
	215	{
	216	if (!State.imem)
	217	sim_size(1);
	218	}
	219
	220	int
	221	sim_write (addr, buffer, size)
	222	SIM_ADDR addr;
	223	unsigned char *buffer;
	224	int size;
	225	{
	226	int i;
	227	init_system ();
	228
d70b4d42	229	/* printf ("sim_write %d bytes to 0x%x\n",size,addr); */
2934d1c9 MH	230	for (i = 0; i < size; i++)
	231	{
	232	State.imem[i+addr] = buffer[i];
	233	}
	234	return size;
	235	}
	236
	237	void
	238	sim_open (args)
	239	char *args;
	240	{
	241	struct simops *s;
	242	struct hash_entry h, prev;
	243	if (args != NULL)
	244	printf ("sim_open %s\n",args);
	245
	246	/* put all the opcodes in the hash table */
	247	for (s = Simops; s->func; s++)
	248	{
	249	h = &hash_table[hash(s->opcode,s->format)];
	250
	251	/* go to the last entry in the chain */
	252	while (h->next)
	253	h = h->next;
	254
	255	if (h->ops)
	256	{
	257	h->next = calloc(1,sizeof(struct hash_entry));
	258	h = h->next;
	259	}
	260	h->ops = s;
	261	h->mask = s->mask;
	262	h->opcode = s->opcode;
	263	}
	264	}
	265
	266
	267	void
	268	sim_close (quitting)
	269	int quitting;
	270	{
	271	/* nothing to do */
	272	}
	273
	274	void
	275	sim_set_profile (n)
	276	int n;
	277	{
	278	printf ("sim_set_profile %d\n",n);
	279	}
	280
	281	void
	282	sim_set_profile_size (n)
	283	int n;
	284	{
	285	printf ("sim_set_profile_size %d\n",n);
	286	}
	287
	288	void
	289	sim_resume (step, siggnal)
	290	int step, siggnal;
	291	{
	292	uint32 inst;
	293	int i;
294	reg_t oldpc;
295
d70b4d42	296	/* printf ("sim_resume (%d,%d) PC=0x%x\n",step,siggnal,PC); */
2934d1c9	297
d70b4d42 MH	298	if (step)
	299	State.exception = SIGTRAP;
	300	else
	301	State.exception = 0;
	302
	303	do
	304	{
	305	inst = RLW (PC << 2);
	306	oldpc = PC;
	307	switch (inst & 0xC0000000)
	308	{
	309	case 0xC0000000:
	310	/* long instruction */
	311	do_long (inst & 0x3FFFFFFF);
	312	break;
	313	case 0x80000000:
	314	/* R -> L */
	315	do_2_short ( inst & 0x7FFF, (inst & 0x3FFF8000) >> 15);
	316	break;
	317	case 0x40000000:
	318	/* L -> R */
	319	do_2_short ((inst & 0x3FFF8000) >> 15, inst & 0x7FFF);
	320	break;
	321	case 0:
	322	do_parallel ((inst & 0x3FFF8000) >> 15, inst & 0x7FFF);
	323	break;
	324	}
	325
	326	if (State.RP && PC == RPT_E)
	327	{
	328	RPT_C -= 1;
	329	if (RPT_C == 0)
	330	State.RP = 0;
	331	else
	332	PC = RPT_S;
	333	}
	334
	335	/* FIXME */
	336	if (PC == oldpc)
	337	PC++;
	338	}
	339	while (!State.exception);
2934d1c9 MH	340	}
	341
	342	int
	343	sim_trace ()
	344	{
	345	printf ("sim_trace\n");
	346	return 0;
	347	}
	348
	349	void
	350	sim_info (verbose)
	351	int verbose;
	352	{
d70b4d42	353	printf ("sim_info\n");
2934d1c9 MH	354	}
	355
	356	void
	357	sim_create_inferior (start_address, argv, env)
	358	SIM_ADDR start_address;
	359	char **argv;
	360	char **env;
	361	{
	362	printf ("sim_create_inferior: PC=0x%x\n",start_address);
	363	PC = start_address >> 2;
	364	}
	365
	366
	367	void
	368	sim_kill ()
	369	{
	370	/* nothing to do */
	371	}
	372
	373	void
	374	sim_set_callbacks(p)
	375	host_callback *p;
	376	{
	377	printf ("sim_set_callbacks\n");
	378	/* callback = p; */
	379	}
	380
	381	void
	382	sim_stop_reason (reason, sigrc)
	383	enum sim_stop *reason;
	384	int *sigrc;
	385	{
d70b4d42 MH	386	/* printf ("sim_stop_reason: PC=0x%x\n",PC<<2); */
	387
	388	if (State.exception == SIGQUIT)
	389	{
	390	*reason = sim_exited;
	391	*sigrc = State.exception;
	392	}
	393	else
	394	{
	395	*reason = sim_stopped;
	396	*sigrc = State.exception;
	397	}
	398	}
	399
	400	void
	401	sim_fetch_register (rn, memory)
	402	int rn;
	403	unsigned char *memory;
	404	{
	405	if (rn > 31)
	406	{
	407	WRITE_64 (memory, State.a[rn-32]);
	408	/* printf ("sim_fetch_register %d 0x%llx\n",rn,State.a[rn-32]); */
	409	}
	410	else
	411	{
	412	WRITE_16 (memory, State.regs[rn]);
	413	/* printf ("sim_fetch_register %d 0x%x\n",rn,State.regs[rn]); */
	414	}
	415	}
	416
	417	void
	418	sim_store_register (rn, memory)
	419	int rn;
	420	unsigned char *memory;
	421	{
	422	if (rn > 31)
	423	{
	424	State.a[rn-32] = READ_64 (memory) & MASK40;
	425	/* printf ("store: a%d=0x%llx\n",rn-32,State.a[rn-32]); */
	426	}
	427	else
	428	{
	429	State.regs[rn]= READ_16 (memory);
	430	/* printf ("store: r%d=0x%x\n",rn,State.regs[rn]); */
	431	}
2934d1c9	432	}
d70b4d42 MH	433
	434	sim_read (addr, buffer, size)
	435	SIM_ADDR addr;
	436	unsigned char *buffer;
	437	int size;
	438	{
	439	int i;
	440	for (i = 0; i < size; i++)
	441	{
	442	buffer[i] = State.imem[addr + i];
	443	}
	444	return size;
	445	}
	446
	447	void
	448	sim_do_command (cmd)
	449	char *cmd;
	450	{
	451	printf("sim_do_command: %s\n",cmd);
	452	}
	453
	454	int
	455	sim_load (prog, from_tty)
	456	char *prog;
	457	int from_tty;
	458	{
	459	/* Return nonzero so GDB will handle it. */
	460	return 1;
	461	}