projects / deliverable / binutils-gdb.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
import gdb-1999-05-10
[deliverable/binutils-gdb.git] / sim / d30v / ChangeLog
CommitLineData
cd0fc7c3
SS		 11999-05-08 Felix Lee <flee@cygnus.com>
2
3 * configure: Regenerated to track ../common/aclocal.m4 changes.
4
7a292a7a
SS		 51999-03-16 Martin Hunt <hunt@cygnus.com>
6 From Frank Ch. Eigler <fche@cygnus.com>
7
8 * cpu.h (mvtsys_left_p): New flag for MVTSYS instruction history.
9 * d30v-insns (mvtsys): Set this flag instead of left_kills_right_p.
10 (do_sath): Detect MVTSYS by new flag.
11 * engine.c (unqueue_writes): Detect MVTSYS by new flag.
12 (do_2_short, do_parallel): Initialize new flag.
13
141999-02-26 Frank Ch. Eigler <fche@cygnus.com>
15
16 * tconfig.in (SIM_HANDLES_LMA): Make it so.
17
c906108c
SS		 181999-01-12 Frank Ch. Eigler <fche@cygnus.com>
19
20 * engine.c (unqueue_writes): Make PSW conflict resolution code
21 conditional - disable it for MVTSYS || insn case.
22
231999-01-11 Frank Ch. Eigler <fche@cygnus.com>
24
25 * d30v-insns (do_sath): Drain PSW write queue before PSW_S_FLAG
26 update.
27 * engine.c (unqueue_writes): Make non-static. Remove PSW_V/VA
28 special case.
29 (do_parallel): Don't drain PSW write queue for MVTSYS || insn.
30
311999-01-07 Frank Ch. Eigler <fche@cygnus.com>
32
33 * d30v-insns (do_ld2h): Sign-extend loaded half-words.
34
351999-01-05 Frank Ch. Eigler <fche@cygnus.com>
36
37 * d30v-insns (do_ld2h): Read memory in word units.
38 (do_ld4bh): Ditto. Correct sign extension.
39 (do_ld4bhu): Ditto.
40 (do_st2h): Write memory in word units.
41 (do_st4hb): Ditto.
42 (st4hb): Correct mnemonic in igen template.
43
441998-12-08 Frank Ch. Eigler <fche@cygnus.com>
45
46 * d30v-insns: (do_ld2h): Don't update R0 nor R1 for double-word insn.
47 (do_ld2w): Ditto.
48 (do_ld4bh): Ditto.
49 (do_ld4bhu): Ditto.
50 (do_mulx2h): Ditto.
51
521998-12-03 Frank Ch. Eigler <fche@cygnus.com>
53
54 * d30v-insns (do_repeat): Don't set RP for repeat count 1.
55
561998-12-03 Frank Ch. Eigler <fche@cygnus.com>
57
58 * d30v-insns (do_src): Treat shift count -32 naturally instead of
59 producing zero result.
60
611998-11-22 Frank Ch. Eigler <fche@cygnus.com>
62
63 * d30v-insns (do_src): Limit SRC shift count to -32 .. 31.
64
651998-11-16 Frank Ch. Eigler <fche@cygnus.com>
66
67 * d30v-insns (dbt): Defer PSW/DPSW update with new DID_TRAP code 2.
68 * engine.c (unqueue_writes): Perform DBT processing on PSW/DPSW here.
69
701998-11-12 Frank Ch. Eigler <fche@cygnus.com>
71
72 * cpu.h (_sim_cpu): Removed is_delayed_call field, and associated
73 RPT_IS_CALL macro.
74 * sim-calls.c (sim_create_inferior): Don't initialize is_delayed_call.
75 * d30v-insns (do_dbra): Don't clear RPT_IS_CALL. (do_dbrai): Ditto.
76 (do_djmp): Ditto. (do_djmpi): Ditto. (do_repeat): Ditto.
77 * d30v-insns (do_dbsr): Don't set RPT_IS_CALL, but set R62 instead.
78 (do_dbsri): Ditto. (do_djsr): Dito. (do_djsri): Ditto.
79 * engine.c (sim_engine_run): Remove conditional setting of R62 based
80 upon RPT_IS_CALL.
81
821998-11-08 Frank Ch. Eigler <fche@cygnus.com>
83
84 * sim-calls.c (sim_open): Add dummy memory range over control
85 register region (0x40000000..0x4000FFFF).
86
871998-11-06 Frank Ch. Eigler <fche@cygnus.com>
88
89 * d30v-insns (do_mvfacc): Use loop to limit shift count to 63 .. 0.
90
91Tue Oct 13 11:01:16 1998 Frank Ch. Eigler <fche@cygnus.com>
92
93 * d30v-insns (do_sra,do_srah,do_srl,do_srlh): Make shift
94 count -32 to produce zero result.
95 (do_src): Ditto for shift count == -64.
96
97Mon Oct 12 23:04:11 1998 Frank Ch. Eigler <fche@cygnus.com>
98
99 * d30v-insns (ROT): Use 0x1f bit mask for rotate count masking.
100 (do_sra,do_srl): Use loop to limit shift count to -32 .. 31.
101 (do_srah,do_srlh): Use loop to limit shift count to -32 .. 31.
102 (sra2h,srl2h): Use loop to limit shift count to -16 .. 15.
103 (do_src): Use loop to limit shift count to -64 .. 63.
104
105Fri Oct 9 16:46:52 1998 Doug Evans <devans@canuck.cygnus.com>
106
107 * sim-calls.c (get_insn_name): New fn.
108 (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
109 * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
110
111Mon Sep 28 10:43:28 1998 Frank Ch. Eigler <fche@cygnus.com>
112
113 * d30v-insns (do_sra,do_srah,do_srl,do_srlh,ROT,do_src): Use
114 correct MSB bit numbers for sign extension masks.
115
116Fri Sep 25 17:32:27 1998 Frank Ch. Eigler <fche@cygnus.com>
117
118 * engine.c (do_parallel): Unqueue writes if MU instruction was
119 a MVTSYS, as identified by its left_kills_right_p side-effect.
120
121Fri Sep 25 12:31:34 1998 Frank Ch. Eigler <fche@cygnus.com>
122
123 * d30v-insns (do_sra,do_srah,do_srl,do_srlh,ROT,do_src): Mask
124 shift/rotate counts to number of bits in width of operand; no
125 longer saturate at maxima.
126
127Tue Jul 14 18:39:23 1998 Frank Ch. Eigler <fche@cygnus.com>
128
129 * cpu.h (left_kills_right_p): New flag for non-branch instructions
130 that, when executed in left slot of a -> sequential pair, kill the
131 right slot.
132 * d30v-insns (mvtsys): Set flag for PSW/PSWh/PSWl/FLAG operands.
133 * engine.c (do_2_short): Respect flag.
134
135Thu Jun 4 16:48:58 1998 David Taylor <taylor@texas.cygnus.com>
136
137 * d30v-insns (do_trap): don't save the bPSW and PSW based on
138 current values because an instruction done in parallel with
139 the trap might change them, instead set a flag do that
140 unqueue_writes will take care of it.
141 * engine.c (unqueue_writes): finish trap handling
142 * cpu.h (_sim_cpu): add new field did_trap and a macro DID_TRAP
143 to make use of it; set by do_trap, tested and cleared by
144 unqueue_writes.
145
146Tue May 19 16:07:04 1998 Frank Ch. Eigler <fche@cygnus.com>
147
148 * engine.c (unqueue_writes): Suppress the all enqueued writes to
149 the same flags in PSW except the last.
150
151Fri May 15 11:38:59 1998 Frank Ch. Eigler <fche@cygnus.com>
152
153 * d30v-insns (RETI): Correct instruction spelling to "reit".
154
155Thu May 14 09:34:20 1998 Frank Ch. Eigler <fche@cygnus.com>
156
157 * d30v-insns (dbt): Handle DBT at end of repeat block.
158 (do_trap, dbt): Clear PSW_RP if at end of repeat block.
159
160Thu May 14 07:41:41 1998 Frank Ch. Eigler <fche@cygnus.com>
161
162 * engine.c (sim_engine_run): Trigger DDBT based on previous PC,
163 instead of next PC.
164
165Wed May 13 11:03:40 1998 Frank Ch. Eigler <fche@cygnus.com>
166
167 * engine.c (sim_engine_run): Move DDBT handling after instruction
168 decode/execute stage.
169
170Tue May 12 12:14:53 1998 Frank Ch. Eigler <fche@cygnus.com>
171
172 * d30v-insns (do_sat*): Correct "saturate to 0 bits" patch to
173 properly handle negative saturation inputs.
174
175Tue May 12 11:11:26 1998 Frank Ch. Eigler <fche@cygnus.com>
176
177 * engine.c (sim_engine_run): Decrement RPT_C only under more
178 restricted conditions.
179
180Mon May 11 17:33:46 1998 Frank Ch. Eigler <fche@cygnus.com>
181
182 * d30v-insns (do_sat*): Make "saturate to 0 bits" pass through data
183 unchanged.
184
185Mon May 11 16:27:04 1998 Frank Ch. Eigler <fche@cygnus.com>
186
187 * engine.c (sim_engine_run): Implement DDBT (debugger debug trap)
188 functionality.
189
190Fri May 8 16:44:19 1998 Frank Ch. Eigler <fche@cygnus.com>
191
192 * d30v-insns (do_trap): Set bPC to RPT_S if trap is last
193 instruction in repeat block.
194 (bsr*/jsr*): Set R62 (LINK) to RPT_S if subroutine branch
195 is last instruction in repeat block.
196
197Fri May 8 11:06:50 1998 Frank Ch. Eigler <fche@cygnus.com>
198
199 * d30v-insns (do_sath): Query/update F4/PSW_S using proper flag
200 macro.
201 * cpu.h (PSW_S_FLAG): New flag number for PSW_S status bit.
202
203Wed May 6 19:40:56 1998 Doug Evans <devans@canuck.cygnus.com>
204
205 * sim-main.h (INSN_NAME): New arg `cpu'.
206
207Fri May 1 14:24:30 1998 Andrew Cagney <cagney@b1.cygnus.com>
208
209 * d30v-insns: Fix parameter list to sim_engine_abort.
210
211Thu Apr 30 14:28:00 1998 Fred Fish <fnf@cygnus.com>
212
213 * d30v-insns (do_sath): Add additional argument that determines
214 whether or not the F4 (PSW_S) bit in the PSW is updated.
215 (SAT2H): Do not update PSW_S bit.
216 (SATHp): Do update PSW_S bit.
217
218Tue Apr 28 23:36:00 1998 Fred Fish <fnf@cygnus.com>
219
220 * d30v-insns (SRAHp, SRLHp): Immediate values are signed 6 bit
221 values, not 5 bit values.
222
223Wed Apr 29 12:57:55 1998 Frank Ch. Eigler <fche@cygnus.com>
224
225 * d30v-insns (do_incr): Check modular arithmetic limits after
226 postincrement/postdecrement, rather than before, to match
227 erroneous hardware behavior.
228
229Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com>
230
231 * configure: Regenerated to track ../common/aclocal.m4 changes.
232
233Mon Apr 27 19:42:00 1998 Fred Fish <fnf@cygnus.com>
234
235 * d30v-insns (do_trap): Clear all bits in PSW except SM and DB.
236
237Mon Apr 27 14:55:00 1998 Fred Fish <fnf@cygnus.com>
238
239 * d30v-insns (do_mulx2h): Low order results go in ra+1, high
240 order in ra.
241
242Mon Apr 27 14:42:00 1998 Fred Fish <fnf@cygnus.com>
243
244 * d30v-insns (do_mulx2h): Rewrite to do proper 32 bit signed
245 multiply of high and low fields from operands.
246
247Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche>
248
249 * configure: Regenerated to track ../common/aclocal.m4 changes.
250 * config.in: Ditto.
251
252Sun Apr 26 15:20:20 1998 Tom Tromey <tromey@cygnus.com>
253
254 * acconfig.h: New file.
255 * configure.in: Reverted change of Apr 24; use sinclude again.
256
257Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche>
258
259 * configure: Regenerated to track ../common/aclocal.m4 changes.
260 * config.in: Ditto.
261
262Fri Apr 24 11:20:00 1998 Tom Tromey <tromey@cygnus.com>
263
264 * configure.in: Don't call sinclude.
265
266Wed Apr 22 21:23:00 1998 Fred Fish <fnf@cygnus.com>
267
268 * ic-d30v (RbU, RcU): Unsigned versions of Rb and Rc.
269 * d30v-insns (MVTACC): Use new RbU and RcU macros.
270
271Wed Apr 22 20:52:00 1998 Fred Fish <fnf@cygnus.com>
272
273 * ic-d30v (RbHU,RbLU): Unsigned versions of RbH and RbL.
274 * d30v-insns (SRL2H): Use new RbHU and RbLU macros instead of
275 RbH and RbL.
276
277Mon Apr 13 16:59:00 1998 Fred Fish <fnf@cygnus.com>
278
279 * d30v-insns (do_srl): Avoid undefined behavior of host compiler
280 when shifting left by more than 31 bits.
281
282Tue Apr 7 18:09:00 1998 Fred Fish <fnf@cygnus.com>
283
284 * engine.c (sim_engine_run): Remove at_loop_end variable. Add
285 rp_was_set and rpt_c_was_nonzero variables. Major restructuring of
286 code before and after instruction execution to properly handle state
287 of the RP bit in the PSW, the value in RPT_C, and other loop related
288 problems.
289
290Sat Apr 4 20:36:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
291
292 * configure: Regenerated to track ../common/aclocal.m4 changes.
293
294Fri Apr 3 15:26:00 1998 Fred Fish <fnf@cygnus.com>
295
296 * d30v-insns (do_trap): Use offset from EIT_VB rather than hardcoded
297 BASE_ADDRESS constant.
298 * cpu.h (BASE_ADDRESS): Remove constant not used any longer.
299
300Fri Apr 3 14:42:00 1998 Fred Fish <fnf@cygnus.com>
301
302 * cpu.h (EIT_VB): Define macro to access EIT_VB register.
303 (EIT_VB_DEFAULT): Define value of EIT_VB register after reset.
304 * sim-calls.c (sim_create_inferior): Set EIT_VB to EIT_VB_DEFAULT.
305
306Tue Mar 31 19:00:00 1998 Fred Fish <fnf@cygnus.com>
307
308 * d30v-insns (do_dbrai): RPT_S is cia plus pcdisp rather than
309 just pcdisp.
310
311Mon Mar 30 20:30:00 1998 Fred Fish <fnf@cygnus.com>
312
313 * engine.c (sim_engine_run): Add at_loop_end. Rework end of loop
314 code to use this to both reset PSW_RP when needed and to set PC
315 to RPT_S for another pass through the loop.
316
317Mon Mar 30 16:12:00 1998 Fred Fish <fnf@cygnus.com>
318
319 * engine.c (sim_engine_run): Change code that handles RPT_* regs
320 and PSW_RP bit in PSW so that PSW_RP is always set while executing
321 the loop and loop terminates upon completion of the pass for which
322 RPT_C is zero. More closely follow logic in architecture manual.
323
324Fri Mar 27 16:15:52 1998 Andrew Cagney <cagney@b1.cygnus.com>
325
326 * configure: Regenerated to track ../common/aclocal.m4 changes.
327
328Wed Mar 25 12:35:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
329
330 * configure: Regenerated to track ../common/aclocal.m4 changes.
331
332Thu Mar 19 00:25:43 1998 Andrew Cagney <cagney@b1.cygnus.com>
333
334 * sim-calls.c (sim_open): Move memory-region commands back to
335 before the call to sim_parse_args.
336 (d30v_option_handler): Implement extmem-size option using
337 memory-delete and memory-region commands.
338
339 * sim-calls.c (d30v_option_handler): Use ANSI-C argument list,
340 correct number and type of arguments.
341
342Wed Mar 18 12:38:12 1998 Andrew Cagney <cagney@b1.cygnus.com>
343
344 * configure: Regenerated to track ../common/aclocal.m4 changes.
345
346Wed Mar 11 13:56:32 1998 Andrew Cagney <cagney@b1.cygnus.com>
347
348 * alu.h (IMEM, MEM, STORE): Replace sim_core_*_map with exec_map,
349 read_map and write_map resp.
350
351 * cpu.c (d30v_read_mem, d30v_write_mem): Ditto.
352
353Mon Mar 2 13:34:08 1998 Fred Fish <fnf@cygnus.com>
354
355 * d30v-insns (do_repeat): Abort repeat instructions that have
356 a repeat count of zero.
357
358Fri Feb 27 18:44:12 1998 Doug Evans <devans@canuck.cygnus.com>
359
360 * sim-calls.c (sim_open): Update call to sim_add_option_table.
361
362Thu Feb 26 18:34:31 1998 Andrew Cagney <cagney@b1.cygnus.com>
363
364 * sim-calls.c (sim_info): Delete.
365
366Wed Feb 25 14:44:58 1998 Michael Meissner <meissner@cygnus.com>
367
368 * d30v-insns (mvtsys): If moving to EIT_VB register, and with
369 valid bits. Optimize code somewhat.
370
371 * cpu.h (eit_vector_base_cr): New CR we need to special case.
372 (EIT_VALID): Valid bits for EIT_VB register.
373
374 * d30v-insns (mv{f,t}sys): When moving to/from PSWH, the value is
375 in the low 16 bits of the register.
376
377 * d30v-insns (do_sra): Use a common WRITE32_QUEUE to write back
378 results.
379 (do_sr{a,l}h): Do shift in 32 bits, only truncate when writing
380 result back to the registers.
381
382Tue Feb 24 18:09:52 1998 Fred Fish <fnf@cygnus.com>
383
384 * Makefile.in (tmp-igen): Use -G gen-zero-r0 option to force
385 r0 to always be zero.
386 * cpu.h (GPR_SET): Define.
387
388Tue Feb 24 14:12:57 1998 Michael Meissner <meissner@cygnus.com>
389
390 * d30v-insns (do_sath): Do saturation in 32 bits, before
391 converting to 16.
392 (sat{,2h,z,hp}): Use imm_5, not imm to get proper zero extend.
393 (do_sath_p): Delete, no longer used.
394 (sathp): Call do_sath, not do_sath_p.
395
396Mon Feb 23 15:55:14 1998 Michael Meissner <meissner@cygnus.com>
397
398 * d30v-insns (illegal,wrong_slot): Print \n after PC and before we
399 call sim_engine_halt.
400 (sr{a,l}hp): Implement missing instructions.
401 (do_trap): Print high order PSW bits in human readable fashion.
402 (do_{dbra{,i},dbsr{,i},djmp{,i},djsr{,i},repeat}): Set PSW bit RP.
403
404 * alu.h (PSW_SET_QUEUE): New macro to set PSW bits.
405
406 * engine.c (sim_engine_run): Check for RP bit being set, not RPT_C
407 being > 0. If RPT_C is decremented to 0, clear PSW RP bit.
408
409Fri Feb 20 10:13:34 1998 Fred Fish <fnf@cygnus.com>
410
411 * cpu.h (BASE_ADDRESS): Change from 0xfffff000 to 0xfffff020.
412
413Tue Feb 17 12:39:52 1998 Andrew Cagney <cagney@b1.cygnus.com>
414
415 * sim-calls.c (sim_store_register, sim_fetch_register): Pass in
416 length parameter. Return -1.
417
418Fri Feb 6 17:39:54 1998 Michael Meissner <meissner@cygnus.com>
419
420 * d30v-insns (do_dbrai): Correct typo, use shift, not comparison.
421
422Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com>
423
424 * configure: Regenerated to track ../common/aclocal.m4 changes.
425
426Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com>
427
428 * configure: Regenerated to track ../common/aclocal.m4 changes.
429
430Fri Jan 30 08:29:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
431
432 * engine.c (sim_engine_run): Add parameter nr_cpus.
433
434Fri Jan 30 17:09:37 1998 Michael Meissner <meissner@cygnus.com>
435
436 * d30v-insns (jsrtzr): Check for register == 0, not != 0.
437
438Wed Jan 21 17:52:04 1998 Andrew Cagney <cagney@b1.cygnus.com>
439
440 * engine.c (do_stack_swap): Make type of new_sp unsigned.
441
442Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba>
443
444 * configure: Regenerated to track ../common/aclocal.m4 changes.
445
446Mon Jan 5 16:04:17 1998 Andrew Cagney <cagney@sanguine.cygnus.com>
447
448 * sim-calls.c (sim_info): Call profile_print.
449
450 * sim-main.h: Enable instruction profiling.
451
452Thu Dec 18 12:21:38 1997 Michael Meissner <meissner@cygnus.com>
453
454 * alu.h (ALU{16,32}_END): Change setting PSW to only set the carry
455 and overflow bits. Don't look at the current value of PSW.
456 (PSW_FLAG_SET_QUEUE): Only queue up setting the particular bit in
457 question. Don't look at the current value of PSW.
458
459 * d30v-insns: All instructions that set the PSW, will only queue
460 up the particular bits in question that were set by the
461 instruction. Don't look at the current value of PSW.
462
463Wed Dec 17 11:41:44 1997 Michael Meissner <meissner@cygnus.com>
464
465 * cpu.h (PSW_VALID): Allow EA/DB to be set in the PSW.
466 (DPSW_VALID): Like PSW_VALID, but it allows the DS bit to be set.
467
468 * engine.c (trace_alu32): When changing BPSW/DPSW, print the
469 special PSW bits.
470
471 * d30v-insns (do_cmp_cc): Fix cmpps and cmpng.
472 (do_cmp{,u}_cc): Print which cc value was used if not in switch
473 statement.
474 (do_cmpu_cc): Remove illegal cases CMPU{EQ,NE,PS,NG}.
475 (mvtsys): When setting BPSW or DPSW, and with DPSW_VALID.
476
477Tue Dec 16 18:17:26 1997 Michael Meissner <meissner@cygnus.com>
478
479 * d30v-insns (mulx2h): Add missing instruction. Complain if
480 register is not even.
481 (do_{add,sub}h_ppp): Get correct high/low values. Also correctly
482 handle short immediates.
483 (do_ld{2w,4bh}): Don't load r0 if ra == 0.
484
485 * engine.c (d30v_interrupt_event): Remove unused variable
486 (unqueue_writes): Ditto.
487
488Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
489
490 * configure: Regenerated to track ../common/aclocal.m4 changes.
491 * config.in: Ditto.
492
493Sat Dec 13 23:40:17 1997 Michael Meissner <meissner@cygnus.com>
494
495 * cpu.h (_write{32,64}): New structures for keeping track of
496 queued writes to registers.
497 (_sim_cpu): Add _write{32,64} structures. Make is_delayed_call
498 unsigned32 also.
499 (WRITE{32,64}*): New macros for queueing up writes to registers.
500
501 * alu.h (ALU16_END): Take field that says whether we are setting
502 the high or low half word. Queue up changes to registers.
503 (ALU32_END): Queue up changes to registers.
504 (PSW_FLAG_SET_QUEUE): Like PSW_FLAG_SET, except queues it up.
505
506 * sim-main.h (do_stack_swap): Remove declaration.
507
508 * engine.c (do_stack_swap): Make static.
509 (unqueue_writes): New function to unqueue all changes to 32 and 64
510 bit registers in order. Implement --trace-alu. Reset high water
511 marks for # of queued registers. If PSW changed, possibly update
512 stack pointer.
513 (do_{long,2_short,parallel}): Unqueue register writes at the
514 appropriate time.
515
516 * d30v-insns: Modify all insns to queue changes to registers,
517 rather than do them immediately so that parallel instructions get
518 the right values for inputs. Rewrite 16 bit operations to be done
519 in terms of masked 32 bit registers. Don't call do_stack_swap any
520 more here.
521
522Thu Dec 11 10:06:02 1997 Michael Meissner <meissner@cygnus.com>
523
524 * sim-calls.c (d30v_option_handler): Add support for --extmem-size
525 to size external memory.
526 (sim_open): Ditto. Default if no --extmem-size option is 8 meg.
527
528Wed Dec 10 01:08:24 1997 Jim Blandy <jimb@zwingli.cygnus.com>
529
530 * d30v-insns (do_rot2h): Clip rotate amounts to four bits. The
531 upper bits, and the sign of the rotation amount, are red herrings.
532 (do_sra, do_srl): Handle shifts greater than 32 bits.
533 (do_srah, do_sral): Properly sign-extend value and shift amount.
534 Handle shifts larger than 16 bits.
535
536Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com>
537
538 * configure: Regenerated to track ../common/aclocal.m4 changes.
539
540Mon Dec 1 15:10:44 1997 Michael Meissner <meissner@cygnus.com>
541
542 * d30v-insns (do_sub2h): For short instruction, correctly
543 dupplicate lower 16 bits of immediate in upper 16 bits.
544 (sat2z): Fix typo that ignored the upper half of the register.
545 (do_satz): If < 0, set *ra to 0, if not call do_sat.
546 (mvtsys): Before setting PSW, and with PSW_VALID.
547
548 * cpu.h (PSW_VALID): Mask for bits in PSW that is valid.
549
550Mon Dec 1 15:05:03 1997 Andrew Cagney <cagney@b1.cygnus.com>
551
552 * d30v-insns (do_trap): Pacify GCC - correct type of %ld arg in
553 printf, return dummy at end.
554
555Mon Dec 1 15:05:03 1997 Andrew Cagney <cagney@b1.cygnus.com>
556
557 * d30v-insns (do_add, do_addh_ppp, do_adds): Replace ALU_ADD with
558 ALU_ADDC.
559 (do_addc): Replace ALU_SET_CARRY / ALU_ADD_CA with ALU_ADDC_C.
560 (do_sub, do_subh_ppp): Replace ALU_SUB with ALU_SUBB.
561 (do_subb): Replace ALU_SET_CARRY / ALU_SUB_CA with ALU_SUBB_B.
562
563 * alu.h (ALU16_END): Use ALU16_HAD_CARRY_BORROW instead of
564 ALU16_HAD_CARRY.
565 (ALU32_END): Ditto.
566
567 * sim-main.h (string.h, strings.h): Include.
568
569 * sim-calls.c: Delete inclusion of string.h and strings.h.
570
571Sun Nov 30 17:29:25 1997 Michael Meissner <meissner@cygnus.com>
572
573 * configure.in (--enable-sim-trapdump): New switch to control
574 whether traps 0..30 dump out the registers or do the real trap.
575 * configure: Regenerate.
576
577 * Makefile.in (SIM_EXTRA_CLFAGS): Add -DTRAPDUMP={0,1} if
578 appropriate --{en,dis}able-sim-trapdump is done.
579
580 * sim-calls.c (OPTION_TRACE_CALL): Rename from OPTION_CALL_TRACE.
581 (OPTION_TRACE_TRAPDUMP): New option for --trace-trapdump.
582 (d30v_option_handler): Add support for --trace-trapdump.
583 (d30v_options): Ditto.
584 (sim_open): Ditto.
585
586 * d30v-insns (do_trap): Do register dump if --trace-trapdump and
587 not the system call trap. Remove support for calling old function
588 sim_io_syscalls.
589
590Sat Nov 29 18:54:55 1997 Michael Meissner <meissner@cygnus.com>
591
592 * cpu.h (_sim_cpu): Add trace_call_p, trace_action fields.
593 (TRACE_CALL_P): Non-zero if --trace-call.
594 (TRACE_ACTION): Non-zero if there is a tracing action at the end
595 of processing an instruction boundary.
596 (TRACE_ACTION_{CALL,RETURN}): Bits to say trace call & return.
597 (d30v_next_insn): Delete, now trace_action field in cpu state.
598
599 * cpu.c (d30v_next_insn): Delete, now trace_action field in cpu
600 state.
601 (return_occurred): Minimum saved register to check is now 34.
602
603 * engine.c (sim_engine_run): Change call tracing to use
604 trace_action field in cpu state.
605
606 * sim-calls.c (d30v_option_handler): Handle d30v specific options.
607 (d30v_options): D30V specific options. Right now, --trace-call.
608 (sim_open): Register d30v specific options.
609
610 * d30v-insns (call, return insns): Move --trace-debug call/return
611 tracing action to d30v specific --trace-call option.
612
613Fri Nov 28 20:12:48 1997 Michael Meissner <meissner@cygnus.com>
614
615 * cpu.h (CREG): Rename from CR.
616
617 * d30v-insns (do_{addc,subb}): Explicitly import the carry bit.
618 (do_trap): Use CREG, not CR. Switch to using cb_syscall.
619
620Thu Nov 27 19:25:43 1997 Michael Meissner <meissner@cygnus.com>
621
622 * cpu.h (ACC): Define as short cut to accumulators.
623
624 * d30v-insns (do_rot): Delete explicit function, use ROT32 to do
625 rotate instruction.
626 (do_trap): Make trap 30 print out accumulators and first 16
627 control registers as well.
628 (do_avg): Sign extend to 64 bit type before doing add/shift.
629 (do_avg2h): Sign extend 16 bit chunks before doing add/shift.
630
631Wed Nov 26 15:20:24 1997 Doug Evans <devans@canuck.cygnus.com>
632
633 * Makefile.in (NL_TARGET): Define.
634
635Wed Nov 26 16:55:38 1997 Michael Meissner <meissner@cygnus.com>
636
637 * cpu.h (d30v_next_insn): New flag for things we are supposed to
638 trace between instruction words.
639 ({call,return}_occurred): Remove index argument.
640 (d30v_{read,write}_mem): Add declarations.
641
642 * cpu.c (d30v_next_insn): New flag for things we are supposed to
643 trace between instruction words.
644 ({call,return}_occurred): Remove index argument.
645 (d30v_{read,write}_mem): New functions for reading/writing
646 simulated memory in the new common system call support.
647
648 * d30v-insns: Set emacs C mode.
649 (call/return insns): Set bit to trace call at instruction
650 boundary, rather than doing it here.
651 (do_trap): Set up to use new common system call interface.
652
653 * engine.c (sim_engine_run): If d30v_next_insn is non zero, do
654 function call/return tracing.
655
656Mon Nov 24 16:40:49 1997 Michael Meissner <meissner@cygnus.com>
657
658 * d30v-insns (bnot): Correctly reset bit in question.
659 (do_trap): Use common system call emulation support, rather than
660 our home grown support.
661
662Sun Nov 23 22:47:20 1997 Michael Meissner <meissner@cygnus.com>
663
664 * d30v-insns (mvfacc): Immediate field is unsigned, allowing
665 shifts of up to 63 to be encoded. Also do shift signed, rather
666 than unsigned.
667
668 * ic-d30v (IMM_6S): Add field for 6 bit unsigned constants.
669
670 * d30v-insns (cmpu): Short cmpu zero extends immediate, not sign
671 extends.
672
673Sat Nov 22 19:04:34 1997 Andrew Cagney <cagney@b1.cygnus.com>
674
675 * d30v-insns (illegal, wrong_slot): Replace SIGILL with
676 SIM_SIGILL.
677
678 * sim-calls.c (signal.h): Do not include, replaced by
679 sim-signal.h.
680
681 * sim-main.h (signal.h): Do not include, include sim-signal.h
682 instead.
683
684Fri Nov 21 09:33:54 1997 Andrew Cagney <cagney@b1.cygnus.com>
685
686 * cpu.c (call_occurred): Use ZALLOC instead of xmalloc.
687 (return_occurred): Use zfree instead of free.
688
689Wed Nov 19 13:28:09 1997 Michael Meissner <meissner@cygnus.com>
690
691 * Makefile.in ({l,s}_{support,semantics}.o): Depend on the include
692 files in $(ENGINE_H).
693
694 * d30v-insns (do_{add,addc,sub,subb}): ALU_{ADD,SUB}_CA now takes
695 a VAL argument to add/subtract along with the carry.
696
697Tue Nov 18 15:33:48 1997 Doug Evans <devans@canuck.cygnus.com>
698
699 * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
700
701Tue Nov 18 13:56:15 1997 Michael Meissner <meissner@cygnus.com>
702
703 * d30v-insns (do_trap): Change to new system call numbers. Add
704 read emulation.
705
706Mon Nov 17 14:43:45 1997 Michael Meissner <meissner@cygnus.com>
707
708 * d30v-insns (mulx): Add mulx instruction.
709
710Sun Nov 16 19:06:56 1997 Michael Meissner <meissner@cygnus.com>
711
712 * cpu.c ({call,return}_occurred): New trace functions to mark
713 function calls and returns and check whether all saved registers
714 really were saved.
715
716 * cpu.h ({call,return}_occurred): Add declaration.
717
718 * d30v-insns ({bsr, jsr} patterns): Call call_occurred if
719 --trace-debug to trace function calls.
720 (jmp register pattern): If this is a jump r62 and --trace-debug,
721 call return_occurred to trace function calls.
722 (bsr{tnz,tzr}): Move setting r62 inside conditional against reg.
723 (do_ld2w): Grab memory in 64-bit chunk, to check alignment.
724 (do_st2w): Ditto.
725
726Sat Nov 15 20:57:57 1997 Michael Meissner <meissner@cygnus.com>
727
728 * d30v-insns: Undo changes from Nov. 11, allowing for odd register
729 pairs, since the machine doesn't support such usage. Trap on odd
730 registers, rather than give a warning. Keep do_src and do_trap
731 changes.
732
733Fri Nov 14 11:59:29 1997 Andrew Cagney <cagney@b1.cygnus.com>
734
735 * d30v-insns (do_trap): Pacify compiler warnings for printf calls.
736
737Tue Nov 11 18:26:03 1997 Michael Meissner <meissner@cygnus.com>
738
739 * d30v-insns (not_r63_reg): Rename from make_even_reg, only check
740 for register being r63. Change callers ld2{h,w}, ld4bh{,u}.
741 (get_reg_not_r63): Rename from get_even_reg, and only check for
742 register r63. Change callers st2{w,h}, st4b.
743 (do_src): Correct register pair for shift left.
744 (do_trap): Temporarily make trap 30 print out the registers.
745
746Tue Nov 4 08:51:22 1997 Michael Meissner <meissner@cygnus.com>
747
748 * d30v-insns (do_trap): Make trap 31 be used for system calls.
749 Add primitive write and exit system calls.
750
751 * Makefile (FILTER): New make variable to filter out known igen
752 warnings.
753 (tmp-igen): Add $(FILTER) on all 3 invocations of igen to filter
754 out warnings that should be ignored by default.
755
756Fri Oct 31 19:36:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
757
758 * sim-calls.c (sim_open): Change EIT to memory region.
759
760Fri Oct 17 16:51:31 1997 Andrew Cagney <cagney@b1.cygnus.com>
761
762 * alu.h (ALU16_END): Get result from ALU16_OVERFLOW_RESULT.
763 (ALU32_END): Get result from ALU32_OVERFLOW_RESULT.
764
765Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
766
767 * configure: Regenerated to track ../common/aclocal.m4 changes.
768
769Mon Sep 29 15:23:35 1997 Stu Grossman <grossman@babylon-5.cygnus.com>
770
771 * d30v-insns (MVFSYS MVTSYS): Fix bit patterns so that these
772 instructions get recognised.
773
774Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
775
776 * configure: Regenerated to track ../common/aclocal.m4 changes.
777
778Wed Sep 24 17:51:43 1997 Stu Grossman <grossman@babylon-5.cygnus.com>
779
780 * Makefile.in (SIM_OBJS): Add sim-break.o.
781 * (INCLUDE_DEPS): Add tconfig.h.
782 * alu.h (MEM STORE): Change to sim_core_read/write_unaligned to
783 allow for trapping unaligned accesses.
784 * cpu.h: Define SIM_BREAKPOINT as syscall 5 for intrinsic breakpoint
785 mechanism.
786 * d30v-insn (short syscall): Use syscall 5 for breakpoint insn.
787 * sim-calls.c (sim_fetch_register sim_store_register): Implement.
788 * tconfig.in: Define SIM_HAVE_BREAKPOINTS to enable intrinsic
789 breakpoint mechanism.
790
791Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
792
793 * configure: Regenerated to track ../common/aclocal.m4 changes.
794
795Tue Sep 23 10:19:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
796
797 * Makefile.in (SIM_WARNINGS, SIM_ALIGNMENT, SIM_ENDIAN,
798 SIM_HOSTENDIAN, SIM_RESERVED_BITS): Delete, moved to common.
799 (SIM_EXTRA_CFLAGS): Update.
800
801Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
802
803 * configure.in: Specify strict alignment.
804 * configure: Regenerated to track ../common/aclocal.m4 changes.
805
806Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
807
808 * configure: Regenerated to track ../common/aclocal.m4 changes.
809
810Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
811
812 * configure: Regenerated to track ../common/aclocal.m4 changes.
813
814Fri Sep 12 16:13:04 1997 Andrew Cagney <cagney@b1.cygnus.com>
815
816 * sim-calls.c (sim_open): Change memory to
817 internal inst. RAM h'00000000-h'0000ffff (64KB)
818 internal data RAM h'20000000-h'20007fff (32KB)
819 external RAM h'80000000-h'803fffff (4MB)
820 EIT h'fffff000-h'ffffffff
821
822
823Thu Sep 11 08:59:34 1997 Andrew Cagney <cagney@b1.cygnus.com>
824
825 * Makefile.in (SIM_OBJS): Add sim-hrw.o module.
826
827 * sim-calls.c (sim_read): Delete. use sim-hrw.
828 (sim_write): Delete, use sim-hrw.
829
830
831Tue Sep 9 01:36:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
832
833 * ic-d30v (imm_5): Update nr args passed to LSMASKED.
834
835 * d30v-insns (do_sat, do_sath, do_sath_p, do_satz, do_satzh): Fix,
836 computing the max sat value incorrectly.
837
838Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
839
840 * configure: Regenerated to track ../common/aclocal.m4 changes.
841
842Fri Sep 5 09:15:33 1997 Andrew Cagney <cagney@b1.cygnus.com>
843
844 * d30v-insns (do_mac, do_macs, do_msub, do_mulxs): Use explicit
845 type cast instead of SIGNED64 macro.
846
847Thu Sep 4 10:28:45 1997 Andrew Cagney <cagney@b1.cygnus.com>
848
849 * Makefile.in (SIM_OBJS): Include sim-memopt.o module.
850
851 * sim-calls.c (sim_open): Pass zero modulo arg to sim_core_attach
852 calls.
853 (sim_open): If no memory, use memory commands to establish d30v
854 ram.
855 (d30v_option_handler): Delete, replased by sim-memopt.c.
856 (sim_create_inferior): Call sim_module_init.
857
858 * sim-main.h (struct sim_state): Remove members eit_ram,
859 sizeof_eit_ram, external_ram, baseof_external_ram,
860 sizeof_external_ram. Using generic memory model instead.
861
862Mon Sep 1 11:04:09 1997 Andrew Cagney <cagney@b1.cygnus.com>
863
864 * sim-calls.c (sim_open): Use sim_state_alloc.
865
866Sat Aug 30 10:01:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
867
868 * sim-main.h (INVALID_INSTRUCTION_ADDRESS): Define.
869
870 * engine.c (do_2_short): Compare with INVALID_INSTRUCTION_ADDRESS
871 not -1.
872
873Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
874
875 * configure: Regenerated to track ../common/aclocal.m4 changes.
876 * config.in: Ditto.
877
878Wed Aug 27 13:41:54 1997 Andrew Cagney <cagney@b1.cygnus.com>
879
880 * sim-calls.c (sim_open): Add call to sim_analyze_program, update
881 call to sim_config.
882
883 * sim-calls.c (sim_create_inferior): Add ABFD argument.
884 Initialize CPU registers including PC.
885 (sim_load): Delete, using sim-hload.
886
887 * Makefile.in (SIM_OBJS): Add sim-hload.o module.
888
889Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
890
891 * configure: Regenerated to track ../common/aclocal.m4 changes.
892 * config.in: Ditto.
893
894Mon Aug 25 15:41:44 1997 Andrew Cagney <cagney@b1.cygnus.com>
895
896 * sim-calls.c (sim_open): Add ABFD argument.
897 (sim_open): Move sim_config call to after sim_parse_args.
898 (sim_open): Check sim_config return status.
899
900Fri Aug 22 16:38:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
901
902 * d30v-insns (do_subh_ppp): Correct name, was do_sub_ppp.
903 (do_subh_ppp): Compute rc=rb-src instead of src-rb.
904 (do_addh_ppp): Ditto.
905
906Fri Jun 27 14:43:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
907
908 * d30v-insns (mvfsys, mvtsys): Switch instruction encodings, was
909 wrong. Update handling of PSW[DS] bit.
910 (dbt): Fix debug trap address.
911
912 * cpu.h (NR_CONTROL_REGISTERS): Allow the full 64 registers.
913
914Tue Jun 24 12:41:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
915
916 * d30v-insns (DBT, RTD): Swap the stack after updating the PSW.
917 (DBT): Use PSW_SET to update PSW.
918
919 * alu.h (ALU16_END): Check for 16 bit carry and not 32 bit.
920
921Tue Jun 24 12:16:14 1997 Andrew Cagney <cagney@b2.cygnus.com>
922
923 * d30v-insns (ppp, ccc, pp, XX, p): Update format functions so
924 that they are of class %s instead of class function.
925
926Tue Jun 10 12:26:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
927
928 * sim-main.h (engine_error, engine_restart, engine_halt,
929 engine_run_until_stop): Delete prototypes. Functions deleted
930 earlier.
931 (do_interrupt_handler): Add prototype.
932 (sim_state): Add pending_event member to struct.
933
934 * sim-calls.c (sim_open): Configure interrupt handler.
935 * engine.c (d30v_interrupt_event): New function. Deliver external
936 interrupt to processor.
937
938 * d30v-insns (do_stack_swap): Move function from here.
939 * engine.c (do_stack_swap): To here.
940 * sim-main.h (do_stack_swap): Add prototype.
941
942 * cpu.h (registers): Change current_sp to an int.
943 * d30v-insn (do_stack_swap): Update.
944
945Thu Jun 5 12:54:35 1997 Andrew Cagney <cagney@b1.cygnus.com>
946
947 * d30v-insns (LD*, ST*): Disasemble XX == 0 as immed version of
948 instruction.
949 (str_XXX): Fix case of XX == 3 - return "-".
950
951Thu Jun 5 12:54:35 1997 Andrew Cagney <cagney@b1.cygnus.com>
952
953 * engine.c (sim_engine_run): Issuing L->R and R->L instructions in
954 wrong order.
955
956 * d30v-insn (CMPUcc imm long): With of RB field should be 6 not
957 three.
958 (MUL, MUL2H, MULHX): X field 01 instead of 10.
959
960Thu Jun 5 12:54:35 1997 Andrew Cagney <cagney@b1.cygnus.com>
961
962 * d30v-insns (mvtsys): Don't modify DS bit when writing to PSW.
963 (dbt, rtd): New instructions.
964
965 * cpu.h (NR_CONTROL_REGISTERS): Now 15.
966 (debug_program_status_word_cr, debug_program_counter_cr): Add
967 debug control registers. Renumber other control registers.
968 (PSW_DS): New PSW bit.
969 (DPC, DPSW): Define.
970
971Wed May 28 13:45:47 1997 Andrew Cagney <cagney@b1.cygnus.com>
972
973 * engine.c (sim_engine_run): Check the event queue on every cycle.
974
975 * sim-calls.c (sim_size): Delete.
976 (sim_do_command): Call sim_args_command.
977 (sim_open): Move eit_ram and sizeof_eit_ram to sim_state struct.
978 (simulation): Delete global now depend on sd argument.
979 (sim_open): Initialize sim-watch.
980 (d30v_option_handler): New function, parse mem-size argument.
981
982Tue May 27 14:03:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
983
984 * sim-calls.c (sim_set_callbacks): Delete.
985 (sim_write): Pass NULL cpu arg to sim_core_write_buffer.
986
987 * engine.c (engine_init): Delete. Handled in sim_open.
988 (engine_create): Ditto.
989
990Tue May 20 10:15:35 1997 Andrew Cagney <cagney@b1.cygnus.com>
991
992 * sim-calls.c (sim_open): Add callback argument.
993 (sim_set_callbacks): Delete SIM_DESC argument.
994
995Mon May 19 14:59:32 1997 Andrew Cagney <cagney@b1.cygnus.com>
996
997 * sim-calls.c (sim_open): Set the sim.base magic number.
998
999Fri May 16 15:25:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
1000
1001 * d30v-insns: Replace engine_error with common sim_engine_abort.
1002 * cpu.c (is_condition_ok, is_wrong_slot): Ditto.
1003
1004 * engine.c (engine_run_until_stop): Rename this.
1005 (sim_engine_run): To this. Simplify - most moved to common.
1006
1007 * sim-calls.c (sim_stop_reason, sim_resume, sim_stop):
1008 Delete. Replaced by common code.
1009
1010 * engine.c (engine_error, engine_restart, engine_halt): Ditto.
1011
1012 * sim-main.h (SIM_ENGINE_RESTART_HOOK, SIM_ENGINE_HALT_HOOK):
1013 Define as NOPs.
1014
1015Mon May 5 23:05:41 1997 Andrew Cagney <cagney@b1.cygnus.com>
1016
1017 * alu.h (IMEM, MEM, STORE): Update to reflect changes to core in
1018 ../common.
1019 * sim-calls.c (sim_open): Ditto.
1020
1021 * alu.h, cpu.h, cpu.c, d30v-insn, dc-short: Clean up copyright
1022 notice.
1023
1024Fri May 2 12:01:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
1025
1026 * sim-calls.c (sim-options.h, sim-utils.h): Include.
1027 * Makefile.in (sim-calls.o): Add dependencies.
1028
1029 * d30v-insns (address_word): Remove cia argument from support
1030 functions, igen now does this automatically.
1031
1032 * Makefile.in (tmp-igen): Include line number information in
1033 generated files.
1034
1035 * sim-main.h (SIM_DESC): Remove sim_events and sim_core, moved to
1036 simulator base type sim_state_base.
1037 (sim-core.h, sim-events.h, sim-io.h): Replace with #include
1038 "sim-base.h".
1039
1040 * sim-main.h (sim_state): Track recomendations in common
1041 directory.
1042 * cpu.h (sim_cpu): Ditto.
1043 * engine.c (do_2_short, do_parallel): Ditto.
1044 * cpu.h (GPR): Ditto.
1045 * alu.h (MEM, IMEM, STORE): Ditto.
1046 * cpu.c (is_wrong_slot): Ditto.
1047 * ic-d30v (Aa, Ab): Ditto.
1048
1049Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
1050
1051 * configure: Regenerated to track ../common/aclocal.m4 changes.
1052 * Makefile.in (SIM_OBJS): Add sim-module.o, sim-profile.o.
1053 * sim-calls.c (sim_open): Call sim_module_uninstall if argument
1054 parsing fails. Call sim_post_argv_init.
1055 (sim_close): Call sim_module_uninstall.
1056
1057Fri Apr 18 13:44:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
1058
1059 * sim-calls.c (sim_stop): New function.
1060
1061Thu Apr 17 02:57:55 1997 Doug Evans <dje@canuck.cygnus.com>
1062
1063 * Makefile.in (SIM_OBJS): Add sim-load.o, sim-options.o, sim-trace.o.
1064 (SIM_EXTRA_{LIBS,LIBDEPS,ALL,INSTALL}): Delete.
1065 (SIM_RUN_OBJS): Change from run.o to nrun.o.
1066 * cpu.h (sim_cpu): New member base. Delete members trace, sd.
1067 (cpu_traces): Delete.
1068 * engine.c (engine_init): Set backlink from cpu to state.
1069 * sim-calls.c: #include bfd.h.
1070 (sim_open): Set STATE_OPEN_KIND. Call sim_pre_argv_init,
1071 sim_parse_args.
1072 (sim_load): Return SIM_RC. New arg abfd.
1073 Call sim_load_file to load file into simulator.
1074 (sim_create_inferior): Return SIM_RC. Delete arg start_address.
1075 (sim_trace): Delete.
1076 * sim-main.h (struct sim_state): sim_state_base is typedef now.
1077 (STATE_CPU): Define.
1078
1079Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1080
1081 * configure: Regenerated to track ../common/aclocal.m4 changes.
1082 * config.in: Ditto.
1083
1084Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
1085
1086 * Makefile.in (SIM_EXTRA_DEPS): Define.
1087 (SIM_OBJS): Add sim-utils.o.
1088 (SIM_GEN): Delete tmp-common.
1089 (SIM_EXTRA_CLEAN): Delete clean-common.
1090 (BUILT_SRC_FROM_COMMON): Moved to ../common/Make-common.in.
1091 (tmp-common,clean-common): Delete.
1092 (ENGINE_H): sim-state.h renamed to sim-main.h.
1093 (clean-igen): Delete tmp-insns.
1094
1095 * cpu.c: sim-state.h renamed to sim-main.h.
1096 * engine.c: Likewise.
1097 * sim-calls.c: Likewise.
1098 (zalloc,zfree): Moved to ../common/sim-utils.c.
1099 * sim-main.h: Renamed from sim-state.h.
1100
1101 * sim-calls.c (sim_open): New arg `kind'.
1102
1103 * configure: Regenerated to track ../common/aclocal.m4 changes.
1104
1105Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1106
1107 * configure: Regenerated to track ../common/aclocal.m4 changes.
1108
1109Wed Apr 2 11:13:15 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1110
1111 * Makefile.in (SIM_OBJS): Link in the recently added sim-config.o
1112
1113 * engine.c (current_target_byte_order, current_host_byte_order,
1114 current_environment, current_alignment, current_floating_point,
1115 current_model_issue, current_stdio): Delete, moved to
1116 ../common/sim-config.c
1117
1118Mon Mar 24 14:50:30 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1119
1120 * d30v-insns (do_ldw): Load 4 bytes not 2.
1121 (do_incr, LD*, ST*): Increment register not its value.
1122
1123Mon Mar 24 09:59:53 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1124
1125 * cpu.c (is_wrong_slot): Ditto.
1126 (is_condition_ok): Ditto.
1127
1128 * sim-calls.c (sim_trace): Ditto.
1129
1130 * engine.c (engine_init): Ditto.
1131 (do_2_short): Ditto.
1132 (engine_run_until_stop): Ditto.
1133
1134 * d30v-insns (void): Update. For functions, remove `SIM_DESC sd'
1135 and `cpu *processor' arguments as igen now handles this.
1136
1137 * cpu.h: Rename struct _cpu to struct _sim_cpu. Rename variable
1138 processor to cpu.
1139
1140 * sim-state.h: Update.
1141
1142Fri Mar 21 12:52:12 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1143
1144 * d30v-insns (do_sat): Correct calculation of saturate lower
1145 bound.
1146 (do_sath): Ditto.
1147 (do_satzh, do_satz): Arguments should be signed.
1148
1149 * sim-calls.c (zalloc): Use malloc() instead of xmalloc() for
1150 moment.
1151 (filter_filename): Drop.
1152
1153 * cpu.h (is_wrong_slot): Correct declaration name - was
1154 is_valid_slot.
1155
1156 * engine.c (do_parallel): Plicate GCC.
1157 (engine_error): Ditto.
1158 (engine_run_until_stop): Ditto.
1159 * cpu.c (is_wrong_slot): Ditto.
1160 (is_condition_ok): Ditto.
1161 * sim-calls.c (sim_size): Ditto.
1162 (sim_read): Ditto.
1163 (sim_trace): Ditto.
1164
1165 * engine.h, engine.c (engine_create): Add missing prototype to
1166 header file. Clean up missing variables.
1167
1168 * configure.in (unistd.h, string.h, strings.h): Configure in.
1169 * configure, config.in: Rebuild.
1170
1171Thu Mar 20 19:40:20 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1172
1173 * d30v-insns (void): Provide a second emul instruction using a
1174 branch prefix.
1175
1176Tue Mar 18 20:51:42 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1177
1178 * d30v-insn (do_sat*): Pass all necessary args.
1179
1180Tue Mar 18 18:49:10 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1181
1182 * d30v-insns (SAT*): Issue warning when bit overflow.
1183 (EMUL): Exit with GPR[2] not 2.
1184
1185Tue Mar 18 14:24:09 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1186
1187 * sim-state.h: New file rename engine.h.
1188 (sim_state): Rename engine strut to sim_state, rename events and
1189 core members.
1190
1191 * engine.c: Update.
1192 * cpu.h, cpu.c: Ditto.
1193 * alu.h: Ditto.
1194 * d30v-insns: Ditto.
1195 * sim-calls.c: Ditto.
1196
1197 * Makefile.in (sim-*.c): Moved to ../common.
1198
1199Tue Mar 18 10:39:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1200
1201 * d30v-insns (do_mac): Adding wrong register.
1202 (do_macs): Ditto.
1203 (do_msub): Ditto.
1204 (do_msubs): Ditto.
1205
1206 * ic-d30v: Put back definitions of RaH, RaL, et.al.
1207 (do_sra2h, do_srah): Use.
1208 (do_srl2h, do_srlh): Use.
1209
1210 * d30v-insns (SAT, SAT2H, SATp, SATZ): Implement saturate.
1211
1212Tue Mar 18 03:01:25 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1213
1214 * d30v-insns: Specify wild insted of reserved bits.
1215 (void):
1216
1217Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1218
1219 * configure: Re-generate.
1220
1221Mon Mar 17 14:35:37 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1222
1223 * Makefile.in (SIM_EXTRA_CFLAGS), configure.in: Include SIM_*
1224 options. Allow RESERVED_BITS to be configured.
1225 * configure: Re-generate.
1226
1227 * Makefile.in (sim-*.h): Drop, not needed.
1228 (sim-*.c): Make each explicit so that they automatically update.
1229
1230Sat Mar 15 02:34:30 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1231
1232 * ic-d30v (imm long): Incorrect calculation.
1233
1234 * d30v-insns (EMUL): Finish exit, write-string emul-call.
1235
1236 * sim-calls.c (sim_trace): Have sim-trace enable basic instruction
1237 tracing.
1238
1239Sat Mar 15 02:10:31 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1240
1241 * configure.in: Enable common options - endian, inline and
1242 warnings.
1243 * configure: Regenerate.
1244
1245Fri Mar 14 16:11:50 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1246
1247 * Makefile.in (cpu.o): Update dependencies.
1248 * cpu.c (is_condition_ok): Update PSW bit manipulations.
1249
1250Fri Mar 14 12:49:20 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1251
1252 * configure.in: Autoconfig m4
1253 * configure: Regenerate.
1254
1255 * Makefile.in: Use m4 to preprocess d30v-insns.
1256 * d30v-insn: Adjust.
1257
1258Thu Mar 13 12:44:54 1997 Doug Evans <dje@canuck.cygnus.com>
1259
1260 * sim-calls.c (sim_open): New SIM_DESC result. Argument is now
1261 in argv form.
1262 (other sim_*): New SIM_DESC argument.
1263
1264Wed Mar 12 19:05:45 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1265
1266 * sim-calls.c (sim_open): Create all the d30v RAM blocks.
1267
1268 * engine.c (engine_run_until_stop): Handle delayed subroutine
1269 call.
1270 * d30v-insn: Ditto.
1271
1272 * ic-d30v: For Rb and Rc always return the value and not the
1273 equation.
1274 * d30v-insn: Use.
1275
1276 * ic-d30v (val_Ra): Returns 0 or RA.
1277 * d30v-insn: Use.
1278
1279 * d30v-insn (make_even_reg, get_even_reg): New functions. Force
1280 the register index to be even, issusing a warning if it was not.
1281 (LD*, ST*): Use.
1282
1283Wed Mar 12 14:57:26 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1284
1285 * d30v-insns (do_trap): Implement TRAP instruction.
1286
1287 * alu.h (PSW_F, PSW_FLAG_VAL, PSW_FLAG_SET): New macro, map flag
1288 onto PSW bit.
1289 * ic-d30v: Drop F* expressions.
1290 * d30v-insn: Use more explicit PSW_FLAG_ ops.
1291 * cpu.h (PSW_*): Redo PSW bit values.
1292 * alu.h (ALU*_END): Update. Fix setting of overflow - logic was
1293 backwards.
1294
1295 * d30v-insn (MVFSYS, MVTSYS): Implement.
1296 * cpu.h (PSWH, PSWL): New macros for high, low word of PSW.
1297
1298Wed Mar 12 14:12:11 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1299
1300 * cpu.h (RPT_IS_CALL): New macro for processor field
1301 is_delayed_call. That in turn used as a flag to indicate if a
1302 delayed branch or delayed call is to occure.
1303 * d30v-insns (do_dbra): Set/clear RPT_IS_CALL;
1304 (do_dbrai): Ditto.
1305 (do_dbsr): Ditto.
1306 (do_dbsr): Ditto.
1307 (do_djmp): Ditto.
1308 (do_djmpi): Dotto.
1309 (do_djsr): Ditto.
1310 (do_djsri): Ditto.
1311 (void):
1312
1313 * d30v-insn (do_incr): Finish - handle modulo registers.
1314
1315 * d30v-insns (CMPU): Include all possible compare
1316 operations. Issue a warning where op defined by the processor
1317 spec.
1318
1319Wed Mar 12 13:55:55 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1320
1321 * d30v-insns: Add a new instruction class _EMUL and a new
1322 instruction EMUL that emulates a few basic IO operations.
1323
1324 * Makefile.in (tmp-igen): Filter in emul instructions.
1325
1326Fri Mar 7 20:32:13 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1327
1328 * d30v-insns (void): Fill in the gaps.
1329
1330Wed Feb 26 09:31:10 1997 Andrew Cagney <cagney@kremvax.tpgi.com.au>
1331
1332 * Makefile.in (tmp-igen): Include ic-d30v in dependencies.
1333
1334 * ic-d30v (cache): Update to use H_word, L_word added to
1335 sim-endian.h.
1336
1337Tue Feb 25 15:26:51 1997 Andrew Cagney <cagney@kremvax.tpgi.com.au>
1338
1339 * Makefile.in (tmp-igen): Correctly run $(MAKE).
1340
1341Thu Feb 20 20:30:31 1997 Andrew Cagney <cagney@critters.cygnus.com>
1342
1343 * Makefile.in (FROM_IGEN, FROM_COMMON): Make the igen generated
1344 files dependant on tmp-igen. Define ENGINE_H.
1345
1346Sun Feb 16 16:42:48 1997 Andrew Cagney <cagney@critters.cygnus.com>
1347
1348 * configure.in: New file - follow Doug Evans instructions.
1349 * Makefile.in: Ditto.
1350
GDB Binutils - Deliverables
This page took 0.11859 seconds and 4 git commands to generate.