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[deliverable/binutils-gdb.git] / sim / d30v / ChangeLog
CommitLineData
7a292a7a
SS		 11999-03-16 Martin Hunt <hunt@cygnus.com>
2 From Frank Ch. Eigler <fche@cygnus.com>
3
4 * cpu.h (mvtsys_left_p): New flag for MVTSYS instruction history.
5 * d30v-insns (mvtsys): Set this flag instead of left_kills_right_p.
6 (do_sath): Detect MVTSYS by new flag.
7 * engine.c (unqueue_writes): Detect MVTSYS by new flag.
8 (do_2_short, do_parallel): Initialize new flag.
9
101999-02-26 Frank Ch. Eigler <fche@cygnus.com>
11
12 * tconfig.in (SIM_HANDLES_LMA): Make it so.
13
c906108c
SS		 141999-01-12 Frank Ch. Eigler <fche@cygnus.com>
15
16 * engine.c (unqueue_writes): Make PSW conflict resolution code
17 conditional - disable it for MVTSYS || insn case.
18
191999-01-11 Frank Ch. Eigler <fche@cygnus.com>
20
21 * d30v-insns (do_sath): Drain PSW write queue before PSW_S_FLAG
22 update.
23 * engine.c (unqueue_writes): Make non-static. Remove PSW_V/VA
24 special case.
25 (do_parallel): Don't drain PSW write queue for MVTSYS || insn.
26
271999-01-07 Frank Ch. Eigler <fche@cygnus.com>
28
29 * d30v-insns (do_ld2h): Sign-extend loaded half-words.
30
311999-01-05 Frank Ch. Eigler <fche@cygnus.com>
32
33 * d30v-insns (do_ld2h): Read memory in word units.
34 (do_ld4bh): Ditto. Correct sign extension.
35 (do_ld4bhu): Ditto.
36 (do_st2h): Write memory in word units.
37 (do_st4hb): Ditto.
38 (st4hb): Correct mnemonic in igen template.
39
401998-12-08 Frank Ch. Eigler <fche@cygnus.com>
41
42 * d30v-insns: (do_ld2h): Don't update R0 nor R1 for double-word insn.
43 (do_ld2w): Ditto.
44 (do_ld4bh): Ditto.
45 (do_ld4bhu): Ditto.
46 (do_mulx2h): Ditto.
47
481998-12-03 Frank Ch. Eigler <fche@cygnus.com>
49
50 * d30v-insns (do_repeat): Don't set RP for repeat count 1.
51
521998-12-03 Frank Ch. Eigler <fche@cygnus.com>
53
54 * d30v-insns (do_src): Treat shift count -32 naturally instead of
55 producing zero result.
56
571998-11-22 Frank Ch. Eigler <fche@cygnus.com>
58
59 * d30v-insns (do_src): Limit SRC shift count to -32 .. 31.
60
611998-11-16 Frank Ch. Eigler <fche@cygnus.com>
62
63 * d30v-insns (dbt): Defer PSW/DPSW update with new DID_TRAP code 2.
64 * engine.c (unqueue_writes): Perform DBT processing on PSW/DPSW here.
65
661998-11-12 Frank Ch. Eigler <fche@cygnus.com>
67
68 * cpu.h (_sim_cpu): Removed is_delayed_call field, and associated
69 RPT_IS_CALL macro.
70 * sim-calls.c (sim_create_inferior): Don't initialize is_delayed_call.
71 * d30v-insns (do_dbra): Don't clear RPT_IS_CALL. (do_dbrai): Ditto.
72 (do_djmp): Ditto. (do_djmpi): Ditto. (do_repeat): Ditto.
73 * d30v-insns (do_dbsr): Don't set RPT_IS_CALL, but set R62 instead.
74 (do_dbsri): Ditto. (do_djsr): Dito. (do_djsri): Ditto.
75 * engine.c (sim_engine_run): Remove conditional setting of R62 based
76 upon RPT_IS_CALL.
77
781998-11-08 Frank Ch. Eigler <fche@cygnus.com>
79
80 * sim-calls.c (sim_open): Add dummy memory range over control
81 register region (0x40000000..0x4000FFFF).
82
831998-11-06 Frank Ch. Eigler <fche@cygnus.com>
84
85 * d30v-insns (do_mvfacc): Use loop to limit shift count to 63 .. 0.
86
87Tue Oct 13 11:01:16 1998 Frank Ch. Eigler <fche@cygnus.com>
88
89 * d30v-insns (do_sra,do_srah,do_srl,do_srlh): Make shift
90 count -32 to produce zero result.
91 (do_src): Ditto for shift count == -64.
92
93Mon Oct 12 23:04:11 1998 Frank Ch. Eigler <fche@cygnus.com>
94
95 * d30v-insns (ROT): Use 0x1f bit mask for rotate count masking.
96 (do_sra,do_srl): Use loop to limit shift count to -32 .. 31.
97 (do_srah,do_srlh): Use loop to limit shift count to -32 .. 31.
98 (sra2h,srl2h): Use loop to limit shift count to -16 .. 15.
99 (do_src): Use loop to limit shift count to -64 .. 63.
100
101Fri Oct 9 16:46:52 1998 Doug Evans <devans@canuck.cygnus.com>
102
103 * sim-calls.c (get_insn_name): New fn.
104 (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
105 * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
106
107Mon Sep 28 10:43:28 1998 Frank Ch. Eigler <fche@cygnus.com>
108
109 * d30v-insns (do_sra,do_srah,do_srl,do_srlh,ROT,do_src): Use
110 correct MSB bit numbers for sign extension masks.
111
112Fri Sep 25 17:32:27 1998 Frank Ch. Eigler <fche@cygnus.com>
113
114 * engine.c (do_parallel): Unqueue writes if MU instruction was
115 a MVTSYS, as identified by its left_kills_right_p side-effect.
116
117Fri Sep 25 12:31:34 1998 Frank Ch. Eigler <fche@cygnus.com>
118
119 * d30v-insns (do_sra,do_srah,do_srl,do_srlh,ROT,do_src): Mask
120 shift/rotate counts to number of bits in width of operand; no
121 longer saturate at maxima.
122
123Tue Jul 14 18:39:23 1998 Frank Ch. Eigler <fche@cygnus.com>
124
125 * cpu.h (left_kills_right_p): New flag for non-branch instructions
126 that, when executed in left slot of a -> sequential pair, kill the
127 right slot.
128 * d30v-insns (mvtsys): Set flag for PSW/PSWh/PSWl/FLAG operands.
129 * engine.c (do_2_short): Respect flag.
130
131Thu Jun 4 16:48:58 1998 David Taylor <taylor@texas.cygnus.com>
132
133 * d30v-insns (do_trap): don't save the bPSW and PSW based on
134 current values because an instruction done in parallel with
135 the trap might change them, instead set a flag do that
136 unqueue_writes will take care of it.
137 * engine.c (unqueue_writes): finish trap handling
138 * cpu.h (_sim_cpu): add new field did_trap and a macro DID_TRAP
139 to make use of it; set by do_trap, tested and cleared by
140 unqueue_writes.
141
142Tue May 19 16:07:04 1998 Frank Ch. Eigler <fche@cygnus.com>
143
144 * engine.c (unqueue_writes): Suppress the all enqueued writes to
145 the same flags in PSW except the last.
146
147Fri May 15 11:38:59 1998 Frank Ch. Eigler <fche@cygnus.com>
148
149 * d30v-insns (RETI): Correct instruction spelling to "reit".
150
151Thu May 14 09:34:20 1998 Frank Ch. Eigler <fche@cygnus.com>
152
153 * d30v-insns (dbt): Handle DBT at end of repeat block.
154 (do_trap, dbt): Clear PSW_RP if at end of repeat block.
155
156Thu May 14 07:41:41 1998 Frank Ch. Eigler <fche@cygnus.com>
157
158 * engine.c (sim_engine_run): Trigger DDBT based on previous PC,
159 instead of next PC.
160
161Wed May 13 11:03:40 1998 Frank Ch. Eigler <fche@cygnus.com>
162
163 * engine.c (sim_engine_run): Move DDBT handling after instruction
164 decode/execute stage.
165
166Tue May 12 12:14:53 1998 Frank Ch. Eigler <fche@cygnus.com>
167
168 * d30v-insns (do_sat*): Correct "saturate to 0 bits" patch to
169 properly handle negative saturation inputs.
170
171Tue May 12 11:11:26 1998 Frank Ch. Eigler <fche@cygnus.com>
172
173 * engine.c (sim_engine_run): Decrement RPT_C only under more
174 restricted conditions.
175
176Mon May 11 17:33:46 1998 Frank Ch. Eigler <fche@cygnus.com>
177
178 * d30v-insns (do_sat*): Make "saturate to 0 bits" pass through data
179 unchanged.
180
181Mon May 11 16:27:04 1998 Frank Ch. Eigler <fche@cygnus.com>
182
183 * engine.c (sim_engine_run): Implement DDBT (debugger debug trap)
184 functionality.
185
186Fri May 8 16:44:19 1998 Frank Ch. Eigler <fche@cygnus.com>
187
188 * d30v-insns (do_trap): Set bPC to RPT_S if trap is last
189 instruction in repeat block.
190 (bsr*/jsr*): Set R62 (LINK) to RPT_S if subroutine branch
191 is last instruction in repeat block.
192
193Fri May 8 11:06:50 1998 Frank Ch. Eigler <fche@cygnus.com>
194
195 * d30v-insns (do_sath): Query/update F4/PSW_S using proper flag
196 macro.
197 * cpu.h (PSW_S_FLAG): New flag number for PSW_S status bit.
198
199Wed May 6 19:40:56 1998 Doug Evans <devans@canuck.cygnus.com>
200
201 * sim-main.h (INSN_NAME): New arg `cpu'.
202
203Fri May 1 14:24:30 1998 Andrew Cagney <cagney@b1.cygnus.com>
204
205 * d30v-insns: Fix parameter list to sim_engine_abort.
206
207Thu Apr 30 14:28:00 1998 Fred Fish <fnf@cygnus.com>
208
209 * d30v-insns (do_sath): Add additional argument that determines
210 whether or not the F4 (PSW_S) bit in the PSW is updated.
211 (SAT2H): Do not update PSW_S bit.
212 (SATHp): Do update PSW_S bit.
213
214Tue Apr 28 23:36:00 1998 Fred Fish <fnf@cygnus.com>
215
216 * d30v-insns (SRAHp, SRLHp): Immediate values are signed 6 bit
217 values, not 5 bit values.
218
219Wed Apr 29 12:57:55 1998 Frank Ch. Eigler <fche@cygnus.com>
220
221 * d30v-insns (do_incr): Check modular arithmetic limits after
222 postincrement/postdecrement, rather than before, to match
223 erroneous hardware behavior.
224
225Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com>
226
227 * configure: Regenerated to track ../common/aclocal.m4 changes.
228
229Mon Apr 27 19:42:00 1998 Fred Fish <fnf@cygnus.com>
230
231 * d30v-insns (do_trap): Clear all bits in PSW except SM and DB.
232
233Mon Apr 27 14:55:00 1998 Fred Fish <fnf@cygnus.com>
234
235 * d30v-insns (do_mulx2h): Low order results go in ra+1, high
236 order in ra.
237
238Mon Apr 27 14:42:00 1998 Fred Fish <fnf@cygnus.com>
239
240 * d30v-insns (do_mulx2h): Rewrite to do proper 32 bit signed
241 multiply of high and low fields from operands.
242
243Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche>
244
245 * configure: Regenerated to track ../common/aclocal.m4 changes.
246 * config.in: Ditto.
247
248Sun Apr 26 15:20:20 1998 Tom Tromey <tromey@cygnus.com>
249
250 * acconfig.h: New file.
251 * configure.in: Reverted change of Apr 24; use sinclude again.
252
253Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche>
254
255 * configure: Regenerated to track ../common/aclocal.m4 changes.
256 * config.in: Ditto.
257
258Fri Apr 24 11:20:00 1998 Tom Tromey <tromey@cygnus.com>
259
260 * configure.in: Don't call sinclude.
261
262Wed Apr 22 21:23:00 1998 Fred Fish <fnf@cygnus.com>
263
264 * ic-d30v (RbU, RcU): Unsigned versions of Rb and Rc.
265 * d30v-insns (MVTACC): Use new RbU and RcU macros.
266
267Wed Apr 22 20:52:00 1998 Fred Fish <fnf@cygnus.com>
268
269 * ic-d30v (RbHU,RbLU): Unsigned versions of RbH and RbL.
270 * d30v-insns (SRL2H): Use new RbHU and RbLU macros instead of
271 RbH and RbL.
272
273Mon Apr 13 16:59:00 1998 Fred Fish <fnf@cygnus.com>
274
275 * d30v-insns (do_srl): Avoid undefined behavior of host compiler
276 when shifting left by more than 31 bits.
277
278Tue Apr 7 18:09:00 1998 Fred Fish <fnf@cygnus.com>
279
280 * engine.c (sim_engine_run): Remove at_loop_end variable. Add
281 rp_was_set and rpt_c_was_nonzero variables. Major restructuring of
282 code before and after instruction execution to properly handle state
283 of the RP bit in the PSW, the value in RPT_C, and other loop related
284 problems.
285
286Sat Apr 4 20:36:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
287
288 * configure: Regenerated to track ../common/aclocal.m4 changes.
289
290Fri Apr 3 15:26:00 1998 Fred Fish <fnf@cygnus.com>
291
292 * d30v-insns (do_trap): Use offset from EIT_VB rather than hardcoded
293 BASE_ADDRESS constant.
294 * cpu.h (BASE_ADDRESS): Remove constant not used any longer.
295
296Fri Apr 3 14:42:00 1998 Fred Fish <fnf@cygnus.com>
297
298 * cpu.h (EIT_VB): Define macro to access EIT_VB register.
299 (EIT_VB_DEFAULT): Define value of EIT_VB register after reset.
300 * sim-calls.c (sim_create_inferior): Set EIT_VB to EIT_VB_DEFAULT.
301
302Tue Mar 31 19:00:00 1998 Fred Fish <fnf@cygnus.com>
303
304 * d30v-insns (do_dbrai): RPT_S is cia plus pcdisp rather than
305 just pcdisp.
306
307Mon Mar 30 20:30:00 1998 Fred Fish <fnf@cygnus.com>
308
309 * engine.c (sim_engine_run): Add at_loop_end. Rework end of loop
310 code to use this to both reset PSW_RP when needed and to set PC
311 to RPT_S for another pass through the loop.
312
313Mon Mar 30 16:12:00 1998 Fred Fish <fnf@cygnus.com>
314
315 * engine.c (sim_engine_run): Change code that handles RPT_* regs
316 and PSW_RP bit in PSW so that PSW_RP is always set while executing
317 the loop and loop terminates upon completion of the pass for which
318 RPT_C is zero. More closely follow logic in architecture manual.
319
320Fri Mar 27 16:15:52 1998 Andrew Cagney <cagney@b1.cygnus.com>
321
322 * configure: Regenerated to track ../common/aclocal.m4 changes.
323
324Wed Mar 25 12:35:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
325
326 * configure: Regenerated to track ../common/aclocal.m4 changes.
327
328Thu Mar 19 00:25:43 1998 Andrew Cagney <cagney@b1.cygnus.com>
329
330 * sim-calls.c (sim_open): Move memory-region commands back to
331 before the call to sim_parse_args.
332 (d30v_option_handler): Implement extmem-size option using
333 memory-delete and memory-region commands.
334
335 * sim-calls.c (d30v_option_handler): Use ANSI-C argument list,
336 correct number and type of arguments.
337
338Wed Mar 18 12:38:12 1998 Andrew Cagney <cagney@b1.cygnus.com>
339
340 * configure: Regenerated to track ../common/aclocal.m4 changes.
341
342Wed Mar 11 13:56:32 1998 Andrew Cagney <cagney@b1.cygnus.com>
343
344 * alu.h (IMEM, MEM, STORE): Replace sim_core_*_map with exec_map,
345 read_map and write_map resp.
346
347 * cpu.c (d30v_read_mem, d30v_write_mem): Ditto.
348
349Mon Mar 2 13:34:08 1998 Fred Fish <fnf@cygnus.com>
350
351 * d30v-insns (do_repeat): Abort repeat instructions that have
352 a repeat count of zero.
353
354Fri Feb 27 18:44:12 1998 Doug Evans <devans@canuck.cygnus.com>
355
356 * sim-calls.c (sim_open): Update call to sim_add_option_table.
357
358Thu Feb 26 18:34:31 1998 Andrew Cagney <cagney@b1.cygnus.com>
359
360 * sim-calls.c (sim_info): Delete.
361
362Wed Feb 25 14:44:58 1998 Michael Meissner <meissner@cygnus.com>
363
364 * d30v-insns (mvtsys): If moving to EIT_VB register, and with
365 valid bits. Optimize code somewhat.
366
367 * cpu.h (eit_vector_base_cr): New CR we need to special case.
368 (EIT_VALID): Valid bits for EIT_VB register.
369
370 * d30v-insns (mv{f,t}sys): When moving to/from PSWH, the value is
371 in the low 16 bits of the register.
372
373 * d30v-insns (do_sra): Use a common WRITE32_QUEUE to write back
374 results.
375 (do_sr{a,l}h): Do shift in 32 bits, only truncate when writing
376 result back to the registers.
377
378Tue Feb 24 18:09:52 1998 Fred Fish <fnf@cygnus.com>
379
380 * Makefile.in (tmp-igen): Use -G gen-zero-r0 option to force
381 r0 to always be zero.
382 * cpu.h (GPR_SET): Define.
383
384Tue Feb 24 14:12:57 1998 Michael Meissner <meissner@cygnus.com>
385
386 * d30v-insns (do_sath): Do saturation in 32 bits, before
387 converting to 16.
388 (sat{,2h,z,hp}): Use imm_5, not imm to get proper zero extend.
389 (do_sath_p): Delete, no longer used.
390 (sathp): Call do_sath, not do_sath_p.
391
392Mon Feb 23 15:55:14 1998 Michael Meissner <meissner@cygnus.com>
393
394 * d30v-insns (illegal,wrong_slot): Print \n after PC and before we
395 call sim_engine_halt.
396 (sr{a,l}hp): Implement missing instructions.
397 (do_trap): Print high order PSW bits in human readable fashion.
398 (do_{dbra{,i},dbsr{,i},djmp{,i},djsr{,i},repeat}): Set PSW bit RP.
399
400 * alu.h (PSW_SET_QUEUE): New macro to set PSW bits.
401
402 * engine.c (sim_engine_run): Check for RP bit being set, not RPT_C
403 being > 0. If RPT_C is decremented to 0, clear PSW RP bit.
404
405Fri Feb 20 10:13:34 1998 Fred Fish <fnf@cygnus.com>
406
407 * cpu.h (BASE_ADDRESS): Change from 0xfffff000 to 0xfffff020.
408
409Tue Feb 17 12:39:52 1998 Andrew Cagney <cagney@b1.cygnus.com>
410
411 * sim-calls.c (sim_store_register, sim_fetch_register): Pass in
412 length parameter. Return -1.
413
414Fri Feb 6 17:39:54 1998 Michael Meissner <meissner@cygnus.com>
415
416 * d30v-insns (do_dbrai): Correct typo, use shift, not comparison.
417
418Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com>
419
420 * configure: Regenerated to track ../common/aclocal.m4 changes.
421
422Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com>
423
424 * configure: Regenerated to track ../common/aclocal.m4 changes.
425
426Fri Jan 30 08:29:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
427
428 * engine.c (sim_engine_run): Add parameter nr_cpus.
429
430Fri Jan 30 17:09:37 1998 Michael Meissner <meissner@cygnus.com>
431
432 * d30v-insns (jsrtzr): Check for register == 0, not != 0.
433
434Wed Jan 21 17:52:04 1998 Andrew Cagney <cagney@b1.cygnus.com>
435
436 * engine.c (do_stack_swap): Make type of new_sp unsigned.
437
438Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba>
439
440 * configure: Regenerated to track ../common/aclocal.m4 changes.
441
442Mon Jan 5 16:04:17 1998 Andrew Cagney <cagney@sanguine.cygnus.com>
443
444 * sim-calls.c (sim_info): Call profile_print.
445
446 * sim-main.h: Enable instruction profiling.
447
448Thu Dec 18 12:21:38 1997 Michael Meissner <meissner@cygnus.com>
449
450 * alu.h (ALU{16,32}_END): Change setting PSW to only set the carry
451 and overflow bits. Don't look at the current value of PSW.
452 (PSW_FLAG_SET_QUEUE): Only queue up setting the particular bit in
453 question. Don't look at the current value of PSW.
454
455 * d30v-insns: All instructions that set the PSW, will only queue
456 up the particular bits in question that were set by the
457 instruction. Don't look at the current value of PSW.
458
459Wed Dec 17 11:41:44 1997 Michael Meissner <meissner@cygnus.com>
460
461 * cpu.h (PSW_VALID): Allow EA/DB to be set in the PSW.
462 (DPSW_VALID): Like PSW_VALID, but it allows the DS bit to be set.
463
464 * engine.c (trace_alu32): When changing BPSW/DPSW, print the
465 special PSW bits.
466
467 * d30v-insns (do_cmp_cc): Fix cmpps and cmpng.
468 (do_cmp{,u}_cc): Print which cc value was used if not in switch
469 statement.
470 (do_cmpu_cc): Remove illegal cases CMPU{EQ,NE,PS,NG}.
471 (mvtsys): When setting BPSW or DPSW, and with DPSW_VALID.
472
473Tue Dec 16 18:17:26 1997 Michael Meissner <meissner@cygnus.com>
474
475 * d30v-insns (mulx2h): Add missing instruction. Complain if
476 register is not even.
477 (do_{add,sub}h_ppp): Get correct high/low values. Also correctly
478 handle short immediates.
479 (do_ld{2w,4bh}): Don't load r0 if ra == 0.
480
481 * engine.c (d30v_interrupt_event): Remove unused variable
482 (unqueue_writes): Ditto.
483
484Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
485
486 * configure: Regenerated to track ../common/aclocal.m4 changes.
487 * config.in: Ditto.
488
489Sat Dec 13 23:40:17 1997 Michael Meissner <meissner@cygnus.com>
490
491 * cpu.h (_write{32,64}): New structures for keeping track of
492 queued writes to registers.
493 (_sim_cpu): Add _write{32,64} structures. Make is_delayed_call
494 unsigned32 also.
495 (WRITE{32,64}*): New macros for queueing up writes to registers.
496
497 * alu.h (ALU16_END): Take field that says whether we are setting
498 the high or low half word. Queue up changes to registers.
499 (ALU32_END): Queue up changes to registers.
500 (PSW_FLAG_SET_QUEUE): Like PSW_FLAG_SET, except queues it up.
501
502 * sim-main.h (do_stack_swap): Remove declaration.
503
504 * engine.c (do_stack_swap): Make static.
505 (unqueue_writes): New function to unqueue all changes to 32 and 64
506 bit registers in order. Implement --trace-alu. Reset high water
507 marks for # of queued registers. If PSW changed, possibly update
508 stack pointer.
509 (do_{long,2_short,parallel}): Unqueue register writes at the
510 appropriate time.
511
512 * d30v-insns: Modify all insns to queue changes to registers,
513 rather than do them immediately so that parallel instructions get
514 the right values for inputs. Rewrite 16 bit operations to be done
515 in terms of masked 32 bit registers. Don't call do_stack_swap any
516 more here.
517
518Thu Dec 11 10:06:02 1997 Michael Meissner <meissner@cygnus.com>
519
520 * sim-calls.c (d30v_option_handler): Add support for --extmem-size
521 to size external memory.
522 (sim_open): Ditto. Default if no --extmem-size option is 8 meg.
523
524Wed Dec 10 01:08:24 1997 Jim Blandy <jimb@zwingli.cygnus.com>
525
526 * d30v-insns (do_rot2h): Clip rotate amounts to four bits. The
527 upper bits, and the sign of the rotation amount, are red herrings.
528 (do_sra, do_srl): Handle shifts greater than 32 bits.
529 (do_srah, do_sral): Properly sign-extend value and shift amount.
530 Handle shifts larger than 16 bits.
531
532Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com>
533
534 * configure: Regenerated to track ../common/aclocal.m4 changes.
535
536Mon Dec 1 15:10:44 1997 Michael Meissner <meissner@cygnus.com>
537
538 * d30v-insns (do_sub2h): For short instruction, correctly
539 dupplicate lower 16 bits of immediate in upper 16 bits.
540 (sat2z): Fix typo that ignored the upper half of the register.
541 (do_satz): If < 0, set *ra to 0, if not call do_sat.
542 (mvtsys): Before setting PSW, and with PSW_VALID.
543
544 * cpu.h (PSW_VALID): Mask for bits in PSW that is valid.
545
546Mon Dec 1 15:05:03 1997 Andrew Cagney <cagney@b1.cygnus.com>
547
548 * d30v-insns (do_trap): Pacify GCC - correct type of %ld arg in
549 printf, return dummy at end.
550
551Mon Dec 1 15:05:03 1997 Andrew Cagney <cagney@b1.cygnus.com>
552
553 * d30v-insns (do_add, do_addh_ppp, do_adds): Replace ALU_ADD with
554 ALU_ADDC.
555 (do_addc): Replace ALU_SET_CARRY / ALU_ADD_CA with ALU_ADDC_C.
556 (do_sub, do_subh_ppp): Replace ALU_SUB with ALU_SUBB.
557 (do_subb): Replace ALU_SET_CARRY / ALU_SUB_CA with ALU_SUBB_B.
558
559 * alu.h (ALU16_END): Use ALU16_HAD_CARRY_BORROW instead of
560 ALU16_HAD_CARRY.
561 (ALU32_END): Ditto.
562
563 * sim-main.h (string.h, strings.h): Include.
564
565 * sim-calls.c: Delete inclusion of string.h and strings.h.
566
567Sun Nov 30 17:29:25 1997 Michael Meissner <meissner@cygnus.com>
568
569 * configure.in (--enable-sim-trapdump): New switch to control
570 whether traps 0..30 dump out the registers or do the real trap.
571 * configure: Regenerate.
572
573 * Makefile.in (SIM_EXTRA_CLFAGS): Add -DTRAPDUMP={0,1} if
574 appropriate --{en,dis}able-sim-trapdump is done.
575
576 * sim-calls.c (OPTION_TRACE_CALL): Rename from OPTION_CALL_TRACE.
577 (OPTION_TRACE_TRAPDUMP): New option for --trace-trapdump.
578 (d30v_option_handler): Add support for --trace-trapdump.
579 (d30v_options): Ditto.
580 (sim_open): Ditto.
581
582 * d30v-insns (do_trap): Do register dump if --trace-trapdump and
583 not the system call trap. Remove support for calling old function
584 sim_io_syscalls.
585
586Sat Nov 29 18:54:55 1997 Michael Meissner <meissner@cygnus.com>
587
588 * cpu.h (_sim_cpu): Add trace_call_p, trace_action fields.
589 (TRACE_CALL_P): Non-zero if --trace-call.
590 (TRACE_ACTION): Non-zero if there is a tracing action at the end
591 of processing an instruction boundary.
592 (TRACE_ACTION_{CALL,RETURN}): Bits to say trace call & return.
593 (d30v_next_insn): Delete, now trace_action field in cpu state.
594
595 * cpu.c (d30v_next_insn): Delete, now trace_action field in cpu
596 state.
597 (return_occurred): Minimum saved register to check is now 34.
598
599 * engine.c (sim_engine_run): Change call tracing to use
600 trace_action field in cpu state.
601
602 * sim-calls.c (d30v_option_handler): Handle d30v specific options.
603 (d30v_options): D30V specific options. Right now, --trace-call.
604 (sim_open): Register d30v specific options.
605
606 * d30v-insns (call, return insns): Move --trace-debug call/return
607 tracing action to d30v specific --trace-call option.
608
609Fri Nov 28 20:12:48 1997 Michael Meissner <meissner@cygnus.com>
610
611 * cpu.h (CREG): Rename from CR.
612
613 * d30v-insns (do_{addc,subb}): Explicitly import the carry bit.
614 (do_trap): Use CREG, not CR. Switch to using cb_syscall.
615
616Thu Nov 27 19:25:43 1997 Michael Meissner <meissner@cygnus.com>
617
618 * cpu.h (ACC): Define as short cut to accumulators.
619
620 * d30v-insns (do_rot): Delete explicit function, use ROT32 to do
621 rotate instruction.
622 (do_trap): Make trap 30 print out accumulators and first 16
623 control registers as well.
624 (do_avg): Sign extend to 64 bit type before doing add/shift.
625 (do_avg2h): Sign extend 16 bit chunks before doing add/shift.
626
627Wed Nov 26 15:20:24 1997 Doug Evans <devans@canuck.cygnus.com>
628
629 * Makefile.in (NL_TARGET): Define.
630
631Wed Nov 26 16:55:38 1997 Michael Meissner <meissner@cygnus.com>
632
633 * cpu.h (d30v_next_insn): New flag for things we are supposed to
634 trace between instruction words.
635 ({call,return}_occurred): Remove index argument.
636 (d30v_{read,write}_mem): Add declarations.
637
638 * cpu.c (d30v_next_insn): New flag for things we are supposed to
639 trace between instruction words.
640 ({call,return}_occurred): Remove index argument.
641 (d30v_{read,write}_mem): New functions for reading/writing
642 simulated memory in the new common system call support.
643
644 * d30v-insns: Set emacs C mode.
645 (call/return insns): Set bit to trace call at instruction
646 boundary, rather than doing it here.
647 (do_trap): Set up to use new common system call interface.
648
649 * engine.c (sim_engine_run): If d30v_next_insn is non zero, do
650 function call/return tracing.
651
652Mon Nov 24 16:40:49 1997 Michael Meissner <meissner@cygnus.com>
653
654 * d30v-insns (bnot): Correctly reset bit in question.
655 (do_trap): Use common system call emulation support, rather than
656 our home grown support.
657
658Sun Nov 23 22:47:20 1997 Michael Meissner <meissner@cygnus.com>
659
660 * d30v-insns (mvfacc): Immediate field is unsigned, allowing
661 shifts of up to 63 to be encoded. Also do shift signed, rather
662 than unsigned.
663
664 * ic-d30v (IMM_6S): Add field for 6 bit unsigned constants.
665
666 * d30v-insns (cmpu): Short cmpu zero extends immediate, not sign
667 extends.
668
669Sat Nov 22 19:04:34 1997 Andrew Cagney <cagney@b1.cygnus.com>
670
671 * d30v-insns (illegal, wrong_slot): Replace SIGILL with
672 SIM_SIGILL.
673
674 * sim-calls.c (signal.h): Do not include, replaced by
675 sim-signal.h.
676
677 * sim-main.h (signal.h): Do not include, include sim-signal.h
678 instead.
679
680Fri Nov 21 09:33:54 1997 Andrew Cagney <cagney@b1.cygnus.com>
681
682 * cpu.c (call_occurred): Use ZALLOC instead of xmalloc.
683 (return_occurred): Use zfree instead of free.
684
685Wed Nov 19 13:28:09 1997 Michael Meissner <meissner@cygnus.com>
686
687 * Makefile.in ({l,s}_{support,semantics}.o): Depend on the include
688 files in $(ENGINE_H).
689
690 * d30v-insns (do_{add,addc,sub,subb}): ALU_{ADD,SUB}_CA now takes
691 a VAL argument to add/subtract along with the carry.
692
693Tue Nov 18 15:33:48 1997 Doug Evans <devans@canuck.cygnus.com>
694
695 * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
696
697Tue Nov 18 13:56:15 1997 Michael Meissner <meissner@cygnus.com>
698
699 * d30v-insns (do_trap): Change to new system call numbers. Add
700 read emulation.
701
702Mon Nov 17 14:43:45 1997 Michael Meissner <meissner@cygnus.com>
703
704 * d30v-insns (mulx): Add mulx instruction.
705
706Sun Nov 16 19:06:56 1997 Michael Meissner <meissner@cygnus.com>
707
708 * cpu.c ({call,return}_occurred): New trace functions to mark
709 function calls and returns and check whether all saved registers
710 really were saved.
711
712 * cpu.h ({call,return}_occurred): Add declaration.
713
714 * d30v-insns ({bsr, jsr} patterns): Call call_occurred if
715 --trace-debug to trace function calls.
716 (jmp register pattern): If this is a jump r62 and --trace-debug,
717 call return_occurred to trace function calls.
718 (bsr{tnz,tzr}): Move setting r62 inside conditional against reg.
719 (do_ld2w): Grab memory in 64-bit chunk, to check alignment.
720 (do_st2w): Ditto.
721
722Sat Nov 15 20:57:57 1997 Michael Meissner <meissner@cygnus.com>
723
724 * d30v-insns: Undo changes from Nov. 11, allowing for odd register
725 pairs, since the machine doesn't support such usage. Trap on odd
726 registers, rather than give a warning. Keep do_src and do_trap
727 changes.
728
729Fri Nov 14 11:59:29 1997 Andrew Cagney <cagney@b1.cygnus.com>
730
731 * d30v-insns (do_trap): Pacify compiler warnings for printf calls.
732
733Tue Nov 11 18:26:03 1997 Michael Meissner <meissner@cygnus.com>
734
735 * d30v-insns (not_r63_reg): Rename from make_even_reg, only check
736 for register being r63. Change callers ld2{h,w}, ld4bh{,u}.
737 (get_reg_not_r63): Rename from get_even_reg, and only check for
738 register r63. Change callers st2{w,h}, st4b.
739 (do_src): Correct register pair for shift left.
740 (do_trap): Temporarily make trap 30 print out the registers.
741
742Tue Nov 4 08:51:22 1997 Michael Meissner <meissner@cygnus.com>
743
744 * d30v-insns (do_trap): Make trap 31 be used for system calls.
745 Add primitive write and exit system calls.
746
747 * Makefile (FILTER): New make variable to filter out known igen
748 warnings.
749 (tmp-igen): Add $(FILTER) on all 3 invocations of igen to filter
750 out warnings that should be ignored by default.
751
752Fri Oct 31 19:36:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
753
754 * sim-calls.c (sim_open): Change EIT to memory region.
755
756Fri Oct 17 16:51:31 1997 Andrew Cagney <cagney@b1.cygnus.com>
757
758 * alu.h (ALU16_END): Get result from ALU16_OVERFLOW_RESULT.
759 (ALU32_END): Get result from ALU32_OVERFLOW_RESULT.
760
761Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
762
763 * configure: Regenerated to track ../common/aclocal.m4 changes.
764
765Mon Sep 29 15:23:35 1997 Stu Grossman <grossman@babylon-5.cygnus.com>
766
767 * d30v-insns (MVFSYS MVTSYS): Fix bit patterns so that these
768 instructions get recognised.
769
770Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
771
772 * configure: Regenerated to track ../common/aclocal.m4 changes.
773
774Wed Sep 24 17:51:43 1997 Stu Grossman <grossman@babylon-5.cygnus.com>
775
776 * Makefile.in (SIM_OBJS): Add sim-break.o.
777 * (INCLUDE_DEPS): Add tconfig.h.
778 * alu.h (MEM STORE): Change to sim_core_read/write_unaligned to
779 allow for trapping unaligned accesses.
780 * cpu.h: Define SIM_BREAKPOINT as syscall 5 for intrinsic breakpoint
781 mechanism.
782 * d30v-insn (short syscall): Use syscall 5 for breakpoint insn.
783 * sim-calls.c (sim_fetch_register sim_store_register): Implement.
784 * tconfig.in: Define SIM_HAVE_BREAKPOINTS to enable intrinsic
785 breakpoint mechanism.
786
787Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
788
789 * configure: Regenerated to track ../common/aclocal.m4 changes.
790
791Tue Sep 23 10:19:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
792
793 * Makefile.in (SIM_WARNINGS, SIM_ALIGNMENT, SIM_ENDIAN,
794 SIM_HOSTENDIAN, SIM_RESERVED_BITS): Delete, moved to common.
795 (SIM_EXTRA_CFLAGS): Update.
796
797Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
798
799 * configure.in: Specify strict alignment.
800 * configure: Regenerated to track ../common/aclocal.m4 changes.
801
802Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
803
804 * configure: Regenerated to track ../common/aclocal.m4 changes.
805
806Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
807
808 * configure: Regenerated to track ../common/aclocal.m4 changes.
809
810Fri Sep 12 16:13:04 1997 Andrew Cagney <cagney@b1.cygnus.com>
811
812 * sim-calls.c (sim_open): Change memory to
813 internal inst. RAM h'00000000-h'0000ffff (64KB)
814 internal data RAM h'20000000-h'20007fff (32KB)
815 external RAM h'80000000-h'803fffff (4MB)
816 EIT h'fffff000-h'ffffffff
817
818
819Thu Sep 11 08:59:34 1997 Andrew Cagney <cagney@b1.cygnus.com>
820
821 * Makefile.in (SIM_OBJS): Add sim-hrw.o module.
822
823 * sim-calls.c (sim_read): Delete. use sim-hrw.
824 (sim_write): Delete, use sim-hrw.
825
826
827Tue Sep 9 01:36:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
828
829 * ic-d30v (imm_5): Update nr args passed to LSMASKED.
830
831 * d30v-insns (do_sat, do_sath, do_sath_p, do_satz, do_satzh): Fix,
832 computing the max sat value incorrectly.
833
834Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
835
836 * configure: Regenerated to track ../common/aclocal.m4 changes.
837
838Fri Sep 5 09:15:33 1997 Andrew Cagney <cagney@b1.cygnus.com>
839
840 * d30v-insns (do_mac, do_macs, do_msub, do_mulxs): Use explicit
841 type cast instead of SIGNED64 macro.
842
843Thu Sep 4 10:28:45 1997 Andrew Cagney <cagney@b1.cygnus.com>
844
845 * Makefile.in (SIM_OBJS): Include sim-memopt.o module.
846
847 * sim-calls.c (sim_open): Pass zero modulo arg to sim_core_attach
848 calls.
849 (sim_open): If no memory, use memory commands to establish d30v
850 ram.
851 (d30v_option_handler): Delete, replased by sim-memopt.c.
852 (sim_create_inferior): Call sim_module_init.
853
854 * sim-main.h (struct sim_state): Remove members eit_ram,
855 sizeof_eit_ram, external_ram, baseof_external_ram,
856 sizeof_external_ram. Using generic memory model instead.
857
858Mon Sep 1 11:04:09 1997 Andrew Cagney <cagney@b1.cygnus.com>
859
860 * sim-calls.c (sim_open): Use sim_state_alloc.
861
862Sat Aug 30 10:01:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
863
864 * sim-main.h (INVALID_INSTRUCTION_ADDRESS): Define.
865
866 * engine.c (do_2_short): Compare with INVALID_INSTRUCTION_ADDRESS
867 not -1.
868
869Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
870
871 * configure: Regenerated to track ../common/aclocal.m4 changes.
872 * config.in: Ditto.
873
874Wed Aug 27 13:41:54 1997 Andrew Cagney <cagney@b1.cygnus.com>
875
876 * sim-calls.c (sim_open): Add call to sim_analyze_program, update
877 call to sim_config.
878
879 * sim-calls.c (sim_create_inferior): Add ABFD argument.
880 Initialize CPU registers including PC.
881 (sim_load): Delete, using sim-hload.
882
883 * Makefile.in (SIM_OBJS): Add sim-hload.o module.
884
885Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
886
887 * configure: Regenerated to track ../common/aclocal.m4 changes.
888 * config.in: Ditto.
889
890Mon Aug 25 15:41:44 1997 Andrew Cagney <cagney@b1.cygnus.com>
891
892 * sim-calls.c (sim_open): Add ABFD argument.
893 (sim_open): Move sim_config call to after sim_parse_args.
894 (sim_open): Check sim_config return status.
895
896Fri Aug 22 16:38:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
897
898 * d30v-insns (do_subh_ppp): Correct name, was do_sub_ppp.
899 (do_subh_ppp): Compute rc=rb-src instead of src-rb.
900 (do_addh_ppp): Ditto.
901
902Fri Jun 27 14:43:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
903
904 * d30v-insns (mvfsys, mvtsys): Switch instruction encodings, was
905 wrong. Update handling of PSW[DS] bit.
906 (dbt): Fix debug trap address.
907
908 * cpu.h (NR_CONTROL_REGISTERS): Allow the full 64 registers.
909
910Tue Jun 24 12:41:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
911
912 * d30v-insns (DBT, RTD): Swap the stack after updating the PSW.
913 (DBT): Use PSW_SET to update PSW.
914
915 * alu.h (ALU16_END): Check for 16 bit carry and not 32 bit.
916
917Tue Jun 24 12:16:14 1997 Andrew Cagney <cagney@b2.cygnus.com>
918
919 * d30v-insns (ppp, ccc, pp, XX, p): Update format functions so
920 that they are of class %s instead of class function.
921
922Tue Jun 10 12:26:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
923
924 * sim-main.h (engine_error, engine_restart, engine_halt,
925 engine_run_until_stop): Delete prototypes. Functions deleted
926 earlier.
927 (do_interrupt_handler): Add prototype.
928 (sim_state): Add pending_event member to struct.
929
930 * sim-calls.c (sim_open): Configure interrupt handler.
931 * engine.c (d30v_interrupt_event): New function. Deliver external
932 interrupt to processor.
933
934 * d30v-insns (do_stack_swap): Move function from here.
935 * engine.c (do_stack_swap): To here.
936 * sim-main.h (do_stack_swap): Add prototype.
937
938 * cpu.h (registers): Change current_sp to an int.
939 * d30v-insn (do_stack_swap): Update.
940
941Thu Jun 5 12:54:35 1997 Andrew Cagney <cagney@b1.cygnus.com>
942
943 * d30v-insns (LD*, ST*): Disasemble XX == 0 as immed version of
944 instruction.
945 (str_XXX): Fix case of XX == 3 - return "-".
946
947Thu Jun 5 12:54:35 1997 Andrew Cagney <cagney@b1.cygnus.com>
948
949 * engine.c (sim_engine_run): Issuing L->R and R->L instructions in
950 wrong order.
951
952 * d30v-insn (CMPUcc imm long): With of RB field should be 6 not
953 three.
954 (MUL, MUL2H, MULHX): X field 01 instead of 10.
955
956Thu Jun 5 12:54:35 1997 Andrew Cagney <cagney@b1.cygnus.com>
957
958 * d30v-insns (mvtsys): Don't modify DS bit when writing to PSW.
959 (dbt, rtd): New instructions.
960
961 * cpu.h (NR_CONTROL_REGISTERS): Now 15.
962 (debug_program_status_word_cr, debug_program_counter_cr): Add
963 debug control registers. Renumber other control registers.
964 (PSW_DS): New PSW bit.
965 (DPC, DPSW): Define.
966
967Wed May 28 13:45:47 1997 Andrew Cagney <cagney@b1.cygnus.com>
968
969 * engine.c (sim_engine_run): Check the event queue on every cycle.
970
971 * sim-calls.c (sim_size): Delete.
972 (sim_do_command): Call sim_args_command.
973 (sim_open): Move eit_ram and sizeof_eit_ram to sim_state struct.
974 (simulation): Delete global now depend on sd argument.
975 (sim_open): Initialize sim-watch.
976 (d30v_option_handler): New function, parse mem-size argument.
977
978Tue May 27 14:03:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
979
980 * sim-calls.c (sim_set_callbacks): Delete.
981 (sim_write): Pass NULL cpu arg to sim_core_write_buffer.
982
983 * engine.c (engine_init): Delete. Handled in sim_open.
984 (engine_create): Ditto.
985
986Tue May 20 10:15:35 1997 Andrew Cagney <cagney@b1.cygnus.com>
987
988 * sim-calls.c (sim_open): Add callback argument.
989 (sim_set_callbacks): Delete SIM_DESC argument.
990
991Mon May 19 14:59:32 1997 Andrew Cagney <cagney@b1.cygnus.com>
992
993 * sim-calls.c (sim_open): Set the sim.base magic number.
994
995Fri May 16 15:25:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
996
997 * d30v-insns: Replace engine_error with common sim_engine_abort.
998 * cpu.c (is_condition_ok, is_wrong_slot): Ditto.
999
1000 * engine.c (engine_run_until_stop): Rename this.
1001 (sim_engine_run): To this. Simplify - most moved to common.
1002
1003 * sim-calls.c (sim_stop_reason, sim_resume, sim_stop):
1004 Delete. Replaced by common code.
1005
1006 * engine.c (engine_error, engine_restart, engine_halt): Ditto.
1007
1008 * sim-main.h (SIM_ENGINE_RESTART_HOOK, SIM_ENGINE_HALT_HOOK):
1009 Define as NOPs.
1010
1011Mon May 5 23:05:41 1997 Andrew Cagney <cagney@b1.cygnus.com>
1012
1013 * alu.h (IMEM, MEM, STORE): Update to reflect changes to core in
1014 ../common.
1015 * sim-calls.c (sim_open): Ditto.
1016
1017 * alu.h, cpu.h, cpu.c, d30v-insn, dc-short: Clean up copyright
1018 notice.
1019
1020Fri May 2 12:01:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
1021
1022 * sim-calls.c (sim-options.h, sim-utils.h): Include.
1023 * Makefile.in (sim-calls.o): Add dependencies.
1024
1025 * d30v-insns (address_word): Remove cia argument from support
1026 functions, igen now does this automatically.
1027
1028 * Makefile.in (tmp-igen): Include line number information in
1029 generated files.
1030
1031 * sim-main.h (SIM_DESC): Remove sim_events and sim_core, moved to
1032 simulator base type sim_state_base.
1033 (sim-core.h, sim-events.h, sim-io.h): Replace with #include
1034 "sim-base.h".
1035
1036 * sim-main.h (sim_state): Track recomendations in common
1037 directory.
1038 * cpu.h (sim_cpu): Ditto.
1039 * engine.c (do_2_short, do_parallel): Ditto.
1040 * cpu.h (GPR): Ditto.
1041 * alu.h (MEM, IMEM, STORE): Ditto.
1042 * cpu.c (is_wrong_slot): Ditto.
1043 * ic-d30v (Aa, Ab): Ditto.
1044
1045Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
1046
1047 * configure: Regenerated to track ../common/aclocal.m4 changes.
1048 * Makefile.in (SIM_OBJS): Add sim-module.o, sim-profile.o.
1049 * sim-calls.c (sim_open): Call sim_module_uninstall if argument
1050 parsing fails. Call sim_post_argv_init.
1051 (sim_close): Call sim_module_uninstall.
1052
1053Fri Apr 18 13:44:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
1054
1055 * sim-calls.c (sim_stop): New function.
1056
1057Thu Apr 17 02:57:55 1997 Doug Evans <dje@canuck.cygnus.com>
1058
1059 * Makefile.in (SIM_OBJS): Add sim-load.o, sim-options.o, sim-trace.o.
1060 (SIM_EXTRA_{LIBS,LIBDEPS,ALL,INSTALL}): Delete.
1061 (SIM_RUN_OBJS): Change from run.o to nrun.o.
1062 * cpu.h (sim_cpu): New member base. Delete members trace, sd.
1063 (cpu_traces): Delete.
1064 * engine.c (engine_init): Set backlink from cpu to state.
1065 * sim-calls.c: #include bfd.h.
1066 (sim_open): Set STATE_OPEN_KIND. Call sim_pre_argv_init,
1067 sim_parse_args.
1068 (sim_load): Return SIM_RC. New arg abfd.
1069 Call sim_load_file to load file into simulator.
1070 (sim_create_inferior): Return SIM_RC. Delete arg start_address.
1071 (sim_trace): Delete.
1072 * sim-main.h (struct sim_state): sim_state_base is typedef now.
1073 (STATE_CPU): Define.
1074
1075Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1076
1077 * configure: Regenerated to track ../common/aclocal.m4 changes.
1078 * config.in: Ditto.
1079
1080Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
1081
1082 * Makefile.in (SIM_EXTRA_DEPS): Define.
1083 (SIM_OBJS): Add sim-utils.o.
1084 (SIM_GEN): Delete tmp-common.
1085 (SIM_EXTRA_CLEAN): Delete clean-common.
1086 (BUILT_SRC_FROM_COMMON): Moved to ../common/Make-common.in.
1087 (tmp-common,clean-common): Delete.
1088 (ENGINE_H): sim-state.h renamed to sim-main.h.
1089 (clean-igen): Delete tmp-insns.
1090
1091 * cpu.c: sim-state.h renamed to sim-main.h.
1092 * engine.c: Likewise.
1093 * sim-calls.c: Likewise.
1094 (zalloc,zfree): Moved to ../common/sim-utils.c.
1095 * sim-main.h: Renamed from sim-state.h.
1096
1097 * sim-calls.c (sim_open): New arg `kind'.
1098
1099 * configure: Regenerated to track ../common/aclocal.m4 changes.
1100
1101Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1102
1103 * configure: Regenerated to track ../common/aclocal.m4 changes.
1104
1105Wed Apr 2 11:13:15 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1106
1107 * Makefile.in (SIM_OBJS): Link in the recently added sim-config.o
1108
1109 * engine.c (current_target_byte_order, current_host_byte_order,
1110 current_environment, current_alignment, current_floating_point,
1111 current_model_issue, current_stdio): Delete, moved to
1112 ../common/sim-config.c
1113
1114Mon Mar 24 14:50:30 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1115
1116 * d30v-insns (do_ldw): Load 4 bytes not 2.
1117 (do_incr, LD*, ST*): Increment register not its value.
1118
1119Mon Mar 24 09:59:53 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1120
1121 * cpu.c (is_wrong_slot): Ditto.
1122 (is_condition_ok): Ditto.
1123
1124 * sim-calls.c (sim_trace): Ditto.
1125
1126 * engine.c (engine_init): Ditto.
1127 (do_2_short): Ditto.
1128 (engine_run_until_stop): Ditto.
1129
1130 * d30v-insns (void): Update. For functions, remove `SIM_DESC sd'
1131 and `cpu *processor' arguments as igen now handles this.
1132
1133 * cpu.h: Rename struct _cpu to struct _sim_cpu. Rename variable
1134 processor to cpu.
1135
1136 * sim-state.h: Update.
1137
1138Fri Mar 21 12:52:12 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1139
1140 * d30v-insns (do_sat): Correct calculation of saturate lower
1141 bound.
1142 (do_sath): Ditto.
1143 (do_satzh, do_satz): Arguments should be signed.
1144
1145 * sim-calls.c (zalloc): Use malloc() instead of xmalloc() for
1146 moment.
1147 (filter_filename): Drop.
1148
1149 * cpu.h (is_wrong_slot): Correct declaration name - was
1150 is_valid_slot.
1151
1152 * engine.c (do_parallel): Plicate GCC.
1153 (engine_error): Ditto.
1154 (engine_run_until_stop): Ditto.
1155 * cpu.c (is_wrong_slot): Ditto.
1156 (is_condition_ok): Ditto.
1157 * sim-calls.c (sim_size): Ditto.
1158 (sim_read): Ditto.
1159 (sim_trace): Ditto.
1160
1161 * engine.h, engine.c (engine_create): Add missing prototype to
1162 header file. Clean up missing variables.
1163
1164 * configure.in (unistd.h, string.h, strings.h): Configure in.
1165 * configure, config.in: Rebuild.
1166
1167Thu Mar 20 19:40:20 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1168
1169 * d30v-insns (void): Provide a second emul instruction using a
1170 branch prefix.
1171
1172Tue Mar 18 20:51:42 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1173
1174 * d30v-insn (do_sat*): Pass all necessary args.
1175
1176Tue Mar 18 18:49:10 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1177
1178 * d30v-insns (SAT*): Issue warning when bit overflow.
1179 (EMUL): Exit with GPR[2] not 2.
1180
1181Tue Mar 18 14:24:09 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1182
1183 * sim-state.h: New file rename engine.h.
1184 (sim_state): Rename engine strut to sim_state, rename events and
1185 core members.
1186
1187 * engine.c: Update.
1188 * cpu.h, cpu.c: Ditto.
1189 * alu.h: Ditto.
1190 * d30v-insns: Ditto.
1191 * sim-calls.c: Ditto.
1192
1193 * Makefile.in (sim-*.c): Moved to ../common.
1194
1195Tue Mar 18 10:39:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1196
1197 * d30v-insns (do_mac): Adding wrong register.
1198 (do_macs): Ditto.
1199 (do_msub): Ditto.
1200 (do_msubs): Ditto.
1201
1202 * ic-d30v: Put back definitions of RaH, RaL, et.al.
1203 (do_sra2h, do_srah): Use.
1204 (do_srl2h, do_srlh): Use.
1205
1206 * d30v-insns (SAT, SAT2H, SATp, SATZ): Implement saturate.
1207
1208Tue Mar 18 03:01:25 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1209
1210 * d30v-insns: Specify wild insted of reserved bits.
1211 (void):
1212
1213Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1214
1215 * configure: Re-generate.
1216
1217Mon Mar 17 14:35:37 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1218
1219 * Makefile.in (SIM_EXTRA_CFLAGS), configure.in: Include SIM_*
1220 options. Allow RESERVED_BITS to be configured.
1221 * configure: Re-generate.
1222
1223 * Makefile.in (sim-*.h): Drop, not needed.
1224 (sim-*.c): Make each explicit so that they automatically update.
1225
1226Sat Mar 15 02:34:30 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1227
1228 * ic-d30v (imm long): Incorrect calculation.
1229
1230 * d30v-insns (EMUL): Finish exit, write-string emul-call.
1231
1232 * sim-calls.c (sim_trace): Have sim-trace enable basic instruction
1233 tracing.
1234
1235Sat Mar 15 02:10:31 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1236
1237 * configure.in: Enable common options - endian, inline and
1238 warnings.
1239 * configure: Regenerate.
1240
1241Fri Mar 14 16:11:50 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1242
1243 * Makefile.in (cpu.o): Update dependencies.
1244 * cpu.c (is_condition_ok): Update PSW bit manipulations.
1245
1246Fri Mar 14 12:49:20 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1247
1248 * configure.in: Autoconfig m4
1249 * configure: Regenerate.
1250
1251 * Makefile.in: Use m4 to preprocess d30v-insns.
1252 * d30v-insn: Adjust.
1253
1254Thu Mar 13 12:44:54 1997 Doug Evans <dje@canuck.cygnus.com>
1255
1256 * sim-calls.c (sim_open): New SIM_DESC result. Argument is now
1257 in argv form.
1258 (other sim_*): New SIM_DESC argument.
1259
1260Wed Mar 12 19:05:45 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1261
1262 * sim-calls.c (sim_open): Create all the d30v RAM blocks.
1263
1264 * engine.c (engine_run_until_stop): Handle delayed subroutine
1265 call.
1266 * d30v-insn: Ditto.
1267
1268 * ic-d30v: For Rb and Rc always return the value and not the
1269 equation.
1270 * d30v-insn: Use.
1271
1272 * ic-d30v (val_Ra): Returns 0 or RA.
1273 * d30v-insn: Use.
1274
1275 * d30v-insn (make_even_reg, get_even_reg): New functions. Force
1276 the register index to be even, issusing a warning if it was not.
1277 (LD*, ST*): Use.
1278
1279Wed Mar 12 14:57:26 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1280
1281 * d30v-insns (do_trap): Implement TRAP instruction.
1282
1283 * alu.h (PSW_F, PSW_FLAG_VAL, PSW_FLAG_SET): New macro, map flag
1284 onto PSW bit.
1285 * ic-d30v: Drop F* expressions.
1286 * d30v-insn: Use more explicit PSW_FLAG_ ops.
1287 * cpu.h (PSW_*): Redo PSW bit values.
1288 * alu.h (ALU*_END): Update. Fix setting of overflow - logic was
1289 backwards.
1290
1291 * d30v-insn (MVFSYS, MVTSYS): Implement.
1292 * cpu.h (PSWH, PSWL): New macros for high, low word of PSW.
1293
1294Wed Mar 12 14:12:11 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1295
1296 * cpu.h (RPT_IS_CALL): New macro for processor field
1297 is_delayed_call. That in turn used as a flag to indicate if a
1298 delayed branch or delayed call is to occure.
1299 * d30v-insns (do_dbra): Set/clear RPT_IS_CALL;
1300 (do_dbrai): Ditto.
1301 (do_dbsr): Ditto.
1302 (do_dbsr): Ditto.
1303 (do_djmp): Ditto.
1304 (do_djmpi): Dotto.
1305 (do_djsr): Ditto.
1306 (do_djsri): Ditto.
1307 (void):
1308
1309 * d30v-insn (do_incr): Finish - handle modulo registers.
1310
1311 * d30v-insns (CMPU): Include all possible compare
1312 operations. Issue a warning where op defined by the processor
1313 spec.
1314
1315Wed Mar 12 13:55:55 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1316
1317 * d30v-insns: Add a new instruction class _EMUL and a new
1318 instruction EMUL that emulates a few basic IO operations.
1319
1320 * Makefile.in (tmp-igen): Filter in emul instructions.
1321
1322Fri Mar 7 20:32:13 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1323
1324 * d30v-insns (void): Fill in the gaps.
1325
1326Wed Feb 26 09:31:10 1997 Andrew Cagney <cagney@kremvax.tpgi.com.au>
1327
1328 * Makefile.in (tmp-igen): Include ic-d30v in dependencies.
1329
1330 * ic-d30v (cache): Update to use H_word, L_word added to
1331 sim-endian.h.
1332
1333Tue Feb 25 15:26:51 1997 Andrew Cagney <cagney@kremvax.tpgi.com.au>
1334
1335 * Makefile.in (tmp-igen): Correctly run $(MAKE).
1336
1337Thu Feb 20 20:30:31 1997 Andrew Cagney <cagney@critters.cygnus.com>
1338
1339 * Makefile.in (FROM_IGEN, FROM_COMMON): Make the igen generated
1340 files dependant on tmp-igen. Define ENGINE_H.
1341
1342Sun Feb 16 16:42:48 1997 Andrew Cagney <cagney@critters.cygnus.com>
1343
1344 * configure.in: New file - follow Doug Evans instructions.
1345 * Makefile.in: Ditto.
1346
GDB Binutils - Deliverables
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