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[deliverable/binutils-gdb.git] / sim / d30v / cpu.c
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AC		 1/* OBSOLETE /* Mitsubishi Electric Corp. D30V Simulator. */
2/* OBSOLETE Copyright (C) 1997, Free Software Foundation, Inc. */
3/* OBSOLETE Contributed by Cygnus Support. */
4/* OBSOLETE */
5/* OBSOLETE This file is part of GDB, the GNU debugger. */
6/* OBSOLETE */
7/* OBSOLETE This program is free software; you can redistribute it and/or modify */
8/* OBSOLETE it under the terms of the GNU General Public License as published by */
9/* OBSOLETE the Free Software Foundation; either version 2, or (at your option) */
10/* OBSOLETE any later version. */
11/* OBSOLETE */
12/* OBSOLETE This program is distributed in the hope that it will be useful, */
13/* OBSOLETE but WITHOUT ANY WARRANTY; without even the implied warranty of */
14/* OBSOLETE MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the */
15/* OBSOLETE GNU General Public License for more details. */
16/* OBSOLETE */
17/* OBSOLETE You should have received a copy of the GNU General Public License along */
18/* OBSOLETE with this program; if not, write to the Free Software Foundation, Inc., */
19/* OBSOLETE 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ */
20/* OBSOLETE */
21/* OBSOLETE */
22/* OBSOLETE #ifndef _CPU_C_ */
23/* OBSOLETE #define _CPU_C_ */
24/* OBSOLETE */
25/* OBSOLETE #include "sim-main.h" */
26/* OBSOLETE */
27/* OBSOLETE \f */
28/* OBSOLETE int */
29/* OBSOLETE is_wrong_slot (SIM_DESC sd, */
30/* OBSOLETE address_word cia, */
31/* OBSOLETE itable_index index) */
32/* OBSOLETE { */
33/* OBSOLETE switch (STATE_CPU (sd, 0)->unit) */
34/* OBSOLETE { */
35/* OBSOLETE case memory_unit: */
36/* OBSOLETE return !itable[index].option[itable_option_mu]; */
37/* OBSOLETE case integer_unit: */
38/* OBSOLETE return !itable[index].option[itable_option_iu]; */
39/* OBSOLETE case any_unit: */
40/* OBSOLETE return 0; */
41/* OBSOLETE default: */
42/* OBSOLETE sim_engine_abort (sd, STATE_CPU (sd, 0), cia, */
43/* OBSOLETE "internal error - is_wrong_slot - bad switch"); */
44/* OBSOLETE return -1; */
45/* OBSOLETE } */
46/* OBSOLETE } */
47/* OBSOLETE */
48/* OBSOLETE int */
49/* OBSOLETE is_condition_ok (SIM_DESC sd, */
50/* OBSOLETE address_word cia, */
51/* OBSOLETE int cond) */
52/* OBSOLETE { */
53/* OBSOLETE switch (cond) */
54/* OBSOLETE { */
55/* OBSOLETE case 0x0: */
56/* OBSOLETE return 1; */
57/* OBSOLETE case 0x1: */
58/* OBSOLETE return PSW_VAL(PSW_F0); */
59/* OBSOLETE case 0x2: */
60/* OBSOLETE return !PSW_VAL(PSW_F0); */
61/* OBSOLETE case 0x3: */
62/* OBSOLETE return PSW_VAL(PSW_F1); */
63/* OBSOLETE case 0x4: */
64/* OBSOLETE return !PSW_VAL(PSW_F1); */
65/* OBSOLETE case 0x5: */
66/* OBSOLETE return PSW_VAL(PSW_F0) && PSW_VAL(PSW_F1); */
67/* OBSOLETE case 0x6: */
68/* OBSOLETE return PSW_VAL(PSW_F0) && !PSW_VAL(PSW_F1); */
69/* OBSOLETE case 0x7: */
70/* OBSOLETE sim_engine_abort (sd, STATE_CPU (sd, 0), cia, */
71/* OBSOLETE "is_condition_ok - bad instruction condition bits"); */
72/* OBSOLETE return 0; */
73/* OBSOLETE default: */
74/* OBSOLETE sim_engine_abort (sd, STATE_CPU (sd, 0), cia, */
75/* OBSOLETE "internal error - is_condition_ok - bad switch"); */
76/* OBSOLETE return -1; */
77/* OBSOLETE } */
78/* OBSOLETE } */
79/* OBSOLETE \f */
80/* OBSOLETE /* If --trace-call, trace calls, remembering the current state of */
81/* OBSOLETE registers. */ */
82/* OBSOLETE */
83/* OBSOLETE typedef struct _call_stack { */
84/* OBSOLETE struct _call_stack *prev; */
85/* OBSOLETE registers regs; */
86/* OBSOLETE } call_stack; */
87/* OBSOLETE */
88/* OBSOLETE static call_stack *call_stack_head = (call_stack *)0; */
89/* OBSOLETE static int call_depth = 0; */
90/* OBSOLETE */
91/* OBSOLETE void call_occurred (SIM_DESC sd, */
92/* OBSOLETE sim_cpu *cpu, */
93/* OBSOLETE address_word cia, */
94/* OBSOLETE address_word nia) */
95/* OBSOLETE { */
96/* OBSOLETE call_stack *ptr = ZALLOC (call_stack); */
97/* OBSOLETE ptr->regs = cpu->regs; */
98/* OBSOLETE ptr->prev = call_stack_head; */
99/* OBSOLETE call_stack_head = ptr; */
100/* OBSOLETE */
101/* OBSOLETE trace_one_insn (sd, cpu, nia, 1, "", 0, "call", */
102/* OBSOLETE "Depth %3d, Return 0x%.8lx, Args 0x%.8lx 0x%.8lx", */
103/* OBSOLETE ++call_depth, (unsigned long)cia+8, (unsigned long)GPR[2], */
104/* OBSOLETE (unsigned long)GPR[3]); */
105/* OBSOLETE } */
106/* OBSOLETE */
107/* OBSOLETE /* If --trace-call, trace returns, checking if any saved register was changed. */ */
108/* OBSOLETE */
109/* OBSOLETE void return_occurred (SIM_DESC sd, */
110/* OBSOLETE sim_cpu *cpu, */
111/* OBSOLETE address_word cia, */
112/* OBSOLETE address_word nia) */
113/* OBSOLETE { */
114/* OBSOLETE char buffer[1024]; */
115/* OBSOLETE char *buf_ptr = buffer; */
116/* OBSOLETE call_stack *ptr = call_stack_head; */
117/* OBSOLETE int regno; */
118/* OBSOLETE char *prefix = ", Registers that differ: "; */
119/* OBSOLETE */
120/* OBSOLETE *buf_ptr = '\0'; */
121/* OBSOLETE for (regno = 34; regno <= 63; regno++) { */
122/* OBSOLETE if (cpu->regs.general_purpose[regno] != ptr->regs.general_purpose[regno]) { */
123/* OBSOLETE sprintf (buf_ptr, "%sr%d", prefix, regno); */
124/* OBSOLETE buf_ptr += strlen (buf_ptr); */
125/* OBSOLETE prefix = " "; */
126/* OBSOLETE } */
127/* OBSOLETE } */
128/* OBSOLETE */
129/* OBSOLETE if (cpu->regs.accumulator[1] != ptr->regs.accumulator[1]) { */
130/* OBSOLETE sprintf (buf_ptr, "%sa1", prefix); */
131/* OBSOLETE buf_ptr += strlen (buf_ptr); */
132/* OBSOLETE prefix = " "; */
133/* OBSOLETE } */
134/* OBSOLETE */
135/* OBSOLETE trace_one_insn (sd, cpu, cia, 1, "", 0, "return", */
136/* OBSOLETE "Depth %3d, Return 0x%.8lx, Ret. 0x%.8lx 0x%.8lx%s", */
137/* OBSOLETE call_depth--, (unsigned long)nia, (unsigned long)GPR[2], */
138/* OBSOLETE (unsigned long)GPR[3], buffer); */
139/* OBSOLETE */
140/* OBSOLETE call_stack_head = ptr->prev; */
141/* OBSOLETE zfree (ptr); */
142/* OBSOLETE } */
143/* OBSOLETE */
144/* OBSOLETE \f */
145/* OBSOLETE /* Read/write functions for system call interface. */ */
146/* OBSOLETE int */
147/* OBSOLETE d30v_read_mem (host_callback *cb, */
148/* OBSOLETE struct cb_syscall *sc, */
149/* OBSOLETE unsigned long taddr, */
150/* OBSOLETE char *buf, */
151/* OBSOLETE int bytes) */
152/* OBSOLETE { */
153/* OBSOLETE SIM_DESC sd = (SIM_DESC) sc->p1; */
154/* OBSOLETE sim_cpu *cpu = STATE_CPU (sd, 0); */
155/* OBSOLETE */
156/* OBSOLETE return sim_core_read_buffer (sd, cpu, read_map, buf, taddr, bytes); */
157/* OBSOLETE } */
158/* OBSOLETE */
159/* OBSOLETE int */
160/* OBSOLETE d30v_write_mem (host_callback *cb, */
161/* OBSOLETE struct cb_syscall *sc, */
162/* OBSOLETE unsigned long taddr, */
163/* OBSOLETE const char *buf, */
164/* OBSOLETE int bytes) */
165/* OBSOLETE { */
166/* OBSOLETE SIM_DESC sd = (SIM_DESC) sc->p1; */
167/* OBSOLETE sim_cpu *cpu = STATE_CPU (sd, 0); */
168/* OBSOLETE */
169/* OBSOLETE return sim_core_write_buffer (sd, cpu, write_map, buf, taddr, bytes); */
170/* OBSOLETE } */
171/* OBSOLETE */
172/* OBSOLETE #endif /* _CPU_C_ */ */
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