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[deliverable/binutils-gdb.git] / sim / d30v / d30v-insns
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3fbeef0b
AC		 1# OBSOLETE // -*- C -*-
2# OBSOLETE // Mitsubishi Electric Corp. D30V Simulator.
3# OBSOLETE // Copyright (C) 1997, Free Software Foundation, Inc.
4# OBSOLETE // Contributed by Cygnus Solutions Inc.
5# OBSOLETE //
6# OBSOLETE // This file is part of GDB, the GNU debugger.
7# OBSOLETE //
8# OBSOLETE // This program is free software; you can redistribute it and/or modify
9# OBSOLETE // it under the terms of the GNU General Public License as published by
10# OBSOLETE // the Free Software Foundation; either version 2 of the License, or
11# OBSOLETE // (at your option) any later version.
12# OBSOLETE //
13# OBSOLETE // This program is distributed in the hope that it will be useful,
14# OBSOLETE // but WITHOUT ANY WARRANTY; without even the implied warranty of
15# OBSOLETE // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16# OBSOLETE // GNU General Public License for more details.
17# OBSOLETE //
18# OBSOLETE // You should have received a copy of the GNU General Public License
19# OBSOLETE // along with this program; if not, write to the Free Software
20# OBSOLETE // Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
21# OBSOLETE //
22# OBSOLETE
23# OBSOLETE
24# OBSOLETE define( _BRA, `1.*,CCC,000')
25# OBSOLETE define( _LOGIC, `1.*,CCC,001')
26# OBSOLETE define( _IMEM, `1.*,CCC,010')
27# OBSOLETE define( _IALU1, `1.*,CCC,100')
28# OBSOLETE define(_IALU2, `1.*,CCC,101')
29# OBSOLETE
30# OBSOLETE
31# OBSOLETE
32# OBSOLETE define(_IMM6, `6.IMM_6S')
33# OBSOLETE define(_IMM12, `12.IMM_12S')
34# OBSOLETE define(_IMM18, `18.IMM_18S')
35# OBSOLETE define(_IMM32, `6.IMM_6L,*,000,8.IMM_8L,00,18.IMM_18L')
36# OBSOLETE
37# OBSOLETE
38# OBSOLETE
39# OBSOLETE // The following is called when ever an illegal instruction is
40# OBSOLETE // encountered
41# OBSOLETE ::internal::illegal
42# OBSOLETE sim_io_eprintf (sd, "illegal instruction at 0x%lx\n", (long) cia);
43# OBSOLETE sim_engine_halt (SD, CPU, NULL, cia, sim_signalled, SIM_SIGILL);
44# OBSOLETE
45# OBSOLETE // The following is called when ever an instruction in the wrong
46# OBSOLETE // slot is encountered.
47# OBSOLETE ::internal::wrong_slot
48# OBSOLETE sim_io_eprintf (sd, "wrong slot at 0x%lx\n", (long) cia);
49# OBSOLETE sim_engine_halt (SD, CPU, NULL, cia, sim_signalled, SIM_SIGILL);
50# OBSOLETE
51# OBSOLETE
52# OBSOLETE
53# OBSOLETE // Something illegal that can be used to contact the simulator emul
54# OBSOLETE // library.
55# OBSOLETE define(_EMUL, `1.*,CCC,111')
56# OBSOLETE
57# OBSOLETE void::function::do_emul:int imm
58# OBSOLETE /* temp hack - later replace with real interface */
59# OBSOLETE enum {
60# OBSOLETE param1 = 2, param2, param3, param4
61# OBSOLETE };
62# OBSOLETE switch (imm) {
63# OBSOLETE case 0:
64# OBSOLETE {
65# OBSOLETE sim_engine_abort (SD, CPU, cia, "UNIX call emulation unsupported");
66# OBSOLETE break;
67# OBSOLETE }
68# OBSOLETE case 1:
69# OBSOLETE /* Trap 1 - prints a string */
70# OBSOLETE {
71# OBSOLETE address_word str = GPR[param1];
72# OBSOLETE char chr;
73# OBSOLETE while (1) {
74# OBSOLETE chr = MEM (unsigned, str, 1);
75# OBSOLETE if (chr == '\0') break;
76# OBSOLETE sim_io_write_stdout (sd, &chr, sizeof chr);
77# OBSOLETE str++;
78# OBSOLETE }
79# OBSOLETE break;
80# OBSOLETE }
81# OBSOLETE case 3:
82# OBSOLETE /* Trap 3 - writes a character */
83# OBSOLETE {
84# OBSOLETE char chr = GPR[param1];
85# OBSOLETE sim_io_write_stdout (sd, &chr, sizeof chr);
86# OBSOLETE break;
87# OBSOLETE }
88# OBSOLETE case 4:
89# OBSOLETE /* Trap 4 exits with status in [param1] */
90# OBSOLETE {
91# OBSOLETE sim_engine_halt (SD, CPU, NULL, cia, sim_exited, GPR[param1]);
92# OBSOLETE break;
93# OBSOLETE }
94# OBSOLETE case 5:
95# OBSOLETE /* Trap 5 breakpoints. If the breakpoint system knows about this, it
96# OBSOLETE won't return. Otherwise, we fall through to treat this as an
97# OBSOLETE unknown instruction. */
98# OBSOLETE {
99# OBSOLETE sim_handle_breakpoint (SD, CPU, cia);
100# OBSOLETE /* Fall through to default case.*/
101# OBSOLETE }
102# OBSOLETE default:
103# OBSOLETE sim_engine_abort (SD, CPU, cia, "Unknown monitor call %d", imm);
104# OBSOLETE }
105# OBSOLETE
106# OBSOLETE _EMUL,00000,00,6.*,6.*,IMM_6S:EMUL:short,emul:iu,mu:EMUL
107# OBSOLETE "syscall <imm>"
108# OBSOLETE do_emul (_SD, imm);
109# OBSOLETE _BRA,00000,00,6.**,6.**,_IMM32:BRA:long:iu,mu:EMUL long
110# OBSOLETE "syscall <imm>"
111# OBSOLETE do_emul (_SD, imm);
112# OBSOLETE
113# OBSOLETE // ABS
114# OBSOLETE
115# OBSOLETE _IALU1,01000,00,6.RA,6.RB,6.**:IALU1:short:iu,mu:ABS
116# OBSOLETE "abs r<RA>, r<RB>"
117# OBSOLETE WRITE32_QUEUE (Ra, abs(Rb));
118# OBSOLETE
119# OBSOLETE
120# OBSOLETE
121# OBSOLETE // ADD
122# OBSOLETE
123# OBSOLETE void::function::do_add:unsigned32 *ra, unsigned32 rb, unsigned32 imm
124# OBSOLETE ALU_BEGIN(rb);
125# OBSOLETE ALU_ADDC(imm);
126# OBSOLETE ALU_END(ra);
127# OBSOLETE
128# OBSOLETE _IALU1,00000,00,6.RA,6.RB,6.RC:IALU1:short:iu,mu:ADD
129# OBSOLETE "add r<RA>, r<RB>, r<RC>"
130# OBSOLETE do_add (_SD, Ra, Rb, Rc);
131# OBSOLETE _IALU1,00000,10,6.RA,6.RB,_IMM6:IALU1:short:iu,mu:ADD imm
132# OBSOLETE "add r<RA>, r<RB>, <imm>"
133# OBSOLETE do_add (_SD, Ra, Rb, imm);
134# OBSOLETE _IALU1,00000,10,6.RA,6.RB,_IMM32:IALU1:long:iu,mu:ADD imm long
135# OBSOLETE "add r<RA>, r<RB>, <imm>"
136# OBSOLETE do_add (_SD, Ra, Rb, imm);
137# OBSOLETE
138# OBSOLETE
139# OBSOLETE
140# OBSOLETE // ADD2H
141# OBSOLETE
142# OBSOLETE void::function::do_add2h:signed32 *ra, signed32 rb, signed32 imm
143# OBSOLETE unsigned16 ah2 = VH2_4(rb) + VH2_4(imm);
144# OBSOLETE unsigned16 al2 = VL2_4(rb) + VL2_4(imm);
145# OBSOLETE WRITE32_QUEUE (ra, (ah2 << 16) | al2);
146# OBSOLETE
147# OBSOLETE _IALU1,00001,00,6.RA,6.RB,6.RC:IALU1:short:iu,mu:ADD2H
148# OBSOLETE "add2h r<RA>, r<RB>, r<RC>"
149# OBSOLETE do_add2h (_SD, Ra, Rb, Rc);
150# OBSOLETE _IALU1,00001,10,6.RA,6.RB,_IMM6:IALU1:short:iu,mu:ADD2H imm
151# OBSOLETE "add2h r<RA>, r<RB>, <imm>"
152# OBSOLETE do_add2h (_SD, Ra, Rb, immHL);
153# OBSOLETE _IALU1,00001,10,6.RA,6.RB,_IMM32:IALU1:long:iu,mu:ADD2H imm long
154# OBSOLETE "add2h r<RA>, r<RB>, <imm>"
155# OBSOLETE do_add2h (_SD, Ra, Rb, imm);
156# OBSOLETE
157# OBSOLETE
158# OBSOLETE
159# OBSOLETE // ADDC
160# OBSOLETE
161# OBSOLETE void::function::do_addc:unsigned32 *ra, unsigned32 rb, unsigned32 imm
162# OBSOLETE ALU_BEGIN(rb);
163# OBSOLETE ALU_ADDC_C(imm, ALU_CARRY);
164# OBSOLETE ALU_END(ra);
165# OBSOLETE
166# OBSOLETE _IALU1,00100,00,6.RA,6.RB,6.RC:IALU1:short:iu,mu:ADDC
167# OBSOLETE "addc r<RA>, r<RB>, r<RC>"
168# OBSOLETE do_addc (_SD, Ra, Rb, Rc);
169# OBSOLETE _IALU1,00100,10,6.RA,6.RB,_IMM6:IALU1:short:iu,mu:ADDC imm
170# OBSOLETE "addc r<RA>, r<RB>, <imm>"
171# OBSOLETE do_addc (_SD, Ra, Rb, imm);
172# OBSOLETE _IALU1,00100,10,6.RA,6.RB,_IMM32:IALU1:long:iu,mu:ADDC imm long
173# OBSOLETE "addc r<RA>, r<RB>, <imm>"
174# OBSOLETE do_addc (_SD, Ra, Rb, imm);
175# OBSOLETE
176# OBSOLETE
177# OBSOLETE
178# OBSOLETE // ADDHppp
179# OBSOLETE
180# OBSOLETE void::function::do_addh_ppp:int ppp, unsigned32 *ra, unsigned32 rb, unsigned32 src
181# OBSOLETE switch (ppp) {
182# OBSOLETE case 0x0: /* LLL */
183# OBSOLETE {
184# OBSOLETE ALU16_BEGIN(VL2_4(rb));
185# OBSOLETE ALU16_ADDC(VL2_4(src));
186# OBSOLETE ALU16_END(ra, 0);
187# OBSOLETE }
188# OBSOLETE break;
189# OBSOLETE case 0x1: /* LLH */
190# OBSOLETE {
191# OBSOLETE ALU16_BEGIN(VL2_4(rb));
192# OBSOLETE ALU16_ADDC(VH2_4(src));
193# OBSOLETE ALU16_END(ra, 0);
194# OBSOLETE }
195# OBSOLETE break;
196# OBSOLETE case 0x2: /* LHL */
197# OBSOLETE {
198# OBSOLETE ALU16_BEGIN(VH2_4(rb));
199# OBSOLETE ALU16_ADDC(VL2_4(src));
200# OBSOLETE ALU16_END(ra, 0);
201# OBSOLETE }
202# OBSOLETE break;
203# OBSOLETE case 0x3: /* LHH */
204# OBSOLETE {
205# OBSOLETE ALU16_BEGIN(VH2_4(rb));
206# OBSOLETE ALU16_ADDC(VH2_4(src));
207# OBSOLETE ALU16_END(ra, 0);
208# OBSOLETE }
209# OBSOLETE break;
210# OBSOLETE case 0x4: /* HLL */
211# OBSOLETE {
212# OBSOLETE ALU16_BEGIN(VL2_4(rb));
213# OBSOLETE ALU16_ADDC(VL2_4(src));
214# OBSOLETE ALU16_END(ra, 1);
215# OBSOLETE }
216# OBSOLETE break;
217# OBSOLETE case 0x5: /* HLH */
218# OBSOLETE {
219# OBSOLETE ALU16_BEGIN(VL2_4(rb));
220# OBSOLETE ALU16_ADDC(VH2_4(src));
221# OBSOLETE ALU16_END(ra, 1);
222# OBSOLETE }
223# OBSOLETE break;
224# OBSOLETE case 0x6: /* HHL */
225# OBSOLETE {
226# OBSOLETE ALU16_BEGIN(VH2_4(rb));
227# OBSOLETE ALU16_ADDC(VL2_4(src));
228# OBSOLETE ALU16_END(ra, 1);
229# OBSOLETE }
230# OBSOLETE break;
231# OBSOLETE case 0x7: /* HHH */
232# OBSOLETE {
233# OBSOLETE ALU16_BEGIN(VH2_4(rb));
234# OBSOLETE ALU16_ADDC(VH2_4(src));
235# OBSOLETE ALU16_END(ra, 1);
236# OBSOLETE }
237# OBSOLETE break;
238# OBSOLETE default:
239# OBSOLETE sim_engine_abort (SD, CPU, cia, "do_addh_ppp - internal error - bad switch");
240# OBSOLETE }
241# OBSOLETE ::%s::ppp:int ppp
242# OBSOLETE switch (ppp)
243# OBSOLETE {
244# OBSOLETE case 0x0: return "lll";
245# OBSOLETE case 0x1: return "llh";
246# OBSOLETE case 0x2: return "lhl";
247# OBSOLETE case 0x3: return "lhh";
248# OBSOLETE case 0x4: return "hll";
249# OBSOLETE case 0x5: return "hlh";
250# OBSOLETE case 0x6: return "hhl";
251# OBSOLETE case 0x7: return "hhh";
252# OBSOLETE default: return "?";
253# OBSOLETE }
254# OBSOLETE
255# OBSOLETE _IALU1,10,ppp,00,6.RA,6.RB,6.RC:IALU1:short:iu,mu:ADDHppp
256# OBSOLETE "addh%s<ppp> r<RA>, r<RB>, r<RC>"
257# OBSOLETE do_addh_ppp(_SD, ppp, Ra, Rb, Rc);
258# OBSOLETE _IALU1,10,ppp,10,6.RA,6.RB,_IMM6:IALU1:short:iu,mu:ADDHppp imm
259# OBSOLETE "addh%s<ppp> r<RA>, r<RB>, <imm>"
260# OBSOLETE do_addh_ppp(_SD, ppp, Ra, Rb, immHL);
261# OBSOLETE _IALU1,10,ppp,10,6.RA,6.RB,_IMM32:IALU1:long:iu,mu:ADDHppp imm long
262# OBSOLETE "addh%s<ppp> r<RA>, r<RB>, <imm>"
263# OBSOLETE do_addh_ppp(_SD, ppp, Ra, Rb, imm);
264# OBSOLETE
265# OBSOLETE
266# OBSOLETE
267# OBSOLETE // ADDS
268# OBSOLETE
269# OBSOLETE void::function::do_adds:unsigned32 *ra, unsigned32 rb, unsigned32 imm
270# OBSOLETE ALU_BEGIN(rb);
271# OBSOLETE ALU_ADDC(EXTRACTED32(imm, 0, 0));
272# OBSOLETE ALU_END(ra);
273# OBSOLETE
274# OBSOLETE _IALU1,00110,00,6.RA,6.RB,6.RC:IALU1:short:iu,mu:ADDS
275# OBSOLETE "adds r<RA>, r<RB>, r<RC>"
276# OBSOLETE do_adds (_SD, Ra, Rb, Rc);
277# OBSOLETE _IALU1,00110,10,6.RA,6.RB,_IMM6:IALU1:short:iu,mu:ADDS imm
278# OBSOLETE "adds r<RA>, r<RB>, <imm>"
279# OBSOLETE do_adds (_SD, Ra, Rb, imm);
280# OBSOLETE _IALU1,00110,10,6.RA,6.RB,_IMM32:IALU1:long:iu,mu:ADDS imm long
281# OBSOLETE "adds r<RA>, r<RB>, <imm>"
282# OBSOLETE do_adds (_SD, Ra, Rb, imm);
283# OBSOLETE
284# OBSOLETE
285# OBSOLETE
286# OBSOLETE // ADDS2H
287# OBSOLETE
288# OBSOLETE void::function::do_adds2h:unsigned32 *ra, unsigned32 rb, unsigned32 immHL
289# OBSOLETE unsigned16 high = VH2_4(rb) + EXTRACTED32(immHL, 0, 0);
290# OBSOLETE unsigned16 low = VL2_4(rb) + EXTRACTED32(immHL, 16, 16);
291# OBSOLETE WRITE32_QUEUE (ra, (high << 16) | low);
292# OBSOLETE
293# OBSOLETE _IALU1,00111,00,6.RA,6.RB,6.RC:IALU1:short:iu,mu:ADDS2H
294# OBSOLETE "adds2h r<RA>, r<RB>, r<RC>"
295# OBSOLETE do_adds2h (_SD, Ra, Rb, Rc);
296# OBSOLETE _IALU1,00111,10,6.RA,6.RB,_IMM6:IALU1:short:iu,mu:ADDS2H imm
297# OBSOLETE "adds2h r<RA>, r<RB>, <imm>"
298# OBSOLETE do_adds2h (_SD, Ra, Rb, immHL);
299# OBSOLETE _IALU1,00111,10,6.RA,6.RB,_IMM32:IALU1:long:iu,mu:ADDS2H imm long
300# OBSOLETE "adds2h r<RA>, r<RB>, <imm>"
301# OBSOLETE do_adds2h (_SD, Ra, Rb, imm);
302# OBSOLETE
303# OBSOLETE
304# OBSOLETE
305# OBSOLETE // AND
306# OBSOLETE
307# OBSOLETE _LOGIC,11000,00,6.RA,6.RB,6.RC:LOGIC:short:iu,mu:AND
308# OBSOLETE "and r<RA>, r<RB>, r<RC>"
309# OBSOLETE WRITE32_QUEUE (Ra, Rb & Rc);
310# OBSOLETE _LOGIC,11000,10,6.RA,6.RB,_IMM6:LOGIC:short:iu,mu:AND imm
311# OBSOLETE "and r<RA>, r<RB>, <imm>"
312# OBSOLETE WRITE32_QUEUE (Ra, Rb & imm);
313# OBSOLETE _LOGIC,11000,10,6.RA,6.RB,_IMM32:LOGIC:long:iu,mu:AND imm long
314# OBSOLETE "and r<RA>, r<RB>, <imm>"
315# OBSOLETE WRITE32_QUEUE (Ra, Rb & imm);
316# OBSOLETE
317# OBSOLETE
318# OBSOLETE // ANDFG
319# OBSOLETE
320# OBSOLETE _LOGIC,01000,00,***,3.FA,***,3.FB,***,3.FC:LOGIC:short:iu,mu:Logical AND Flags
321# OBSOLETE "andfg f<FA>, f<FB>, f<FC>"
322# OBSOLETE PSW_FLAG_SET_QUEUE(FA, PSW_FLAG_VAL(FB) & PSW_FLAG_VAL(FC));
323# OBSOLETE _LOGIC,01000,10,***,3.FA,***,3.FB,_IMM6:LOGIC:short:iu,mu:Logical AND Flags imm
324# OBSOLETE "andfg f<FA>, f<FB>, <imm_6>"
325# OBSOLETE PSW_FLAG_SET_QUEUE(FA, PSW_FLAG_VAL(FB) & (imm_6 & 1));
326# OBSOLETE
327# OBSOLETE
328# OBSOLETE
329# OBSOLETE // AVG
330# OBSOLETE
331# OBSOLETE void::function::do_avg:unsigned32 *ra, unsigned32 rb, unsigned32 imm
332# OBSOLETE WRITE32_QUEUE (ra, ((signed64)(signed32)rb + (signed64)(signed32)imm + 1) >> 1);
333# OBSOLETE
334# OBSOLETE _IALU1,01010,00,6.RA,6.RB,6.RC:IALU1:short:iu,mu:AVG
335# OBSOLETE "avg r<RA>, r<RB>, r<RC>"
336# OBSOLETE do_avg (_SD, Ra, Rb, Rc);
337# OBSOLETE _IALU1,01010,10,6.RA,6.RB,_IMM6:IALU1:short:iu,mu:AVG imm
338# OBSOLETE "avg r<RA>, r<RB>, <imm>"
339# OBSOLETE do_avg (_SD, Ra, Rb, imm);
340# OBSOLETE _IALU1,01010,10,6.RA,6.RB,_IMM32:IALU1:long:iu,mu:AVG imm long
341# OBSOLETE "avg r<RA>, r<RB>, <imm>"
342# OBSOLETE do_avg (_SD, Ra, Rb, imm);
343# OBSOLETE
344# OBSOLETE
345# OBSOLETE
346# OBSOLETE // AVG2H
347# OBSOLETE
348# OBSOLETE void::function::do_avg2h:unsigned32 *ra, unsigned32 rb, unsigned32 imm
349# OBSOLETE unsigned16 high = ((signed32)(signed16)VH2_4(rb) + (signed32)(signed16)VH2_4(imm) + 1) >> 1;
350# OBSOLETE unsigned16 low = ((signed32)(signed16)VL2_4(rb) + (signed32)(signed16)VL2_4(imm) + 1) >> 1;
351# OBSOLETE WRITE32_QUEUE (ra, (high << 16) | low);
352# OBSOLETE
353# OBSOLETE _IALU1,01011,00,6.RA,6.RB,6.RC:IALU1:short:iu,mu:AVG2H
354# OBSOLETE "avg2h r<RA>, r<RB>, r<RC>"
355# OBSOLETE do_avg2h (_SD, Ra, Rb, Rc);
356# OBSOLETE _IALU1,01011,10,6.RA,6.RB,_IMM6:IALU1:short:iu,mu:AVG2H imm
357# OBSOLETE "avg2h r<RA>, r<RB>, <imm>"
358# OBSOLETE do_avg2h (_SD, Ra, Rb, immHL);
359# OBSOLETE _IALU1,01011,10,6.RA,6.RB,_IMM32:IALU1:long:iu,mu:AVG2H imm long
360# OBSOLETE "avg2h r<RA>, r<RB>, <imm>"
361# OBSOLETE do_avg2h (_SD, Ra, Rb, imm);
362# OBSOLETE
363# OBSOLETE
364# OBSOLETE
365# OBSOLETE // BCLR
366# OBSOLETE
367# OBSOLETE _LOGIC,00011,00,6.RA,6.RB,6.RC:LOGIC:short:iu,mu:BCLR
368# OBSOLETE "bclr r<RA>, r<RB>, r<RC>"
369# OBSOLETE WRITE32_QUEUE(Ra, Rb & ~BIT32((Rc) % 32));
370# OBSOLETE _LOGIC,00011,10,6.RA,6.RB,_IMM6:LOGIC:short:iu,mu:BCLR imm
371# OBSOLETE "bclr r<RA>, r<RB>, <imm>"
372# OBSOLETE WRITE32_QUEUE(Ra, Rb & ~BIT32((imm) % 32));
373# OBSOLETE
374# OBSOLETE
375# OBSOLETE
376# OBSOLETE // BNOT
377# OBSOLETE
378# OBSOLETE _LOGIC,00001,00,6.RA,6.RB,6.RC:LOGIC:short:iu,mu:BNOT
379# OBSOLETE "bnot r<RA>, r<RB>, r<RC>"
380# OBSOLETE WRITE32_QUEUE (Ra, Rb ^ BIT32((Rc) % 32));
381# OBSOLETE _LOGIC,00001,10,6.RA,6.RB,_IMM6:LOGIC:short:iu,mu:BNOT imm
382# OBSOLETE "bnot r<RA>, r<RB>, <imm>"
383# OBSOLETE WRITE32_QUEUE (Ra, Rb ^ BIT32((imm) % 32));
384# OBSOLETE
385# OBSOLETE
386# OBSOLETE
387# OBSOLETE // BRA
388# OBSOLETE
389# OBSOLETE _BRA,00000,00,6.**,6.**,6.RC:BRA:short:mu:BRA
390# OBSOLETE "bra r<RC>"
391# OBSOLETE nia = cia + pcdisp;
392# OBSOLETE _BRA,00000,10,_IMM18:BRA:short:mu:BRA imm
393# OBSOLETE "bra <pcdisp>"
394# OBSOLETE nia = cia + pcdisp;
395# OBSOLETE _BRA,00000,10,6.**,6.**,_IMM32:BRA:long:mu:BRA imm long
396# OBSOLETE "bra <pcdisp>"
397# OBSOLETE nia = cia + pcdisp;
398# OBSOLETE
399# OBSOLETE
400# OBSOLETE
401# OBSOLETE // BRATNZ
402# OBSOLETE
403# OBSOLETE _BRA,00100,01,6.RA,6.**,6.RC:BRA:short:mu:BRATNZ
404# OBSOLETE "bratnz r<RC>"
405# OBSOLETE if (*Ra != 0)
406# OBSOLETE nia = cia + pcdisp;
407# OBSOLETE _BRA,00100,11,6.RA,_IMM12:BRA:short:mu:BRATNZ imm
408# OBSOLETE "bratnz <pcdisp>"
409# OBSOLETE if (*Ra != 0)
410# OBSOLETE nia = cia + pcdisp;
411# OBSOLETE _BRA,00100,11,6.RA,6.**,_IMM32:BRA:long:mu:BRATNZ imm long
412# OBSOLETE "bratnz <pcdisp>"
413# OBSOLETE if (*Ra != 0)
414# OBSOLETE nia = cia + pcdisp;
415# OBSOLETE
416# OBSOLETE
417# OBSOLETE
418# OBSOLETE // BRATZR
419# OBSOLETE
420# OBSOLETE _BRA,00100,00,6.RA,6.**,6.RC:BRA:short:mu:BRATZR
421# OBSOLETE "bratzr r<RC>"
422# OBSOLETE if (val_Ra == 0)
423# OBSOLETE nia = cia + pcdisp;
424# OBSOLETE _BRA,00100,10,6.RA,_IMM12:BRA:short:mu:BRATZR imm
425# OBSOLETE "bratzr <pcdisp>"
426# OBSOLETE if (val_Ra == 0)
427# OBSOLETE nia = cia + pcdisp;
428# OBSOLETE _BRA,00100,10,6.RA,6.**,_IMM32:BRA:long:mu:BRATZR imm long
429# OBSOLETE "bratzr <pcdisp>"
430# OBSOLETE if (val_Ra == 0)
431# OBSOLETE nia = cia + pcdisp;
432# OBSOLETE
433# OBSOLETE
434# OBSOLETE
435# OBSOLETE // BSET
436# OBSOLETE
437# OBSOLETE _LOGIC,00010,00,6.RA,6.RB,6.RC:LOGIC:short:iu,mu:BSET
438# OBSOLETE "bset r<RA>, r<RB>, r<RC>"
439# OBSOLETE WRITE32_QUEUE (Ra, Rb | BIT32((Rc) % 32));
440# OBSOLETE _LOGIC,00010,10,6.RA,6.RB,_IMM6:LOGIC:short:iu,mu:BSET imm
441# OBSOLETE "bset r<RA>, r<RB>, <imm>"
442# OBSOLETE WRITE32_QUEUE (Ra, Rb | BIT32((imm) % 32));
443# OBSOLETE
444# OBSOLETE
445# OBSOLETE
446# OBSOLETE // BSR
447# OBSOLETE
448# OBSOLETE _BRA,00010,00,6.**,6.**,6.RC:BRA:short:mu:BSR
449# OBSOLETE "bsr r<RC>"
450# OBSOLETE if (cia == RPT_E && PSW_VAL (PSW_RP))
451# OBSOLETE WRITE32_QUEUE (&GPR[62], RPT_S);
452# OBSOLETE else
453# OBSOLETE WRITE32_QUEUE (&GPR[62], cia + 8);
454# OBSOLETE nia = cia + pcdisp;
455# OBSOLETE if (TRACE_CALL_P)
456# OBSOLETE TRACE_ACTION |= TRACE_ACTION_CALL;
457# OBSOLETE _BRA,00010,10,_IMM18:BRA:short:mu:BSR imm
458# OBSOLETE "bsr <pcdisp>"
459# OBSOLETE if (cia == RPT_E && PSW_VAL (PSW_RP))
460# OBSOLETE WRITE32_QUEUE (&GPR[62], RPT_S);
461# OBSOLETE else
462# OBSOLETE WRITE32_QUEUE (&GPR[62], cia + 8);
463# OBSOLETE nia = cia + pcdisp;
464# OBSOLETE if (TRACE_CALL_P)
465# OBSOLETE TRACE_ACTION |= TRACE_ACTION_CALL;
466# OBSOLETE _BRA,00010,10,6.**,6.**,_IMM32:BRA:long:mu:BSR imm long
467# OBSOLETE "bsr <pcdisp>"
468# OBSOLETE if (cia == RPT_E && PSW_VAL (PSW_RP))
469# OBSOLETE WRITE32_QUEUE (&GPR[62], RPT_S);
470# OBSOLETE else
471# OBSOLETE WRITE32_QUEUE (&GPR[62], cia + 8);
472# OBSOLETE nia = cia + pcdisp;
473# OBSOLETE if (TRACE_CALL_P)
474# OBSOLETE TRACE_ACTION |= TRACE_ACTION_CALL;
475# OBSOLETE
476# OBSOLETE
477# OBSOLETE // BSRTNZ
478# OBSOLETE
479# OBSOLETE _BRA,00110,01,6.RA,6.**,6.RC:BRA:short:mu:BSRTNZ
480# OBSOLETE "bsrtnz r<RC>"
481# OBSOLETE if (val_Ra != 0) {
482# OBSOLETE if (cia == RPT_E && PSW_VAL (PSW_RP))
483# OBSOLETE WRITE32_QUEUE (&GPR[62], RPT_S);
484# OBSOLETE else
485# OBSOLETE WRITE32_QUEUE (&GPR[62], cia + 8);
486# OBSOLETE nia = cia + pcdisp;
487# OBSOLETE if (TRACE_CALL_P)
488# OBSOLETE TRACE_ACTION |= TRACE_ACTION_CALL;
489# OBSOLETE }
490# OBSOLETE
491# OBSOLETE _BRA,00110,11,6.RA,_IMM12:BRA:short:mu:BSRTNZ imm
492# OBSOLETE "bsrtnz <pcdisp>"
493# OBSOLETE if (val_Ra != 0) {
494# OBSOLETE if (cia == RPT_E && PSW_VAL (PSW_RP))
495# OBSOLETE WRITE32_QUEUE (&GPR[62], RPT_S);
496# OBSOLETE else
497# OBSOLETE WRITE32_QUEUE (&GPR[62], cia + 8);
498# OBSOLETE nia = cia + pcdisp;
499# OBSOLETE if (TRACE_CALL_P)
500# OBSOLETE TRACE_ACTION |= TRACE_ACTION_CALL;
501# OBSOLETE }
502# OBSOLETE
503# OBSOLETE _BRA,00110,11,6.RA,6.**,_IMM32:BRA:long:mu:BSRTNZ imm long
504# OBSOLETE "bsrtnz <pcdisp>"
505# OBSOLETE if (val_Ra != 0) {
506# OBSOLETE if (cia == RPT_E && PSW_VAL (PSW_RP))
507# OBSOLETE WRITE32_QUEUE (&GPR[62], RPT_S);
508# OBSOLETE else
509# OBSOLETE WRITE32_QUEUE (&GPR[62], cia + 8);
510# OBSOLETE nia = cia + pcdisp;
511# OBSOLETE if (TRACE_CALL_P)
512# OBSOLETE TRACE_ACTION |= TRACE_ACTION_CALL;
513# OBSOLETE }
514# OBSOLETE
515# OBSOLETE
516# OBSOLETE // BSRTZR
517# OBSOLETE
518# OBSOLETE _BRA,00110,00,6.RA,6.**,6.RC:BRA:short:mu:BSRTZR
519# OBSOLETE "bsrtzr r<RC>"
520# OBSOLETE if (val_Ra == 0) {
521# OBSOLETE if (cia == RPT_E && PSW_VAL (PSW_RP))
522# OBSOLETE WRITE32_QUEUE (&GPR[62], RPT_S);
523# OBSOLETE else
524# OBSOLETE WRITE32_QUEUE (&GPR[62], cia + 8);
525# OBSOLETE nia = cia + pcdisp;
526# OBSOLETE if (TRACE_CALL_P)
527# OBSOLETE TRACE_ACTION |= TRACE_ACTION_CALL;
528# OBSOLETE }
529# OBSOLETE
530# OBSOLETE _BRA,00110,10,6.RA,_IMM12:BRA:short:mu:BSRTZR imm
531# OBSOLETE "bsrtzr <pcdisp>"
532# OBSOLETE if (val_Ra == 0) {
533# OBSOLETE if (cia == RPT_E && PSW_VAL (PSW_RP))
534# OBSOLETE WRITE32_QUEUE (&GPR[62], RPT_S);
535# OBSOLETE else
536# OBSOLETE WRITE32_QUEUE (&GPR[62], cia + 8);
537# OBSOLETE nia = cia + pcdisp;
538# OBSOLETE if (TRACE_CALL_P)
539# OBSOLETE TRACE_ACTION |= TRACE_ACTION_CALL;
540# OBSOLETE }
541# OBSOLETE
542# OBSOLETE _BRA,00110,10,6.RA,6.**,_IMM32:BRA:long:mu:BSRTZR imm long
543# OBSOLETE "bsrtzr <pcdisp>"
544# OBSOLETE if (val_Ra == 0) {
545# OBSOLETE if (cia == RPT_E && PSW_VAL (PSW_RP))
546# OBSOLETE WRITE32_QUEUE (&GPR[62], RPT_S);
547# OBSOLETE else
548# OBSOLETE WRITE32_QUEUE (&GPR[62], cia + 8);
549# OBSOLETE nia = cia + pcdisp;
550# OBSOLETE if (TRACE_CALL_P)
551# OBSOLETE TRACE_ACTION |= TRACE_ACTION_CALL;
552# OBSOLETE }
553# OBSOLETE
554# OBSOLETE
555# OBSOLETE // BTST
556# OBSOLETE
557# OBSOLETE _LOGIC,00000,00,***,3.FA,6.RB,6.RC:LOGIC:short:iu,mu:BTST
558# OBSOLETE "btst f<FA>, r<RB>, r<RC>"
559# OBSOLETE int bit = (Rc) % 32;
560# OBSOLETE PSW_FLAG_SET_QUEUE(FA, MASKED32(Rb, bit, bit));
561# OBSOLETE _LOGIC,00000,10,***,3.FA,6.RB,_IMM6:LOGIC:short:iu,mu:BTST imm
562# OBSOLETE "btst f<FA>, r<RB>, <imm>"
563# OBSOLETE int bit = imm % 32;
564# OBSOLETE PSW_FLAG_SET_QUEUE(FA, MASKED32(Rb, bit, bit));
565# OBSOLETE
566# OBSOLETE
567# OBSOLETE
568# OBSOLETE // CMPcc
569# OBSOLETE
570# OBSOLETE void::function::do_cmp_cc:int cc, int fa, signed32 rb, signed32 rc
571# OBSOLETE int value = 0;
572# OBSOLETE switch (cc) {
573# OBSOLETE case 0: /* EQ */
574# OBSOLETE value = (rb == rc);
575# OBSOLETE break;
576# OBSOLETE case 1: /* NE */
577# OBSOLETE value = (rb != rc);
578# OBSOLETE break;
579# OBSOLETE case 2: /* GT */
580# OBSOLETE value = (rb > rc);
581# OBSOLETE break;
582# OBSOLETE case 3: /* GE */
583# OBSOLETE value = (rb >= rc);
584# OBSOLETE break;
585# OBSOLETE case 4: /* LT */
586# OBSOLETE value = (rb < rc);
587# OBSOLETE break;
588# OBSOLETE case 5: /* LE */
589# OBSOLETE value = (rb <= rc);
590# OBSOLETE break;
591# OBSOLETE case 6: /* PS */
592# OBSOLETE value = ((rb >= 0) && (rc >= 0));
593# OBSOLETE break;
594# OBSOLETE case 7: /* NG */
595# OBSOLETE value = ((rb < 0) && (rc < 0));
596# OBSOLETE break;
597# OBSOLETE default:
598# OBSOLETE sim_engine_abort (SD, CPU, cia, "do_cmp_cc - internal error - bad switch (%d)", cc);
599# OBSOLETE }
600# OBSOLETE PSW_FLAG_SET_QUEUE(fa, value);
601# OBSOLETE
602# OBSOLETE ::%s::ccc:int ccc
603# OBSOLETE switch (ccc)
604# OBSOLETE {
605# OBSOLETE case 0: return "eq";
606# OBSOLETE case 1: return "ne";
607# OBSOLETE case 2: return "gt";
608# OBSOLETE case 3: return "ge";
609# OBSOLETE case 4: return "lt";
610# OBSOLETE case 5: return "le";
611# OBSOLETE case 6: return "ps";
612# OBSOLETE case 7: return "ng";
613# OBSOLETE default: return "?";
614# OBSOLETE }
615# OBSOLETE
616# OBSOLETE _LOGIC,01100,00,ccc,3.FA,6.RB,6.RC:LOGIC:short:iu,mu:CMPcc
617# OBSOLETE "cmp%s<ccc> f<FA>, r<RB>, r<RC>"
618# OBSOLETE do_cmp_cc(_SD, ccc, FA, Rb, Rc);
619# OBSOLETE _LOGIC,01100,10,ccc,3.FA,6.RB,_IMM6:LOGIC:short:iu,mu:CMPcc imm
620# OBSOLETE "cmp%s<ccc> f<FA>, r<RB>, <imm>"
621# OBSOLETE do_cmp_cc(_SD, ccc, FA, Rb, imm);
622# OBSOLETE _LOGIC,01100,10,ccc,3.FA,6.RB,_IMM32:LOGIC:long:iu,mu:CMPcc imm long
623# OBSOLETE "cmp%s<ccc> f<FA>, r<RB>, <imm>"
624# OBSOLETE do_cmp_cc(_SD, ccc, FA, Rb, imm);
625# OBSOLETE
626# OBSOLETE
627# OBSOLETE
628# OBSOLETE // CMPUcc
629# OBSOLETE
630# OBSOLETE void::function::do_cmpu_cc:int cc, int fa, unsigned32 rb, unsigned32 rc
631# OBSOLETE int value = 0;
632# OBSOLETE switch (cc) {
633# OBSOLETE case 2: /* GT */
634# OBSOLETE value = (rb > rc);
635# OBSOLETE break;
636# OBSOLETE case 3: /* GE */
637# OBSOLETE value = (rb >= rc);
638# OBSOLETE break;
639# OBSOLETE case 4: /* LT */
640# OBSOLETE value = (rb < rc);
641# OBSOLETE break;
642# OBSOLETE case 5: /* LE */
643# OBSOLETE value = (rb <= rc);
644# OBSOLETE break;
645# OBSOLETE default:
646# OBSOLETE sim_engine_abort (SD, CPU, cia, "do_cmpu_cc - internal error - bad switch (%d)", cc);
647# OBSOLETE }
648# OBSOLETE PSW_FLAG_SET_QUEUE(fa, value);
649# OBSOLETE
650# OBSOLETE _LOGIC,01101,00,ccc,3.FA,6.RB,6.RC:LOGIC:short:iu,mu:CMPUcc
651# OBSOLETE "cmpu%s<ccc> f<FA>, r<RB>, r<RC>"
652# OBSOLETE do_cmpu_cc(_SD, ccc, FA, Rb, Rc);
653# OBSOLETE _LOGIC,01101,10,ccc,3.FA,6.RB,_IMM6:LOGIC:short:iu,mu:CMPUcc imm
654# OBSOLETE "cmpu%s<ccc> f<FA>, r<RB>, <imm>"
655# OBSOLETE do_cmpu_cc(_SD, ccc, FA, Rb, imm_6u);
656# OBSOLETE _LOGIC,01101,10,ccc,3.FA,6.RB,_IMM32:LOGIC:long:iu,mu:CMPUcc imm long
657# OBSOLETE "cmpu%s<ccc> f<FA>, r<RB>, <imm>"
658# OBSOLETE do_cmpu_cc(_SD, ccc, FA, Rb, imm);
659# OBSOLETE
660# OBSOLETE
661# OBSOLETE
662# OBSOLETE // DBRA
663# OBSOLETE
664# OBSOLETE void::function::do_dbra:address_word pcdisp, unsigned32 ra
665# OBSOLETE PSW_SET_QUEUE (PSW_RP, 1);
666# OBSOLETE WRITE32_QUEUE (&RPT_C, 1);
667# OBSOLETE WRITE32_QUEUE (&RPT_S, cia + pcdisp);
668# OBSOLETE WRITE32_QUEUE (&RPT_E, cia + (ra & ~0x7));
669# OBSOLETE
670# OBSOLETE _BRA,10000,00,6.RA,6.**,6.RC:BRA:short:mu:DBRA
671# OBSOLETE "dbra r<RA>, r<RC>"
672# OBSOLETE do_dbra(_SD, pcdisp, val_Ra);
673# OBSOLETE _BRA,10000,10,6.RA,_IMM12:BRA:short:mu:DBRA imm
674# OBSOLETE "dbra r<RA>, <pcdisp>"
675# OBSOLETE do_dbra(_SD, pcdisp, val_Ra);
676# OBSOLETE _BRA,10000,10,6.RA,6.**,_IMM32:BRA:long:mu:DBRA imm long
677# OBSOLETE "dbra r<RA>, <pcdisp>"
678# OBSOLETE do_dbra(_SD, pcdisp, val_Ra);
679# OBSOLETE
680# OBSOLETE
681# OBSOLETE
682# OBSOLETE // DBRAI
683# OBSOLETE
684# OBSOLETE void::function::do_dbrai:address_word pcdisp, unsigned32 imm
685# OBSOLETE PSW_SET_QUEUE (PSW_RP, 1);
686# OBSOLETE WRITE32_QUEUE (&RPT_C, 1);
687# OBSOLETE WRITE32_QUEUE (&RPT_S, cia + pcdisp);
688# OBSOLETE WRITE32_QUEUE (&RPT_E, cia + (imm << 3));
689# OBSOLETE
690# OBSOLETE _BRA,10100,00,6.IMM_6,6.**,6.RC:BRA:short:mu:DBRAI
691# OBSOLETE "dbrai <IMM_6>, r<RC>"
692# OBSOLETE do_dbrai(_SD, pcdisp, IMM_6);
693# OBSOLETE _BRA,10100,10,6.IMM_6,_IMM12:BRA:short:mu:DBRAI imm
694# OBSOLETE "dbrai <IMM_6>, <pcdisp>"
695# OBSOLETE do_dbrai(_SD, pcdisp, IMM_6);
696# OBSOLETE _BRA,10100,10,6.IMM_6,6.**,_IMM32:BRA:long:mu:DBRAI imm long
697# OBSOLETE "dbrai <IMM_6>, <pcdisp>"
698# OBSOLETE do_dbrai(_SD, pcdisp, IMM_6);
699# OBSOLETE
700# OBSOLETE
701# OBSOLETE
702# OBSOLETE // DBSR
703# OBSOLETE
704# OBSOLETE void::function::do_dbsr:address_word pcdisp, unsigned32 ra
705# OBSOLETE PSW_SET_QUEUE (PSW_RP, 1);
706# OBSOLETE WRITE32_QUEUE (&RPT_C, 1);
707# OBSOLETE WRITE32_QUEUE (&RPT_S, cia + pcdisp);
708# OBSOLETE WRITE32_QUEUE (&RPT_E, cia + ra);
709# OBSOLETE WRITE32_QUEUE (&GPR[62], cia + ra + 8);
710# OBSOLETE
711# OBSOLETE _BRA,10010,00,6.RA,6.**,6.RC:BRA:short:mu:DBSR
712# OBSOLETE "dbsr r<RA>, r<RC>"
713# OBSOLETE do_dbsr(_SD, pcdisp, val_Ra);
714# OBSOLETE _BRA,10010,10,6.RA,_IMM12:BRA:short:mu:DBSR imm
715# OBSOLETE "dbsr r<RA>, <pcdisp>"
716# OBSOLETE do_dbsr(_SD, pcdisp, val_Ra);
717# OBSOLETE _BRA,10010,10,6.RA,6.**,_IMM32:BRA:long:mu:DBSR imm long
718# OBSOLETE "dbsr r<RA>, <pcdisp>"
719# OBSOLETE do_dbsr(_SD, pcdisp, val_Ra);
720# OBSOLETE
721# OBSOLETE
722# OBSOLETE
723# OBSOLETE // DBSRI
724# OBSOLETE
725# OBSOLETE void::function::do_dbsri:address_word pcdisp, unsigned32 imm
726# OBSOLETE PSW_SET_QUEUE (PSW_RP, 1);
727# OBSOLETE WRITE32_QUEUE (&RPT_C, 1);
728# OBSOLETE WRITE32_QUEUE (&RPT_S, cia + pcdisp);
729# OBSOLETE WRITE32_QUEUE (&RPT_E, cia + (imm << 3));
730# OBSOLETE WRITE32_QUEUE (&GPR[62], cia + (imm << 3) + 8);
731# OBSOLETE
732# OBSOLETE _BRA,10110,00,6.IMM_6,6.**,6.RC:BRA:short:mu:DBSRI
733# OBSOLETE "dbsri <IMM_6>, r<RC>"
734# OBSOLETE do_dbsri(_SD, pcdisp, IMM_6);
735# OBSOLETE _BRA,10110,10,6.IMM_6,_IMM12:BRA:short:mu:DBSRI imm
736# OBSOLETE "dbsri <IMM_6>, <pcdisp>"
737# OBSOLETE do_dbsri(_SD, pcdisp, IMM_6);
738# OBSOLETE _BRA,10110,10,6.IMM_6,6.**,_IMM32:BRA:long:mu:DBSRI imm long
739# OBSOLETE "dbsri <IMM_6>, <pcdisp>"
740# OBSOLETE do_dbsri(_SD, pcdisp, IMM_6);
741# OBSOLETE
742# OBSOLETE
743# OBSOLETE
744# OBSOLETE // DBT
745# OBSOLETE
746# OBSOLETE
747# OBSOLETE _BRA,01011,00,6.**,6.**,6.**:BRA:short:mu:DBT
748# OBSOLETE "dbt"
749# OBSOLETE if (cia == RPT_E && PSW_VAL (PSW_RP))
750# OBSOLETE {
751# OBSOLETE WRITE32_QUEUE (&DPC, RPT_S);
752# OBSOLETE if (RPT_C == 0)
753# OBSOLETE PSW_SET (PSW_RP, 0);
754# OBSOLETE }
755# OBSOLETE else
756# OBSOLETE WRITE32_QUEUE (&DPC, cia + 8);
757# OBSOLETE DID_TRAP = 2;
758# OBSOLETE nia = 0xfffff120; /* debug_trap_address */
759# OBSOLETE
760# OBSOLETE // DJMP
761# OBSOLETE
762# OBSOLETE void::function::do_djmp:address_word pcdisp, unsigned32 ra
763# OBSOLETE PSW_SET_QUEUE (PSW_RP, 1);
764# OBSOLETE WRITE32_QUEUE (&RPT_C, 1);
765# OBSOLETE WRITE32_QUEUE (&RPT_S, pcdisp);
766# OBSOLETE WRITE32_QUEUE (&RPT_E, cia + (ra & ~0x7));
767# OBSOLETE
768# OBSOLETE _BRA,10001,00,6.RA,6.**,6.RC:BRA:short:mu:DJMP
769# OBSOLETE "djmp r<RA>, r<RC>"
770# OBSOLETE do_djmp(_SD, pcdisp, val_Ra);
771# OBSOLETE _BRA,10001,10,6.RA,_IMM12:BRA:short:mu:DJMP imm
772# OBSOLETE "djmp r<RA>, <pcdisp>"
773# OBSOLETE do_djmp(_SD, pcdisp, val_Ra);
774# OBSOLETE _BRA,10001,10,6.RA,6.**,_IMM32:BRA:long:mu:DJMP imm long
775# OBSOLETE "djmp r<RA>, <pcdisp>"
776# OBSOLETE do_djmp(_SD, pcdisp, val_Ra);
777# OBSOLETE
778# OBSOLETE
779# OBSOLETE
780# OBSOLETE // DJMPI
781# OBSOLETE
782# OBSOLETE void::function::do_djmpi:address_word pcdisp, unsigned32 imm
783# OBSOLETE PSW_SET_QUEUE (PSW_RP, 1);
784# OBSOLETE WRITE32_QUEUE (&RPT_C, 1);
785# OBSOLETE WRITE32_QUEUE (&RPT_S, pcdisp);
786# OBSOLETE WRITE32_QUEUE (&RPT_E, cia + (imm << 3));
787# OBSOLETE
788# OBSOLETE _BRA,10101,00,6.IMM_6,6.**,6.RC:BRA:short:mu:DJMPI
789# OBSOLETE "djmpi <IMM_6>, r<RC>"
790# OBSOLETE do_djmpi(_SD, pcdisp, IMM_6);
791# OBSOLETE _BRA,10101,10,6.IMM_6,_IMM12:BRA:short:mu:DJMPI imm
792# OBSOLETE "djmpi <IMM_6>, <pcdisp>"
793# OBSOLETE do_djmpi(_SD, pcdisp, IMM_6);
794# OBSOLETE _BRA,10101,10,6.IMM_6,6.**,_IMM32:BRA:long:mu:DJMPI imm long
795# OBSOLETE "djmpi <IMM_6>, <pcdisp>"
796# OBSOLETE do_djmpi(_SD, pcdisp, IMM_6);
797# OBSOLETE
798# OBSOLETE
799# OBSOLETE
800# OBSOLETE // DJSR
801# OBSOLETE
802# OBSOLETE void::function::do_djsr:address_word pcdisp, unsigned32 ra
803# OBSOLETE PSW_SET_QUEUE (PSW_RP, 1);
804# OBSOLETE WRITE32_QUEUE (&RPT_C, 1);
805# OBSOLETE WRITE32_QUEUE (&RPT_S, pcdisp);
806# OBSOLETE WRITE32_QUEUE (&RPT_E, cia + (ra & ~0x7));
807# OBSOLETE WRITE32_QUEUE (&GPR[62], cia + (ra & ~0x7) + 8);
808# OBSOLETE
809# OBSOLETE _BRA,10011,00,6.RA,6.**,6.RC:BRA:short:mu:DJSR
810# OBSOLETE "djsr r<RA>, r<RC>"
811# OBSOLETE do_djsr(_SD, pcdisp, val_Ra);
812# OBSOLETE _BRA,10011,10,6.RA,_IMM12:BRA:short:mu:DJSR imm
813# OBSOLETE "djsr r<RA>, <pcdisp>"
814# OBSOLETE do_djsr(_SD, pcdisp, val_Ra);
815# OBSOLETE _BRA,10011,10,6.RA,6.**,_IMM32:BRA:long:mu:DJSR imm long
816# OBSOLETE "djsr r<RA>, <pcdisp>"
817# OBSOLETE do_djsr(_SD, pcdisp, val_Ra);
818# OBSOLETE
819# OBSOLETE
820# OBSOLETE
821# OBSOLETE // DJSRI
822# OBSOLETE
823# OBSOLETE void::function::do_djsri:address_word pcdisp, unsigned32 imm
824# OBSOLETE PSW_SET_QUEUE (PSW_RP, 1);
825# OBSOLETE WRITE32_QUEUE (&RPT_C, 1);
826# OBSOLETE WRITE32_QUEUE (&RPT_S, pcdisp);
827# OBSOLETE WRITE32_QUEUE (&RPT_E, cia + (imm << 3));
828# OBSOLETE WRITE32_QUEUE (&GPR[62], cia + (imm << 3) + 8);
829# OBSOLETE
830# OBSOLETE _BRA,10111,00,6.IMM_6,6.**,6.RC:BRA:short:mu:DJSRI
831# OBSOLETE "djsri <IMM_6>, r<RC>"
832# OBSOLETE do_djsri(_SD, pcdisp, IMM_6);
833# OBSOLETE _BRA,10111,10,6.IMM_6,_IMM12:BRA:short:mu:DJSRI imm
834# OBSOLETE "djsri <IMM_6>, <pcdisp>"
835# OBSOLETE do_djsri(_SD, pcdisp, IMM_6);
836# OBSOLETE _BRA,10111,10,6.IMM_6,6.**,_IMM32:BRA:long:mu:DJSRI imm long
837# OBSOLETE "djsri <IMM_6>, <pcdisp>"
838# OBSOLETE do_djsri(_SD, pcdisp, IMM_6);
839# OBSOLETE
840# OBSOLETE
841# OBSOLETE
842# OBSOLETE // JMP
843# OBSOLETE
844# OBSOLETE _BRA,00001,00,6.**,6.**,6.RC:BRA:short:mu:JMP
845# OBSOLETE "jmp r<RC>"
846# OBSOLETE nia = pcaddr;
847# OBSOLETE if (RC == 62 && TRACE_CALL_P)
848# OBSOLETE TRACE_ACTION |= TRACE_ACTION_RETURN;
849# OBSOLETE _BRA,00001,10,_IMM18:BRA:short:mu:JMP imm
850# OBSOLETE "jmp <pcdisp>"
851# OBSOLETE nia = pcaddr;
852# OBSOLETE _BRA,00001,10,6.**,6.**,_IMM32:BRA:long:mu:JMP imm long
853# OBSOLETE "jmp <pcdisp>"
854# OBSOLETE nia = pcaddr;
855# OBSOLETE
856# OBSOLETE
857# OBSOLETE
858# OBSOLETE // JMPTNZ
859# OBSOLETE
860# OBSOLETE _BRA,00101,01,6.RA,6.**,6.RC:BRA:short:mu:JMPTNZ
861# OBSOLETE "jmptnz r<RC>"
862# OBSOLETE if (val_Ra != 0)
863# OBSOLETE nia = pcaddr;
864# OBSOLETE _BRA,00101,11,6.RA,_IMM12:BRA:short:mu:JMPTNZ imm
865# OBSOLETE "jmptnz <pcdisp>"
866# OBSOLETE if (val_Ra != 0)
867# OBSOLETE nia = pcaddr;
868# OBSOLETE _BRA,00101,11,6.RA,6.**,_IMM32:BRA:long:mu:JMPTNZ imm long
869# OBSOLETE "jmptnz <pcdisp>"
870# OBSOLETE if (val_Ra != 0)
871# OBSOLETE nia = pcaddr;
872# OBSOLETE
873# OBSOLETE
874# OBSOLETE
875# OBSOLETE // JMPTZR
876# OBSOLETE
877# OBSOLETE _BRA,00101,00,6.RA,6.**,6.RC:BRA:short:mu:JMPTZR
878# OBSOLETE "jmptzr r<RC>"
879# OBSOLETE if (val_Ra == 0)
880# OBSOLETE nia = pcaddr;
881# OBSOLETE _BRA,00101,10,6.RA,_IMM12:BRA:short:mu:JMPTZR imm
882# OBSOLETE "jmptzr <pcdisp>"
883# OBSOLETE if (val_Ra == 0)
884# OBSOLETE nia = pcaddr;
885# OBSOLETE _BRA,00101,10,6.RA,6.**,_IMM32:BRA:long:mu:JMPTZR imm long
886# OBSOLETE "jmptzr <pcdisp>"
887# OBSOLETE if (val_Ra == 0)
888# OBSOLETE nia = pcaddr;
889# OBSOLETE
890# OBSOLETE
891# OBSOLETE
892# OBSOLETE // JOINpp
893# OBSOLETE
894# OBSOLETE void::function::do_join_pp:int pp, unsigned32 *ra, unsigned32 rb, unsigned32 src
895# OBSOLETE switch (pp) {
896# OBSOLETE case 0x0: /* LL */
897# OBSOLETE WRITE32_QUEUE (ra, ((unsigned32)VL2_4(rb) << 16) | VL2_4(src));
898# OBSOLETE break;
899# OBSOLETE case 0x1: /* LH */
900# OBSOLETE WRITE32_QUEUE (ra, ((unsigned32)VL2_4(rb) << 16) | VH2_4(src));
901# OBSOLETE break;
902# OBSOLETE case 0x2: /* HL */
903# OBSOLETE WRITE32_QUEUE (ra, ((unsigned32)VH2_4(rb) << 16) | VL2_4(src));
904# OBSOLETE break;
905# OBSOLETE case 0x3: /* HH */
906# OBSOLETE WRITE32_QUEUE (ra, ((unsigned32)VH2_4(rb) << 16) | VH2_4(src));
907# OBSOLETE break;
908# OBSOLETE }
909# OBSOLETE
910# OBSOLETE ::%s::pp:int pp
911# OBSOLETE switch (pp)
912# OBSOLETE {
913# OBSOLETE case 0x0: return "ll";
914# OBSOLETE case 0x1: return "lh";
915# OBSOLETE case 0x2: return "hl";
916# OBSOLETE case 0x3: return "hh";
917# OBSOLETE default: return "?";
918# OBSOLETE }
919# OBSOLETE
920# OBSOLETE _IALU1,011,pp,00,6.RA,6.RB,6.RC:IALU1:short:iu,mu:JOINpp
921# OBSOLETE "join%s<pp> r<RA>, r<RB>, r<RC>"
922# OBSOLETE do_join_pp(_SD, pp, Ra, Rb, Rc);
923# OBSOLETE _IALU1,011,pp,10,6.RA,6.RB,_IMM6:IALU1:short:iu,mu:JOINpp imm
924# OBSOLETE "join%s<pp> r<RA>, r<RB>, <imm>"
925# OBSOLETE do_join_pp(_SD, pp, Ra, Rb, immHL);
926# OBSOLETE _IALU1,011,pp,10,6.RA,6.RB,_IMM32:IALU1:long:iu,mu:JOINpp imm long
927# OBSOLETE "join%s<pp> r<RA>, r<RB>, <imm>"
928# OBSOLETE do_join_pp(_SD, pp, Ra, Rb, immHL);
929# OBSOLETE
930# OBSOLETE
931# OBSOLETE
932# OBSOLETE // JSR
933# OBSOLETE
934# OBSOLETE _BRA,00011,00,6.**,6.**,6.RC:BRA:short:mu:JSR
935# OBSOLETE "jsr r<RC>"
936# OBSOLETE if (cia == RPT_E && PSW_VAL (PSW_RP))
937# OBSOLETE WRITE32_QUEUE (&GPR[62], RPT_S);
938# OBSOLETE else
939# OBSOLETE WRITE32_QUEUE (&GPR[62], cia + 8);
940# OBSOLETE if (TRACE_CALL_P)
941# OBSOLETE TRACE_ACTION |= TRACE_ACTION_CALL;
942# OBSOLETE return pcaddr;
943# OBSOLETE _BRA,00011,10,_IMM18:BRA:short:mu:JSR imm
944# OBSOLETE "jsr <pcdisp>"
945# OBSOLETE if (cia == RPT_E && PSW_VAL (PSW_RP))
946# OBSOLETE WRITE32_QUEUE (&GPR[62], RPT_S);
947# OBSOLETE else
948# OBSOLETE WRITE32_QUEUE (&GPR[62], cia + 8);
949# OBSOLETE if (TRACE_CALL_P)
950# OBSOLETE TRACE_ACTION |= TRACE_ACTION_CALL;
951# OBSOLETE return pcaddr;
952# OBSOLETE _BRA,00011,10,6.**,6.**,_IMM32:BRA:long:mu:JSR imm long
953# OBSOLETE "jsr <pcdisp>"
954# OBSOLETE if (cia == RPT_E && PSW_VAL (PSW_RP))
955# OBSOLETE WRITE32_QUEUE (&GPR[62], RPT_S);
956# OBSOLETE else
957# OBSOLETE WRITE32_QUEUE (&GPR[62], cia + 8);
958# OBSOLETE if (TRACE_CALL_P)
959# OBSOLETE TRACE_ACTION |= TRACE_ACTION_CALL;
960# OBSOLETE return pcaddr;
961# OBSOLETE
962# OBSOLETE
963# OBSOLETE // JSRTNZ
964# OBSOLETE
965# OBSOLETE _BRA,00111,01,6.RA,6.**,6.RC:BRA:short:mu:JSRTNZ
966# OBSOLETE "jsrtnz r<RC>"
967# OBSOLETE if (val_Ra != 0) {
968# OBSOLETE if (cia == RPT_E && PSW_VAL (PSW_RP))
969# OBSOLETE WRITE32_QUEUE (&GPR[62], RPT_S);
970# OBSOLETE else
971# OBSOLETE WRITE32_QUEUE (&GPR[62], cia + 8);
972# OBSOLETE nia = pcaddr;
973# OBSOLETE if (TRACE_CALL_P)
974# OBSOLETE TRACE_ACTION |= TRACE_ACTION_CALL;
975# OBSOLETE }
976# OBSOLETE _BRA,00111,11,6.RA,_IMM12:BRA:short:mu:JSRTNZ imm
977# OBSOLETE "jsrtnz <pcdisp>"
978# OBSOLETE if (val_Ra != 0) {
979# OBSOLETE if (cia == RPT_E && PSW_VAL (PSW_RP))
980# OBSOLETE WRITE32_QUEUE (&GPR[62], RPT_S);
981# OBSOLETE else
982# OBSOLETE WRITE32_QUEUE (&GPR[62], cia + 8);
983# OBSOLETE nia = pcaddr;
984# OBSOLETE if (TRACE_CALL_P)
985# OBSOLETE TRACE_ACTION |= TRACE_ACTION_CALL;
986# OBSOLETE }
987# OBSOLETE _BRA,00111,11,6.RA,6.**,_IMM32:BRA:long:mu:JSRTNZ imm long
988# OBSOLETE "jsrtnz <pcdisp>"
989# OBSOLETE if (val_Ra != 0) {
990# OBSOLETE if (cia == RPT_E && PSW_VAL (PSW_RP))
991# OBSOLETE WRITE32_QUEUE (&GPR[62], RPT_S);
992# OBSOLETE else
993# OBSOLETE WRITE32_QUEUE (&GPR[62], cia + 8);
994# OBSOLETE nia = pcaddr;
995# OBSOLETE if (TRACE_CALL_P)
996# OBSOLETE TRACE_ACTION |= TRACE_ACTION_CALL;
997# OBSOLETE }
998# OBSOLETE
999# OBSOLETE
1000# OBSOLETE
1001# OBSOLETE // JSRTZR
1002# OBSOLETE
1003# OBSOLETE _BRA,00111,00,6.RA,6.**,6.RC:BRA:short:mu:JSRTZR
1004# OBSOLETE "jsrtzr r<RC>"
1005# OBSOLETE if (val_Ra == 0) {
1006# OBSOLETE if (cia == RPT_E && PSW_VAL (PSW_RP))
1007# OBSOLETE WRITE32_QUEUE (&GPR[62], RPT_S);
1008# OBSOLETE else
1009# OBSOLETE WRITE32_QUEUE (&GPR[62], cia + 8);
1010# OBSOLETE nia = pcaddr;
1011# OBSOLETE if (TRACE_CALL_P)
1012# OBSOLETE TRACE_ACTION |= TRACE_ACTION_CALL;
1013# OBSOLETE }
1014# OBSOLETE _BRA,00111,10,6.RA,_IMM12:BRA:short:mu:JSRTZR imm
1015# OBSOLETE "jsrtzr <pcdisp>"
1016# OBSOLETE if (val_Ra == 0) {
1017# OBSOLETE if (cia == RPT_E && PSW_VAL (PSW_RP))
1018# OBSOLETE WRITE32_QUEUE (&GPR[62], RPT_S);
1019# OBSOLETE else
1020# OBSOLETE WRITE32_QUEUE (&GPR[62], cia + 8);
1021# OBSOLETE nia = pcaddr;
1022# OBSOLETE if (TRACE_CALL_P)
1023# OBSOLETE TRACE_ACTION |= TRACE_ACTION_CALL;
1024# OBSOLETE }
1025# OBSOLETE _BRA,00111,10,6.RA,6.**,_IMM32:BRA:long:mu:JSRTZR imm long
1026# OBSOLETE "jsrtzr <pcdisp>"
1027# OBSOLETE if (val_Ra == 0) {
1028# OBSOLETE if (cia == RPT_E && PSW_VAL (PSW_RP))
1029# OBSOLETE WRITE32_QUEUE (&GPR[62], RPT_S);
1030# OBSOLETE else
1031# OBSOLETE WRITE32_QUEUE (&GPR[62], cia + 8);
1032# OBSOLETE nia = pcaddr;
1033# OBSOLETE if (TRACE_CALL_P)
1034# OBSOLETE TRACE_ACTION |= TRACE_ACTION_CALL;
1035# OBSOLETE }
1036# OBSOLETE
1037# OBSOLETE
1038# OBSOLETE
1039# OBSOLETE // Post increment
1040# OBSOLETE
1041# OBSOLETE void::function::do_incr:int x, unsigned32 *rb, int delta
1042# OBSOLETE unsigned32 next_rb;
1043# OBSOLETE if (x == 1)
1044# OBSOLETE next_rb = *rb + delta;
1045# OBSOLETE else if (x == 3)
1046# OBSOLETE next_rb = *rb - delta;
1047# OBSOLETE else
1048# OBSOLETE next_rb = *rb; /* value not used */
1049# OBSOLETE /* HW erratum: check value after incrementing */
1050# OBSOLETE if (next_rb == MOD_E
1051# OBSOLETE && (x == 1 || x == 3)
1052# OBSOLETE && (PSW_VAL(PSW_MD))) {
1053# OBSOLETE WRITE32_QUEUE (rb, MOD_S);
1054# OBSOLETE }
1055# OBSOLETE else if (x == 1 || x == 3)
1056# OBSOLETE WRITE32_QUEUE (rb, next_rb);
1057# OBSOLETE
1058# OBSOLETE // LD2H
1059# OBSOLETE
1060# OBSOLETE int::function::make_even_reg:int reg, const char *name
1061# OBSOLETE if (reg & 1)
1062# OBSOLETE sim_engine_abort (SD, CPU, cia,
1063# OBSOLETE "0x%lx:%s odd register (r%d) used in multi-word load/mulx2h",
1064# OBSOLETE (long) cia, name, reg);
1065# OBSOLETE return reg;
1066# OBSOLETE
1067# OBSOLETE void::function::do_ld2h:int ra, unsigned32 rb, unsigned32 src
1068# OBSOLETE signed32 mem;
1069# OBSOLETE ra = make_even_reg(_SD, ra, "LD2H");
1070# OBSOLETE mem = MEM(signed, rb + src, 4);
1071# OBSOLETE if (ra != 0)
1072# OBSOLETE {
1073# OBSOLETE WRITE32_QUEUE (&GPR[ra + 0], SEXT32(EXTRACTED32(mem, 0, 15), 16));
1074# OBSOLETE WRITE32_QUEUE (&GPR[ra + 1], SEXT32(EXTRACTED32(mem, 16, 31), 16));
1075# OBSOLETE }
1076# OBSOLETE
1077# OBSOLETE ::%s::XX:int XX
1078# OBSOLETE switch (XX)
1079# OBSOLETE {
1080# OBSOLETE case 0: return "";
1081# OBSOLETE case 1: return "+";
1082# OBSOLETE case 3: return "-";
1083# OBSOLETE default: return "?";
1084# OBSOLETE }
1085# OBSOLETE
1086# OBSOLETE _IMEM,00011,XX,6.RA,6.RB,6.SRC_6:IMEM:short:mu:LD2H
1087# OBSOLETE "ld2h r<RA>, @(r<RB>, <SRC_6>)":XX == 0
1088# OBSOLETE "ld2h r<RA>, @(r<RB>%s<XX>, r<SRC_6>)"
1089# OBSOLETE do_ld2h(_SD, RA, Rb, src);
1090# OBSOLETE do_incr(_SD, XX, &GPR[RB], 4);
1091# OBSOLETE _IMEM,00011,10,6.RA,6.RB,_IMM32:IMEM:long:mu:LD2H long
1092# OBSOLETE "ld2h r<RA>, @(r<RB>, <imm>)"
1093# OBSOLETE do_ld2h(_SD, RA, Rb, imm);
1094# OBSOLETE
1095# OBSOLETE
1096# OBSOLETE
1097# OBSOLETE // LD2W
1098# OBSOLETE
1099# OBSOLETE void::function::do_ld2w:int ra, unsigned32 rb, unsigned32 src
1100# OBSOLETE unsigned64 mem;
1101# OBSOLETE ra = make_even_reg(_SD, ra, "LD2W");
1102# OBSOLETE mem = MEM(unsigned, rb + src, 8);
1103# OBSOLETE if (ra != 0)
1104# OBSOLETE {
1105# OBSOLETE WRITE32_QUEUE (&GPR[ra + 0], EXTRACTED64 (mem, 0, 31));
1106# OBSOLETE WRITE32_QUEUE (&GPR[ra + 1], EXTRACTED64 (mem, 32, 63));
1107# OBSOLETE }
1108# OBSOLETE
1109# OBSOLETE _IMEM,00110,XX,6.RA,6.RB,6.SRC_6:IMEM:short:mu:L2W
1110# OBSOLETE "ld2w r<RA>, @(r<RB>, <SRC_6>)":XX == 0
1111# OBSOLETE "ld2w r<RA>, @(r<RB>%s<XX>, r<SRC_6>)"
1112# OBSOLETE do_ld2w(_SD, RA, Rb, src);
1113# OBSOLETE do_incr(_SD, XX, &GPR[RB], 8);
1114# OBSOLETE _IMEM,00110,10,6.RA,6.RB,_IMM32:IMEM:long:mu:L2W long
1115# OBSOLETE "ld2w r<RA>, @(r<RB>, <imm>)"
1116# OBSOLETE do_ld2w(_SD, RA, Rb, imm);
1117# OBSOLETE
1118# OBSOLETE
1119# OBSOLETE
1120# OBSOLETE // LD4BH
1121# OBSOLETE
1122# OBSOLETE void::function::do_ld4bh:unsigned32 ra, unsigned32 rb, unsigned32 src
1123# OBSOLETE unsigned16 l1, l2, h1, h2;
1124# OBSOLETE unsigned32 mem;
1125# OBSOLETE ra = make_even_reg(_SD, ra, "LD4BH");
1126# OBSOLETE mem = MEM(unsigned, rb + src, 4);
1127# OBSOLETE h1 = SEXT16(EXTRACTED32(mem, 0, 7), 8);
1128# OBSOLETE l1 = SEXT16(EXTRACTED32(mem, 8, 15), 8);
1129# OBSOLETE h2 = SEXT16(EXTRACTED32(mem, 16, 23), 8);
1130# OBSOLETE l2 = SEXT16(EXTRACTED32(mem, 24, 31), 8);
1131# OBSOLETE if (ra != 0)
1132# OBSOLETE {
1133# OBSOLETE WRITE32_QUEUE (&GPR[ra + 0], (h1 << 16) | l1);
1134# OBSOLETE WRITE32_QUEUE (&GPR[ra + 1], (h2 << 16) | l2);
1135# OBSOLETE }
1136# OBSOLETE
1137# OBSOLETE _IMEM,00101,XX,6.RA,6.RB,6.SRC_6:IMEM:short:mu:LD4BH
1138# OBSOLETE "ld4bh r<RA>, @(r<RB>, <SRC_6>)":XX == 0
1139# OBSOLETE "ld4bh r<RA>, @(r<RB>%s<XX>, r<SRC_6>)"
1140# OBSOLETE do_ld4bh(_SD, RA, Rb, src);
1141# OBSOLETE do_incr(_SD, XX, &GPR[RB], 4);
1142# OBSOLETE _IMEM,00101,10,6.RA,6.RB,_IMM32:IMEM:long:mu:LD4BH long
1143# OBSOLETE "ld4bh r<RA>, @(r<RB>, <imm>)"
1144# OBSOLETE do_ld4bh(_SD, RA, Rb, imm);
1145# OBSOLETE
1146# OBSOLETE
1147# OBSOLETE
1148# OBSOLETE // LD4BHU
1149# OBSOLETE
1150# OBSOLETE void::function::do_ld4bhu:unsigned32 ra, unsigned32 rb, unsigned32 src
1151# OBSOLETE unsigned16 l1, l2, h1, h2;
1152# OBSOLETE unsigned32 mem;
1153# OBSOLETE ra = make_even_reg(_SD, ra, "LD4BH");
1154# OBSOLETE mem = MEM(signed, rb + src, 4);
1155# OBSOLETE h1 = EXTRACTED32(mem, 0, 7);
1156# OBSOLETE l1 = EXTRACTED32(mem, 8, 15);
1157# OBSOLETE h2 = EXTRACTED32(mem, 16, 23);
1158# OBSOLETE l2 = EXTRACTED32(mem, 24, 31);
1159# OBSOLETE if (ra != 0)
1160# OBSOLETE {
1161# OBSOLETE WRITE32_QUEUE (&GPR[ra + 0], (h1 << 16) | l1);
1162# OBSOLETE WRITE32_QUEUE (&GPR[ra + 1], (h2 << 16) | l2);
1163# OBSOLETE }
1164# OBSOLETE
1165# OBSOLETE _IMEM,01101,XX,6.RA,6.RB,6.SRC_6:IMEM:short:mu:LD4BHU
1166# OBSOLETE "ld4hbu r<RA>, @(r<RB>, <SRC_6>)":XX == 0
1167# OBSOLETE "ld4hbu r<RA>, @(r<RB>%s<XX>, r<SRC_6>)"
1168# OBSOLETE do_ld4bhu(_SD, RA, Rb, src);
1169# OBSOLETE do_incr(_SD, XX, &GPR[RB], 4);
1170# OBSOLETE _IMEM,01101,10,6.RA,6.RB,_IMM32:IMEM:long:mu:LD4BHU long
1171# OBSOLETE "ld4hbu r<RA>, @(r<RB>, <imm>)"
1172# OBSOLETE do_ld4bhu(_SD, RA, Rb, imm);
1173# OBSOLETE
1174# OBSOLETE
1175# OBSOLETE
1176# OBSOLETE // LDB
1177# OBSOLETE
1178# OBSOLETE void::function::do_ldb:unsigned32 *ra, unsigned32 rb, unsigned32 src
1179# OBSOLETE WRITE32_QUEUE (ra, MEM(signed, rb + src, 1));
1180# OBSOLETE
1181# OBSOLETE _IMEM,00000,XX,6.RA,6.RB,6.SRC_6:IMEM:short:mu:LDB
1182# OBSOLETE "ldb r<RA>, @(r<RB>, <SRC_6>)":XX == 0
1183# OBSOLETE "ldb r<RA>, @(r<RB>%s<XX>, r<SRC_6>)"
1184# OBSOLETE do_ldb(_SD, Ra, Rb, src);
1185# OBSOLETE do_incr(_SD, XX, &GPR[RB], 1);
1186# OBSOLETE _IMEM,00000,10,6.RA,6.RB,_IMM32:IMEM:long:mu:LDB long
1187# OBSOLETE "ldb r<RA>, @(r<RB>, <imm>)"
1188# OBSOLETE do_ldb(_SD, Ra, Rb, imm);
1189# OBSOLETE
1190# OBSOLETE
1191# OBSOLETE
1192# OBSOLETE // LDBU
1193# OBSOLETE
1194# OBSOLETE void::function::do_ldbu:unsigned32 *ra, unsigned32 rb, unsigned32 src
1195# OBSOLETE WRITE32_QUEUE (ra, MEM(unsigned, rb + src, 1));
1196# OBSOLETE
1197# OBSOLETE _IMEM,01001,XX,6.RA,6.RB,6.SRC_6:IMEM:short:mu:LDBU
1198# OBSOLETE "ldbu r<RA>, @(r<RB>, <SRC_6>)":XX == 0
1199# OBSOLETE "ldbu r<RA>, @(r<RB>%s<XX>, r<SRC_6>)"
1200# OBSOLETE do_ldbu(_SD, Ra, Rb, src);
1201# OBSOLETE do_incr(_SD, XX, &GPR[RB], 1);
1202# OBSOLETE _IMEM,01001,10,6.RA,6.RB,_IMM32:IMEM:long:mu:LDBU long
1203# OBSOLETE "ldbu r<RA>, @(r<RB>, <imm>)"
1204# OBSOLETE do_ldbu(_SD, Ra, Rb, imm);
1205# OBSOLETE
1206# OBSOLETE
1207# OBSOLETE
1208# OBSOLETE // LDH
1209# OBSOLETE
1210# OBSOLETE void::function::do_ldh:unsigned32 *ra, unsigned32 rb, unsigned32 src
1211# OBSOLETE WRITE32_QUEUE (ra, MEM(signed, rb + src, 2));
1212# OBSOLETE
1213# OBSOLETE _IMEM,00010,XX,6.RA,6.RB,6.SRC_6:IMEM:short:mu:LDH
1214# OBSOLETE "ldh r<RA>, @(r<RB>, <SRC_6>)":XX == 0
1215# OBSOLETE "ldh r<RA>, @(r<RB>%s<XX>, r<SRC_6>)"
1216# OBSOLETE do_ldh(_SD, Ra, Rb, src);
1217# OBSOLETE do_incr(_SD, XX, &GPR[RB], 2);
1218# OBSOLETE _IMEM,00010,10,6.RA,6.RB,_IMM32:IMEM:long:mu:LDH long
1219# OBSOLETE "ldh r<RA>, @(r<RB>, <imm>)"
1220# OBSOLETE do_ldh(_SD, Ra, Rb, imm);
1221# OBSOLETE
1222# OBSOLETE
1223# OBSOLETE
1224# OBSOLETE // LDHH
1225# OBSOLETE
1226# OBSOLETE void::function::do_ldhh:unsigned32 *ra, unsigned32 rb, unsigned32 src
1227# OBSOLETE WRITE32_QUEUE (ra, MEM(signed, rb + src, 2) << 16);
1228# OBSOLETE
1229# OBSOLETE _IMEM,00001,XX,6.RA,6.RB,6.SRC_6:IMEM:short:mu:LDHH
1230# OBSOLETE "ldhh r<RA>, @(r<RB>, <SRC_6>)":XX == 0
1231# OBSOLETE "ldhh r<RA>, @(r<RB>%s<XX>, r<SRC_6>)"
1232# OBSOLETE do_ldhh(_SD, Ra, Rb, src);
1233# OBSOLETE do_incr(_SD, XX, &GPR[RB], 2);
1234# OBSOLETE _IMEM,00001,10,6.RA,6.RB,_IMM32:IMEM:long:mu:LDHH long
1235# OBSOLETE "ldhh r<RA>, @(r<RB>, <imm>)"
1236# OBSOLETE do_ldhh(_SD, Ra, Rb, imm);
1237# OBSOLETE
1238# OBSOLETE
1239# OBSOLETE
1240# OBSOLETE // LDHU
1241# OBSOLETE
1242# OBSOLETE void::function::do_ldhu:unsigned32 *ra, unsigned32 rb, unsigned32 src
1243# OBSOLETE WRITE32_QUEUE (ra, MEM(unsigned, rb + src, 2));
1244# OBSOLETE
1245# OBSOLETE _IMEM,01010,XX,6.RA,6.RB,6.SRC_6:IMEM:short:mu:LDHU
1246# OBSOLETE "ldhu r<RA>, @(r<RB>, <SRC_6>)":XX == 0
1247# OBSOLETE "ldhu r<RA>, @(r<RB>%s<XX>, r<SRC_6>)"
1248# OBSOLETE do_ldhu(_SD, Ra, Rb, src);
1249# OBSOLETE do_incr(_SD, XX, &GPR[RB], 2);
1250# OBSOLETE _IMEM,01010,10,6.RA,6.RB,_IMM32:IMEM:long:mu:LDHU long
1251# OBSOLETE "ldhu r<RA>, @(r<RB>, <imm>)"
1252# OBSOLETE do_ldhu(_SD, Ra, Rb, imm);
1253# OBSOLETE
1254# OBSOLETE
1255# OBSOLETE
1256# OBSOLETE // LDW
1257# OBSOLETE
1258# OBSOLETE void::function::do_ldw:unsigned32 *ra, unsigned32 rb, unsigned32 src
1259# OBSOLETE WRITE32_QUEUE (ra, MEM(signed, rb + src, 4));
1260# OBSOLETE
1261# OBSOLETE _IMEM,00100,XX,6.RA,6.RB,6.SRC_6:IMEM:short:mu:LDW
1262# OBSOLETE "ldw r<RA>, @(r<RB>, <SRC_6>)":XX == 0
1263# OBSOLETE "ldw r<RA>, @(r<RB>%s<XX>, r<SRC_6>)"
1264# OBSOLETE do_ldw(_SD, Ra, Rb, src);
1265# OBSOLETE do_incr(_SD, XX, &GPR[RB], 4);
1266# OBSOLETE _IMEM,00100,10,6.RA,6.RB,_IMM32:IMEM:long:mu:LDW long
1267# OBSOLETE "ldw r<RA>, @(r<RB>, <imm>)"
1268# OBSOLETE do_ldw(_SD, Ra, Rb, imm);
1269# OBSOLETE
1270# OBSOLETE
1271# OBSOLETE
1272# OBSOLETE // MACa
1273# OBSOLETE
1274# OBSOLETE void::function::do_mac:unsigned64 *aa, unsigned32 *ra, signed32 rb, signed32 src
1275# OBSOLETE unsigned64 accum = *aa;
1276# OBSOLETE accum += (signed64) (rb) * (signed64) (src);
1277# OBSOLETE WRITE64_QUEUE (aa, accum);
1278# OBSOLETE WRITE32_QUEUE (ra, EXTRACTED64(accum, 32, 63));
1279# OBSOLETE
1280# OBSOLETE _IALU2,10100,0,1.AA,6.RA,6.RB,6.RC:IALU2:short:iu:MACa
1281# OBSOLETE "mac<AA> r<RA>, r<RB>, r<RC>"
1282# OBSOLETE do_mac(_SD, Aa, Ra, Rb, Rc);
1283# OBSOLETE _IALU2,10100,1,1.AA,6.RA,6.RB,_IMM6:IALU2:short:iu:MACa imm
1284# OBSOLETE "mac<AA> r<RA>, r<RB>, <imm>"
1285# OBSOLETE do_mac(_SD, Aa, Ra, Rb, imm);
1286# OBSOLETE
1287# OBSOLETE
1288# OBSOLETE
1289# OBSOLETE // MACSa
1290# OBSOLETE
1291# OBSOLETE void::function::do_macs:unsigned64 *aa, unsigned32 *ra, signed32 rb, signed32 src
1292# OBSOLETE unsigned64 accum = *aa;
1293# OBSOLETE accum += ((signed64) (rb) * (signed64) (src)) << 1;
1294# OBSOLETE WRITE64_QUEUE (aa, accum);
1295# OBSOLETE WRITE32_QUEUE (ra, EXTRACTED64(accum, 0, 31));
1296# OBSOLETE
1297# OBSOLETE _IALU2,10101,0,1.AA,6.RA,6.RB,6.RC:IALU2:short:iu:MACSa
1298# OBSOLETE "macs<AA> r<RA>, r<RB>, r<RC>"
1299# OBSOLETE do_macs(_SD, Aa, Ra, Rb, Rc);
1300# OBSOLETE _IALU2,10101,1,1.AA,6.RA,6.RB,_IMM6:IALU2:short:iu:MACSa imm
1301# OBSOLETE "macs<AA> r<RA>, r<RB>, <imm>"
1302# OBSOLETE do_macs(_SD, Aa, Ra, Rb, imm);
1303# OBSOLETE
1304# OBSOLETE
1305# OBSOLETE
1306# OBSOLETE // MODDEC | MODINC
1307# OBSOLETE
1308# OBSOLETE _IMEM,00111,11,6.**,6.RB,_IMM6:IMEM:short:mu:MODDEC
1309# OBSOLETE "moddec r<RB>, <imm>"
1310# OBSOLETE do_incr(_SD, 3/*0b11*/, &GPR[RB], imm_5);
1311# OBSOLETE _IMEM,00111,01,6.**,6.RB,_IMM6:IMEM:short:mu:MODINC
1312# OBSOLETE "modinc r<RB>, <imm>"
1313# OBSOLETE do_incr(_SD, 1/*0b01*/, &GPR[RB], imm_5);
1314# OBSOLETE
1315# OBSOLETE
1316# OBSOLETE
1317# OBSOLETE // MSUBa
1318# OBSOLETE
1319# OBSOLETE void::function::do_msub:unsigned64 *aa, unsigned32 *ra, signed32 rb, signed32 src
1320# OBSOLETE unsigned64 accum = *aa;
1321# OBSOLETE accum -= (signed64) (rb) * (signed64) (src);
1322# OBSOLETE WRITE64_QUEUE (aa, accum);
1323# OBSOLETE WRITE32_QUEUE (ra, EXTRACTED64(accum, 32, 63));
1324# OBSOLETE
1325# OBSOLETE _IALU2,10110,0,1.AA,6.RA,6.RB,6.RC:IALU2:short:iu:MSUBa
1326# OBSOLETE "msub<AA> r<RA>, r<RB>, r<RC>"
1327# OBSOLETE do_msub(_SD, Aa, Ra, Rb, Rc);
1328# OBSOLETE _IALU2,10110,1,1.AA,6.RA,6.RB,_IMM6:IALU2:short:iu:MSUBa imm
1329# OBSOLETE "msub<AA> r<RA>, r<RB>, <imm>"
1330# OBSOLETE do_msub(_SD, Aa, Ra, Rb, imm);
1331# OBSOLETE
1332# OBSOLETE
1333# OBSOLETE
1334# OBSOLETE // MSUBSa
1335# OBSOLETE
1336# OBSOLETE void::function::do_msubs:unsigned64 *aa, unsigned32 *ra, signed32 rb, signed32 src
1337# OBSOLETE unsigned64 accum = *aa;
1338# OBSOLETE accum -= ((signed64) (rb) * (signed64) (src)) << 1;
1339# OBSOLETE WRITE64_QUEUE (aa, accum);
1340# OBSOLETE WRITE32_QUEUE (ra, EXTRACTED64(accum, 0, 31));
1341# OBSOLETE
1342# OBSOLETE _IALU2,10111,0,1.AA,6.RA,6.RB,6.RC:IALU2:short:iu:MSUBSa
1343# OBSOLETE "msubs<AA> r<RA>, r<RB>, r<RC>"
1344# OBSOLETE do_msubs(_SD, Aa, Ra, Rb, Rc);
1345# OBSOLETE _IALU2,10111,1,1.AA,6.RA,6.RB,_IMM6:IALU2:short:iu:MSUBSa imm
1346# OBSOLETE "msubs<AA> r<RA>, r<RB>, <imm>"
1347# OBSOLETE do_msubs(_SD, Aa, Ra, Rb, imm);
1348# OBSOLETE
1349# OBSOLETE
1350# OBSOLETE
1351# OBSOLETE // MUL
1352# OBSOLETE
1353# OBSOLETE void::function::do_mul:unsigned32 *ra, unsigned32 rb, unsigned32 src
1354# OBSOLETE WRITE32_QUEUE (ra, rb * src);
1355# OBSOLETE
1356# OBSOLETE _IALU2,10000,00,6.RA,6.RB,6.RC:IALU2:short:iu:MUL
1357# OBSOLETE "mul r<RA>, r<RB>, r<RC>"
1358# OBSOLETE do_mul(_SD, Ra, Rb, Rc);
1359# OBSOLETE _IALU2,10000,10,6.RA,6.RB,_IMM6:IALU2:short:iu:MUL imm
1360# OBSOLETE "mul r<RA>, r<RB>, <imm>"
1361# OBSOLETE do_mul(_SD, Ra, Rb, imm);
1362# OBSOLETE
1363# OBSOLETE
1364# OBSOLETE
1365# OBSOLETE // MUL2H
1366# OBSOLETE
1367# OBSOLETE void::function::do_mul2h:unsigned32 *ra, unsigned32 rb, unsigned32 src
1368# OBSOLETE unsigned16 high = VH2_4(rb) * VH2_4(src);
1369# OBSOLETE unsigned16 low = VL2_4(rb) * VL2_4(src);
1370# OBSOLETE WRITE32_QUEUE (ra, (high << 16) | low);
1371# OBSOLETE
1372# OBSOLETE _IALU2,00000,00,6.RA,6.RB,6.RC:IALU2:short:iu:MUL2H
1373# OBSOLETE "mul2h r<RA>, r<RB>, r<RC>"
1374# OBSOLETE do_mul2h(_SD, Ra, Rb, Rc);
1375# OBSOLETE _IALU2,00000,10,6.RA,6.RB,_IMM6:IALU2:short:iu:MUL2H imm
1376# OBSOLETE "mul2h r<RA>, r<RB>, <imm>"
1377# OBSOLETE do_mul2h(_SD, Ra, Rb, immHL);
1378# OBSOLETE
1379# OBSOLETE
1380# OBSOLETE
1381# OBSOLETE // MULX
1382# OBSOLETE
1383# OBSOLETE void::function::do_mulx:unsigned64 *aa, signed32 rb, signed32 src
1384# OBSOLETE WRITE64_QUEUE (aa, (signed64) (rb) * (signed64) (src));
1385# OBSOLETE
1386# OBSOLETE _IALU2,11000,00,5.*,1.AA,6.RB,6.RC:IALU2:short:iu:MULX
1387# OBSOLETE "mulx a<AA>, r<RB>, r<RC>"
1388# OBSOLETE do_mulx(_SD, Aa, Rb, Rc);
1389# OBSOLETE _IALU2,11000,10,5.*,1.AA,6.RB,_IMM6:IALU2:short:iu:MULX imm
1390# OBSOLETE "mulx a<AA>, r<RB>, <imm>"
1391# OBSOLETE do_mulx(_SD, Aa, Rb, imm);
1392# OBSOLETE
1393# OBSOLETE
1394# OBSOLETE // MULX2H
1395# OBSOLETE
1396# OBSOLETE void::function::do_mulx2h:int ra, signed32 rb, signed32 src, int high
1397# OBSOLETE signed32 result = rb * src;
1398# OBSOLETE if (!high)
1399# OBSOLETE {
1400# OBSOLETE ra = make_even_reg(_SD, ra, "MULX2H");
1401# OBSOLETE if (ra != 0)
1402# OBSOLETE WRITE32_QUEUE (&GPR[ra+1], result);
1403# OBSOLETE }
1404# OBSOLETE else if (ra != 0)
1405# OBSOLETE {
1406# OBSOLETE WRITE32_QUEUE (&GPR[ra+0], result);
1407# OBSOLETE }
1408# OBSOLETE
1409# OBSOLETE _IALU2,00001,00,6.RA,6.RB,6.RC:IALU2:short:iu:MULX2H
1410# OBSOLETE "mul2h r<RA>, r<RB>, r<RC>"
1411# OBSOLETE do_mulx2h(_SD, RA, RbH, RcH, 1);
1412# OBSOLETE do_mulx2h(_SD, RA, RbL, RcL, 0);
1413# OBSOLETE _IALU2,00001,10,6.RA,6.RB,_IMM6:IALU2:short:iu:MULX2H imm
1414# OBSOLETE "mul2h r<RA>, r<RB>, <imm>"
1415# OBSOLETE do_mulx2h(_SD, RA, RbH, imm, 1);
1416# OBSOLETE do_mulx2h(_SD, RA, RbL, imm, 0);
1417# OBSOLETE
1418# OBSOLETE // MULHXpp
1419# OBSOLETE
1420# OBSOLETE void::function::do_mulhx:int pp, unsigned32 *ra, unsigned32 rb, unsigned32 src
1421# OBSOLETE signed32 value = 0;
1422# OBSOLETE switch (pp) {
1423# OBSOLETE case 0: /* LL */
1424# OBSOLETE value = SEXT32(VL2_4(rb), 16) * SEXT32(VL2_4(src), 16);
1425# OBSOLETE break;
1426# OBSOLETE case 1: /* LH */
1427# OBSOLETE value = SEXT32(VL2_4(rb), 16) * SEXT32(VH2_4(src), 16);
1428# OBSOLETE break;
1429# OBSOLETE case 2: /* HL */
1430# OBSOLETE value = SEXT32(VH2_4(rb), 16) * SEXT32(VL2_4(src), 16);
1431# OBSOLETE break;
1432# OBSOLETE case 3: /* HH */
1433# OBSOLETE value = SEXT32(VH2_4(rb), 16) * SEXT32(VH2_4(src), 16);
1434# OBSOLETE break;
1435# OBSOLETE default:
1436# OBSOLETE sim_engine_abort (SD, CPU, cia, "do_mulhx - internal error - bad switch");
1437# OBSOLETE }
1438# OBSOLETE WRITE32_QUEUE (ra, value);
1439# OBSOLETE
1440# OBSOLETE _IALU2,001,pp,00,6.RA,6.RB,6.RC:IALU2:short:iu:MULHXpp
1441# OBSOLETE "mulhx%s<pp> r<RA>, r<RB>, r<RC>"
1442# OBSOLETE do_mulhx(_SD, pp, Ra, Rb, Rc);
1443# OBSOLETE _IALU2,001,pp,10,6.RA,6.RB,_IMM6:IALU2:short:iu:MULHXpp imm
1444# OBSOLETE "mulhx%s<pp> r<RA>, r<RB>, <imm>"
1445# OBSOLETE do_mulhx(_SD, pp, Ra, Rb, immHL);
1446# OBSOLETE
1447# OBSOLETE
1448# OBSOLETE
1449# OBSOLETE // MULXS
1450# OBSOLETE
1451# OBSOLETE void::function::do_mulxs:unsigned64 *aa, signed32 rb, signed32 src
1452# OBSOLETE WRITE64_QUEUE (aa, ((signed64) (rb) * (signed64) (src)) << 1);
1453# OBSOLETE
1454# OBSOLETE _IALU2,11001,00,5.*,1.AA,6.RB,6.RC:IALU2:short:iu:MULXS
1455# OBSOLETE "mulxs a<AA>, r<RB>, r<RC>"
1456# OBSOLETE do_mulxs(_SD, Aa, Rb, Rc);
1457# OBSOLETE _IALU2,11001,10,5.*,1.AA,6.RB,_IMM6:IALU2:short:iu:MULXS imm
1458# OBSOLETE "mulxs a<AA>, r<RB>, <imm>"
1459# OBSOLETE do_mulxs(_SD, Aa, Rb, imm);
1460# OBSOLETE
1461# OBSOLETE
1462# OBSOLETE
1463# OBSOLETE // MVFACC
1464# OBSOLETE
1465# OBSOLETE void::function::do_mvfacc:unsigned32 *ra, unsigned64 ab, unsigned32 src
1466# OBSOLETE while (src > 63) src -= 64;
1467# OBSOLETE WRITE32_QUEUE (ra, ((signed64)ab) >> src);
1468# OBSOLETE
1469# OBSOLETE _IALU2,11111,00,6.RA,5.*,1.AB,6.RC:IALU2:short:iu:MVFACC
1470# OBSOLETE "mvfacc r<RA>, a<AB>, r<RC>"
1471# OBSOLETE do_mvfacc(_SD, Ra, *Ab, Rc);
1472# OBSOLETE _IALU2,11111,10,6.RA,5.*,1.AB,_IMM6:IALU2:short:iu:MVFACC imm
1473# OBSOLETE "mvfacc r<RA>, a<AB>, <imm>"
1474# OBSOLETE do_mvfacc(_SD, Ra, *Ab, imm_6u);
1475# OBSOLETE
1476# OBSOLETE
1477# OBSOLETE
1478# OBSOLETE // MVFSYS
1479# OBSOLETE
1480# OBSOLETE _BRA,11110,00,6.RA,6.CR,6.ID:BRA:short:mu:MVFSYS
1481# OBSOLETE "mvfsys r<RA>, cr<CR>"
1482# OBSOLETE switch (ID) {
1483# OBSOLETE case 0:
1484# OBSOLETE if (CR >= NR_CONTROL_REGISTERS)
1485# OBSOLETE sim_engine_abort (SD, CPU, cia, "FIXME - illegal CR");
1486# OBSOLETE else
1487# OBSOLETE WRITE32_QUEUE (Ra, (CPU)->regs.control[CR]);
1488# OBSOLETE break;
1489# OBSOLETE case 1:
1490# OBSOLETE WRITE32_QUEUE (Ra, PSWL);
1491# OBSOLETE break;
1492# OBSOLETE case 2:
1493# OBSOLETE WRITE32_QUEUE (Ra, EXTRACTED32(PSWH, 16, 31));
1494# OBSOLETE break;
1495# OBSOLETE case 3:
1496# OBSOLETE WRITE32_QUEUE (Ra, PSW_FLAG_VAL(CR));
1497# OBSOLETE break;
1498# OBSOLETE default:
1499# OBSOLETE sim_engine_abort (SD, CPU, cia, "FIXME - illegal ID");
1500# OBSOLETE }
1501# OBSOLETE
1502# OBSOLETE
1503# OBSOLETE
1504# OBSOLETE // MVTACC
1505# OBSOLETE
1506# OBSOLETE _IALU2,01111,00,5.*,1.AA,6.RB,6.RC:IALU2:short:iu:MVTACC
1507# OBSOLETE "mvtacc a<AA>, r<RB>, r<RC>"
1508# OBSOLETE WRITE64_QUEUE (Aa, INSERTED64(RbU, 0, 31) | (RcU));
1509# OBSOLETE
1510# OBSOLETE
1511# OBSOLETE
1512# OBSOLETE // MVTSYS
1513# OBSOLETE
1514# OBSOLETE _BRA,01110,00,6.CR,6.RB,6.ID:BRA:short:mu:MVTSYS
1515# OBSOLETE "mvtsys cr<CR>, r<RB>"
1516# OBSOLETE switch (ID) {
1517# OBSOLETE case 0: /* control register */
1518# OBSOLETE if (CR >= NR_CONTROL_REGISTERS)
1519# OBSOLETE sim_engine_abort (SD, CPU, cia, "FIXME - illegal CR");
1520# OBSOLETE else
1521# OBSOLETE {
1522# OBSOLETE unsigned32 value = Rb;
1523# OBSOLETE CPU->mvtsys_left_p = 1;
1524# OBSOLETE if (CR == processor_status_word_cr)
1525# OBSOLETE {
1526# OBSOLETE unsigned32 ds = PSW & BIT32 (PSW_DS); /* preserve ds */
1527# OBSOLETE value = ds | (value & PSW_VALID);
1528# OBSOLETE }
1529# OBSOLETE else if (CR == backup_processor_status_word_cr
1530# OBSOLETE || CR == debug_backup_processor_status_word_cr)
1531# OBSOLETE value &= DPSW_VALID;
1532# OBSOLETE else if (CR == eit_vector_base_cr)
1533# OBSOLETE value &= EIT_VALID;
1534# OBSOLETE WRITE32_QUEUE (&(CPU)->regs.control[CR], value);
1535# OBSOLETE }
1536# OBSOLETE break;
1537# OBSOLETE case 1: /* PSWL */
1538# OBSOLETE WRITE32_QUEUE_MASK (&PSW, EXTRACTED32(Rb, 16, 31),
1539# OBSOLETE PSW_VALID & 0x0000ffff);
1540# OBSOLETE break;
1541# OBSOLETE case 2: /* PSWH */
1542# OBSOLETE {
1543# OBSOLETE unsigned32 ds = PSW & BIT32 (PSW_DS); /* preserve ds */
1544# OBSOLETE WRITE32_QUEUE_MASK (&PSW, (EXTRACTED32(Rb, 16, 31) << 16) | ds,
1545# OBSOLETE (PSW_VALID | ds) & 0xffff0000);
1546# OBSOLETE }
1547# OBSOLETE break;
1548# OBSOLETE case 3: /* FLAG */
1549# OBSOLETE PSW_FLAG_SET_QUEUE(CR, Rb & 1);
1550# OBSOLETE break;
1551# OBSOLETE default:
1552# OBSOLETE sim_engine_abort (SD, CPU, cia, "FIXME - illegal ID");
1553# OBSOLETE }
1554# OBSOLETE
1555# OBSOLETE
1556# OBSOLETE
1557# OBSOLETE // NOP
1558# OBSOLETE
1559# OBSOLETE _BRA,01111,00,6.**,6.**,6.**:BRA:short:iu,mu:NOP
1560# OBSOLETE "nop"
1561# OBSOLETE /* NOP */;
1562# OBSOLETE
1563# OBSOLETE
1564# OBSOLETE // NOT
1565# OBSOLETE
1566# OBSOLETE _LOGIC,11001,00,6.RA,6.RB,6.*:LOGIC:short:iu,mu:NOT
1567# OBSOLETE "not r<RA>, r<RB>"
1568# OBSOLETE WRITE32_QUEUE (Ra, ~Rb);
1569# OBSOLETE
1570# OBSOLETE
1571# OBSOLETE
1572# OBSOLETE // NOTFG
1573# OBSOLETE
1574# OBSOLETE _LOGIC,01001,00,***,3.FA,***,3.FB,***,3.FC:LOGIC:short:iu,mu:NOTFG
1575# OBSOLETE "notfg f<FA>, f<FB>"
1576# OBSOLETE PSW_FLAG_SET_QUEUE(FA, !PSW_FLAG_VAL(FB));
1577# OBSOLETE
1578# OBSOLETE
1579# OBSOLETE // OR
1580# OBSOLETE
1581# OBSOLETE _LOGIC,11010,00,6.RA,6.RB,6.RC:LOGIC:short:iu,mu:OR
1582# OBSOLETE "or r<RA>, r<RB>, r<RC>"
1583# OBSOLETE WRITE32_QUEUE (Ra, Rb | Rc);
1584# OBSOLETE _LOGIC,11010,10,6.RA,6.RB,_IMM6:LOGIC:short:iu,mu:OR imm
1585# OBSOLETE "or r<RA>, r<RB>, <imm>"
1586# OBSOLETE WRITE32_QUEUE (Ra, Rb | imm);
1587# OBSOLETE _LOGIC,11010,10,6.RA,6.RB,_IMM32:LOGIC:long:iu,mu:OR imm long
1588# OBSOLETE "or r<RA>, r<RB>, <imm>"
1589# OBSOLETE WRITE32_QUEUE (Ra, Rb | imm);
1590# OBSOLETE
1591# OBSOLETE
1592# OBSOLETE
1593# OBSOLETE // ORFG
1594# OBSOLETE
1595# OBSOLETE _LOGIC,01010,00,***,3.FA,***,3.FB,***,3.FC:LOGIC:short:iu,mu:ORFG
1596# OBSOLETE "orfg f<FA>, f<FB>, f<FC>"
1597# OBSOLETE PSW_FLAG_SET_QUEUE(FA, PSW_FLAG_VAL(FB) | PSW_FLAG_VAL(FC));
1598# OBSOLETE _LOGIC,01010,10,***,3.FA,***,3.FB,_IMM6:LOGIC:short:iu,mu:ORFG imm
1599# OBSOLETE "orfg f<FA>, f<FB>, <imm>"
1600# OBSOLETE PSW_FLAG_SET_QUEUE(FA, PSW_FLAG_VAL(FB) | (imm_6 & 1));
1601# OBSOLETE
1602# OBSOLETE
1603# OBSOLETE
1604# OBSOLETE // REIT
1605# OBSOLETE
1606# OBSOLETE _BRA,01000,00,6.**,6.**,6.**:BRA:short:mu:REIT
1607# OBSOLETE "reit"
1608# OBSOLETE WRITE32_QUEUE (&PSW, bPSW);
1609# OBSOLETE nia = bPC;
1610# OBSOLETE
1611# OBSOLETE
1612# OBSOLETE
1613# OBSOLETE
1614# OBSOLETE // REPEAT
1615# OBSOLETE
1616# OBSOLETE void::function::do_repeat:unsigned32 count, address_word pcaddr
1617# OBSOLETE address_word rpt_s = cia + 8;
1618# OBSOLETE address_word rpt_e = cia + pcaddr;
1619# OBSOLETE
1620# OBSOLETE if (count == 0)
1621# OBSOLETE sim_engine_abort (SD, CPU, cia, "REPEAT with ra=0 and REPEATI with imm = 0 is forbidden.");
1622# OBSOLETE if (count > 1)
1623# OBSOLETE PSW_SET_QUEUE (PSW_RP, 1);
1624# OBSOLETE if (rpt_e < rpt_s + 0x10)
1625# OBSOLETE sim_io_eprintf (sd, "warning: 0x%lx: REPEAT or REPEATI loop is too small\n", (long) cia);
1626# OBSOLETE WRITE32_QUEUE (&RPT_C, count - 1);
1627# OBSOLETE WRITE32_QUEUE (&RPT_S, rpt_s);
1628# OBSOLETE WRITE32_QUEUE (&RPT_E, rpt_e);
1629# OBSOLETE
1630# OBSOLETE _BRA,11000,00,6.RA,6.**,6.RC:BRA:short:mu:REPEAT
1631# OBSOLETE "repeat r<RA>, r<RC>"
1632# OBSOLETE do_repeat(_SD, val_Ra, pcaddr);
1633# OBSOLETE _BRA,11000,10,6.RA,_IMM12:BRA:short:mu:REPEAT imm
1634# OBSOLETE "repeat r<RA>, <pcaddr>"
1635# OBSOLETE do_repeat(_SD, val_Ra, pcaddr);
1636# OBSOLETE _BRA,11000,10,6.RA,6.**,_IMM32:BRA:long:mu:REPEAT imm long
1637# OBSOLETE "repeat r<RA>, <pcaddr>"
1638# OBSOLETE do_repeat(_SD, val_Ra, pcaddr);
1639# OBSOLETE
1640# OBSOLETE
1641# OBSOLETE
1642# OBSOLETE
1643# OBSOLETE // REPEATI
1644# OBSOLETE
1645# OBSOLETE _BRA,11010,00,6.IMM_6,6.**,6.RC:BRA:short:mu:REPEATI
1646# OBSOLETE "repeati <IMM_6>, r<RC>"
1647# OBSOLETE do_repeat(_SD, IMM_6, pcaddr);
1648# OBSOLETE _BRA,11010,10,6.IMM_6,_IMM12:BRA:short:mu:REPEATI imm
1649# OBSOLETE "repeati <IMM_6>, <pcaddr>"
1650# OBSOLETE do_repeat(_SD, IMM_6, pcaddr);
1651# OBSOLETE _BRA,11010,10,6.IMM_6,6.**,_IMM32:BRA:long:mu:REPEATI imm long
1652# OBSOLETE "repeati <IMM_6>, <pcaddr>"
1653# OBSOLETE do_repeat(_SD, IMM_6, pcaddr);
1654# OBSOLETE
1655# OBSOLETE
1656# OBSOLETE
1657# OBSOLETE
1658# OBSOLETE // RTD
1659# OBSOLETE
1660# OBSOLETE _BRA,01010,00,6.*,6.*,6.*:BRA:short:mu:RTD
1661# OBSOLETE "rtd"
1662# OBSOLETE WRITE32_QUEUE (&PSW, DPSW);
1663# OBSOLETE nia = DPC;
1664# OBSOLETE
1665# OBSOLETE
1666# OBSOLETE
1667# OBSOLETE
1668# OBSOLETE // ROT
1669# OBSOLETE
1670# OBSOLETE _LOGIC,10100,00,6.RA,6.RB,6.RC:LOGIC:short:iu,mu:ROT
1671# OBSOLETE "rot r<RA>, r<RB>, r<RC>"
1672# OBSOLETE WRITE32_QUEUE (Ra, ROT32(Rb, Rc & 0x1f));
1673# OBSOLETE _LOGIC,10100,10,6.RA,6.RB,_IMM6:LOGIC:short:iu,mu:ROT imm
1674# OBSOLETE "rot r<RA>, r<RB>, <imm>"
1675# OBSOLETE WRITE32_QUEUE (Ra, ROT32(Rb, imm & 0x1f));
1676# OBSOLETE
1677# OBSOLETE
1678# OBSOLETE
1679# OBSOLETE
1680# OBSOLETE // ROT2H
1681# OBSOLETE
1682# OBSOLETE void::function::do_rot2h:unsigned32 *ra, unsigned32 rb, signed32 src
1683# OBSOLETE unsigned16 high = ROTR16(VH2_4(rb), VH2_4(src) & 0xf);
1684# OBSOLETE unsigned16 low = ROTR16(VL2_4(rb), VL2_4(src) & 0xf);
1685# OBSOLETE WRITE32_QUEUE (ra, (high << 16) | low);
1686# OBSOLETE
1687# OBSOLETE _LOGIC,10101,00,6.RA,6.RB,6.RC:LOGIC:short:iu,mu:ROT2H
1688# OBSOLETE "rot2h r<RA>, r<RB>, r<RC>"
1689# OBSOLETE do_rot2h(_SD, Ra, Rb, Rc);
1690# OBSOLETE _LOGIC,10101,10,6.RA,6.RB,_IMM6:LOGIC:short:iu,mu:ROT2H imm
1691# OBSOLETE "rot2h r<RA>, r<RB>, <imm>"
1692# OBSOLETE do_rot2h(_SD, Ra, Rb, immHL);
1693# OBSOLETE
1694# OBSOLETE
1695# OBSOLETE
1696# OBSOLETE
1697# OBSOLETE // SAT
1698# OBSOLETE
1699# OBSOLETE void::function::do_sat:signed32 *ra, signed32 rb, signed32 src
1700# OBSOLETE int bits = LSMASKED32(src, 4, 0); /* 5 */
1701# OBSOLETE signed32 sat = LSMASK32(bits, 0) >> 2;
1702# OBSOLETE signed32 nsat = ~sat;
1703# OBSOLETE signed32 value;
1704# OBSOLETE if (bits != src)
1705# OBSOLETE sim_io_eprintf (sd, "warning: 0x%lx:SAT bit overflow\n", (long) cia);
1706# OBSOLETE if (bits == 0)
1707# OBSOLETE value = rb;
1708# OBSOLETE else if (rb >= sat)
1709# OBSOLETE value = sat;
1710# OBSOLETE else if (rb <= nsat)
1711# OBSOLETE value = nsat;
1712# OBSOLETE else
1713# OBSOLETE value = rb;
1714# OBSOLETE WRITE32_QUEUE (ra, value);
1715# OBSOLETE
1716# OBSOLETE _IALU2,01000,00,6.RA,6.RB,6.RC:IALU2:short:iu:SAT
1717# OBSOLETE "sat r<RA>, r<RB>, r<RC>"
1718# OBSOLETE do_sat(_SD, Ra, Rb, Rc);
1719# OBSOLETE _IALU2,01000,10,6.RA,6.RB,_IMM6:IALU2:short:iu:SAT imm
1720# OBSOLETE "sat r<RA>, r<RB>, <imm>"
1721# OBSOLETE do_sat(_SD, Ra, Rb, imm_5);
1722# OBSOLETE
1723# OBSOLETE
1724# OBSOLETE
1725# OBSOLETE
1726# OBSOLETE // SAT2H
1727# OBSOLETE
1728# OBSOLETE void::function::do_sath:signed32 *ra, signed32 rb, signed32 src, int high, int updates_f4
1729# OBSOLETE int bits = LSMASKED32(src, 4, 0); /* 5 */
1730# OBSOLETE signed32 sat = LSMASK32(bits, 0) >> 2;
1731# OBSOLETE signed32 nsat = ~sat;
1732# OBSOLETE signed32 value;
1733# OBSOLETE if (bits != src)
1734# OBSOLETE sim_io_eprintf (sd, "warning: 0x%lx:SAT bit overflow\n", (long) cia);
1735# OBSOLETE if (bits == 0)
1736# OBSOLETE value = rb;
1737# OBSOLETE else if (rb >= sat)
1738# OBSOLETE value = sat;
1739# OBSOLETE else if (rb <= nsat)
1740# OBSOLETE value = nsat;
1741# OBSOLETE else
1742# OBSOLETE value = rb;
1743# OBSOLETE if (high)
1744# OBSOLETE WRITE32_QUEUE_MASK (ra, value << 16, 0xffff0000);
1745# OBSOLETE else
1746# OBSOLETE WRITE32_QUEUE_MASK (ra, value, 0x0000ffff);
1747# OBSOLETE if (updates_f4)
1748# OBSOLETE {
1749# OBSOLETE /* if MU instruction was a MVTSYS (lkr), unqueue register writes now */
1750# OBSOLETE if(STATE_CPU (sd, 0)->mvtsys_left_p)
1751# OBSOLETE unqueue_writes (sd, STATE_CPU (sd, 0), cia);
1752# OBSOLETE PSW_FLAG_SET_QUEUE(PSW_S_FLAG, PSW_FLAG_VAL(PSW_S_FLAG) ^ (value & 1));
1753# OBSOLETE }
1754# OBSOLETE
1755# OBSOLETE _IALU2,01001,00,6.RA,6.RB,6.RC:IALU2:short:iu:SAT2H
1756# OBSOLETE "sat2h r<RA>, r<RB>, r<RC>"
1757# OBSOLETE do_sath(_SD, Ra, RbH, RcH, 1, 0);
1758# OBSOLETE do_sath(_SD, Ra, RbL, RcL, 0, 0);
1759# OBSOLETE _IALU2,01001,10,6.RA,6.RB,_IMM6:IALU2:short:iu:SAT2H imm
1760# OBSOLETE "sat2h r<RA>, r<RB>, <imm>"
1761# OBSOLETE do_sath(_SD, Ra, RbH, imm_5, 1, 0);
1762# OBSOLETE do_sath(_SD, Ra, RbL, imm_5, 0, 0);
1763# OBSOLETE
1764# OBSOLETE
1765# OBSOLETE
1766# OBSOLETE
1767# OBSOLETE // SATHp
1768# OBSOLETE
1769# OBSOLETE ::%s::p:int p
1770# OBSOLETE switch (p)
1771# OBSOLETE {
1772# OBSOLETE case 0: return "l";
1773# OBSOLETE case 1: return "h";
1774# OBSOLETE default: return "?";
1775# OBSOLETE }
1776# OBSOLETE
1777# OBSOLETE _IALU2,1110,p,00,6.RA,6.RB,6.RC:IALU2:short:iu:SATHP
1778# OBSOLETE "sath%s<p> r<RA>, r<RB>, r<RC>"
1779# OBSOLETE do_sath(_SD, Ra, Rb, Rc, p, 1);
1780# OBSOLETE _IALU2,1110,p,10,6.RA,6.RB,_IMM6:IALU2:short:iu:SATHP imm
1781# OBSOLETE "sath%s<p> r<RA>, r<RB>, <imm>"
1782# OBSOLETE do_sath(_SD, Ra, Rb, imm_5, p, 1);
1783# OBSOLETE
1784# OBSOLETE
1785# OBSOLETE
1786# OBSOLETE // SATZ
1787# OBSOLETE
1788# OBSOLETE void::function::do_satz:signed32 *ra, signed32 rb, signed32 src
1789# OBSOLETE if (rb < 0)
1790# OBSOLETE WRITE32_QUEUE (ra, 0);
1791# OBSOLETE else
1792# OBSOLETE do_sat (_SD, ra, rb, src);
1793# OBSOLETE
1794# OBSOLETE _IALU2,01010,00,6.RA,6.RB,6.RC:IALU2:short:iu:SATZ
1795# OBSOLETE "satz r<RA>, r<RB>, r<RC>"
1796# OBSOLETE do_satz(_SD, Ra, Rb, Rc);
1797# OBSOLETE _IALU2,01010,10,6.RA,6.RB,_IMM6:IALU2:short:iu:SATZ imm
1798# OBSOLETE "satz r<RA>, r<RB>, <imm>"
1799# OBSOLETE do_satz(_SD, Ra, Rb, imm_5);
1800# OBSOLETE
1801# OBSOLETE
1802# OBSOLETE
1803# OBSOLETE
1804# OBSOLETE // SATZ2H
1805# OBSOLETE
1806# OBSOLETE void::function::do_satzh:signed32 *ra, signed16 rb, signed32 src, int high
1807# OBSOLETE int bits = LSMASKED32(src, 3, 0); /*4*/
1808# OBSOLETE signed16 sat = LSMASK16(bits, 0) >> 2;
1809# OBSOLETE signed16 nsat = 0;
1810# OBSOLETE signed16 value;
1811# OBSOLETE if (bits != src)
1812# OBSOLETE sim_io_eprintf (sd, "warning: 0x%lx:SATZ2H bit overflow\n", (long) cia);
1813# OBSOLETE if (bits == 0 && rb > sat)
1814# OBSOLETE value = rb;
1815# OBSOLETE else if (rb > sat)
1816# OBSOLETE value = sat;
1817# OBSOLETE else if (rb < nsat)
1818# OBSOLETE value = nsat;
1819# OBSOLETE else
1820# OBSOLETE value = rb;
1821# OBSOLETE if (high)
1822# OBSOLETE WRITE32_QUEUE_MASK (ra, value << 16, 0xffff0000);
1823# OBSOLETE else
1824# OBSOLETE WRITE32_QUEUE_MASK (ra, value, 0x0000ffff);
1825# OBSOLETE
1826# OBSOLETE
1827# OBSOLETE _IALU2,01011,00,6.RA,6.RB,6.RC:IALU2:short:iu:SATZ2H
1828# OBSOLETE "satz2h r<RA>, r<RB>, r<RC>"
1829# OBSOLETE do_satzh(_SD, Ra, RbH, RcH, 1);
1830# OBSOLETE do_satzh(_SD, Ra, RbL, RcL, 0);
1831# OBSOLETE _IALU2,01011,10,6.RA,6.RB,_IMM6:IALU2:short:iu:SATZ2H imm
1832# OBSOLETE "satz2h r<RA>, r<RB>, <imm>"
1833# OBSOLETE do_satzh(_SD, Ra, RbH, imm, 1);
1834# OBSOLETE do_satzh(_SD, Ra, RbL, imm, 0);
1835# OBSOLETE
1836# OBSOLETE
1837# OBSOLETE
1838# OBSOLETE
1839# OBSOLETE // SRA
1840# OBSOLETE
1841# OBSOLETE void::function::do_sra:unsigned32 *ra, unsigned32 rb, signed32 src
1842# OBSOLETE unsigned32 value;
1843# OBSOLETE while (src > 31) src -= 32;
1844# OBSOLETE while (src < -32) src += 32;
1845# OBSOLETE if (src >= 0)
1846# OBSOLETE value = (signed32)rb >> src;
1847# OBSOLETE else if (src == -32)
1848# OBSOLETE value = 0;
1849# OBSOLETE else
1850# OBSOLETE value = rb << -src;
1851# OBSOLETE WRITE32_QUEUE (ra, value);
1852# OBSOLETE
1853# OBSOLETE _LOGIC,10000,00,6.RA,6.RB,6.RC:LOGIC:short:iu,mu:SRA
1854# OBSOLETE "sra r<RA>, r<RB>, r<RC>"
1855# OBSOLETE do_sra(_SD, Ra, Rb, Rc);
1856# OBSOLETE _LOGIC,10000,10,6.RA,6.RB,_IMM6:LOGIC:short:iu,mu:SRA imm
1857# OBSOLETE "sra r<RA>, r<RB>, <imm>"
1858# OBSOLETE do_sra(_SD, Ra, Rb, imm);
1859# OBSOLETE
1860# OBSOLETE
1861# OBSOLETE
1862# OBSOLETE
1863# OBSOLETE // SRAHp
1864# OBSOLETE
1865# OBSOLETE void::function::do_srah:unsigned32 *ra, unsigned32 rb, int src, int high
1866# OBSOLETE unsigned32 value;
1867# OBSOLETE while (src > 31) src -= 32;
1868# OBSOLETE while (src < -32) src += 32;
1869# OBSOLETE if (src >= 0)
1870# OBSOLETE value = (signed32)rb >> src;
1871# OBSOLETE else if (src == -32)
1872# OBSOLETE value = 0;
1873# OBSOLETE else
1874# OBSOLETE value = rb << -src;
1875# OBSOLETE if (high)
1876# OBSOLETE WRITE32_QUEUE_MASK (ra, value << 16, 0xffff0000);
1877# OBSOLETE else
1878# OBSOLETE WRITE32_QUEUE_MASK (ra, value, 0x0000ffff);
1879# OBSOLETE
1880# OBSOLETE _LOGIC,0010,p,00,6.RA,6.RB,6.RC:LOGIC:short:iu,mu:SRAHP
1881# OBSOLETE "srah%s<p> r<RA>, r<RB>, r<RC>"
1882# OBSOLETE do_srah(_SD, Ra, Rb, Rc, p);
1883# OBSOLETE _LOGIC,0010,p,10,6.RA,6.RB,_IMM6:LOGIC:short:iu,mu:SRAHP imm
1884# OBSOLETE "srah%s<p> r<RA>, r<RB>, <imm>"
1885# OBSOLETE do_srah(_SD, Ra, Rb, imm, p);
1886# OBSOLETE
1887# OBSOLETE
1888# OBSOLETE
1889# OBSOLETE
1890# OBSOLETE // SRA2H
1891# OBSOLETE
1892# OBSOLETE _LOGIC,10001,00,6.RA,6.RB,6.RC:LOGIC:short:iu,mu:SRA2H
1893# OBSOLETE "sra2h r<RA>, r<RB>, r<RC>"
1894# OBSOLETE signed32 srcH = RcH;
1895# OBSOLETE signed32 srcL = RcL;
1896# OBSOLETE while (srcH > 15) srcH -= 16;
1897# OBSOLETE while (srcH < -16) srcH += 16;
1898# OBSOLETE while (srcL > 15) srcL -= 16;
1899# OBSOLETE while (srcL < -16) srcL += 16;
1900# OBSOLETE do_srah(_SD, Ra, RbH, srcH, 1);
1901# OBSOLETE do_srah(_SD, Ra, RbL, srcL, 0);
1902# OBSOLETE _LOGIC,10001,10,6.RA,6.RB,_IMM6:LOGIC:short:iu,mu:SRA2H imm
1903# OBSOLETE "sra2h r<RA>, r<RB>, <imm>"
1904# OBSOLETE signed32 src = imm;
1905# OBSOLETE while (src > 15) src -= 16;
1906# OBSOLETE while (src < -16) src += 16;
1907# OBSOLETE do_srah(_SD, Ra, RbH, src, 1);
1908# OBSOLETE do_srah(_SD, Ra, RbL, src, 0);
1909# OBSOLETE
1910# OBSOLETE
1911# OBSOLETE
1912# OBSOLETE
1913# OBSOLETE // SRC
1914# OBSOLETE
1915# OBSOLETE void::function::do_src:unsigned32 *ra, unsigned32 rb, int src
1916# OBSOLETE unsigned32 value;
1917# OBSOLETE unsigned64 operand;
1918# OBSOLETE unsigned64 shifted;
1919# OBSOLETE while (src > 31) src -= 32;
1920# OBSOLETE while (src < -32) src += 32;
1921# OBSOLETE if (src >= 0)
1922# OBSOLETE {
1923# OBSOLETE operand = (INSERTED64(rb, 0, 31) | INSERTED64(*ra, 32, 63));
1924# OBSOLETE shifted = operand >> src;
1925# OBSOLETE value = EXTRACTED64(shifted, 32, 63);
1926# OBSOLETE }
1927# OBSOLETE else
1928# OBSOLETE {
1929# OBSOLETE operand = (INSERTED64(*ra, 0, 31) | INSERTED64(rb, 32, 63));
1930# OBSOLETE shifted = operand << -src;
1931# OBSOLETE value = EXTRACTED64(shifted, 0, 31);
1932# OBSOLETE }
1933# OBSOLETE WRITE32_QUEUE (ra, value);
1934# OBSOLETE
1935# OBSOLETE _LOGIC,10110,00,6.RA,6.RB,6.RC:LOGIC:short:iu,mu:SRC
1936# OBSOLETE "src r<RA>, r<RB>, r<RC>"
1937# OBSOLETE do_src(_SD, Ra, Rb, Rc);
1938# OBSOLETE _LOGIC,10110,10,6.RA,6.RB,_IMM6:LOGIC:short:iu,mu:SRC imm
1939# OBSOLETE "src r<RA>, r<RB>, <imm>"
1940# OBSOLETE do_src(_SD, Ra, Rb, imm);
1941# OBSOLETE
1942# OBSOLETE
1943# OBSOLETE
1944# OBSOLETE
1945# OBSOLETE // SRL
1946# OBSOLETE
1947# OBSOLETE void::function::do_srl:unsigned32 *ra, unsigned32 rb, int src
1948# OBSOLETE unsigned32 value;
1949# OBSOLETE while (src > 31) src -= 32;
1950# OBSOLETE while (src < -32) src += 32;
1951# OBSOLETE if (src >= 0)
1952# OBSOLETE value = (unsigned32)rb >> src;
1953# OBSOLETE else if (src == -32)
1954# OBSOLETE value = 0;
1955# OBSOLETE else
1956# OBSOLETE value = (unsigned32)rb << -src;
1957# OBSOLETE WRITE32_QUEUE (ra, value);
1958# OBSOLETE
1959# OBSOLETE _LOGIC,10010,00,6.RA,6.RB,6.RC:LOGIC:short:iu,mu:SRL
1960# OBSOLETE "srl r<RA>, r<RB>, r<RC>"
1961# OBSOLETE do_srl(_SD, Ra, Rb, Rc);
1962# OBSOLETE _LOGIC,10010,10,6.RA,6.RB,_IMM6:LOGIC:short:iu,mu:SRL imm
1963# OBSOLETE "srl r<RA>, r<RB>, <imm>"
1964# OBSOLETE do_srl(_SD, Ra, Rb, imm);
1965# OBSOLETE
1966# OBSOLETE
1967# OBSOLETE
1968# OBSOLETE
1969# OBSOLETE // SRLHp
1970# OBSOLETE
1971# OBSOLETE void::function::do_srlh:unsigned32 *ra, unsigned32 rb, int src, int high
1972# OBSOLETE unsigned32 value;
1973# OBSOLETE while (src > 31) src -= 32;
1974# OBSOLETE while (src < -32) src += 32;
1975# OBSOLETE if (src >= 0)
1976# OBSOLETE value = rb >> src;
1977# OBSOLETE else if (src == -32)
1978# OBSOLETE value = 0;
1979# OBSOLETE else
1980# OBSOLETE value = rb << -src;
1981# OBSOLETE if (high)
1982# OBSOLETE WRITE32_QUEUE_MASK (ra, value << 16, 0xffff0000);
1983# OBSOLETE else
1984# OBSOLETE WRITE32_QUEUE_MASK (ra, value, 0x0000ffff);
1985# OBSOLETE
1986# OBSOLETE _LOGIC,0011,p,00,6.RA,6.RB,6.RC:LOGIC:short:iu,mu:SRLHP
1987# OBSOLETE "srlh%s<p> r<RA>, r<RB>, r<RC>"
1988# OBSOLETE do_srlh(_SD, Ra, Rb, Rc, p);
1989# OBSOLETE _LOGIC,0011,p,10,6.RA,6.RB,_IMM6:LOGIC:short:iu,mu:SRLHP imm
1990# OBSOLETE "srlh%s<p> r<RA>, r<RB>, <imm>"
1991# OBSOLETE do_srlh(_SD, Ra, Rb, imm, p);
1992# OBSOLETE
1993# OBSOLETE
1994# OBSOLETE // SRL2H
1995# OBSOLETE
1996# OBSOLETE _LOGIC,10011,00,6.RA,6.RB,6.RC:LOGIC:short:iu,mu:SRL2H
1997# OBSOLETE "srl2h r<RA>, r<RB>, r<RC>"
1998# OBSOLETE signed32 srcH = RcH;
1999# OBSOLETE signed32 srcL = RcL;
2000# OBSOLETE while (srcH > 15) srcH -= 16;
2001# OBSOLETE while (srcH < -16) srcH += 16;
2002# OBSOLETE while (srcL > 15) srcL -= 16;
2003# OBSOLETE while (srcL < -16) srcL += 16;
2004# OBSOLETE do_srlh(_SD, Ra, RbHU, srcH, 1);
2005# OBSOLETE do_srlh(_SD, Ra, RbLU, srcL, 0);
2006# OBSOLETE _LOGIC,10011,10,6.RA,6.RB,_IMM6:LOGIC:short:iu,mu:SRL2H imm
2007# OBSOLETE "srl2h r<RA>, r<RB>, <imm>"
2008# OBSOLETE signed32 src = imm;
2009# OBSOLETE while (src > 15) src -= 16;
2010# OBSOLETE while (src < -16) src += 16;
2011# OBSOLETE do_srlh(_SD, Ra, RbHU, src, 1);
2012# OBSOLETE do_srlh(_SD, Ra, RbLU, src, 0);
2013# OBSOLETE
2014# OBSOLETE
2015# OBSOLETE
2016# OBSOLETE
2017# OBSOLETE // ST2H
2018# OBSOLETE
2019# OBSOLETE void::function::get_even_reg:int *reg, unsigned32 *r0, const char *name
2020# OBSOLETE if (*reg & 1)
2021# OBSOLETE sim_engine_abort (SD, CPU, cia,
2022# OBSOLETE "0x%lx:%s odd register (r%d) used in multi-word store",
2023# OBSOLETE (long) cia, name, *reg);
2024# OBSOLETE if (*reg == 0)
2025# OBSOLETE *r0 = 0;
2026# OBSOLETE else
2027# OBSOLETE *r0 = GPR[*reg];
2028# OBSOLETE
2029# OBSOLETE void::function::do_st2h:int ra, unsigned32 rb, unsigned32 src
2030# OBSOLETE unsigned32 val_ra;
2031# OBSOLETE unsigned32 mem;
2032# OBSOLETE get_even_reg(_SD, &ra, &val_ra, "ST2H");
2033# OBSOLETE mem = INSERTED32(val_ra, 0, 15) |
2034# OBSOLETE INSERTED32(GPR[ra + 1], 16, 31);
2035# OBSOLETE STORE(rb + src, 4, mem);
2036# OBSOLETE
2037# OBSOLETE _IMEM,10011,XX,6.RA,6.RB,6.SRC_6:IMEM:short:mu:ST2H
2038# OBSOLETE "st2h r<RA>, @(r<RB>, <SRC_6>)":XX == 0
2039# OBSOLETE "st2h r<RA>, @(r<RB>%s<XX>, r<SRC_6>)"
2040# OBSOLETE do_st2h(_SD, RA, Rb, src);
2041# OBSOLETE do_incr(_SD, XX, &GPR[RB], 4);
2042# OBSOLETE _IMEM,10011,10,6.RA,6.RB,_IMM32:IMEM:long:mu:ST2H long
2043# OBSOLETE "st2h r<RA>, @(r<RB>, <imm>)"
2044# OBSOLETE do_st2h(_SD, RA, Rb, imm);
2045# OBSOLETE
2046# OBSOLETE
2047# OBSOLETE
2048# OBSOLETE // ST2W
2049# OBSOLETE
2050# OBSOLETE void::function::do_st2w:int ra, unsigned32 rb, unsigned32 src
2051# OBSOLETE unsigned32 val_ra;
2052# OBSOLETE unsigned64 mem;
2053# OBSOLETE get_even_reg(_SD, &ra, &val_ra, "ST2W");
2054# OBSOLETE mem = INSERTED64(val_ra, 0, 31) | INSERTED64(GPR[ra + 1], 32, 63);
2055# OBSOLETE STORE(rb + src, 8, mem);
2056# OBSOLETE
2057# OBSOLETE _IMEM,10110,XX,6.RA,6.RB,6.SRC_6:IMEM:short:mu:ST2W
2058# OBSOLETE "st2w r<RA>, @(r<RB>, <SRC_6>)":XX == 0
2059# OBSOLETE "st2w r<RA>, @(r<RB>%s<XX>, r<SRC_6>)"
2060# OBSOLETE do_st2w(_SD, RA, Rb, src);
2061# OBSOLETE do_incr(_SD, XX, &GPR[RB], 8);
2062# OBSOLETE _IMEM,10110,10,6.RA,6.RB,_IMM32:IMEM:long:mu:ST2W long
2063# OBSOLETE "st2w r<RA>, @(r<RB>, <imm>)"
2064# OBSOLETE do_st2w(_SD, RA, Rb, imm);
2065# OBSOLETE
2066# OBSOLETE
2067# OBSOLETE
2068# OBSOLETE // ST4HB
2069# OBSOLETE
2070# OBSOLETE void::function::do_st4hb:int ra, unsigned32 rb, unsigned32 src
2071# OBSOLETE unsigned32 val_ra;
2072# OBSOLETE unsigned32 mem;
2073# OBSOLETE get_even_reg(_SD, &ra, &val_ra, "ST4HB");
2074# OBSOLETE mem = INSERTED32(EXTRACTED32(val_ra, 8, 15), 0, 7) |
2075# OBSOLETE INSERTED32(EXTRACTED32(val_ra, 24, 31), 8, 15) |
2076# OBSOLETE INSERTED32(EXTRACTED32(GPR[ra + 1], 8, 15), 16, 23) |
2077# OBSOLETE INSERTED32(EXTRACTED32(GPR[ra + 1], 24, 31), 24, 31);
2078# OBSOLETE STORE(rb + src, 4, mem);
2079# OBSOLETE
2080# OBSOLETE _IMEM,10101,XX,6.RA,6.RB,6.SRC_6:IMEM:short:mu:ST4HB
2081# OBSOLETE "st4hb r<RA>, @(r<RB>, <SRC_6>)":XX == 0
2082# OBSOLETE "st4hb r<RA>, @(r<RB>%s<XX>, r<SRC_6>)"
2083# OBSOLETE do_st4hb(_SD, RA, Rb, src);
2084# OBSOLETE do_incr(_SD, XX, &GPR[RB], 4);
2085# OBSOLETE _IMEM,10101,10,6.RA,6.RB,_IMM32:IMEM:long:mu:ST4HB long
2086# OBSOLETE "st4hb r<RA>, @(r<RB>, <imm>)"
2087# OBSOLETE do_st4hb(_SD, RA, Rb, imm);
2088# OBSOLETE
2089# OBSOLETE
2090# OBSOLETE
2091# OBSOLETE // STB
2092# OBSOLETE
2093# OBSOLETE void::function::do_stb:unsigned32 ra, unsigned32 rb, unsigned32 src
2094# OBSOLETE STORE(rb + src, 1, EXTRACTED32(ra, 24, 31));
2095# OBSOLETE
2096# OBSOLETE _IMEM,10000,XX,6.RA,6.RB,6.SRC_6:IMEM:short:mu:STB
2097# OBSOLETE "stb r<RA>, @(r<RB>, <SRC_6>)":XX == 0
2098# OBSOLETE "stb r<RA>, @(r<RB>%s<XX>, r<SRC_6>)"
2099# OBSOLETE do_stb(_SD, val_Ra, Rb, src);
2100# OBSOLETE do_incr(_SD, XX, &GPR[RB], 1);
2101# OBSOLETE _IMEM,10000,10,6.RA,6.RB,_IMM32:IMEM:long:mu:STB long
2102# OBSOLETE "stb r<RA>, @(r<RB>, <imm>)"
2103# OBSOLETE do_stb(_SD, val_Ra, Rb, imm);
2104# OBSOLETE
2105# OBSOLETE
2106# OBSOLETE
2107# OBSOLETE // STH
2108# OBSOLETE
2109# OBSOLETE void::function::do_sth:unsigned32 ra, unsigned32 rb, unsigned32 src
2110# OBSOLETE STORE(rb + src, 2, EXTRACTED32(ra, 16, 31));
2111# OBSOLETE
2112# OBSOLETE _IMEM,10010,XX,6.RA,6.RB,6.SRC_6:IMEM:short:mu:STH
2113# OBSOLETE "sth r<RA>, @(r<RB>, <SRC_6>)":XX == 0
2114# OBSOLETE "sth r<RA>, @(r<RB>%s<XX>, r<SRC_6>)"
2115# OBSOLETE do_sth(_SD, val_Ra, Rb, src);
2116# OBSOLETE do_incr(_SD, XX, &GPR[RB], 2);
2117# OBSOLETE _IMEM,10010,10,6.RA,6.RB,_IMM32:IMEM:long:mu:STH long
2118# OBSOLETE "sth r<RA>, @(r<RB>, <imm>)"
2119# OBSOLETE do_sth(_SD, val_Ra, Rb, imm);
2120# OBSOLETE
2121# OBSOLETE
2122# OBSOLETE
2123# OBSOLETE // STHH
2124# OBSOLETE
2125# OBSOLETE void::function::do_sthh:unsigned32 ra, unsigned32 rb, unsigned32 src
2126# OBSOLETE STORE(rb + src, 2, EXTRACTED32(ra, 0, 15));
2127# OBSOLETE
2128# OBSOLETE _IMEM,10001,XX,6.RA,6.RB,6.SRC_6:IMEM:short:mu:STHH
2129# OBSOLETE "sthh r<RA>, @(r<RB>, <SRC_6>)":XX == 0
2130# OBSOLETE "sthh r<RA>, @(r<RB>%s<XX>, r<SRC_6>)"
2131# OBSOLETE do_sthh(_SD, val_Ra, Rb, src);
2132# OBSOLETE do_incr(_SD, XX, &GPR[RB], 2);
2133# OBSOLETE _IMEM,10001,10,6.RA,6.RB,_IMM32:IMEM:long:mu:STHH long
2134# OBSOLETE "sthh r<RA>, @(r<RB>, <imm>)"
2135# OBSOLETE do_sthh(_SD, val_Ra, Rb, imm);
2136# OBSOLETE
2137# OBSOLETE
2138# OBSOLETE
2139# OBSOLETE // STW
2140# OBSOLETE
2141# OBSOLETE void::function::do_stw:unsigned32 ra, unsigned32 rb, unsigned32 src
2142# OBSOLETE STORE(rb + src, 4, ra);
2143# OBSOLETE
2144# OBSOLETE _IMEM,10100,XX,6.RA,6.RB,6.SRC_6:IMEM:short:mu:STW
2145# OBSOLETE "stw r<RA>, @(r<RB>, <SRC_6>)":XX == 0
2146# OBSOLETE "stw r<RA>, @(r<RB>%s<XX>, r<SRC_6>)"
2147# OBSOLETE do_stw(_SD, val_Ra, Rb, src);
2148# OBSOLETE do_incr(_SD, XX, &GPR[RB], 4);
2149# OBSOLETE _IMEM,10100,10,6.RA,6.RB,_IMM32:IMEM:long:mu:STW long
2150# OBSOLETE "stw r<RA>, @(r<RB>, <imm>)"
2151# OBSOLETE do_stw(_SD, val_Ra, Rb, imm);
2152# OBSOLETE
2153# OBSOLETE
2154# OBSOLETE
2155# OBSOLETE // SUB
2156# OBSOLETE
2157# OBSOLETE void::function::do_sub:unsigned32 *ra, unsigned32 rb, unsigned32 imm
2158# OBSOLETE ALU_BEGIN(rb);
2159# OBSOLETE ALU_SUBB(imm);
2160# OBSOLETE ALU_END(ra);
2161# OBSOLETE
2162# OBSOLETE _IALU1,00010,00,6.RA,6.RB,6.RC:IALU1:short:iu,mu:SUB
2163# OBSOLETE "sub r<RA>, r<RB>, r<RC>"
2164# OBSOLETE do_sub (_SD, Ra, Rb, Rc);
2165# OBSOLETE _IALU1,00010,10,6.RA,6.RB,_IMM6:IALU1:short:iu,mu:SUB imm
2166# OBSOLETE "sub r<RA>, r<RB>, <imm>"
2167# OBSOLETE do_sub (_SD, Ra, Rb, imm);
2168# OBSOLETE _IALU1,00010,10,6.RA,6.RB,_IMM32:IALU1:long:iu,mu:SUB imm long
2169# OBSOLETE "sub r<RA>, r<RB>, <imm>"
2170# OBSOLETE do_sub (_SD, Ra, Rb, imm);
2171# OBSOLETE
2172# OBSOLETE
2173# OBSOLETE
2174# OBSOLETE // SUB2H
2175# OBSOLETE
2176# OBSOLETE void::function::do_sub2h:unsigned32 *ra, unsigned32 rb, unsigned32 imm
2177# OBSOLETE unsigned16 high = VH2_4(rb) - VH2_4(imm);
2178# OBSOLETE unsigned16 low = VL2_4(rb) - VL2_4(imm);
2179# OBSOLETE WRITE32_QUEUE (ra, (high << 16) | low);
2180# OBSOLETE
2181# OBSOLETE _IALU1,00011,00,6.RA,6.RB,6.RC:IALU1:short:iu,mu:SUB2H
2182# OBSOLETE "sub2h r<RA>, r<RB>, r<RC>"
2183# OBSOLETE do_sub2h (_SD, Ra, Rb, Rc);
2184# OBSOLETE _IALU1,00011,10,6.RA,6.RB,_IMM6:IALU1:short:iu,mu:SUB2H imm
2185# OBSOLETE "sub2h r<RA>, r<RB>, <imm>"
2186# OBSOLETE do_sub2h (_SD, Ra, Rb, immHL);
2187# OBSOLETE _IALU1,00011,10,6.RA,6.RB,_IMM32:IALU1:long:iu,mu:SUB2H imm long
2188# OBSOLETE "sub2h r<RA>, r<RB>, <imm>"
2189# OBSOLETE do_sub2h (_SD, Ra, Rb, imm);
2190# OBSOLETE
2191# OBSOLETE
2192# OBSOLETE
2193# OBSOLETE // SUBB
2194# OBSOLETE
2195# OBSOLETE void::function::do_subb:unsigned32 *ra, unsigned32 rb, unsigned32 imm
2196# OBSOLETE ALU_BEGIN(rb);
2197# OBSOLETE ALU_SUBB_B(imm, ALU_CARRY);
2198# OBSOLETE ALU_END(ra);
2199# OBSOLETE
2200# OBSOLETE _IALU1,00101,00,6.RA,6.RB,6.RC:IALU1:short:iu,mu:SUBB
2201# OBSOLETE "subb r<RA>, r<RB>, r<RC>"
2202# OBSOLETE do_subb (_SD, Ra, Rb, Rc);
2203# OBSOLETE _IALU1,00101,10,6.RA,6.RB,_IMM6:IALU1:short:iu,mu:SUBB imm
2204# OBSOLETE "subb r<RA>, r<RB>, <imm>"
2205# OBSOLETE do_subb (_SD, Ra, Rb, imm);
2206# OBSOLETE _IALU1,00101,10,6.RA,6.RB,_IMM32:IALU1:long:iu,mu:SUBB imm long
2207# OBSOLETE "subb r<RA>, r<RB>, <imm>"
2208# OBSOLETE do_subb (_SD, Ra, Rb, imm);
2209# OBSOLETE
2210# OBSOLETE
2211# OBSOLETE
2212# OBSOLETE // SUBHppp
2213# OBSOLETE
2214# OBSOLETE void::function::do_subh_ppp:int ppp, unsigned32 *ra, unsigned32 rb, unsigned32 src
2215# OBSOLETE switch (ppp) {
2216# OBSOLETE case 0x0: /* LLL */
2217# OBSOLETE {
2218# OBSOLETE ALU16_BEGIN(VL2_4(rb));
2219# OBSOLETE ALU16_SUBB(VL2_4(src));
2220# OBSOLETE ALU16_END(ra, 0);
2221# OBSOLETE }
2222# OBSOLETE break;
2223# OBSOLETE case 0x1: /* LLH */
2224# OBSOLETE {
2225# OBSOLETE ALU16_BEGIN(VL2_4(rb));
2226# OBSOLETE ALU16_SUBB(VH2_4(src));
2227# OBSOLETE ALU16_END(ra, 0);
2228# OBSOLETE }
2229# OBSOLETE break;
2230# OBSOLETE case 0x2: /* LHL */
2231# OBSOLETE {
2232# OBSOLETE ALU16_BEGIN(VH2_4(rb));
2233# OBSOLETE ALU16_SUBB(VL2_4(src));
2234# OBSOLETE ALU16_END(ra, 0);
2235# OBSOLETE }
2236# OBSOLETE break;
2237# OBSOLETE case 0x3: /* LHH */
2238# OBSOLETE {
2239# OBSOLETE ALU16_BEGIN(VH2_4(rb));
2240# OBSOLETE ALU16_SUBB(VH2_4(src));
2241# OBSOLETE ALU16_END(ra, 0);
2242# OBSOLETE }
2243# OBSOLETE break;
2244# OBSOLETE case 0x4: /* HLL */
2245# OBSOLETE {
2246# OBSOLETE ALU16_BEGIN(VL2_4(rb));
2247# OBSOLETE ALU16_SUBB(VL2_4(src));
2248# OBSOLETE ALU16_END(ra, 1);
2249# OBSOLETE }
2250# OBSOLETE break;
2251# OBSOLETE case 0x5: /* HLH */
2252# OBSOLETE {
2253# OBSOLETE ALU16_BEGIN(VL2_4(rb));
2254# OBSOLETE ALU16_SUBB(VH2_4(src));
2255# OBSOLETE ALU16_END(ra, 1);
2256# OBSOLETE }
2257# OBSOLETE break;
2258# OBSOLETE case 0x6: /* HHL */
2259# OBSOLETE {
2260# OBSOLETE ALU16_BEGIN(VH2_4(rb));
2261# OBSOLETE ALU16_SUBB(VL2_4(src));
2262# OBSOLETE ALU16_END(ra, 1);
2263# OBSOLETE }
2264# OBSOLETE break;
2265# OBSOLETE case 0x7: /* HHH */
2266# OBSOLETE {
2267# OBSOLETE ALU16_BEGIN(VH2_4(rb));
2268# OBSOLETE ALU16_SUBB(VH2_4(src));
2269# OBSOLETE ALU16_END(ra, 1);
2270# OBSOLETE }
2271# OBSOLETE break;
2272# OBSOLETE default:
2273# OBSOLETE sim_engine_abort (SD, CPU, cia, "do_subh_ppp - internal error - bad switch");
2274# OBSOLETE }
2275# OBSOLETE
2276# OBSOLETE _IALU1,11,ppp,00,6.RA,6.RB,6.RC:IALU1:short:iu,mu:SUBHppp
2277# OBSOLETE "subh%s<ppp> r<RA>, r<RB>, r<RC>"
2278# OBSOLETE do_subh_ppp(_SD, ppp, Ra, Rb, Rc);
2279# OBSOLETE _IALU1,11,ppp,10,6.RA,6.RB,_IMM6:IALU1:short:iu,mu:SUBHppp imm
2280# OBSOLETE "subh%s<ppp> r<RA>, r<RB>, <imm>"
2281# OBSOLETE do_subh_ppp(_SD, ppp, Ra, Rb, immHL);
2282# OBSOLETE _IALU1,11,ppp,10,6.RA,6.RB,_IMM32:IALU1:long:iu,mu:SUBHppp imm long
2283# OBSOLETE "subh%s<ppp> r<RA>, r<RB>, <imm>"
2284# OBSOLETE do_subh_ppp(_SD, ppp, Ra, Rb, imm);
2285# OBSOLETE
2286# OBSOLETE
2287# OBSOLETE
2288# OBSOLETE // TRAP
2289# OBSOLETE
2290# OBSOLETE address_word::function::do_trap:address_word trap_vector, address_word nia
2291# OBSOLETE /* Steal trap 31 for doing system calls */
2292# OBSOLETE /* System calls are defined in libgloss/d30v/syscall.h. */
2293# OBSOLETE if (trap_vector == EIT_VB + 0x20 + (31 << 3))
2294# OBSOLETE {
2295# OBSOLETE enum { PARM1 = 2, PARM2, PARM3, PARM4, FUNC };
2296# OBSOLETE if (GPR[FUNC] == 1) /* exit */
2297# OBSOLETE {
2298# OBSOLETE sim_engine_halt (sd, STATE_CPU (sd, 0), NULL, cia, sim_exited,
2299# OBSOLETE GPR[PARM1]);
2300# OBSOLETE return -1; /* dummy */
2301# OBSOLETE }
2302# OBSOLETE else
2303# OBSOLETE {
2304# OBSOLETE CB_SYSCALL syscall;
2305# OBSOLETE
2306# OBSOLETE CB_SYSCALL_INIT (&syscall);
2307# OBSOLETE syscall.arg1 = GPR[PARM1];
2308# OBSOLETE syscall.arg2 = GPR[PARM2];
2309# OBSOLETE syscall.arg3 = GPR[PARM3];
2310# OBSOLETE syscall.arg4 = GPR[PARM4];
2311# OBSOLETE syscall.func = GPR[FUNC];
2312# OBSOLETE syscall.p1 = (PTR) SD;
2313# OBSOLETE syscall.read_mem = d30v_read_mem;
2314# OBSOLETE syscall.write_mem = d30v_write_mem;
2315# OBSOLETE
2316# OBSOLETE WRITE32_QUEUE (&GPR[PARM1],
2317# OBSOLETE ((cb_syscall (STATE_CALLBACK (SD), &syscall)
2318# OBSOLETE == CB_RC_OK)
2319# OBSOLETE ? syscall.result
2320# OBSOLETE : -syscall.errcode));
2321# OBSOLETE return nia;
2322# OBSOLETE }
2323# OBSOLETE }
2324# OBSOLETE else if (TRACE_TRAP_P)
2325# OBSOLETE {
2326# OBSOLETE int reg, i;
2327# OBSOLETE sim_io_eprintf (sd, "\nTrap %ld:\n", (long) ((trap_vector - (EIT_VB + 0x20)) >> 3));
2328# OBSOLETE for (reg = 0; reg < NR_GENERAL_PURPOSE_REGISTERS; reg += 8)
2329# OBSOLETE {
2330# OBSOLETE sim_io_eprintf (sd, "r%.2d - r%.2d: ", reg, reg+7);
2331# OBSOLETE for (i = 0; i < 8; i++)
2332# OBSOLETE sim_io_eprintf (sd, " 0x%.8lx", (long) GPR[reg+i]);
2333# OBSOLETE sim_io_eprintf (sd, "\n");
2334# OBSOLETE }
2335# OBSOLETE
2336# OBSOLETE for (reg = 0; reg < 16; reg += 8)
2337# OBSOLETE {
2338# OBSOLETE sim_io_eprintf (sd, "cr%.2d - cr%.2d:", reg, reg+7);
2339# OBSOLETE for (i = 0; i < 8; i++)
2340# OBSOLETE sim_io_eprintf (sd, " 0x%.8lx", (long) CREG[reg+i]);
2341# OBSOLETE sim_io_eprintf (sd, "\n");
2342# OBSOLETE }
2343# OBSOLETE
2344# OBSOLETE sim_io_eprintf (sd, "a0 - a1: ");
2345# OBSOLETE for (reg = 0; reg < NR_ACCUMULATORS; reg++)
2346# OBSOLETE sim_io_eprintf (sd, " 0x%.8lx 0x%.8lx",
2347# OBSOLETE (long)EXTRACTED64(ACC[reg], 0, 31),
2348# OBSOLETE (long)EXTRACTED64(ACC[reg], 32, 63));
2349# OBSOLETE sim_io_eprintf (sd, "\n");
2350# OBSOLETE
2351# OBSOLETE sim_io_eprintf (sd, "f0 - f7: ");
2352# OBSOLETE sim_io_eprintf (sd, " (f0) %d", (int) PSW_VAL(PSW_F0));
2353# OBSOLETE sim_io_eprintf (sd, " (f1) %d", (int) PSW_VAL(PSW_F1));
2354# OBSOLETE sim_io_eprintf (sd, " (f2) %d", (int) PSW_VAL(PSW_F2));
2355# OBSOLETE sim_io_eprintf (sd, " (f3) %d", (int) PSW_VAL(PSW_F3));
2356# OBSOLETE sim_io_eprintf (sd, " (s) %d", (int) PSW_VAL(PSW_S));
2357# OBSOLETE sim_io_eprintf (sd, " (v) %d", (int) PSW_VAL(PSW_V));
2358# OBSOLETE sim_io_eprintf (sd, " (va) %d", (int) PSW_VAL(PSW_VA));
2359# OBSOLETE sim_io_eprintf (sd, " (c) %d\n", (int) PSW_VAL(PSW_C));
2360# OBSOLETE
2361# OBSOLETE sim_io_eprintf (sd, "pswh: ");
2362# OBSOLETE sim_io_eprintf (sd, " (sm) %d", (int) PSW_VAL(PSW_SM));
2363# OBSOLETE sim_io_eprintf (sd, " (ea) %d", (int) PSW_VAL(PSW_EA));
2364# OBSOLETE sim_io_eprintf (sd, " (ie) %d", (int) PSW_VAL(PSW_IE));
2365# OBSOLETE sim_io_eprintf (sd, " (rp) %d", (int) PSW_VAL(PSW_RP));
2366# OBSOLETE sim_io_eprintf (sd, " (md) %d", (int) PSW_VAL(PSW_MD));
2367# OBSOLETE
2368# OBSOLETE if (PSW_VAL(PSW_DB))
2369# OBSOLETE sim_io_eprintf (sd, " (db) %d", (int) PSW_VAL(PSW_DB));
2370# OBSOLETE
2371# OBSOLETE if (PSW_VAL(PSW_DS))
2372# OBSOLETE sim_io_eprintf (sd, " (ds) %d", (int) PSW_VAL(PSW_DS));
2373# OBSOLETE
2374# OBSOLETE sim_io_eprintf (sd, "\n");
2375# OBSOLETE return nia;
2376# OBSOLETE }
2377# OBSOLETE else
2378# OBSOLETE {
2379# OBSOLETE if(PSW_VAL(PSW_RP) && RPT_E == cia)
2380# OBSOLETE {
2381# OBSOLETE WRITE32_QUEUE (&bPC, RPT_S);
2382# OBSOLETE if (RPT_C == 0)
2383# OBSOLETE PSW_SET (PSW_RP, 0);
2384# OBSOLETE }
2385# OBSOLETE else
2386# OBSOLETE WRITE32_QUEUE (&bPC, cia + 8);
2387# OBSOLETE DID_TRAP = 1;
2388# OBSOLETE return trap_vector;
2389# OBSOLETE }
2390# OBSOLETE
2391# OBSOLETE _BRA,01001,00,6.**,6.**,6.RC:BRA:short:mu:TRAP
2392# OBSOLETE "trap r<RC>"
2393# OBSOLETE nia = do_trap (_SD, EIT_VB + 0x20 + MASKED32(Rc, 24, 28), nia);
2394# OBSOLETE _BRA,01001,10,6.**,6.**,_IMM6:BRA:short:mu:TRAP imm
2395# OBSOLETE "trap <imm>"
2396# OBSOLETE nia = do_trap (_SD, EIT_VB + 0x20 + (imm_5 << 3), nia);
2397# OBSOLETE
2398# OBSOLETE
2399# OBSOLETE
2400# OBSOLETE // XOR
2401# OBSOLETE
2402# OBSOLETE _LOGIC,11011,00,6.RA,6.RB,6.RC:LOGIC:short:iu,mu:XOR
2403# OBSOLETE "xor r<RA>, r<RB>, r<RC>"
2404# OBSOLETE WRITE32_QUEUE (Ra, Rb ^ Rc);
2405# OBSOLETE _LOGIC,11011,10,6.RA,6.RB,_IMM6:LOGIC:short:iu,mu:XOR imm
2406# OBSOLETE "xor r<RA>, r<RB>, <imm>"
2407# OBSOLETE WRITE32_QUEUE (Ra, Rb ^ imm);
2408# OBSOLETE _LOGIC,11011,10,6.RA,6.RB,_IMM32:LOGIC:long:iu,mu:XOR imm long
2409# OBSOLETE "xor r<RA>, r<RB>, <imm>"
2410# OBSOLETE WRITE32_QUEUE (Ra, Rb ^ imm);
2411# OBSOLETE
2412# OBSOLETE
2413# OBSOLETE
2414# OBSOLETE // XORFG
2415# OBSOLETE
2416# OBSOLETE _LOGIC,01011,00,***,3.FA,***,3.FB,***,3.FC:LOGIC:short:iu,mu:XORFG
2417# OBSOLETE "xorfg f<FA>, f<FB>, f<FC>"
2418# OBSOLETE PSW_FLAG_SET_QUEUE(FA, PSW_FLAG_VAL(FB) ^ PSW_FLAG_VAL(FC));
2419# OBSOLETE _LOGIC,01011,10,***,3.FA,***,3.FB,_IMM6:LOGIC:short:iu,mu:XORFG imm
2420# OBSOLETE "xorfg f<FA>, f<FB>, <imm_6>"
2421# OBSOLETE PSW_FLAG_SET_QUEUE(FA, PSW_FLAG_VAL(FB) ^ (imm_6 & 1));
GDB Binutils - Deliverables
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