projects / deliverable / binutils-gdb.git / blame
| Commit | Line | Data |
|---|---|---|
| c906108c SS |
1 | # Instruction cache rules |
| 2 | # | |
| 3 | # This file is part of the program psim. | |
| 4 | # | |
| 5 | # Copyright (C) 1994-1995, Andrew Cagney <cagney@highland.com.au> | |
| 6 | # | |
| 7 | # This program is free software; you can redistribute it and/or modify | |
| 8 | # it under the terms of the GNU General Public License as published by | |
| 9 | # the Free Software Foundation; either version 2 of the License, or | |
| 10 | # (at your option) any later version. | |
| 11 | # | |
| 12 | # This program is distributed in the hope that it will be useful, | |
| 13 | # but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 14 | # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 15 | # GNU General Public License for more details. | |
| 16 | # | |
| 17 | # You should have received a copy of the GNU General Public License | |
| 18 | # along with this program; if not, write to the Free Software | |
| 19 | # Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. | |
| 20 | # | |
| 21 | compute:RA:RA:: | |
| 22 | compute:RA:Ra:signed32 *:(&GPR[RA]) | |
| 23 | compute:RA:RaH:signed16 *:AH2_4(Ra) | |
| 24 | compute:RA:RaL:signed16 *:AL2_4(Ra) | |
| 25 | compute:RA:val_Ra:signed32:(RA == 0 ? 0 : GPR[RA]) | |
| 26 | # | |
| 27 | compute:RB:RB:: | |
| 28 | compute:RB:Rb:signed32:(RB == 0 ? 0 : GPR[RB]) | |
| 29 | compute:RB:RbU:unsigned32:(RB == 0 ? 0 : GPR[RB]) | |
| 30 | compute:RB:RbH:signed16:VH2_4(Rb) | |
| 31 | compute:RB:RbL:signed16:VL2_4(Rb) | |
| 32 | compute:RB:RbHU:unsigned16:VH2_4(Rb) | |
| 33 | compute:RB:RbLU:unsigned16:VL2_4(Rb) | |
| 34 | # | |
| 35 | compute:RC:RC:: | |
| 36 | compute:RC:Rc:signed32:(RC == 0 ? 0 : GPR[RC]) | |
| 37 | compute:RC:RcU:unsigned32:(RC == 0 ? 0 : GPR[RC]) | |
| 38 | compute:RC:RcH:signed16:VH2_4(Rc) | |
| 39 | compute:RC:RcL:signed16:VL2_4(Rc) | |
| 40 | # | |
| 41 | # | |
| 42 | compute:IMM_6S:IMM_6S:: | |
| 43 | compute:IMM_6S:imm:signed32:SEXT32(IMM_6S, 32 - 6) | |
| 44 | # NB - for short imm[HL] are the same value | |
| 45 | compute:IMM_6S:immHL:signed32:((imm << 16) | MASKED32(imm, 16, 31)) | |
| 46 | compute:IMM_6S:immH:signed32:imm | |
| 47 | compute:IMM_6S:immL:signed32:imm | |
| 48 | compute:IMM_6S:imm_6:signed32:IMM_6S | |
| 49 | compute:IMM_6S:imm_5:signed32:LSMASKED32(IMM_6S, 4, 0) | |
| 50 | compute:IMM_6S:imm_6u:unsigned32:(IMM_6S & 0x3f) | |
| 51 | # | |
| 52 | compute:RC:pcdisp:signed32:(Rc & ~0x7) | |
| 53 | compute:RC:pcaddr:signed32:pcdisp | |
| 54 | # | |
| 55 | compute:IMM_18S:IMM_18S:: | |
| 56 | compute:IMM_18S:pcdisp:signed32:(SEXT32(IMM_18S, 32 - 18) << 3) | |
| 57 | compute:IMM_18S:pcaddr:signed32:pcdisp | |
| 58 | compute:IMM_12S:IMM_12S:: | |
| 59 | compute:IMM_12S:pcdisp:signed32:(SEXT32(IMM_12S, 32 - 12) << 3) | |
| 60 | compute:IMM_12S:pcaddr:signed32:pcdisp | |
| 61 | # | |
| 62 | compute:IMM_8L:IMM_8L:: | |
| 63 | compute:IMM_18L:IMM_18L:: | |
| 64 | compute:IMM_6L:IMM_6L:: | |
| 65 | compute:IMM_6L:imm:signed32:((((IMM_6L << 8) | IMM_8L) << 18) | IMM_18L) | |
| 66 | compute:IMM_6L:immHL:signed32:imm | |
| 67 | compute:IMM_6L:immH:signed32:EXTRACTED32(imm, 0, 15) | |
| 68 | compute:IMM_6L:immL:signed32:EXTRACTED32(imm, 16, 31) | |
| 69 | compute:IMM_6L:pcdisp:signed32:(imm & ~0x7) | |
| 70 | compute:IMM_6L:pcaddr:signed32:pcdisp | |
| 71 | # | |
| 72 | # | |
| 73 | compute:SRC_6:SRC_6:: | |
| 74 | compute:SRC_6:src:unsigned32:(XX == 2 ? SEXT32(SRC_6, 32 - 6) : GPR[SRC_6]) | |
| 75 | # | |
| 76 | # | |
| 77 | compute:AA:AA:: | |
| 78 | compute:AA:Aa:unsigned64*:((CPU)->regs.accumulator + AA) | |
| 79 | compute:AB:AB:: | |
| 80 | compute:AB:Ab:unsigned64*:((CPU)->regs.accumulator + AB) |