sim: v850: convert to sim-cpu
[deliverable/binutils-gdb.git] / sim / erc32 / sis.c
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1/*
2 * This file is part of SIS.
3 *
4 * SIS, SPARC instruction simulator. Copyright (C) 1995 Jiri Gaisler, European
5 * Space Agency
6 *
7 * This program is free software; you can redistribute it and/or modify it under
8 * the terms of the GNU General Public License as published by the Free
3fd725ef 9 * Software Foundation; either version 3 of the License, or (at your option)
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10 * any later version.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
51b318de 18 * this program; if not, see <http://www.gnu.org/licenses/>.
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19 *
20 */
21
22#include "config.h"
23#include <signal.h>
24#include <string.h>
25#ifdef HAVE_STDLIB_H
26#include <stdlib.h>
27#endif
28#include <stdio.h>
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29#include <sys/fcntl.h>
30#include "sis.h"
31#include <dis-asm.h>
32#include "sim-config.h"
638fcdad 33#include <inttypes.h>
c906108c 34
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35#define VAL(x) strtol(x,(char **)NULL,0)
36
37/* Structures and functions from readline library */
38
5634e839
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39#include "readline/readline.h"
40#include "readline/history.h"
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41
42/* Command history buffer length - MUST be binary */
43#define HIST_LEN 64
44
45extern struct disassemble_info dinfo;
46extern struct pstate sregs;
47extern struct estate ebase;
48
49extern int ctrl_c;
50extern int nfp;
51extern int ift;
52extern int wrp;
53extern int rom8;
54extern int uben;
55extern int sis_verbose;
56extern char *sis_version;
57extern struct estate ebase;
58extern struct evcell evbuf[];
59extern struct irqcell irqarr[];
60extern int irqpend, ext_irl;
61extern int termsave;
62extern int sparclite;
63extern int dumbio;
64extern char uart_dev1[];
65extern char uart_dev2[];
66extern uint32 last_load_addr;
67
68#ifdef ERA
69extern int era;
70#endif
71
72int
73run_sim(sregs, icount, dis)
74 struct pstate *sregs;
94110024 75 uint64 icount;
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76 int dis;
77{
102b920e 78 int irq, mexc, deb;
c906108c 79
96d67095 80 sregs->starttime = get_time();
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81 init_stdio();
82 if (sregs->err_mode) icount = 0;
83 deb = dis || sregs->histlen || sregs->bptnum;
84 irq = 0;
85 while (icount > 0) {
86
102b920e 87 mexc = memory_iread (sregs->pc, &sregs->inst, &sregs->hold);
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88 sregs->icnt = 1;
89 if (sregs->annul) {
90 sregs->annul = 0;
91 sregs->pc = sregs->npc;
92 sregs->npc = sregs->npc + 4;
93 } else {
94 sregs->fhold = 0;
95 if (ext_irl) irq = check_interrupts(sregs);
96 if (!irq) {
97 if (mexc) {
98 sregs->trap = I_ACC_EXC;
99 } else {
100 if (deb) {
101 if ((sregs->bphit = check_bpt(sregs)) != 0) {
102 restore_stdio();
5831e29b 103 return BPT_HIT;
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104 }
105 if (sregs->histlen) {
106 sregs->histbuf[sregs->histind].addr = sregs->pc;
107 sregs->histbuf[sregs->histind].time = ebase.simtime;
108 sregs->histind++;
109 if (sregs->histind >= sregs->histlen)
110 sregs->histind = 0;
111 }
112 if (dis) {
638fcdad 113 printf(" %8" PRIu64 " ", ebase.simtime);
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114 dis_mem(sregs->pc, 1, &dinfo);
115 }
116 }
117 dispatch_instruction(sregs);
118 icount--;
119 }
120 }
121 if (sregs->trap) {
122 irq = 0;
123 sregs->err_mode = execute_trap(sregs);
124 if (sregs->err_mode) {
125 error_mode(sregs->pc);
126 icount = 0;
127 }
128 }
129 }
130 advance_time(sregs);
131 if (ctrl_c || (sregs->tlimit <= ebase.simtime)) {
132 icount = 0;
133 if (sregs->tlimit <= ebase.simtime) sregs->tlimit = -1;
134 }
135 }
96d67095 136 sregs->tottime += get_time() - sregs->starttime;
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137 restore_stdio();
138 if (sregs->err_mode)
5831e29b 139 return ERROR;
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140 if (ctrl_c) {
141 ctrl_c = 0;
5831e29b 142 return CTRL_C;
c906108c 143 }
5831e29b 144 return TIME_OUT;
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145}
146
147int
148main(argc, argv)
149 int argc;
150 char **argv;
151{
152
153 int cont = 1;
154 int stat = 1;
155 int freq = 14;
156 int copt = 0;
157
158 char *cfile, *bacmd;
159 char *cmdq[HIST_LEN];
160 int cmdi = 0;
161 int i;
e26473a1 162 int lfile = 0;
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163
164 cfile = 0;
165 for (i = 0; i < 64; i++)
166 cmdq[i] = 0;
14e1f957 167 printf("\n SIS - SPARC instruction simulator %s, copyright Jiri Gaisler 1995\n", sis_version);
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168 printf(" Bug-reports to jgais@wd.estec.esa.nl\n\n");
169 while (stat < argc) {
170 if (argv[stat][0] == '-') {
171 if (strcmp(argv[stat], "-v") == 0) {
172 sis_verbose = 1;
173 } else if (strcmp(argv[stat], "-c") == 0) {
174 if ((stat + 1) < argc) {
175 copt = 1;
176 cfile = argv[++stat];
177 }
178 } else if (strcmp(argv[stat], "-nfp") == 0)
179 nfp = 1;
180 else if (strcmp(argv[stat], "-ift") == 0)
181 ift = 1;
182 else if (strcmp(argv[stat], "-wrp") == 0)
183 wrp = 1;
184 else if (strcmp(argv[stat], "-rom8") == 0)
185 rom8 = 1;
186 else if (strcmp(argv[stat], "-uben") == 0)
187 uben = 1;
188 else if (strcmp(argv[stat], "-uart1") == 0) {
189 if ((stat + 1) < argc)
190 strcpy(uart_dev1, argv[++stat]);
191 } else if (strcmp(argv[stat], "-uart2") == 0) {
192 if ((stat + 1) < argc)
193 strcpy(uart_dev2, argv[++stat]);
194 } else if (strcmp(argv[stat], "-freq") == 0) {
195 if ((stat + 1) < argc)
196 freq = VAL(argv[++stat]);
197 } else if (strcmp(argv[stat], "-sparclite") == 0) {
198 sparclite = 1;
199#ifdef ERA
200 } else if (strcmp(argv[stat], "-era") == 0) {
201 era = 1;
202#endif
203 } else if (strcmp(argv[stat], "-dumbio") == 0) {
204 dumbio = 1;
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205 } else if (strcmp(argv[stat], "-v") == 0) {
206 sis_verbose += 1;
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207 } else {
208 printf("unknown option %s\n", argv[stat]);
209 usage();
210 exit(1);
211 }
212 } else {
e26473a1 213 lfile = stat;
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214 }
215 stat++;
216 }
217 if (nfp)
218 printf("FPU disabled\n");
219#ifdef ERA
220 if (era)
221 printf("ERA ECC emulation enabled\n");
222#endif
223 sregs.freq = freq;
224
225 INIT_DISASSEMBLE_INFO(dinfo, stdout, (fprintf_ftype) fprintf);
226 dinfo.endian = BFD_ENDIAN_BIG;
227
228 termsave = fcntl(0, F_GETFL, 0);
229 using_history();
230 init_signals();
231 ebase.simtime = 0;
232 reset_all();
233 init_bpt(&sregs);
234 init_sim();
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235 if (lfile)
236 last_load_addr = bfd_load(argv[lfile]);
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237#ifdef STAT
238 reset_stat(&sregs);
239#endif
240
241 if (copt) {
242 bacmd = (char *) malloc(256);
243 strcpy(bacmd, "batch ");
244 strcat(bacmd, cfile);
245 exec_cmd(&sregs, bacmd);
246 }
247 while (cont) {
248
249 if (cmdq[cmdi] != 0) {
250#if 0
251 remove_history(cmdq[cmdi]);
252#else
253 remove_history(cmdi);
254#endif
255 free(cmdq[cmdi]);
256 cmdq[cmdi] = 0;
257 }
258 cmdq[cmdi] = readline("sis> ");
259 if (cmdq[cmdi] && *cmdq[cmdi])
260 add_history(cmdq[cmdi]);
261 if (cmdq[cmdi])
262 stat = exec_cmd(&sregs, cmdq[cmdi]);
263 else {
264 puts("\n");
265 exit(0);
266 }
267 switch (stat) {
268 case OK:
269 break;
270 case CTRL_C:
271 printf("\b\bInterrupt!\n");
272 case TIME_OUT:
638fcdad 273 printf(" Stopped at time %" PRIu64 " (%.3f ms)\n", ebase.simtime,
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274 ((double) ebase.simtime / (double) sregs.freq) / 1000.0);
275 break;
276 case BPT_HIT:
277 printf("breakpoint at 0x%08x reached\n", sregs.pc);
278 sregs.bphit = 1;
279 break;
280 case ERROR:
281 printf("IU in error mode (%d)\n", sregs.trap);
282 stat = 0;
638fcdad 283 printf(" %8" PRIu64 " ", ebase.simtime);
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284 dis_mem(sregs.pc, 1, &dinfo);
285 break;
286 default:
287 break;
288 }
289 ctrl_c = 0;
290 stat = OK;
291
292 cmdi = (cmdi + 1) & (HIST_LEN - 1);
293
294 }
295 return 0;
296}
297
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