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[deliverable/binutils-gdb.git] / sim / fr30 / sem-switch.c
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c906108c
SS		 1/* Simulator instruction semantics for fr30bf.
2
3THIS FILE IS MACHINE GENERATED WITH CGEN.
4
5Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc.
6
7This file is part of the GNU Simulators.
8
9This program is free software; you can redistribute it and/or modify
10it under the terms of the GNU General Public License as published by
11the Free Software Foundation; either version 2, or (at your option)
12any later version.
13
14This program is distributed in the hope that it will be useful,
15but WITHOUT ANY WARRANTY; without even the implied warranty of
16MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17GNU General Public License for more details.
18
19You should have received a copy of the GNU General Public License along
20with this program; if not, write to the Free Software Foundation, Inc.,
2159 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
22
23*/
24
25#ifdef DEFINE_LABELS
26
27 /* The labels have the case they have because the enum of insn types
28 is all uppercase and in the non-stdc case the insn symbol is built
29 into the enum name. */
30
31 static struct {
32 int index;
33 void *label;
34 } labels[] = {
35 { FR30BF_INSN_X_INVALID, && case_sem_INSN_X_INVALID },
36 { FR30BF_INSN_X_AFTER, && case_sem_INSN_X_AFTER },
37 { FR30BF_INSN_X_BEFORE, && case_sem_INSN_X_BEFORE },
38 { FR30BF_INSN_X_CTI_CHAIN, && case_sem_INSN_X_CTI_CHAIN },
39 { FR30BF_INSN_X_CHAIN, && case_sem_INSN_X_CHAIN },
40 { FR30BF_INSN_X_BEGIN, && case_sem_INSN_X_BEGIN },
41 { FR30BF_INSN_ADD, && case_sem_INSN_ADD },
42 { FR30BF_INSN_ADDI, && case_sem_INSN_ADDI },
43 { FR30BF_INSN_ADD2, && case_sem_INSN_ADD2 },
44 { FR30BF_INSN_ADDC, && case_sem_INSN_ADDC },
45 { FR30BF_INSN_ADDN, && case_sem_INSN_ADDN },
46 { FR30BF_INSN_ADDNI, && case_sem_INSN_ADDNI },
47 { FR30BF_INSN_ADDN2, && case_sem_INSN_ADDN2 },
48 { FR30BF_INSN_SUB, && case_sem_INSN_SUB },
49 { FR30BF_INSN_SUBC, && case_sem_INSN_SUBC },
50 { FR30BF_INSN_SUBN, && case_sem_INSN_SUBN },
51 { FR30BF_INSN_CMP, && case_sem_INSN_CMP },
52 { FR30BF_INSN_CMPI, && case_sem_INSN_CMPI },
53 { FR30BF_INSN_CMP2, && case_sem_INSN_CMP2 },
54 { FR30BF_INSN_AND, && case_sem_INSN_AND },
55 { FR30BF_INSN_OR, && case_sem_INSN_OR },
56 { FR30BF_INSN_EOR, && case_sem_INSN_EOR },
57 { FR30BF_INSN_ANDM, && case_sem_INSN_ANDM },
58 { FR30BF_INSN_ANDH, && case_sem_INSN_ANDH },
59 { FR30BF_INSN_ANDB, && case_sem_INSN_ANDB },
60 { FR30BF_INSN_ORM, && case_sem_INSN_ORM },
61 { FR30BF_INSN_ORH, && case_sem_INSN_ORH },
62 { FR30BF_INSN_ORB, && case_sem_INSN_ORB },
63 { FR30BF_INSN_EORM, && case_sem_INSN_EORM },
64 { FR30BF_INSN_EORH, && case_sem_INSN_EORH },
65 { FR30BF_INSN_EORB, && case_sem_INSN_EORB },
66 { FR30BF_INSN_BANDL, && case_sem_INSN_BANDL },
67 { FR30BF_INSN_BORL, && case_sem_INSN_BORL },
68 { FR30BF_INSN_BEORL, && case_sem_INSN_BEORL },
69 { FR30BF_INSN_BANDH, && case_sem_INSN_BANDH },
70 { FR30BF_INSN_BORH, && case_sem_INSN_BORH },
71 { FR30BF_INSN_BEORH, && case_sem_INSN_BEORH },
72 { FR30BF_INSN_BTSTL, && case_sem_INSN_BTSTL },
73 { FR30BF_INSN_BTSTH, && case_sem_INSN_BTSTH },
74 { FR30BF_INSN_MUL, && case_sem_INSN_MUL },
75 { FR30BF_INSN_MULU, && case_sem_INSN_MULU },
76 { FR30BF_INSN_MULH, && case_sem_INSN_MULH },
77 { FR30BF_INSN_MULUH, && case_sem_INSN_MULUH },
78 { FR30BF_INSN_DIV0S, && case_sem_INSN_DIV0S },
79 { FR30BF_INSN_DIV0U, && case_sem_INSN_DIV0U },
80 { FR30BF_INSN_DIV1, && case_sem_INSN_DIV1 },
81 { FR30BF_INSN_DIV2, && case_sem_INSN_DIV2 },
82 { FR30BF_INSN_DIV3, && case_sem_INSN_DIV3 },
83 { FR30BF_INSN_DIV4S, && case_sem_INSN_DIV4S },
84 { FR30BF_INSN_LSL, && case_sem_INSN_LSL },
85 { FR30BF_INSN_LSLI, && case_sem_INSN_LSLI },
86 { FR30BF_INSN_LSL2, && case_sem_INSN_LSL2 },
87 { FR30BF_INSN_LSR, && case_sem_INSN_LSR },
88 { FR30BF_INSN_LSRI, && case_sem_INSN_LSRI },
89 { FR30BF_INSN_LSR2, && case_sem_INSN_LSR2 },
90 { FR30BF_INSN_ASR, && case_sem_INSN_ASR },
91 { FR30BF_INSN_ASRI, && case_sem_INSN_ASRI },
92 { FR30BF_INSN_ASR2, && case_sem_INSN_ASR2 },
93 { FR30BF_INSN_LDI8, && case_sem_INSN_LDI8 },
94 { FR30BF_INSN_LDI20, && case_sem_INSN_LDI20 },
95 { FR30BF_INSN_LDI32, && case_sem_INSN_LDI32 },
96 { FR30BF_INSN_LD, && case_sem_INSN_LD },
97 { FR30BF_INSN_LDUH, && case_sem_INSN_LDUH },
98 { FR30BF_INSN_LDUB, && case_sem_INSN_LDUB },
99 { FR30BF_INSN_LDR13, && case_sem_INSN_LDR13 },
100 { FR30BF_INSN_LDR13UH, && case_sem_INSN_LDR13UH },
101 { FR30BF_INSN_LDR13UB, && case_sem_INSN_LDR13UB },
102 { FR30BF_INSN_LDR14, && case_sem_INSN_LDR14 },
103 { FR30BF_INSN_LDR14UH, && case_sem_INSN_LDR14UH },
104 { FR30BF_INSN_LDR14UB, && case_sem_INSN_LDR14UB },
105 { FR30BF_INSN_LDR15, && case_sem_INSN_LDR15 },
106 { FR30BF_INSN_LDR15GR, && case_sem_INSN_LDR15GR },
107 { FR30BF_INSN_LDR15DR, && case_sem_INSN_LDR15DR },
108 { FR30BF_INSN_LDR15PS, && case_sem_INSN_LDR15PS },
109 { FR30BF_INSN_ST, && case_sem_INSN_ST },
110 { FR30BF_INSN_STH, && case_sem_INSN_STH },
111 { FR30BF_INSN_STB, && case_sem_INSN_STB },
112 { FR30BF_INSN_STR13, && case_sem_INSN_STR13 },
113 { FR30BF_INSN_STR13H, && case_sem_INSN_STR13H },
114 { FR30BF_INSN_STR13B, && case_sem_INSN_STR13B },
115 { FR30BF_INSN_STR14, && case_sem_INSN_STR14 },
116 { FR30BF_INSN_STR14H, && case_sem_INSN_STR14H },
117 { FR30BF_INSN_STR14B, && case_sem_INSN_STR14B },
118 { FR30BF_INSN_STR15, && case_sem_INSN_STR15 },
119 { FR30BF_INSN_STR15GR, && case_sem_INSN_STR15GR },
120 { FR30BF_INSN_STR15DR, && case_sem_INSN_STR15DR },
121 { FR30BF_INSN_STR15PS, && case_sem_INSN_STR15PS },
122 { FR30BF_INSN_MOV, && case_sem_INSN_MOV },
123 { FR30BF_INSN_MOVDR, && case_sem_INSN_MOVDR },
124 { FR30BF_INSN_MOVPS, && case_sem_INSN_MOVPS },
125 { FR30BF_INSN_MOV2DR, && case_sem_INSN_MOV2DR },
126 { FR30BF_INSN_MOV2PS, && case_sem_INSN_MOV2PS },
127 { FR30BF_INSN_JMP, && case_sem_INSN_JMP },
128 { FR30BF_INSN_JMPD, && case_sem_INSN_JMPD },
129 { FR30BF_INSN_CALLR, && case_sem_INSN_CALLR },
130 { FR30BF_INSN_CALLRD, && case_sem_INSN_CALLRD },
131 { FR30BF_INSN_CALL, && case_sem_INSN_CALL },
132 { FR30BF_INSN_CALLD, && case_sem_INSN_CALLD },
133 { FR30BF_INSN_RET, && case_sem_INSN_RET },
134 { FR30BF_INSN_RET_D, && case_sem_INSN_RET_D },
135 { FR30BF_INSN_INT, && case_sem_INSN_INT },
136 { FR30BF_INSN_INTE, && case_sem_INSN_INTE },
137 { FR30BF_INSN_RETI, && case_sem_INSN_RETI },
138 { FR30BF_INSN_BRAD, && case_sem_INSN_BRAD },
139 { FR30BF_INSN_BRA, && case_sem_INSN_BRA },
140 { FR30BF_INSN_BNOD, && case_sem_INSN_BNOD },
141 { FR30BF_INSN_BNO, && case_sem_INSN_BNO },
142 { FR30BF_INSN_BEQD, && case_sem_INSN_BEQD },
143 { FR30BF_INSN_BEQ, && case_sem_INSN_BEQ },
144 { FR30BF_INSN_BNED, && case_sem_INSN_BNED },
145 { FR30BF_INSN_BNE, && case_sem_INSN_BNE },
146 { FR30BF_INSN_BCD, && case_sem_INSN_BCD },
147 { FR30BF_INSN_BC, && case_sem_INSN_BC },
148 { FR30BF_INSN_BNCD, && case_sem_INSN_BNCD },
149 { FR30BF_INSN_BNC, && case_sem_INSN_BNC },
150 { FR30BF_INSN_BND, && case_sem_INSN_BND },
151 { FR30BF_INSN_BN, && case_sem_INSN_BN },
152 { FR30BF_INSN_BPD, && case_sem_INSN_BPD },
153 { FR30BF_INSN_BP, && case_sem_INSN_BP },
154 { FR30BF_INSN_BVD, && case_sem_INSN_BVD },
155 { FR30BF_INSN_BV, && case_sem_INSN_BV },
156 { FR30BF_INSN_BNVD, && case_sem_INSN_BNVD },
157 { FR30BF_INSN_BNV, && case_sem_INSN_BNV },
158 { FR30BF_INSN_BLTD, && case_sem_INSN_BLTD },
159 { FR30BF_INSN_BLT, && case_sem_INSN_BLT },
160 { FR30BF_INSN_BGED, && case_sem_INSN_BGED },
161 { FR30BF_INSN_BGE, && case_sem_INSN_BGE },
162 { FR30BF_INSN_BLED, && case_sem_INSN_BLED },
163 { FR30BF_INSN_BLE, && case_sem_INSN_BLE },
164 { FR30BF_INSN_BGTD, && case_sem_INSN_BGTD },
165 { FR30BF_INSN_BGT, && case_sem_INSN_BGT },
166 { FR30BF_INSN_BLSD, && case_sem_INSN_BLSD },
167 { FR30BF_INSN_BLS, && case_sem_INSN_BLS },
168 { FR30BF_INSN_BHID, && case_sem_INSN_BHID },
169 { FR30BF_INSN_BHI, && case_sem_INSN_BHI },
170 { FR30BF_INSN_DMOVR13, && case_sem_INSN_DMOVR13 },
171 { FR30BF_INSN_DMOVR13H, && case_sem_INSN_DMOVR13H },
172 { FR30BF_INSN_DMOVR13B, && case_sem_INSN_DMOVR13B },
173 { FR30BF_INSN_DMOVR13PI, && case_sem_INSN_DMOVR13PI },
174 { FR30BF_INSN_DMOVR13PIH, && case_sem_INSN_DMOVR13PIH },
175 { FR30BF_INSN_DMOVR13PIB, && case_sem_INSN_DMOVR13PIB },
176 { FR30BF_INSN_DMOVR15PI, && case_sem_INSN_DMOVR15PI },
177 { FR30BF_INSN_DMOV2R13, && case_sem_INSN_DMOV2R13 },
178 { FR30BF_INSN_DMOV2R13H, && case_sem_INSN_DMOV2R13H },
179 { FR30BF_INSN_DMOV2R13B, && case_sem_INSN_DMOV2R13B },
180 { FR30BF_INSN_DMOV2R13PI, && case_sem_INSN_DMOV2R13PI },
181 { FR30BF_INSN_DMOV2R13PIH, && case_sem_INSN_DMOV2R13PIH },
182 { FR30BF_INSN_DMOV2R13PIB, && case_sem_INSN_DMOV2R13PIB },
183 { FR30BF_INSN_DMOV2R15PD, && case_sem_INSN_DMOV2R15PD },
184 { FR30BF_INSN_LDRES, && case_sem_INSN_LDRES },
185 { FR30BF_INSN_STRES, && case_sem_INSN_STRES },
186 { FR30BF_INSN_COPOP, && case_sem_INSN_COPOP },
187 { FR30BF_INSN_COPLD, && case_sem_INSN_COPLD },
188 { FR30BF_INSN_COPST, && case_sem_INSN_COPST },
189 { FR30BF_INSN_COPSV, && case_sem_INSN_COPSV },
190 { FR30BF_INSN_NOP, && case_sem_INSN_NOP },
191 { FR30BF_INSN_ANDCCR, && case_sem_INSN_ANDCCR },
192 { FR30BF_INSN_ORCCR, && case_sem_INSN_ORCCR },
193 { FR30BF_INSN_STILM, && case_sem_INSN_STILM },
194 { FR30BF_INSN_ADDSP, && case_sem_INSN_ADDSP },
195 { FR30BF_INSN_EXTSB, && case_sem_INSN_EXTSB },
196 { FR30BF_INSN_EXTUB, && case_sem_INSN_EXTUB },
197 { FR30BF_INSN_EXTSH, && case_sem_INSN_EXTSH },
198 { FR30BF_INSN_EXTUH, && case_sem_INSN_EXTUH },
199 { FR30BF_INSN_LDM0, && case_sem_INSN_LDM0 },
200 { FR30BF_INSN_LDM1, && case_sem_INSN_LDM1 },
201 { FR30BF_INSN_STM0, && case_sem_INSN_STM0 },
202 { FR30BF_INSN_STM1, && case_sem_INSN_STM1 },
203 { FR30BF_INSN_ENTER, && case_sem_INSN_ENTER },
204 { FR30BF_INSN_LEAVE, && case_sem_INSN_LEAVE },
205 { FR30BF_INSN_XCHB, && case_sem_INSN_XCHB },
206 { 0, 0 }
207 };
208 int i;
209
210 for (i = 0; labels[i].label != 0; ++i)
211#if FAST_P
212 CPU_IDESC (current_cpu) [labels[i].index].sem_fast_lab = labels[i].label;
213#else
214 CPU_IDESC (current_cpu) [labels[i].index].sem_full_lab = labels[i].label;
215#endif
216
217#undef DEFINE_LABELS
218#endif /* DEFINE_LABELS */
219
220#ifdef DEFINE_SWITCH
221
222/* If hyper-fast [well not unnecessarily slow] execution is selected, turn
223 off frills like tracing and profiling. */
224/* FIXME: A better way would be to have TRACE_RESULT check for something
225 that can cause it to be optimized out. Another way would be to emit
226 special handlers into the instruction "stream". */
227
228#if FAST_P
229#undef TRACE_RESULT
230#define TRACE_RESULT(cpu, abuf, name, type, val)
231#endif
232
233#undef GET_ATTR
234#define GET_ATTR(cpu, num, attr) CGEN_ATTR_VALUE (NULL, abuf->idesc->attrs, CGEN_INSN_##attr)
235
236{
237
238#if WITH_SCACHE_PBB
239
240/* Branch to next handler without going around main loop. */
241#define NEXT(vpc) goto * SEM_ARGBUF (vpc) -> semantic.sem_case
242SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
243
244#else /* ! WITH_SCACHE_PBB */
245
246#define NEXT(vpc) BREAK (sem)
247#ifdef __GNUC__
248#if FAST_P
249 SWITCH (sem, SEM_ARGBUF (sc) -> idesc->sem_fast_lab)
250#else
251 SWITCH (sem, SEM_ARGBUF (sc) -> idesc->sem_full_lab)
252#endif
253#else
254 SWITCH (sem, SEM_ARGBUF (sc) -> idesc->num)
255#endif
256
257#endif /* ! WITH_SCACHE_PBB */
258
259 {
260
261 CASE (sem, INSN_X_INVALID) : /* --invalid-- */
262{
263 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
264 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
265#define FLD(f) abuf->fields.fmt_empty.f
266 int UNUSED written = 0;
267 IADDR UNUSED pc = abuf->addr;
268 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
269
270 {
271#if WITH_SCACHE
272 /* Update the recorded pc in the cpu state struct. */
273 SET_H_PC (pc);
274#endif
275 sim_engine_invalid_insn (current_cpu, pc);
276 sim_io_error (CPU_STATE (current_cpu), "invalid insn not handled\n");
277 /* NOTREACHED */
278 }
279
280#undef FLD
281}
282 NEXT (vpc);
283
284 CASE (sem, INSN_X_AFTER) : /* --after-- */
285{
286 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
287 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
288#define FLD(f) abuf->fields.fmt_empty.f
289 int UNUSED written = 0;
290 IADDR UNUSED pc = abuf->addr;
291 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
292
293 {
294#if WITH_SCACHE_PBB_FR30BF
295 fr30bf_pbb_after (current_cpu, sem_arg);
296#endif
297 }
298
299#undef FLD
300}
301 NEXT (vpc);
302
303 CASE (sem, INSN_X_BEFORE) : /* --before-- */
304{
305 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
306 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
307#define FLD(f) abuf->fields.fmt_empty.f
308 int UNUSED written = 0;
309 IADDR UNUSED pc = abuf->addr;
310 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
311
312 {
313#if WITH_SCACHE_PBB_FR30BF
314 fr30bf_pbb_before (current_cpu, sem_arg);
315#endif
316 }
317
318#undef FLD
319}
320 NEXT (vpc);
321
322 CASE (sem, INSN_X_CTI_CHAIN) : /* --cti-chain-- */
323{
324 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
325 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
326#define FLD(f) abuf->fields.fmt_empty.f
327 int UNUSED written = 0;
328 IADDR UNUSED pc = abuf->addr;
329 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
330
331 {
332#if WITH_SCACHE_PBB_FR30BF
333#ifdef DEFINE_SWITCH
334 vpc = fr30bf_pbb_cti_chain (current_cpu, sem_arg,
335 pbb_br_npc_ptr, pbb_br_npc);
336 BREAK (sem);
337#else
338 /* FIXME: Allow provision of explicit ifmt spec in insn spec. */
339 vpc = fr30bf_pbb_cti_chain (current_cpu, sem_arg,
340 CPU_PBB_BR_NPC_PTR (current_cpu),
341 CPU_PBB_BR_NPC (current_cpu));
342#endif
343#endif
344 }
345
346#undef FLD
347}
348 NEXT (vpc);
349
350 CASE (sem, INSN_X_CHAIN) : /* --chain-- */
351{
352 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
353 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
354#define FLD(f) abuf->fields.fmt_empty.f
355 int UNUSED written = 0;
356 IADDR UNUSED pc = abuf->addr;
357 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
358
359 {
360#if WITH_SCACHE_PBB_FR30BF
361 vpc = fr30bf_pbb_chain (current_cpu, sem_arg);
362#ifdef DEFINE_SWITCH
363 BREAK (sem);
364#endif
365#endif
366 }
367
368#undef FLD
369}
370 NEXT (vpc);
371
372 CASE (sem, INSN_X_BEGIN) : /* --begin-- */
373{
374 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
375 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
376#define FLD(f) abuf->fields.fmt_empty.f
377 int UNUSED written = 0;
378 IADDR UNUSED pc = abuf->addr;
379 vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
380
381 {
382#if WITH_SCACHE_PBB_FR30BF
383#ifdef DEFINE_SWITCH
384 /* In the switch case FAST_P is a constant, allowing several optimizations
385 in any called inline functions. */
386 vpc = fr30bf_pbb_begin (current_cpu, FAST_P);
387#else
388 vpc = fr30bf_pbb_begin (current_cpu, STATE_RUN_FAST_P (CPU_STATE (current_cpu)));
389#endif
390#endif
391 }
392
393#undef FLD
394}
395 NEXT (vpc);
396
397 CASE (sem, INSN_ADD) : /* add $Rj,$Ri */
398{
399 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
400 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
401#define FLD(f) abuf->fields.fmt_add.f
402 int UNUSED written = 0;
403 IADDR UNUSED pc = abuf->addr;
404 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
405
7a292a7a 406{
c906108c
SS		 407 {
408 BI opval = ADDOFSI (* FLD (i_Ri), * FLD (i_Rj), 0);
409 CPU (h_vbit) = opval;
410 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
411 }
412 {
413 BI opval = ADDCFSI (* FLD (i_Ri), * FLD (i_Rj), 0);
414 CPU (h_cbit) = opval;
415 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
416 }
417 {
418 SI opval = ADDSI (* FLD (i_Ri), * FLD (i_Rj));
419 * FLD (i_Ri) = opval;
420 TRACE_RESULT (current_cpu, abuf, "Ri", 'x', opval);
421 }
7a292a7a 422{
c906108c
SS		 423 {
424 BI opval = EQSI (* FLD (i_Ri), 0);
425 CPU (h_zbit) = opval;
426 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
427 }
428 {
429 BI opval = LTSI (* FLD (i_Ri), 0);
430 CPU (h_nbit) = opval;
431 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
432 }
7a292a7a
SS		 433}
434}
c906108c
SS		 435
436#undef FLD
437}
438 NEXT (vpc);
439
440 CASE (sem, INSN_ADDI) : /* add $u4,$Ri */
441{
442 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
443 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
444#define FLD(f) abuf->fields.fmt_addi.f
445 int UNUSED written = 0;
446 IADDR UNUSED pc = abuf->addr;
447 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
448
7a292a7a 449{
c906108c
SS		 450 {
451 BI opval = ADDOFSI (* FLD (i_Ri), FLD (f_u4), 0);
452 CPU (h_vbit) = opval;
453 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
454 }
455 {
456 BI opval = ADDCFSI (* FLD (i_Ri), FLD (f_u4), 0);
457 CPU (h_cbit) = opval;
458 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
459 }
460 {
461 SI opval = ADDSI (* FLD (i_Ri), FLD (f_u4));
462 * FLD (i_Ri) = opval;
463 TRACE_RESULT (current_cpu, abuf, "Ri", 'x', opval);
464 }
7a292a7a 465{
c906108c
SS		 466 {
467 BI opval = EQSI (* FLD (i_Ri), 0);
468 CPU (h_zbit) = opval;
469 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
470 }
471 {
472 BI opval = LTSI (* FLD (i_Ri), 0);
473 CPU (h_nbit) = opval;
474 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
475 }
7a292a7a
SS		 476}
477}
c906108c
SS		 478
479#undef FLD
480}
481 NEXT (vpc);
482
483 CASE (sem, INSN_ADD2) : /* add2 $m4,$Ri */
484{
485 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
486 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
487#define FLD(f) abuf->fields.fmt_add2.f
488 int UNUSED written = 0;
489 IADDR UNUSED pc = abuf->addr;
490 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
491
7a292a7a 492{
c906108c
SS		 493 {
494 BI opval = ADDOFSI (* FLD (i_Ri), FLD (f_m4), 0);
495 CPU (h_vbit) = opval;
496 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
497 }
498 {
499 BI opval = ADDCFSI (* FLD (i_Ri), FLD (f_m4), 0);
500 CPU (h_cbit) = opval;
501 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
502 }
503 {
504 SI opval = ADDSI (* FLD (i_Ri), FLD (f_m4));
505 * FLD (i_Ri) = opval;
506 TRACE_RESULT (current_cpu, abuf, "Ri", 'x', opval);
507 }
7a292a7a 508{
c906108c
SS		 509 {
510 BI opval = EQSI (* FLD (i_Ri), 0);
511 CPU (h_zbit) = opval;
512 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
513 }
514 {
515 BI opval = LTSI (* FLD (i_Ri), 0);
516 CPU (h_nbit) = opval;
517 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
518 }
7a292a7a
SS		 519}
520}
c906108c
SS		 521
522#undef FLD
523}
524 NEXT (vpc);
525
526 CASE (sem, INSN_ADDC) : /* addc $Rj,$Ri */
527{
528 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
529 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
530#define FLD(f) abuf->fields.fmt_addc.f
531 int UNUSED written = 0;
532 IADDR UNUSED pc = abuf->addr;
533 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
534
7a292a7a 535{
c906108c
SS		 536 SI tmp_tmp;
537 tmp_tmp = ADDCSI (* FLD (i_Ri), * FLD (i_Rj), CPU (h_cbit));
538 {
539 BI opval = ADDOFSI (* FLD (i_Ri), * FLD (i_Rj), CPU (h_cbit));
540 CPU (h_vbit) = opval;
541 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
542 }
543 {
544 BI opval = ADDCFSI (* FLD (i_Ri), * FLD (i_Rj), CPU (h_cbit));
545 CPU (h_cbit) = opval;
546 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
547 }
548 {
549 SI opval = tmp_tmp;
550 * FLD (i_Ri) = opval;
551 TRACE_RESULT (current_cpu, abuf, "Ri", 'x', opval);
552 }
7a292a7a 553{
c906108c
SS		 554 {
555 BI opval = EQSI (* FLD (i_Ri), 0);
556 CPU (h_zbit) = opval;
557 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
558 }
559 {
560 BI opval = LTSI (* FLD (i_Ri), 0);
561 CPU (h_nbit) = opval;
562 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
563 }
7a292a7a
SS		 564}
565}
c906108c
SS		 566
567#undef FLD
568}
569 NEXT (vpc);
570
571 CASE (sem, INSN_ADDN) : /* addn $Rj,$Ri */
572{
573 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
574 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
575#define FLD(f) abuf->fields.fmt_addn.f
576 int UNUSED written = 0;
577 IADDR UNUSED pc = abuf->addr;
578 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
579
580 {
581 SI opval = ADDSI (* FLD (i_Ri), * FLD (i_Rj));
582 * FLD (i_Ri) = opval;
583 TRACE_RESULT (current_cpu, abuf, "Ri", 'x', opval);
584 }
585
586#undef FLD
587}
588 NEXT (vpc);
589
590 CASE (sem, INSN_ADDNI) : /* addn $u4,$Ri */
591{
592 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
593 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
594#define FLD(f) abuf->fields.fmt_addni.f
595 int UNUSED written = 0;
596 IADDR UNUSED pc = abuf->addr;
597 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
598
599 {
600 SI opval = ADDSI (* FLD (i_Ri), FLD (f_u4));
601 * FLD (i_Ri) = opval;
602 TRACE_RESULT (current_cpu, abuf, "Ri", 'x', opval);
603 }
604
605#undef FLD
606}
607 NEXT (vpc);
608
609 CASE (sem, INSN_ADDN2) : /* addn2 $m4,$Ri */
610{
611 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
612 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
613#define FLD(f) abuf->fields.fmt_addn2.f
614 int UNUSED written = 0;
615 IADDR UNUSED pc = abuf->addr;
616 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
617
618 {
619 SI opval = ADDSI (* FLD (i_Ri), FLD (f_m4));
620 * FLD (i_Ri) = opval;
621 TRACE_RESULT (current_cpu, abuf, "Ri", 'x', opval);
622 }
623
624#undef FLD
625}
626 NEXT (vpc);
627
628 CASE (sem, INSN_SUB) : /* sub $Rj,$Ri */
629{
630 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
631 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
632#define FLD(f) abuf->fields.fmt_add.f
633 int UNUSED written = 0;
634 IADDR UNUSED pc = abuf->addr;
635 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
636
7a292a7a 637{
c906108c
SS		 638 {
639 BI opval = SUBOFSI (* FLD (i_Ri), * FLD (i_Rj), 0);
640 CPU (h_vbit) = opval;
641 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
642 }
643 {
644 BI opval = SUBCFSI (* FLD (i_Ri), * FLD (i_Rj), 0);
645 CPU (h_cbit) = opval;
646 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
647 }
648 {
649 SI opval = SUBSI (* FLD (i_Ri), * FLD (i_Rj));
650 * FLD (i_Ri) = opval;
651 TRACE_RESULT (current_cpu, abuf, "Ri", 'x', opval);
652 }
7a292a7a 653{
c906108c
SS		 654 {
655 BI opval = EQSI (* FLD (i_Ri), 0);
656 CPU (h_zbit) = opval;
657 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
658 }
659 {
660 BI opval = LTSI (* FLD (i_Ri), 0);
661 CPU (h_nbit) = opval;
662 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
663 }
7a292a7a
SS		 664}
665}
c906108c
SS		 666
667#undef FLD
668}
669 NEXT (vpc);
670
671 CASE (sem, INSN_SUBC) : /* subc $Rj,$Ri */
672{
673 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
674 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
675#define FLD(f) abuf->fields.fmt_addc.f
676 int UNUSED written = 0;
677 IADDR UNUSED pc = abuf->addr;
678 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
679
7a292a7a 680{
c906108c
SS		 681 SI tmp_tmp;
682 tmp_tmp = SUBCSI (* FLD (i_Ri), * FLD (i_Rj), CPU (h_cbit));
683 {
684 BI opval = SUBOFSI (* FLD (i_Ri), * FLD (i_Rj), CPU (h_cbit));
685 CPU (h_vbit) = opval;
686 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
687 }
688 {
689 BI opval = SUBCFSI (* FLD (i_Ri), * FLD (i_Rj), CPU (h_cbit));
690 CPU (h_cbit) = opval;
691 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
692 }
693 {
694 SI opval = tmp_tmp;
695 * FLD (i_Ri) = opval;
696 TRACE_RESULT (current_cpu, abuf, "Ri", 'x', opval);
697 }
7a292a7a 698{
c906108c
SS		 699 {
700 BI opval = EQSI (* FLD (i_Ri), 0);
701 CPU (h_zbit) = opval;
702 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
703 }
704 {
705 BI opval = LTSI (* FLD (i_Ri), 0);
706 CPU (h_nbit) = opval;
707 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
708 }
7a292a7a
SS		 709}
710}
c906108c
SS		 711
712#undef FLD
713}
714 NEXT (vpc);
715
716 CASE (sem, INSN_SUBN) : /* subn $Rj,$Ri */
717{
718 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
719 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
720#define FLD(f) abuf->fields.fmt_addn.f
721 int UNUSED written = 0;
722 IADDR UNUSED pc = abuf->addr;
723 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
724
725 {
726 SI opval = SUBSI (* FLD (i_Ri), * FLD (i_Rj));
727 * FLD (i_Ri) = opval;
728 TRACE_RESULT (current_cpu, abuf, "Ri", 'x', opval);
729 }
730
731#undef FLD
732}
733 NEXT (vpc);
734
735 CASE (sem, INSN_CMP) : /* cmp $Rj,$Ri */
736{
737 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
738 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
739#define FLD(f) abuf->fields.fmt_cmp.f
740 int UNUSED written = 0;
741 IADDR UNUSED pc = abuf->addr;
742 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
743
7a292a7a 744{
c906108c
SS		 745 SI tmp_tmp1;
746 {
747 BI opval = SUBOFSI (* FLD (i_Ri), * FLD (i_Rj), 0);
748 CPU (h_vbit) = opval;
749 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
750 }
751 {
752 BI opval = SUBCFSI (* FLD (i_Ri), * FLD (i_Rj), 0);
753 CPU (h_cbit) = opval;
754 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
755 }
756 tmp_tmp1 = SUBSI (* FLD (i_Ri), * FLD (i_Rj));
7a292a7a 757{
c906108c
SS		 758 {
759 BI opval = EQSI (tmp_tmp1, 0);
760 CPU (h_zbit) = opval;
761 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
762 }
763 {
764 BI opval = LTSI (tmp_tmp1, 0);
765 CPU (h_nbit) = opval;
766 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
767 }
7a292a7a
SS		 768}
769}
c906108c
SS		 770
771#undef FLD
772}
773 NEXT (vpc);
774
775 CASE (sem, INSN_CMPI) : /* cmp $u4,$Ri */
776{
777 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
778 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
779#define FLD(f) abuf->fields.fmt_cmpi.f
780 int UNUSED written = 0;
781 IADDR UNUSED pc = abuf->addr;
782 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
783
7a292a7a 784{
c906108c
SS		 785 SI tmp_tmp1;
786 {
787 BI opval = SUBOFSI (* FLD (i_Ri), FLD (f_u4), 0);
788 CPU (h_vbit) = opval;
789 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
790 }
791 {
792 BI opval = SUBCFSI (* FLD (i_Ri), FLD (f_u4), 0);
793 CPU (h_cbit) = opval;
794 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
795 }
796 tmp_tmp1 = SUBSI (* FLD (i_Ri), FLD (f_u4));
7a292a7a 797{
c906108c
SS		 798 {
799 BI opval = EQSI (tmp_tmp1, 0);
800 CPU (h_zbit) = opval;
801 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
802 }
803 {
804 BI opval = LTSI (tmp_tmp1, 0);
805 CPU (h_nbit) = opval;
806 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
807 }
7a292a7a
SS		 808}
809}
c906108c
SS		 810
811#undef FLD
812}
813 NEXT (vpc);
814
815 CASE (sem, INSN_CMP2) : /* cmp2 $m4,$Ri */
816{
817 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
818 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
819#define FLD(f) abuf->fields.fmt_cmp2.f
820 int UNUSED written = 0;
821 IADDR UNUSED pc = abuf->addr;
822 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
823
7a292a7a 824{
c906108c
SS		 825 SI tmp_tmp1;
826 {
827 BI opval = SUBOFSI (* FLD (i_Ri), FLD (f_m4), 0);
828 CPU (h_vbit) = opval;
829 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
830 }
831 {
832 BI opval = SUBCFSI (* FLD (i_Ri), FLD (f_m4), 0);
833 CPU (h_cbit) = opval;
834 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
835 }
836 tmp_tmp1 = SUBSI (* FLD (i_Ri), FLD (f_m4));
7a292a7a 837{
c906108c
SS		 838 {
839 BI opval = EQSI (tmp_tmp1, 0);
840 CPU (h_zbit) = opval;
841 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
842 }
843 {
844 BI opval = LTSI (tmp_tmp1, 0);
845 CPU (h_nbit) = opval;
846 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
847 }
7a292a7a
SS		 848}
849}
c906108c
SS		 850
851#undef FLD
852}
853 NEXT (vpc);
854
855 CASE (sem, INSN_AND) : /* and $Rj,$Ri */
856{
857 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
858 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
859#define FLD(f) abuf->fields.fmt_and.f
860 int UNUSED written = 0;
861 IADDR UNUSED pc = abuf->addr;
862 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
863
7a292a7a 864{
c906108c
SS		 865 {
866 SI opval = ANDSI (* FLD (i_Ri), * FLD (i_Rj));
867 * FLD (i_Ri) = opval;
868 TRACE_RESULT (current_cpu, abuf, "Ri", 'x', opval);
869 }
7a292a7a 870{
c906108c
SS		 871 {
872 BI opval = EQSI (* FLD (i_Ri), 0);
873 CPU (h_zbit) = opval;
874 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
875 }
876 {
877 BI opval = LTSI (* FLD (i_Ri), 0);
878 CPU (h_nbit) = opval;
879 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
880 }
7a292a7a
SS		 881}
882}
c906108c
SS		 883
884#undef FLD
885}
886 NEXT (vpc);
887
888 CASE (sem, INSN_OR) : /* or $Rj,$Ri */
889{
890 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
891 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
892#define FLD(f) abuf->fields.fmt_and.f
893 int UNUSED written = 0;
894 IADDR UNUSED pc = abuf->addr;
895 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
896
7a292a7a 897{
c906108c
SS		 898 {
899 SI opval = ORSI (* FLD (i_Ri), * FLD (i_Rj));
900 * FLD (i_Ri) = opval;
901 TRACE_RESULT (current_cpu, abuf, "Ri", 'x', opval);
902 }
7a292a7a 903{
c906108c
SS		 904 {
905 BI opval = EQSI (* FLD (i_Ri), 0);
906 CPU (h_zbit) = opval;
907 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
908 }
909 {
910 BI opval = LTSI (* FLD (i_Ri), 0);
911 CPU (h_nbit) = opval;
912 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
913 }
7a292a7a
SS		 914}
915}
c906108c
SS		 916
917#undef FLD
918}
919 NEXT (vpc);
920
921 CASE (sem, INSN_EOR) : /* eor $Rj,$Ri */
922{
923 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
924 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
925#define FLD(f) abuf->fields.fmt_and.f
926 int UNUSED written = 0;
927 IADDR UNUSED pc = abuf->addr;
928 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
929
7a292a7a 930{
c906108c
SS		 931 {
932 SI opval = XORSI (* FLD (i_Ri), * FLD (i_Rj));
933 * FLD (i_Ri) = opval;
934 TRACE_RESULT (current_cpu, abuf, "Ri", 'x', opval);
935 }
7a292a7a 936{
c906108c
SS		 937 {
938 BI opval = EQSI (* FLD (i_Ri), 0);
939 CPU (h_zbit) = opval;
940 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
941 }
942 {
943 BI opval = LTSI (* FLD (i_Ri), 0);
944 CPU (h_nbit) = opval;
945 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
946 }
7a292a7a
SS		 947}
948}
c906108c
SS		 949
950#undef FLD
951}
952 NEXT (vpc);
953
954 CASE (sem, INSN_ANDM) : /* and $Rj,@$Ri */
955{
956 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
957 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
958#define FLD(f) abuf->fields.fmt_andm.f
959 int UNUSED written = 0;
960 IADDR UNUSED pc = abuf->addr;
961 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
962
7a292a7a 963{
c906108c
SS		 964 SI tmp_tmp;
965 tmp_tmp = ANDSI (GETMEMSI (current_cpu, pc, * FLD (i_Ri)), * FLD (i_Rj));
7a292a7a 966{
c906108c
SS		 967 {
968 BI opval = EQSI (tmp_tmp, 0);
969 CPU (h_zbit) = opval;
970 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
971 }
972 {
973 BI opval = LTSI (tmp_tmp, 0);
974 CPU (h_nbit) = opval;
975 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
976 }
7a292a7a 977}
c906108c
SS		 978 {
979 SI opval = tmp_tmp;
980 SETMEMSI (current_cpu, pc, * FLD (i_Ri), opval);
981 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
982 }
7a292a7a 983}
c906108c
SS		 984
985#undef FLD
986}
987 NEXT (vpc);
988
989 CASE (sem, INSN_ANDH) : /* andh $Rj,@$Ri */
990{
991 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
992 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
993#define FLD(f) abuf->fields.fmt_andh.f
994 int UNUSED written = 0;
995 IADDR UNUSED pc = abuf->addr;
996 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
997
7a292a7a 998{
c906108c
SS		 999 HI tmp_tmp;
1000 tmp_tmp = ANDHI (GETMEMHI (current_cpu, pc, * FLD (i_Ri)), * FLD (i_Rj));
7a292a7a 1001{
c906108c
SS		 1002 {
1003 BI opval = EQHI (tmp_tmp, 0);
1004 CPU (h_zbit) = opval;
1005 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
1006 }
1007 {
1008 BI opval = LTHI (tmp_tmp, 0);
1009 CPU (h_nbit) = opval;
1010 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
1011 }
7a292a7a 1012}
c906108c
SS		 1013 {
1014 HI opval = tmp_tmp;
1015 SETMEMHI (current_cpu, pc, * FLD (i_Ri), opval);
1016 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
1017 }
7a292a7a 1018}
c906108c
SS		 1019
1020#undef FLD
1021}
1022 NEXT (vpc);
1023
1024 CASE (sem, INSN_ANDB) : /* andb $Rj,@$Ri */
1025{
1026 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1027 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1028#define FLD(f) abuf->fields.fmt_andb.f
1029 int UNUSED written = 0;
1030 IADDR UNUSED pc = abuf->addr;
1031 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1032
7a292a7a 1033{
c906108c
SS		 1034 QI tmp_tmp;
1035 tmp_tmp = ANDQI (GETMEMQI (current_cpu, pc, * FLD (i_Ri)), * FLD (i_Rj));
7a292a7a 1036{
c906108c
SS		 1037 {
1038 BI opval = EQQI (tmp_tmp, 0);
1039 CPU (h_zbit) = opval;
1040 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
1041 }
1042 {
1043 BI opval = LTQI (tmp_tmp, 0);
1044 CPU (h_nbit) = opval;
1045 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
1046 }
7a292a7a 1047}
c906108c
SS		 1048 {
1049 QI opval = tmp_tmp;
1050 SETMEMQI (current_cpu, pc, * FLD (i_Ri), opval);
1051 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
1052 }
7a292a7a 1053}
c906108c
SS		 1054
1055#undef FLD
1056}
1057 NEXT (vpc);
1058
1059 CASE (sem, INSN_ORM) : /* or $Rj,@$Ri */
1060{
1061 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1062 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1063#define FLD(f) abuf->fields.fmt_andm.f
1064 int UNUSED written = 0;
1065 IADDR UNUSED pc = abuf->addr;
1066 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1067
7a292a7a 1068{
c906108c
SS		 1069 SI tmp_tmp;
1070 tmp_tmp = ORSI (GETMEMSI (current_cpu, pc, * FLD (i_Ri)), * FLD (i_Rj));
7a292a7a 1071{
c906108c
SS		 1072 {
1073 BI opval = EQSI (tmp_tmp, 0);
1074 CPU (h_zbit) = opval;
1075 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
1076 }
1077 {
1078 BI opval = LTSI (tmp_tmp, 0);
1079 CPU (h_nbit) = opval;
1080 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
1081 }
7a292a7a 1082}
c906108c
SS		 1083 {
1084 SI opval = tmp_tmp;
1085 SETMEMSI (current_cpu, pc, * FLD (i_Ri), opval);
1086 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
1087 }
7a292a7a 1088}
c906108c
SS		 1089
1090#undef FLD
1091}
1092 NEXT (vpc);
1093
1094 CASE (sem, INSN_ORH) : /* orh $Rj,@$Ri */
1095{
1096 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1097 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1098#define FLD(f) abuf->fields.fmt_andh.f
1099 int UNUSED written = 0;
1100 IADDR UNUSED pc = abuf->addr;
1101 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1102
7a292a7a 1103{
c906108c
SS		 1104 HI tmp_tmp;
1105 tmp_tmp = ORHI (GETMEMHI (current_cpu, pc, * FLD (i_Ri)), * FLD (i_Rj));
7a292a7a 1106{
c906108c
SS		 1107 {
1108 BI opval = EQHI (tmp_tmp, 0);
1109 CPU (h_zbit) = opval;
1110 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
1111 }
1112 {
1113 BI opval = LTHI (tmp_tmp, 0);
1114 CPU (h_nbit) = opval;
1115 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
1116 }
7a292a7a 1117}
c906108c
SS		 1118 {
1119 HI opval = tmp_tmp;
1120 SETMEMHI (current_cpu, pc, * FLD (i_Ri), opval);
1121 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
1122 }
7a292a7a 1123}
c906108c
SS		 1124
1125#undef FLD
1126}
1127 NEXT (vpc);
1128
1129 CASE (sem, INSN_ORB) : /* orb $Rj,@$Ri */
1130{
1131 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1132 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1133#define FLD(f) abuf->fields.fmt_andb.f
1134 int UNUSED written = 0;
1135 IADDR UNUSED pc = abuf->addr;
1136 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1137
7a292a7a 1138{
c906108c
SS		 1139 QI tmp_tmp;
1140 tmp_tmp = ORQI (GETMEMQI (current_cpu, pc, * FLD (i_Ri)), * FLD (i_Rj));
7a292a7a 1141{
c906108c
SS		 1142 {
1143 BI opval = EQQI (tmp_tmp, 0);
1144 CPU (h_zbit) = opval;
1145 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
1146 }
1147 {
1148 BI opval = LTQI (tmp_tmp, 0);
1149 CPU (h_nbit) = opval;
1150 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
1151 }
7a292a7a 1152}
c906108c
SS		 1153 {
1154 QI opval = tmp_tmp;
1155 SETMEMQI (current_cpu, pc, * FLD (i_Ri), opval);
1156 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
1157 }
7a292a7a 1158}
c906108c
SS		 1159
1160#undef FLD
1161}
1162 NEXT (vpc);
1163
1164 CASE (sem, INSN_EORM) : /* eor $Rj,@$Ri */
1165{
1166 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1167 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1168#define FLD(f) abuf->fields.fmt_andm.f
1169 int UNUSED written = 0;
1170 IADDR UNUSED pc = abuf->addr;
1171 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1172
7a292a7a 1173{
c906108c
SS		 1174 SI tmp_tmp;
1175 tmp_tmp = XORSI (GETMEMSI (current_cpu, pc, * FLD (i_Ri)), * FLD (i_Rj));
7a292a7a 1176{
c906108c
SS		 1177 {
1178 BI opval = EQSI (tmp_tmp, 0);
1179 CPU (h_zbit) = opval;
1180 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
1181 }
1182 {
1183 BI opval = LTSI (tmp_tmp, 0);
1184 CPU (h_nbit) = opval;
1185 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
1186 }
7a292a7a 1187}
c906108c
SS		 1188 {
1189 SI opval = tmp_tmp;
1190 SETMEMSI (current_cpu, pc, * FLD (i_Ri), opval);
1191 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
1192 }
7a292a7a 1193}
c906108c
SS		 1194
1195#undef FLD
1196}
1197 NEXT (vpc);
1198
1199 CASE (sem, INSN_EORH) : /* eorh $Rj,@$Ri */
1200{
1201 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1202 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1203#define FLD(f) abuf->fields.fmt_andh.f
1204 int UNUSED written = 0;
1205 IADDR UNUSED pc = abuf->addr;
1206 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1207
7a292a7a 1208{
c906108c
SS		 1209 HI tmp_tmp;
1210 tmp_tmp = XORHI (GETMEMHI (current_cpu, pc, * FLD (i_Ri)), * FLD (i_Rj));
7a292a7a 1211{
c906108c
SS		 1212 {
1213 BI opval = EQHI (tmp_tmp, 0);
1214 CPU (h_zbit) = opval;
1215 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
1216 }
1217 {
1218 BI opval = LTHI (tmp_tmp, 0);
1219 CPU (h_nbit) = opval;
1220 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
1221 }
7a292a7a 1222}
c906108c
SS		 1223 {
1224 HI opval = tmp_tmp;
1225 SETMEMHI (current_cpu, pc, * FLD (i_Ri), opval);
1226 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
1227 }
7a292a7a 1228}
c906108c
SS		 1229
1230#undef FLD
1231}
1232 NEXT (vpc);
1233
1234 CASE (sem, INSN_EORB) : /* eorb $Rj,@$Ri */
1235{
1236 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1237 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1238#define FLD(f) abuf->fields.fmt_andb.f
1239 int UNUSED written = 0;
1240 IADDR UNUSED pc = abuf->addr;
1241 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1242
7a292a7a 1243{
c906108c
SS		 1244 QI tmp_tmp;
1245 tmp_tmp = XORQI (GETMEMQI (current_cpu, pc, * FLD (i_Ri)), * FLD (i_Rj));
7a292a7a 1246{
c906108c
SS		 1247 {
1248 BI opval = EQQI (tmp_tmp, 0);
1249 CPU (h_zbit) = opval;
1250 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
1251 }
1252 {
1253 BI opval = LTQI (tmp_tmp, 0);
1254 CPU (h_nbit) = opval;
1255 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
1256 }
7a292a7a 1257}
c906108c
SS		 1258 {
1259 QI opval = tmp_tmp;
1260 SETMEMQI (current_cpu, pc, * FLD (i_Ri), opval);
1261 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
1262 }
7a292a7a 1263}
c906108c
SS		 1264
1265#undef FLD
1266}
1267 NEXT (vpc);
1268
1269 CASE (sem, INSN_BANDL) : /* bandl $u4,@$Ri */
1270{
1271 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1272 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1273#define FLD(f) abuf->fields.fmt_bandl.f
1274 int UNUSED written = 0;
1275 IADDR UNUSED pc = abuf->addr;
1276 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1277
1278 {
1279 QI opval = ANDQI (ORQI (FLD (f_u4), 240), GETMEMQI (current_cpu, pc, * FLD (i_Ri)));
1280 SETMEMQI (current_cpu, pc, * FLD (i_Ri), opval);
1281 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
1282 }
1283
1284#undef FLD
1285}
1286 NEXT (vpc);
1287
1288 CASE (sem, INSN_BORL) : /* borl $u4,@$Ri */
1289{
1290 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1291 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1292#define FLD(f) abuf->fields.fmt_bandl.f
1293 int UNUSED written = 0;
1294 IADDR UNUSED pc = abuf->addr;
1295 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1296
1297 {
1298 QI opval = ORQI (FLD (f_u4), GETMEMQI (current_cpu, pc, * FLD (i_Ri)));
1299 SETMEMQI (current_cpu, pc, * FLD (i_Ri), opval);
1300 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
1301 }
1302
1303#undef FLD
1304}
1305 NEXT (vpc);
1306
1307 CASE (sem, INSN_BEORL) : /* beorl $u4,@$Ri */
1308{
1309 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1310 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1311#define FLD(f) abuf->fields.fmt_bandl.f
1312 int UNUSED written = 0;
1313 IADDR UNUSED pc = abuf->addr;
1314 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1315
1316 {
1317 QI opval = XORQI (FLD (f_u4), GETMEMQI (current_cpu, pc, * FLD (i_Ri)));
1318 SETMEMQI (current_cpu, pc, * FLD (i_Ri), opval);
1319 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
1320 }
1321
1322#undef FLD
1323}
1324 NEXT (vpc);
1325
1326 CASE (sem, INSN_BANDH) : /* bandh $u4,@$Ri */
1327{
1328 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1329 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1330#define FLD(f) abuf->fields.fmt_bandl.f
1331 int UNUSED written = 0;
1332 IADDR UNUSED pc = abuf->addr;
1333 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1334
1335 {
1336 QI opval = ANDQI (ORQI (SLLQI (FLD (f_u4), 4), 15), GETMEMQI (current_cpu, pc, * FLD (i_Ri)));
1337 SETMEMQI (current_cpu, pc, * FLD (i_Ri), opval);
1338 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
1339 }
1340
1341#undef FLD
1342}
1343 NEXT (vpc);
1344
1345 CASE (sem, INSN_BORH) : /* borh $u4,@$Ri */
1346{
1347 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1348 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1349#define FLD(f) abuf->fields.fmt_bandl.f
1350 int UNUSED written = 0;
1351 IADDR UNUSED pc = abuf->addr;
1352 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1353
1354 {
1355 QI opval = ORQI (SLLQI (FLD (f_u4), 4), GETMEMQI (current_cpu, pc, * FLD (i_Ri)));
1356 SETMEMQI (current_cpu, pc, * FLD (i_Ri), opval);
1357 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
1358 }
1359
1360#undef FLD
1361}
1362 NEXT (vpc);
1363
1364 CASE (sem, INSN_BEORH) : /* beorh $u4,@$Ri */
1365{
1366 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1367 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1368#define FLD(f) abuf->fields.fmt_bandl.f
1369 int UNUSED written = 0;
1370 IADDR UNUSED pc = abuf->addr;
1371 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1372
1373 {
1374 QI opval = XORQI (SLLQI (FLD (f_u4), 4), GETMEMQI (current_cpu, pc, * FLD (i_Ri)));
1375 SETMEMQI (current_cpu, pc, * FLD (i_Ri), opval);
1376 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
1377 }
1378
1379#undef FLD
1380}
1381 NEXT (vpc);
1382
1383 CASE (sem, INSN_BTSTL) : /* btstl $u4,@$Ri */
1384{
1385 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1386 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1387#define FLD(f) abuf->fields.fmt_btstl.f
1388 int UNUSED written = 0;
1389 IADDR UNUSED pc = abuf->addr;
1390 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1391
7a292a7a 1392{
c906108c
SS		 1393 QI tmp_tmp;
1394 tmp_tmp = ANDQI (FLD (f_u4), GETMEMQI (current_cpu, pc, * FLD (i_Ri)));
1395 {
1396 BI opval = EQQI (tmp_tmp, 0);
1397 CPU (h_zbit) = opval;
1398 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
1399 }
1400 {
1401 BI opval = 0;
1402 CPU (h_nbit) = opval;
1403 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
1404 }
7a292a7a 1405}
c906108c
SS		 1406
1407#undef FLD
1408}
1409 NEXT (vpc);
1410
1411 CASE (sem, INSN_BTSTH) : /* btsth $u4,@$Ri */
1412{
1413 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1414 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1415#define FLD(f) abuf->fields.fmt_btstl.f
1416 int UNUSED written = 0;
1417 IADDR UNUSED pc = abuf->addr;
1418 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1419
7a292a7a 1420{
c906108c
SS		 1421 QI tmp_tmp;
1422 tmp_tmp = ANDQI (SLLQI (FLD (f_u4), 4), GETMEMQI (current_cpu, pc, * FLD (i_Ri)));
1423 {
1424 BI opval = EQQI (tmp_tmp, 0);
1425 CPU (h_zbit) = opval;
1426 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
1427 }
1428 {
1429 BI opval = LTQI (tmp_tmp, 0);
1430 CPU (h_nbit) = opval;
1431 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
1432 }
7a292a7a 1433}
c906108c
SS		 1434
1435#undef FLD
1436}
1437 NEXT (vpc);
1438
1439 CASE (sem, INSN_MUL) : /* mul $Rj,$Ri */
1440{
1441 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1442 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1443#define FLD(f) abuf->fields.fmt_mul.f
1444 int UNUSED written = 0;
1445 IADDR UNUSED pc = abuf->addr;
1446 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1447
7a292a7a 1448{
c906108c
SS		 1449 DI tmp_tmp;
1450 tmp_tmp = MULDI (EXTSIDI (* FLD (i_Rj)), EXTSIDI (* FLD (i_Ri)));
1451 {
1452 SI opval = TRUNCDISI (tmp_tmp);
1453 SET_H_DR (((UINT) 5), opval);
1454 TRACE_RESULT (current_cpu, abuf, "dr-5", 'x', opval);
1455 }
1456 {
1457 SI opval = TRUNCDISI (SRLDI (tmp_tmp, 32));
1458 SET_H_DR (((UINT) 4), opval);
1459 TRACE_RESULT (current_cpu, abuf, "dr-4", 'x', opval);
1460 }
1461 {
1462 BI opval = LTSI (GET_H_DR (((UINT) 5)), 0);
1463 CPU (h_nbit) = opval;
1464 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
1465 }
1466 {
1467 BI opval = EQDI (tmp_tmp, MAKEDI (0, 0));
1468 CPU (h_zbit) = opval;
1469 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
1470 }
1471 {
1472 BI opval = ORIF (GTDI (tmp_tmp, MAKEDI (0, 2147483647)), LTDI (tmp_tmp, NEGDI (MAKEDI (0, 0x80000000))));
1473 CPU (h_vbit) = opval;
1474 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
1475 }
7a292a7a 1476}
c906108c
SS		 1477
1478#undef FLD
1479}
1480 NEXT (vpc);
1481
1482 CASE (sem, INSN_MULU) : /* mulu $Rj,$Ri */
1483{
1484 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1485 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1486#define FLD(f) abuf->fields.fmt_mulu.f
1487 int UNUSED written = 0;
1488 IADDR UNUSED pc = abuf->addr;
1489 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1490
7a292a7a 1491{
c906108c
SS		 1492 DI tmp_tmp;
1493 tmp_tmp = MULDI (ZEXTSIDI (* FLD (i_Rj)), ZEXTSIDI (* FLD (i_Ri)));
1494 {
1495 SI opval = TRUNCDISI (tmp_tmp);
1496 SET_H_DR (((UINT) 5), opval);
1497 TRACE_RESULT (current_cpu, abuf, "dr-5", 'x', opval);
1498 }
1499 {
1500 SI opval = TRUNCDISI (SRLDI (tmp_tmp, 32));
1501 SET_H_DR (((UINT) 4), opval);
1502 TRACE_RESULT (current_cpu, abuf, "dr-4", 'x', opval);
1503 }
1504 {
1505 BI opval = LTSI (GET_H_DR (((UINT) 4)), 0);
1506 CPU (h_nbit) = opval;
1507 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
1508 }
1509 {
1510 BI opval = EQSI (GET_H_DR (((UINT) 5)), 0);
1511 CPU (h_zbit) = opval;
1512 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
1513 }
1514 {
1515 BI opval = NESI (GET_H_DR (((UINT) 4)), 0);
1516 CPU (h_vbit) = opval;
1517 TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval);
1518 }
7a292a7a 1519}
c906108c
SS		 1520
1521#undef FLD
1522}
1523 NEXT (vpc);
1524
1525 CASE (sem, INSN_MULH) : /* mulh $Rj,$Ri */
1526{
1527 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1528 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1529#define FLD(f) abuf->fields.fmt_mulh.f
1530 int UNUSED written = 0;
1531 IADDR UNUSED pc = abuf->addr;
1532 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1533
7a292a7a 1534{
c906108c
SS		 1535 {
1536 SI opval = MULHI (TRUNCSIHI (* FLD (i_Rj)), TRUNCSIHI (* FLD (i_Ri)));
1537 SET_H_DR (((UINT) 5), opval);
1538 TRACE_RESULT (current_cpu, abuf, "dr-5", 'x', opval);
1539 }
1540 {
1541 BI opval = LTSI (GET_H_DR (((UINT) 5)), 0);
1542 CPU (h_nbit) = opval;
1543 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
1544 }
1545 {
1546 BI opval = GESI (GET_H_DR (((UINT) 5)), 0);
1547 CPU (h_zbit) = opval;
1548 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
1549 }
7a292a7a 1550}
c906108c
SS		 1551
1552#undef FLD
1553}
1554 NEXT (vpc);
1555
1556 CASE (sem, INSN_MULUH) : /* muluh $Rj,$Ri */
1557{
1558 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1559 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1560#define FLD(f) abuf->fields.fmt_mulh.f
1561 int UNUSED written = 0;
1562 IADDR UNUSED pc = abuf->addr;
1563 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1564
7a292a7a 1565{
c906108c
SS		 1566 {
1567 SI opval = MULSI (ANDSI (* FLD (i_Rj), 65535), ANDSI (* FLD (i_Ri), 65535));
1568 SET_H_DR (((UINT) 5), opval);
1569 TRACE_RESULT (current_cpu, abuf, "dr-5", 'x', opval);
1570 }
1571 {
1572 BI opval = LTSI (GET_H_DR (((UINT) 5)), 0);
1573 CPU (h_nbit) = opval;
1574 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
1575 }
1576 {
1577 BI opval = GESI (GET_H_DR (((UINT) 5)), 0);
1578 CPU (h_zbit) = opval;
1579 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
1580 }
7a292a7a 1581}
c906108c
SS		 1582
1583#undef FLD
1584}
1585 NEXT (vpc);
1586
1587 CASE (sem, INSN_DIV0S) : /* div0s $Ri */
1588{
1589 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1590 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1591#define FLD(f) abuf->fields.fmt_div0s.f
1592 int UNUSED written = 0;
1593 IADDR UNUSED pc = abuf->addr;
1594 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1595
7a292a7a 1596{
c906108c
SS		 1597 {
1598 BI opval = LTSI (GET_H_DR (((UINT) 5)), 0);
1599 CPU (h_d0bit) = opval;
1600 TRACE_RESULT (current_cpu, abuf, "d0bit", 'x', opval);
1601 }
1602 {
1603 BI opval = XORBI (CPU (h_d0bit), LTSI (* FLD (i_Ri), 0));
1604 CPU (h_d1bit) = opval;
1605 TRACE_RESULT (current_cpu, abuf, "d1bit", 'x', opval);
1606 }
1607if (NEBI (CPU (h_d0bit), 0)) {
1608 {
1609 SI opval = 0xffffffff;
1610 SET_H_DR (((UINT) 4), opval);
1611 written |= (1 << 5);
1612 TRACE_RESULT (current_cpu, abuf, "dr-4", 'x', opval);
1613 }
1614} else {
1615 {
1616 SI opval = 0;
1617 SET_H_DR (((UINT) 4), opval);
1618 written |= (1 << 5);
1619 TRACE_RESULT (current_cpu, abuf, "dr-4", 'x', opval);
1620 }
1621}
7a292a7a 1622}
c906108c
SS		 1623
1624 abuf->written = written;
1625#undef FLD
1626}
1627 NEXT (vpc);
1628
1629 CASE (sem, INSN_DIV0U) : /* div0u $Ri */
1630{
1631 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1632 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1633#define FLD(f) abuf->fields.fmt_div0u.f
1634 int UNUSED written = 0;
1635 IADDR UNUSED pc = abuf->addr;
1636 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1637
7a292a7a 1638{
c906108c
SS		 1639 {
1640 BI opval = 0;
1641 CPU (h_d0bit) = opval;
1642 TRACE_RESULT (current_cpu, abuf, "d0bit", 'x', opval);
1643 }
1644 {
1645 BI opval = 0;
1646 CPU (h_d1bit) = opval;
1647 TRACE_RESULT (current_cpu, abuf, "d1bit", 'x', opval);
1648 }
1649 {
1650 SI opval = 0;
1651 SET_H_DR (((UINT) 4), opval);
1652 TRACE_RESULT (current_cpu, abuf, "dr-4", 'x', opval);
1653 }
7a292a7a 1654}
c906108c
SS		 1655
1656#undef FLD
1657}
1658 NEXT (vpc);
1659
1660 CASE (sem, INSN_DIV1) : /* div1 $Ri */
1661{
1662 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1663 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1664#define FLD(f) abuf->fields.fmt_div1.f
1665 int UNUSED written = 0;
1666 IADDR UNUSED pc = abuf->addr;
1667 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1668
7a292a7a 1669{
c906108c
SS		 1670 SI tmp_tmp;
1671 {
1672 SI opval = SLLSI (GET_H_DR (((UINT) 4)), 1);
1673 SET_H_DR (((UINT) 4), opval);
1674 TRACE_RESULT (current_cpu, abuf, "dr-4", 'x', opval);
1675 }
1676if (LTSI (GET_H_DR (((UINT) 5)), 0)) {
1677 {
1678 SI opval = ADDSI (GET_H_DR (((UINT) 4)), 1);
1679 SET_H_DR (((UINT) 4), opval);
1680 TRACE_RESULT (current_cpu, abuf, "dr-4", 'x', opval);
1681 }
1682}
1683 {
1684 SI opval = SLLSI (GET_H_DR (((UINT) 5)), 1);
1685 SET_H_DR (((UINT) 5), opval);
1686 TRACE_RESULT (current_cpu, abuf, "dr-5", 'x', opval);
1687 }
1688if (EQBI (CPU (h_d1bit), 1)) {
7a292a7a 1689{
c906108c
SS		 1690 tmp_tmp = ADDSI (GET_H_DR (((UINT) 4)), * FLD (i_Ri));
1691 {
1692 BI opval = ADDCFSI (GET_H_DR (((UINT) 4)), * FLD (i_Ri), 0);
1693 CPU (h_cbit) = opval;
1694 written |= (1 << 6);
1695 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
1696 }
7a292a7a 1697}
c906108c 1698} else {
7a292a7a 1699{
c906108c
SS		 1700 tmp_tmp = SUBSI (GET_H_DR (((UINT) 4)), * FLD (i_Ri));
1701 {
1702 BI opval = SUBCFSI (GET_H_DR (((UINT) 4)), * FLD (i_Ri), 0);
1703 CPU (h_cbit) = opval;
1704 written |= (1 << 6);
1705 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
1706 }
7a292a7a 1707}
c906108c
SS		 1708}
1709if (NOTBI (XORBI (XORBI (CPU (h_d0bit), CPU (h_d1bit)), CPU (h_cbit)))) {
7a292a7a 1710{
c906108c
SS		 1711 {
1712 SI opval = tmp_tmp;
1713 SET_H_DR (((UINT) 4), opval);
1714 TRACE_RESULT (current_cpu, abuf, "dr-4", 'x', opval);
1715 }
1716 {
1717 SI opval = ORSI (GET_H_DR (((UINT) 5)), 1);
1718 SET_H_DR (((UINT) 5), opval);
1719 TRACE_RESULT (current_cpu, abuf, "dr-5", 'x', opval);
1720 }
7a292a7a 1721}
c906108c
SS		 1722}
1723 {
1724 BI opval = EQSI (GET_H_DR (((UINT) 4)), 0);
1725 CPU (h_zbit) = opval;
1726 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
1727 }
7a292a7a 1728}
c906108c
SS		 1729
1730 abuf->written = written;
1731#undef FLD
1732}
1733 NEXT (vpc);
1734
1735 CASE (sem, INSN_DIV2) : /* div2 $Ri */
1736{
1737 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1738 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1739#define FLD(f) abuf->fields.fmt_div2.f
1740 int UNUSED written = 0;
1741 IADDR UNUSED pc = abuf->addr;
1742 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1743
7a292a7a 1744{
c906108c
SS		 1745 SI tmp_tmp;
1746if (EQBI (CPU (h_d1bit), 1)) {
7a292a7a 1747{
c906108c
SS		 1748 tmp_tmp = ADDSI (GET_H_DR (((UINT) 4)), * FLD (i_Ri));
1749 {
1750 BI opval = ADDCFSI (GET_H_DR (((UINT) 4)), * FLD (i_Ri), 0);
1751 CPU (h_cbit) = opval;
1752 written |= (1 << 3);
1753 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
1754 }
7a292a7a 1755}
c906108c 1756} else {
7a292a7a 1757{
c906108c
SS		 1758 tmp_tmp = SUBSI (GET_H_DR (((UINT) 4)), * FLD (i_Ri));
1759 {
1760 BI opval = SUBCFSI (GET_H_DR (((UINT) 4)), * FLD (i_Ri), 0);
1761 CPU (h_cbit) = opval;
1762 written |= (1 << 3);
1763 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
1764 }
7a292a7a 1765}
c906108c
SS		 1766}
1767if (EQSI (tmp_tmp, 0)) {
7a292a7a 1768{
c906108c
SS		 1769 {
1770 BI opval = 1;
1771 CPU (h_zbit) = opval;
1772 written |= (1 << 5);
1773 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
1774 }
1775 {
1776 SI opval = 0;
1777 SET_H_DR (((UINT) 4), opval);
1778 written |= (1 << 4);
1779 TRACE_RESULT (current_cpu, abuf, "dr-4", 'x', opval);
1780 }
7a292a7a 1781}
c906108c
SS		 1782} else {
1783 {
1784 BI opval = 0;
1785 CPU (h_zbit) = opval;
1786 written |= (1 << 5);
1787 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
1788 }
1789}
7a292a7a 1790}
c906108c
SS		 1791
1792 abuf->written = written;
1793#undef FLD
1794}
1795 NEXT (vpc);
1796
1797 CASE (sem, INSN_DIV3) : /* div3 */
1798{
1799 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1800 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1801#define FLD(f) abuf->fields.fmt_div3.f
1802 int UNUSED written = 0;
1803 IADDR UNUSED pc = abuf->addr;
1804 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1805
1806if (EQBI (CPU (h_zbit), 1)) {
1807 {
1808 SI opval = ADDSI (GET_H_DR (((UINT) 5)), 1);
1809 SET_H_DR (((UINT) 5), opval);
1810 written |= (1 << 2);
1811 TRACE_RESULT (current_cpu, abuf, "dr-5", 'x', opval);
1812 }
1813}
1814
1815 abuf->written = written;
1816#undef FLD
1817}
1818 NEXT (vpc);
1819
1820 CASE (sem, INSN_DIV4S) : /* div4s */
1821{
1822 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1823 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1824#define FLD(f) abuf->fields.fmt_div4s.f
1825 int UNUSED written = 0;
1826 IADDR UNUSED pc = abuf->addr;
1827 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1828
1829if (EQBI (CPU (h_d1bit), 1)) {
1830 {
1831 SI opval = NEGSI (GET_H_DR (((UINT) 5)));
1832 SET_H_DR (((UINT) 5), opval);
1833 written |= (1 << 2);
1834 TRACE_RESULT (current_cpu, abuf, "dr-5", 'x', opval);
1835 }
1836}
1837
1838 abuf->written = written;
1839#undef FLD
1840}
1841 NEXT (vpc);
1842
1843 CASE (sem, INSN_LSL) : /* lsl $Rj,$Ri */
1844{
1845 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1846 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1847#define FLD(f) abuf->fields.fmt_lsl.f
1848 int UNUSED written = 0;
1849 IADDR UNUSED pc = abuf->addr;
1850 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1851
7a292a7a 1852{
c906108c
SS		 1853 SI tmp_shift;
1854 tmp_shift = ANDSI (* FLD (i_Rj), 31);
1855if (NESI (tmp_shift, 0)) {
7a292a7a 1856{
c906108c
SS		 1857 {
1858 BI opval = NESI (ANDSI (* FLD (i_Ri), SLLSI (1, SUBSI (32, tmp_shift))), 0);
1859 CPU (h_cbit) = opval;
1860 written |= (1 << 3);
1861 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
1862 }
1863 {
1864 SI opval = SLLSI (* FLD (i_Ri), tmp_shift);
1865 * FLD (i_Ri) = opval;
1866 written |= (1 << 2);
1867 TRACE_RESULT (current_cpu, abuf, "Ri", 'x', opval);
1868 }
7a292a7a 1869}
c906108c
SS		 1870} else {
1871 {
1872 BI opval = 0;
1873 CPU (h_cbit) = opval;
1874 written |= (1 << 3);
1875 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
1876 }
1877}
1878 {
1879 BI opval = LTSI (* FLD (i_Ri), 0);
1880 CPU (h_nbit) = opval;
1881 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
1882 }
1883 {
1884 BI opval = EQSI (* FLD (i_Ri), 0);
1885 CPU (h_zbit) = opval;
1886 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
1887 }
7a292a7a 1888}
c906108c
SS		 1889
1890 abuf->written = written;
1891#undef FLD
1892}
1893 NEXT (vpc);
1894
1895 CASE (sem, INSN_LSLI) : /* lsl $u4,$Ri */
1896{
1897 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1898 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1899#define FLD(f) abuf->fields.fmt_lsli.f
1900 int UNUSED written = 0;
1901 IADDR UNUSED pc = abuf->addr;
1902 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1903
7a292a7a 1904{
c906108c
SS		 1905 SI tmp_shift;
1906 tmp_shift = FLD (f_u4);
1907if (NESI (tmp_shift, 0)) {
7a292a7a 1908{
c906108c
SS		 1909 {
1910 BI opval = NESI (ANDSI (* FLD (i_Ri), SLLSI (1, SUBSI (32, tmp_shift))), 0);
1911 CPU (h_cbit) = opval;
1912 written |= (1 << 3);
1913 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
1914 }
1915 {
1916 SI opval = SLLSI (* FLD (i_Ri), tmp_shift);
1917 * FLD (i_Ri) = opval;
1918 written |= (1 << 2);
1919 TRACE_RESULT (current_cpu, abuf, "Ri", 'x', opval);
1920 }
7a292a7a 1921}
c906108c
SS		 1922} else {
1923 {
1924 BI opval = 0;
1925 CPU (h_cbit) = opval;
1926 written |= (1 << 3);
1927 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
1928 }
1929}
1930 {
1931 BI opval = LTSI (* FLD (i_Ri), 0);
1932 CPU (h_nbit) = opval;
1933 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
1934 }
1935 {
1936 BI opval = EQSI (* FLD (i_Ri), 0);
1937 CPU (h_zbit) = opval;
1938 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
1939 }
7a292a7a 1940}
c906108c
SS		 1941
1942 abuf->written = written;
1943#undef FLD
1944}
1945 NEXT (vpc);
1946
1947 CASE (sem, INSN_LSL2) : /* lsl2 $u4,$Ri */
1948{
1949 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1950 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1951#define FLD(f) abuf->fields.fmt_lsli.f
1952 int UNUSED written = 0;
1953 IADDR UNUSED pc = abuf->addr;
1954 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1955
7a292a7a 1956{
c906108c
SS		 1957 SI tmp_shift;
1958 tmp_shift = ADDSI (FLD (f_u4), 16);
1959if (NESI (tmp_shift, 0)) {
7a292a7a 1960{
c906108c
SS		 1961 {
1962 BI opval = NESI (ANDSI (* FLD (i_Ri), SLLSI (1, SUBSI (32, tmp_shift))), 0);
1963 CPU (h_cbit) = opval;
1964 written |= (1 << 3);
1965 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
1966 }
1967 {
1968 SI opval = SLLSI (* FLD (i_Ri), tmp_shift);
1969 * FLD (i_Ri) = opval;
1970 written |= (1 << 2);
1971 TRACE_RESULT (current_cpu, abuf, "Ri", 'x', opval);
1972 }
7a292a7a 1973}
c906108c
SS		 1974} else {
1975 {
1976 BI opval = 0;
1977 CPU (h_cbit) = opval;
1978 written |= (1 << 3);
1979 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
1980 }
1981}
1982 {
1983 BI opval = LTSI (* FLD (i_Ri), 0);
1984 CPU (h_nbit) = opval;
1985 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
1986 }
1987 {
1988 BI opval = EQSI (* FLD (i_Ri), 0);
1989 CPU (h_zbit) = opval;
1990 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
1991 }
7a292a7a 1992}
c906108c
SS		 1993
1994 abuf->written = written;
1995#undef FLD
1996}
1997 NEXT (vpc);
1998
1999 CASE (sem, INSN_LSR) : /* lsr $Rj,$Ri */
2000{
2001 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2002 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2003#define FLD(f) abuf->fields.fmt_lsl.f
2004 int UNUSED written = 0;
2005 IADDR UNUSED pc = abuf->addr;
2006 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2007
7a292a7a 2008{
c906108c
SS		 2009 SI tmp_shift;
2010 tmp_shift = ANDSI (* FLD (i_Rj), 31);
2011if (NESI (tmp_shift, 0)) {
7a292a7a 2012{
c906108c
SS		 2013 {
2014 BI opval = NESI (ANDSI (* FLD (i_Ri), SLLSI (1, SUBSI (tmp_shift, 1))), 0);
2015 CPU (h_cbit) = opval;
2016 written |= (1 << 3);
2017 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
2018 }
2019 {
2020 SI opval = SRLSI (* FLD (i_Ri), tmp_shift);
2021 * FLD (i_Ri) = opval;
2022 written |= (1 << 2);
2023 TRACE_RESULT (current_cpu, abuf, "Ri", 'x', opval);
2024 }
7a292a7a 2025}
c906108c
SS		 2026} else {
2027 {
2028 BI opval = 0;
2029 CPU (h_cbit) = opval;
2030 written |= (1 << 3);
2031 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
2032 }
2033}
2034 {
2035 BI opval = LTSI (* FLD (i_Ri), 0);
2036 CPU (h_nbit) = opval;
2037 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
2038 }
2039 {
2040 BI opval = EQSI (* FLD (i_Ri), 0);
2041 CPU (h_zbit) = opval;
2042 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
2043 }
7a292a7a 2044}
c906108c
SS		 2045
2046 abuf->written = written;
2047#undef FLD
2048}
2049 NEXT (vpc);
2050
2051 CASE (sem, INSN_LSRI) : /* lsr $u4,$Ri */
2052{
2053 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2054 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2055#define FLD(f) abuf->fields.fmt_lsli.f
2056 int UNUSED written = 0;
2057 IADDR UNUSED pc = abuf->addr;
2058 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2059
7a292a7a 2060{
c906108c
SS		 2061 SI tmp_shift;
2062 tmp_shift = FLD (f_u4);
2063if (NESI (tmp_shift, 0)) {
7a292a7a 2064{
c906108c
SS		 2065 {
2066 BI opval = NESI (ANDSI (* FLD (i_Ri), SLLSI (1, SUBSI (tmp_shift, 1))), 0);
2067 CPU (h_cbit) = opval;
2068 written |= (1 << 3);
2069 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
2070 }
2071 {
2072 SI opval = SRLSI (* FLD (i_Ri), tmp_shift);
2073 * FLD (i_Ri) = opval;
2074 written |= (1 << 2);
2075 TRACE_RESULT (current_cpu, abuf, "Ri", 'x', opval);
2076 }
7a292a7a 2077}
c906108c
SS		 2078} else {
2079 {
2080 BI opval = 0;
2081 CPU (h_cbit) = opval;
2082 written |= (1 << 3);
2083 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
2084 }
2085}
2086 {
2087 BI opval = LTSI (* FLD (i_Ri), 0);
2088 CPU (h_nbit) = opval;
2089 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
2090 }
2091 {
2092 BI opval = EQSI (* FLD (i_Ri), 0);
2093 CPU (h_zbit) = opval;
2094 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
2095 }
7a292a7a 2096}
c906108c
SS		 2097
2098 abuf->written = written;
2099#undef FLD
2100}
2101 NEXT (vpc);
2102
2103 CASE (sem, INSN_LSR2) : /* lsr2 $u4,$Ri */
2104{
2105 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2106 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2107#define FLD(f) abuf->fields.fmt_lsli.f
2108 int UNUSED written = 0;
2109 IADDR UNUSED pc = abuf->addr;
2110 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2111
7a292a7a 2112{
c906108c
SS		 2113 SI tmp_shift;
2114 tmp_shift = ADDSI (FLD (f_u4), 16);
2115if (NESI (tmp_shift, 0)) {
7a292a7a 2116{
c906108c
SS		 2117 {
2118 BI opval = NESI (ANDSI (* FLD (i_Ri), SLLSI (1, SUBSI (tmp_shift, 1))), 0);
2119 CPU (h_cbit) = opval;
2120 written |= (1 << 3);
2121 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
2122 }
2123 {
2124 SI opval = SRLSI (* FLD (i_Ri), tmp_shift);
2125 * FLD (i_Ri) = opval;
2126 written |= (1 << 2);
2127 TRACE_RESULT (current_cpu, abuf, "Ri", 'x', opval);
2128 }
7a292a7a 2129}
c906108c
SS		 2130} else {
2131 {
2132 BI opval = 0;
2133 CPU (h_cbit) = opval;
2134 written |= (1 << 3);
2135 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
2136 }
2137}
2138 {
2139 BI opval = LTSI (* FLD (i_Ri), 0);
2140 CPU (h_nbit) = opval;
2141 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
2142 }
2143 {
2144 BI opval = EQSI (* FLD (i_Ri), 0);
2145 CPU (h_zbit) = opval;
2146 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
2147 }
7a292a7a 2148}
c906108c
SS		 2149
2150 abuf->written = written;
2151#undef FLD
2152}
2153 NEXT (vpc);
2154
2155 CASE (sem, INSN_ASR) : /* asr $Rj,$Ri */
2156{
2157 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2158 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2159#define FLD(f) abuf->fields.fmt_lsl.f
2160 int UNUSED written = 0;
2161 IADDR UNUSED pc = abuf->addr;
2162 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2163
7a292a7a 2164{
c906108c
SS		 2165 SI tmp_shift;
2166 tmp_shift = ANDSI (* FLD (i_Rj), 31);
2167if (NESI (tmp_shift, 0)) {
7a292a7a 2168{
c906108c
SS		 2169 {
2170 BI opval = NESI (ANDSI (* FLD (i_Ri), SLLSI (1, SUBSI (tmp_shift, 1))), 0);
2171 CPU (h_cbit) = opval;
2172 written |= (1 << 3);
2173 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
2174 }
2175 {
2176 SI opval = SRASI (* FLD (i_Ri), tmp_shift);
2177 * FLD (i_Ri) = opval;
2178 written |= (1 << 2);
2179 TRACE_RESULT (current_cpu, abuf, "Ri", 'x', opval);
2180 }
7a292a7a 2181}
c906108c
SS		 2182} else {
2183 {
2184 BI opval = 0;
2185 CPU (h_cbit) = opval;
2186 written |= (1 << 3);
2187 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
2188 }
2189}
2190 {
2191 BI opval = LTSI (* FLD (i_Ri), 0);
2192 CPU (h_nbit) = opval;
2193 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
2194 }
2195 {
2196 BI opval = EQSI (* FLD (i_Ri), 0);
2197 CPU (h_zbit) = opval;
2198 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
2199 }
7a292a7a 2200}
c906108c
SS		 2201
2202 abuf->written = written;
2203#undef FLD
2204}
2205 NEXT (vpc);
2206
2207 CASE (sem, INSN_ASRI) : /* asr $u4,$Ri */
2208{
2209 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2210 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2211#define FLD(f) abuf->fields.fmt_lsli.f
2212 int UNUSED written = 0;
2213 IADDR UNUSED pc = abuf->addr;
2214 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2215
7a292a7a 2216{
c906108c
SS		 2217 SI tmp_shift;
2218 tmp_shift = FLD (f_u4);
2219if (NESI (tmp_shift, 0)) {
7a292a7a 2220{
c906108c
SS		 2221 {
2222 BI opval = NESI (ANDSI (* FLD (i_Ri), SLLSI (1, SUBSI (tmp_shift, 1))), 0);
2223 CPU (h_cbit) = opval;
2224 written |= (1 << 3);
2225 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
2226 }
2227 {
2228 SI opval = SRASI (* FLD (i_Ri), tmp_shift);
2229 * FLD (i_Ri) = opval;
2230 written |= (1 << 2);
2231 TRACE_RESULT (current_cpu, abuf, "Ri", 'x', opval);
2232 }
7a292a7a 2233}
c906108c
SS		 2234} else {
2235 {
2236 BI opval = 0;
2237 CPU (h_cbit) = opval;
2238 written |= (1 << 3);
2239 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
2240 }
2241}
2242 {
2243 BI opval = LTSI (* FLD (i_Ri), 0);
2244 CPU (h_nbit) = opval;
2245 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
2246 }
2247 {
2248 BI opval = EQSI (* FLD (i_Ri), 0);
2249 CPU (h_zbit) = opval;
2250 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
2251 }
7a292a7a 2252}
c906108c
SS		 2253
2254 abuf->written = written;
2255#undef FLD
2256}
2257 NEXT (vpc);
2258
2259 CASE (sem, INSN_ASR2) : /* asr2 $u4,$Ri */
2260{
2261 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2262 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2263#define FLD(f) abuf->fields.fmt_lsli.f
2264 int UNUSED written = 0;
2265 IADDR UNUSED pc = abuf->addr;
2266 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2267
7a292a7a 2268{
c906108c
SS		 2269 SI tmp_shift;
2270 tmp_shift = ADDSI (FLD (f_u4), 16);
2271if (NESI (tmp_shift, 0)) {
7a292a7a 2272{
c906108c
SS		 2273 {
2274 BI opval = NESI (ANDSI (* FLD (i_Ri), SLLSI (1, SUBSI (tmp_shift, 1))), 0);
2275 CPU (h_cbit) = opval;
2276 written |= (1 << 3);
2277 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
2278 }
2279 {
2280 SI opval = SRASI (* FLD (i_Ri), tmp_shift);
2281 * FLD (i_Ri) = opval;
2282 written |= (1 << 2);
2283 TRACE_RESULT (current_cpu, abuf, "Ri", 'x', opval);
2284 }
7a292a7a 2285}
c906108c
SS		 2286} else {
2287 {
2288 BI opval = 0;
2289 CPU (h_cbit) = opval;
2290 written |= (1 << 3);
2291 TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval);
2292 }
2293}
2294 {
2295 BI opval = LTSI (* FLD (i_Ri), 0);
2296 CPU (h_nbit) = opval;
2297 TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval);
2298 }
2299 {
2300 BI opval = EQSI (* FLD (i_Ri), 0);
2301 CPU (h_zbit) = opval;
2302 TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval);
2303 }
7a292a7a 2304}
c906108c
SS		 2305
2306 abuf->written = written;
2307#undef FLD
2308}
2309 NEXT (vpc);
2310
2311 CASE (sem, INSN_LDI8) : /* ldi:8 $i8,$Ri */
2312{
2313 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2314 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2315#define FLD(f) abuf->fields.fmt_ldi8.f
2316 int UNUSED written = 0;
2317 IADDR UNUSED pc = abuf->addr;
2318 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2319
2320 {
2321 SI opval = FLD (f_i8);
2322 * FLD (i_Ri) = opval;
2323 TRACE_RESULT (current_cpu, abuf, "Ri", 'x', opval);
2324 }
2325
2326#undef FLD
2327}
2328 NEXT (vpc);
2329
2330 CASE (sem, INSN_LDI20) : /* ldi:20 $i20,$Ri */
2331{
2332 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2333 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2334#define FLD(f) abuf->fields.fmt_ldi20.f
2335 int UNUSED written = 0;
2336 IADDR UNUSED pc = abuf->addr;
2337 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2338
2339 {
2340 SI opval = FLD (f_i20);
2341 * FLD (i_Ri) = opval;
2342 TRACE_RESULT (current_cpu, abuf, "Ri", 'x', opval);
2343 }
2344
2345#undef FLD
2346}
2347 NEXT (vpc);
2348
2349 CASE (sem, INSN_LDI32) : /* ldi:32 $i32,$Ri */
2350{
2351 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2352 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2353#define FLD(f) abuf->fields.fmt_ldi32.f
2354 int UNUSED written = 0;
2355 IADDR UNUSED pc = abuf->addr;
2356 vpc = SEM_NEXT_VPC (sem_arg, pc, 6);
2357
2358 {
2359 SI opval = FLD (f_i32);
2360 * FLD (i_Ri) = opval;
2361 TRACE_RESULT (current_cpu, abuf, "Ri", 'x', opval);
2362 }
2363
2364#undef FLD
2365}
2366 NEXT (vpc);
2367
2368 CASE (sem, INSN_LD) : /* ld @$Rj,$Ri */
2369{
2370 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2371 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2372#define FLD(f) abuf->fields.fmt_ld.f
2373 int UNUSED written = 0;
2374 IADDR UNUSED pc = abuf->addr;
2375 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2376
2377 {
2378 SI opval = GETMEMSI (current_cpu, pc, * FLD (i_Rj));
2379 * FLD (i_Ri) = opval;
2380 TRACE_RESULT (current_cpu, abuf, "Ri", 'x', opval);
2381 }
2382
2383#undef FLD
2384}
2385 NEXT (vpc);
2386
2387 CASE (sem, INSN_LDUH) : /* lduh @$Rj,$Ri */
2388{
2389 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2390 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2391#define FLD(f) abuf->fields.fmt_lduh.f
2392 int UNUSED written = 0;
2393 IADDR UNUSED pc = abuf->addr;
2394 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2395
2396 {
2397 SI opval = GETMEMUHI (current_cpu, pc, * FLD (i_Rj));
2398 * FLD (i_Ri) = opval;
2399 TRACE_RESULT (current_cpu, abuf, "Ri", 'x', opval);
2400 }
2401
2402#undef FLD
2403}
2404 NEXT (vpc);
2405
2406 CASE (sem, INSN_LDUB) : /* ldub @$Rj,$Ri */
2407{
2408 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2409 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2410#define FLD(f) abuf->fields.fmt_ldub.f
2411 int UNUSED written = 0;
2412 IADDR UNUSED pc = abuf->addr;
2413 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2414
2415 {
2416 SI opval = GETMEMUQI (current_cpu, pc, * FLD (i_Rj));
2417 * FLD (i_Ri) = opval;
2418 TRACE_RESULT (current_cpu, abuf, "Ri", 'x', opval);
2419 }
2420
2421#undef FLD
2422}
2423 NEXT (vpc);
2424
2425 CASE (sem, INSN_LDR13) : /* ld @($R13,$Rj),$Ri */
2426{
2427 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2428 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2429#define FLD(f) abuf->fields.fmt_ldr13.f
2430 int UNUSED written = 0;
2431 IADDR UNUSED pc = abuf->addr;
2432 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2433
2434 {
2435 SI opval = GETMEMSI (current_cpu, pc, ADDSI (* FLD (i_Rj), CPU (h_gr[((UINT) 13)])));
2436 * FLD (i_Ri) = opval;
2437 TRACE_RESULT (current_cpu, abuf, "Ri", 'x', opval);
2438 }
2439
2440#undef FLD
2441}
2442 NEXT (vpc);
2443
2444 CASE (sem, INSN_LDR13UH) : /* lduh @($R13,$Rj),$Ri */
2445{
2446 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2447 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2448#define FLD(f) abuf->fields.fmt_ldr13uh.f
2449 int UNUSED written = 0;
2450 IADDR UNUSED pc = abuf->addr;
2451 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2452
2453 {
2454 SI opval = GETMEMUHI (current_cpu, pc, ADDSI (* FLD (i_Rj), CPU (h_gr[((UINT) 13)])));
2455 * FLD (i_Ri) = opval;
2456 TRACE_RESULT (current_cpu, abuf, "Ri", 'x', opval);
2457 }
2458
2459#undef FLD
2460}
2461 NEXT (vpc);
2462
2463 CASE (sem, INSN_LDR13UB) : /* ldub @($R13,$Rj),$Ri */
2464{
2465 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2466 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2467#define FLD(f) abuf->fields.fmt_ldr13ub.f
2468 int UNUSED written = 0;
2469 IADDR UNUSED pc = abuf->addr;
2470 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2471
2472 {
2473 SI opval = GETMEMUQI (current_cpu, pc, ADDSI (* FLD (i_Rj), CPU (h_gr[((UINT) 13)])));
2474 * FLD (i_Ri) = opval;
2475 TRACE_RESULT (current_cpu, abuf, "Ri", 'x', opval);
2476 }
2477
2478#undef FLD
2479}
2480 NEXT (vpc);
2481
2482 CASE (sem, INSN_LDR14) : /* ld @($R14,$disp10),$Ri */
2483{
2484 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2485 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2486#define FLD(f) abuf->fields.fmt_ldr14.f
2487 int UNUSED written = 0;
2488 IADDR UNUSED pc = abuf->addr;
2489 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2490
2491 {
2492 SI opval = GETMEMSI (current_cpu, pc, ADDSI (FLD (f_disp10), CPU (h_gr[((UINT) 14)])));
2493 * FLD (i_Ri) = opval;
2494 TRACE_RESULT (current_cpu, abuf, "Ri", 'x', opval);
2495 }
2496
2497#undef FLD
2498}
2499 NEXT (vpc);
2500
2501 CASE (sem, INSN_LDR14UH) : /* lduh @($R14,$disp9),$Ri */
2502{
2503 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2504 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2505#define FLD(f) abuf->fields.fmt_ldr14uh.f
2506 int UNUSED written = 0;
2507 IADDR UNUSED pc = abuf->addr;
2508 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2509
2510 {
2511 SI opval = GETMEMUHI (current_cpu, pc, ADDSI (FLD (f_disp9), CPU (h_gr[((UINT) 14)])));
2512 * FLD (i_Ri) = opval;
2513 TRACE_RESULT (current_cpu, abuf, "Ri", 'x', opval);
2514 }
2515
2516#undef FLD
2517}
2518 NEXT (vpc);
2519
2520 CASE (sem, INSN_LDR14UB) : /* ldub @($R14,$disp8),$Ri */
2521{
2522 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2523 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2524#define FLD(f) abuf->fields.fmt_ldr14ub.f
2525 int UNUSED written = 0;
2526 IADDR UNUSED pc = abuf->addr;
2527 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2528
2529 {
2530 SI opval = GETMEMUQI (current_cpu, pc, ADDSI (FLD (f_disp8), CPU (h_gr[((UINT) 14)])));
2531 * FLD (i_Ri) = opval;
2532 TRACE_RESULT (current_cpu, abuf, "Ri", 'x', opval);
2533 }
2534
2535#undef FLD
2536}
2537 NEXT (vpc);
2538
2539 CASE (sem, INSN_LDR15) : /* ld @($R15,$udisp6),$Ri */
2540{
2541 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2542 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2543#define FLD(f) abuf->fields.fmt_ldr15.f
2544 int UNUSED written = 0;
2545 IADDR UNUSED pc = abuf->addr;
2546 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2547
2548 {
2549 SI opval = GETMEMSI (current_cpu, pc, ADDSI (FLD (f_udisp6), CPU (h_gr[((UINT) 15)])));
2550 * FLD (i_Ri) = opval;
2551 TRACE_RESULT (current_cpu, abuf, "Ri", 'x', opval);
2552 }
2553
2554#undef FLD
2555}
2556 NEXT (vpc);
2557
2558 CASE (sem, INSN_LDR15GR) : /* ld @$R15+,$Ri */
2559{
2560 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2561 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2562#define FLD(f) abuf->fields.fmt_ldr15gr.f
2563 int UNUSED written = 0;
2564 IADDR UNUSED pc = abuf->addr;
2565 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2566
7a292a7a 2567{
c906108c
SS		 2568 {
2569 SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]));
2570 * FLD (i_Ri) = opval;
2571 TRACE_RESULT (current_cpu, abuf, "Ri", 'x', opval);
2572 }
2573if (NESI (FLD (f_Ri), 15)) {
2574 {
2575 SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4);
2576 CPU (h_gr[((UINT) 15)]) = opval;
2577 written |= (1 << 4);
2578 TRACE_RESULT (current_cpu, abuf, "gr-15", 'x', opval);
2579 }
2580}
7a292a7a 2581}
c906108c
SS		 2582
2583 abuf->written = written;
2584#undef FLD
2585}
2586 NEXT (vpc);
2587
2588 CASE (sem, INSN_LDR15DR) : /* ld @$R15+,$Rs2 */
2589{
2590 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2591 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2592#define FLD(f) abuf->fields.fmt_ldr15dr.f
2593 int UNUSED written = 0;
2594 IADDR UNUSED pc = abuf->addr;
2595 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2596
7a292a7a 2597{
c906108c
SS		 2598 SI tmp_tmp;
2599 tmp_tmp = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]));
2600 {
2601 SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4);
2602 CPU (h_gr[((UINT) 15)]) = opval;
2603 TRACE_RESULT (current_cpu, abuf, "gr-15", 'x', opval);
2604 }
2605 {
2606 SI opval = tmp_tmp;
2607 SET_H_DR (FLD (f_Rs2), opval);
2608 TRACE_RESULT (current_cpu, abuf, "Rs2", 'x', opval);
2609 }
7a292a7a 2610}
c906108c
SS		 2611
2612#undef FLD
2613}
2614 NEXT (vpc);
2615
2616 CASE (sem, INSN_LDR15PS) : /* ld @$R15+,$ps */
2617{
2618 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2619 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2620#define FLD(f) abuf->fields.fmt_ldr15ps.f
2621 int UNUSED written = 0;
2622 IADDR UNUSED pc = abuf->addr;
2623 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2624
7a292a7a 2625{
c906108c
SS		 2626 {
2627 USI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]));
2628 SET_H_PS (opval);
2629 TRACE_RESULT (current_cpu, abuf, "ps", 'x', opval);
2630 }
2631 {
2632 SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4);
2633 CPU (h_gr[((UINT) 15)]) = opval;
2634 TRACE_RESULT (current_cpu, abuf, "gr-15", 'x', opval);
2635 }
7a292a7a 2636}
c906108c
SS		 2637
2638#undef FLD
2639}
2640 NEXT (vpc);
2641
2642 CASE (sem, INSN_ST) : /* st $Ri,@$Rj */
2643{
2644 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2645 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2646#define FLD(f) abuf->fields.fmt_st.f
2647 int UNUSED written = 0;
2648 IADDR UNUSED pc = abuf->addr;
2649 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2650
2651 {
2652 SI opval = * FLD (i_Ri);
2653 SETMEMSI (current_cpu, pc, * FLD (i_Rj), opval);
2654 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2655 }
2656
2657#undef FLD
2658}
2659 NEXT (vpc);
2660
2661 CASE (sem, INSN_STH) : /* sth $Ri,@$Rj */
2662{
2663 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2664 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2665#define FLD(f) abuf->fields.fmt_sth.f
2666 int UNUSED written = 0;
2667 IADDR UNUSED pc = abuf->addr;
2668 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2669
2670 {
2671 HI opval = * FLD (i_Ri);
2672 SETMEMHI (current_cpu, pc, * FLD (i_Rj), opval);
2673 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2674 }
2675
2676#undef FLD
2677}
2678 NEXT (vpc);
2679
2680 CASE (sem, INSN_STB) : /* stb $Ri,@$Rj */
2681{
2682 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2683 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2684#define FLD(f) abuf->fields.fmt_stb.f
2685 int UNUSED written = 0;
2686 IADDR UNUSED pc = abuf->addr;
2687 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2688
2689 {
2690 QI opval = * FLD (i_Ri);
2691 SETMEMQI (current_cpu, pc, * FLD (i_Rj), opval);
2692 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2693 }
2694
2695#undef FLD
2696}
2697 NEXT (vpc);
2698
2699 CASE (sem, INSN_STR13) : /* st $Ri,@($R13,$Rj) */
2700{
2701 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2702 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2703#define FLD(f) abuf->fields.fmt_str13.f
2704 int UNUSED written = 0;
2705 IADDR UNUSED pc = abuf->addr;
2706 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2707
2708 {
2709 SI opval = * FLD (i_Ri);
2710 SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_Rj), CPU (h_gr[((UINT) 13)])), opval);
2711 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2712 }
2713
2714#undef FLD
2715}
2716 NEXT (vpc);
2717
2718 CASE (sem, INSN_STR13H) : /* sth $Ri,@($R13,$Rj) */
2719{
2720 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2721 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2722#define FLD(f) abuf->fields.fmt_str13h.f
2723 int UNUSED written = 0;
2724 IADDR UNUSED pc = abuf->addr;
2725 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2726
2727 {
2728 HI opval = * FLD (i_Ri);
2729 SETMEMHI (current_cpu, pc, ADDSI (* FLD (i_Rj), CPU (h_gr[((UINT) 13)])), opval);
2730 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2731 }
2732
2733#undef FLD
2734}
2735 NEXT (vpc);
2736
2737 CASE (sem, INSN_STR13B) : /* stb $Ri,@($R13,$Rj) */
2738{
2739 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2740 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2741#define FLD(f) abuf->fields.fmt_str13b.f
2742 int UNUSED written = 0;
2743 IADDR UNUSED pc = abuf->addr;
2744 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2745
2746 {
2747 QI opval = * FLD (i_Ri);
2748 SETMEMQI (current_cpu, pc, ADDSI (* FLD (i_Rj), CPU (h_gr[((UINT) 13)])), opval);
2749 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2750 }
2751
2752#undef FLD
2753}
2754 NEXT (vpc);
2755
2756 CASE (sem, INSN_STR14) : /* st $Ri,@($R14,$disp10) */
2757{
2758 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2759 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2760#define FLD(f) abuf->fields.fmt_str14.f
2761 int UNUSED written = 0;
2762 IADDR UNUSED pc = abuf->addr;
2763 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2764
2765 {
2766 SI opval = * FLD (i_Ri);
2767 SETMEMSI (current_cpu, pc, ADDSI (FLD (f_disp10), CPU (h_gr[((UINT) 14)])), opval);
2768 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2769 }
2770
2771#undef FLD
2772}
2773 NEXT (vpc);
2774
2775 CASE (sem, INSN_STR14H) : /* sth $Ri,@($R14,$disp9) */
2776{
2777 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2778 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2779#define FLD(f) abuf->fields.fmt_str14h.f
2780 int UNUSED written = 0;
2781 IADDR UNUSED pc = abuf->addr;
2782 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2783
2784 {
2785 HI opval = * FLD (i_Ri);
2786 SETMEMHI (current_cpu, pc, ADDSI (FLD (f_disp9), CPU (h_gr[((UINT) 14)])), opval);
2787 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2788 }
2789
2790#undef FLD
2791}
2792 NEXT (vpc);
2793
2794 CASE (sem, INSN_STR14B) : /* stb $Ri,@($R14,$disp8) */
2795{
2796 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2797 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2798#define FLD(f) abuf->fields.fmt_str14b.f
2799 int UNUSED written = 0;
2800 IADDR UNUSED pc = abuf->addr;
2801 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2802
2803 {
2804 QI opval = * FLD (i_Ri);
2805 SETMEMQI (current_cpu, pc, ADDSI (FLD (f_disp8), CPU (h_gr[((UINT) 14)])), opval);
2806 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2807 }
2808
2809#undef FLD
2810}
2811 NEXT (vpc);
2812
2813 CASE (sem, INSN_STR15) : /* st $Ri,@($R15,$udisp6) */
2814{
2815 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2816 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2817#define FLD(f) abuf->fields.fmt_str15.f
2818 int UNUSED written = 0;
2819 IADDR UNUSED pc = abuf->addr;
2820 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2821
2822 {
2823 SI opval = * FLD (i_Ri);
2824 SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 15)]), FLD (f_udisp6)), opval);
2825 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2826 }
2827
2828#undef FLD
2829}
2830 NEXT (vpc);
2831
2832 CASE (sem, INSN_STR15GR) : /* st $Ri,@-$R15 */
2833{
2834 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2835 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2836#define FLD(f) abuf->fields.fmt_str15gr.f
2837 int UNUSED written = 0;
2838 IADDR UNUSED pc = abuf->addr;
2839 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2840
7a292a7a 2841{
c906108c
SS		 2842 SI tmp_tmp;
2843 tmp_tmp = * FLD (i_Ri);
2844 {
2845 SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4);
2846 CPU (h_gr[((UINT) 15)]) = opval;
2847 TRACE_RESULT (current_cpu, abuf, "gr-15", 'x', opval);
2848 }
2849 {
2850 SI opval = tmp_tmp;
2851 SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval);
2852 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2853 }
7a292a7a 2854}
c906108c
SS		 2855
2856#undef FLD
2857}
2858 NEXT (vpc);
2859
2860 CASE (sem, INSN_STR15DR) : /* st $Rs2,@-$R15 */
2861{
2862 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2863 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2864#define FLD(f) abuf->fields.fmt_str15dr.f
2865 int UNUSED written = 0;
2866 IADDR UNUSED pc = abuf->addr;
2867 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2868
7a292a7a 2869{
c906108c
SS		 2870 SI tmp_tmp;
2871 tmp_tmp = GET_H_DR (FLD (f_Rs2));
2872 {
2873 SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4);
2874 CPU (h_gr[((UINT) 15)]) = opval;
2875 TRACE_RESULT (current_cpu, abuf, "gr-15", 'x', opval);
2876 }
2877 {
2878 SI opval = tmp_tmp;
2879 SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval);
2880 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2881 }
7a292a7a 2882}
c906108c
SS		 2883
2884#undef FLD
2885}
2886 NEXT (vpc);
2887
2888 CASE (sem, INSN_STR15PS) : /* st $ps,@-$R15 */
2889{
2890 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2891 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2892#define FLD(f) abuf->fields.fmt_str15ps.f
2893 int UNUSED written = 0;
2894 IADDR UNUSED pc = abuf->addr;
2895 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2896
7a292a7a 2897{
c906108c
SS		 2898 {
2899 SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4);
2900 CPU (h_gr[((UINT) 15)]) = opval;
2901 TRACE_RESULT (current_cpu, abuf, "gr-15", 'x', opval);
2902 }
2903 {
2904 SI opval = GET_H_PS ();
2905 SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval);
2906 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2907 }
7a292a7a 2908}
c906108c
SS		 2909
2910#undef FLD
2911}
2912 NEXT (vpc);
2913
2914 CASE (sem, INSN_MOV) : /* mov $Rj,$Ri */
2915{
2916 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2917 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2918#define FLD(f) abuf->fields.fmt_mov.f
2919 int UNUSED written = 0;
2920 IADDR UNUSED pc = abuf->addr;
2921 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2922
2923 {
2924 SI opval = * FLD (i_Rj);
2925 * FLD (i_Ri) = opval;
2926 TRACE_RESULT (current_cpu, abuf, "Ri", 'x', opval);
2927 }
2928
2929#undef FLD
2930}
2931 NEXT (vpc);
2932
2933 CASE (sem, INSN_MOVDR) : /* mov $Rs1,$Ri */
2934{
2935 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2936 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2937#define FLD(f) abuf->fields.fmt_movdr.f
2938 int UNUSED written = 0;
2939 IADDR UNUSED pc = abuf->addr;
2940 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2941
2942 {
2943 SI opval = GET_H_DR (FLD (f_Rs1));
2944 * FLD (i_Ri) = opval;
2945 TRACE_RESULT (current_cpu, abuf, "Ri", 'x', opval);
2946 }
2947
2948#undef FLD
2949}
2950 NEXT (vpc);
2951
2952 CASE (sem, INSN_MOVPS) : /* mov $ps,$Ri */
2953{
2954 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2955 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2956#define FLD(f) abuf->fields.fmt_movps.f
2957 int UNUSED written = 0;
2958 IADDR UNUSED pc = abuf->addr;
2959 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2960
2961 {
2962 SI opval = GET_H_PS ();
2963 * FLD (i_Ri) = opval;
2964 TRACE_RESULT (current_cpu, abuf, "Ri", 'x', opval);
2965 }
2966
2967#undef FLD
2968}
2969 NEXT (vpc);
2970
2971 CASE (sem, INSN_MOV2DR) : /* mov $Ri,$Rs1 */
2972{
2973 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2974 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2975#define FLD(f) abuf->fields.fmt_mov2dr.f
2976 int UNUSED written = 0;
2977 IADDR UNUSED pc = abuf->addr;
2978 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2979
2980 {
2981 SI opval = * FLD (i_Ri);
2982 SET_H_DR (FLD (f_Rs1), opval);
2983 TRACE_RESULT (current_cpu, abuf, "Rs1", 'x', opval);
2984 }
2985
2986#undef FLD
2987}
2988 NEXT (vpc);
2989
2990 CASE (sem, INSN_MOV2PS) : /* mov $Ri,$ps */
2991{
2992 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2993 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2994#define FLD(f) abuf->fields.fmt_mov2ps.f
2995 int UNUSED written = 0;
2996 IADDR UNUSED pc = abuf->addr;
2997 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2998
2999 {
3000 USI opval = * FLD (i_Ri);
3001 SET_H_PS (opval);
3002 TRACE_RESULT (current_cpu, abuf, "ps", 'x', opval);
3003 }
3004
3005#undef FLD
3006}
3007 NEXT (vpc);
3008
3009 CASE (sem, INSN_JMP) : /* jmp @$Ri */
3010{
3011 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3012 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3013#define FLD(f) abuf->fields.cti.fields.fmt_jmp.f
3014 int UNUSED written = 0;
3015 IADDR UNUSED pc = abuf->addr;
3016 SEM_BRANCH_INIT
3017 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3018
3019 {
3020 USI opval = * FLD (i_Ri);
3021 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
3022 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3023 }
3024
3025 SEM_BRANCH_FINI (vpc);
3026#undef FLD
3027}
3028 NEXT (vpc);
3029
3030 CASE (sem, INSN_JMPD) : /* jmp:d @$Ri */
3031{
3032 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3033 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3034#define FLD(f) abuf->fields.cti.fields.fmt_jmp.f
3035 int UNUSED written = 0;
3036 IADDR UNUSED pc = abuf->addr;
3037 SEM_BRANCH_INIT
3038 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3039
7a292a7a 3040{
c906108c
SS		 3041 {
3042 USI opval = * FLD (i_Ri);
3043 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
3044 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3045 }
7a292a7a 3046}
c906108c
SS		 3047
3048 SEM_BRANCH_FINI (vpc);
3049#undef FLD
3050}
3051 NEXT (vpc);
3052
3053 CASE (sem, INSN_CALLR) : /* call @$Ri */
3054{
3055 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3056 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3057#define FLD(f) abuf->fields.cti.fields.fmt_callr.f
3058 int UNUSED written = 0;
3059 IADDR UNUSED pc = abuf->addr;
3060 SEM_BRANCH_INIT
3061 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3062
7a292a7a 3063{
c906108c
SS		 3064 {
3065 SI opval = ADDSI (pc, 2);
3066 SET_H_DR (((UINT) 1), opval);
3067 TRACE_RESULT (current_cpu, abuf, "dr-1", 'x', opval);
3068 }
3069 {
3070 USI opval = * FLD (i_Ri);
3071 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
3072 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3073 }
7a292a7a 3074}
c906108c
SS		 3075
3076 SEM_BRANCH_FINI (vpc);
3077#undef FLD
3078}
3079 NEXT (vpc);
3080
3081 CASE (sem, INSN_CALLRD) : /* call:d @$Ri */
3082{
3083 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3084 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3085#define FLD(f) abuf->fields.cti.fields.fmt_callr.f
3086 int UNUSED written = 0;
3087 IADDR UNUSED pc = abuf->addr;
3088 SEM_BRANCH_INIT
3089 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3090
7a292a7a
SS		 3091{
3092{
c906108c
SS		 3093 {
3094 SI opval = ADDSI (pc, 4);
3095 SET_H_DR (((UINT) 1), opval);
3096 TRACE_RESULT (current_cpu, abuf, "dr-1", 'x', opval);
3097 }
3098 {
3099 USI opval = * FLD (i_Ri);
3100 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
3101 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3102 }
7a292a7a
SS		 3103}
3104}
c906108c
SS		 3105
3106 SEM_BRANCH_FINI (vpc);
3107#undef FLD
3108}
3109 NEXT (vpc);
3110
3111 CASE (sem, INSN_CALL) : /* call $label12 */
3112{
3113 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3114 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3115#define FLD(f) abuf->fields.cti.fields.fmt_call.f
3116 int UNUSED written = 0;
3117 IADDR UNUSED pc = abuf->addr;
3118 SEM_BRANCH_INIT
3119 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3120
7a292a7a 3121{
c906108c
SS		 3122 {
3123 SI opval = ADDSI (pc, 2);
3124 SET_H_DR (((UINT) 1), opval);
3125 TRACE_RESULT (current_cpu, abuf, "dr-1", 'x', opval);
3126 }
3127 {
3128 USI opval = FLD (i_label12);
3129 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
3130 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3131 }
7a292a7a 3132}
c906108c
SS		 3133
3134 SEM_BRANCH_FINI (vpc);
3135#undef FLD
3136}
3137 NEXT (vpc);
3138
3139 CASE (sem, INSN_CALLD) : /* call:d $label12 */
3140{
3141 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3142 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3143#define FLD(f) abuf->fields.cti.fields.fmt_call.f
3144 int UNUSED written = 0;
3145 IADDR UNUSED pc = abuf->addr;
3146 SEM_BRANCH_INIT
3147 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3148
7a292a7a
SS		 3149{
3150{
c906108c
SS		 3151 {
3152 SI opval = ADDSI (pc, 4);
3153 SET_H_DR (((UINT) 1), opval);
3154 TRACE_RESULT (current_cpu, abuf, "dr-1", 'x', opval);
3155 }
3156 {
3157 USI opval = FLD (i_label12);
3158 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
3159 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3160 }
7a292a7a
SS		 3161}
3162}
c906108c
SS		 3163
3164 SEM_BRANCH_FINI (vpc);
3165#undef FLD
3166}
3167 NEXT (vpc);
3168
3169 CASE (sem, INSN_RET) : /* ret */
3170{
3171 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3172 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3173#define FLD(f) abuf->fields.cti.fields.fmt_ret.f
3174 int UNUSED written = 0;
3175 IADDR UNUSED pc = abuf->addr;
3176 SEM_BRANCH_INIT
3177 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3178
3179 {
3180 USI opval = GET_H_DR (((UINT) 1));
3181 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
3182 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3183 }
3184
3185 SEM_BRANCH_FINI (vpc);
3186#undef FLD
3187}
3188 NEXT (vpc);
3189
3190 CASE (sem, INSN_RET_D) : /* ret:d */
3191{
3192 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3193 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3194#define FLD(f) abuf->fields.cti.fields.fmt_ret.f
3195 int UNUSED written = 0;
3196 IADDR UNUSED pc = abuf->addr;
3197 SEM_BRANCH_INIT
3198 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3199
7a292a7a 3200{
c906108c
SS		 3201 {
3202 USI opval = GET_H_DR (((UINT) 1));
3203 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
3204 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3205 }
7a292a7a 3206}
c906108c
SS		 3207
3208 SEM_BRANCH_FINI (vpc);
3209#undef FLD
3210}
3211 NEXT (vpc);
3212
3213 CASE (sem, INSN_INT) : /* int $u8 */
3214{
3215 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3216 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3217#define FLD(f) abuf->fields.cti.fields.fmt_int.f
3218 int UNUSED written = 0;
3219 IADDR UNUSED pc = abuf->addr;
3220 SEM_BRANCH_INIT
3221 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3222
7a292a7a 3223{
c906108c
SS		 3224; /*clobber*/
3225; /*clobber*/
3226; /*clobber*/
3227 {
3228 SI opval = fr30_int (current_cpu, pc, FLD (f_u8));
3229 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
3230 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3231 }
7a292a7a 3232}
c906108c
SS		 3233
3234 SEM_BRANCH_FINI (vpc);
3235#undef FLD
3236}
3237 NEXT (vpc);
3238
3239 CASE (sem, INSN_INTE) : /* inte */
3240{
3241 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3242 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3243#define FLD(f) abuf->fields.cti.fields.fmt_inte.f
3244 int UNUSED written = 0;
3245 IADDR UNUSED pc = abuf->addr;
3246 SEM_BRANCH_INIT
3247 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3248
7a292a7a 3249{
c906108c
SS		 3250; /*clobber*/
3251; /*clobber*/
3252; /*clobber*/
3253 {
3254 SI opval = fr30_inte (current_cpu, pc);
3255 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
3256 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3257 }
7a292a7a 3258}
c906108c
SS		 3259
3260 SEM_BRANCH_FINI (vpc);
3261#undef FLD
3262}
3263 NEXT (vpc);
3264
3265 CASE (sem, INSN_RETI) : /* reti */
3266{
3267 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3268 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3269#define FLD(f) abuf->fields.cti.fields.fmt_reti.f
3270 int UNUSED written = 0;
3271 IADDR UNUSED pc = abuf->addr;
3272 SEM_BRANCH_INIT
3273 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3274
3275if (EQBI (GET_H_SBIT (), 0)) {
7a292a7a 3276{
c906108c
SS		 3277 {
3278 SI opval = GETMEMSI (current_cpu, pc, GET_H_DR (((UINT) 2)));
3279 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
3280 written |= (1 << 7);
3281 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3282 }
3283 {
3284 SI opval = ADDSI (GET_H_DR (((UINT) 2)), 4);
3285 SET_H_DR (((UINT) 2), opval);
3286 written |= (1 << 5);
3287 TRACE_RESULT (current_cpu, abuf, "dr-2", 'x', opval);
3288 }
3289 {
3290 SI opval = GETMEMSI (current_cpu, pc, GET_H_DR (((UINT) 2)));
3291 SET_H_PS (opval);
3292 written |= (1 << 8);
3293 TRACE_RESULT (current_cpu, abuf, "ps", 'x', opval);
3294 }
3295 {
3296 SI opval = ADDSI (GET_H_DR (((UINT) 2)), 4);
3297 SET_H_DR (((UINT) 2), opval);
3298 written |= (1 << 5);
3299 TRACE_RESULT (current_cpu, abuf, "dr-2", 'x', opval);
3300 }
7a292a7a 3301}
c906108c 3302} else {
7a292a7a 3303{
c906108c
SS		 3304 {
3305 SI opval = GETMEMSI (current_cpu, pc, GET_H_DR (((UINT) 3)));
3306 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
3307 written |= (1 << 7);
3308 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3309 }
3310 {
3311 SI opval = ADDSI (GET_H_DR (((UINT) 3)), 4);
3312 SET_H_DR (((UINT) 3), opval);
3313 written |= (1 << 6);
3314 TRACE_RESULT (current_cpu, abuf, "dr-3", 'x', opval);
3315 }
3316 {
3317 SI opval = GETMEMSI (current_cpu, pc, GET_H_DR (((UINT) 3)));
3318 SET_H_PS (opval);
3319 written |= (1 << 8);
3320 TRACE_RESULT (current_cpu, abuf, "ps", 'x', opval);
3321 }
3322 {
3323 SI opval = ADDSI (GET_H_DR (((UINT) 3)), 4);
3324 SET_H_DR (((UINT) 3), opval);
3325 written |= (1 << 6);
3326 TRACE_RESULT (current_cpu, abuf, "dr-3", 'x', opval);
3327 }
7a292a7a 3328}
c906108c
SS		 3329}
3330
3331 abuf->written = written;
3332 SEM_BRANCH_FINI (vpc);
3333#undef FLD
3334}
3335 NEXT (vpc);
3336
3337 CASE (sem, INSN_BRAD) : /* bra:d $label9 */
3338{
3339 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3340 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3341#define FLD(f) abuf->fields.cti.fields.fmt_brad.f
3342 int UNUSED written = 0;
3343 IADDR UNUSED pc = abuf->addr;
3344 SEM_BRANCH_INIT
3345 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3346
7a292a7a 3347{
c906108c
SS		 3348 {
3349 USI opval = FLD (i_label9);
3350 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
3351 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3352 }
7a292a7a 3353}
c906108c
SS		 3354
3355 SEM_BRANCH_FINI (vpc);
3356#undef FLD
3357}
3358 NEXT (vpc);
3359
3360 CASE (sem, INSN_BRA) : /* bra $label9 */
3361{
3362 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3363 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3364#define FLD(f) abuf->fields.cti.fields.fmt_brad.f
3365 int UNUSED written = 0;
3366 IADDR UNUSED pc = abuf->addr;
3367 SEM_BRANCH_INIT
3368 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3369
3370 {
3371 USI opval = FLD (i_label9);
3372 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
3373 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3374 }
3375
3376 SEM_BRANCH_FINI (vpc);
3377#undef FLD
3378}
3379 NEXT (vpc);
3380
3381 CASE (sem, INSN_BNOD) : /* bno:d $label9 */
3382{
3383 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3384 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3385#define FLD(f) abuf->fields.fmt_bnod.f
3386 int UNUSED written = 0;
3387 IADDR UNUSED pc = abuf->addr;
3388 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3389
7a292a7a 3390{
c906108c 3391do { } while (0); /*nop*/
7a292a7a 3392}
c906108c
SS		 3393
3394#undef FLD
3395}
3396 NEXT (vpc);
3397
3398 CASE (sem, INSN_BNO) : /* bno $label9 */
3399{
3400 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3401 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3402#define FLD(f) abuf->fields.fmt_bnod.f
3403 int UNUSED written = 0;
3404 IADDR UNUSED pc = abuf->addr;
3405 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3406
3407do { } while (0); /*nop*/
3408
3409#undef FLD
3410}
3411 NEXT (vpc);
3412
3413 CASE (sem, INSN_BEQD) : /* beq:d $label9 */
3414{
3415 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3416 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3417#define FLD(f) abuf->fields.cti.fields.fmt_beqd.f
3418 int UNUSED written = 0;
3419 IADDR UNUSED pc = abuf->addr;
3420 SEM_BRANCH_INIT
3421 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3422
7a292a7a 3423{
c906108c
SS		 3424if (CPU (h_zbit)) {
3425 {
3426 USI opval = FLD (i_label9);
3427 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
3428 written |= (1 << 2);
3429 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3430 }
3431}
7a292a7a 3432}
c906108c
SS		 3433
3434 abuf->written = written;
3435 SEM_BRANCH_FINI (vpc);
3436#undef FLD
3437}
3438 NEXT (vpc);
3439
3440 CASE (sem, INSN_BEQ) : /* beq $label9 */
3441{
3442 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3443 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3444#define FLD(f) abuf->fields.cti.fields.fmt_beqd.f
3445 int UNUSED written = 0;
3446 IADDR UNUSED pc = abuf->addr;
3447 SEM_BRANCH_INIT
3448 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3449
3450if (CPU (h_zbit)) {
3451 {
3452 USI opval = FLD (i_label9);
3453 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
3454 written |= (1 << 2);
3455 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3456 }
3457}
3458
3459 abuf->written = written;
3460 SEM_BRANCH_FINI (vpc);
3461#undef FLD
3462}
3463 NEXT (vpc);
3464
3465 CASE (sem, INSN_BNED) : /* bne:d $label9 */
3466{
3467 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3468 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3469#define FLD(f) abuf->fields.cti.fields.fmt_beqd.f
3470 int UNUSED written = 0;
3471 IADDR UNUSED pc = abuf->addr;
3472 SEM_BRANCH_INIT
3473 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3474
7a292a7a 3475{
c906108c
SS		 3476if (NOTBI (CPU (h_zbit))) {
3477 {
3478 USI opval = FLD (i_label9);
3479 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
3480 written |= (1 << 2);
3481 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3482 }
3483}
7a292a7a 3484}
c906108c
SS		 3485
3486 abuf->written = written;
3487 SEM_BRANCH_FINI (vpc);
3488#undef FLD
3489}
3490 NEXT (vpc);
3491
3492 CASE (sem, INSN_BNE) : /* bne $label9 */
3493{
3494 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3495 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3496#define FLD(f) abuf->fields.cti.fields.fmt_beqd.f
3497 int UNUSED written = 0;
3498 IADDR UNUSED pc = abuf->addr;
3499 SEM_BRANCH_INIT
3500 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3501
3502if (NOTBI (CPU (h_zbit))) {
3503 {
3504 USI opval = FLD (i_label9);
3505 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
3506 written |= (1 << 2);
3507 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3508 }
3509}
3510
3511 abuf->written = written;
3512 SEM_BRANCH_FINI (vpc);
3513#undef FLD
3514}
3515 NEXT (vpc);
3516
3517 CASE (sem, INSN_BCD) : /* bc:d $label9 */
3518{
3519 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3520 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3521#define FLD(f) abuf->fields.cti.fields.fmt_bcd.f
3522 int UNUSED written = 0;
3523 IADDR UNUSED pc = abuf->addr;
3524 SEM_BRANCH_INIT
3525 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3526
7a292a7a 3527{
c906108c
SS		 3528if (CPU (h_cbit)) {
3529 {
3530 USI opval = FLD (i_label9);
3531 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
3532 written |= (1 << 2);
3533 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3534 }
3535}
7a292a7a 3536}
c906108c
SS		 3537
3538 abuf->written = written;
3539 SEM_BRANCH_FINI (vpc);
3540#undef FLD
3541}
3542 NEXT (vpc);
3543
3544 CASE (sem, INSN_BC) : /* bc $label9 */
3545{
3546 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3547 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3548#define FLD(f) abuf->fields.cti.fields.fmt_bcd.f
3549 int UNUSED written = 0;
3550 IADDR UNUSED pc = abuf->addr;
3551 SEM_BRANCH_INIT
3552 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3553
3554if (CPU (h_cbit)) {
3555 {
3556 USI opval = FLD (i_label9);
3557 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
3558 written |= (1 << 2);
3559 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3560 }
3561}
3562
3563 abuf->written = written;
3564 SEM_BRANCH_FINI (vpc);
3565#undef FLD
3566}
3567 NEXT (vpc);
3568
3569 CASE (sem, INSN_BNCD) : /* bnc:d $label9 */
3570{
3571 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3572 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3573#define FLD(f) abuf->fields.cti.fields.fmt_bcd.f
3574 int UNUSED written = 0;
3575 IADDR UNUSED pc = abuf->addr;
3576 SEM_BRANCH_INIT
3577 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3578
7a292a7a 3579{
c906108c
SS		 3580if (NOTBI (CPU (h_cbit))) {
3581 {
3582 USI opval = FLD (i_label9);
3583 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
3584 written |= (1 << 2);
3585 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3586 }
3587}
7a292a7a 3588}
c906108c
SS		 3589
3590 abuf->written = written;
3591 SEM_BRANCH_FINI (vpc);
3592#undef FLD
3593}
3594 NEXT (vpc);
3595
3596 CASE (sem, INSN_BNC) : /* bnc $label9 */
3597{
3598 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3599 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3600#define FLD(f) abuf->fields.cti.fields.fmt_bcd.f
3601 int UNUSED written = 0;
3602 IADDR UNUSED pc = abuf->addr;
3603 SEM_BRANCH_INIT
3604 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3605
3606if (NOTBI (CPU (h_cbit))) {
3607 {
3608 USI opval = FLD (i_label9);
3609 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
3610 written |= (1 << 2);
3611 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3612 }
3613}
3614
3615 abuf->written = written;
3616 SEM_BRANCH_FINI (vpc);
3617#undef FLD
3618}
3619 NEXT (vpc);
3620
3621 CASE (sem, INSN_BND) : /* bn:d $label9 */
3622{
3623 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3624 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3625#define FLD(f) abuf->fields.cti.fields.fmt_bnd.f
3626 int UNUSED written = 0;
3627 IADDR UNUSED pc = abuf->addr;
3628 SEM_BRANCH_INIT
3629 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3630
7a292a7a 3631{
c906108c
SS		 3632if (CPU (h_nbit)) {
3633 {
3634 USI opval = FLD (i_label9);
3635 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
3636 written |= (1 << 2);
3637 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3638 }
3639}
7a292a7a 3640}
c906108c
SS		 3641
3642 abuf->written = written;
3643 SEM_BRANCH_FINI (vpc);
3644#undef FLD
3645}
3646 NEXT (vpc);
3647
3648 CASE (sem, INSN_BN) : /* bn $label9 */
3649{
3650 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3651 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3652#define FLD(f) abuf->fields.cti.fields.fmt_bnd.f
3653 int UNUSED written = 0;
3654 IADDR UNUSED pc = abuf->addr;
3655 SEM_BRANCH_INIT
3656 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3657
3658if (CPU (h_nbit)) {
3659 {
3660 USI opval = FLD (i_label9);
3661 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
3662 written |= (1 << 2);
3663 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3664 }
3665}
3666
3667 abuf->written = written;
3668 SEM_BRANCH_FINI (vpc);
3669#undef FLD
3670}
3671 NEXT (vpc);
3672
3673 CASE (sem, INSN_BPD) : /* bp:d $label9 */
3674{
3675 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3676 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3677#define FLD(f) abuf->fields.cti.fields.fmt_bnd.f
3678 int UNUSED written = 0;
3679 IADDR UNUSED pc = abuf->addr;
3680 SEM_BRANCH_INIT
3681 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3682
7a292a7a 3683{
c906108c
SS		 3684if (NOTBI (CPU (h_nbit))) {
3685 {
3686 USI opval = FLD (i_label9);
3687 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
3688 written |= (1 << 2);
3689 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3690 }
3691}
7a292a7a 3692}
c906108c
SS		 3693
3694 abuf->written = written;
3695 SEM_BRANCH_FINI (vpc);
3696#undef FLD
3697}
3698 NEXT (vpc);
3699
3700 CASE (sem, INSN_BP) : /* bp $label9 */
3701{
3702 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3703 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3704#define FLD(f) abuf->fields.cti.fields.fmt_bnd.f
3705 int UNUSED written = 0;
3706 IADDR UNUSED pc = abuf->addr;
3707 SEM_BRANCH_INIT
3708 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3709
3710if (NOTBI (CPU (h_nbit))) {
3711 {
3712 USI opval = FLD (i_label9);
3713 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
3714 written |= (1 << 2);
3715 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3716 }
3717}
3718
3719 abuf->written = written;
3720 SEM_BRANCH_FINI (vpc);
3721#undef FLD
3722}
3723 NEXT (vpc);
3724
3725 CASE (sem, INSN_BVD) : /* bv:d $label9 */
3726{
3727 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3728 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3729#define FLD(f) abuf->fields.cti.fields.fmt_bvd.f
3730 int UNUSED written = 0;
3731 IADDR UNUSED pc = abuf->addr;
3732 SEM_BRANCH_INIT
3733 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3734
7a292a7a 3735{
c906108c
SS		 3736if (CPU (h_vbit)) {
3737 {
3738 USI opval = FLD (i_label9);
3739 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
3740 written |= (1 << 2);
3741 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3742 }
3743}
7a292a7a 3744}
c906108c
SS		 3745
3746 abuf->written = written;
3747 SEM_BRANCH_FINI (vpc);
3748#undef FLD
3749}
3750 NEXT (vpc);
3751
3752 CASE (sem, INSN_BV) : /* bv $label9 */
3753{
3754 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3755 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3756#define FLD(f) abuf->fields.cti.fields.fmt_bvd.f
3757 int UNUSED written = 0;
3758 IADDR UNUSED pc = abuf->addr;
3759 SEM_BRANCH_INIT
3760 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3761
3762if (CPU (h_vbit)) {
3763 {
3764 USI opval = FLD (i_label9);
3765 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
3766 written |= (1 << 2);
3767 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3768 }
3769}
3770
3771 abuf->written = written;
3772 SEM_BRANCH_FINI (vpc);
3773#undef FLD
3774}
3775 NEXT (vpc);
3776
3777 CASE (sem, INSN_BNVD) : /* bnv:d $label9 */
3778{
3779 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3780 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3781#define FLD(f) abuf->fields.cti.fields.fmt_bvd.f
3782 int UNUSED written = 0;
3783 IADDR UNUSED pc = abuf->addr;
3784 SEM_BRANCH_INIT
3785 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3786
7a292a7a 3787{
c906108c
SS		 3788if (NOTBI (CPU (h_vbit))) {
3789 {
3790 USI opval = FLD (i_label9);
3791 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
3792 written |= (1 << 2);
3793 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3794 }
3795}
7a292a7a 3796}
c906108c
SS		 3797
3798 abuf->written = written;
3799 SEM_BRANCH_FINI (vpc);
3800#undef FLD
3801}
3802 NEXT (vpc);
3803
3804 CASE (sem, INSN_BNV) : /* bnv $label9 */
3805{
3806 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3807 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3808#define FLD(f) abuf->fields.cti.fields.fmt_bvd.f
3809 int UNUSED written = 0;
3810 IADDR UNUSED pc = abuf->addr;
3811 SEM_BRANCH_INIT
3812 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3813
3814if (NOTBI (CPU (h_vbit))) {
3815 {
3816 USI opval = FLD (i_label9);
3817 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
3818 written |= (1 << 2);
3819 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3820 }
3821}
3822
3823 abuf->written = written;
3824 SEM_BRANCH_FINI (vpc);
3825#undef FLD
3826}
3827 NEXT (vpc);
3828
3829 CASE (sem, INSN_BLTD) : /* blt:d $label9 */
3830{
3831 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3832 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3833#define FLD(f) abuf->fields.cti.fields.fmt_bltd.f
3834 int UNUSED written = 0;
3835 IADDR UNUSED pc = abuf->addr;
3836 SEM_BRANCH_INIT
3837 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3838
7a292a7a 3839{
c906108c
SS		 3840if (XORBI (CPU (h_vbit), CPU (h_nbit))) {
3841 {
3842 USI opval = FLD (i_label9);
3843 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
3844 written |= (1 << 3);
3845 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3846 }
3847}
7a292a7a 3848}
c906108c
SS		 3849
3850 abuf->written = written;
3851 SEM_BRANCH_FINI (vpc);
3852#undef FLD
3853}
3854 NEXT (vpc);
3855
3856 CASE (sem, INSN_BLT) : /* blt $label9 */
3857{
3858 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3859 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3860#define FLD(f) abuf->fields.cti.fields.fmt_bltd.f
3861 int UNUSED written = 0;
3862 IADDR UNUSED pc = abuf->addr;
3863 SEM_BRANCH_INIT
3864 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3865
3866if (XORBI (CPU (h_vbit), CPU (h_nbit))) {
3867 {
3868 USI opval = FLD (i_label9);
3869 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
3870 written |= (1 << 3);
3871 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3872 }
3873}
3874
3875 abuf->written = written;
3876 SEM_BRANCH_FINI (vpc);
3877#undef FLD
3878}
3879 NEXT (vpc);
3880
3881 CASE (sem, INSN_BGED) : /* bge:d $label9 */
3882{
3883 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3884 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3885#define FLD(f) abuf->fields.cti.fields.fmt_bltd.f
3886 int UNUSED written = 0;
3887 IADDR UNUSED pc = abuf->addr;
3888 SEM_BRANCH_INIT
3889 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3890
7a292a7a 3891{
c906108c
SS		 3892if (NOTBI (XORBI (CPU (h_vbit), CPU (h_nbit)))) {
3893 {
3894 USI opval = FLD (i_label9);
3895 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
3896 written |= (1 << 3);
3897 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3898 }
3899}
7a292a7a 3900}
c906108c
SS		 3901
3902 abuf->written = written;
3903 SEM_BRANCH_FINI (vpc);
3904#undef FLD
3905}
3906 NEXT (vpc);
3907
3908 CASE (sem, INSN_BGE) : /* bge $label9 */
3909{
3910 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3911 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3912#define FLD(f) abuf->fields.cti.fields.fmt_bltd.f
3913 int UNUSED written = 0;
3914 IADDR UNUSED pc = abuf->addr;
3915 SEM_BRANCH_INIT
3916 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3917
3918if (NOTBI (XORBI (CPU (h_vbit), CPU (h_nbit)))) {
3919 {
3920 USI opval = FLD (i_label9);
3921 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
3922 written |= (1 << 3);
3923 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3924 }
3925}
3926
3927 abuf->written = written;
3928 SEM_BRANCH_FINI (vpc);
3929#undef FLD
3930}
3931 NEXT (vpc);
3932
3933 CASE (sem, INSN_BLED) : /* ble:d $label9 */
3934{
3935 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3936 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3937#define FLD(f) abuf->fields.cti.fields.fmt_bled.f
3938 int UNUSED written = 0;
3939 IADDR UNUSED pc = abuf->addr;
3940 SEM_BRANCH_INIT
3941 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3942
7a292a7a 3943{
c906108c
SS		 3944if (ORBI (XORBI (CPU (h_vbit), CPU (h_nbit)), CPU (h_zbit))) {
3945 {
3946 USI opval = FLD (i_label9);
3947 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
3948 written |= (1 << 4);
3949 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3950 }
3951}
7a292a7a 3952}
c906108c
SS		 3953
3954 abuf->written = written;
3955 SEM_BRANCH_FINI (vpc);
3956#undef FLD
3957}
3958 NEXT (vpc);
3959
3960 CASE (sem, INSN_BLE) : /* ble $label9 */
3961{
3962 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3963 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3964#define FLD(f) abuf->fields.cti.fields.fmt_bled.f
3965 int UNUSED written = 0;
3966 IADDR UNUSED pc = abuf->addr;
3967 SEM_BRANCH_INIT
3968 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3969
3970if (ORBI (XORBI (CPU (h_vbit), CPU (h_nbit)), CPU (h_zbit))) {
3971 {
3972 USI opval = FLD (i_label9);
3973 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
3974 written |= (1 << 4);
3975 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3976 }
3977}
3978
3979 abuf->written = written;
3980 SEM_BRANCH_FINI (vpc);
3981#undef FLD
3982}
3983 NEXT (vpc);
3984
3985 CASE (sem, INSN_BGTD) : /* bgt:d $label9 */
3986{
3987 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3988 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3989#define FLD(f) abuf->fields.cti.fields.fmt_bled.f
3990 int UNUSED written = 0;
3991 IADDR UNUSED pc = abuf->addr;
3992 SEM_BRANCH_INIT
3993 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3994
7a292a7a 3995{
c906108c
SS		 3996if (NOTBI (ORBI (XORBI (CPU (h_vbit), CPU (h_nbit)), CPU (h_zbit)))) {
3997 {
3998 USI opval = FLD (i_label9);
3999 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
4000 written |= (1 << 4);
4001 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
4002 }
4003}
7a292a7a 4004}
c906108c
SS		 4005
4006 abuf->written = written;
4007 SEM_BRANCH_FINI (vpc);
4008#undef FLD
4009}
4010 NEXT (vpc);
4011
4012 CASE (sem, INSN_BGT) : /* bgt $label9 */
4013{
4014 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4015 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4016#define FLD(f) abuf->fields.cti.fields.fmt_bled.f
4017 int UNUSED written = 0;
4018 IADDR UNUSED pc = abuf->addr;
4019 SEM_BRANCH_INIT
4020 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4021
4022if (NOTBI (ORBI (XORBI (CPU (h_vbit), CPU (h_nbit)), CPU (h_zbit)))) {
4023 {
4024 USI opval = FLD (i_label9);
4025 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
4026 written |= (1 << 4);
4027 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
4028 }
4029}
4030
4031 abuf->written = written;
4032 SEM_BRANCH_FINI (vpc);
4033#undef FLD
4034}
4035 NEXT (vpc);
4036
4037 CASE (sem, INSN_BLSD) : /* bls:d $label9 */
4038{
4039 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4040 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4041#define FLD(f) abuf->fields.cti.fields.fmt_blsd.f
4042 int UNUSED written = 0;
4043 IADDR UNUSED pc = abuf->addr;
4044 SEM_BRANCH_INIT
4045 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4046
7a292a7a 4047{
c906108c
SS		 4048if (ORBI (CPU (h_cbit), CPU (h_zbit))) {
4049 {
4050 USI opval = FLD (i_label9);
4051 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
4052 written |= (1 << 3);
4053 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
4054 }
4055}
7a292a7a 4056}
c906108c
SS		 4057
4058 abuf->written = written;
4059 SEM_BRANCH_FINI (vpc);
4060#undef FLD
4061}
4062 NEXT (vpc);
4063
4064 CASE (sem, INSN_BLS) : /* bls $label9 */
4065{
4066 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4067 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4068#define FLD(f) abuf->fields.cti.fields.fmt_blsd.f
4069 int UNUSED written = 0;
4070 IADDR UNUSED pc = abuf->addr;
4071 SEM_BRANCH_INIT
4072 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4073
4074if (ORBI (CPU (h_cbit), CPU (h_zbit))) {
4075 {
4076 USI opval = FLD (i_label9);
4077 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
4078 written |= (1 << 3);
4079 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
4080 }
4081}
4082
4083 abuf->written = written;
4084 SEM_BRANCH_FINI (vpc);
4085#undef FLD
4086}
4087 NEXT (vpc);
4088
4089 CASE (sem, INSN_BHID) : /* bhi:d $label9 */
4090{
4091 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4092 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4093#define FLD(f) abuf->fields.cti.fields.fmt_blsd.f
4094 int UNUSED written = 0;
4095 IADDR UNUSED pc = abuf->addr;
4096 SEM_BRANCH_INIT
4097 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4098
7a292a7a 4099{
c906108c
SS		 4100if (NOTBI (ORBI (CPU (h_cbit), CPU (h_zbit)))) {
4101 {
4102 USI opval = FLD (i_label9);
4103 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
4104 written |= (1 << 3);
4105 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
4106 }
4107}
7a292a7a 4108}
c906108c
SS		 4109
4110 abuf->written = written;
4111 SEM_BRANCH_FINI (vpc);
4112#undef FLD
4113}
4114 NEXT (vpc);
4115
4116 CASE (sem, INSN_BHI) : /* bhi $label9 */
4117{
4118 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4119 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4120#define FLD(f) abuf->fields.cti.fields.fmt_blsd.f
4121 int UNUSED written = 0;
4122 IADDR UNUSED pc = abuf->addr;
4123 SEM_BRANCH_INIT
4124 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4125
4126if (NOTBI (ORBI (CPU (h_cbit), CPU (h_zbit)))) {
4127 {
4128 USI opval = FLD (i_label9);
4129 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc, SEM_BRANCH_ADDR_CACHE (sem_arg));
4130 written |= (1 << 3);
4131 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
4132 }
4133}
4134
4135 abuf->written = written;
4136 SEM_BRANCH_FINI (vpc);
4137#undef FLD
4138}
4139 NEXT (vpc);
4140
4141 CASE (sem, INSN_DMOVR13) : /* dmov $R13,@$dir10 */
4142{
4143 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4144 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4145#define FLD(f) abuf->fields.fmt_dmovr13.f
4146 int UNUSED written = 0;
4147 IADDR UNUSED pc = abuf->addr;
4148 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4149
4150 {
4151 SI opval = CPU (h_gr[((UINT) 13)]);
4152 SETMEMSI (current_cpu, pc, FLD (f_dir10), opval);
4153 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
4154 }
4155
4156#undef FLD
4157}
4158 NEXT (vpc);
4159
4160 CASE (sem, INSN_DMOVR13H) : /* dmovh $R13,@$dir9 */
4161{
4162 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4163 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4164#define FLD(f) abuf->fields.fmt_dmovr13h.f
4165 int UNUSED written = 0;
4166 IADDR UNUSED pc = abuf->addr;
4167 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4168
4169 {
4170 HI opval = CPU (h_gr[((UINT) 13)]);
4171 SETMEMHI (current_cpu, pc, FLD (f_dir9), opval);
4172 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
4173 }
4174
4175#undef FLD
4176}
4177 NEXT (vpc);
4178
4179 CASE (sem, INSN_DMOVR13B) : /* dmovb $R13,@$dir8 */
4180{
4181 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4182 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4183#define FLD(f) abuf->fields.fmt_dmovr13b.f
4184 int UNUSED written = 0;
4185 IADDR UNUSED pc = abuf->addr;
4186 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4187
4188 {
4189 QI opval = CPU (h_gr[((UINT) 13)]);
4190 SETMEMQI (current_cpu, pc, FLD (f_dir8), opval);
4191 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
4192 }
4193
4194#undef FLD
4195}
4196 NEXT (vpc);
4197
4198 CASE (sem, INSN_DMOVR13PI) : /* dmov @$R13+,@$dir10 */
4199{
4200 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4201 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4202#define FLD(f) abuf->fields.fmt_dmovr13pi.f
4203 int UNUSED written = 0;
4204 IADDR UNUSED pc = abuf->addr;
4205 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4206
7a292a7a 4207{
c906108c
SS		 4208 {
4209 SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 13)]));
4210 SETMEMSI (current_cpu, pc, FLD (f_dir10), opval);
4211 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
4212 }
4213 {
4214 SI opval = ADDSI (CPU (h_gr[((UINT) 13)]), 4);
4215 CPU (h_gr[((UINT) 13)]) = opval;
4216 TRACE_RESULT (current_cpu, abuf, "gr-13", 'x', opval);
4217 }
7a292a7a 4218}
c906108c
SS		 4219
4220#undef FLD
4221}
4222 NEXT (vpc);
4223
4224 CASE (sem, INSN_DMOVR13PIH) : /* dmovh @$R13+,@$dir9 */
4225{
4226 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4227 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4228#define FLD(f) abuf->fields.fmt_dmovr13pih.f
4229 int UNUSED written = 0;
4230 IADDR UNUSED pc = abuf->addr;
4231 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4232
7a292a7a 4233{
c906108c
SS		 4234 {
4235 HI opval = GETMEMHI (current_cpu, pc, CPU (h_gr[((UINT) 13)]));
4236 SETMEMHI (current_cpu, pc, FLD (f_dir9), opval);
4237 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
4238 }
4239 {
4240 SI opval = ADDSI (CPU (h_gr[((UINT) 13)]), 2);
4241 CPU (h_gr[((UINT) 13)]) = opval;
4242 TRACE_RESULT (current_cpu, abuf, "gr-13", 'x', opval);
4243 }
7a292a7a 4244}
c906108c
SS		 4245
4246#undef FLD
4247}
4248 NEXT (vpc);
4249
4250 CASE (sem, INSN_DMOVR13PIB) : /* dmovb @$R13+,@$dir8 */
4251{
4252 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4253 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4254#define FLD(f) abuf->fields.fmt_dmovr13pib.f
4255 int UNUSED written = 0;
4256 IADDR UNUSED pc = abuf->addr;
4257 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4258
7a292a7a 4259{
c906108c
SS		 4260 {
4261 QI opval = GETMEMQI (current_cpu, pc, CPU (h_gr[((UINT) 13)]));
4262 SETMEMQI (current_cpu, pc, FLD (f_dir8), opval);
4263 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
4264 }
4265 {
4266 SI opval = ADDSI (CPU (h_gr[((UINT) 13)]), 1);
4267 CPU (h_gr[((UINT) 13)]) = opval;
4268 TRACE_RESULT (current_cpu, abuf, "gr-13", 'x', opval);
4269 }
7a292a7a 4270}
c906108c
SS		 4271
4272#undef FLD
4273}
4274 NEXT (vpc);
4275
4276 CASE (sem, INSN_DMOVR15PI) : /* dmov @$R15+,@$dir10 */
4277{
4278 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4279 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4280#define FLD(f) abuf->fields.fmt_dmovr15pi.f
4281 int UNUSED written = 0;
4282 IADDR UNUSED pc = abuf->addr;
4283 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4284
7a292a7a 4285{
c906108c
SS		 4286 {
4287 SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]));
4288 SETMEMSI (current_cpu, pc, FLD (f_dir10), opval);
4289 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
4290 }
4291 {
4292 SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4);
4293 CPU (h_gr[((UINT) 15)]) = opval;
4294 TRACE_RESULT (current_cpu, abuf, "gr-15", 'x', opval);
4295 }
7a292a7a 4296}
c906108c
SS		 4297
4298#undef FLD
4299}
4300 NEXT (vpc);
4301
4302 CASE (sem, INSN_DMOV2R13) : /* dmov @$dir10,$R13 */
4303{
4304 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4305 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4306#define FLD(f) abuf->fields.fmt_dmov2r13.f
4307 int UNUSED written = 0;
4308 IADDR UNUSED pc = abuf->addr;
4309 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4310
4311 {
4312 SI opval = GETMEMSI (current_cpu, pc, FLD (f_dir10));
4313 CPU (h_gr[((UINT) 13)]) = opval;
4314 TRACE_RESULT (current_cpu, abuf, "gr-13", 'x', opval);
4315 }
4316
4317#undef FLD
4318}
4319 NEXT (vpc);
4320
4321 CASE (sem, INSN_DMOV2R13H) : /* dmovh @$dir9,$R13 */
4322{
4323 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4324 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4325#define FLD(f) abuf->fields.fmt_dmov2r13h.f
4326 int UNUSED written = 0;
4327 IADDR UNUSED pc = abuf->addr;
4328 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4329
4330 {
4331 SI opval = GETMEMHI (current_cpu, pc, FLD (f_dir9));
4332 CPU (h_gr[((UINT) 13)]) = opval;
4333 TRACE_RESULT (current_cpu, abuf, "gr-13", 'x', opval);
4334 }
4335
4336#undef FLD
4337}
4338 NEXT (vpc);
4339
4340 CASE (sem, INSN_DMOV2R13B) : /* dmovb @$dir8,$R13 */
4341{
4342 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4343 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4344#define FLD(f) abuf->fields.fmt_dmov2r13b.f
4345 int UNUSED written = 0;
4346 IADDR UNUSED pc = abuf->addr;
4347 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4348
4349 {
4350 SI opval = GETMEMQI (current_cpu, pc, FLD (f_dir8));
4351 CPU (h_gr[((UINT) 13)]) = opval;
4352 TRACE_RESULT (current_cpu, abuf, "gr-13", 'x', opval);
4353 }
4354
4355#undef FLD
4356}
4357 NEXT (vpc);
4358
4359 CASE (sem, INSN_DMOV2R13PI) : /* dmov @$dir10,@$R13+ */
4360{
4361 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4362 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4363#define FLD(f) abuf->fields.fmt_dmov2r13pi.f
4364 int UNUSED written = 0;
4365 IADDR UNUSED pc = abuf->addr;
4366 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4367
7a292a7a 4368{
c906108c
SS		 4369 {
4370 SI opval = GETMEMSI (current_cpu, pc, FLD (f_dir10));
4371 SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 13)]), opval);
4372 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
4373 }
4374 {
4375 SI opval = ADDSI (CPU (h_gr[((UINT) 13)]), 4);
4376 CPU (h_gr[((UINT) 13)]) = opval;
4377 TRACE_RESULT (current_cpu, abuf, "gr-13", 'x', opval);
4378 }
7a292a7a 4379}
c906108c
SS		 4380
4381#undef FLD
4382}
4383 NEXT (vpc);
4384
4385 CASE (sem, INSN_DMOV2R13PIH) : /* dmovh @$dir9,@$R13+ */
4386{
4387 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4388 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4389#define FLD(f) abuf->fields.fmt_dmov2r13pih.f
4390 int UNUSED written = 0;
4391 IADDR UNUSED pc = abuf->addr;
4392 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4393
7a292a7a 4394{
c906108c
SS		 4395 {
4396 HI opval = GETMEMHI (current_cpu, pc, FLD (f_dir9));
4397 SETMEMHI (current_cpu, pc, CPU (h_gr[((UINT) 13)]), opval);
4398 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
4399 }
4400 {
4401 SI opval = ADDSI (CPU (h_gr[((UINT) 13)]), 2);
4402 CPU (h_gr[((UINT) 13)]) = opval;
4403 TRACE_RESULT (current_cpu, abuf, "gr-13", 'x', opval);
4404 }
7a292a7a 4405}
c906108c
SS		 4406
4407#undef FLD
4408}
4409 NEXT (vpc);
4410
4411 CASE (sem, INSN_DMOV2R13PIB) : /* dmovb @$dir8,@$R13+ */
4412{
4413 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4414 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4415#define FLD(f) abuf->fields.fmt_dmov2r13pib.f
4416 int UNUSED written = 0;
4417 IADDR UNUSED pc = abuf->addr;
4418 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4419
7a292a7a 4420{
c906108c
SS		 4421 {
4422 QI opval = GETMEMQI (current_cpu, pc, FLD (f_dir8));
4423 SETMEMQI (current_cpu, pc, CPU (h_gr[((UINT) 13)]), opval);
4424 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
4425 }
4426 {
4427 SI opval = ADDSI (CPU (h_gr[((UINT) 13)]), 1);
4428 CPU (h_gr[((UINT) 13)]) = opval;
4429 TRACE_RESULT (current_cpu, abuf, "gr-13", 'x', opval);
4430 }
7a292a7a 4431}
c906108c
SS		 4432
4433#undef FLD
4434}
4435 NEXT (vpc);
4436
4437 CASE (sem, INSN_DMOV2R15PD) : /* dmov @$dir10,@-$R15 */
4438{
4439 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4440 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4441#define FLD(f) abuf->fields.fmt_dmov2r15pd.f
4442 int UNUSED written = 0;
4443 IADDR UNUSED pc = abuf->addr;
4444 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4445
7a292a7a 4446{
c906108c
SS		 4447 {
4448 SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4);
4449 CPU (h_gr[((UINT) 15)]) = opval;
4450 TRACE_RESULT (current_cpu, abuf, "gr-15", 'x', opval);
4451 }
4452 {
4453 SI opval = GETMEMSI (current_cpu, pc, FLD (f_dir10));
4454 SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval);
4455 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
4456 }
7a292a7a 4457}
c906108c
SS		 4458
4459#undef FLD
4460}
4461 NEXT (vpc);
4462
4463 CASE (sem, INSN_LDRES) : /* ldres @$Ri+,$u4 */
4464{
4465 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4466 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4467#define FLD(f) abuf->fields.fmt_ldres.f
4468 int UNUSED written = 0;
4469 IADDR UNUSED pc = abuf->addr;
4470 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4471
4472 {
4473 SI opval = ADDSI (* FLD (i_Ri), 4);
4474 * FLD (i_Ri) = opval;
4475 TRACE_RESULT (current_cpu, abuf, "Ri", 'x', opval);
4476 }
4477
4478#undef FLD
4479}
4480 NEXT (vpc);
4481
4482 CASE (sem, INSN_STRES) : /* stres $u4,@$Ri+ */
4483{
4484 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4485 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4486#define FLD(f) abuf->fields.fmt_ldres.f
4487 int UNUSED written = 0;
4488 IADDR UNUSED pc = abuf->addr;
4489 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4490
4491 {
4492 SI opval = ADDSI (* FLD (i_Ri), 4);
4493 * FLD (i_Ri) = opval;
4494 TRACE_RESULT (current_cpu, abuf, "Ri", 'x', opval);
4495 }
4496
4497#undef FLD
4498}
4499 NEXT (vpc);
4500
4501 CASE (sem, INSN_COPOP) : /* copop $u4c,$ccc,$CRj,$CRi */
4502{
4503 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4504 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4505#define FLD(f) abuf->fields.fmt_copop.f
4506 int UNUSED written = 0;
4507 IADDR UNUSED pc = abuf->addr;
4508 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
4509
4510do { } while (0); /*nop*/
4511
4512#undef FLD
4513}
4514 NEXT (vpc);
4515
4516 CASE (sem, INSN_COPLD) : /* copld $u4c,$ccc,$Rjc,$CRi */
4517{
4518 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4519 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4520#define FLD(f) abuf->fields.fmt_copld.f
4521 int UNUSED written = 0;
4522 IADDR UNUSED pc = abuf->addr;
4523 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
4524
4525do { } while (0); /*nop*/
4526
4527#undef FLD
4528}
4529 NEXT (vpc);
4530
4531 CASE (sem, INSN_COPST) : /* copst $u4c,$ccc,$CRj,$Ric */
4532{
4533 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4534 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4535#define FLD(f) abuf->fields.fmt_copst.f
4536 int UNUSED written = 0;
4537 IADDR UNUSED pc = abuf->addr;
4538 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
4539
4540do { } while (0); /*nop*/
4541
4542#undef FLD
4543}
4544 NEXT (vpc);
4545
4546 CASE (sem, INSN_COPSV) : /* copsv $u4c,$ccc,$CRj,$Ric */
4547{
4548 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4549 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4550#define FLD(f) abuf->fields.fmt_copst.f
4551 int UNUSED written = 0;
4552 IADDR UNUSED pc = abuf->addr;
4553 vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
4554
4555do { } while (0); /*nop*/
4556
4557#undef FLD
4558}
4559 NEXT (vpc);
4560
4561 CASE (sem, INSN_NOP) : /* nop */
4562{
4563 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4564 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4565#define FLD(f) abuf->fields.fmt_nop.f
4566 int UNUSED written = 0;
4567 IADDR UNUSED pc = abuf->addr;
4568 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4569
4570do { } while (0); /*nop*/
4571
4572#undef FLD
4573}
4574 NEXT (vpc);
4575
4576 CASE (sem, INSN_ANDCCR) : /* andccr $u8 */
4577{
4578 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4579 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4580#define FLD(f) abuf->fields.fmt_andccr.f
4581 int UNUSED written = 0;
4582 IADDR UNUSED pc = abuf->addr;
4583 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4584
4585 {
4586 UQI opval = ANDQI (GET_H_CCR (), FLD (f_u8));
4587 SET_H_CCR (opval);
4588 TRACE_RESULT (current_cpu, abuf, "ccr", 'x', opval);
4589 }
4590
4591#undef FLD
4592}
4593 NEXT (vpc);
4594
4595 CASE (sem, INSN_ORCCR) : /* orccr $u8 */
4596{
4597 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4598 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4599#define FLD(f) abuf->fields.fmt_andccr.f
4600 int UNUSED written = 0;
4601 IADDR UNUSED pc = abuf->addr;
4602 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4603
4604 {
4605 UQI opval = ORQI (GET_H_CCR (), FLD (f_u8));
4606 SET_H_CCR (opval);
4607 TRACE_RESULT (current_cpu, abuf, "ccr", 'x', opval);
4608 }
4609
4610#undef FLD
4611}
4612 NEXT (vpc);
4613
4614 CASE (sem, INSN_STILM) : /* stilm $u8 */
4615{
4616 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4617 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4618#define FLD(f) abuf->fields.fmt_stilm.f
4619 int UNUSED written = 0;
4620 IADDR UNUSED pc = abuf->addr;
4621 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4622
4623 {
4624 UQI opval = ANDSI (FLD (f_u8), 31);
4625 SET_H_ILM (opval);
4626 TRACE_RESULT (current_cpu, abuf, "ilm", 'x', opval);
4627 }
4628
4629#undef FLD
4630}
4631 NEXT (vpc);
4632
4633 CASE (sem, INSN_ADDSP) : /* addsp $s10 */
4634{
4635 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4636 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4637#define FLD(f) abuf->fields.fmt_addsp.f
4638 int UNUSED written = 0;
4639 IADDR UNUSED pc = abuf->addr;
4640 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4641
4642 {
4643 SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), FLD (f_s10));
4644 CPU (h_gr[((UINT) 15)]) = opval;
4645 TRACE_RESULT (current_cpu, abuf, "gr-15", 'x', opval);
4646 }
4647
4648#undef FLD
4649}
4650 NEXT (vpc);
4651
4652 CASE (sem, INSN_EXTSB) : /* extsb $Ri */
4653{
4654 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4655 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4656#define FLD(f) abuf->fields.fmt_extsb.f
4657 int UNUSED written = 0;
4658 IADDR UNUSED pc = abuf->addr;
4659 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4660
4661 {
4662 SI opval = EXTQISI (ANDQI (* FLD (i_Ri), 255));
4663 * FLD (i_Ri) = opval;
4664 TRACE_RESULT (current_cpu, abuf, "Ri", 'x', opval);
4665 }
4666
4667#undef FLD
4668}
4669 NEXT (vpc);
4670
4671 CASE (sem, INSN_EXTUB) : /* extub $Ri */
4672{
4673 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4674 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4675#define FLD(f) abuf->fields.fmt_extub.f
4676 int UNUSED written = 0;
4677 IADDR UNUSED pc = abuf->addr;
4678 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4679
4680 {
4681 SI opval = ZEXTQISI (ANDQI (* FLD (i_Ri), 255));
4682 * FLD (i_Ri) = opval;
4683 TRACE_RESULT (current_cpu, abuf, "Ri", 'x', opval);
4684 }
4685
4686#undef FLD
4687}
4688 NEXT (vpc);
4689
4690 CASE (sem, INSN_EXTSH) : /* extsh $Ri */
4691{
4692 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4693 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4694#define FLD(f) abuf->fields.fmt_extsh.f
4695 int UNUSED written = 0;
4696 IADDR UNUSED pc = abuf->addr;
4697 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4698
4699 {
4700 SI opval = EXTHISI (ANDHI (* FLD (i_Ri), 65535));
4701 * FLD (i_Ri) = opval;
4702 TRACE_RESULT (current_cpu, abuf, "Ri", 'x', opval);
4703 }
4704
4705#undef FLD
4706}
4707 NEXT (vpc);
4708
4709 CASE (sem, INSN_EXTUH) : /* extuh $Ri */
4710{
4711 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4712 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4713#define FLD(f) abuf->fields.fmt_extuh.f
4714 int UNUSED written = 0;
4715 IADDR UNUSED pc = abuf->addr;
4716 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4717
4718 {
4719 SI opval = ZEXTHISI (ANDHI (* FLD (i_Ri), 65535));
4720 * FLD (i_Ri) = opval;
4721 TRACE_RESULT (current_cpu, abuf, "Ri", 'x', opval);
4722 }
4723
4724#undef FLD
4725}
4726 NEXT (vpc);
4727
4728 CASE (sem, INSN_LDM0) : /* ldm0 ($reglist_low_ld) */
4729{
4730 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4731 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4732#define FLD(f) abuf->fields.fmt_ldm0.f
4733 int UNUSED written = 0;
4734 IADDR UNUSED pc = abuf->addr;
4735 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4736
7a292a7a 4737{
c906108c 4738if (ANDSI (FLD (f_reglist_low_ld), 1)) {
7a292a7a 4739{
c906108c
SS		 4740 {
4741 SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]));
4742 CPU (h_gr[((UINT) 0)]) = opval;
4743 written |= (1 << 3);
4744 TRACE_RESULT (current_cpu, abuf, "gr-0", 'x', opval);
4745 }
4746 {
4747 SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4);
4748 CPU (h_gr[((UINT) 15)]) = opval;
4749 written |= (1 << 5);
4750 TRACE_RESULT (current_cpu, abuf, "gr-15", 'x', opval);
4751 }
7a292a7a 4752}
c906108c
SS		 4753}
4754if (ANDSI (FLD (f_reglist_low_ld), 2)) {
7a292a7a 4755{
c906108c
SS		 4756 {
4757 SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]));
4758 CPU (h_gr[((UINT) 1)]) = opval;
4759 written |= (1 << 4);
4760 TRACE_RESULT (current_cpu, abuf, "gr-1", 'x', opval);
4761 }
4762 {
4763 SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4);
4764 CPU (h_gr[((UINT) 15)]) = opval;
4765 written |= (1 << 5);
4766 TRACE_RESULT (current_cpu, abuf, "gr-15", 'x', opval);
4767 }
7a292a7a 4768}
c906108c
SS		 4769}
4770if (ANDSI (FLD (f_reglist_low_ld), 4)) {
7a292a7a 4771{
c906108c
SS		 4772 {
4773 SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]));
4774 CPU (h_gr[((UINT) 2)]) = opval;
4775 written |= (1 << 6);
4776 TRACE_RESULT (current_cpu, abuf, "gr-2", 'x', opval);
4777 }
4778 {
4779 SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4);
4780 CPU (h_gr[((UINT) 15)]) = opval;
4781 written |= (1 << 5);
4782 TRACE_RESULT (current_cpu, abuf, "gr-15", 'x', opval);
4783 }
7a292a7a 4784}
c906108c
SS		 4785}
4786if (ANDSI (FLD (f_reglist_low_ld), 8)) {
7a292a7a 4787{
c906108c
SS		 4788 {
4789 SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]));
4790 CPU (h_gr[((UINT) 3)]) = opval;
4791 written |= (1 << 7);
4792 TRACE_RESULT (current_cpu, abuf, "gr-3", 'x', opval);
4793 }
4794 {
4795 SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4);
4796 CPU (h_gr[((UINT) 15)]) = opval;
4797 written |= (1 << 5);
4798 TRACE_RESULT (current_cpu, abuf, "gr-15", 'x', opval);
4799 }
7a292a7a 4800}
c906108c
SS		 4801}
4802if (ANDSI (FLD (f_reglist_low_ld), 16)) {
7a292a7a 4803{
c906108c
SS		 4804 {
4805 SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]));
4806 CPU (h_gr[((UINT) 4)]) = opval;
4807 written |= (1 << 8);
4808 TRACE_RESULT (current_cpu, abuf, "gr-4", 'x', opval);
4809 }
4810 {
4811 SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4);
4812 CPU (h_gr[((UINT) 15)]) = opval;
4813 written |= (1 << 5);
4814 TRACE_RESULT (current_cpu, abuf, "gr-15", 'x', opval);
4815 }
7a292a7a 4816}
c906108c
SS		 4817}
4818if (ANDSI (FLD (f_reglist_low_ld), 32)) {
7a292a7a 4819{
c906108c
SS		 4820 {
4821 SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]));
4822 CPU (h_gr[((UINT) 5)]) = opval;
4823 written |= (1 << 9);
4824 TRACE_RESULT (current_cpu, abuf, "gr-5", 'x', opval);
4825 }
4826 {
4827 SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4);
4828 CPU (h_gr[((UINT) 15)]) = opval;
4829 written |= (1 << 5);
4830 TRACE_RESULT (current_cpu, abuf, "gr-15", 'x', opval);
4831 }
7a292a7a 4832}
c906108c
SS		 4833}
4834if (ANDSI (FLD (f_reglist_low_ld), 64)) {
7a292a7a 4835{
c906108c
SS		 4836 {
4837 SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]));
4838 CPU (h_gr[((UINT) 6)]) = opval;
4839 written |= (1 << 10);
4840 TRACE_RESULT (current_cpu, abuf, "gr-6", 'x', opval);
4841 }
4842 {
4843 SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4);
4844 CPU (h_gr[((UINT) 15)]) = opval;
4845 written |= (1 << 5);
4846 TRACE_RESULT (current_cpu, abuf, "gr-15", 'x', opval);
4847 }
7a292a7a 4848}
c906108c
SS		 4849}
4850if (ANDSI (FLD (f_reglist_low_ld), 128)) {
7a292a7a 4851{
c906108c
SS		 4852 {
4853 SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]));
4854 CPU (h_gr[((UINT) 7)]) = opval;
4855 written |= (1 << 11);
4856 TRACE_RESULT (current_cpu, abuf, "gr-7", 'x', opval);
4857 }
4858 {
4859 SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4);
4860 CPU (h_gr[((UINT) 15)]) = opval;
4861 written |= (1 << 5);
4862 TRACE_RESULT (current_cpu, abuf, "gr-15", 'x', opval);
4863 }
c906108c 4864}
7a292a7a
SS		 4865}
4866}
c906108c
SS		 4867
4868 abuf->written = written;
4869#undef FLD
4870}
4871 NEXT (vpc);
4872
4873 CASE (sem, INSN_LDM1) : /* ldm1 ($reglist_hi_ld) */
4874{
4875 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4876 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4877#define FLD(f) abuf->fields.fmt_ldm1.f
4878 int UNUSED written = 0;
4879 IADDR UNUSED pc = abuf->addr;
4880 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4881
7a292a7a 4882{
c906108c 4883if (ANDSI (FLD (f_reglist_hi_ld), 1)) {
7a292a7a 4884{
c906108c
SS		 4885 {
4886 SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]));
4887 CPU (h_gr[((UINT) 8)]) = opval;
4888 written |= (1 << 9);
4889 TRACE_RESULT (current_cpu, abuf, "gr-8", 'x', opval);
4890 }
4891 {
4892 SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4);
4893 CPU (h_gr[((UINT) 15)]) = opval;
4894 written |= (1 << 8);
4895 TRACE_RESULT (current_cpu, abuf, "gr-15", 'x', opval);
4896 }
7a292a7a 4897}
c906108c
SS		 4898}
4899if (ANDSI (FLD (f_reglist_hi_ld), 2)) {
7a292a7a 4900{
c906108c
SS		 4901 {
4902 SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]));
4903 CPU (h_gr[((UINT) 9)]) = opval;
4904 written |= (1 << 10);
4905 TRACE_RESULT (current_cpu, abuf, "gr-9", 'x', opval);
4906 }
4907 {
4908 SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4);
4909 CPU (h_gr[((UINT) 15)]) = opval;
4910 written |= (1 << 8);
4911 TRACE_RESULT (current_cpu, abuf, "gr-15", 'x', opval);
4912 }
7a292a7a 4913}
c906108c
SS		 4914}
4915if (ANDSI (FLD (f_reglist_hi_ld), 4)) {
7a292a7a 4916{
c906108c
SS		 4917 {
4918 SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]));
4919 CPU (h_gr[((UINT) 10)]) = opval;
4920 written |= (1 << 3);
4921 TRACE_RESULT (current_cpu, abuf, "gr-10", 'x', opval);
4922 }
4923 {
4924 SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4);
4925 CPU (h_gr[((UINT) 15)]) = opval;
4926 written |= (1 << 8);
4927 TRACE_RESULT (current_cpu, abuf, "gr-15", 'x', opval);
4928 }
7a292a7a 4929}
c906108c
SS		 4930}
4931if (ANDSI (FLD (f_reglist_hi_ld), 8)) {
7a292a7a 4932{
c906108c
SS		 4933 {
4934 SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]));
4935 CPU (h_gr[((UINT) 11)]) = opval;
4936 written |= (1 << 4);
4937 TRACE_RESULT (current_cpu, abuf, "gr-11", 'x', opval);
4938 }
4939 {
4940 SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4);
4941 CPU (h_gr[((UINT) 15)]) = opval;
4942 written |= (1 << 8);
4943 TRACE_RESULT (current_cpu, abuf, "gr-15", 'x', opval);
4944 }
7a292a7a 4945}
c906108c
SS		 4946}
4947if (ANDSI (FLD (f_reglist_hi_ld), 16)) {
7a292a7a 4948{
c906108c
SS		 4949 {
4950 SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]));
4951 CPU (h_gr[((UINT) 12)]) = opval;
4952 written |= (1 << 5);
4953 TRACE_RESULT (current_cpu, abuf, "gr-12", 'x', opval);
4954 }
4955 {
4956 SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4);
4957 CPU (h_gr[((UINT) 15)]) = opval;
4958 written |= (1 << 8);
4959 TRACE_RESULT (current_cpu, abuf, "gr-15", 'x', opval);
4960 }
7a292a7a 4961}
c906108c
SS		 4962}
4963if (ANDSI (FLD (f_reglist_hi_ld), 32)) {
7a292a7a 4964{
c906108c
SS		 4965 {
4966 SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]));
4967 CPU (h_gr[((UINT) 13)]) = opval;
4968 written |= (1 << 6);
4969 TRACE_RESULT (current_cpu, abuf, "gr-13", 'x', opval);
4970 }
4971 {
4972 SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4);
4973 CPU (h_gr[((UINT) 15)]) = opval;
4974 written |= (1 << 8);
4975 TRACE_RESULT (current_cpu, abuf, "gr-15", 'x', opval);
4976 }
7a292a7a 4977}
c906108c
SS		 4978}
4979if (ANDSI (FLD (f_reglist_hi_ld), 64)) {
7a292a7a 4980{
c906108c
SS		 4981 {
4982 SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]));
4983 CPU (h_gr[((UINT) 14)]) = opval;
4984 written |= (1 << 7);
4985 TRACE_RESULT (current_cpu, abuf, "gr-14", 'x', opval);
4986 }
4987 {
4988 SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4);
4989 CPU (h_gr[((UINT) 15)]) = opval;
4990 written |= (1 << 8);
4991 TRACE_RESULT (current_cpu, abuf, "gr-15", 'x', opval);
4992 }
7a292a7a 4993}
c906108c
SS		 4994}
4995if (ANDSI (FLD (f_reglist_hi_ld), 128)) {
4996 {
4997 SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]));
4998 CPU (h_gr[((UINT) 15)]) = opval;
4999 written |= (1 << 8);
5000 TRACE_RESULT (current_cpu, abuf, "gr-15", 'x', opval);
5001 }
5002}
7a292a7a 5003}
c906108c
SS		 5004
5005 abuf->written = written;
5006#undef FLD
5007}
5008 NEXT (vpc);
5009
5010 CASE (sem, INSN_STM0) : /* stm0 ($reglist_low_st) */
5011{
5012 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5013 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5014#define FLD(f) abuf->fields.fmt_stm0.f
5015 int UNUSED written = 0;
5016 IADDR UNUSED pc = abuf->addr;
5017 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5018
7a292a7a 5019{
c906108c 5020if (ANDSI (FLD (f_reglist_low_st), 1)) {
7a292a7a 5021{
c906108c
SS		 5022 {
5023 SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4);
5024 CPU (h_gr[((UINT) 15)]) = opval;
5025 written |= (1 << 10);
5026 TRACE_RESULT (current_cpu, abuf, "gr-15", 'x', opval);
5027 }
5028 {
5029 SI opval = CPU (h_gr[((UINT) 7)]);
5030 SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval);
5031 written |= (1 << 11);
5032 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
5033 }
7a292a7a 5034}
c906108c
SS		 5035}
5036if (ANDSI (FLD (f_reglist_low_st), 2)) {
7a292a7a 5037{
c906108c
SS		 5038 {
5039 SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4);
5040 CPU (h_gr[((UINT) 15)]) = opval;
5041 written |= (1 << 10);
5042 TRACE_RESULT (current_cpu, abuf, "gr-15", 'x', opval);
5043 }
5044 {
5045 SI opval = CPU (h_gr[((UINT) 6)]);
5046 SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval);
5047 written |= (1 << 11);
5048 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
5049 }
7a292a7a 5050}
c906108c
SS		 5051}
5052if (ANDSI (FLD (f_reglist_low_st), 4)) {
7a292a7a 5053{
c906108c
SS		 5054 {
5055 SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4);
5056 CPU (h_gr[((UINT) 15)]) = opval;
5057 written |= (1 << 10);
5058 TRACE_RESULT (current_cpu, abuf, "gr-15", 'x', opval);
5059 }
5060 {
5061 SI opval = CPU (h_gr[((UINT) 5)]);
5062 SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval);
5063 written |= (1 << 11);
5064 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
5065 }
7a292a7a 5066}
c906108c
SS		 5067}
5068if (ANDSI (FLD (f_reglist_low_st), 8)) {
7a292a7a 5069{
c906108c
SS		 5070 {
5071 SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4);
5072 CPU (h_gr[((UINT) 15)]) = opval;
5073 written |= (1 << 10);
5074 TRACE_RESULT (current_cpu, abuf, "gr-15", 'x', opval);
5075 }
5076 {
5077 SI opval = CPU (h_gr[((UINT) 4)]);
5078 SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval);
5079 written |= (1 << 11);
5080 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
5081 }
7a292a7a 5082}
c906108c
SS		 5083}
5084if (ANDSI (FLD (f_reglist_low_st), 16)) {
7a292a7a 5085{
c906108c
SS		 5086 {
5087 SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4);
5088 CPU (h_gr[((UINT) 15)]) = opval;
5089 written |= (1 << 10);
5090 TRACE_RESULT (current_cpu, abuf, "gr-15", 'x', opval);
5091 }
5092 {
5093 SI opval = CPU (h_gr[((UINT) 3)]);
5094 SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval);
5095 written |= (1 << 11);
5096 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
5097 }
7a292a7a 5098}
c906108c
SS		 5099}
5100if (ANDSI (FLD (f_reglist_low_st), 32)) {
7a292a7a 5101{
c906108c
SS		 5102 {
5103 SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4);
5104 CPU (h_gr[((UINT) 15)]) = opval;
5105 written |= (1 << 10);
5106 TRACE_RESULT (current_cpu, abuf, "gr-15", 'x', opval);
5107 }
5108 {
5109 SI opval = CPU (h_gr[((UINT) 2)]);
5110 SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval);
5111 written |= (1 << 11);
5112 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
5113 }
7a292a7a 5114}
c906108c
SS		 5115}
5116if (ANDSI (FLD (f_reglist_low_st), 64)) {
7a292a7a 5117{
c906108c
SS		 5118 {
5119 SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4);
5120 CPU (h_gr[((UINT) 15)]) = opval;
5121 written |= (1 << 10);
5122 TRACE_RESULT (current_cpu, abuf, "gr-15", 'x', opval);
5123 }
5124 {
5125 SI opval = CPU (h_gr[((UINT) 1)]);
5126 SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval);
5127 written |= (1 << 11);
5128 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
5129 }
7a292a7a 5130}
c906108c
SS		 5131}
5132if (ANDSI (FLD (f_reglist_low_st), 128)) {
7a292a7a 5133{
c906108c
SS		 5134 {
5135 SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4);
5136 CPU (h_gr[((UINT) 15)]) = opval;
5137 written |= (1 << 10);
5138 TRACE_RESULT (current_cpu, abuf, "gr-15", 'x', opval);
5139 }
5140 {
5141 SI opval = CPU (h_gr[((UINT) 0)]);
5142 SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval);
5143 written |= (1 << 11);
5144 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
5145 }
c906108c 5146}
7a292a7a
SS		 5147}
5148}
c906108c
SS		 5149
5150 abuf->written = written;
5151#undef FLD
5152}
5153 NEXT (vpc);
5154
5155 CASE (sem, INSN_STM1) : /* stm1 ($reglist_hi_st) */
5156{
5157 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5158 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5159#define FLD(f) abuf->fields.fmt_stm1.f
5160 int UNUSED written = 0;
5161 IADDR UNUSED pc = abuf->addr;
5162 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5163
7a292a7a 5164{
c906108c 5165if (ANDSI (FLD (f_reglist_hi_st), 1)) {
7a292a7a 5166{
c906108c
SS		 5167 SI tmp_save_r15;
5168 tmp_save_r15 = CPU (h_gr[((UINT) 15)]);
5169 {
5170 SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4);
5171 CPU (h_gr[((UINT) 15)]) = opval;
5172 written |= (1 << 9);
5173 TRACE_RESULT (current_cpu, abuf, "gr-15", 'x', opval);
5174 }
5175 {
5176 SI opval = tmp_save_r15;
5177 SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval);
5178 written |= (1 << 10);
5179 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
5180 }
7a292a7a 5181}
c906108c
SS		 5182}
5183if (ANDSI (FLD (f_reglist_hi_st), 2)) {
7a292a7a 5184{
c906108c
SS		 5185 {
5186 SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4);
5187 CPU (h_gr[((UINT) 15)]) = opval;
5188 written |= (1 << 9);
5189 TRACE_RESULT (current_cpu, abuf, "gr-15", 'x', opval);
5190 }
5191 {
5192 SI opval = CPU (h_gr[((UINT) 14)]);
5193 SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval);
5194 written |= (1 << 10);
5195 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
5196 }
7a292a7a 5197}
c906108c
SS		 5198}
5199if (ANDSI (FLD (f_reglist_hi_st), 4)) {
7a292a7a 5200{
c906108c
SS		 5201 {
5202 SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4);
5203 CPU (h_gr[((UINT) 15)]) = opval;
5204 written |= (1 << 9);
5205 TRACE_RESULT (current_cpu, abuf, "gr-15", 'x', opval);
5206 }
5207 {
5208 SI opval = CPU (h_gr[((UINT) 13)]);
5209 SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval);
5210 written |= (1 << 10);
5211 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
5212 }
7a292a7a 5213}
c906108c
SS		 5214}
5215if (ANDSI (FLD (f_reglist_hi_st), 8)) {
7a292a7a 5216{
c906108c
SS		 5217 {
5218 SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4);
5219 CPU (h_gr[((UINT) 15)]) = opval;
5220 written |= (1 << 9);
5221 TRACE_RESULT (current_cpu, abuf, "gr-15", 'x', opval);
5222 }
5223 {
5224 SI opval = CPU (h_gr[((UINT) 12)]);
5225 SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval);
5226 written |= (1 << 10);
5227 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
5228 }
7a292a7a 5229}
c906108c
SS		 5230}
5231if (ANDSI (FLD (f_reglist_hi_st), 16)) {
7a292a7a 5232{
c906108c
SS		 5233 {
5234 SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4);
5235 CPU (h_gr[((UINT) 15)]) = opval;
5236 written |= (1 << 9);
5237 TRACE_RESULT (current_cpu, abuf, "gr-15", 'x', opval);
5238 }
5239 {
5240 SI opval = CPU (h_gr[((UINT) 11)]);
5241 SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval);
5242 written |= (1 << 10);
5243 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
5244 }
7a292a7a 5245}
c906108c
SS		 5246}
5247if (ANDSI (FLD (f_reglist_hi_st), 32)) {
7a292a7a 5248{
c906108c
SS		 5249 {
5250 SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4);
5251 CPU (h_gr[((UINT) 15)]) = opval;
5252 written |= (1 << 9);
5253 TRACE_RESULT (current_cpu, abuf, "gr-15", 'x', opval);
5254 }
5255 {
5256 SI opval = CPU (h_gr[((UINT) 10)]);
5257 SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval);
5258 written |= (1 << 10);
5259 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
5260 }
7a292a7a 5261}
c906108c
SS		 5262}
5263if (ANDSI (FLD (f_reglist_hi_st), 64)) {
7a292a7a 5264{
c906108c
SS		 5265 {
5266 SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4);
5267 CPU (h_gr[((UINT) 15)]) = opval;
5268 written |= (1 << 9);
5269 TRACE_RESULT (current_cpu, abuf, "gr-15", 'x', opval);
5270 }
5271 {
5272 SI opval = CPU (h_gr[((UINT) 9)]);
5273 SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval);
5274 written |= (1 << 10);
5275 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
5276 }
7a292a7a 5277}
c906108c
SS		 5278}
5279if (ANDSI (FLD (f_reglist_hi_st), 128)) {
7a292a7a 5280{
c906108c
SS		 5281 {
5282 SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4);
5283 CPU (h_gr[((UINT) 15)]) = opval;
5284 written |= (1 << 9);
5285 TRACE_RESULT (current_cpu, abuf, "gr-15", 'x', opval);
5286 }
5287 {
5288 SI opval = CPU (h_gr[((UINT) 8)]);
5289 SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval);
5290 written |= (1 << 10);
5291 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
5292 }
c906108c 5293}
7a292a7a
SS		 5294}
5295}
c906108c
SS		 5296
5297 abuf->written = written;
5298#undef FLD
5299}
5300 NEXT (vpc);
5301
5302 CASE (sem, INSN_ENTER) : /* enter $u10 */
5303{
5304 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5305 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5306#define FLD(f) abuf->fields.fmt_enter.f
5307 int UNUSED written = 0;
5308 IADDR UNUSED pc = abuf->addr;
5309 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5310
7a292a7a 5311{
c906108c
SS		 5312 SI tmp_tmp;
5313 tmp_tmp = SUBSI (CPU (h_gr[((UINT) 15)]), 4);
5314 {
5315 SI opval = CPU (h_gr[((UINT) 14)]);
5316 SETMEMSI (current_cpu, pc, tmp_tmp, opval);
5317 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
5318 }
5319 {
5320 SI opval = tmp_tmp;
5321 CPU (h_gr[((UINT) 14)]) = opval;
5322 TRACE_RESULT (current_cpu, abuf, "gr-14", 'x', opval);
5323 }
5324 {
5325 SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), FLD (f_u10));
5326 CPU (h_gr[((UINT) 15)]) = opval;
5327 TRACE_RESULT (current_cpu, abuf, "gr-15", 'x', opval);
5328 }
7a292a7a 5329}
c906108c
SS		 5330
5331#undef FLD
5332}
5333 NEXT (vpc);
5334
5335 CASE (sem, INSN_LEAVE) : /* leave */
5336{
5337 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5338 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5339#define FLD(f) abuf->fields.fmt_leave.f
5340 int UNUSED written = 0;
5341 IADDR UNUSED pc = abuf->addr;
5342 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5343
7a292a7a 5344{
c906108c
SS		 5345 {
5346 SI opval = ADDSI (CPU (h_gr[((UINT) 14)]), 4);
5347 CPU (h_gr[((UINT) 15)]) = opval;
5348 TRACE_RESULT (current_cpu, abuf, "gr-15", 'x', opval);
5349 }
5350 {
5351 SI opval = GETMEMSI (current_cpu, pc, SUBSI (CPU (h_gr[((UINT) 15)]), 4));
5352 CPU (h_gr[((UINT) 14)]) = opval;
5353 TRACE_RESULT (current_cpu, abuf, "gr-14", 'x', opval);
5354 }
7a292a7a 5355}
c906108c
SS		 5356
5357#undef FLD
5358}
5359 NEXT (vpc);
5360
5361 CASE (sem, INSN_XCHB) : /* xchb @$Rj,$Ri */
5362{
5363 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5364 ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5365#define FLD(f) abuf->fields.fmt_xchb.f
5366 int UNUSED written = 0;
5367 IADDR UNUSED pc = abuf->addr;
5368 vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5369
7a292a7a 5370{
c906108c
SS		 5371 SI tmp_tmp;
5372 tmp_tmp = * FLD (i_Ri);
5373 {
5374 SI opval = GETMEMUQI (current_cpu, pc, * FLD (i_Rj));
5375 * FLD (i_Ri) = opval;
5376 TRACE_RESULT (current_cpu, abuf, "Ri", 'x', opval);
5377 }
5378 {
5379 UQI opval = tmp_tmp;
5380 SETMEMUQI (current_cpu, pc, * FLD (i_Rj), opval);
5381 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
5382 }
7a292a7a 5383}
c906108c
SS		 5384
5385#undef FLD
5386}
5387 NEXT (vpc);
5388
5389
5390 }
5391 ENDSWITCH (sem) /* End of semantic switch. */
5392
5393 /* At this point `vpc' contains the next insn to execute. */
5394}
5395
5396#undef DEFINE_SWITCH
5397#endif /* DEFINE_SWITCH */
GDB Binutils - Deliverables
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