Commit | Line | Data |
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c906108c SS |
1 | /* Simulator instruction semantics for fr30bf. |
2 | ||
3 | THIS FILE IS MACHINE GENERATED WITH CGEN. | |
4 | ||
5 | Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc. | |
6 | ||
7 | This file is part of the GNU Simulators. | |
8 | ||
9 | This program is free software; you can redistribute it and/or modify | |
10 | it under the terms of the GNU General Public License as published by | |
11 | the Free Software Foundation; either version 2, or (at your option) | |
12 | any later version. | |
13 | ||
14 | This program is distributed in the hope that it will be useful, | |
15 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | GNU General Public License for more details. | |
18 | ||
19 | You should have received a copy of the GNU General Public License along | |
20 | with this program; if not, write to the Free Software Foundation, Inc., | |
21 | 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. | |
22 | ||
23 | */ | |
24 | ||
25 | #ifdef DEFINE_LABELS | |
26 | ||
27 | /* The labels have the case they have because the enum of insn types | |
28 | is all uppercase and in the non-stdc case the insn symbol is built | |
29 | into the enum name. */ | |
30 | ||
31 | static struct { | |
32 | int index; | |
33 | void *label; | |
34 | } labels[] = { | |
35 | { FR30BF_INSN_X_INVALID, && case_sem_INSN_X_INVALID }, | |
36 | { FR30BF_INSN_X_AFTER, && case_sem_INSN_X_AFTER }, | |
37 | { FR30BF_INSN_X_BEFORE, && case_sem_INSN_X_BEFORE }, | |
38 | { FR30BF_INSN_X_CTI_CHAIN, && case_sem_INSN_X_CTI_CHAIN }, | |
39 | { FR30BF_INSN_X_CHAIN, && case_sem_INSN_X_CHAIN }, | |
40 | { FR30BF_INSN_X_BEGIN, && case_sem_INSN_X_BEGIN }, | |
41 | { FR30BF_INSN_ADD, && case_sem_INSN_ADD }, | |
42 | { FR30BF_INSN_ADDI, && case_sem_INSN_ADDI }, | |
43 | { FR30BF_INSN_ADD2, && case_sem_INSN_ADD2 }, | |
44 | { FR30BF_INSN_ADDC, && case_sem_INSN_ADDC }, | |
45 | { FR30BF_INSN_ADDN, && case_sem_INSN_ADDN }, | |
46 | { FR30BF_INSN_ADDNI, && case_sem_INSN_ADDNI }, | |
47 | { FR30BF_INSN_ADDN2, && case_sem_INSN_ADDN2 }, | |
48 | { FR30BF_INSN_SUB, && case_sem_INSN_SUB }, | |
49 | { FR30BF_INSN_SUBC, && case_sem_INSN_SUBC }, | |
50 | { FR30BF_INSN_SUBN, && case_sem_INSN_SUBN }, | |
51 | { FR30BF_INSN_CMP, && case_sem_INSN_CMP }, | |
52 | { FR30BF_INSN_CMPI, && case_sem_INSN_CMPI }, | |
53 | { FR30BF_INSN_CMP2, && case_sem_INSN_CMP2 }, | |
54 | { FR30BF_INSN_AND, && case_sem_INSN_AND }, | |
55 | { FR30BF_INSN_OR, && case_sem_INSN_OR }, | |
56 | { FR30BF_INSN_EOR, && case_sem_INSN_EOR }, | |
57 | { FR30BF_INSN_ANDM, && case_sem_INSN_ANDM }, | |
58 | { FR30BF_INSN_ANDH, && case_sem_INSN_ANDH }, | |
59 | { FR30BF_INSN_ANDB, && case_sem_INSN_ANDB }, | |
60 | { FR30BF_INSN_ORM, && case_sem_INSN_ORM }, | |
61 | { FR30BF_INSN_ORH, && case_sem_INSN_ORH }, | |
62 | { FR30BF_INSN_ORB, && case_sem_INSN_ORB }, | |
63 | { FR30BF_INSN_EORM, && case_sem_INSN_EORM }, | |
64 | { FR30BF_INSN_EORH, && case_sem_INSN_EORH }, | |
65 | { FR30BF_INSN_EORB, && case_sem_INSN_EORB }, | |
66 | { FR30BF_INSN_BANDL, && case_sem_INSN_BANDL }, | |
67 | { FR30BF_INSN_BORL, && case_sem_INSN_BORL }, | |
68 | { FR30BF_INSN_BEORL, && case_sem_INSN_BEORL }, | |
69 | { FR30BF_INSN_BANDH, && case_sem_INSN_BANDH }, | |
70 | { FR30BF_INSN_BORH, && case_sem_INSN_BORH }, | |
71 | { FR30BF_INSN_BEORH, && case_sem_INSN_BEORH }, | |
72 | { FR30BF_INSN_BTSTL, && case_sem_INSN_BTSTL }, | |
73 | { FR30BF_INSN_BTSTH, && case_sem_INSN_BTSTH }, | |
74 | { FR30BF_INSN_MUL, && case_sem_INSN_MUL }, | |
75 | { FR30BF_INSN_MULU, && case_sem_INSN_MULU }, | |
76 | { FR30BF_INSN_MULH, && case_sem_INSN_MULH }, | |
77 | { FR30BF_INSN_MULUH, && case_sem_INSN_MULUH }, | |
78 | { FR30BF_INSN_DIV0S, && case_sem_INSN_DIV0S }, | |
79 | { FR30BF_INSN_DIV0U, && case_sem_INSN_DIV0U }, | |
80 | { FR30BF_INSN_DIV1, && case_sem_INSN_DIV1 }, | |
81 | { FR30BF_INSN_DIV2, && case_sem_INSN_DIV2 }, | |
82 | { FR30BF_INSN_DIV3, && case_sem_INSN_DIV3 }, | |
83 | { FR30BF_INSN_DIV4S, && case_sem_INSN_DIV4S }, | |
84 | { FR30BF_INSN_LSL, && case_sem_INSN_LSL }, | |
85 | { FR30BF_INSN_LSLI, && case_sem_INSN_LSLI }, | |
86 | { FR30BF_INSN_LSL2, && case_sem_INSN_LSL2 }, | |
87 | { FR30BF_INSN_LSR, && case_sem_INSN_LSR }, | |
88 | { FR30BF_INSN_LSRI, && case_sem_INSN_LSRI }, | |
89 | { FR30BF_INSN_LSR2, && case_sem_INSN_LSR2 }, | |
90 | { FR30BF_INSN_ASR, && case_sem_INSN_ASR }, | |
91 | { FR30BF_INSN_ASRI, && case_sem_INSN_ASRI }, | |
92 | { FR30BF_INSN_ASR2, && case_sem_INSN_ASR2 }, | |
93 | { FR30BF_INSN_LDI8, && case_sem_INSN_LDI8 }, | |
94 | { FR30BF_INSN_LDI20, && case_sem_INSN_LDI20 }, | |
95 | { FR30BF_INSN_LDI32, && case_sem_INSN_LDI32 }, | |
96 | { FR30BF_INSN_LD, && case_sem_INSN_LD }, | |
97 | { FR30BF_INSN_LDUH, && case_sem_INSN_LDUH }, | |
98 | { FR30BF_INSN_LDUB, && case_sem_INSN_LDUB }, | |
99 | { FR30BF_INSN_LDR13, && case_sem_INSN_LDR13 }, | |
100 | { FR30BF_INSN_LDR13UH, && case_sem_INSN_LDR13UH }, | |
101 | { FR30BF_INSN_LDR13UB, && case_sem_INSN_LDR13UB }, | |
102 | { FR30BF_INSN_LDR14, && case_sem_INSN_LDR14 }, | |
103 | { FR30BF_INSN_LDR14UH, && case_sem_INSN_LDR14UH }, | |
104 | { FR30BF_INSN_LDR14UB, && case_sem_INSN_LDR14UB }, | |
105 | { FR30BF_INSN_LDR15, && case_sem_INSN_LDR15 }, | |
106 | { FR30BF_INSN_LDR15GR, && case_sem_INSN_LDR15GR }, | |
107 | { FR30BF_INSN_LDR15DR, && case_sem_INSN_LDR15DR }, | |
108 | { FR30BF_INSN_LDR15PS, && case_sem_INSN_LDR15PS }, | |
109 | { FR30BF_INSN_ST, && case_sem_INSN_ST }, | |
110 | { FR30BF_INSN_STH, && case_sem_INSN_STH }, | |
111 | { FR30BF_INSN_STB, && case_sem_INSN_STB }, | |
112 | { FR30BF_INSN_STR13, && case_sem_INSN_STR13 }, | |
113 | { FR30BF_INSN_STR13H, && case_sem_INSN_STR13H }, | |
114 | { FR30BF_INSN_STR13B, && case_sem_INSN_STR13B }, | |
115 | { FR30BF_INSN_STR14, && case_sem_INSN_STR14 }, | |
116 | { FR30BF_INSN_STR14H, && case_sem_INSN_STR14H }, | |
117 | { FR30BF_INSN_STR14B, && case_sem_INSN_STR14B }, | |
118 | { FR30BF_INSN_STR15, && case_sem_INSN_STR15 }, | |
119 | { FR30BF_INSN_STR15GR, && case_sem_INSN_STR15GR }, | |
120 | { FR30BF_INSN_STR15DR, && case_sem_INSN_STR15DR }, | |
121 | { FR30BF_INSN_STR15PS, && case_sem_INSN_STR15PS }, | |
122 | { FR30BF_INSN_MOV, && case_sem_INSN_MOV }, | |
123 | { FR30BF_INSN_MOVDR, && case_sem_INSN_MOVDR }, | |
124 | { FR30BF_INSN_MOVPS, && case_sem_INSN_MOVPS }, | |
125 | { FR30BF_INSN_MOV2DR, && case_sem_INSN_MOV2DR }, | |
126 | { FR30BF_INSN_MOV2PS, && case_sem_INSN_MOV2PS }, | |
127 | { FR30BF_INSN_JMP, && case_sem_INSN_JMP }, | |
128 | { FR30BF_INSN_JMPD, && case_sem_INSN_JMPD }, | |
129 | { FR30BF_INSN_CALLR, && case_sem_INSN_CALLR }, | |
130 | { FR30BF_INSN_CALLRD, && case_sem_INSN_CALLRD }, | |
131 | { FR30BF_INSN_CALL, && case_sem_INSN_CALL }, | |
132 | { FR30BF_INSN_CALLD, && case_sem_INSN_CALLD }, | |
133 | { FR30BF_INSN_RET, && case_sem_INSN_RET }, | |
134 | { FR30BF_INSN_RET_D, && case_sem_INSN_RET_D }, | |
135 | { FR30BF_INSN_INT, && case_sem_INSN_INT }, | |
136 | { FR30BF_INSN_INTE, && case_sem_INSN_INTE }, | |
137 | { FR30BF_INSN_RETI, && case_sem_INSN_RETI }, | |
138 | { FR30BF_INSN_BRAD, && case_sem_INSN_BRAD }, | |
139 | { FR30BF_INSN_BRA, && case_sem_INSN_BRA }, | |
140 | { FR30BF_INSN_BNOD, && case_sem_INSN_BNOD }, | |
141 | { FR30BF_INSN_BNO, && case_sem_INSN_BNO }, | |
142 | { FR30BF_INSN_BEQD, && case_sem_INSN_BEQD }, | |
143 | { FR30BF_INSN_BEQ, && case_sem_INSN_BEQ }, | |
144 | { FR30BF_INSN_BNED, && case_sem_INSN_BNED }, | |
145 | { FR30BF_INSN_BNE, && case_sem_INSN_BNE }, | |
146 | { FR30BF_INSN_BCD, && case_sem_INSN_BCD }, | |
147 | { FR30BF_INSN_BC, && case_sem_INSN_BC }, | |
148 | { FR30BF_INSN_BNCD, && case_sem_INSN_BNCD }, | |
149 | { FR30BF_INSN_BNC, && case_sem_INSN_BNC }, | |
150 | { FR30BF_INSN_BND, && case_sem_INSN_BND }, | |
151 | { FR30BF_INSN_BN, && case_sem_INSN_BN }, | |
152 | { FR30BF_INSN_BPD, && case_sem_INSN_BPD }, | |
153 | { FR30BF_INSN_BP, && case_sem_INSN_BP }, | |
154 | { FR30BF_INSN_BVD, && case_sem_INSN_BVD }, | |
155 | { FR30BF_INSN_BV, && case_sem_INSN_BV }, | |
156 | { FR30BF_INSN_BNVD, && case_sem_INSN_BNVD }, | |
157 | { FR30BF_INSN_BNV, && case_sem_INSN_BNV }, | |
158 | { FR30BF_INSN_BLTD, && case_sem_INSN_BLTD }, | |
159 | { FR30BF_INSN_BLT, && case_sem_INSN_BLT }, | |
160 | { FR30BF_INSN_BGED, && case_sem_INSN_BGED }, | |
161 | { FR30BF_INSN_BGE, && case_sem_INSN_BGE }, | |
162 | { FR30BF_INSN_BLED, && case_sem_INSN_BLED }, | |
163 | { FR30BF_INSN_BLE, && case_sem_INSN_BLE }, | |
164 | { FR30BF_INSN_BGTD, && case_sem_INSN_BGTD }, | |
165 | { FR30BF_INSN_BGT, && case_sem_INSN_BGT }, | |
166 | { FR30BF_INSN_BLSD, && case_sem_INSN_BLSD }, | |
167 | { FR30BF_INSN_BLS, && case_sem_INSN_BLS }, | |
168 | { FR30BF_INSN_BHID, && case_sem_INSN_BHID }, | |
169 | { FR30BF_INSN_BHI, && case_sem_INSN_BHI }, | |
170 | { FR30BF_INSN_DMOVR13, && case_sem_INSN_DMOVR13 }, | |
171 | { FR30BF_INSN_DMOVR13H, && case_sem_INSN_DMOVR13H }, | |
172 | { FR30BF_INSN_DMOVR13B, && case_sem_INSN_DMOVR13B }, | |
173 | { FR30BF_INSN_DMOVR13PI, && case_sem_INSN_DMOVR13PI }, | |
174 | { FR30BF_INSN_DMOVR13PIH, && case_sem_INSN_DMOVR13PIH }, | |
175 | { FR30BF_INSN_DMOVR13PIB, && case_sem_INSN_DMOVR13PIB }, | |
176 | { FR30BF_INSN_DMOVR15PI, && case_sem_INSN_DMOVR15PI }, | |
177 | { FR30BF_INSN_DMOV2R13, && case_sem_INSN_DMOV2R13 }, | |
178 | { FR30BF_INSN_DMOV2R13H, && case_sem_INSN_DMOV2R13H }, | |
179 | { FR30BF_INSN_DMOV2R13B, && case_sem_INSN_DMOV2R13B }, | |
180 | { FR30BF_INSN_DMOV2R13PI, && case_sem_INSN_DMOV2R13PI }, | |
181 | { FR30BF_INSN_DMOV2R13PIH, && case_sem_INSN_DMOV2R13PIH }, | |
182 | { FR30BF_INSN_DMOV2R13PIB, && case_sem_INSN_DMOV2R13PIB }, | |
183 | { FR30BF_INSN_DMOV2R15PD, && case_sem_INSN_DMOV2R15PD }, | |
184 | { FR30BF_INSN_LDRES, && case_sem_INSN_LDRES }, | |
185 | { FR30BF_INSN_STRES, && case_sem_INSN_STRES }, | |
186 | { FR30BF_INSN_COPOP, && case_sem_INSN_COPOP }, | |
187 | { FR30BF_INSN_COPLD, && case_sem_INSN_COPLD }, | |
188 | { FR30BF_INSN_COPST, && case_sem_INSN_COPST }, | |
189 | { FR30BF_INSN_COPSV, && case_sem_INSN_COPSV }, | |
190 | { FR30BF_INSN_NOP, && case_sem_INSN_NOP }, | |
191 | { FR30BF_INSN_ANDCCR, && case_sem_INSN_ANDCCR }, | |
192 | { FR30BF_INSN_ORCCR, && case_sem_INSN_ORCCR }, | |
193 | { FR30BF_INSN_STILM, && case_sem_INSN_STILM }, | |
194 | { FR30BF_INSN_ADDSP, && case_sem_INSN_ADDSP }, | |
195 | { FR30BF_INSN_EXTSB, && case_sem_INSN_EXTSB }, | |
196 | { FR30BF_INSN_EXTUB, && case_sem_INSN_EXTUB }, | |
197 | { FR30BF_INSN_EXTSH, && case_sem_INSN_EXTSH }, | |
198 | { FR30BF_INSN_EXTUH, && case_sem_INSN_EXTUH }, | |
199 | { FR30BF_INSN_LDM0, && case_sem_INSN_LDM0 }, | |
200 | { FR30BF_INSN_LDM1, && case_sem_INSN_LDM1 }, | |
201 | { FR30BF_INSN_STM0, && case_sem_INSN_STM0 }, | |
202 | { FR30BF_INSN_STM1, && case_sem_INSN_STM1 }, | |
203 | { FR30BF_INSN_ENTER, && case_sem_INSN_ENTER }, | |
204 | { FR30BF_INSN_LEAVE, && case_sem_INSN_LEAVE }, | |
205 | { FR30BF_INSN_XCHB, && case_sem_INSN_XCHB }, | |
206 | { 0, 0 } | |
207 | }; | |
208 | int i; | |
209 | ||
210 | for (i = 0; labels[i].label != 0; ++i) | |
96baa820 | 211 | { |
c906108c | 212 | #if FAST_P |
96baa820 | 213 | CPU_IDESC (current_cpu) [labels[i].index].sem_fast_lab = labels[i].label; |
c906108c | 214 | #else |
96baa820 | 215 | CPU_IDESC (current_cpu) [labels[i].index].sem_full_lab = labels[i].label; |
c906108c | 216 | #endif |
96baa820 | 217 | } |
c906108c SS |
218 | |
219 | #undef DEFINE_LABELS | |
220 | #endif /* DEFINE_LABELS */ | |
221 | ||
222 | #ifdef DEFINE_SWITCH | |
223 | ||
224 | /* If hyper-fast [well not unnecessarily slow] execution is selected, turn | |
225 | off frills like tracing and profiling. */ | |
226 | /* FIXME: A better way would be to have TRACE_RESULT check for something | |
227 | that can cause it to be optimized out. Another way would be to emit | |
228 | special handlers into the instruction "stream". */ | |
229 | ||
230 | #if FAST_P | |
231 | #undef TRACE_RESULT | |
232 | #define TRACE_RESULT(cpu, abuf, name, type, val) | |
233 | #endif | |
234 | ||
235 | #undef GET_ATTR | |
236 | #define GET_ATTR(cpu, num, attr) CGEN_ATTR_VALUE (NULL, abuf->idesc->attrs, CGEN_INSN_##attr) | |
237 | ||
238 | { | |
239 | ||
240 | #if WITH_SCACHE_PBB | |
241 | ||
242 | /* Branch to next handler without going around main loop. */ | |
243 | #define NEXT(vpc) goto * SEM_ARGBUF (vpc) -> semantic.sem_case | |
244 | SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) | |
245 | ||
246 | #else /* ! WITH_SCACHE_PBB */ | |
247 | ||
248 | #define NEXT(vpc) BREAK (sem) | |
249 | #ifdef __GNUC__ | |
250 | #if FAST_P | |
251 | SWITCH (sem, SEM_ARGBUF (sc) -> idesc->sem_fast_lab) | |
252 | #else | |
253 | SWITCH (sem, SEM_ARGBUF (sc) -> idesc->sem_full_lab) | |
254 | #endif | |
255 | #else | |
256 | SWITCH (sem, SEM_ARGBUF (sc) -> idesc->num) | |
257 | #endif | |
258 | ||
259 | #endif /* ! WITH_SCACHE_PBB */ | |
260 | ||
261 | { | |
262 | ||
263 | CASE (sem, INSN_X_INVALID) : /* --invalid-- */ | |
264 | { | |
265 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
266 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
267 | #define FLD(f) abuf->fields.fmt_empty.f | |
268 | int UNUSED written = 0; | |
269 | IADDR UNUSED pc = abuf->addr; | |
270 | vpc = SEM_NEXT_VPC (sem_arg, pc, 0); | |
271 | ||
272 | { | |
2acceee2 JM |
273 | /* Update the recorded pc in the cpu state struct. |
274 | Only necessary for WITH_SCACHE case, but to avoid the | |
275 | conditional compilation .... */ | |
c906108c | 276 | SET_H_PC (pc); |
2acceee2 JM |
277 | /* Virtual insns have zero size. Overwrite vpc with address of next insn |
278 | using the default-insn-bitsize spec. When executing insns in parallel | |
279 | we may want to queue the fault and continue execution. */ | |
280 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
281 | vpc = sim_engine_invalid_insn (current_cpu, pc, vpc); | |
c906108c SS |
282 | } |
283 | ||
284 | #undef FLD | |
285 | } | |
286 | NEXT (vpc); | |
287 | ||
288 | CASE (sem, INSN_X_AFTER) : /* --after-- */ | |
289 | { | |
290 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
291 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
292 | #define FLD(f) abuf->fields.fmt_empty.f | |
293 | int UNUSED written = 0; | |
294 | IADDR UNUSED pc = abuf->addr; | |
295 | vpc = SEM_NEXT_VPC (sem_arg, pc, 0); | |
296 | ||
297 | { | |
298 | #if WITH_SCACHE_PBB_FR30BF | |
299 | fr30bf_pbb_after (current_cpu, sem_arg); | |
300 | #endif | |
301 | } | |
302 | ||
303 | #undef FLD | |
304 | } | |
305 | NEXT (vpc); | |
306 | ||
307 | CASE (sem, INSN_X_BEFORE) : /* --before-- */ | |
308 | { | |
309 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
310 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
311 | #define FLD(f) abuf->fields.fmt_empty.f | |
312 | int UNUSED written = 0; | |
313 | IADDR UNUSED pc = abuf->addr; | |
314 | vpc = SEM_NEXT_VPC (sem_arg, pc, 0); | |
315 | ||
316 | { | |
317 | #if WITH_SCACHE_PBB_FR30BF | |
318 | fr30bf_pbb_before (current_cpu, sem_arg); | |
319 | #endif | |
320 | } | |
321 | ||
322 | #undef FLD | |
323 | } | |
324 | NEXT (vpc); | |
325 | ||
326 | CASE (sem, INSN_X_CTI_CHAIN) : /* --cti-chain-- */ | |
327 | { | |
328 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
329 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
330 | #define FLD(f) abuf->fields.fmt_empty.f | |
331 | int UNUSED written = 0; | |
332 | IADDR UNUSED pc = abuf->addr; | |
333 | vpc = SEM_NEXT_VPC (sem_arg, pc, 0); | |
334 | ||
335 | { | |
336 | #if WITH_SCACHE_PBB_FR30BF | |
337 | #ifdef DEFINE_SWITCH | |
338 | vpc = fr30bf_pbb_cti_chain (current_cpu, sem_arg, | |
96baa820 | 339 | pbb_br_type, pbb_br_npc); |
c906108c SS |
340 | BREAK (sem); |
341 | #else | |
342 | /* FIXME: Allow provision of explicit ifmt spec in insn spec. */ | |
343 | vpc = fr30bf_pbb_cti_chain (current_cpu, sem_arg, | |
96baa820 | 344 | CPU_PBB_BR_TYPE (current_cpu), |
c906108c SS |
345 | CPU_PBB_BR_NPC (current_cpu)); |
346 | #endif | |
347 | #endif | |
348 | } | |
349 | ||
350 | #undef FLD | |
351 | } | |
352 | NEXT (vpc); | |
353 | ||
354 | CASE (sem, INSN_X_CHAIN) : /* --chain-- */ | |
355 | { | |
356 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
357 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
358 | #define FLD(f) abuf->fields.fmt_empty.f | |
359 | int UNUSED written = 0; | |
360 | IADDR UNUSED pc = abuf->addr; | |
361 | vpc = SEM_NEXT_VPC (sem_arg, pc, 0); | |
362 | ||
363 | { | |
364 | #if WITH_SCACHE_PBB_FR30BF | |
365 | vpc = fr30bf_pbb_chain (current_cpu, sem_arg); | |
366 | #ifdef DEFINE_SWITCH | |
367 | BREAK (sem); | |
368 | #endif | |
369 | #endif | |
370 | } | |
371 | ||
372 | #undef FLD | |
373 | } | |
374 | NEXT (vpc); | |
375 | ||
376 | CASE (sem, INSN_X_BEGIN) : /* --begin-- */ | |
377 | { | |
378 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
379 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
380 | #define FLD(f) abuf->fields.fmt_empty.f | |
381 | int UNUSED written = 0; | |
382 | IADDR UNUSED pc = abuf->addr; | |
383 | vpc = SEM_NEXT_VPC (sem_arg, pc, 0); | |
384 | ||
385 | { | |
386 | #if WITH_SCACHE_PBB_FR30BF | |
387 | #ifdef DEFINE_SWITCH | |
388 | /* In the switch case FAST_P is a constant, allowing several optimizations | |
389 | in any called inline functions. */ | |
390 | vpc = fr30bf_pbb_begin (current_cpu, FAST_P); | |
391 | #else | |
392 | vpc = fr30bf_pbb_begin (current_cpu, STATE_RUN_FAST_P (CPU_STATE (current_cpu))); | |
393 | #endif | |
394 | #endif | |
395 | } | |
396 | ||
397 | #undef FLD | |
398 | } | |
399 | NEXT (vpc); | |
400 | ||
401 | CASE (sem, INSN_ADD) : /* add $Rj,$Ri */ | |
402 | { | |
403 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
404 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 405 | #define FLD(f) abuf->fields.sfmt_add.f |
c906108c SS |
406 | int UNUSED written = 0; |
407 | IADDR UNUSED pc = abuf->addr; | |
408 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
409 | ||
7a292a7a | 410 | { |
c906108c SS |
411 | { |
412 | BI opval = ADDOFSI (* FLD (i_Ri), * FLD (i_Rj), 0); | |
413 | CPU (h_vbit) = opval; | |
414 | TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); | |
415 | } | |
416 | { | |
417 | BI opval = ADDCFSI (* FLD (i_Ri), * FLD (i_Rj), 0); | |
418 | CPU (h_cbit) = opval; | |
419 | TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); | |
420 | } | |
421 | { | |
422 | SI opval = ADDSI (* FLD (i_Ri), * FLD (i_Rj)); | |
423 | * FLD (i_Ri) = opval; | |
424 | TRACE_RESULT (current_cpu, abuf, "Ri", 'x', opval); | |
425 | } | |
7a292a7a | 426 | { |
c906108c SS |
427 | { |
428 | BI opval = EQSI (* FLD (i_Ri), 0); | |
429 | CPU (h_zbit) = opval; | |
430 | TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); | |
431 | } | |
432 | { | |
433 | BI opval = LTSI (* FLD (i_Ri), 0); | |
434 | CPU (h_nbit) = opval; | |
435 | TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); | |
436 | } | |
7a292a7a SS |
437 | } |
438 | } | |
c906108c SS |
439 | |
440 | #undef FLD | |
441 | } | |
442 | NEXT (vpc); | |
443 | ||
444 | CASE (sem, INSN_ADDI) : /* add $u4,$Ri */ | |
445 | { | |
446 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
447 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 448 | #define FLD(f) abuf->fields.sfmt_addi.f |
c906108c SS |
449 | int UNUSED written = 0; |
450 | IADDR UNUSED pc = abuf->addr; | |
451 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
452 | ||
7a292a7a | 453 | { |
c906108c SS |
454 | { |
455 | BI opval = ADDOFSI (* FLD (i_Ri), FLD (f_u4), 0); | |
456 | CPU (h_vbit) = opval; | |
457 | TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); | |
458 | } | |
459 | { | |
460 | BI opval = ADDCFSI (* FLD (i_Ri), FLD (f_u4), 0); | |
461 | CPU (h_cbit) = opval; | |
462 | TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); | |
463 | } | |
464 | { | |
465 | SI opval = ADDSI (* FLD (i_Ri), FLD (f_u4)); | |
466 | * FLD (i_Ri) = opval; | |
467 | TRACE_RESULT (current_cpu, abuf, "Ri", 'x', opval); | |
468 | } | |
7a292a7a | 469 | { |
c906108c SS |
470 | { |
471 | BI opval = EQSI (* FLD (i_Ri), 0); | |
472 | CPU (h_zbit) = opval; | |
473 | TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); | |
474 | } | |
475 | { | |
476 | BI opval = LTSI (* FLD (i_Ri), 0); | |
477 | CPU (h_nbit) = opval; | |
478 | TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); | |
479 | } | |
7a292a7a SS |
480 | } |
481 | } | |
c906108c SS |
482 | |
483 | #undef FLD | |
484 | } | |
485 | NEXT (vpc); | |
486 | ||
487 | CASE (sem, INSN_ADD2) : /* add2 $m4,$Ri */ | |
488 | { | |
489 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
490 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 491 | #define FLD(f) abuf->fields.sfmt_add2.f |
c906108c SS |
492 | int UNUSED written = 0; |
493 | IADDR UNUSED pc = abuf->addr; | |
494 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
495 | ||
7a292a7a | 496 | { |
c906108c SS |
497 | { |
498 | BI opval = ADDOFSI (* FLD (i_Ri), FLD (f_m4), 0); | |
499 | CPU (h_vbit) = opval; | |
500 | TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); | |
501 | } | |
502 | { | |
503 | BI opval = ADDCFSI (* FLD (i_Ri), FLD (f_m4), 0); | |
504 | CPU (h_cbit) = opval; | |
505 | TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); | |
506 | } | |
507 | { | |
508 | SI opval = ADDSI (* FLD (i_Ri), FLD (f_m4)); | |
509 | * FLD (i_Ri) = opval; | |
510 | TRACE_RESULT (current_cpu, abuf, "Ri", 'x', opval); | |
511 | } | |
7a292a7a | 512 | { |
c906108c SS |
513 | { |
514 | BI opval = EQSI (* FLD (i_Ri), 0); | |
515 | CPU (h_zbit) = opval; | |
516 | TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); | |
517 | } | |
518 | { | |
519 | BI opval = LTSI (* FLD (i_Ri), 0); | |
520 | CPU (h_nbit) = opval; | |
521 | TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); | |
522 | } | |
7a292a7a SS |
523 | } |
524 | } | |
c906108c SS |
525 | |
526 | #undef FLD | |
527 | } | |
528 | NEXT (vpc); | |
529 | ||
530 | CASE (sem, INSN_ADDC) : /* addc $Rj,$Ri */ | |
531 | { | |
532 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
533 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 534 | #define FLD(f) abuf->fields.sfmt_add.f |
c906108c SS |
535 | int UNUSED written = 0; |
536 | IADDR UNUSED pc = abuf->addr; | |
537 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
538 | ||
7a292a7a | 539 | { |
c906108c SS |
540 | SI tmp_tmp; |
541 | tmp_tmp = ADDCSI (* FLD (i_Ri), * FLD (i_Rj), CPU (h_cbit)); | |
542 | { | |
543 | BI opval = ADDOFSI (* FLD (i_Ri), * FLD (i_Rj), CPU (h_cbit)); | |
544 | CPU (h_vbit) = opval; | |
545 | TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); | |
546 | } | |
547 | { | |
548 | BI opval = ADDCFSI (* FLD (i_Ri), * FLD (i_Rj), CPU (h_cbit)); | |
549 | CPU (h_cbit) = opval; | |
550 | TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); | |
551 | } | |
552 | { | |
553 | SI opval = tmp_tmp; | |
554 | * FLD (i_Ri) = opval; | |
555 | TRACE_RESULT (current_cpu, abuf, "Ri", 'x', opval); | |
556 | } | |
7a292a7a | 557 | { |
c906108c SS |
558 | { |
559 | BI opval = EQSI (* FLD (i_Ri), 0); | |
560 | CPU (h_zbit) = opval; | |
561 | TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); | |
562 | } | |
563 | { | |
564 | BI opval = LTSI (* FLD (i_Ri), 0); | |
565 | CPU (h_nbit) = opval; | |
566 | TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); | |
567 | } | |
7a292a7a SS |
568 | } |
569 | } | |
c906108c SS |
570 | |
571 | #undef FLD | |
572 | } | |
573 | NEXT (vpc); | |
574 | ||
575 | CASE (sem, INSN_ADDN) : /* addn $Rj,$Ri */ | |
576 | { | |
577 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
578 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 579 | #define FLD(f) abuf->fields.sfmt_add.f |
c906108c SS |
580 | int UNUSED written = 0; |
581 | IADDR UNUSED pc = abuf->addr; | |
582 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
583 | ||
584 | { | |
585 | SI opval = ADDSI (* FLD (i_Ri), * FLD (i_Rj)); | |
586 | * FLD (i_Ri) = opval; | |
587 | TRACE_RESULT (current_cpu, abuf, "Ri", 'x', opval); | |
588 | } | |
589 | ||
590 | #undef FLD | |
591 | } | |
592 | NEXT (vpc); | |
593 | ||
594 | CASE (sem, INSN_ADDNI) : /* addn $u4,$Ri */ | |
595 | { | |
596 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
597 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 598 | #define FLD(f) abuf->fields.sfmt_addi.f |
c906108c SS |
599 | int UNUSED written = 0; |
600 | IADDR UNUSED pc = abuf->addr; | |
601 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
602 | ||
603 | { | |
604 | SI opval = ADDSI (* FLD (i_Ri), FLD (f_u4)); | |
605 | * FLD (i_Ri) = opval; | |
606 | TRACE_RESULT (current_cpu, abuf, "Ri", 'x', opval); | |
607 | } | |
608 | ||
609 | #undef FLD | |
610 | } | |
611 | NEXT (vpc); | |
612 | ||
613 | CASE (sem, INSN_ADDN2) : /* addn2 $m4,$Ri */ | |
614 | { | |
615 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
616 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 617 | #define FLD(f) abuf->fields.sfmt_add2.f |
c906108c SS |
618 | int UNUSED written = 0; |
619 | IADDR UNUSED pc = abuf->addr; | |
620 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
621 | ||
622 | { | |
623 | SI opval = ADDSI (* FLD (i_Ri), FLD (f_m4)); | |
624 | * FLD (i_Ri) = opval; | |
625 | TRACE_RESULT (current_cpu, abuf, "Ri", 'x', opval); | |
626 | } | |
627 | ||
628 | #undef FLD | |
629 | } | |
630 | NEXT (vpc); | |
631 | ||
632 | CASE (sem, INSN_SUB) : /* sub $Rj,$Ri */ | |
633 | { | |
634 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
635 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 636 | #define FLD(f) abuf->fields.sfmt_add.f |
c906108c SS |
637 | int UNUSED written = 0; |
638 | IADDR UNUSED pc = abuf->addr; | |
639 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
640 | ||
7a292a7a | 641 | { |
c906108c SS |
642 | { |
643 | BI opval = SUBOFSI (* FLD (i_Ri), * FLD (i_Rj), 0); | |
644 | CPU (h_vbit) = opval; | |
645 | TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); | |
646 | } | |
647 | { | |
648 | BI opval = SUBCFSI (* FLD (i_Ri), * FLD (i_Rj), 0); | |
649 | CPU (h_cbit) = opval; | |
650 | TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); | |
651 | } | |
652 | { | |
653 | SI opval = SUBSI (* FLD (i_Ri), * FLD (i_Rj)); | |
654 | * FLD (i_Ri) = opval; | |
655 | TRACE_RESULT (current_cpu, abuf, "Ri", 'x', opval); | |
656 | } | |
7a292a7a | 657 | { |
c906108c SS |
658 | { |
659 | BI opval = EQSI (* FLD (i_Ri), 0); | |
660 | CPU (h_zbit) = opval; | |
661 | TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); | |
662 | } | |
663 | { | |
664 | BI opval = LTSI (* FLD (i_Ri), 0); | |
665 | CPU (h_nbit) = opval; | |
666 | TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); | |
667 | } | |
7a292a7a SS |
668 | } |
669 | } | |
c906108c SS |
670 | |
671 | #undef FLD | |
672 | } | |
673 | NEXT (vpc); | |
674 | ||
675 | CASE (sem, INSN_SUBC) : /* subc $Rj,$Ri */ | |
676 | { | |
677 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
678 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 679 | #define FLD(f) abuf->fields.sfmt_add.f |
c906108c SS |
680 | int UNUSED written = 0; |
681 | IADDR UNUSED pc = abuf->addr; | |
682 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
683 | ||
7a292a7a | 684 | { |
c906108c SS |
685 | SI tmp_tmp; |
686 | tmp_tmp = SUBCSI (* FLD (i_Ri), * FLD (i_Rj), CPU (h_cbit)); | |
687 | { | |
688 | BI opval = SUBOFSI (* FLD (i_Ri), * FLD (i_Rj), CPU (h_cbit)); | |
689 | CPU (h_vbit) = opval; | |
690 | TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); | |
691 | } | |
692 | { | |
693 | BI opval = SUBCFSI (* FLD (i_Ri), * FLD (i_Rj), CPU (h_cbit)); | |
694 | CPU (h_cbit) = opval; | |
695 | TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); | |
696 | } | |
697 | { | |
698 | SI opval = tmp_tmp; | |
699 | * FLD (i_Ri) = opval; | |
700 | TRACE_RESULT (current_cpu, abuf, "Ri", 'x', opval); | |
701 | } | |
7a292a7a | 702 | { |
c906108c SS |
703 | { |
704 | BI opval = EQSI (* FLD (i_Ri), 0); | |
705 | CPU (h_zbit) = opval; | |
706 | TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); | |
707 | } | |
708 | { | |
709 | BI opval = LTSI (* FLD (i_Ri), 0); | |
710 | CPU (h_nbit) = opval; | |
711 | TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); | |
712 | } | |
7a292a7a SS |
713 | } |
714 | } | |
c906108c SS |
715 | |
716 | #undef FLD | |
717 | } | |
718 | NEXT (vpc); | |
719 | ||
720 | CASE (sem, INSN_SUBN) : /* subn $Rj,$Ri */ | |
721 | { | |
722 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
723 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 724 | #define FLD(f) abuf->fields.sfmt_add.f |
c906108c SS |
725 | int UNUSED written = 0; |
726 | IADDR UNUSED pc = abuf->addr; | |
727 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
728 | ||
729 | { | |
730 | SI opval = SUBSI (* FLD (i_Ri), * FLD (i_Rj)); | |
731 | * FLD (i_Ri) = opval; | |
732 | TRACE_RESULT (current_cpu, abuf, "Ri", 'x', opval); | |
733 | } | |
734 | ||
735 | #undef FLD | |
736 | } | |
737 | NEXT (vpc); | |
738 | ||
739 | CASE (sem, INSN_CMP) : /* cmp $Rj,$Ri */ | |
740 | { | |
741 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
742 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 743 | #define FLD(f) abuf->fields.sfmt_str13.f |
c906108c SS |
744 | int UNUSED written = 0; |
745 | IADDR UNUSED pc = abuf->addr; | |
746 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
747 | ||
7a292a7a | 748 | { |
c906108c SS |
749 | SI tmp_tmp1; |
750 | { | |
751 | BI opval = SUBOFSI (* FLD (i_Ri), * FLD (i_Rj), 0); | |
752 | CPU (h_vbit) = opval; | |
753 | TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); | |
754 | } | |
755 | { | |
756 | BI opval = SUBCFSI (* FLD (i_Ri), * FLD (i_Rj), 0); | |
757 | CPU (h_cbit) = opval; | |
758 | TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); | |
759 | } | |
760 | tmp_tmp1 = SUBSI (* FLD (i_Ri), * FLD (i_Rj)); | |
7a292a7a | 761 | { |
c906108c SS |
762 | { |
763 | BI opval = EQSI (tmp_tmp1, 0); | |
764 | CPU (h_zbit) = opval; | |
765 | TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); | |
766 | } | |
767 | { | |
768 | BI opval = LTSI (tmp_tmp1, 0); | |
769 | CPU (h_nbit) = opval; | |
770 | TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); | |
771 | } | |
7a292a7a SS |
772 | } |
773 | } | |
c906108c SS |
774 | |
775 | #undef FLD | |
776 | } | |
777 | NEXT (vpc); | |
778 | ||
779 | CASE (sem, INSN_CMPI) : /* cmp $u4,$Ri */ | |
780 | { | |
781 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
782 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 783 | #define FLD(f) abuf->fields.sfmt_addi.f |
c906108c SS |
784 | int UNUSED written = 0; |
785 | IADDR UNUSED pc = abuf->addr; | |
786 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
787 | ||
7a292a7a | 788 | { |
c906108c SS |
789 | SI tmp_tmp1; |
790 | { | |
791 | BI opval = SUBOFSI (* FLD (i_Ri), FLD (f_u4), 0); | |
792 | CPU (h_vbit) = opval; | |
793 | TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); | |
794 | } | |
795 | { | |
796 | BI opval = SUBCFSI (* FLD (i_Ri), FLD (f_u4), 0); | |
797 | CPU (h_cbit) = opval; | |
798 | TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); | |
799 | } | |
800 | tmp_tmp1 = SUBSI (* FLD (i_Ri), FLD (f_u4)); | |
7a292a7a | 801 | { |
c906108c SS |
802 | { |
803 | BI opval = EQSI (tmp_tmp1, 0); | |
804 | CPU (h_zbit) = opval; | |
805 | TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); | |
806 | } | |
807 | { | |
808 | BI opval = LTSI (tmp_tmp1, 0); | |
809 | CPU (h_nbit) = opval; | |
810 | TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); | |
811 | } | |
7a292a7a SS |
812 | } |
813 | } | |
c906108c SS |
814 | |
815 | #undef FLD | |
816 | } | |
817 | NEXT (vpc); | |
818 | ||
819 | CASE (sem, INSN_CMP2) : /* cmp2 $m4,$Ri */ | |
820 | { | |
821 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
822 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 823 | #define FLD(f) abuf->fields.sfmt_add2.f |
c906108c SS |
824 | int UNUSED written = 0; |
825 | IADDR UNUSED pc = abuf->addr; | |
826 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
827 | ||
7a292a7a | 828 | { |
c906108c SS |
829 | SI tmp_tmp1; |
830 | { | |
831 | BI opval = SUBOFSI (* FLD (i_Ri), FLD (f_m4), 0); | |
832 | CPU (h_vbit) = opval; | |
833 | TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); | |
834 | } | |
835 | { | |
836 | BI opval = SUBCFSI (* FLD (i_Ri), FLD (f_m4), 0); | |
837 | CPU (h_cbit) = opval; | |
838 | TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); | |
839 | } | |
840 | tmp_tmp1 = SUBSI (* FLD (i_Ri), FLD (f_m4)); | |
7a292a7a | 841 | { |
c906108c SS |
842 | { |
843 | BI opval = EQSI (tmp_tmp1, 0); | |
844 | CPU (h_zbit) = opval; | |
845 | TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); | |
846 | } | |
847 | { | |
848 | BI opval = LTSI (tmp_tmp1, 0); | |
849 | CPU (h_nbit) = opval; | |
850 | TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); | |
851 | } | |
7a292a7a SS |
852 | } |
853 | } | |
c906108c SS |
854 | |
855 | #undef FLD | |
856 | } | |
857 | NEXT (vpc); | |
858 | ||
859 | CASE (sem, INSN_AND) : /* and $Rj,$Ri */ | |
860 | { | |
861 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
862 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 863 | #define FLD(f) abuf->fields.sfmt_add.f |
c906108c SS |
864 | int UNUSED written = 0; |
865 | IADDR UNUSED pc = abuf->addr; | |
866 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
867 | ||
7a292a7a | 868 | { |
c906108c SS |
869 | { |
870 | SI opval = ANDSI (* FLD (i_Ri), * FLD (i_Rj)); | |
871 | * FLD (i_Ri) = opval; | |
872 | TRACE_RESULT (current_cpu, abuf, "Ri", 'x', opval); | |
873 | } | |
7a292a7a | 874 | { |
c906108c SS |
875 | { |
876 | BI opval = EQSI (* FLD (i_Ri), 0); | |
877 | CPU (h_zbit) = opval; | |
878 | TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); | |
879 | } | |
880 | { | |
881 | BI opval = LTSI (* FLD (i_Ri), 0); | |
882 | CPU (h_nbit) = opval; | |
883 | TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); | |
884 | } | |
7a292a7a SS |
885 | } |
886 | } | |
c906108c SS |
887 | |
888 | #undef FLD | |
889 | } | |
890 | NEXT (vpc); | |
891 | ||
892 | CASE (sem, INSN_OR) : /* or $Rj,$Ri */ | |
893 | { | |
894 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
895 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 896 | #define FLD(f) abuf->fields.sfmt_add.f |
c906108c SS |
897 | int UNUSED written = 0; |
898 | IADDR UNUSED pc = abuf->addr; | |
899 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
900 | ||
7a292a7a | 901 | { |
c906108c SS |
902 | { |
903 | SI opval = ORSI (* FLD (i_Ri), * FLD (i_Rj)); | |
904 | * FLD (i_Ri) = opval; | |
905 | TRACE_RESULT (current_cpu, abuf, "Ri", 'x', opval); | |
906 | } | |
7a292a7a | 907 | { |
c906108c SS |
908 | { |
909 | BI opval = EQSI (* FLD (i_Ri), 0); | |
910 | CPU (h_zbit) = opval; | |
911 | TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); | |
912 | } | |
913 | { | |
914 | BI opval = LTSI (* FLD (i_Ri), 0); | |
915 | CPU (h_nbit) = opval; | |
916 | TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); | |
917 | } | |
7a292a7a SS |
918 | } |
919 | } | |
c906108c SS |
920 | |
921 | #undef FLD | |
922 | } | |
923 | NEXT (vpc); | |
924 | ||
925 | CASE (sem, INSN_EOR) : /* eor $Rj,$Ri */ | |
926 | { | |
927 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
928 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 929 | #define FLD(f) abuf->fields.sfmt_add.f |
c906108c SS |
930 | int UNUSED written = 0; |
931 | IADDR UNUSED pc = abuf->addr; | |
932 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
933 | ||
7a292a7a | 934 | { |
c906108c SS |
935 | { |
936 | SI opval = XORSI (* FLD (i_Ri), * FLD (i_Rj)); | |
937 | * FLD (i_Ri) = opval; | |
938 | TRACE_RESULT (current_cpu, abuf, "Ri", 'x', opval); | |
939 | } | |
7a292a7a | 940 | { |
c906108c SS |
941 | { |
942 | BI opval = EQSI (* FLD (i_Ri), 0); | |
943 | CPU (h_zbit) = opval; | |
944 | TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); | |
945 | } | |
946 | { | |
947 | BI opval = LTSI (* FLD (i_Ri), 0); | |
948 | CPU (h_nbit) = opval; | |
949 | TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); | |
950 | } | |
7a292a7a SS |
951 | } |
952 | } | |
c906108c SS |
953 | |
954 | #undef FLD | |
955 | } | |
956 | NEXT (vpc); | |
957 | ||
958 | CASE (sem, INSN_ANDM) : /* and $Rj,@$Ri */ | |
959 | { | |
960 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
961 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 962 | #define FLD(f) abuf->fields.sfmt_str13.f |
c906108c SS |
963 | int UNUSED written = 0; |
964 | IADDR UNUSED pc = abuf->addr; | |
965 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
966 | ||
7a292a7a | 967 | { |
c906108c SS |
968 | SI tmp_tmp; |
969 | tmp_tmp = ANDSI (GETMEMSI (current_cpu, pc, * FLD (i_Ri)), * FLD (i_Rj)); | |
7a292a7a | 970 | { |
c906108c SS |
971 | { |
972 | BI opval = EQSI (tmp_tmp, 0); | |
973 | CPU (h_zbit) = opval; | |
974 | TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); | |
975 | } | |
976 | { | |
977 | BI opval = LTSI (tmp_tmp, 0); | |
978 | CPU (h_nbit) = opval; | |
979 | TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); | |
980 | } | |
7a292a7a | 981 | } |
c906108c SS |
982 | { |
983 | SI opval = tmp_tmp; | |
984 | SETMEMSI (current_cpu, pc, * FLD (i_Ri), opval); | |
985 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
986 | } | |
7a292a7a | 987 | } |
c906108c SS |
988 | |
989 | #undef FLD | |
990 | } | |
991 | NEXT (vpc); | |
992 | ||
993 | CASE (sem, INSN_ANDH) : /* andh $Rj,@$Ri */ | |
994 | { | |
995 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
996 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 997 | #define FLD(f) abuf->fields.sfmt_str13.f |
c906108c SS |
998 | int UNUSED written = 0; |
999 | IADDR UNUSED pc = abuf->addr; | |
1000 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
1001 | ||
7a292a7a | 1002 | { |
c906108c SS |
1003 | HI tmp_tmp; |
1004 | tmp_tmp = ANDHI (GETMEMHI (current_cpu, pc, * FLD (i_Ri)), * FLD (i_Rj)); | |
7a292a7a | 1005 | { |
c906108c SS |
1006 | { |
1007 | BI opval = EQHI (tmp_tmp, 0); | |
1008 | CPU (h_zbit) = opval; | |
1009 | TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); | |
1010 | } | |
1011 | { | |
1012 | BI opval = LTHI (tmp_tmp, 0); | |
1013 | CPU (h_nbit) = opval; | |
1014 | TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); | |
1015 | } | |
7a292a7a | 1016 | } |
c906108c SS |
1017 | { |
1018 | HI opval = tmp_tmp; | |
1019 | SETMEMHI (current_cpu, pc, * FLD (i_Ri), opval); | |
1020 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
1021 | } | |
7a292a7a | 1022 | } |
c906108c SS |
1023 | |
1024 | #undef FLD | |
1025 | } | |
1026 | NEXT (vpc); | |
1027 | ||
1028 | CASE (sem, INSN_ANDB) : /* andb $Rj,@$Ri */ | |
1029 | { | |
1030 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1031 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1032 | #define FLD(f) abuf->fields.sfmt_str13.f |
c906108c SS |
1033 | int UNUSED written = 0; |
1034 | IADDR UNUSED pc = abuf->addr; | |
1035 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
1036 | ||
7a292a7a | 1037 | { |
c906108c SS |
1038 | QI tmp_tmp; |
1039 | tmp_tmp = ANDQI (GETMEMQI (current_cpu, pc, * FLD (i_Ri)), * FLD (i_Rj)); | |
7a292a7a | 1040 | { |
c906108c SS |
1041 | { |
1042 | BI opval = EQQI (tmp_tmp, 0); | |
1043 | CPU (h_zbit) = opval; | |
1044 | TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); | |
1045 | } | |
1046 | { | |
1047 | BI opval = LTQI (tmp_tmp, 0); | |
1048 | CPU (h_nbit) = opval; | |
1049 | TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); | |
1050 | } | |
7a292a7a | 1051 | } |
c906108c SS |
1052 | { |
1053 | QI opval = tmp_tmp; | |
1054 | SETMEMQI (current_cpu, pc, * FLD (i_Ri), opval); | |
1055 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
1056 | } | |
7a292a7a | 1057 | } |
c906108c SS |
1058 | |
1059 | #undef FLD | |
1060 | } | |
1061 | NEXT (vpc); | |
1062 | ||
1063 | CASE (sem, INSN_ORM) : /* or $Rj,@$Ri */ | |
1064 | { | |
1065 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1066 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1067 | #define FLD(f) abuf->fields.sfmt_str13.f |
c906108c SS |
1068 | int UNUSED written = 0; |
1069 | IADDR UNUSED pc = abuf->addr; | |
1070 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
1071 | ||
7a292a7a | 1072 | { |
c906108c SS |
1073 | SI tmp_tmp; |
1074 | tmp_tmp = ORSI (GETMEMSI (current_cpu, pc, * FLD (i_Ri)), * FLD (i_Rj)); | |
7a292a7a | 1075 | { |
c906108c SS |
1076 | { |
1077 | BI opval = EQSI (tmp_tmp, 0); | |
1078 | CPU (h_zbit) = opval; | |
1079 | TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); | |
1080 | } | |
1081 | { | |
1082 | BI opval = LTSI (tmp_tmp, 0); | |
1083 | CPU (h_nbit) = opval; | |
1084 | TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); | |
1085 | } | |
7a292a7a | 1086 | } |
c906108c SS |
1087 | { |
1088 | SI opval = tmp_tmp; | |
1089 | SETMEMSI (current_cpu, pc, * FLD (i_Ri), opval); | |
1090 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
1091 | } | |
7a292a7a | 1092 | } |
c906108c SS |
1093 | |
1094 | #undef FLD | |
1095 | } | |
1096 | NEXT (vpc); | |
1097 | ||
1098 | CASE (sem, INSN_ORH) : /* orh $Rj,@$Ri */ | |
1099 | { | |
1100 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1101 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1102 | #define FLD(f) abuf->fields.sfmt_str13.f |
c906108c SS |
1103 | int UNUSED written = 0; |
1104 | IADDR UNUSED pc = abuf->addr; | |
1105 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
1106 | ||
7a292a7a | 1107 | { |
c906108c SS |
1108 | HI tmp_tmp; |
1109 | tmp_tmp = ORHI (GETMEMHI (current_cpu, pc, * FLD (i_Ri)), * FLD (i_Rj)); | |
7a292a7a | 1110 | { |
c906108c SS |
1111 | { |
1112 | BI opval = EQHI (tmp_tmp, 0); | |
1113 | CPU (h_zbit) = opval; | |
1114 | TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); | |
1115 | } | |
1116 | { | |
1117 | BI opval = LTHI (tmp_tmp, 0); | |
1118 | CPU (h_nbit) = opval; | |
1119 | TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); | |
1120 | } | |
7a292a7a | 1121 | } |
c906108c SS |
1122 | { |
1123 | HI opval = tmp_tmp; | |
1124 | SETMEMHI (current_cpu, pc, * FLD (i_Ri), opval); | |
1125 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
1126 | } | |
7a292a7a | 1127 | } |
c906108c SS |
1128 | |
1129 | #undef FLD | |
1130 | } | |
1131 | NEXT (vpc); | |
1132 | ||
1133 | CASE (sem, INSN_ORB) : /* orb $Rj,@$Ri */ | |
1134 | { | |
1135 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1136 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1137 | #define FLD(f) abuf->fields.sfmt_str13.f |
c906108c SS |
1138 | int UNUSED written = 0; |
1139 | IADDR UNUSED pc = abuf->addr; | |
1140 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
1141 | ||
7a292a7a | 1142 | { |
c906108c SS |
1143 | QI tmp_tmp; |
1144 | tmp_tmp = ORQI (GETMEMQI (current_cpu, pc, * FLD (i_Ri)), * FLD (i_Rj)); | |
7a292a7a | 1145 | { |
c906108c SS |
1146 | { |
1147 | BI opval = EQQI (tmp_tmp, 0); | |
1148 | CPU (h_zbit) = opval; | |
1149 | TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); | |
1150 | } | |
1151 | { | |
1152 | BI opval = LTQI (tmp_tmp, 0); | |
1153 | CPU (h_nbit) = opval; | |
1154 | TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); | |
1155 | } | |
7a292a7a | 1156 | } |
c906108c SS |
1157 | { |
1158 | QI opval = tmp_tmp; | |
1159 | SETMEMQI (current_cpu, pc, * FLD (i_Ri), opval); | |
1160 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
1161 | } | |
7a292a7a | 1162 | } |
c906108c SS |
1163 | |
1164 | #undef FLD | |
1165 | } | |
1166 | NEXT (vpc); | |
1167 | ||
1168 | CASE (sem, INSN_EORM) : /* eor $Rj,@$Ri */ | |
1169 | { | |
1170 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1171 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1172 | #define FLD(f) abuf->fields.sfmt_str13.f |
c906108c SS |
1173 | int UNUSED written = 0; |
1174 | IADDR UNUSED pc = abuf->addr; | |
1175 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
1176 | ||
7a292a7a | 1177 | { |
c906108c SS |
1178 | SI tmp_tmp; |
1179 | tmp_tmp = XORSI (GETMEMSI (current_cpu, pc, * FLD (i_Ri)), * FLD (i_Rj)); | |
7a292a7a | 1180 | { |
c906108c SS |
1181 | { |
1182 | BI opval = EQSI (tmp_tmp, 0); | |
1183 | CPU (h_zbit) = opval; | |
1184 | TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); | |
1185 | } | |
1186 | { | |
1187 | BI opval = LTSI (tmp_tmp, 0); | |
1188 | CPU (h_nbit) = opval; | |
1189 | TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); | |
1190 | } | |
7a292a7a | 1191 | } |
c906108c SS |
1192 | { |
1193 | SI opval = tmp_tmp; | |
1194 | SETMEMSI (current_cpu, pc, * FLD (i_Ri), opval); | |
1195 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
1196 | } | |
7a292a7a | 1197 | } |
c906108c SS |
1198 | |
1199 | #undef FLD | |
1200 | } | |
1201 | NEXT (vpc); | |
1202 | ||
1203 | CASE (sem, INSN_EORH) : /* eorh $Rj,@$Ri */ | |
1204 | { | |
1205 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1206 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1207 | #define FLD(f) abuf->fields.sfmt_str13.f |
c906108c SS |
1208 | int UNUSED written = 0; |
1209 | IADDR UNUSED pc = abuf->addr; | |
1210 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
1211 | ||
7a292a7a | 1212 | { |
c906108c SS |
1213 | HI tmp_tmp; |
1214 | tmp_tmp = XORHI (GETMEMHI (current_cpu, pc, * FLD (i_Ri)), * FLD (i_Rj)); | |
7a292a7a | 1215 | { |
c906108c SS |
1216 | { |
1217 | BI opval = EQHI (tmp_tmp, 0); | |
1218 | CPU (h_zbit) = opval; | |
1219 | TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); | |
1220 | } | |
1221 | { | |
1222 | BI opval = LTHI (tmp_tmp, 0); | |
1223 | CPU (h_nbit) = opval; | |
1224 | TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); | |
1225 | } | |
7a292a7a | 1226 | } |
c906108c SS |
1227 | { |
1228 | HI opval = tmp_tmp; | |
1229 | SETMEMHI (current_cpu, pc, * FLD (i_Ri), opval); | |
1230 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
1231 | } | |
7a292a7a | 1232 | } |
c906108c SS |
1233 | |
1234 | #undef FLD | |
1235 | } | |
1236 | NEXT (vpc); | |
1237 | ||
1238 | CASE (sem, INSN_EORB) : /* eorb $Rj,@$Ri */ | |
1239 | { | |
1240 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1241 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1242 | #define FLD(f) abuf->fields.sfmt_str13.f |
c906108c SS |
1243 | int UNUSED written = 0; |
1244 | IADDR UNUSED pc = abuf->addr; | |
1245 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
1246 | ||
7a292a7a | 1247 | { |
c906108c SS |
1248 | QI tmp_tmp; |
1249 | tmp_tmp = XORQI (GETMEMQI (current_cpu, pc, * FLD (i_Ri)), * FLD (i_Rj)); | |
7a292a7a | 1250 | { |
c906108c SS |
1251 | { |
1252 | BI opval = EQQI (tmp_tmp, 0); | |
1253 | CPU (h_zbit) = opval; | |
1254 | TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); | |
1255 | } | |
1256 | { | |
1257 | BI opval = LTQI (tmp_tmp, 0); | |
1258 | CPU (h_nbit) = opval; | |
1259 | TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); | |
1260 | } | |
7a292a7a | 1261 | } |
c906108c SS |
1262 | { |
1263 | QI opval = tmp_tmp; | |
1264 | SETMEMQI (current_cpu, pc, * FLD (i_Ri), opval); | |
1265 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
1266 | } | |
7a292a7a | 1267 | } |
c906108c SS |
1268 | |
1269 | #undef FLD | |
1270 | } | |
1271 | NEXT (vpc); | |
1272 | ||
1273 | CASE (sem, INSN_BANDL) : /* bandl $u4,@$Ri */ | |
1274 | { | |
1275 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1276 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1277 | #define FLD(f) abuf->fields.sfmt_addi.f |
c906108c SS |
1278 | int UNUSED written = 0; |
1279 | IADDR UNUSED pc = abuf->addr; | |
1280 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
1281 | ||
1282 | { | |
1283 | QI opval = ANDQI (ORQI (FLD (f_u4), 240), GETMEMQI (current_cpu, pc, * FLD (i_Ri))); | |
1284 | SETMEMQI (current_cpu, pc, * FLD (i_Ri), opval); | |
1285 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
1286 | } | |
1287 | ||
1288 | #undef FLD | |
1289 | } | |
1290 | NEXT (vpc); | |
1291 | ||
1292 | CASE (sem, INSN_BORL) : /* borl $u4,@$Ri */ | |
1293 | { | |
1294 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1295 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1296 | #define FLD(f) abuf->fields.sfmt_addi.f |
c906108c SS |
1297 | int UNUSED written = 0; |
1298 | IADDR UNUSED pc = abuf->addr; | |
1299 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
1300 | ||
1301 | { | |
1302 | QI opval = ORQI (FLD (f_u4), GETMEMQI (current_cpu, pc, * FLD (i_Ri))); | |
1303 | SETMEMQI (current_cpu, pc, * FLD (i_Ri), opval); | |
1304 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
1305 | } | |
1306 | ||
1307 | #undef FLD | |
1308 | } | |
1309 | NEXT (vpc); | |
1310 | ||
1311 | CASE (sem, INSN_BEORL) : /* beorl $u4,@$Ri */ | |
1312 | { | |
1313 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1314 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1315 | #define FLD(f) abuf->fields.sfmt_addi.f |
c906108c SS |
1316 | int UNUSED written = 0; |
1317 | IADDR UNUSED pc = abuf->addr; | |
1318 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
1319 | ||
1320 | { | |
1321 | QI opval = XORQI (FLD (f_u4), GETMEMQI (current_cpu, pc, * FLD (i_Ri))); | |
1322 | SETMEMQI (current_cpu, pc, * FLD (i_Ri), opval); | |
1323 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
1324 | } | |
1325 | ||
1326 | #undef FLD | |
1327 | } | |
1328 | NEXT (vpc); | |
1329 | ||
1330 | CASE (sem, INSN_BANDH) : /* bandh $u4,@$Ri */ | |
1331 | { | |
1332 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1333 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1334 | #define FLD(f) abuf->fields.sfmt_addi.f |
c906108c SS |
1335 | int UNUSED written = 0; |
1336 | IADDR UNUSED pc = abuf->addr; | |
1337 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
1338 | ||
1339 | { | |
1340 | QI opval = ANDQI (ORQI (SLLQI (FLD (f_u4), 4), 15), GETMEMQI (current_cpu, pc, * FLD (i_Ri))); | |
1341 | SETMEMQI (current_cpu, pc, * FLD (i_Ri), opval); | |
1342 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
1343 | } | |
1344 | ||
1345 | #undef FLD | |
1346 | } | |
1347 | NEXT (vpc); | |
1348 | ||
1349 | CASE (sem, INSN_BORH) : /* borh $u4,@$Ri */ | |
1350 | { | |
1351 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1352 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1353 | #define FLD(f) abuf->fields.sfmt_addi.f |
c906108c SS |
1354 | int UNUSED written = 0; |
1355 | IADDR UNUSED pc = abuf->addr; | |
1356 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
1357 | ||
1358 | { | |
1359 | QI opval = ORQI (SLLQI (FLD (f_u4), 4), GETMEMQI (current_cpu, pc, * FLD (i_Ri))); | |
1360 | SETMEMQI (current_cpu, pc, * FLD (i_Ri), opval); | |
1361 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
1362 | } | |
1363 | ||
1364 | #undef FLD | |
1365 | } | |
1366 | NEXT (vpc); | |
1367 | ||
1368 | CASE (sem, INSN_BEORH) : /* beorh $u4,@$Ri */ | |
1369 | { | |
1370 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1371 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1372 | #define FLD(f) abuf->fields.sfmt_addi.f |
c906108c SS |
1373 | int UNUSED written = 0; |
1374 | IADDR UNUSED pc = abuf->addr; | |
1375 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
1376 | ||
1377 | { | |
1378 | QI opval = XORQI (SLLQI (FLD (f_u4), 4), GETMEMQI (current_cpu, pc, * FLD (i_Ri))); | |
1379 | SETMEMQI (current_cpu, pc, * FLD (i_Ri), opval); | |
1380 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
1381 | } | |
1382 | ||
1383 | #undef FLD | |
1384 | } | |
1385 | NEXT (vpc); | |
1386 | ||
1387 | CASE (sem, INSN_BTSTL) : /* btstl $u4,@$Ri */ | |
1388 | { | |
1389 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1390 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1391 | #define FLD(f) abuf->fields.sfmt_addi.f |
c906108c SS |
1392 | int UNUSED written = 0; |
1393 | IADDR UNUSED pc = abuf->addr; | |
1394 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
1395 | ||
7a292a7a | 1396 | { |
c906108c SS |
1397 | QI tmp_tmp; |
1398 | tmp_tmp = ANDQI (FLD (f_u4), GETMEMQI (current_cpu, pc, * FLD (i_Ri))); | |
1399 | { | |
1400 | BI opval = EQQI (tmp_tmp, 0); | |
1401 | CPU (h_zbit) = opval; | |
1402 | TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); | |
1403 | } | |
1404 | { | |
1405 | BI opval = 0; | |
1406 | CPU (h_nbit) = opval; | |
1407 | TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); | |
1408 | } | |
7a292a7a | 1409 | } |
c906108c SS |
1410 | |
1411 | #undef FLD | |
1412 | } | |
1413 | NEXT (vpc); | |
1414 | ||
1415 | CASE (sem, INSN_BTSTH) : /* btsth $u4,@$Ri */ | |
1416 | { | |
1417 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1418 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1419 | #define FLD(f) abuf->fields.sfmt_addi.f |
c906108c SS |
1420 | int UNUSED written = 0; |
1421 | IADDR UNUSED pc = abuf->addr; | |
1422 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
1423 | ||
7a292a7a | 1424 | { |
c906108c SS |
1425 | QI tmp_tmp; |
1426 | tmp_tmp = ANDQI (SLLQI (FLD (f_u4), 4), GETMEMQI (current_cpu, pc, * FLD (i_Ri))); | |
1427 | { | |
1428 | BI opval = EQQI (tmp_tmp, 0); | |
1429 | CPU (h_zbit) = opval; | |
1430 | TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); | |
1431 | } | |
1432 | { | |
1433 | BI opval = LTQI (tmp_tmp, 0); | |
1434 | CPU (h_nbit) = opval; | |
1435 | TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); | |
1436 | } | |
7a292a7a | 1437 | } |
c906108c SS |
1438 | |
1439 | #undef FLD | |
1440 | } | |
1441 | NEXT (vpc); | |
1442 | ||
1443 | CASE (sem, INSN_MUL) : /* mul $Rj,$Ri */ | |
1444 | { | |
1445 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1446 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1447 | #define FLD(f) abuf->fields.sfmt_str13.f |
c906108c SS |
1448 | int UNUSED written = 0; |
1449 | IADDR UNUSED pc = abuf->addr; | |
1450 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
1451 | ||
7a292a7a | 1452 | { |
c906108c SS |
1453 | DI tmp_tmp; |
1454 | tmp_tmp = MULDI (EXTSIDI (* FLD (i_Rj)), EXTSIDI (* FLD (i_Ri))); | |
1455 | { | |
1456 | SI opval = TRUNCDISI (tmp_tmp); | |
1457 | SET_H_DR (((UINT) 5), opval); | |
1458 | TRACE_RESULT (current_cpu, abuf, "dr-5", 'x', opval); | |
1459 | } | |
1460 | { | |
1461 | SI opval = TRUNCDISI (SRLDI (tmp_tmp, 32)); | |
1462 | SET_H_DR (((UINT) 4), opval); | |
1463 | TRACE_RESULT (current_cpu, abuf, "dr-4", 'x', opval); | |
1464 | } | |
1465 | { | |
1466 | BI opval = LTSI (GET_H_DR (((UINT) 5)), 0); | |
1467 | CPU (h_nbit) = opval; | |
1468 | TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); | |
1469 | } | |
1470 | { | |
1471 | BI opval = EQDI (tmp_tmp, MAKEDI (0, 0)); | |
1472 | CPU (h_zbit) = opval; | |
1473 | TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); | |
1474 | } | |
1475 | { | |
1476 | BI opval = ORIF (GTDI (tmp_tmp, MAKEDI (0, 2147483647)), LTDI (tmp_tmp, NEGDI (MAKEDI (0, 0x80000000)))); | |
1477 | CPU (h_vbit) = opval; | |
1478 | TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); | |
1479 | } | |
7a292a7a | 1480 | } |
c906108c SS |
1481 | |
1482 | #undef FLD | |
1483 | } | |
1484 | NEXT (vpc); | |
1485 | ||
1486 | CASE (sem, INSN_MULU) : /* mulu $Rj,$Ri */ | |
1487 | { | |
1488 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1489 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1490 | #define FLD(f) abuf->fields.sfmt_str13.f |
c906108c SS |
1491 | int UNUSED written = 0; |
1492 | IADDR UNUSED pc = abuf->addr; | |
1493 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
1494 | ||
7a292a7a | 1495 | { |
c906108c SS |
1496 | DI tmp_tmp; |
1497 | tmp_tmp = MULDI (ZEXTSIDI (* FLD (i_Rj)), ZEXTSIDI (* FLD (i_Ri))); | |
1498 | { | |
1499 | SI opval = TRUNCDISI (tmp_tmp); | |
1500 | SET_H_DR (((UINT) 5), opval); | |
1501 | TRACE_RESULT (current_cpu, abuf, "dr-5", 'x', opval); | |
1502 | } | |
1503 | { | |
1504 | SI opval = TRUNCDISI (SRLDI (tmp_tmp, 32)); | |
1505 | SET_H_DR (((UINT) 4), opval); | |
1506 | TRACE_RESULT (current_cpu, abuf, "dr-4", 'x', opval); | |
1507 | } | |
1508 | { | |
1509 | BI opval = LTSI (GET_H_DR (((UINT) 4)), 0); | |
1510 | CPU (h_nbit) = opval; | |
1511 | TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); | |
1512 | } | |
1513 | { | |
1514 | BI opval = EQSI (GET_H_DR (((UINT) 5)), 0); | |
1515 | CPU (h_zbit) = opval; | |
1516 | TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); | |
1517 | } | |
1518 | { | |
1519 | BI opval = NESI (GET_H_DR (((UINT) 4)), 0); | |
1520 | CPU (h_vbit) = opval; | |
1521 | TRACE_RESULT (current_cpu, abuf, "vbit", 'x', opval); | |
1522 | } | |
7a292a7a | 1523 | } |
c906108c SS |
1524 | |
1525 | #undef FLD | |
1526 | } | |
1527 | NEXT (vpc); | |
1528 | ||
1529 | CASE (sem, INSN_MULH) : /* mulh $Rj,$Ri */ | |
1530 | { | |
1531 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1532 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1533 | #define FLD(f) abuf->fields.sfmt_str13.f |
c906108c SS |
1534 | int UNUSED written = 0; |
1535 | IADDR UNUSED pc = abuf->addr; | |
1536 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
1537 | ||
7a292a7a | 1538 | { |
c906108c SS |
1539 | { |
1540 | SI opval = MULHI (TRUNCSIHI (* FLD (i_Rj)), TRUNCSIHI (* FLD (i_Ri))); | |
1541 | SET_H_DR (((UINT) 5), opval); | |
1542 | TRACE_RESULT (current_cpu, abuf, "dr-5", 'x', opval); | |
1543 | } | |
1544 | { | |
1545 | BI opval = LTSI (GET_H_DR (((UINT) 5)), 0); | |
1546 | CPU (h_nbit) = opval; | |
1547 | TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); | |
1548 | } | |
1549 | { | |
1550 | BI opval = GESI (GET_H_DR (((UINT) 5)), 0); | |
1551 | CPU (h_zbit) = opval; | |
1552 | TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); | |
1553 | } | |
7a292a7a | 1554 | } |
c906108c SS |
1555 | |
1556 | #undef FLD | |
1557 | } | |
1558 | NEXT (vpc); | |
1559 | ||
1560 | CASE (sem, INSN_MULUH) : /* muluh $Rj,$Ri */ | |
1561 | { | |
1562 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1563 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1564 | #define FLD(f) abuf->fields.sfmt_str13.f |
c906108c SS |
1565 | int UNUSED written = 0; |
1566 | IADDR UNUSED pc = abuf->addr; | |
1567 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
1568 | ||
7a292a7a | 1569 | { |
c906108c SS |
1570 | { |
1571 | SI opval = MULSI (ANDSI (* FLD (i_Rj), 65535), ANDSI (* FLD (i_Ri), 65535)); | |
1572 | SET_H_DR (((UINT) 5), opval); | |
1573 | TRACE_RESULT (current_cpu, abuf, "dr-5", 'x', opval); | |
1574 | } | |
1575 | { | |
1576 | BI opval = LTSI (GET_H_DR (((UINT) 5)), 0); | |
1577 | CPU (h_nbit) = opval; | |
1578 | TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); | |
1579 | } | |
1580 | { | |
1581 | BI opval = GESI (GET_H_DR (((UINT) 5)), 0); | |
1582 | CPU (h_zbit) = opval; | |
1583 | TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); | |
1584 | } | |
7a292a7a | 1585 | } |
c906108c SS |
1586 | |
1587 | #undef FLD | |
1588 | } | |
1589 | NEXT (vpc); | |
1590 | ||
1591 | CASE (sem, INSN_DIV0S) : /* div0s $Ri */ | |
1592 | { | |
1593 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1594 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1595 | #define FLD(f) abuf->fields.sfmt_mov2dr.f |
c906108c SS |
1596 | int UNUSED written = 0; |
1597 | IADDR UNUSED pc = abuf->addr; | |
1598 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
1599 | ||
7a292a7a | 1600 | { |
c906108c SS |
1601 | { |
1602 | BI opval = LTSI (GET_H_DR (((UINT) 5)), 0); | |
1603 | CPU (h_d0bit) = opval; | |
1604 | TRACE_RESULT (current_cpu, abuf, "d0bit", 'x', opval); | |
1605 | } | |
1606 | { | |
1607 | BI opval = XORBI (CPU (h_d0bit), LTSI (* FLD (i_Ri), 0)); | |
1608 | CPU (h_d1bit) = opval; | |
1609 | TRACE_RESULT (current_cpu, abuf, "d1bit", 'x', opval); | |
1610 | } | |
1611 | if (NEBI (CPU (h_d0bit), 0)) { | |
1612 | { | |
1613 | SI opval = 0xffffffff; | |
1614 | SET_H_DR (((UINT) 4), opval); | |
1615 | written |= (1 << 5); | |
1616 | TRACE_RESULT (current_cpu, abuf, "dr-4", 'x', opval); | |
1617 | } | |
1618 | } else { | |
1619 | { | |
1620 | SI opval = 0; | |
1621 | SET_H_DR (((UINT) 4), opval); | |
1622 | written |= (1 << 5); | |
1623 | TRACE_RESULT (current_cpu, abuf, "dr-4", 'x', opval); | |
1624 | } | |
1625 | } | |
7a292a7a | 1626 | } |
c906108c SS |
1627 | |
1628 | abuf->written = written; | |
1629 | #undef FLD | |
1630 | } | |
1631 | NEXT (vpc); | |
1632 | ||
1633 | CASE (sem, INSN_DIV0U) : /* div0u $Ri */ | |
1634 | { | |
1635 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1636 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1637 | #define FLD(f) abuf->fields.fmt_empty.f |
c906108c SS |
1638 | int UNUSED written = 0; |
1639 | IADDR UNUSED pc = abuf->addr; | |
1640 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
1641 | ||
7a292a7a | 1642 | { |
c906108c SS |
1643 | { |
1644 | BI opval = 0; | |
1645 | CPU (h_d0bit) = opval; | |
1646 | TRACE_RESULT (current_cpu, abuf, "d0bit", 'x', opval); | |
1647 | } | |
1648 | { | |
1649 | BI opval = 0; | |
1650 | CPU (h_d1bit) = opval; | |
1651 | TRACE_RESULT (current_cpu, abuf, "d1bit", 'x', opval); | |
1652 | } | |
1653 | { | |
1654 | SI opval = 0; | |
1655 | SET_H_DR (((UINT) 4), opval); | |
1656 | TRACE_RESULT (current_cpu, abuf, "dr-4", 'x', opval); | |
1657 | } | |
7a292a7a | 1658 | } |
c906108c SS |
1659 | |
1660 | #undef FLD | |
1661 | } | |
1662 | NEXT (vpc); | |
1663 | ||
1664 | CASE (sem, INSN_DIV1) : /* div1 $Ri */ | |
1665 | { | |
1666 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1667 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1668 | #define FLD(f) abuf->fields.sfmt_mov2dr.f |
c906108c SS |
1669 | int UNUSED written = 0; |
1670 | IADDR UNUSED pc = abuf->addr; | |
1671 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
1672 | ||
7a292a7a | 1673 | { |
c906108c SS |
1674 | SI tmp_tmp; |
1675 | { | |
1676 | SI opval = SLLSI (GET_H_DR (((UINT) 4)), 1); | |
1677 | SET_H_DR (((UINT) 4), opval); | |
1678 | TRACE_RESULT (current_cpu, abuf, "dr-4", 'x', opval); | |
1679 | } | |
1680 | if (LTSI (GET_H_DR (((UINT) 5)), 0)) { | |
1681 | { | |
1682 | SI opval = ADDSI (GET_H_DR (((UINT) 4)), 1); | |
1683 | SET_H_DR (((UINT) 4), opval); | |
1684 | TRACE_RESULT (current_cpu, abuf, "dr-4", 'x', opval); | |
1685 | } | |
1686 | } | |
1687 | { | |
1688 | SI opval = SLLSI (GET_H_DR (((UINT) 5)), 1); | |
1689 | SET_H_DR (((UINT) 5), opval); | |
1690 | TRACE_RESULT (current_cpu, abuf, "dr-5", 'x', opval); | |
1691 | } | |
1692 | if (EQBI (CPU (h_d1bit), 1)) { | |
7a292a7a | 1693 | { |
c906108c SS |
1694 | tmp_tmp = ADDSI (GET_H_DR (((UINT) 4)), * FLD (i_Ri)); |
1695 | { | |
1696 | BI opval = ADDCFSI (GET_H_DR (((UINT) 4)), * FLD (i_Ri), 0); | |
1697 | CPU (h_cbit) = opval; | |
1698 | written |= (1 << 6); | |
1699 | TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); | |
1700 | } | |
7a292a7a | 1701 | } |
c906108c | 1702 | } else { |
7a292a7a | 1703 | { |
c906108c SS |
1704 | tmp_tmp = SUBSI (GET_H_DR (((UINT) 4)), * FLD (i_Ri)); |
1705 | { | |
1706 | BI opval = SUBCFSI (GET_H_DR (((UINT) 4)), * FLD (i_Ri), 0); | |
1707 | CPU (h_cbit) = opval; | |
1708 | written |= (1 << 6); | |
1709 | TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); | |
1710 | } | |
7a292a7a | 1711 | } |
c906108c SS |
1712 | } |
1713 | if (NOTBI (XORBI (XORBI (CPU (h_d0bit), CPU (h_d1bit)), CPU (h_cbit)))) { | |
7a292a7a | 1714 | { |
c906108c SS |
1715 | { |
1716 | SI opval = tmp_tmp; | |
1717 | SET_H_DR (((UINT) 4), opval); | |
1718 | TRACE_RESULT (current_cpu, abuf, "dr-4", 'x', opval); | |
1719 | } | |
1720 | { | |
1721 | SI opval = ORSI (GET_H_DR (((UINT) 5)), 1); | |
1722 | SET_H_DR (((UINT) 5), opval); | |
1723 | TRACE_RESULT (current_cpu, abuf, "dr-5", 'x', opval); | |
1724 | } | |
7a292a7a | 1725 | } |
c906108c SS |
1726 | } |
1727 | { | |
1728 | BI opval = EQSI (GET_H_DR (((UINT) 4)), 0); | |
1729 | CPU (h_zbit) = opval; | |
1730 | TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); | |
1731 | } | |
7a292a7a | 1732 | } |
c906108c SS |
1733 | |
1734 | abuf->written = written; | |
1735 | #undef FLD | |
1736 | } | |
1737 | NEXT (vpc); | |
1738 | ||
1739 | CASE (sem, INSN_DIV2) : /* div2 $Ri */ | |
1740 | { | |
1741 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1742 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1743 | #define FLD(f) abuf->fields.sfmt_mov2dr.f |
c906108c SS |
1744 | int UNUSED written = 0; |
1745 | IADDR UNUSED pc = abuf->addr; | |
1746 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
1747 | ||
7a292a7a | 1748 | { |
c906108c SS |
1749 | SI tmp_tmp; |
1750 | if (EQBI (CPU (h_d1bit), 1)) { | |
7a292a7a | 1751 | { |
c906108c SS |
1752 | tmp_tmp = ADDSI (GET_H_DR (((UINT) 4)), * FLD (i_Ri)); |
1753 | { | |
1754 | BI opval = ADDCFSI (GET_H_DR (((UINT) 4)), * FLD (i_Ri), 0); | |
1755 | CPU (h_cbit) = opval; | |
1756 | written |= (1 << 3); | |
1757 | TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); | |
1758 | } | |
7a292a7a | 1759 | } |
c906108c | 1760 | } else { |
7a292a7a | 1761 | { |
c906108c SS |
1762 | tmp_tmp = SUBSI (GET_H_DR (((UINT) 4)), * FLD (i_Ri)); |
1763 | { | |
1764 | BI opval = SUBCFSI (GET_H_DR (((UINT) 4)), * FLD (i_Ri), 0); | |
1765 | CPU (h_cbit) = opval; | |
1766 | written |= (1 << 3); | |
1767 | TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); | |
1768 | } | |
7a292a7a | 1769 | } |
c906108c SS |
1770 | } |
1771 | if (EQSI (tmp_tmp, 0)) { | |
7a292a7a | 1772 | { |
c906108c SS |
1773 | { |
1774 | BI opval = 1; | |
1775 | CPU (h_zbit) = opval; | |
1776 | written |= (1 << 5); | |
1777 | TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); | |
1778 | } | |
1779 | { | |
1780 | SI opval = 0; | |
1781 | SET_H_DR (((UINT) 4), opval); | |
1782 | written |= (1 << 4); | |
1783 | TRACE_RESULT (current_cpu, abuf, "dr-4", 'x', opval); | |
1784 | } | |
7a292a7a | 1785 | } |
c906108c SS |
1786 | } else { |
1787 | { | |
1788 | BI opval = 0; | |
1789 | CPU (h_zbit) = opval; | |
1790 | written |= (1 << 5); | |
1791 | TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); | |
1792 | } | |
1793 | } | |
7a292a7a | 1794 | } |
c906108c SS |
1795 | |
1796 | abuf->written = written; | |
1797 | #undef FLD | |
1798 | } | |
1799 | NEXT (vpc); | |
1800 | ||
1801 | CASE (sem, INSN_DIV3) : /* div3 */ | |
1802 | { | |
1803 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1804 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1805 | #define FLD(f) abuf->fields.fmt_empty.f |
c906108c SS |
1806 | int UNUSED written = 0; |
1807 | IADDR UNUSED pc = abuf->addr; | |
1808 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
1809 | ||
1810 | if (EQBI (CPU (h_zbit), 1)) { | |
1811 | { | |
1812 | SI opval = ADDSI (GET_H_DR (((UINT) 5)), 1); | |
1813 | SET_H_DR (((UINT) 5), opval); | |
1814 | written |= (1 << 2); | |
1815 | TRACE_RESULT (current_cpu, abuf, "dr-5", 'x', opval); | |
1816 | } | |
1817 | } | |
1818 | ||
1819 | abuf->written = written; | |
1820 | #undef FLD | |
1821 | } | |
1822 | NEXT (vpc); | |
1823 | ||
1824 | CASE (sem, INSN_DIV4S) : /* div4s */ | |
1825 | { | |
1826 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1827 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1828 | #define FLD(f) abuf->fields.fmt_empty.f |
c906108c SS |
1829 | int UNUSED written = 0; |
1830 | IADDR UNUSED pc = abuf->addr; | |
1831 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
1832 | ||
1833 | if (EQBI (CPU (h_d1bit), 1)) { | |
1834 | { | |
1835 | SI opval = NEGSI (GET_H_DR (((UINT) 5))); | |
1836 | SET_H_DR (((UINT) 5), opval); | |
1837 | written |= (1 << 2); | |
1838 | TRACE_RESULT (current_cpu, abuf, "dr-5", 'x', opval); | |
1839 | } | |
1840 | } | |
1841 | ||
1842 | abuf->written = written; | |
1843 | #undef FLD | |
1844 | } | |
1845 | NEXT (vpc); | |
1846 | ||
1847 | CASE (sem, INSN_LSL) : /* lsl $Rj,$Ri */ | |
1848 | { | |
1849 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1850 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1851 | #define FLD(f) abuf->fields.sfmt_add.f |
c906108c SS |
1852 | int UNUSED written = 0; |
1853 | IADDR UNUSED pc = abuf->addr; | |
1854 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
1855 | ||
7a292a7a | 1856 | { |
c906108c SS |
1857 | SI tmp_shift; |
1858 | tmp_shift = ANDSI (* FLD (i_Rj), 31); | |
1859 | if (NESI (tmp_shift, 0)) { | |
7a292a7a | 1860 | { |
c906108c SS |
1861 | { |
1862 | BI opval = NESI (ANDSI (* FLD (i_Ri), SLLSI (1, SUBSI (32, tmp_shift))), 0); | |
1863 | CPU (h_cbit) = opval; | |
1864 | written |= (1 << 3); | |
1865 | TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); | |
1866 | } | |
1867 | { | |
1868 | SI opval = SLLSI (* FLD (i_Ri), tmp_shift); | |
1869 | * FLD (i_Ri) = opval; | |
1870 | written |= (1 << 2); | |
1871 | TRACE_RESULT (current_cpu, abuf, "Ri", 'x', opval); | |
1872 | } | |
7a292a7a | 1873 | } |
c906108c SS |
1874 | } else { |
1875 | { | |
1876 | BI opval = 0; | |
1877 | CPU (h_cbit) = opval; | |
1878 | written |= (1 << 3); | |
1879 | TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); | |
1880 | } | |
1881 | } | |
1882 | { | |
1883 | BI opval = LTSI (* FLD (i_Ri), 0); | |
1884 | CPU (h_nbit) = opval; | |
1885 | TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); | |
1886 | } | |
1887 | { | |
1888 | BI opval = EQSI (* FLD (i_Ri), 0); | |
1889 | CPU (h_zbit) = opval; | |
1890 | TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); | |
1891 | } | |
7a292a7a | 1892 | } |
c906108c SS |
1893 | |
1894 | abuf->written = written; | |
1895 | #undef FLD | |
1896 | } | |
1897 | NEXT (vpc); | |
1898 | ||
1899 | CASE (sem, INSN_LSLI) : /* lsl $u4,$Ri */ | |
1900 | { | |
1901 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1902 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1903 | #define FLD(f) abuf->fields.sfmt_addi.f |
c906108c SS |
1904 | int UNUSED written = 0; |
1905 | IADDR UNUSED pc = abuf->addr; | |
1906 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
1907 | ||
7a292a7a | 1908 | { |
c906108c SS |
1909 | SI tmp_shift; |
1910 | tmp_shift = FLD (f_u4); | |
1911 | if (NESI (tmp_shift, 0)) { | |
7a292a7a | 1912 | { |
c906108c SS |
1913 | { |
1914 | BI opval = NESI (ANDSI (* FLD (i_Ri), SLLSI (1, SUBSI (32, tmp_shift))), 0); | |
1915 | CPU (h_cbit) = opval; | |
1916 | written |= (1 << 3); | |
1917 | TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); | |
1918 | } | |
1919 | { | |
1920 | SI opval = SLLSI (* FLD (i_Ri), tmp_shift); | |
1921 | * FLD (i_Ri) = opval; | |
1922 | written |= (1 << 2); | |
1923 | TRACE_RESULT (current_cpu, abuf, "Ri", 'x', opval); | |
1924 | } | |
7a292a7a | 1925 | } |
c906108c SS |
1926 | } else { |
1927 | { | |
1928 | BI opval = 0; | |
1929 | CPU (h_cbit) = opval; | |
1930 | written |= (1 << 3); | |
1931 | TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); | |
1932 | } | |
1933 | } | |
1934 | { | |
1935 | BI opval = LTSI (* FLD (i_Ri), 0); | |
1936 | CPU (h_nbit) = opval; | |
1937 | TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); | |
1938 | } | |
1939 | { | |
1940 | BI opval = EQSI (* FLD (i_Ri), 0); | |
1941 | CPU (h_zbit) = opval; | |
1942 | TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); | |
1943 | } | |
7a292a7a | 1944 | } |
c906108c SS |
1945 | |
1946 | abuf->written = written; | |
1947 | #undef FLD | |
1948 | } | |
1949 | NEXT (vpc); | |
1950 | ||
1951 | CASE (sem, INSN_LSL2) : /* lsl2 $u4,$Ri */ | |
1952 | { | |
1953 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1954 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1955 | #define FLD(f) abuf->fields.sfmt_addi.f |
c906108c SS |
1956 | int UNUSED written = 0; |
1957 | IADDR UNUSED pc = abuf->addr; | |
1958 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
1959 | ||
7a292a7a | 1960 | { |
c906108c SS |
1961 | SI tmp_shift; |
1962 | tmp_shift = ADDSI (FLD (f_u4), 16); | |
1963 | if (NESI (tmp_shift, 0)) { | |
7a292a7a | 1964 | { |
c906108c SS |
1965 | { |
1966 | BI opval = NESI (ANDSI (* FLD (i_Ri), SLLSI (1, SUBSI (32, tmp_shift))), 0); | |
1967 | CPU (h_cbit) = opval; | |
1968 | written |= (1 << 3); | |
1969 | TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); | |
1970 | } | |
1971 | { | |
1972 | SI opval = SLLSI (* FLD (i_Ri), tmp_shift); | |
1973 | * FLD (i_Ri) = opval; | |
1974 | written |= (1 << 2); | |
1975 | TRACE_RESULT (current_cpu, abuf, "Ri", 'x', opval); | |
1976 | } | |
7a292a7a | 1977 | } |
c906108c SS |
1978 | } else { |
1979 | { | |
1980 | BI opval = 0; | |
1981 | CPU (h_cbit) = opval; | |
1982 | written |= (1 << 3); | |
1983 | TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); | |
1984 | } | |
1985 | } | |
1986 | { | |
1987 | BI opval = LTSI (* FLD (i_Ri), 0); | |
1988 | CPU (h_nbit) = opval; | |
1989 | TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); | |
1990 | } | |
1991 | { | |
1992 | BI opval = EQSI (* FLD (i_Ri), 0); | |
1993 | CPU (h_zbit) = opval; | |
1994 | TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); | |
1995 | } | |
7a292a7a | 1996 | } |
c906108c SS |
1997 | |
1998 | abuf->written = written; | |
1999 | #undef FLD | |
2000 | } | |
2001 | NEXT (vpc); | |
2002 | ||
2003 | CASE (sem, INSN_LSR) : /* lsr $Rj,$Ri */ | |
2004 | { | |
2005 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2006 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2007 | #define FLD(f) abuf->fields.sfmt_add.f |
c906108c SS |
2008 | int UNUSED written = 0; |
2009 | IADDR UNUSED pc = abuf->addr; | |
2010 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
2011 | ||
7a292a7a | 2012 | { |
c906108c SS |
2013 | SI tmp_shift; |
2014 | tmp_shift = ANDSI (* FLD (i_Rj), 31); | |
2015 | if (NESI (tmp_shift, 0)) { | |
7a292a7a | 2016 | { |
c906108c SS |
2017 | { |
2018 | BI opval = NESI (ANDSI (* FLD (i_Ri), SLLSI (1, SUBSI (tmp_shift, 1))), 0); | |
2019 | CPU (h_cbit) = opval; | |
2020 | written |= (1 << 3); | |
2021 | TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); | |
2022 | } | |
2023 | { | |
2024 | SI opval = SRLSI (* FLD (i_Ri), tmp_shift); | |
2025 | * FLD (i_Ri) = opval; | |
2026 | written |= (1 << 2); | |
2027 | TRACE_RESULT (current_cpu, abuf, "Ri", 'x', opval); | |
2028 | } | |
7a292a7a | 2029 | } |
c906108c SS |
2030 | } else { |
2031 | { | |
2032 | BI opval = 0; | |
2033 | CPU (h_cbit) = opval; | |
2034 | written |= (1 << 3); | |
2035 | TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); | |
2036 | } | |
2037 | } | |
2038 | { | |
2039 | BI opval = LTSI (* FLD (i_Ri), 0); | |
2040 | CPU (h_nbit) = opval; | |
2041 | TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); | |
2042 | } | |
2043 | { | |
2044 | BI opval = EQSI (* FLD (i_Ri), 0); | |
2045 | CPU (h_zbit) = opval; | |
2046 | TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); | |
2047 | } | |
7a292a7a | 2048 | } |
c906108c SS |
2049 | |
2050 | abuf->written = written; | |
2051 | #undef FLD | |
2052 | } | |
2053 | NEXT (vpc); | |
2054 | ||
2055 | CASE (sem, INSN_LSRI) : /* lsr $u4,$Ri */ | |
2056 | { | |
2057 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2058 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2059 | #define FLD(f) abuf->fields.sfmt_addi.f |
c906108c SS |
2060 | int UNUSED written = 0; |
2061 | IADDR UNUSED pc = abuf->addr; | |
2062 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
2063 | ||
7a292a7a | 2064 | { |
c906108c SS |
2065 | SI tmp_shift; |
2066 | tmp_shift = FLD (f_u4); | |
2067 | if (NESI (tmp_shift, 0)) { | |
7a292a7a | 2068 | { |
c906108c SS |
2069 | { |
2070 | BI opval = NESI (ANDSI (* FLD (i_Ri), SLLSI (1, SUBSI (tmp_shift, 1))), 0); | |
2071 | CPU (h_cbit) = opval; | |
2072 | written |= (1 << 3); | |
2073 | TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); | |
2074 | } | |
2075 | { | |
2076 | SI opval = SRLSI (* FLD (i_Ri), tmp_shift); | |
2077 | * FLD (i_Ri) = opval; | |
2078 | written |= (1 << 2); | |
2079 | TRACE_RESULT (current_cpu, abuf, "Ri", 'x', opval); | |
2080 | } | |
7a292a7a | 2081 | } |
c906108c SS |
2082 | } else { |
2083 | { | |
2084 | BI opval = 0; | |
2085 | CPU (h_cbit) = opval; | |
2086 | written |= (1 << 3); | |
2087 | TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); | |
2088 | } | |
2089 | } | |
2090 | { | |
2091 | BI opval = LTSI (* FLD (i_Ri), 0); | |
2092 | CPU (h_nbit) = opval; | |
2093 | TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); | |
2094 | } | |
2095 | { | |
2096 | BI opval = EQSI (* FLD (i_Ri), 0); | |
2097 | CPU (h_zbit) = opval; | |
2098 | TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); | |
2099 | } | |
7a292a7a | 2100 | } |
c906108c SS |
2101 | |
2102 | abuf->written = written; | |
2103 | #undef FLD | |
2104 | } | |
2105 | NEXT (vpc); | |
2106 | ||
2107 | CASE (sem, INSN_LSR2) : /* lsr2 $u4,$Ri */ | |
2108 | { | |
2109 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2110 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2111 | #define FLD(f) abuf->fields.sfmt_addi.f |
c906108c SS |
2112 | int UNUSED written = 0; |
2113 | IADDR UNUSED pc = abuf->addr; | |
2114 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
2115 | ||
7a292a7a | 2116 | { |
c906108c SS |
2117 | SI tmp_shift; |
2118 | tmp_shift = ADDSI (FLD (f_u4), 16); | |
2119 | if (NESI (tmp_shift, 0)) { | |
7a292a7a | 2120 | { |
c906108c SS |
2121 | { |
2122 | BI opval = NESI (ANDSI (* FLD (i_Ri), SLLSI (1, SUBSI (tmp_shift, 1))), 0); | |
2123 | CPU (h_cbit) = opval; | |
2124 | written |= (1 << 3); | |
2125 | TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); | |
2126 | } | |
2127 | { | |
2128 | SI opval = SRLSI (* FLD (i_Ri), tmp_shift); | |
2129 | * FLD (i_Ri) = opval; | |
2130 | written |= (1 << 2); | |
2131 | TRACE_RESULT (current_cpu, abuf, "Ri", 'x', opval); | |
2132 | } | |
7a292a7a | 2133 | } |
c906108c SS |
2134 | } else { |
2135 | { | |
2136 | BI opval = 0; | |
2137 | CPU (h_cbit) = opval; | |
2138 | written |= (1 << 3); | |
2139 | TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); | |
2140 | } | |
2141 | } | |
2142 | { | |
2143 | BI opval = LTSI (* FLD (i_Ri), 0); | |
2144 | CPU (h_nbit) = opval; | |
2145 | TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); | |
2146 | } | |
2147 | { | |
2148 | BI opval = EQSI (* FLD (i_Ri), 0); | |
2149 | CPU (h_zbit) = opval; | |
2150 | TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); | |
2151 | } | |
7a292a7a | 2152 | } |
c906108c SS |
2153 | |
2154 | abuf->written = written; | |
2155 | #undef FLD | |
2156 | } | |
2157 | NEXT (vpc); | |
2158 | ||
2159 | CASE (sem, INSN_ASR) : /* asr $Rj,$Ri */ | |
2160 | { | |
2161 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2162 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2163 | #define FLD(f) abuf->fields.sfmt_add.f |
c906108c SS |
2164 | int UNUSED written = 0; |
2165 | IADDR UNUSED pc = abuf->addr; | |
2166 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
2167 | ||
7a292a7a | 2168 | { |
c906108c SS |
2169 | SI tmp_shift; |
2170 | tmp_shift = ANDSI (* FLD (i_Rj), 31); | |
2171 | if (NESI (tmp_shift, 0)) { | |
7a292a7a | 2172 | { |
c906108c SS |
2173 | { |
2174 | BI opval = NESI (ANDSI (* FLD (i_Ri), SLLSI (1, SUBSI (tmp_shift, 1))), 0); | |
2175 | CPU (h_cbit) = opval; | |
2176 | written |= (1 << 3); | |
2177 | TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); | |
2178 | } | |
2179 | { | |
2180 | SI opval = SRASI (* FLD (i_Ri), tmp_shift); | |
2181 | * FLD (i_Ri) = opval; | |
2182 | written |= (1 << 2); | |
2183 | TRACE_RESULT (current_cpu, abuf, "Ri", 'x', opval); | |
2184 | } | |
7a292a7a | 2185 | } |
c906108c SS |
2186 | } else { |
2187 | { | |
2188 | BI opval = 0; | |
2189 | CPU (h_cbit) = opval; | |
2190 | written |= (1 << 3); | |
2191 | TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); | |
2192 | } | |
2193 | } | |
2194 | { | |
2195 | BI opval = LTSI (* FLD (i_Ri), 0); | |
2196 | CPU (h_nbit) = opval; | |
2197 | TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); | |
2198 | } | |
2199 | { | |
2200 | BI opval = EQSI (* FLD (i_Ri), 0); | |
2201 | CPU (h_zbit) = opval; | |
2202 | TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); | |
2203 | } | |
7a292a7a | 2204 | } |
c906108c SS |
2205 | |
2206 | abuf->written = written; | |
2207 | #undef FLD | |
2208 | } | |
2209 | NEXT (vpc); | |
2210 | ||
2211 | CASE (sem, INSN_ASRI) : /* asr $u4,$Ri */ | |
2212 | { | |
2213 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2214 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2215 | #define FLD(f) abuf->fields.sfmt_addi.f |
c906108c SS |
2216 | int UNUSED written = 0; |
2217 | IADDR UNUSED pc = abuf->addr; | |
2218 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
2219 | ||
7a292a7a | 2220 | { |
c906108c SS |
2221 | SI tmp_shift; |
2222 | tmp_shift = FLD (f_u4); | |
2223 | if (NESI (tmp_shift, 0)) { | |
7a292a7a | 2224 | { |
c906108c SS |
2225 | { |
2226 | BI opval = NESI (ANDSI (* FLD (i_Ri), SLLSI (1, SUBSI (tmp_shift, 1))), 0); | |
2227 | CPU (h_cbit) = opval; | |
2228 | written |= (1 << 3); | |
2229 | TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); | |
2230 | } | |
2231 | { | |
2232 | SI opval = SRASI (* FLD (i_Ri), tmp_shift); | |
2233 | * FLD (i_Ri) = opval; | |
2234 | written |= (1 << 2); | |
2235 | TRACE_RESULT (current_cpu, abuf, "Ri", 'x', opval); | |
2236 | } | |
7a292a7a | 2237 | } |
c906108c SS |
2238 | } else { |
2239 | { | |
2240 | BI opval = 0; | |
2241 | CPU (h_cbit) = opval; | |
2242 | written |= (1 << 3); | |
2243 | TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); | |
2244 | } | |
2245 | } | |
2246 | { | |
2247 | BI opval = LTSI (* FLD (i_Ri), 0); | |
2248 | CPU (h_nbit) = opval; | |
2249 | TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); | |
2250 | } | |
2251 | { | |
2252 | BI opval = EQSI (* FLD (i_Ri), 0); | |
2253 | CPU (h_zbit) = opval; | |
2254 | TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); | |
2255 | } | |
7a292a7a | 2256 | } |
c906108c SS |
2257 | |
2258 | abuf->written = written; | |
2259 | #undef FLD | |
2260 | } | |
2261 | NEXT (vpc); | |
2262 | ||
2263 | CASE (sem, INSN_ASR2) : /* asr2 $u4,$Ri */ | |
2264 | { | |
2265 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2266 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2267 | #define FLD(f) abuf->fields.sfmt_addi.f |
c906108c SS |
2268 | int UNUSED written = 0; |
2269 | IADDR UNUSED pc = abuf->addr; | |
2270 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
2271 | ||
7a292a7a | 2272 | { |
c906108c SS |
2273 | SI tmp_shift; |
2274 | tmp_shift = ADDSI (FLD (f_u4), 16); | |
2275 | if (NESI (tmp_shift, 0)) { | |
7a292a7a | 2276 | { |
c906108c SS |
2277 | { |
2278 | BI opval = NESI (ANDSI (* FLD (i_Ri), SLLSI (1, SUBSI (tmp_shift, 1))), 0); | |
2279 | CPU (h_cbit) = opval; | |
2280 | written |= (1 << 3); | |
2281 | TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); | |
2282 | } | |
2283 | { | |
2284 | SI opval = SRASI (* FLD (i_Ri), tmp_shift); | |
2285 | * FLD (i_Ri) = opval; | |
2286 | written |= (1 << 2); | |
2287 | TRACE_RESULT (current_cpu, abuf, "Ri", 'x', opval); | |
2288 | } | |
7a292a7a | 2289 | } |
c906108c SS |
2290 | } else { |
2291 | { | |
2292 | BI opval = 0; | |
2293 | CPU (h_cbit) = opval; | |
2294 | written |= (1 << 3); | |
2295 | TRACE_RESULT (current_cpu, abuf, "cbit", 'x', opval); | |
2296 | } | |
2297 | } | |
2298 | { | |
2299 | BI opval = LTSI (* FLD (i_Ri), 0); | |
2300 | CPU (h_nbit) = opval; | |
2301 | TRACE_RESULT (current_cpu, abuf, "nbit", 'x', opval); | |
2302 | } | |
2303 | { | |
2304 | BI opval = EQSI (* FLD (i_Ri), 0); | |
2305 | CPU (h_zbit) = opval; | |
2306 | TRACE_RESULT (current_cpu, abuf, "zbit", 'x', opval); | |
2307 | } | |
7a292a7a | 2308 | } |
c906108c SS |
2309 | |
2310 | abuf->written = written; | |
2311 | #undef FLD | |
2312 | } | |
2313 | NEXT (vpc); | |
2314 | ||
2315 | CASE (sem, INSN_LDI8) : /* ldi:8 $i8,$Ri */ | |
2316 | { | |
2317 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2318 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2319 | #define FLD(f) abuf->fields.sfmt_ldi8.f |
c906108c SS |
2320 | int UNUSED written = 0; |
2321 | IADDR UNUSED pc = abuf->addr; | |
2322 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
2323 | ||
2324 | { | |
2325 | SI opval = FLD (f_i8); | |
2326 | * FLD (i_Ri) = opval; | |
2327 | TRACE_RESULT (current_cpu, abuf, "Ri", 'x', opval); | |
2328 | } | |
2329 | ||
2330 | #undef FLD | |
2331 | } | |
2332 | NEXT (vpc); | |
2333 | ||
2334 | CASE (sem, INSN_LDI20) : /* ldi:20 $i20,$Ri */ | |
2335 | { | |
2336 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2337 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2338 | #define FLD(f) abuf->fields.sfmt_ldi20.f |
c906108c SS |
2339 | int UNUSED written = 0; |
2340 | IADDR UNUSED pc = abuf->addr; | |
2341 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2342 | ||
2343 | { | |
2344 | SI opval = FLD (f_i20); | |
2345 | * FLD (i_Ri) = opval; | |
2346 | TRACE_RESULT (current_cpu, abuf, "Ri", 'x', opval); | |
2347 | } | |
2348 | ||
2349 | #undef FLD | |
2350 | } | |
2351 | NEXT (vpc); | |
2352 | ||
2353 | CASE (sem, INSN_LDI32) : /* ldi:32 $i32,$Ri */ | |
2354 | { | |
2355 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2356 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2357 | #define FLD(f) abuf->fields.sfmt_ldi32.f |
c906108c SS |
2358 | int UNUSED written = 0; |
2359 | IADDR UNUSED pc = abuf->addr; | |
2360 | vpc = SEM_NEXT_VPC (sem_arg, pc, 6); | |
2361 | ||
2362 | { | |
2363 | SI opval = FLD (f_i32); | |
2364 | * FLD (i_Ri) = opval; | |
2365 | TRACE_RESULT (current_cpu, abuf, "Ri", 'x', opval); | |
2366 | } | |
2367 | ||
2368 | #undef FLD | |
2369 | } | |
2370 | NEXT (vpc); | |
2371 | ||
2372 | CASE (sem, INSN_LD) : /* ld @$Rj,$Ri */ | |
2373 | { | |
2374 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2375 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2376 | #define FLD(f) abuf->fields.sfmt_ldr13.f |
c906108c SS |
2377 | int UNUSED written = 0; |
2378 | IADDR UNUSED pc = abuf->addr; | |
2379 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
2380 | ||
2381 | { | |
2382 | SI opval = GETMEMSI (current_cpu, pc, * FLD (i_Rj)); | |
2383 | * FLD (i_Ri) = opval; | |
2384 | TRACE_RESULT (current_cpu, abuf, "Ri", 'x', opval); | |
2385 | } | |
2386 | ||
2387 | #undef FLD | |
2388 | } | |
2389 | NEXT (vpc); | |
2390 | ||
2391 | CASE (sem, INSN_LDUH) : /* lduh @$Rj,$Ri */ | |
2392 | { | |
2393 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2394 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2395 | #define FLD(f) abuf->fields.sfmt_ldr13.f |
c906108c SS |
2396 | int UNUSED written = 0; |
2397 | IADDR UNUSED pc = abuf->addr; | |
2398 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
2399 | ||
2400 | { | |
2401 | SI opval = GETMEMUHI (current_cpu, pc, * FLD (i_Rj)); | |
2402 | * FLD (i_Ri) = opval; | |
2403 | TRACE_RESULT (current_cpu, abuf, "Ri", 'x', opval); | |
2404 | } | |
2405 | ||
2406 | #undef FLD | |
2407 | } | |
2408 | NEXT (vpc); | |
2409 | ||
2410 | CASE (sem, INSN_LDUB) : /* ldub @$Rj,$Ri */ | |
2411 | { | |
2412 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2413 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2414 | #define FLD(f) abuf->fields.sfmt_ldr13.f |
c906108c SS |
2415 | int UNUSED written = 0; |
2416 | IADDR UNUSED pc = abuf->addr; | |
2417 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
2418 | ||
2419 | { | |
2420 | SI opval = GETMEMUQI (current_cpu, pc, * FLD (i_Rj)); | |
2421 | * FLD (i_Ri) = opval; | |
2422 | TRACE_RESULT (current_cpu, abuf, "Ri", 'x', opval); | |
2423 | } | |
2424 | ||
2425 | #undef FLD | |
2426 | } | |
2427 | NEXT (vpc); | |
2428 | ||
2429 | CASE (sem, INSN_LDR13) : /* ld @($R13,$Rj),$Ri */ | |
2430 | { | |
2431 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2432 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2433 | #define FLD(f) abuf->fields.sfmt_ldr13.f |
c906108c SS |
2434 | int UNUSED written = 0; |
2435 | IADDR UNUSED pc = abuf->addr; | |
2436 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
2437 | ||
2438 | { | |
2439 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (* FLD (i_Rj), CPU (h_gr[((UINT) 13)]))); | |
2440 | * FLD (i_Ri) = opval; | |
2441 | TRACE_RESULT (current_cpu, abuf, "Ri", 'x', opval); | |
2442 | } | |
2443 | ||
2444 | #undef FLD | |
2445 | } | |
2446 | NEXT (vpc); | |
2447 | ||
2448 | CASE (sem, INSN_LDR13UH) : /* lduh @($R13,$Rj),$Ri */ | |
2449 | { | |
2450 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2451 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2452 | #define FLD(f) abuf->fields.sfmt_ldr13.f |
c906108c SS |
2453 | int UNUSED written = 0; |
2454 | IADDR UNUSED pc = abuf->addr; | |
2455 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
2456 | ||
2457 | { | |
2458 | SI opval = GETMEMUHI (current_cpu, pc, ADDSI (* FLD (i_Rj), CPU (h_gr[((UINT) 13)]))); | |
2459 | * FLD (i_Ri) = opval; | |
2460 | TRACE_RESULT (current_cpu, abuf, "Ri", 'x', opval); | |
2461 | } | |
2462 | ||
2463 | #undef FLD | |
2464 | } | |
2465 | NEXT (vpc); | |
2466 | ||
2467 | CASE (sem, INSN_LDR13UB) : /* ldub @($R13,$Rj),$Ri */ | |
2468 | { | |
2469 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2470 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2471 | #define FLD(f) abuf->fields.sfmt_ldr13.f |
c906108c SS |
2472 | int UNUSED written = 0; |
2473 | IADDR UNUSED pc = abuf->addr; | |
2474 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
2475 | ||
2476 | { | |
2477 | SI opval = GETMEMUQI (current_cpu, pc, ADDSI (* FLD (i_Rj), CPU (h_gr[((UINT) 13)]))); | |
2478 | * FLD (i_Ri) = opval; | |
2479 | TRACE_RESULT (current_cpu, abuf, "Ri", 'x', opval); | |
2480 | } | |
2481 | ||
2482 | #undef FLD | |
2483 | } | |
2484 | NEXT (vpc); | |
2485 | ||
2486 | CASE (sem, INSN_LDR14) : /* ld @($R14,$disp10),$Ri */ | |
2487 | { | |
2488 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2489 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2490 | #define FLD(f) abuf->fields.sfmt_ldr14.f |
c906108c SS |
2491 | int UNUSED written = 0; |
2492 | IADDR UNUSED pc = abuf->addr; | |
2493 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
2494 | ||
2495 | { | |
2496 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (FLD (f_disp10), CPU (h_gr[((UINT) 14)]))); | |
2497 | * FLD (i_Ri) = opval; | |
2498 | TRACE_RESULT (current_cpu, abuf, "Ri", 'x', opval); | |
2499 | } | |
2500 | ||
2501 | #undef FLD | |
2502 | } | |
2503 | NEXT (vpc); | |
2504 | ||
2505 | CASE (sem, INSN_LDR14UH) : /* lduh @($R14,$disp9),$Ri */ | |
2506 | { | |
2507 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2508 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2509 | #define FLD(f) abuf->fields.sfmt_ldr14uh.f |
c906108c SS |
2510 | int UNUSED written = 0; |
2511 | IADDR UNUSED pc = abuf->addr; | |
2512 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
2513 | ||
2514 | { | |
2515 | SI opval = GETMEMUHI (current_cpu, pc, ADDSI (FLD (f_disp9), CPU (h_gr[((UINT) 14)]))); | |
2516 | * FLD (i_Ri) = opval; | |
2517 | TRACE_RESULT (current_cpu, abuf, "Ri", 'x', opval); | |
2518 | } | |
2519 | ||
2520 | #undef FLD | |
2521 | } | |
2522 | NEXT (vpc); | |
2523 | ||
2524 | CASE (sem, INSN_LDR14UB) : /* ldub @($R14,$disp8),$Ri */ | |
2525 | { | |
2526 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2527 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2528 | #define FLD(f) abuf->fields.sfmt_ldr14ub.f |
c906108c SS |
2529 | int UNUSED written = 0; |
2530 | IADDR UNUSED pc = abuf->addr; | |
2531 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
2532 | ||
2533 | { | |
2534 | SI opval = GETMEMUQI (current_cpu, pc, ADDSI (FLD (f_disp8), CPU (h_gr[((UINT) 14)]))); | |
2535 | * FLD (i_Ri) = opval; | |
2536 | TRACE_RESULT (current_cpu, abuf, "Ri", 'x', opval); | |
2537 | } | |
2538 | ||
2539 | #undef FLD | |
2540 | } | |
2541 | NEXT (vpc); | |
2542 | ||
2543 | CASE (sem, INSN_LDR15) : /* ld @($R15,$udisp6),$Ri */ | |
2544 | { | |
2545 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2546 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2547 | #define FLD(f) abuf->fields.sfmt_ldr15.f |
c906108c SS |
2548 | int UNUSED written = 0; |
2549 | IADDR UNUSED pc = abuf->addr; | |
2550 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
2551 | ||
2552 | { | |
2553 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (FLD (f_udisp6), CPU (h_gr[((UINT) 15)]))); | |
2554 | * FLD (i_Ri) = opval; | |
2555 | TRACE_RESULT (current_cpu, abuf, "Ri", 'x', opval); | |
2556 | } | |
2557 | ||
2558 | #undef FLD | |
2559 | } | |
2560 | NEXT (vpc); | |
2561 | ||
2562 | CASE (sem, INSN_LDR15GR) : /* ld @$R15+,$Ri */ | |
2563 | { | |
2564 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2565 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2566 | #define FLD(f) abuf->fields.sfmt_ldr15gr.f |
c906108c SS |
2567 | int UNUSED written = 0; |
2568 | IADDR UNUSED pc = abuf->addr; | |
2569 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
2570 | ||
7a292a7a | 2571 | { |
c906108c SS |
2572 | { |
2573 | SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); | |
2574 | * FLD (i_Ri) = opval; | |
2575 | TRACE_RESULT (current_cpu, abuf, "Ri", 'x', opval); | |
2576 | } | |
2577 | if (NESI (FLD (f_Ri), 15)) { | |
2578 | { | |
2579 | SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); | |
2580 | CPU (h_gr[((UINT) 15)]) = opval; | |
2581 | written |= (1 << 4); | |
2582 | TRACE_RESULT (current_cpu, abuf, "gr-15", 'x', opval); | |
2583 | } | |
2584 | } | |
7a292a7a | 2585 | } |
c906108c SS |
2586 | |
2587 | abuf->written = written; | |
2588 | #undef FLD | |
2589 | } | |
2590 | NEXT (vpc); | |
2591 | ||
2592 | CASE (sem, INSN_LDR15DR) : /* ld @$R15+,$Rs2 */ | |
2593 | { | |
2594 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2595 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2596 | #define FLD(f) abuf->fields.sfmt_ldr15dr.f |
c906108c SS |
2597 | int UNUSED written = 0; |
2598 | IADDR UNUSED pc = abuf->addr; | |
2599 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
2600 | ||
7a292a7a | 2601 | { |
c906108c SS |
2602 | SI tmp_tmp; |
2603 | tmp_tmp = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); | |
2604 | { | |
2605 | SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); | |
2606 | CPU (h_gr[((UINT) 15)]) = opval; | |
2607 | TRACE_RESULT (current_cpu, abuf, "gr-15", 'x', opval); | |
2608 | } | |
2609 | { | |
2610 | SI opval = tmp_tmp; | |
2611 | SET_H_DR (FLD (f_Rs2), opval); | |
2612 | TRACE_RESULT (current_cpu, abuf, "Rs2", 'x', opval); | |
2613 | } | |
7a292a7a | 2614 | } |
c906108c SS |
2615 | |
2616 | #undef FLD | |
2617 | } | |
2618 | NEXT (vpc); | |
2619 | ||
2620 | CASE (sem, INSN_LDR15PS) : /* ld @$R15+,$ps */ | |
2621 | { | |
2622 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2623 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2624 | #define FLD(f) abuf->fields.sfmt_addsp.f |
c906108c SS |
2625 | int UNUSED written = 0; |
2626 | IADDR UNUSED pc = abuf->addr; | |
2627 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
2628 | ||
7a292a7a | 2629 | { |
c906108c SS |
2630 | { |
2631 | USI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); | |
2632 | SET_H_PS (opval); | |
2633 | TRACE_RESULT (current_cpu, abuf, "ps", 'x', opval); | |
2634 | } | |
2635 | { | |
2636 | SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); | |
2637 | CPU (h_gr[((UINT) 15)]) = opval; | |
2638 | TRACE_RESULT (current_cpu, abuf, "gr-15", 'x', opval); | |
2639 | } | |
7a292a7a | 2640 | } |
c906108c SS |
2641 | |
2642 | #undef FLD | |
2643 | } | |
2644 | NEXT (vpc); | |
2645 | ||
2646 | CASE (sem, INSN_ST) : /* st $Ri,@$Rj */ | |
2647 | { | |
2648 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2649 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2650 | #define FLD(f) abuf->fields.sfmt_str13.f |
c906108c SS |
2651 | int UNUSED written = 0; |
2652 | IADDR UNUSED pc = abuf->addr; | |
2653 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
2654 | ||
2655 | { | |
2656 | SI opval = * FLD (i_Ri); | |
2657 | SETMEMSI (current_cpu, pc, * FLD (i_Rj), opval); | |
2658 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
2659 | } | |
2660 | ||
2661 | #undef FLD | |
2662 | } | |
2663 | NEXT (vpc); | |
2664 | ||
2665 | CASE (sem, INSN_STH) : /* sth $Ri,@$Rj */ | |
2666 | { | |
2667 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2668 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2669 | #define FLD(f) abuf->fields.sfmt_str13.f |
c906108c SS |
2670 | int UNUSED written = 0; |
2671 | IADDR UNUSED pc = abuf->addr; | |
2672 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
2673 | ||
2674 | { | |
2675 | HI opval = * FLD (i_Ri); | |
2676 | SETMEMHI (current_cpu, pc, * FLD (i_Rj), opval); | |
2677 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
2678 | } | |
2679 | ||
2680 | #undef FLD | |
2681 | } | |
2682 | NEXT (vpc); | |
2683 | ||
2684 | CASE (sem, INSN_STB) : /* stb $Ri,@$Rj */ | |
2685 | { | |
2686 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2687 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2688 | #define FLD(f) abuf->fields.sfmt_str13.f |
c906108c SS |
2689 | int UNUSED written = 0; |
2690 | IADDR UNUSED pc = abuf->addr; | |
2691 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
2692 | ||
2693 | { | |
2694 | QI opval = * FLD (i_Ri); | |
2695 | SETMEMQI (current_cpu, pc, * FLD (i_Rj), opval); | |
2696 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
2697 | } | |
2698 | ||
2699 | #undef FLD | |
2700 | } | |
2701 | NEXT (vpc); | |
2702 | ||
2703 | CASE (sem, INSN_STR13) : /* st $Ri,@($R13,$Rj) */ | |
2704 | { | |
2705 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2706 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2707 | #define FLD(f) abuf->fields.sfmt_str13.f |
c906108c SS |
2708 | int UNUSED written = 0; |
2709 | IADDR UNUSED pc = abuf->addr; | |
2710 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
2711 | ||
2712 | { | |
2713 | SI opval = * FLD (i_Ri); | |
2714 | SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_Rj), CPU (h_gr[((UINT) 13)])), opval); | |
2715 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
2716 | } | |
2717 | ||
2718 | #undef FLD | |
2719 | } | |
2720 | NEXT (vpc); | |
2721 | ||
2722 | CASE (sem, INSN_STR13H) : /* sth $Ri,@($R13,$Rj) */ | |
2723 | { | |
2724 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2725 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2726 | #define FLD(f) abuf->fields.sfmt_str13.f |
c906108c SS |
2727 | int UNUSED written = 0; |
2728 | IADDR UNUSED pc = abuf->addr; | |
2729 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
2730 | ||
2731 | { | |
2732 | HI opval = * FLD (i_Ri); | |
2733 | SETMEMHI (current_cpu, pc, ADDSI (* FLD (i_Rj), CPU (h_gr[((UINT) 13)])), opval); | |
2734 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
2735 | } | |
2736 | ||
2737 | #undef FLD | |
2738 | } | |
2739 | NEXT (vpc); | |
2740 | ||
2741 | CASE (sem, INSN_STR13B) : /* stb $Ri,@($R13,$Rj) */ | |
2742 | { | |
2743 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2744 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2745 | #define FLD(f) abuf->fields.sfmt_str13.f |
c906108c SS |
2746 | int UNUSED written = 0; |
2747 | IADDR UNUSED pc = abuf->addr; | |
2748 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
2749 | ||
2750 | { | |
2751 | QI opval = * FLD (i_Ri); | |
2752 | SETMEMQI (current_cpu, pc, ADDSI (* FLD (i_Rj), CPU (h_gr[((UINT) 13)])), opval); | |
2753 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
2754 | } | |
2755 | ||
2756 | #undef FLD | |
2757 | } | |
2758 | NEXT (vpc); | |
2759 | ||
2760 | CASE (sem, INSN_STR14) : /* st $Ri,@($R14,$disp10) */ | |
2761 | { | |
2762 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2763 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2764 | #define FLD(f) abuf->fields.sfmt_str14.f |
c906108c SS |
2765 | int UNUSED written = 0; |
2766 | IADDR UNUSED pc = abuf->addr; | |
2767 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
2768 | ||
2769 | { | |
2770 | SI opval = * FLD (i_Ri); | |
2771 | SETMEMSI (current_cpu, pc, ADDSI (FLD (f_disp10), CPU (h_gr[((UINT) 14)])), opval); | |
2772 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
2773 | } | |
2774 | ||
2775 | #undef FLD | |
2776 | } | |
2777 | NEXT (vpc); | |
2778 | ||
2779 | CASE (sem, INSN_STR14H) : /* sth $Ri,@($R14,$disp9) */ | |
2780 | { | |
2781 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2782 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2783 | #define FLD(f) abuf->fields.sfmt_str14h.f |
c906108c SS |
2784 | int UNUSED written = 0; |
2785 | IADDR UNUSED pc = abuf->addr; | |
2786 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
2787 | ||
2788 | { | |
2789 | HI opval = * FLD (i_Ri); | |
2790 | SETMEMHI (current_cpu, pc, ADDSI (FLD (f_disp9), CPU (h_gr[((UINT) 14)])), opval); | |
2791 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
2792 | } | |
2793 | ||
2794 | #undef FLD | |
2795 | } | |
2796 | NEXT (vpc); | |
2797 | ||
2798 | CASE (sem, INSN_STR14B) : /* stb $Ri,@($R14,$disp8) */ | |
2799 | { | |
2800 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2801 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2802 | #define FLD(f) abuf->fields.sfmt_str14b.f |
c906108c SS |
2803 | int UNUSED written = 0; |
2804 | IADDR UNUSED pc = abuf->addr; | |
2805 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
2806 | ||
2807 | { | |
2808 | QI opval = * FLD (i_Ri); | |
2809 | SETMEMQI (current_cpu, pc, ADDSI (FLD (f_disp8), CPU (h_gr[((UINT) 14)])), opval); | |
2810 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
2811 | } | |
2812 | ||
2813 | #undef FLD | |
2814 | } | |
2815 | NEXT (vpc); | |
2816 | ||
2817 | CASE (sem, INSN_STR15) : /* st $Ri,@($R15,$udisp6) */ | |
2818 | { | |
2819 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2820 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2821 | #define FLD(f) abuf->fields.sfmt_str15.f |
c906108c SS |
2822 | int UNUSED written = 0; |
2823 | IADDR UNUSED pc = abuf->addr; | |
2824 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
2825 | ||
2826 | { | |
2827 | SI opval = * FLD (i_Ri); | |
2828 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 15)]), FLD (f_udisp6)), opval); | |
2829 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
2830 | } | |
2831 | ||
2832 | #undef FLD | |
2833 | } | |
2834 | NEXT (vpc); | |
2835 | ||
2836 | CASE (sem, INSN_STR15GR) : /* st $Ri,@-$R15 */ | |
2837 | { | |
2838 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2839 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2840 | #define FLD(f) abuf->fields.sfmt_str15gr.f |
c906108c SS |
2841 | int UNUSED written = 0; |
2842 | IADDR UNUSED pc = abuf->addr; | |
2843 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
2844 | ||
7a292a7a | 2845 | { |
c906108c SS |
2846 | SI tmp_tmp; |
2847 | tmp_tmp = * FLD (i_Ri); | |
2848 | { | |
2849 | SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); | |
2850 | CPU (h_gr[((UINT) 15)]) = opval; | |
2851 | TRACE_RESULT (current_cpu, abuf, "gr-15", 'x', opval); | |
2852 | } | |
2853 | { | |
2854 | SI opval = tmp_tmp; | |
2855 | SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); | |
2856 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
2857 | } | |
7a292a7a | 2858 | } |
c906108c SS |
2859 | |
2860 | #undef FLD | |
2861 | } | |
2862 | NEXT (vpc); | |
2863 | ||
2864 | CASE (sem, INSN_STR15DR) : /* st $Rs2,@-$R15 */ | |
2865 | { | |
2866 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2867 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2868 | #define FLD(f) abuf->fields.sfmt_ldr15dr.f |
c906108c SS |
2869 | int UNUSED written = 0; |
2870 | IADDR UNUSED pc = abuf->addr; | |
2871 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
2872 | ||
7a292a7a | 2873 | { |
c906108c SS |
2874 | SI tmp_tmp; |
2875 | tmp_tmp = GET_H_DR (FLD (f_Rs2)); | |
2876 | { | |
2877 | SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); | |
2878 | CPU (h_gr[((UINT) 15)]) = opval; | |
2879 | TRACE_RESULT (current_cpu, abuf, "gr-15", 'x', opval); | |
2880 | } | |
2881 | { | |
2882 | SI opval = tmp_tmp; | |
2883 | SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); | |
2884 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
2885 | } | |
7a292a7a | 2886 | } |
c906108c SS |
2887 | |
2888 | #undef FLD | |
2889 | } | |
2890 | NEXT (vpc); | |
2891 | ||
2892 | CASE (sem, INSN_STR15PS) : /* st $ps,@-$R15 */ | |
2893 | { | |
2894 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2895 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2896 | #define FLD(f) abuf->fields.sfmt_addsp.f |
c906108c SS |
2897 | int UNUSED written = 0; |
2898 | IADDR UNUSED pc = abuf->addr; | |
2899 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
2900 | ||
7a292a7a | 2901 | { |
c906108c SS |
2902 | { |
2903 | SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); | |
2904 | CPU (h_gr[((UINT) 15)]) = opval; | |
2905 | TRACE_RESULT (current_cpu, abuf, "gr-15", 'x', opval); | |
2906 | } | |
2907 | { | |
2908 | SI opval = GET_H_PS (); | |
2909 | SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); | |
2910 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
2911 | } | |
7a292a7a | 2912 | } |
c906108c SS |
2913 | |
2914 | #undef FLD | |
2915 | } | |
2916 | NEXT (vpc); | |
2917 | ||
2918 | CASE (sem, INSN_MOV) : /* mov $Rj,$Ri */ | |
2919 | { | |
2920 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2921 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2922 | #define FLD(f) abuf->fields.sfmt_ldr13.f |
c906108c SS |
2923 | int UNUSED written = 0; |
2924 | IADDR UNUSED pc = abuf->addr; | |
2925 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
2926 | ||
2927 | { | |
2928 | SI opval = * FLD (i_Rj); | |
2929 | * FLD (i_Ri) = opval; | |
2930 | TRACE_RESULT (current_cpu, abuf, "Ri", 'x', opval); | |
2931 | } | |
2932 | ||
2933 | #undef FLD | |
2934 | } | |
2935 | NEXT (vpc); | |
2936 | ||
2937 | CASE (sem, INSN_MOVDR) : /* mov $Rs1,$Ri */ | |
2938 | { | |
2939 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2940 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2941 | #define FLD(f) abuf->fields.sfmt_movdr.f |
c906108c SS |
2942 | int UNUSED written = 0; |
2943 | IADDR UNUSED pc = abuf->addr; | |
2944 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
2945 | ||
2946 | { | |
2947 | SI opval = GET_H_DR (FLD (f_Rs1)); | |
2948 | * FLD (i_Ri) = opval; | |
2949 | TRACE_RESULT (current_cpu, abuf, "Ri", 'x', opval); | |
2950 | } | |
2951 | ||
2952 | #undef FLD | |
2953 | } | |
2954 | NEXT (vpc); | |
2955 | ||
2956 | CASE (sem, INSN_MOVPS) : /* mov $ps,$Ri */ | |
2957 | { | |
2958 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2959 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2960 | #define FLD(f) abuf->fields.sfmt_movdr.f |
c906108c SS |
2961 | int UNUSED written = 0; |
2962 | IADDR UNUSED pc = abuf->addr; | |
2963 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
2964 | ||
2965 | { | |
2966 | SI opval = GET_H_PS (); | |
2967 | * FLD (i_Ri) = opval; | |
2968 | TRACE_RESULT (current_cpu, abuf, "Ri", 'x', opval); | |
2969 | } | |
2970 | ||
2971 | #undef FLD | |
2972 | } | |
2973 | NEXT (vpc); | |
2974 | ||
2975 | CASE (sem, INSN_MOV2DR) : /* mov $Ri,$Rs1 */ | |
2976 | { | |
2977 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2978 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2979 | #define FLD(f) abuf->fields.sfmt_mov2dr.f |
c906108c SS |
2980 | int UNUSED written = 0; |
2981 | IADDR UNUSED pc = abuf->addr; | |
2982 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
2983 | ||
2984 | { | |
2985 | SI opval = * FLD (i_Ri); | |
2986 | SET_H_DR (FLD (f_Rs1), opval); | |
2987 | TRACE_RESULT (current_cpu, abuf, "Rs1", 'x', opval); | |
2988 | } | |
2989 | ||
2990 | #undef FLD | |
2991 | } | |
2992 | NEXT (vpc); | |
2993 | ||
2994 | CASE (sem, INSN_MOV2PS) : /* mov $Ri,$ps */ | |
2995 | { | |
2996 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2997 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2998 | #define FLD(f) abuf->fields.sfmt_mov2dr.f |
c906108c SS |
2999 | int UNUSED written = 0; |
3000 | IADDR UNUSED pc = abuf->addr; | |
3001 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3002 | ||
3003 | { | |
3004 | USI opval = * FLD (i_Ri); | |
3005 | SET_H_PS (opval); | |
3006 | TRACE_RESULT (current_cpu, abuf, "ps", 'x', opval); | |
3007 | } | |
3008 | ||
3009 | #undef FLD | |
3010 | } | |
3011 | NEXT (vpc); | |
3012 | ||
3013 | CASE (sem, INSN_JMP) : /* jmp @$Ri */ | |
3014 | { | |
3015 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3016 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3017 | #define FLD(f) abuf->fields.sfmt_mov2dr.f |
c906108c SS |
3018 | int UNUSED written = 0; |
3019 | IADDR UNUSED pc = abuf->addr; | |
3020 | SEM_BRANCH_INIT | |
3021 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3022 | ||
3023 | { | |
3024 | USI opval = * FLD (i_Ri); | |
3025 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
3026 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
3027 | } | |
3028 | ||
3029 | SEM_BRANCH_FINI (vpc); | |
3030 | #undef FLD | |
3031 | } | |
3032 | NEXT (vpc); | |
3033 | ||
3034 | CASE (sem, INSN_JMPD) : /* jmp:d @$Ri */ | |
3035 | { | |
3036 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3037 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3038 | #define FLD(f) abuf->fields.sfmt_mov2dr.f |
c906108c SS |
3039 | int UNUSED written = 0; |
3040 | IADDR UNUSED pc = abuf->addr; | |
3041 | SEM_BRANCH_INIT | |
3042 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3043 | ||
7a292a7a | 3044 | { |
c906108c SS |
3045 | { |
3046 | USI opval = * FLD (i_Ri); | |
3047 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
3048 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
3049 | } | |
7a292a7a | 3050 | } |
c906108c SS |
3051 | |
3052 | SEM_BRANCH_FINI (vpc); | |
3053 | #undef FLD | |
3054 | } | |
3055 | NEXT (vpc); | |
3056 | ||
3057 | CASE (sem, INSN_CALLR) : /* call @$Ri */ | |
3058 | { | |
3059 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3060 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3061 | #define FLD(f) abuf->fields.sfmt_mov2dr.f |
c906108c SS |
3062 | int UNUSED written = 0; |
3063 | IADDR UNUSED pc = abuf->addr; | |
3064 | SEM_BRANCH_INIT | |
3065 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3066 | ||
7a292a7a | 3067 | { |
c906108c SS |
3068 | { |
3069 | SI opval = ADDSI (pc, 2); | |
3070 | SET_H_DR (((UINT) 1), opval); | |
3071 | TRACE_RESULT (current_cpu, abuf, "dr-1", 'x', opval); | |
3072 | } | |
3073 | { | |
3074 | USI opval = * FLD (i_Ri); | |
3075 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
3076 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
3077 | } | |
7a292a7a | 3078 | } |
c906108c SS |
3079 | |
3080 | SEM_BRANCH_FINI (vpc); | |
3081 | #undef FLD | |
3082 | } | |
3083 | NEXT (vpc); | |
3084 | ||
3085 | CASE (sem, INSN_CALLRD) : /* call:d @$Ri */ | |
3086 | { | |
3087 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3088 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3089 | #define FLD(f) abuf->fields.sfmt_mov2dr.f |
c906108c SS |
3090 | int UNUSED written = 0; |
3091 | IADDR UNUSED pc = abuf->addr; | |
3092 | SEM_BRANCH_INIT | |
3093 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3094 | ||
7a292a7a SS |
3095 | { |
3096 | { | |
c906108c SS |
3097 | { |
3098 | SI opval = ADDSI (pc, 4); | |
3099 | SET_H_DR (((UINT) 1), opval); | |
3100 | TRACE_RESULT (current_cpu, abuf, "dr-1", 'x', opval); | |
3101 | } | |
3102 | { | |
3103 | USI opval = * FLD (i_Ri); | |
3104 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
3105 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
3106 | } | |
7a292a7a SS |
3107 | } |
3108 | } | |
c906108c SS |
3109 | |
3110 | SEM_BRANCH_FINI (vpc); | |
3111 | #undef FLD | |
3112 | } | |
3113 | NEXT (vpc); | |
3114 | ||
3115 | CASE (sem, INSN_CALL) : /* call $label12 */ | |
3116 | { | |
3117 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3118 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3119 | #define FLD(f) abuf->fields.sfmt_call.f |
c906108c SS |
3120 | int UNUSED written = 0; |
3121 | IADDR UNUSED pc = abuf->addr; | |
3122 | SEM_BRANCH_INIT | |
3123 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3124 | ||
7a292a7a | 3125 | { |
c906108c SS |
3126 | { |
3127 | SI opval = ADDSI (pc, 2); | |
3128 | SET_H_DR (((UINT) 1), opval); | |
3129 | TRACE_RESULT (current_cpu, abuf, "dr-1", 'x', opval); | |
3130 | } | |
3131 | { | |
3132 | USI opval = FLD (i_label12); | |
96baa820 | 3133 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
3134 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); |
3135 | } | |
7a292a7a | 3136 | } |
c906108c SS |
3137 | |
3138 | SEM_BRANCH_FINI (vpc); | |
3139 | #undef FLD | |
3140 | } | |
3141 | NEXT (vpc); | |
3142 | ||
3143 | CASE (sem, INSN_CALLD) : /* call:d $label12 */ | |
3144 | { | |
3145 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3146 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3147 | #define FLD(f) abuf->fields.sfmt_call.f |
c906108c SS |
3148 | int UNUSED written = 0; |
3149 | IADDR UNUSED pc = abuf->addr; | |
3150 | SEM_BRANCH_INIT | |
3151 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3152 | ||
7a292a7a SS |
3153 | { |
3154 | { | |
c906108c SS |
3155 | { |
3156 | SI opval = ADDSI (pc, 4); | |
3157 | SET_H_DR (((UINT) 1), opval); | |
3158 | TRACE_RESULT (current_cpu, abuf, "dr-1", 'x', opval); | |
3159 | } | |
3160 | { | |
3161 | USI opval = FLD (i_label12); | |
96baa820 | 3162 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
3163 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); |
3164 | } | |
7a292a7a SS |
3165 | } |
3166 | } | |
c906108c SS |
3167 | |
3168 | SEM_BRANCH_FINI (vpc); | |
3169 | #undef FLD | |
3170 | } | |
3171 | NEXT (vpc); | |
3172 | ||
3173 | CASE (sem, INSN_RET) : /* ret */ | |
3174 | { | |
3175 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3176 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3177 | #define FLD(f) abuf->fields.fmt_empty.f |
c906108c SS |
3178 | int UNUSED written = 0; |
3179 | IADDR UNUSED pc = abuf->addr; | |
3180 | SEM_BRANCH_INIT | |
3181 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3182 | ||
3183 | { | |
3184 | USI opval = GET_H_DR (((UINT) 1)); | |
3185 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
3186 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
3187 | } | |
3188 | ||
3189 | SEM_BRANCH_FINI (vpc); | |
3190 | #undef FLD | |
3191 | } | |
3192 | NEXT (vpc); | |
3193 | ||
3194 | CASE (sem, INSN_RET_D) : /* ret:d */ | |
3195 | { | |
3196 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3197 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3198 | #define FLD(f) abuf->fields.fmt_empty.f |
c906108c SS |
3199 | int UNUSED written = 0; |
3200 | IADDR UNUSED pc = abuf->addr; | |
3201 | SEM_BRANCH_INIT | |
3202 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3203 | ||
7a292a7a | 3204 | { |
c906108c SS |
3205 | { |
3206 | USI opval = GET_H_DR (((UINT) 1)); | |
3207 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
3208 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
3209 | } | |
7a292a7a | 3210 | } |
c906108c SS |
3211 | |
3212 | SEM_BRANCH_FINI (vpc); | |
3213 | #undef FLD | |
3214 | } | |
3215 | NEXT (vpc); | |
3216 | ||
3217 | CASE (sem, INSN_INT) : /* int $u8 */ | |
3218 | { | |
3219 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3220 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3221 | #define FLD(f) abuf->fields.sfmt_int.f |
c906108c SS |
3222 | int UNUSED written = 0; |
3223 | IADDR UNUSED pc = abuf->addr; | |
3224 | SEM_BRANCH_INIT | |
3225 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3226 | ||
7a292a7a | 3227 | { |
c906108c SS |
3228 | ; /*clobber*/ |
3229 | ; /*clobber*/ | |
3230 | ; /*clobber*/ | |
3231 | { | |
3232 | SI opval = fr30_int (current_cpu, pc, FLD (f_u8)); | |
3233 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
3234 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
3235 | } | |
7a292a7a | 3236 | } |
c906108c SS |
3237 | |
3238 | SEM_BRANCH_FINI (vpc); | |
3239 | #undef FLD | |
3240 | } | |
3241 | NEXT (vpc); | |
3242 | ||
3243 | CASE (sem, INSN_INTE) : /* inte */ | |
3244 | { | |
3245 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3246 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3247 | #define FLD(f) abuf->fields.fmt_empty.f |
c906108c SS |
3248 | int UNUSED written = 0; |
3249 | IADDR UNUSED pc = abuf->addr; | |
3250 | SEM_BRANCH_INIT | |
3251 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3252 | ||
7a292a7a | 3253 | { |
c906108c SS |
3254 | ; /*clobber*/ |
3255 | ; /*clobber*/ | |
3256 | ; /*clobber*/ | |
3257 | { | |
3258 | SI opval = fr30_inte (current_cpu, pc); | |
3259 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
3260 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
3261 | } | |
7a292a7a | 3262 | } |
c906108c SS |
3263 | |
3264 | SEM_BRANCH_FINI (vpc); | |
3265 | #undef FLD | |
3266 | } | |
3267 | NEXT (vpc); | |
3268 | ||
3269 | CASE (sem, INSN_RETI) : /* reti */ | |
3270 | { | |
3271 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3272 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3273 | #define FLD(f) abuf->fields.fmt_empty.f |
c906108c SS |
3274 | int UNUSED written = 0; |
3275 | IADDR UNUSED pc = abuf->addr; | |
3276 | SEM_BRANCH_INIT | |
3277 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3278 | ||
3279 | if (EQBI (GET_H_SBIT (), 0)) { | |
7a292a7a | 3280 | { |
c906108c SS |
3281 | { |
3282 | SI opval = GETMEMSI (current_cpu, pc, GET_H_DR (((UINT) 2))); | |
3283 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
3284 | written |= (1 << 7); | |
3285 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
3286 | } | |
3287 | { | |
3288 | SI opval = ADDSI (GET_H_DR (((UINT) 2)), 4); | |
3289 | SET_H_DR (((UINT) 2), opval); | |
3290 | written |= (1 << 5); | |
3291 | TRACE_RESULT (current_cpu, abuf, "dr-2", 'x', opval); | |
3292 | } | |
3293 | { | |
3294 | SI opval = GETMEMSI (current_cpu, pc, GET_H_DR (((UINT) 2))); | |
3295 | SET_H_PS (opval); | |
3296 | written |= (1 << 8); | |
3297 | TRACE_RESULT (current_cpu, abuf, "ps", 'x', opval); | |
3298 | } | |
3299 | { | |
3300 | SI opval = ADDSI (GET_H_DR (((UINT) 2)), 4); | |
3301 | SET_H_DR (((UINT) 2), opval); | |
3302 | written |= (1 << 5); | |
3303 | TRACE_RESULT (current_cpu, abuf, "dr-2", 'x', opval); | |
3304 | } | |
7a292a7a | 3305 | } |
c906108c | 3306 | } else { |
7a292a7a | 3307 | { |
c906108c SS |
3308 | { |
3309 | SI opval = GETMEMSI (current_cpu, pc, GET_H_DR (((UINT) 3))); | |
3310 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
3311 | written |= (1 << 7); | |
3312 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
3313 | } | |
3314 | { | |
3315 | SI opval = ADDSI (GET_H_DR (((UINT) 3)), 4); | |
3316 | SET_H_DR (((UINT) 3), opval); | |
3317 | written |= (1 << 6); | |
3318 | TRACE_RESULT (current_cpu, abuf, "dr-3", 'x', opval); | |
3319 | } | |
3320 | { | |
3321 | SI opval = GETMEMSI (current_cpu, pc, GET_H_DR (((UINT) 3))); | |
3322 | SET_H_PS (opval); | |
3323 | written |= (1 << 8); | |
3324 | TRACE_RESULT (current_cpu, abuf, "ps", 'x', opval); | |
3325 | } | |
3326 | { | |
3327 | SI opval = ADDSI (GET_H_DR (((UINT) 3)), 4); | |
3328 | SET_H_DR (((UINT) 3), opval); | |
3329 | written |= (1 << 6); | |
3330 | TRACE_RESULT (current_cpu, abuf, "dr-3", 'x', opval); | |
3331 | } | |
7a292a7a | 3332 | } |
c906108c SS |
3333 | } |
3334 | ||
3335 | abuf->written = written; | |
3336 | SEM_BRANCH_FINI (vpc); | |
3337 | #undef FLD | |
3338 | } | |
3339 | NEXT (vpc); | |
3340 | ||
3341 | CASE (sem, INSN_BRAD) : /* bra:d $label9 */ | |
3342 | { | |
3343 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3344 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3345 | #define FLD(f) abuf->fields.sfmt_brad.f |
c906108c SS |
3346 | int UNUSED written = 0; |
3347 | IADDR UNUSED pc = abuf->addr; | |
3348 | SEM_BRANCH_INIT | |
3349 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3350 | ||
7a292a7a | 3351 | { |
c906108c SS |
3352 | { |
3353 | USI opval = FLD (i_label9); | |
96baa820 | 3354 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
3355 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); |
3356 | } | |
7a292a7a | 3357 | } |
c906108c SS |
3358 | |
3359 | SEM_BRANCH_FINI (vpc); | |
3360 | #undef FLD | |
3361 | } | |
3362 | NEXT (vpc); | |
3363 | ||
3364 | CASE (sem, INSN_BRA) : /* bra $label9 */ | |
3365 | { | |
3366 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3367 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3368 | #define FLD(f) abuf->fields.sfmt_brad.f |
c906108c SS |
3369 | int UNUSED written = 0; |
3370 | IADDR UNUSED pc = abuf->addr; | |
3371 | SEM_BRANCH_INIT | |
3372 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3373 | ||
3374 | { | |
3375 | USI opval = FLD (i_label9); | |
96baa820 | 3376 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
3377 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); |
3378 | } | |
3379 | ||
3380 | SEM_BRANCH_FINI (vpc); | |
3381 | #undef FLD | |
3382 | } | |
3383 | NEXT (vpc); | |
3384 | ||
3385 | CASE (sem, INSN_BNOD) : /* bno:d $label9 */ | |
3386 | { | |
3387 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3388 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3389 | #define FLD(f) abuf->fields.fmt_empty.f |
c906108c SS |
3390 | int UNUSED written = 0; |
3391 | IADDR UNUSED pc = abuf->addr; | |
3392 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3393 | ||
7a292a7a | 3394 | { |
2acceee2 | 3395 | ((void) 0); /*nop*/ |
7a292a7a | 3396 | } |
c906108c SS |
3397 | |
3398 | #undef FLD | |
3399 | } | |
3400 | NEXT (vpc); | |
3401 | ||
3402 | CASE (sem, INSN_BNO) : /* bno $label9 */ | |
3403 | { | |
3404 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3405 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3406 | #define FLD(f) abuf->fields.fmt_empty.f |
c906108c SS |
3407 | int UNUSED written = 0; |
3408 | IADDR UNUSED pc = abuf->addr; | |
3409 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3410 | ||
2acceee2 | 3411 | ((void) 0); /*nop*/ |
c906108c SS |
3412 | |
3413 | #undef FLD | |
3414 | } | |
3415 | NEXT (vpc); | |
3416 | ||
3417 | CASE (sem, INSN_BEQD) : /* beq:d $label9 */ | |
3418 | { | |
3419 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3420 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3421 | #define FLD(f) abuf->fields.sfmt_brad.f |
c906108c SS |
3422 | int UNUSED written = 0; |
3423 | IADDR UNUSED pc = abuf->addr; | |
3424 | SEM_BRANCH_INIT | |
3425 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3426 | ||
7a292a7a | 3427 | { |
c906108c SS |
3428 | if (CPU (h_zbit)) { |
3429 | { | |
3430 | USI opval = FLD (i_label9); | |
96baa820 | 3431 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
3432 | written |= (1 << 2); |
3433 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
3434 | } | |
3435 | } | |
7a292a7a | 3436 | } |
c906108c SS |
3437 | |
3438 | abuf->written = written; | |
3439 | SEM_BRANCH_FINI (vpc); | |
3440 | #undef FLD | |
3441 | } | |
3442 | NEXT (vpc); | |
3443 | ||
3444 | CASE (sem, INSN_BEQ) : /* beq $label9 */ | |
3445 | { | |
3446 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3447 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3448 | #define FLD(f) abuf->fields.sfmt_brad.f |
c906108c SS |
3449 | int UNUSED written = 0; |
3450 | IADDR UNUSED pc = abuf->addr; | |
3451 | SEM_BRANCH_INIT | |
3452 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3453 | ||
3454 | if (CPU (h_zbit)) { | |
3455 | { | |
3456 | USI opval = FLD (i_label9); | |
96baa820 | 3457 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
3458 | written |= (1 << 2); |
3459 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
3460 | } | |
3461 | } | |
3462 | ||
3463 | abuf->written = written; | |
3464 | SEM_BRANCH_FINI (vpc); | |
3465 | #undef FLD | |
3466 | } | |
3467 | NEXT (vpc); | |
3468 | ||
3469 | CASE (sem, INSN_BNED) : /* bne:d $label9 */ | |
3470 | { | |
3471 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3472 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3473 | #define FLD(f) abuf->fields.sfmt_brad.f |
c906108c SS |
3474 | int UNUSED written = 0; |
3475 | IADDR UNUSED pc = abuf->addr; | |
3476 | SEM_BRANCH_INIT | |
3477 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3478 | ||
7a292a7a | 3479 | { |
c906108c SS |
3480 | if (NOTBI (CPU (h_zbit))) { |
3481 | { | |
3482 | USI opval = FLD (i_label9); | |
96baa820 | 3483 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
3484 | written |= (1 << 2); |
3485 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
3486 | } | |
3487 | } | |
7a292a7a | 3488 | } |
c906108c SS |
3489 | |
3490 | abuf->written = written; | |
3491 | SEM_BRANCH_FINI (vpc); | |
3492 | #undef FLD | |
3493 | } | |
3494 | NEXT (vpc); | |
3495 | ||
3496 | CASE (sem, INSN_BNE) : /* bne $label9 */ | |
3497 | { | |
3498 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3499 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3500 | #define FLD(f) abuf->fields.sfmt_brad.f |
c906108c SS |
3501 | int UNUSED written = 0; |
3502 | IADDR UNUSED pc = abuf->addr; | |
3503 | SEM_BRANCH_INIT | |
3504 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3505 | ||
3506 | if (NOTBI (CPU (h_zbit))) { | |
3507 | { | |
3508 | USI opval = FLD (i_label9); | |
96baa820 | 3509 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
3510 | written |= (1 << 2); |
3511 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
3512 | } | |
3513 | } | |
3514 | ||
3515 | abuf->written = written; | |
3516 | SEM_BRANCH_FINI (vpc); | |
3517 | #undef FLD | |
3518 | } | |
3519 | NEXT (vpc); | |
3520 | ||
3521 | CASE (sem, INSN_BCD) : /* bc:d $label9 */ | |
3522 | { | |
3523 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3524 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3525 | #define FLD(f) abuf->fields.sfmt_brad.f |
c906108c SS |
3526 | int UNUSED written = 0; |
3527 | IADDR UNUSED pc = abuf->addr; | |
3528 | SEM_BRANCH_INIT | |
3529 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3530 | ||
7a292a7a | 3531 | { |
c906108c SS |
3532 | if (CPU (h_cbit)) { |
3533 | { | |
3534 | USI opval = FLD (i_label9); | |
96baa820 | 3535 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
3536 | written |= (1 << 2); |
3537 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
3538 | } | |
3539 | } | |
7a292a7a | 3540 | } |
c906108c SS |
3541 | |
3542 | abuf->written = written; | |
3543 | SEM_BRANCH_FINI (vpc); | |
3544 | #undef FLD | |
3545 | } | |
3546 | NEXT (vpc); | |
3547 | ||
3548 | CASE (sem, INSN_BC) : /* bc $label9 */ | |
3549 | { | |
3550 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3551 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3552 | #define FLD(f) abuf->fields.sfmt_brad.f |
c906108c SS |
3553 | int UNUSED written = 0; |
3554 | IADDR UNUSED pc = abuf->addr; | |
3555 | SEM_BRANCH_INIT | |
3556 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3557 | ||
3558 | if (CPU (h_cbit)) { | |
3559 | { | |
3560 | USI opval = FLD (i_label9); | |
96baa820 | 3561 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
3562 | written |= (1 << 2); |
3563 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
3564 | } | |
3565 | } | |
3566 | ||
3567 | abuf->written = written; | |
3568 | SEM_BRANCH_FINI (vpc); | |
3569 | #undef FLD | |
3570 | } | |
3571 | NEXT (vpc); | |
3572 | ||
3573 | CASE (sem, INSN_BNCD) : /* bnc:d $label9 */ | |
3574 | { | |
3575 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3576 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3577 | #define FLD(f) abuf->fields.sfmt_brad.f |
c906108c SS |
3578 | int UNUSED written = 0; |
3579 | IADDR UNUSED pc = abuf->addr; | |
3580 | SEM_BRANCH_INIT | |
3581 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3582 | ||
7a292a7a | 3583 | { |
c906108c SS |
3584 | if (NOTBI (CPU (h_cbit))) { |
3585 | { | |
3586 | USI opval = FLD (i_label9); | |
96baa820 | 3587 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
3588 | written |= (1 << 2); |
3589 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
3590 | } | |
3591 | } | |
7a292a7a | 3592 | } |
c906108c SS |
3593 | |
3594 | abuf->written = written; | |
3595 | SEM_BRANCH_FINI (vpc); | |
3596 | #undef FLD | |
3597 | } | |
3598 | NEXT (vpc); | |
3599 | ||
3600 | CASE (sem, INSN_BNC) : /* bnc $label9 */ | |
3601 | { | |
3602 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3603 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3604 | #define FLD(f) abuf->fields.sfmt_brad.f |
c906108c SS |
3605 | int UNUSED written = 0; |
3606 | IADDR UNUSED pc = abuf->addr; | |
3607 | SEM_BRANCH_INIT | |
3608 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3609 | ||
3610 | if (NOTBI (CPU (h_cbit))) { | |
3611 | { | |
3612 | USI opval = FLD (i_label9); | |
96baa820 | 3613 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
3614 | written |= (1 << 2); |
3615 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
3616 | } | |
3617 | } | |
3618 | ||
3619 | abuf->written = written; | |
3620 | SEM_BRANCH_FINI (vpc); | |
3621 | #undef FLD | |
3622 | } | |
3623 | NEXT (vpc); | |
3624 | ||
3625 | CASE (sem, INSN_BND) : /* bn:d $label9 */ | |
3626 | { | |
3627 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3628 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3629 | #define FLD(f) abuf->fields.sfmt_brad.f |
c906108c SS |
3630 | int UNUSED written = 0; |
3631 | IADDR UNUSED pc = abuf->addr; | |
3632 | SEM_BRANCH_INIT | |
3633 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3634 | ||
7a292a7a | 3635 | { |
c906108c SS |
3636 | if (CPU (h_nbit)) { |
3637 | { | |
3638 | USI opval = FLD (i_label9); | |
96baa820 | 3639 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
3640 | written |= (1 << 2); |
3641 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
3642 | } | |
3643 | } | |
7a292a7a | 3644 | } |
c906108c SS |
3645 | |
3646 | abuf->written = written; | |
3647 | SEM_BRANCH_FINI (vpc); | |
3648 | #undef FLD | |
3649 | } | |
3650 | NEXT (vpc); | |
3651 | ||
3652 | CASE (sem, INSN_BN) : /* bn $label9 */ | |
3653 | { | |
3654 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3655 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3656 | #define FLD(f) abuf->fields.sfmt_brad.f |
c906108c SS |
3657 | int UNUSED written = 0; |
3658 | IADDR UNUSED pc = abuf->addr; | |
3659 | SEM_BRANCH_INIT | |
3660 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3661 | ||
3662 | if (CPU (h_nbit)) { | |
3663 | { | |
3664 | USI opval = FLD (i_label9); | |
96baa820 | 3665 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
3666 | written |= (1 << 2); |
3667 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
3668 | } | |
3669 | } | |
3670 | ||
3671 | abuf->written = written; | |
3672 | SEM_BRANCH_FINI (vpc); | |
3673 | #undef FLD | |
3674 | } | |
3675 | NEXT (vpc); | |
3676 | ||
3677 | CASE (sem, INSN_BPD) : /* bp:d $label9 */ | |
3678 | { | |
3679 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3680 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3681 | #define FLD(f) abuf->fields.sfmt_brad.f |
c906108c SS |
3682 | int UNUSED written = 0; |
3683 | IADDR UNUSED pc = abuf->addr; | |
3684 | SEM_BRANCH_INIT | |
3685 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3686 | ||
7a292a7a | 3687 | { |
c906108c SS |
3688 | if (NOTBI (CPU (h_nbit))) { |
3689 | { | |
3690 | USI opval = FLD (i_label9); | |
96baa820 | 3691 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
3692 | written |= (1 << 2); |
3693 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
3694 | } | |
3695 | } | |
7a292a7a | 3696 | } |
c906108c SS |
3697 | |
3698 | abuf->written = written; | |
3699 | SEM_BRANCH_FINI (vpc); | |
3700 | #undef FLD | |
3701 | } | |
3702 | NEXT (vpc); | |
3703 | ||
3704 | CASE (sem, INSN_BP) : /* bp $label9 */ | |
3705 | { | |
3706 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3707 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3708 | #define FLD(f) abuf->fields.sfmt_brad.f |
c906108c SS |
3709 | int UNUSED written = 0; |
3710 | IADDR UNUSED pc = abuf->addr; | |
3711 | SEM_BRANCH_INIT | |
3712 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3713 | ||
3714 | if (NOTBI (CPU (h_nbit))) { | |
3715 | { | |
3716 | USI opval = FLD (i_label9); | |
96baa820 | 3717 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
3718 | written |= (1 << 2); |
3719 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
3720 | } | |
3721 | } | |
3722 | ||
3723 | abuf->written = written; | |
3724 | SEM_BRANCH_FINI (vpc); | |
3725 | #undef FLD | |
3726 | } | |
3727 | NEXT (vpc); | |
3728 | ||
3729 | CASE (sem, INSN_BVD) : /* bv:d $label9 */ | |
3730 | { | |
3731 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3732 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3733 | #define FLD(f) abuf->fields.sfmt_brad.f |
c906108c SS |
3734 | int UNUSED written = 0; |
3735 | IADDR UNUSED pc = abuf->addr; | |
3736 | SEM_BRANCH_INIT | |
3737 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3738 | ||
7a292a7a | 3739 | { |
c906108c SS |
3740 | if (CPU (h_vbit)) { |
3741 | { | |
3742 | USI opval = FLD (i_label9); | |
96baa820 | 3743 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
3744 | written |= (1 << 2); |
3745 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
3746 | } | |
3747 | } | |
7a292a7a | 3748 | } |
c906108c SS |
3749 | |
3750 | abuf->written = written; | |
3751 | SEM_BRANCH_FINI (vpc); | |
3752 | #undef FLD | |
3753 | } | |
3754 | NEXT (vpc); | |
3755 | ||
3756 | CASE (sem, INSN_BV) : /* bv $label9 */ | |
3757 | { | |
3758 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3759 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3760 | #define FLD(f) abuf->fields.sfmt_brad.f |
c906108c SS |
3761 | int UNUSED written = 0; |
3762 | IADDR UNUSED pc = abuf->addr; | |
3763 | SEM_BRANCH_INIT | |
3764 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3765 | ||
3766 | if (CPU (h_vbit)) { | |
3767 | { | |
3768 | USI opval = FLD (i_label9); | |
96baa820 | 3769 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
3770 | written |= (1 << 2); |
3771 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
3772 | } | |
3773 | } | |
3774 | ||
3775 | abuf->written = written; | |
3776 | SEM_BRANCH_FINI (vpc); | |
3777 | #undef FLD | |
3778 | } | |
3779 | NEXT (vpc); | |
3780 | ||
3781 | CASE (sem, INSN_BNVD) : /* bnv:d $label9 */ | |
3782 | { | |
3783 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3784 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3785 | #define FLD(f) abuf->fields.sfmt_brad.f |
c906108c SS |
3786 | int UNUSED written = 0; |
3787 | IADDR UNUSED pc = abuf->addr; | |
3788 | SEM_BRANCH_INIT | |
3789 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3790 | ||
7a292a7a | 3791 | { |
c906108c SS |
3792 | if (NOTBI (CPU (h_vbit))) { |
3793 | { | |
3794 | USI opval = FLD (i_label9); | |
96baa820 | 3795 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
3796 | written |= (1 << 2); |
3797 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
3798 | } | |
3799 | } | |
7a292a7a | 3800 | } |
c906108c SS |
3801 | |
3802 | abuf->written = written; | |
3803 | SEM_BRANCH_FINI (vpc); | |
3804 | #undef FLD | |
3805 | } | |
3806 | NEXT (vpc); | |
3807 | ||
3808 | CASE (sem, INSN_BNV) : /* bnv $label9 */ | |
3809 | { | |
3810 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3811 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3812 | #define FLD(f) abuf->fields.sfmt_brad.f |
c906108c SS |
3813 | int UNUSED written = 0; |
3814 | IADDR UNUSED pc = abuf->addr; | |
3815 | SEM_BRANCH_INIT | |
3816 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3817 | ||
3818 | if (NOTBI (CPU (h_vbit))) { | |
3819 | { | |
3820 | USI opval = FLD (i_label9); | |
96baa820 | 3821 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
3822 | written |= (1 << 2); |
3823 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
3824 | } | |
3825 | } | |
3826 | ||
3827 | abuf->written = written; | |
3828 | SEM_BRANCH_FINI (vpc); | |
3829 | #undef FLD | |
3830 | } | |
3831 | NEXT (vpc); | |
3832 | ||
3833 | CASE (sem, INSN_BLTD) : /* blt:d $label9 */ | |
3834 | { | |
3835 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3836 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3837 | #define FLD(f) abuf->fields.sfmt_brad.f |
c906108c SS |
3838 | int UNUSED written = 0; |
3839 | IADDR UNUSED pc = abuf->addr; | |
3840 | SEM_BRANCH_INIT | |
3841 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3842 | ||
7a292a7a | 3843 | { |
c906108c SS |
3844 | if (XORBI (CPU (h_vbit), CPU (h_nbit))) { |
3845 | { | |
3846 | USI opval = FLD (i_label9); | |
96baa820 | 3847 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
3848 | written |= (1 << 3); |
3849 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
3850 | } | |
3851 | } | |
7a292a7a | 3852 | } |
c906108c SS |
3853 | |
3854 | abuf->written = written; | |
3855 | SEM_BRANCH_FINI (vpc); | |
3856 | #undef FLD | |
3857 | } | |
3858 | NEXT (vpc); | |
3859 | ||
3860 | CASE (sem, INSN_BLT) : /* blt $label9 */ | |
3861 | { | |
3862 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3863 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3864 | #define FLD(f) abuf->fields.sfmt_brad.f |
c906108c SS |
3865 | int UNUSED written = 0; |
3866 | IADDR UNUSED pc = abuf->addr; | |
3867 | SEM_BRANCH_INIT | |
3868 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3869 | ||
3870 | if (XORBI (CPU (h_vbit), CPU (h_nbit))) { | |
3871 | { | |
3872 | USI opval = FLD (i_label9); | |
96baa820 | 3873 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
3874 | written |= (1 << 3); |
3875 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
3876 | } | |
3877 | } | |
3878 | ||
3879 | abuf->written = written; | |
3880 | SEM_BRANCH_FINI (vpc); | |
3881 | #undef FLD | |
3882 | } | |
3883 | NEXT (vpc); | |
3884 | ||
3885 | CASE (sem, INSN_BGED) : /* bge:d $label9 */ | |
3886 | { | |
3887 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3888 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3889 | #define FLD(f) abuf->fields.sfmt_brad.f |
c906108c SS |
3890 | int UNUSED written = 0; |
3891 | IADDR UNUSED pc = abuf->addr; | |
3892 | SEM_BRANCH_INIT | |
3893 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3894 | ||
7a292a7a | 3895 | { |
c906108c SS |
3896 | if (NOTBI (XORBI (CPU (h_vbit), CPU (h_nbit)))) { |
3897 | { | |
3898 | USI opval = FLD (i_label9); | |
96baa820 | 3899 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
3900 | written |= (1 << 3); |
3901 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
3902 | } | |
3903 | } | |
7a292a7a | 3904 | } |
c906108c SS |
3905 | |
3906 | abuf->written = written; | |
3907 | SEM_BRANCH_FINI (vpc); | |
3908 | #undef FLD | |
3909 | } | |
3910 | NEXT (vpc); | |
3911 | ||
3912 | CASE (sem, INSN_BGE) : /* bge $label9 */ | |
3913 | { | |
3914 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3915 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3916 | #define FLD(f) abuf->fields.sfmt_brad.f |
c906108c SS |
3917 | int UNUSED written = 0; |
3918 | IADDR UNUSED pc = abuf->addr; | |
3919 | SEM_BRANCH_INIT | |
3920 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3921 | ||
3922 | if (NOTBI (XORBI (CPU (h_vbit), CPU (h_nbit)))) { | |
3923 | { | |
3924 | USI opval = FLD (i_label9); | |
96baa820 | 3925 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
3926 | written |= (1 << 3); |
3927 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
3928 | } | |
3929 | } | |
3930 | ||
3931 | abuf->written = written; | |
3932 | SEM_BRANCH_FINI (vpc); | |
3933 | #undef FLD | |
3934 | } | |
3935 | NEXT (vpc); | |
3936 | ||
3937 | CASE (sem, INSN_BLED) : /* ble:d $label9 */ | |
3938 | { | |
3939 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3940 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3941 | #define FLD(f) abuf->fields.sfmt_brad.f |
c906108c SS |
3942 | int UNUSED written = 0; |
3943 | IADDR UNUSED pc = abuf->addr; | |
3944 | SEM_BRANCH_INIT | |
3945 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3946 | ||
7a292a7a | 3947 | { |
c906108c SS |
3948 | if (ORBI (XORBI (CPU (h_vbit), CPU (h_nbit)), CPU (h_zbit))) { |
3949 | { | |
3950 | USI opval = FLD (i_label9); | |
96baa820 | 3951 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
3952 | written |= (1 << 4); |
3953 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
3954 | } | |
3955 | } | |
7a292a7a | 3956 | } |
c906108c SS |
3957 | |
3958 | abuf->written = written; | |
3959 | SEM_BRANCH_FINI (vpc); | |
3960 | #undef FLD | |
3961 | } | |
3962 | NEXT (vpc); | |
3963 | ||
3964 | CASE (sem, INSN_BLE) : /* ble $label9 */ | |
3965 | { | |
3966 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3967 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3968 | #define FLD(f) abuf->fields.sfmt_brad.f |
c906108c SS |
3969 | int UNUSED written = 0; |
3970 | IADDR UNUSED pc = abuf->addr; | |
3971 | SEM_BRANCH_INIT | |
3972 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3973 | ||
3974 | if (ORBI (XORBI (CPU (h_vbit), CPU (h_nbit)), CPU (h_zbit))) { | |
3975 | { | |
3976 | USI opval = FLD (i_label9); | |
96baa820 | 3977 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
3978 | written |= (1 << 4); |
3979 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
3980 | } | |
3981 | } | |
3982 | ||
3983 | abuf->written = written; | |
3984 | SEM_BRANCH_FINI (vpc); | |
3985 | #undef FLD | |
3986 | } | |
3987 | NEXT (vpc); | |
3988 | ||
3989 | CASE (sem, INSN_BGTD) : /* bgt:d $label9 */ | |
3990 | { | |
3991 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3992 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3993 | #define FLD(f) abuf->fields.sfmt_brad.f |
c906108c SS |
3994 | int UNUSED written = 0; |
3995 | IADDR UNUSED pc = abuf->addr; | |
3996 | SEM_BRANCH_INIT | |
3997 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
3998 | ||
7a292a7a | 3999 | { |
c906108c SS |
4000 | if (NOTBI (ORBI (XORBI (CPU (h_vbit), CPU (h_nbit)), CPU (h_zbit)))) { |
4001 | { | |
4002 | USI opval = FLD (i_label9); | |
96baa820 | 4003 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
4004 | written |= (1 << 4); |
4005 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
4006 | } | |
4007 | } | |
7a292a7a | 4008 | } |
c906108c SS |
4009 | |
4010 | abuf->written = written; | |
4011 | SEM_BRANCH_FINI (vpc); | |
4012 | #undef FLD | |
4013 | } | |
4014 | NEXT (vpc); | |
4015 | ||
4016 | CASE (sem, INSN_BGT) : /* bgt $label9 */ | |
4017 | { | |
4018 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4019 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4020 | #define FLD(f) abuf->fields.sfmt_brad.f |
c906108c SS |
4021 | int UNUSED written = 0; |
4022 | IADDR UNUSED pc = abuf->addr; | |
4023 | SEM_BRANCH_INIT | |
4024 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4025 | ||
4026 | if (NOTBI (ORBI (XORBI (CPU (h_vbit), CPU (h_nbit)), CPU (h_zbit)))) { | |
4027 | { | |
4028 | USI opval = FLD (i_label9); | |
96baa820 | 4029 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
4030 | written |= (1 << 4); |
4031 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
4032 | } | |
4033 | } | |
4034 | ||
4035 | abuf->written = written; | |
4036 | SEM_BRANCH_FINI (vpc); | |
4037 | #undef FLD | |
4038 | } | |
4039 | NEXT (vpc); | |
4040 | ||
4041 | CASE (sem, INSN_BLSD) : /* bls:d $label9 */ | |
4042 | { | |
4043 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4044 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4045 | #define FLD(f) abuf->fields.sfmt_brad.f |
c906108c SS |
4046 | int UNUSED written = 0; |
4047 | IADDR UNUSED pc = abuf->addr; | |
4048 | SEM_BRANCH_INIT | |
4049 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4050 | ||
7a292a7a | 4051 | { |
c906108c SS |
4052 | if (ORBI (CPU (h_cbit), CPU (h_zbit))) { |
4053 | { | |
4054 | USI opval = FLD (i_label9); | |
96baa820 | 4055 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
4056 | written |= (1 << 3); |
4057 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
4058 | } | |
4059 | } | |
7a292a7a | 4060 | } |
c906108c SS |
4061 | |
4062 | abuf->written = written; | |
4063 | SEM_BRANCH_FINI (vpc); | |
4064 | #undef FLD | |
4065 | } | |
4066 | NEXT (vpc); | |
4067 | ||
4068 | CASE (sem, INSN_BLS) : /* bls $label9 */ | |
4069 | { | |
4070 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4071 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4072 | #define FLD(f) abuf->fields.sfmt_brad.f |
c906108c SS |
4073 | int UNUSED written = 0; |
4074 | IADDR UNUSED pc = abuf->addr; | |
4075 | SEM_BRANCH_INIT | |
4076 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4077 | ||
4078 | if (ORBI (CPU (h_cbit), CPU (h_zbit))) { | |
4079 | { | |
4080 | USI opval = FLD (i_label9); | |
96baa820 | 4081 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
4082 | written |= (1 << 3); |
4083 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
4084 | } | |
4085 | } | |
4086 | ||
4087 | abuf->written = written; | |
4088 | SEM_BRANCH_FINI (vpc); | |
4089 | #undef FLD | |
4090 | } | |
4091 | NEXT (vpc); | |
4092 | ||
4093 | CASE (sem, INSN_BHID) : /* bhi:d $label9 */ | |
4094 | { | |
4095 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4096 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4097 | #define FLD(f) abuf->fields.sfmt_brad.f |
c906108c SS |
4098 | int UNUSED written = 0; |
4099 | IADDR UNUSED pc = abuf->addr; | |
4100 | SEM_BRANCH_INIT | |
4101 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4102 | ||
7a292a7a | 4103 | { |
c906108c SS |
4104 | if (NOTBI (ORBI (CPU (h_cbit), CPU (h_zbit)))) { |
4105 | { | |
4106 | USI opval = FLD (i_label9); | |
96baa820 | 4107 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
4108 | written |= (1 << 3); |
4109 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
4110 | } | |
4111 | } | |
7a292a7a | 4112 | } |
c906108c SS |
4113 | |
4114 | abuf->written = written; | |
4115 | SEM_BRANCH_FINI (vpc); | |
4116 | #undef FLD | |
4117 | } | |
4118 | NEXT (vpc); | |
4119 | ||
4120 | CASE (sem, INSN_BHI) : /* bhi $label9 */ | |
4121 | { | |
4122 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4123 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4124 | #define FLD(f) abuf->fields.sfmt_brad.f |
c906108c SS |
4125 | int UNUSED written = 0; |
4126 | IADDR UNUSED pc = abuf->addr; | |
4127 | SEM_BRANCH_INIT | |
4128 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4129 | ||
4130 | if (NOTBI (ORBI (CPU (h_cbit), CPU (h_zbit)))) { | |
4131 | { | |
4132 | USI opval = FLD (i_label9); | |
96baa820 | 4133 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
4134 | written |= (1 << 3); |
4135 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
4136 | } | |
4137 | } | |
4138 | ||
4139 | abuf->written = written; | |
4140 | SEM_BRANCH_FINI (vpc); | |
4141 | #undef FLD | |
4142 | } | |
4143 | NEXT (vpc); | |
4144 | ||
4145 | CASE (sem, INSN_DMOVR13) : /* dmov $R13,@$dir10 */ | |
4146 | { | |
4147 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4148 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4149 | #define FLD(f) abuf->fields.sfmt_dmovr13pi.f |
c906108c SS |
4150 | int UNUSED written = 0; |
4151 | IADDR UNUSED pc = abuf->addr; | |
4152 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4153 | ||
4154 | { | |
4155 | SI opval = CPU (h_gr[((UINT) 13)]); | |
4156 | SETMEMSI (current_cpu, pc, FLD (f_dir10), opval); | |
4157 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4158 | } | |
4159 | ||
4160 | #undef FLD | |
4161 | } | |
4162 | NEXT (vpc); | |
4163 | ||
4164 | CASE (sem, INSN_DMOVR13H) : /* dmovh $R13,@$dir9 */ | |
4165 | { | |
4166 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4167 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4168 | #define FLD(f) abuf->fields.sfmt_dmovr13pih.f |
c906108c SS |
4169 | int UNUSED written = 0; |
4170 | IADDR UNUSED pc = abuf->addr; | |
4171 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4172 | ||
4173 | { | |
4174 | HI opval = CPU (h_gr[((UINT) 13)]); | |
4175 | SETMEMHI (current_cpu, pc, FLD (f_dir9), opval); | |
4176 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4177 | } | |
4178 | ||
4179 | #undef FLD | |
4180 | } | |
4181 | NEXT (vpc); | |
4182 | ||
4183 | CASE (sem, INSN_DMOVR13B) : /* dmovb $R13,@$dir8 */ | |
4184 | { | |
4185 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4186 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4187 | #define FLD(f) abuf->fields.sfmt_dmovr13pib.f |
c906108c SS |
4188 | int UNUSED written = 0; |
4189 | IADDR UNUSED pc = abuf->addr; | |
4190 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4191 | ||
4192 | { | |
4193 | QI opval = CPU (h_gr[((UINT) 13)]); | |
4194 | SETMEMQI (current_cpu, pc, FLD (f_dir8), opval); | |
4195 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4196 | } | |
4197 | ||
4198 | #undef FLD | |
4199 | } | |
4200 | NEXT (vpc); | |
4201 | ||
4202 | CASE (sem, INSN_DMOVR13PI) : /* dmov @$R13+,@$dir10 */ | |
4203 | { | |
4204 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4205 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4206 | #define FLD(f) abuf->fields.sfmt_dmovr13pi.f |
c906108c SS |
4207 | int UNUSED written = 0; |
4208 | IADDR UNUSED pc = abuf->addr; | |
4209 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4210 | ||
7a292a7a | 4211 | { |
c906108c SS |
4212 | { |
4213 | SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 13)])); | |
4214 | SETMEMSI (current_cpu, pc, FLD (f_dir10), opval); | |
4215 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4216 | } | |
4217 | { | |
4218 | SI opval = ADDSI (CPU (h_gr[((UINT) 13)]), 4); | |
4219 | CPU (h_gr[((UINT) 13)]) = opval; | |
4220 | TRACE_RESULT (current_cpu, abuf, "gr-13", 'x', opval); | |
4221 | } | |
7a292a7a | 4222 | } |
c906108c SS |
4223 | |
4224 | #undef FLD | |
4225 | } | |
4226 | NEXT (vpc); | |
4227 | ||
4228 | CASE (sem, INSN_DMOVR13PIH) : /* dmovh @$R13+,@$dir9 */ | |
4229 | { | |
4230 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4231 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4232 | #define FLD(f) abuf->fields.sfmt_dmovr13pih.f |
c906108c SS |
4233 | int UNUSED written = 0; |
4234 | IADDR UNUSED pc = abuf->addr; | |
4235 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4236 | ||
7a292a7a | 4237 | { |
c906108c SS |
4238 | { |
4239 | HI opval = GETMEMHI (current_cpu, pc, CPU (h_gr[((UINT) 13)])); | |
4240 | SETMEMHI (current_cpu, pc, FLD (f_dir9), opval); | |
4241 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4242 | } | |
4243 | { | |
4244 | SI opval = ADDSI (CPU (h_gr[((UINT) 13)]), 2); | |
4245 | CPU (h_gr[((UINT) 13)]) = opval; | |
4246 | TRACE_RESULT (current_cpu, abuf, "gr-13", 'x', opval); | |
4247 | } | |
7a292a7a | 4248 | } |
c906108c SS |
4249 | |
4250 | #undef FLD | |
4251 | } | |
4252 | NEXT (vpc); | |
4253 | ||
4254 | CASE (sem, INSN_DMOVR13PIB) : /* dmovb @$R13+,@$dir8 */ | |
4255 | { | |
4256 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4257 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4258 | #define FLD(f) abuf->fields.sfmt_dmovr13pib.f |
c906108c SS |
4259 | int UNUSED written = 0; |
4260 | IADDR UNUSED pc = abuf->addr; | |
4261 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4262 | ||
7a292a7a | 4263 | { |
c906108c SS |
4264 | { |
4265 | QI opval = GETMEMQI (current_cpu, pc, CPU (h_gr[((UINT) 13)])); | |
4266 | SETMEMQI (current_cpu, pc, FLD (f_dir8), opval); | |
4267 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4268 | } | |
4269 | { | |
4270 | SI opval = ADDSI (CPU (h_gr[((UINT) 13)]), 1); | |
4271 | CPU (h_gr[((UINT) 13)]) = opval; | |
4272 | TRACE_RESULT (current_cpu, abuf, "gr-13", 'x', opval); | |
4273 | } | |
7a292a7a | 4274 | } |
c906108c SS |
4275 | |
4276 | #undef FLD | |
4277 | } | |
4278 | NEXT (vpc); | |
4279 | ||
4280 | CASE (sem, INSN_DMOVR15PI) : /* dmov @$R15+,@$dir10 */ | |
4281 | { | |
4282 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4283 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4284 | #define FLD(f) abuf->fields.sfmt_dmovr15pi.f |
c906108c SS |
4285 | int UNUSED written = 0; |
4286 | IADDR UNUSED pc = abuf->addr; | |
4287 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4288 | ||
7a292a7a | 4289 | { |
c906108c SS |
4290 | { |
4291 | SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); | |
4292 | SETMEMSI (current_cpu, pc, FLD (f_dir10), opval); | |
4293 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4294 | } | |
4295 | { | |
4296 | SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); | |
4297 | CPU (h_gr[((UINT) 15)]) = opval; | |
4298 | TRACE_RESULT (current_cpu, abuf, "gr-15", 'x', opval); | |
4299 | } | |
7a292a7a | 4300 | } |
c906108c SS |
4301 | |
4302 | #undef FLD | |
4303 | } | |
4304 | NEXT (vpc); | |
4305 | ||
4306 | CASE (sem, INSN_DMOV2R13) : /* dmov @$dir10,$R13 */ | |
4307 | { | |
4308 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4309 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4310 | #define FLD(f) abuf->fields.sfmt_dmovr13pi.f |
c906108c SS |
4311 | int UNUSED written = 0; |
4312 | IADDR UNUSED pc = abuf->addr; | |
4313 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4314 | ||
4315 | { | |
4316 | SI opval = GETMEMSI (current_cpu, pc, FLD (f_dir10)); | |
4317 | CPU (h_gr[((UINT) 13)]) = opval; | |
4318 | TRACE_RESULT (current_cpu, abuf, "gr-13", 'x', opval); | |
4319 | } | |
4320 | ||
4321 | #undef FLD | |
4322 | } | |
4323 | NEXT (vpc); | |
4324 | ||
4325 | CASE (sem, INSN_DMOV2R13H) : /* dmovh @$dir9,$R13 */ | |
4326 | { | |
4327 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4328 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4329 | #define FLD(f) abuf->fields.sfmt_dmovr13pih.f |
c906108c SS |
4330 | int UNUSED written = 0; |
4331 | IADDR UNUSED pc = abuf->addr; | |
4332 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4333 | ||
4334 | { | |
4335 | SI opval = GETMEMHI (current_cpu, pc, FLD (f_dir9)); | |
4336 | CPU (h_gr[((UINT) 13)]) = opval; | |
4337 | TRACE_RESULT (current_cpu, abuf, "gr-13", 'x', opval); | |
4338 | } | |
4339 | ||
4340 | #undef FLD | |
4341 | } | |
4342 | NEXT (vpc); | |
4343 | ||
4344 | CASE (sem, INSN_DMOV2R13B) : /* dmovb @$dir8,$R13 */ | |
4345 | { | |
4346 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4347 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4348 | #define FLD(f) abuf->fields.sfmt_dmovr13pib.f |
c906108c SS |
4349 | int UNUSED written = 0; |
4350 | IADDR UNUSED pc = abuf->addr; | |
4351 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4352 | ||
4353 | { | |
4354 | SI opval = GETMEMQI (current_cpu, pc, FLD (f_dir8)); | |
4355 | CPU (h_gr[((UINT) 13)]) = opval; | |
4356 | TRACE_RESULT (current_cpu, abuf, "gr-13", 'x', opval); | |
4357 | } | |
4358 | ||
4359 | #undef FLD | |
4360 | } | |
4361 | NEXT (vpc); | |
4362 | ||
4363 | CASE (sem, INSN_DMOV2R13PI) : /* dmov @$dir10,@$R13+ */ | |
4364 | { | |
4365 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4366 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4367 | #define FLD(f) abuf->fields.sfmt_dmovr13pi.f |
c906108c SS |
4368 | int UNUSED written = 0; |
4369 | IADDR UNUSED pc = abuf->addr; | |
4370 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4371 | ||
7a292a7a | 4372 | { |
c906108c SS |
4373 | { |
4374 | SI opval = GETMEMSI (current_cpu, pc, FLD (f_dir10)); | |
4375 | SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 13)]), opval); | |
4376 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4377 | } | |
4378 | { | |
4379 | SI opval = ADDSI (CPU (h_gr[((UINT) 13)]), 4); | |
4380 | CPU (h_gr[((UINT) 13)]) = opval; | |
4381 | TRACE_RESULT (current_cpu, abuf, "gr-13", 'x', opval); | |
4382 | } | |
7a292a7a | 4383 | } |
c906108c SS |
4384 | |
4385 | #undef FLD | |
4386 | } | |
4387 | NEXT (vpc); | |
4388 | ||
4389 | CASE (sem, INSN_DMOV2R13PIH) : /* dmovh @$dir9,@$R13+ */ | |
4390 | { | |
4391 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4392 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4393 | #define FLD(f) abuf->fields.sfmt_dmovr13pih.f |
c906108c SS |
4394 | int UNUSED written = 0; |
4395 | IADDR UNUSED pc = abuf->addr; | |
4396 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4397 | ||
7a292a7a | 4398 | { |
c906108c SS |
4399 | { |
4400 | HI opval = GETMEMHI (current_cpu, pc, FLD (f_dir9)); | |
4401 | SETMEMHI (current_cpu, pc, CPU (h_gr[((UINT) 13)]), opval); | |
4402 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4403 | } | |
4404 | { | |
4405 | SI opval = ADDSI (CPU (h_gr[((UINT) 13)]), 2); | |
4406 | CPU (h_gr[((UINT) 13)]) = opval; | |
4407 | TRACE_RESULT (current_cpu, abuf, "gr-13", 'x', opval); | |
4408 | } | |
7a292a7a | 4409 | } |
c906108c SS |
4410 | |
4411 | #undef FLD | |
4412 | } | |
4413 | NEXT (vpc); | |
4414 | ||
4415 | CASE (sem, INSN_DMOV2R13PIB) : /* dmovb @$dir8,@$R13+ */ | |
4416 | { | |
4417 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4418 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4419 | #define FLD(f) abuf->fields.sfmt_dmovr13pib.f |
c906108c SS |
4420 | int UNUSED written = 0; |
4421 | IADDR UNUSED pc = abuf->addr; | |
4422 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4423 | ||
7a292a7a | 4424 | { |
c906108c SS |
4425 | { |
4426 | QI opval = GETMEMQI (current_cpu, pc, FLD (f_dir8)); | |
4427 | SETMEMQI (current_cpu, pc, CPU (h_gr[((UINT) 13)]), opval); | |
4428 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4429 | } | |
4430 | { | |
4431 | SI opval = ADDSI (CPU (h_gr[((UINT) 13)]), 1); | |
4432 | CPU (h_gr[((UINT) 13)]) = opval; | |
4433 | TRACE_RESULT (current_cpu, abuf, "gr-13", 'x', opval); | |
4434 | } | |
7a292a7a | 4435 | } |
c906108c SS |
4436 | |
4437 | #undef FLD | |
4438 | } | |
4439 | NEXT (vpc); | |
4440 | ||
4441 | CASE (sem, INSN_DMOV2R15PD) : /* dmov @$dir10,@-$R15 */ | |
4442 | { | |
4443 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4444 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4445 | #define FLD(f) abuf->fields.sfmt_dmovr15pi.f |
c906108c SS |
4446 | int UNUSED written = 0; |
4447 | IADDR UNUSED pc = abuf->addr; | |
4448 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4449 | ||
7a292a7a | 4450 | { |
c906108c SS |
4451 | { |
4452 | SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); | |
4453 | CPU (h_gr[((UINT) 15)]) = opval; | |
4454 | TRACE_RESULT (current_cpu, abuf, "gr-15", 'x', opval); | |
4455 | } | |
4456 | { | |
4457 | SI opval = GETMEMSI (current_cpu, pc, FLD (f_dir10)); | |
4458 | SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); | |
4459 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4460 | } | |
7a292a7a | 4461 | } |
c906108c SS |
4462 | |
4463 | #undef FLD | |
4464 | } | |
4465 | NEXT (vpc); | |
4466 | ||
4467 | CASE (sem, INSN_LDRES) : /* ldres @$Ri+,$u4 */ | |
4468 | { | |
4469 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4470 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4471 | #define FLD(f) abuf->fields.sfmt_add2.f |
c906108c SS |
4472 | int UNUSED written = 0; |
4473 | IADDR UNUSED pc = abuf->addr; | |
4474 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4475 | ||
4476 | { | |
4477 | SI opval = ADDSI (* FLD (i_Ri), 4); | |
4478 | * FLD (i_Ri) = opval; | |
4479 | TRACE_RESULT (current_cpu, abuf, "Ri", 'x', opval); | |
4480 | } | |
4481 | ||
4482 | #undef FLD | |
4483 | } | |
4484 | NEXT (vpc); | |
4485 | ||
4486 | CASE (sem, INSN_STRES) : /* stres $u4,@$Ri+ */ | |
4487 | { | |
4488 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4489 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4490 | #define FLD(f) abuf->fields.sfmt_add2.f |
c906108c SS |
4491 | int UNUSED written = 0; |
4492 | IADDR UNUSED pc = abuf->addr; | |
4493 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4494 | ||
4495 | { | |
4496 | SI opval = ADDSI (* FLD (i_Ri), 4); | |
4497 | * FLD (i_Ri) = opval; | |
4498 | TRACE_RESULT (current_cpu, abuf, "Ri", 'x', opval); | |
4499 | } | |
4500 | ||
4501 | #undef FLD | |
4502 | } | |
4503 | NEXT (vpc); | |
4504 | ||
4505 | CASE (sem, INSN_COPOP) : /* copop $u4c,$ccc,$CRj,$CRi */ | |
4506 | { | |
4507 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4508 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4509 | #define FLD(f) abuf->fields.fmt_empty.f |
c906108c SS |
4510 | int UNUSED written = 0; |
4511 | IADDR UNUSED pc = abuf->addr; | |
4512 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
4513 | ||
2acceee2 | 4514 | ((void) 0); /*nop*/ |
c906108c SS |
4515 | |
4516 | #undef FLD | |
4517 | } | |
4518 | NEXT (vpc); | |
4519 | ||
4520 | CASE (sem, INSN_COPLD) : /* copld $u4c,$ccc,$Rjc,$CRi */ | |
4521 | { | |
4522 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4523 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4524 | #define FLD(f) abuf->fields.fmt_empty.f |
c906108c SS |
4525 | int UNUSED written = 0; |
4526 | IADDR UNUSED pc = abuf->addr; | |
4527 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
4528 | ||
2acceee2 | 4529 | ((void) 0); /*nop*/ |
c906108c SS |
4530 | |
4531 | #undef FLD | |
4532 | } | |
4533 | NEXT (vpc); | |
4534 | ||
4535 | CASE (sem, INSN_COPST) : /* copst $u4c,$ccc,$CRj,$Ric */ | |
4536 | { | |
4537 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4538 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4539 | #define FLD(f) abuf->fields.fmt_empty.f |
c906108c SS |
4540 | int UNUSED written = 0; |
4541 | IADDR UNUSED pc = abuf->addr; | |
4542 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
4543 | ||
2acceee2 | 4544 | ((void) 0); /*nop*/ |
c906108c SS |
4545 | |
4546 | #undef FLD | |
4547 | } | |
4548 | NEXT (vpc); | |
4549 | ||
4550 | CASE (sem, INSN_COPSV) : /* copsv $u4c,$ccc,$CRj,$Ric */ | |
4551 | { | |
4552 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4553 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4554 | #define FLD(f) abuf->fields.fmt_empty.f |
c906108c SS |
4555 | int UNUSED written = 0; |
4556 | IADDR UNUSED pc = abuf->addr; | |
4557 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
4558 | ||
2acceee2 | 4559 | ((void) 0); /*nop*/ |
c906108c SS |
4560 | |
4561 | #undef FLD | |
4562 | } | |
4563 | NEXT (vpc); | |
4564 | ||
4565 | CASE (sem, INSN_NOP) : /* nop */ | |
4566 | { | |
4567 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4568 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4569 | #define FLD(f) abuf->fields.fmt_empty.f |
c906108c SS |
4570 | int UNUSED written = 0; |
4571 | IADDR UNUSED pc = abuf->addr; | |
4572 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4573 | ||
2acceee2 | 4574 | ((void) 0); /*nop*/ |
c906108c SS |
4575 | |
4576 | #undef FLD | |
4577 | } | |
4578 | NEXT (vpc); | |
4579 | ||
4580 | CASE (sem, INSN_ANDCCR) : /* andccr $u8 */ | |
4581 | { | |
4582 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4583 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4584 | #define FLD(f) abuf->fields.sfmt_int.f |
c906108c SS |
4585 | int UNUSED written = 0; |
4586 | IADDR UNUSED pc = abuf->addr; | |
4587 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4588 | ||
4589 | { | |
4590 | UQI opval = ANDQI (GET_H_CCR (), FLD (f_u8)); | |
4591 | SET_H_CCR (opval); | |
4592 | TRACE_RESULT (current_cpu, abuf, "ccr", 'x', opval); | |
4593 | } | |
4594 | ||
4595 | #undef FLD | |
4596 | } | |
4597 | NEXT (vpc); | |
4598 | ||
4599 | CASE (sem, INSN_ORCCR) : /* orccr $u8 */ | |
4600 | { | |
4601 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4602 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4603 | #define FLD(f) abuf->fields.sfmt_int.f |
c906108c SS |
4604 | int UNUSED written = 0; |
4605 | IADDR UNUSED pc = abuf->addr; | |
4606 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4607 | ||
4608 | { | |
4609 | UQI opval = ORQI (GET_H_CCR (), FLD (f_u8)); | |
4610 | SET_H_CCR (opval); | |
4611 | TRACE_RESULT (current_cpu, abuf, "ccr", 'x', opval); | |
4612 | } | |
4613 | ||
4614 | #undef FLD | |
4615 | } | |
4616 | NEXT (vpc); | |
4617 | ||
4618 | CASE (sem, INSN_STILM) : /* stilm $u8 */ | |
4619 | { | |
4620 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4621 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4622 | #define FLD(f) abuf->fields.sfmt_int.f |
c906108c SS |
4623 | int UNUSED written = 0; |
4624 | IADDR UNUSED pc = abuf->addr; | |
4625 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4626 | ||
4627 | { | |
4628 | UQI opval = ANDSI (FLD (f_u8), 31); | |
4629 | SET_H_ILM (opval); | |
4630 | TRACE_RESULT (current_cpu, abuf, "ilm", 'x', opval); | |
4631 | } | |
4632 | ||
4633 | #undef FLD | |
4634 | } | |
4635 | NEXT (vpc); | |
4636 | ||
4637 | CASE (sem, INSN_ADDSP) : /* addsp $s10 */ | |
4638 | { | |
4639 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4640 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4641 | #define FLD(f) abuf->fields.sfmt_addsp.f |
c906108c SS |
4642 | int UNUSED written = 0; |
4643 | IADDR UNUSED pc = abuf->addr; | |
4644 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4645 | ||
4646 | { | |
4647 | SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), FLD (f_s10)); | |
4648 | CPU (h_gr[((UINT) 15)]) = opval; | |
4649 | TRACE_RESULT (current_cpu, abuf, "gr-15", 'x', opval); | |
4650 | } | |
4651 | ||
4652 | #undef FLD | |
4653 | } | |
4654 | NEXT (vpc); | |
4655 | ||
4656 | CASE (sem, INSN_EXTSB) : /* extsb $Ri */ | |
4657 | { | |
4658 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4659 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4660 | #define FLD(f) abuf->fields.sfmt_add2.f |
c906108c SS |
4661 | int UNUSED written = 0; |
4662 | IADDR UNUSED pc = abuf->addr; | |
4663 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4664 | ||
4665 | { | |
4666 | SI opval = EXTQISI (ANDQI (* FLD (i_Ri), 255)); | |
4667 | * FLD (i_Ri) = opval; | |
4668 | TRACE_RESULT (current_cpu, abuf, "Ri", 'x', opval); | |
4669 | } | |
4670 | ||
4671 | #undef FLD | |
4672 | } | |
4673 | NEXT (vpc); | |
4674 | ||
4675 | CASE (sem, INSN_EXTUB) : /* extub $Ri */ | |
4676 | { | |
4677 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4678 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4679 | #define FLD(f) abuf->fields.sfmt_add2.f |
c906108c SS |
4680 | int UNUSED written = 0; |
4681 | IADDR UNUSED pc = abuf->addr; | |
4682 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4683 | ||
4684 | { | |
4685 | SI opval = ZEXTQISI (ANDQI (* FLD (i_Ri), 255)); | |
4686 | * FLD (i_Ri) = opval; | |
4687 | TRACE_RESULT (current_cpu, abuf, "Ri", 'x', opval); | |
4688 | } | |
4689 | ||
4690 | #undef FLD | |
4691 | } | |
4692 | NEXT (vpc); | |
4693 | ||
4694 | CASE (sem, INSN_EXTSH) : /* extsh $Ri */ | |
4695 | { | |
4696 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4697 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4698 | #define FLD(f) abuf->fields.sfmt_add2.f |
c906108c SS |
4699 | int UNUSED written = 0; |
4700 | IADDR UNUSED pc = abuf->addr; | |
4701 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4702 | ||
4703 | { | |
4704 | SI opval = EXTHISI (ANDHI (* FLD (i_Ri), 65535)); | |
4705 | * FLD (i_Ri) = opval; | |
4706 | TRACE_RESULT (current_cpu, abuf, "Ri", 'x', opval); | |
4707 | } | |
4708 | ||
4709 | #undef FLD | |
4710 | } | |
4711 | NEXT (vpc); | |
4712 | ||
4713 | CASE (sem, INSN_EXTUH) : /* extuh $Ri */ | |
4714 | { | |
4715 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4716 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4717 | #define FLD(f) abuf->fields.sfmt_add2.f |
c906108c SS |
4718 | int UNUSED written = 0; |
4719 | IADDR UNUSED pc = abuf->addr; | |
4720 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4721 | ||
4722 | { | |
4723 | SI opval = ZEXTHISI (ANDHI (* FLD (i_Ri), 65535)); | |
4724 | * FLD (i_Ri) = opval; | |
4725 | TRACE_RESULT (current_cpu, abuf, "Ri", 'x', opval); | |
4726 | } | |
4727 | ||
4728 | #undef FLD | |
4729 | } | |
4730 | NEXT (vpc); | |
4731 | ||
4732 | CASE (sem, INSN_LDM0) : /* ldm0 ($reglist_low_ld) */ | |
4733 | { | |
4734 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4735 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4736 | #define FLD(f) abuf->fields.sfmt_ldm0.f |
c906108c SS |
4737 | int UNUSED written = 0; |
4738 | IADDR UNUSED pc = abuf->addr; | |
4739 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4740 | ||
7a292a7a | 4741 | { |
c906108c | 4742 | if (ANDSI (FLD (f_reglist_low_ld), 1)) { |
7a292a7a | 4743 | { |
c906108c SS |
4744 | { |
4745 | SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); | |
4746 | CPU (h_gr[((UINT) 0)]) = opval; | |
4747 | written |= (1 << 3); | |
4748 | TRACE_RESULT (current_cpu, abuf, "gr-0", 'x', opval); | |
4749 | } | |
4750 | { | |
4751 | SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); | |
4752 | CPU (h_gr[((UINT) 15)]) = opval; | |
4753 | written |= (1 << 5); | |
4754 | TRACE_RESULT (current_cpu, abuf, "gr-15", 'x', opval); | |
4755 | } | |
7a292a7a | 4756 | } |
c906108c SS |
4757 | } |
4758 | if (ANDSI (FLD (f_reglist_low_ld), 2)) { | |
7a292a7a | 4759 | { |
c906108c SS |
4760 | { |
4761 | SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); | |
4762 | CPU (h_gr[((UINT) 1)]) = opval; | |
4763 | written |= (1 << 4); | |
4764 | TRACE_RESULT (current_cpu, abuf, "gr-1", 'x', opval); | |
4765 | } | |
4766 | { | |
4767 | SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); | |
4768 | CPU (h_gr[((UINT) 15)]) = opval; | |
4769 | written |= (1 << 5); | |
4770 | TRACE_RESULT (current_cpu, abuf, "gr-15", 'x', opval); | |
4771 | } | |
7a292a7a | 4772 | } |
c906108c SS |
4773 | } |
4774 | if (ANDSI (FLD (f_reglist_low_ld), 4)) { | |
7a292a7a | 4775 | { |
c906108c SS |
4776 | { |
4777 | SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); | |
4778 | CPU (h_gr[((UINT) 2)]) = opval; | |
4779 | written |= (1 << 6); | |
4780 | TRACE_RESULT (current_cpu, abuf, "gr-2", 'x', opval); | |
4781 | } | |
4782 | { | |
4783 | SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); | |
4784 | CPU (h_gr[((UINT) 15)]) = opval; | |
4785 | written |= (1 << 5); | |
4786 | TRACE_RESULT (current_cpu, abuf, "gr-15", 'x', opval); | |
4787 | } | |
7a292a7a | 4788 | } |
c906108c SS |
4789 | } |
4790 | if (ANDSI (FLD (f_reglist_low_ld), 8)) { | |
7a292a7a | 4791 | { |
c906108c SS |
4792 | { |
4793 | SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); | |
4794 | CPU (h_gr[((UINT) 3)]) = opval; | |
4795 | written |= (1 << 7); | |
4796 | TRACE_RESULT (current_cpu, abuf, "gr-3", 'x', opval); | |
4797 | } | |
4798 | { | |
4799 | SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); | |
4800 | CPU (h_gr[((UINT) 15)]) = opval; | |
4801 | written |= (1 << 5); | |
4802 | TRACE_RESULT (current_cpu, abuf, "gr-15", 'x', opval); | |
4803 | } | |
7a292a7a | 4804 | } |
c906108c SS |
4805 | } |
4806 | if (ANDSI (FLD (f_reglist_low_ld), 16)) { | |
7a292a7a | 4807 | { |
c906108c SS |
4808 | { |
4809 | SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); | |
4810 | CPU (h_gr[((UINT) 4)]) = opval; | |
4811 | written |= (1 << 8); | |
4812 | TRACE_RESULT (current_cpu, abuf, "gr-4", 'x', opval); | |
4813 | } | |
4814 | { | |
4815 | SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); | |
4816 | CPU (h_gr[((UINT) 15)]) = opval; | |
4817 | written |= (1 << 5); | |
4818 | TRACE_RESULT (current_cpu, abuf, "gr-15", 'x', opval); | |
4819 | } | |
7a292a7a | 4820 | } |
c906108c SS |
4821 | } |
4822 | if (ANDSI (FLD (f_reglist_low_ld), 32)) { | |
7a292a7a | 4823 | { |
c906108c SS |
4824 | { |
4825 | SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); | |
4826 | CPU (h_gr[((UINT) 5)]) = opval; | |
4827 | written |= (1 << 9); | |
4828 | TRACE_RESULT (current_cpu, abuf, "gr-5", 'x', opval); | |
4829 | } | |
4830 | { | |
4831 | SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); | |
4832 | CPU (h_gr[((UINT) 15)]) = opval; | |
4833 | written |= (1 << 5); | |
4834 | TRACE_RESULT (current_cpu, abuf, "gr-15", 'x', opval); | |
4835 | } | |
7a292a7a | 4836 | } |
c906108c SS |
4837 | } |
4838 | if (ANDSI (FLD (f_reglist_low_ld), 64)) { | |
7a292a7a | 4839 | { |
c906108c SS |
4840 | { |
4841 | SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); | |
4842 | CPU (h_gr[((UINT) 6)]) = opval; | |
4843 | written |= (1 << 10); | |
4844 | TRACE_RESULT (current_cpu, abuf, "gr-6", 'x', opval); | |
4845 | } | |
4846 | { | |
4847 | SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); | |
4848 | CPU (h_gr[((UINT) 15)]) = opval; | |
4849 | written |= (1 << 5); | |
4850 | TRACE_RESULT (current_cpu, abuf, "gr-15", 'x', opval); | |
4851 | } | |
7a292a7a | 4852 | } |
c906108c SS |
4853 | } |
4854 | if (ANDSI (FLD (f_reglist_low_ld), 128)) { | |
7a292a7a | 4855 | { |
c906108c SS |
4856 | { |
4857 | SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); | |
4858 | CPU (h_gr[((UINT) 7)]) = opval; | |
4859 | written |= (1 << 11); | |
4860 | TRACE_RESULT (current_cpu, abuf, "gr-7", 'x', opval); | |
4861 | } | |
4862 | { | |
4863 | SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); | |
4864 | CPU (h_gr[((UINT) 15)]) = opval; | |
4865 | written |= (1 << 5); | |
4866 | TRACE_RESULT (current_cpu, abuf, "gr-15", 'x', opval); | |
4867 | } | |
c906108c | 4868 | } |
7a292a7a SS |
4869 | } |
4870 | } | |
c906108c SS |
4871 | |
4872 | abuf->written = written; | |
4873 | #undef FLD | |
4874 | } | |
4875 | NEXT (vpc); | |
4876 | ||
4877 | CASE (sem, INSN_LDM1) : /* ldm1 ($reglist_hi_ld) */ | |
4878 | { | |
4879 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4880 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4881 | #define FLD(f) abuf->fields.sfmt_ldm1.f |
c906108c SS |
4882 | int UNUSED written = 0; |
4883 | IADDR UNUSED pc = abuf->addr; | |
4884 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
4885 | ||
7a292a7a | 4886 | { |
c906108c | 4887 | if (ANDSI (FLD (f_reglist_hi_ld), 1)) { |
7a292a7a | 4888 | { |
c906108c SS |
4889 | { |
4890 | SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); | |
4891 | CPU (h_gr[((UINT) 8)]) = opval; | |
4892 | written |= (1 << 9); | |
4893 | TRACE_RESULT (current_cpu, abuf, "gr-8", 'x', opval); | |
4894 | } | |
4895 | { | |
4896 | SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); | |
4897 | CPU (h_gr[((UINT) 15)]) = opval; | |
4898 | written |= (1 << 8); | |
4899 | TRACE_RESULT (current_cpu, abuf, "gr-15", 'x', opval); | |
4900 | } | |
7a292a7a | 4901 | } |
c906108c SS |
4902 | } |
4903 | if (ANDSI (FLD (f_reglist_hi_ld), 2)) { | |
7a292a7a | 4904 | { |
c906108c SS |
4905 | { |
4906 | SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); | |
4907 | CPU (h_gr[((UINT) 9)]) = opval; | |
4908 | written |= (1 << 10); | |
4909 | TRACE_RESULT (current_cpu, abuf, "gr-9", 'x', opval); | |
4910 | } | |
4911 | { | |
4912 | SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); | |
4913 | CPU (h_gr[((UINT) 15)]) = opval; | |
4914 | written |= (1 << 8); | |
4915 | TRACE_RESULT (current_cpu, abuf, "gr-15", 'x', opval); | |
4916 | } | |
7a292a7a | 4917 | } |
c906108c SS |
4918 | } |
4919 | if (ANDSI (FLD (f_reglist_hi_ld), 4)) { | |
7a292a7a | 4920 | { |
c906108c SS |
4921 | { |
4922 | SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); | |
4923 | CPU (h_gr[((UINT) 10)]) = opval; | |
4924 | written |= (1 << 3); | |
4925 | TRACE_RESULT (current_cpu, abuf, "gr-10", 'x', opval); | |
4926 | } | |
4927 | { | |
4928 | SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); | |
4929 | CPU (h_gr[((UINT) 15)]) = opval; | |
4930 | written |= (1 << 8); | |
4931 | TRACE_RESULT (current_cpu, abuf, "gr-15", 'x', opval); | |
4932 | } | |
7a292a7a | 4933 | } |
c906108c SS |
4934 | } |
4935 | if (ANDSI (FLD (f_reglist_hi_ld), 8)) { | |
7a292a7a | 4936 | { |
c906108c SS |
4937 | { |
4938 | SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); | |
4939 | CPU (h_gr[((UINT) 11)]) = opval; | |
4940 | written |= (1 << 4); | |
4941 | TRACE_RESULT (current_cpu, abuf, "gr-11", 'x', opval); | |
4942 | } | |
4943 | { | |
4944 | SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); | |
4945 | CPU (h_gr[((UINT) 15)]) = opval; | |
4946 | written |= (1 << 8); | |
4947 | TRACE_RESULT (current_cpu, abuf, "gr-15", 'x', opval); | |
4948 | } | |
7a292a7a | 4949 | } |
c906108c SS |
4950 | } |
4951 | if (ANDSI (FLD (f_reglist_hi_ld), 16)) { | |
7a292a7a | 4952 | { |
c906108c SS |
4953 | { |
4954 | SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); | |
4955 | CPU (h_gr[((UINT) 12)]) = opval; | |
4956 | written |= (1 << 5); | |
4957 | TRACE_RESULT (current_cpu, abuf, "gr-12", 'x', opval); | |
4958 | } | |
4959 | { | |
4960 | SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); | |
4961 | CPU (h_gr[((UINT) 15)]) = opval; | |
4962 | written |= (1 << 8); | |
4963 | TRACE_RESULT (current_cpu, abuf, "gr-15", 'x', opval); | |
4964 | } | |
7a292a7a | 4965 | } |
c906108c SS |
4966 | } |
4967 | if (ANDSI (FLD (f_reglist_hi_ld), 32)) { | |
7a292a7a | 4968 | { |
c906108c SS |
4969 | { |
4970 | SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); | |
4971 | CPU (h_gr[((UINT) 13)]) = opval; | |
4972 | written |= (1 << 6); | |
4973 | TRACE_RESULT (current_cpu, abuf, "gr-13", 'x', opval); | |
4974 | } | |
4975 | { | |
4976 | SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); | |
4977 | CPU (h_gr[((UINT) 15)]) = opval; | |
4978 | written |= (1 << 8); | |
4979 | TRACE_RESULT (current_cpu, abuf, "gr-15", 'x', opval); | |
4980 | } | |
7a292a7a | 4981 | } |
c906108c SS |
4982 | } |
4983 | if (ANDSI (FLD (f_reglist_hi_ld), 64)) { | |
7a292a7a | 4984 | { |
c906108c SS |
4985 | { |
4986 | SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); | |
4987 | CPU (h_gr[((UINT) 14)]) = opval; | |
4988 | written |= (1 << 7); | |
4989 | TRACE_RESULT (current_cpu, abuf, "gr-14", 'x', opval); | |
4990 | } | |
4991 | { | |
4992 | SI opval = ADDSI (CPU (h_gr[((UINT) 15)]), 4); | |
4993 | CPU (h_gr[((UINT) 15)]) = opval; | |
4994 | written |= (1 << 8); | |
4995 | TRACE_RESULT (current_cpu, abuf, "gr-15", 'x', opval); | |
4996 | } | |
7a292a7a | 4997 | } |
c906108c SS |
4998 | } |
4999 | if (ANDSI (FLD (f_reglist_hi_ld), 128)) { | |
5000 | { | |
5001 | SI opval = GETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)])); | |
5002 | CPU (h_gr[((UINT) 15)]) = opval; | |
5003 | written |= (1 << 8); | |
5004 | TRACE_RESULT (current_cpu, abuf, "gr-15", 'x', opval); | |
5005 | } | |
5006 | } | |
7a292a7a | 5007 | } |
c906108c SS |
5008 | |
5009 | abuf->written = written; | |
5010 | #undef FLD | |
5011 | } | |
5012 | NEXT (vpc); | |
5013 | ||
5014 | CASE (sem, INSN_STM0) : /* stm0 ($reglist_low_st) */ | |
5015 | { | |
5016 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5017 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 5018 | #define FLD(f) abuf->fields.sfmt_stm0.f |
c906108c SS |
5019 | int UNUSED written = 0; |
5020 | IADDR UNUSED pc = abuf->addr; | |
5021 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
5022 | ||
7a292a7a | 5023 | { |
c906108c | 5024 | if (ANDSI (FLD (f_reglist_low_st), 1)) { |
7a292a7a | 5025 | { |
c906108c SS |
5026 | { |
5027 | SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); | |
5028 | CPU (h_gr[((UINT) 15)]) = opval; | |
5029 | written |= (1 << 10); | |
5030 | TRACE_RESULT (current_cpu, abuf, "gr-15", 'x', opval); | |
5031 | } | |
5032 | { | |
5033 | SI opval = CPU (h_gr[((UINT) 7)]); | |
5034 | SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); | |
5035 | written |= (1 << 11); | |
5036 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5037 | } | |
7a292a7a | 5038 | } |
c906108c SS |
5039 | } |
5040 | if (ANDSI (FLD (f_reglist_low_st), 2)) { | |
7a292a7a | 5041 | { |
c906108c SS |
5042 | { |
5043 | SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); | |
5044 | CPU (h_gr[((UINT) 15)]) = opval; | |
5045 | written |= (1 << 10); | |
5046 | TRACE_RESULT (current_cpu, abuf, "gr-15", 'x', opval); | |
5047 | } | |
5048 | { | |
5049 | SI opval = CPU (h_gr[((UINT) 6)]); | |
5050 | SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); | |
5051 | written |= (1 << 11); | |
5052 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5053 | } | |
7a292a7a | 5054 | } |
c906108c SS |
5055 | } |
5056 | if (ANDSI (FLD (f_reglist_low_st), 4)) { | |
7a292a7a | 5057 | { |
c906108c SS |
5058 | { |
5059 | SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); | |
5060 | CPU (h_gr[((UINT) 15)]) = opval; | |
5061 | written |= (1 << 10); | |
5062 | TRACE_RESULT (current_cpu, abuf, "gr-15", 'x', opval); | |
5063 | } | |
5064 | { | |
5065 | SI opval = CPU (h_gr[((UINT) 5)]); | |
5066 | SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); | |
5067 | written |= (1 << 11); | |
5068 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5069 | } | |
7a292a7a | 5070 | } |
c906108c SS |
5071 | } |
5072 | if (ANDSI (FLD (f_reglist_low_st), 8)) { | |
7a292a7a | 5073 | { |
c906108c SS |
5074 | { |
5075 | SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); | |
5076 | CPU (h_gr[((UINT) 15)]) = opval; | |
5077 | written |= (1 << 10); | |
5078 | TRACE_RESULT (current_cpu, abuf, "gr-15", 'x', opval); | |
5079 | } | |
5080 | { | |
5081 | SI opval = CPU (h_gr[((UINT) 4)]); | |
5082 | SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); | |
5083 | written |= (1 << 11); | |
5084 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5085 | } | |
7a292a7a | 5086 | } |
c906108c SS |
5087 | } |
5088 | if (ANDSI (FLD (f_reglist_low_st), 16)) { | |
7a292a7a | 5089 | { |
c906108c SS |
5090 | { |
5091 | SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); | |
5092 | CPU (h_gr[((UINT) 15)]) = opval; | |
5093 | written |= (1 << 10); | |
5094 | TRACE_RESULT (current_cpu, abuf, "gr-15", 'x', opval); | |
5095 | } | |
5096 | { | |
5097 | SI opval = CPU (h_gr[((UINT) 3)]); | |
5098 | SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); | |
5099 | written |= (1 << 11); | |
5100 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5101 | } | |
7a292a7a | 5102 | } |
c906108c SS |
5103 | } |
5104 | if (ANDSI (FLD (f_reglist_low_st), 32)) { | |
7a292a7a | 5105 | { |
c906108c SS |
5106 | { |
5107 | SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); | |
5108 | CPU (h_gr[((UINT) 15)]) = opval; | |
5109 | written |= (1 << 10); | |
5110 | TRACE_RESULT (current_cpu, abuf, "gr-15", 'x', opval); | |
5111 | } | |
5112 | { | |
5113 | SI opval = CPU (h_gr[((UINT) 2)]); | |
5114 | SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); | |
5115 | written |= (1 << 11); | |
5116 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5117 | } | |
7a292a7a | 5118 | } |
c906108c SS |
5119 | } |
5120 | if (ANDSI (FLD (f_reglist_low_st), 64)) { | |
7a292a7a | 5121 | { |
c906108c SS |
5122 | { |
5123 | SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); | |
5124 | CPU (h_gr[((UINT) 15)]) = opval; | |
5125 | written |= (1 << 10); | |
5126 | TRACE_RESULT (current_cpu, abuf, "gr-15", 'x', opval); | |
5127 | } | |
5128 | { | |
5129 | SI opval = CPU (h_gr[((UINT) 1)]); | |
5130 | SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); | |
5131 | written |= (1 << 11); | |
5132 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5133 | } | |
7a292a7a | 5134 | } |
c906108c SS |
5135 | } |
5136 | if (ANDSI (FLD (f_reglist_low_st), 128)) { | |
7a292a7a | 5137 | { |
c906108c SS |
5138 | { |
5139 | SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); | |
5140 | CPU (h_gr[((UINT) 15)]) = opval; | |
5141 | written |= (1 << 10); | |
5142 | TRACE_RESULT (current_cpu, abuf, "gr-15", 'x', opval); | |
5143 | } | |
5144 | { | |
5145 | SI opval = CPU (h_gr[((UINT) 0)]); | |
5146 | SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); | |
5147 | written |= (1 << 11); | |
5148 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5149 | } | |
c906108c | 5150 | } |
7a292a7a SS |
5151 | } |
5152 | } | |
c906108c SS |
5153 | |
5154 | abuf->written = written; | |
5155 | #undef FLD | |
5156 | } | |
5157 | NEXT (vpc); | |
5158 | ||
5159 | CASE (sem, INSN_STM1) : /* stm1 ($reglist_hi_st) */ | |
5160 | { | |
5161 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5162 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 5163 | #define FLD(f) abuf->fields.sfmt_stm1.f |
c906108c SS |
5164 | int UNUSED written = 0; |
5165 | IADDR UNUSED pc = abuf->addr; | |
5166 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
5167 | ||
7a292a7a | 5168 | { |
c906108c | 5169 | if (ANDSI (FLD (f_reglist_hi_st), 1)) { |
7a292a7a | 5170 | { |
c906108c SS |
5171 | SI tmp_save_r15; |
5172 | tmp_save_r15 = CPU (h_gr[((UINT) 15)]); | |
5173 | { | |
5174 | SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); | |
5175 | CPU (h_gr[((UINT) 15)]) = opval; | |
5176 | written |= (1 << 9); | |
5177 | TRACE_RESULT (current_cpu, abuf, "gr-15", 'x', opval); | |
5178 | } | |
5179 | { | |
5180 | SI opval = tmp_save_r15; | |
5181 | SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); | |
5182 | written |= (1 << 10); | |
5183 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5184 | } | |
7a292a7a | 5185 | } |
c906108c SS |
5186 | } |
5187 | if (ANDSI (FLD (f_reglist_hi_st), 2)) { | |
7a292a7a | 5188 | { |
c906108c SS |
5189 | { |
5190 | SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); | |
5191 | CPU (h_gr[((UINT) 15)]) = opval; | |
5192 | written |= (1 << 9); | |
5193 | TRACE_RESULT (current_cpu, abuf, "gr-15", 'x', opval); | |
5194 | } | |
5195 | { | |
5196 | SI opval = CPU (h_gr[((UINT) 14)]); | |
5197 | SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); | |
5198 | written |= (1 << 10); | |
5199 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5200 | } | |
7a292a7a | 5201 | } |
c906108c SS |
5202 | } |
5203 | if (ANDSI (FLD (f_reglist_hi_st), 4)) { | |
7a292a7a | 5204 | { |
c906108c SS |
5205 | { |
5206 | SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); | |
5207 | CPU (h_gr[((UINT) 15)]) = opval; | |
5208 | written |= (1 << 9); | |
5209 | TRACE_RESULT (current_cpu, abuf, "gr-15", 'x', opval); | |
5210 | } | |
5211 | { | |
5212 | SI opval = CPU (h_gr[((UINT) 13)]); | |
5213 | SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); | |
5214 | written |= (1 << 10); | |
5215 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5216 | } | |
7a292a7a | 5217 | } |
c906108c SS |
5218 | } |
5219 | if (ANDSI (FLD (f_reglist_hi_st), 8)) { | |
7a292a7a | 5220 | { |
c906108c SS |
5221 | { |
5222 | SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); | |
5223 | CPU (h_gr[((UINT) 15)]) = opval; | |
5224 | written |= (1 << 9); | |
5225 | TRACE_RESULT (current_cpu, abuf, "gr-15", 'x', opval); | |
5226 | } | |
5227 | { | |
5228 | SI opval = CPU (h_gr[((UINT) 12)]); | |
5229 | SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); | |
5230 | written |= (1 << 10); | |
5231 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5232 | } | |
7a292a7a | 5233 | } |
c906108c SS |
5234 | } |
5235 | if (ANDSI (FLD (f_reglist_hi_st), 16)) { | |
7a292a7a | 5236 | { |
c906108c SS |
5237 | { |
5238 | SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); | |
5239 | CPU (h_gr[((UINT) 15)]) = opval; | |
5240 | written |= (1 << 9); | |
5241 | TRACE_RESULT (current_cpu, abuf, "gr-15", 'x', opval); | |
5242 | } | |
5243 | { | |
5244 | SI opval = CPU (h_gr[((UINT) 11)]); | |
5245 | SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); | |
5246 | written |= (1 << 10); | |
5247 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5248 | } | |
7a292a7a | 5249 | } |
c906108c SS |
5250 | } |
5251 | if (ANDSI (FLD (f_reglist_hi_st), 32)) { | |
7a292a7a | 5252 | { |
c906108c SS |
5253 | { |
5254 | SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); | |
5255 | CPU (h_gr[((UINT) 15)]) = opval; | |
5256 | written |= (1 << 9); | |
5257 | TRACE_RESULT (current_cpu, abuf, "gr-15", 'x', opval); | |
5258 | } | |
5259 | { | |
5260 | SI opval = CPU (h_gr[((UINT) 10)]); | |
5261 | SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); | |
5262 | written |= (1 << 10); | |
5263 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5264 | } | |
7a292a7a | 5265 | } |
c906108c SS |
5266 | } |
5267 | if (ANDSI (FLD (f_reglist_hi_st), 64)) { | |
7a292a7a | 5268 | { |
c906108c SS |
5269 | { |
5270 | SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); | |
5271 | CPU (h_gr[((UINT) 15)]) = opval; | |
5272 | written |= (1 << 9); | |
5273 | TRACE_RESULT (current_cpu, abuf, "gr-15", 'x', opval); | |
5274 | } | |
5275 | { | |
5276 | SI opval = CPU (h_gr[((UINT) 9)]); | |
5277 | SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); | |
5278 | written |= (1 << 10); | |
5279 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5280 | } | |
7a292a7a | 5281 | } |
c906108c SS |
5282 | } |
5283 | if (ANDSI (FLD (f_reglist_hi_st), 128)) { | |
7a292a7a | 5284 | { |
c906108c SS |
5285 | { |
5286 | SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), 4); | |
5287 | CPU (h_gr[((UINT) 15)]) = opval; | |
5288 | written |= (1 << 9); | |
5289 | TRACE_RESULT (current_cpu, abuf, "gr-15", 'x', opval); | |
5290 | } | |
5291 | { | |
5292 | SI opval = CPU (h_gr[((UINT) 8)]); | |
5293 | SETMEMSI (current_cpu, pc, CPU (h_gr[((UINT) 15)]), opval); | |
5294 | written |= (1 << 10); | |
5295 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5296 | } | |
c906108c | 5297 | } |
7a292a7a SS |
5298 | } |
5299 | } | |
c906108c SS |
5300 | |
5301 | abuf->written = written; | |
5302 | #undef FLD | |
5303 | } | |
5304 | NEXT (vpc); | |
5305 | ||
5306 | CASE (sem, INSN_ENTER) : /* enter $u10 */ | |
5307 | { | |
5308 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5309 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 5310 | #define FLD(f) abuf->fields.sfmt_enter.f |
c906108c SS |
5311 | int UNUSED written = 0; |
5312 | IADDR UNUSED pc = abuf->addr; | |
5313 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
5314 | ||
7a292a7a | 5315 | { |
c906108c SS |
5316 | SI tmp_tmp; |
5317 | tmp_tmp = SUBSI (CPU (h_gr[((UINT) 15)]), 4); | |
5318 | { | |
5319 | SI opval = CPU (h_gr[((UINT) 14)]); | |
5320 | SETMEMSI (current_cpu, pc, tmp_tmp, opval); | |
5321 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5322 | } | |
5323 | { | |
5324 | SI opval = tmp_tmp; | |
5325 | CPU (h_gr[((UINT) 14)]) = opval; | |
5326 | TRACE_RESULT (current_cpu, abuf, "gr-14", 'x', opval); | |
5327 | } | |
5328 | { | |
5329 | SI opval = SUBSI (CPU (h_gr[((UINT) 15)]), FLD (f_u10)); | |
5330 | CPU (h_gr[((UINT) 15)]) = opval; | |
5331 | TRACE_RESULT (current_cpu, abuf, "gr-15", 'x', opval); | |
5332 | } | |
7a292a7a | 5333 | } |
c906108c SS |
5334 | |
5335 | #undef FLD | |
5336 | } | |
5337 | NEXT (vpc); | |
5338 | ||
5339 | CASE (sem, INSN_LEAVE) : /* leave */ | |
5340 | { | |
5341 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5342 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 5343 | #define FLD(f) abuf->fields.sfmt_enter.f |
c906108c SS |
5344 | int UNUSED written = 0; |
5345 | IADDR UNUSED pc = abuf->addr; | |
5346 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
5347 | ||
7a292a7a | 5348 | { |
c906108c SS |
5349 | { |
5350 | SI opval = ADDSI (CPU (h_gr[((UINT) 14)]), 4); | |
5351 | CPU (h_gr[((UINT) 15)]) = opval; | |
5352 | TRACE_RESULT (current_cpu, abuf, "gr-15", 'x', opval); | |
5353 | } | |
5354 | { | |
5355 | SI opval = GETMEMSI (current_cpu, pc, SUBSI (CPU (h_gr[((UINT) 15)]), 4)); | |
5356 | CPU (h_gr[((UINT) 14)]) = opval; | |
5357 | TRACE_RESULT (current_cpu, abuf, "gr-14", 'x', opval); | |
5358 | } | |
7a292a7a | 5359 | } |
c906108c SS |
5360 | |
5361 | #undef FLD | |
5362 | } | |
5363 | NEXT (vpc); | |
5364 | ||
5365 | CASE (sem, INSN_XCHB) : /* xchb @$Rj,$Ri */ | |
5366 | { | |
5367 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5368 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 5369 | #define FLD(f) abuf->fields.sfmt_add.f |
c906108c SS |
5370 | int UNUSED written = 0; |
5371 | IADDR UNUSED pc = abuf->addr; | |
5372 | vpc = SEM_NEXT_VPC (sem_arg, pc, 2); | |
5373 | ||
7a292a7a | 5374 | { |
c906108c SS |
5375 | SI tmp_tmp; |
5376 | tmp_tmp = * FLD (i_Ri); | |
5377 | { | |
5378 | SI opval = GETMEMUQI (current_cpu, pc, * FLD (i_Rj)); | |
5379 | * FLD (i_Ri) = opval; | |
5380 | TRACE_RESULT (current_cpu, abuf, "Ri", 'x', opval); | |
5381 | } | |
5382 | { | |
5383 | UQI opval = tmp_tmp; | |
5384 | SETMEMUQI (current_cpu, pc, * FLD (i_Rj), opval); | |
5385 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5386 | } | |
7a292a7a | 5387 | } |
c906108c SS |
5388 | |
5389 | #undef FLD | |
5390 | } | |
5391 | NEXT (vpc); | |
5392 | ||
5393 | ||
5394 | } | |
5395 | ENDSWITCH (sem) /* End of semantic switch. */ | |
5396 | ||
5397 | /* At this point `vpc' contains the next insn to execute. */ | |
5398 | } | |
5399 | ||
5400 | #undef DEFINE_SWITCH | |
5401 | #endif /* DEFINE_SWITCH */ |