[deliverable/binutils-gdb.git] / sim / frv / Makefile.in

# Makefile template for Configure for the frv simulator
# Copyright (C) 1998, 1999, 2000, 2001, 2003, 2007
# Free Software Foundation, Inc.
# Contributed by Red Hat.
#
# This program is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation; either version 2 of the License, or
# (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License along
# with this program; if not, write to the Free Software Foundation, Inc.,
# 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.

## COMMON_PRE_CONFIG_FRAG

FRV_OBJS = frv.o cpu.o decode.o sem.o model.o mloop.o cgen-par.o

CONFIG_DEVICES = dv-sockser.o
CONFIG_DEVICES =

SIM_OBJS = \
	$(SIM_NEW_COMMON_OBJS) \
	sim-cpu.o \
	sim-hload.o \
	sim-hrw.o \
	sim-model.o \
	sim-reg.o \
	cgen-utils.o cgen-trace.o cgen-scache.o cgen-fpu.o cgen-accfp.o \
	cgen-run.o sim-reason.o sim-engine.o sim-stop.o \
	sim-if.o arch.o \
	$(FRV_OBJS) \
	traps.o interrupts.o memory.o cache.o pipeline.o \
	profile.o profile-fr400.o profile-fr450.o profile-fr500.o profile-fr550.o options.o \
	devices.o reset.o registers.o \
	$(CONFIG_DEVICES)

# Extra headers included by sim-main.h.
SIM_EXTRA_DEPS = \
	$(CGEN_INCLUDE_DEPS) \
	arch.h cpuall.h frv-sim.h $(srcdir)/../../opcodes/frv-desc.h cache.h \
	registers.h profile.h \
	$(sim-options_h)

SIM_EXTRA_CFLAGS = @sim_trapdump@

SIM_RUN_OBJS = nrun.o
SIM_EXTRA_CLEAN = frv-clean

# This selects the frv newlib/libgloss syscall definitions.
NL_TARGET = -DNL_TARGET_frv

## COMMON_POST_CONFIG_FRAG

arch = frv

arch.o: arch.c $(SIM_MAIN_DEPS)

devices.o: devices.c $(SIM_MAIN_DEPS)

# FRV objs

FRVBF_INCLUDE_DEPS = \
	$(CGEN_MAIN_CPU_DEPS) \
	$(SIM_EXTRA_DEPS) \
	cpu.h decode.h eng.h

frv.o: frv.c $(FRVBF_INCLUDE_DEPS)
traps.o: traps.c $(FRVBF_INCLUDE_DEPS)
pipeline.o: pipeline.c $(FRVBF_INCLUDE_DEPS)
interrupts.o: interrupts.c $(FRVBF_INCLUDE_DEPS)
memory.o: memory.c $(FRVBF_INCLUDE_DEPS)
cache.o: cache.c $(FRVBF_INCLUDE_DEPS)
options.o: options.c $(FRVBF_INCLUDE_DEPS)
reset.o: reset.c $(FRVBF_INCLUDE_DEPS)
registers.o: registers.c $(FRVBF_INCLUDE_DEPS)
profile.o: profile.c profile-fr400.h profile-fr500.h profile-fr550.h $(FRVBF_INCLUDE_DEPS)
profile-fr400.o: profile-fr400.c profile-fr400.h $(FRVBF_INCLUDE_DEPS)
profile-fr450.o: profile-fr450.c $(FRVBF_INCLUDE_DEPS)
profile-fr500.o: profile-fr500.c profile-fr500.h $(FRVBF_INCLUDE_DEPS)
profile-fr550.o: profile-fr550.c profile-fr550.h $(FRVBF_INCLUDE_DEPS)
sim-if.o: sim-if.c $(FRVBF_INCLUDE_DEPS) $(srcdir)/../common/sim-core.h eng.h


# FIXME: Use of `mono' is wip.
mloop.c eng.h: stamp-mloop
stamp-mloop: $(srcdir)/../common/genmloop.sh mloop.in Makefile
	$(SHELL) $(srccom)/genmloop.sh \
		-mono -scache -parallel-generic-write -parallel-only \
		-cpu frvbf -infile $(srcdir)/mloop.in
	$(SHELL) $(srcroot)/move-if-change eng.hin eng.h
	$(SHELL) $(srcroot)/move-if-change mloop.cin mloop.c
	touch stamp-mloop
mloop.o: mloop.c $(FRVBF_INCLUDE_DEPS)

cpu.o: cpu.c $(FRVBF_INCLUDE_DEPS)
decode.o: decode.c $(FRVBF_INCLUDE_DEPS)
sem.o: sem.c $(FRVBF_INCLUDE_DEPS)
model.o: model.c $(FRVBF_INCLUDE_DEPS)

frv-clean:
	rm -f mloop.c eng.h stamp-mloop
	rm -f tmp-*
	rm -f stamp-arch stamp-cpu

# cgen support, enable with --enable-cgen-maint
CGEN_MAINT = ; @true
# The following line is commented in or out depending upon --enable-cgen-maint.
@CGEN_MAINT@CGEN_MAINT =

stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(srcdir)/../../cpu/frv.cpu
	$(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) mach=all \
	  archfile=$(srcdir)/../../cpu/frv.cpu \
	  FLAGS="with-scache"
	touch stamp-arch
arch.h arch.c cpuall.h: $(CGEN_MAINT) stamp-arch
#	@true

stamp-cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(srcdir)/../../cpu/frv.cpu
	$(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
	  cpu=frvbf mach=frv,fr550,fr500,fr450,fr400,tomcat,simple SUFFIX= \
	  archfile=$(srcdir)/../../cpu/frv.cpu \
	  FLAGS="with-scache with-profile=fn with-generic-write with-parallel-only" \
	  EXTRAFILES="$(CGEN_CPU_SEM)"
	touch stamp-cpu
cpu.h sem.c model.c decode.c decode.h: $(CGEN_MAINT) stamp-cpu
#	@true
Commit	Line	Data
b34f6357	1	# Makefile template for Configure for the frv simulator
6aba47ca DJ	2	# Copyright (C) 1998, 1999, 2000, 2001, 2003, 2007
6aba47ca DJ	3	# Free Software Foundation, Inc.
b34f6357 DB	4	# Contributed by Red Hat.
	5	#
	6	# This program is free software; you can redistribute it and/or modify
	7	# it under the terms of the GNU General Public License as published by
	8	# the Free Software Foundation; either version 2 of the License, or
	9	# (at your option) any later version.
	10	#
	11	# This program is distributed in the hope that it will be useful,
	12	# but WITHOUT ANY WARRANTY; without even the implied warranty of
	13	# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	14	# GNU General Public License for more details.
	15	#
	16	# You should have received a copy of the GNU General Public License along
	17	# with this program; if not, write to the Free Software Foundation, Inc.,
	18	# 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
	19
	20	## COMMON_PRE_CONFIG_FRAG
	21
	22	FRV_OBJS = frv.o cpu.o decode.o sem.o model.o mloop.o cgen-par.o
	23
	24	CONFIG_DEVICES = dv-sockser.o
	25	CONFIG_DEVICES =
	26
	27	SIM_OBJS = \
	28	$(SIM_NEW_COMMON_OBJS) \
	29	sim-cpu.o \
	30	sim-hload.o \
	31	sim-hrw.o \
	32	sim-model.o \
	33	sim-reg.o \
	34	cgen-utils.o cgen-trace.o cgen-scache.o cgen-fpu.o cgen-accfp.o \
	35	cgen-run.o sim-reason.o sim-engine.o sim-stop.o \
	36	sim-if.o arch.o \
	37	$(FRV_OBJS) \
	38	traps.o interrupts.o memory.o cache.o pipeline.o \
676a64f4	39	profile.o profile-fr400.o profile-fr450.o profile-fr500.o profile-fr550.o options.o \
b34f6357 DB	40	devices.o reset.o registers.o \
	41	$(CONFIG_DEVICES)
	42
	43	# Extra headers included by sim-main.h.
	44	SIM_EXTRA_DEPS = \
	45	$(CGEN_INCLUDE_DEPS) \
	46	arch.h cpuall.h frv-sim.h $(srcdir)/../../opcodes/frv-desc.h cache.h \
	47	registers.h profile.h \
	48	$(sim-options_h)
	49
	50	SIM_EXTRA_CFLAGS = @sim_trapdump@
	51
	52	SIM_RUN_OBJS = nrun.o
	53	SIM_EXTRA_CLEAN = frv-clean
	54
	55	# This selects the frv newlib/libgloss syscall definitions.
	56	NL_TARGET = -DNL_TARGET_frv
	57
	58	## COMMON_POST_CONFIG_FRAG
	59
	60	arch = frv
	61
	62	arch.o: arch.c $(SIM_MAIN_DEPS)
	63
	64	devices.o: devices.c $(SIM_MAIN_DEPS)
	65
	66	# FRV objs
	67
	68	FRVBF_INCLUDE_DEPS = \
	69	$(CGEN_MAIN_CPU_DEPS) \
	70	$(SIM_EXTRA_DEPS) \
	71	cpu.h decode.h eng.h
	72
	73	frv.o: frv.c $(FRVBF_INCLUDE_DEPS)
	74	traps.o: traps.c $(FRVBF_INCLUDE_DEPS)
	75	pipeline.o: pipeline.c $(FRVBF_INCLUDE_DEPS)
	76	interrupts.o: interrupts.c $(FRVBF_INCLUDE_DEPS)
	77	memory.o: memory.c $(FRVBF_INCLUDE_DEPS)
	78	cache.o: cache.c $(FRVBF_INCLUDE_DEPS)
	79	options.o: options.c $(FRVBF_INCLUDE_DEPS)
	80	reset.o: reset.c $(FRVBF_INCLUDE_DEPS)
	81	registers.o: registers.c $(FRVBF_INCLUDE_DEPS)
e930b1f5	82	profile.o: profile.c profile-fr400.h profile-fr500.h profile-fr550.h $(FRVBF_INCLUDE_DEPS)
b34f6357	83	profile-fr400.o: profile-fr400.c profile-fr400.h $(FRVBF_INCLUDE_DEPS)
676a64f4	84	profile-fr450.o: profile-fr450.c $(FRVBF_INCLUDE_DEPS)
b34f6357	85	profile-fr500.o: profile-fr500.c profile-fr500.h $(FRVBF_INCLUDE_DEPS)
e930b1f5	86	profile-fr550.o: profile-fr550.c profile-fr550.h $(FRVBF_INCLUDE_DEPS)
b34f6357 DB	87	sim-if.o: sim-if.c $(FRVBF_INCLUDE_DEPS) $(srcdir)/../common/sim-core.h eng.h
	88
	89
	90	# FIXME: Use of `mono' is wip.
	91	mloop.c eng.h: stamp-mloop
	92	stamp-mloop: $(srcdir)/../common/genmloop.sh mloop.in Makefile
	93	$(SHELL) $(srccom)/genmloop.sh \
	94	-mono -scache -parallel-generic-write -parallel-only \
	95	-cpu frvbf -infile $(srcdir)/mloop.in
	96	$(SHELL) $(srcroot)/move-if-change eng.hin eng.h
	97	$(SHELL) $(srcroot)/move-if-change mloop.cin mloop.c
	98	touch stamp-mloop
	99	mloop.o: mloop.c $(FRVBF_INCLUDE_DEPS)
	100
	101	cpu.o: cpu.c $(FRVBF_INCLUDE_DEPS)
	102	decode.o: decode.c $(FRVBF_INCLUDE_DEPS)
	103	sem.o: sem.c $(FRVBF_INCLUDE_DEPS)
	104	model.o: model.c $(FRVBF_INCLUDE_DEPS)
	105
	106	frv-clean:
	107	rm -f mloop.c eng.h stamp-mloop
	108	rm -f tmp-*
	109	rm -f stamp-arch stamp-cpu
	110
	111	# cgen support, enable with --enable-cgen-maint
	112	CGEN_MAINT = ; @true
	113	# The following line is commented in or out depending upon --enable-cgen-maint.
	114	@CGEN_MAINT@CGEN_MAINT =
	115
	116	stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(srcdir)/../../cpu/frv.cpu
b34f6357	117	$(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) mach=all \
d89a78b6	118	archfile=$(srcdir)/../../cpu/frv.cpu \
b34f6357	119	FLAGS="with-scache"
b34f6357 DB	120	touch stamp-arch
	121	arch.h arch.c cpuall.h: $(CGEN_MAINT) stamp-arch
	122	# @true
	123
b34f6357	124	stamp-cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(srcdir)/../../cpu/frv.cpu
b34f6357	125	$(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
676a64f4	126	cpu=frvbf mach=frv,fr550,fr500,fr450,fr400,tomcat,simple SUFFIX= \
d89a78b6	127	archfile=$(srcdir)/../../cpu/frv.cpu \
b34f6357 DB	128	FLAGS="with-scache with-profile=fn with-generic-write with-parallel-only" \
b34f6357 DB	129	EXTRAFILES="$(CGEN_CPU_SEM)"
b34f6357 DB	130	touch stamp-cpu
	131	cpu.h sem.c model.c decode.c decode.h: $(CGEN_MAINT) stamp-cpu
	132	# @true