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c906108c SS |
1 | # Simulator main loop for i960. -*- C -*- |
2 | # Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc. | |
3 | # | |
4 | # This file is part of the GNU Simulators. | |
5 | # | |
6 | # This program is free software; you can redistribute it and/or modify | |
7 | # it under the terms of the GNU General Public License as published by | |
8 | # the Free Software Foundation; either version 2, or (at your option) | |
9 | # any later version. | |
10 | # | |
11 | # This program is distributed in the hope that it will be useful, | |
12 | # but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | # GNU General Public License for more details. | |
15 | # | |
16 | # You should have received a copy of the GNU General Public License along | |
17 | # with this program; if not, write to the Free Software Foundation, Inc., | |
18 | # 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. | |
19 | ||
20 | # Syntax: | |
21 | # /bin/sh mainloop.in command | |
22 | # | |
23 | # Command is one of: | |
24 | # | |
25 | # init | |
26 | # support | |
27 | # extract-{simple,scache,pbb} | |
28 | # {full,fast}-exec-{simple,scache,pbb} | |
29 | # | |
30 | # A target need only provide a "full" version of one of simple,scache,pbb. | |
31 | # If the target wants it can also provide a fast version of same. | |
32 | # It can't provide more than this, however for illustration's sake the M32R | |
33 | # port provides examples of all. | |
34 | ||
35 | # ??? After a few more ports are done, revisit. | |
36 | # Will eventually need to machine generate a lot of this. | |
37 | ||
38 | case "x$1" in | |
39 | ||
40 | xsupport) | |
41 | ||
42 | cat <<EOF | |
43 | ||
44 | /*static INLINE*/ const IDESC * | |
45 | extract32 (SIM_CPU *current_cpu, PCADDR pc, CGEN_INSN_INT insn, | |
46 | ARGBUF *abuf, int fast_p) | |
47 | { | |
48 | /* ??? wilson, instructions are 32 bits. */ | |
49 | const IDESC *d = @cpu@_decode (current_cpu, pc, (USI) insn, abuf); | |
50 | @cpu@_fill_argbuf (current_cpu, abuf, d, pc, fast_p); | |
51 | if (! fast_p) | |
52 | { | |
53 | int trace_p = PC_IN_TRACE_RANGE_P (current_cpu, pc); | |
54 | int profile_p = PC_IN_PROFILE_RANGE_P (current_cpu, pc); | |
55 | @cpu@_fill_argbuf_tp (current_cpu, abuf, trace_p, profile_p); | |
56 | } | |
57 | return d; | |
58 | } | |
59 | ||
60 | #if 0 | |
61 | /*static INLINE*/ const IDESC * | |
62 | /* ??? wilson, Some instructions are 64 bits. */ | |
63 | extract64 (SIM_CPU *current_cpu, PCADDR pc, insn_t insn, | |
64 | ARGBUF *abuf, int fast_p) | |
65 | { | |
66 | const IDESC *d = @cpu@_decode (current_cpu, pc, (UDI) insn >> 32, abuf); | |
67 | SEM_SET_CODE (abuf, d, fast_p); | |
68 | abuf->idesc = d; | |
69 | abuf->addr = pc; | |
70 | return d; | |
71 | } | |
72 | #endif | |
73 | ||
74 | static INLINE SEM_PC | |
75 | execute (SIM_CPU *current_cpu, SCACHE *sc, int fast_p) | |
76 | { | |
77 | SEM_PC vpc; | |
78 | ||
79 | if (fast_p) | |
80 | { | |
81 | #if ! WITH_SEM_SWITCH_FAST | |
82 | #if WITH_SCACHE | |
83 | vpc = (*sc->argbuf.semantic.sem_fast) (current_cpu, sc); | |
84 | #else | |
85 | vpc = (*sc->argbuf.semantic.sem_fast) (current_cpu, &sc->argbuf); | |
86 | #endif | |
87 | #else | |
88 | abort (); | |
89 | #endif /* WITH_SEM_SWITCH_FAST */ | |
90 | } | |
91 | else | |
92 | { | |
93 | #if ! WITH_SEM_SWITCH_FULL | |
94 | ARGBUF *abuf = &sc->argbuf; | |
95 | const IDESC *idesc = abuf->idesc; | |
96 | const CGEN_INSN *insn = idesc->idata; | |
97 | #if WITH_SCACHE_PBB | |
98 | int virtual_p = CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_VIRTUAL); | |
99 | #else | |
100 | int virtual_p = 0; | |
101 | #endif | |
102 | ||
103 | if (! virtual_p) | |
104 | { | |
105 | /* FIXME: call x-before */ | |
106 | if (ARGBUF_PROFILE_P (abuf)) | |
107 | PROFILE_COUNT_INSN (current_cpu, abuf->addr, idesc->num); | |
108 | /* FIXME: Later make cover macros: PROFILE_INSN_{INIT,FINI}. */ | |
109 | if (PROFILE_MODEL_P (current_cpu)) | |
110 | @cpu@_model_insn_before (current_cpu, 1 /*first_p*/); | |
111 | TRACE_INSN_INIT (current_cpu, abuf, 1); | |
112 | TRACE_INSN (current_cpu, insn, | |
113 | (const struct argbuf *) abuf, abuf->addr); | |
114 | } | |
115 | #if WITH_SCACHE | |
116 | vpc = (*sc->argbuf.semantic.sem_full) (current_cpu, sc); | |
117 | #else | |
118 | vpc = (*sc->argbuf.semantic.sem_full) (current_cpu, abuf); | |
119 | #endif | |
120 | if (! virtual_p) | |
121 | { | |
122 | /* FIXME: call x-after */ | |
123 | if (PROFILE_MODEL_P (current_cpu)) | |
124 | { | |
125 | int cycles; | |
126 | ||
127 | cycles = (*idesc->timing->model_fn) (current_cpu, sc); | |
128 | @cpu@_model_insn_after (current_cpu, 1 /*last_p*/, cycles); | |
129 | } | |
130 | TRACE_INSN_FINI (current_cpu, abuf, 1); | |
131 | } | |
132 | #else | |
133 | abort (); | |
134 | #endif /* WITH_SEM_SWITCH_FULL */ | |
135 | } | |
136 | ||
137 | return vpc; | |
138 | } | |
139 | ||
140 | EOF | |
141 | ||
142 | ;; | |
143 | ||
144 | xinit) | |
145 | ||
146 | cat <<EOF | |
147 | /*xxxinit*/ | |
148 | EOF | |
149 | ||
150 | ;; | |
151 | ||
152 | xextract-simple | xextract-scache) | |
153 | ||
154 | cat <<EOF | |
155 | { | |
156 | if ((pc & 3) != 0) | |
157 | { | |
158 | abort (); | |
159 | #if 0 | |
160 | /* This only occurs when single stepping. | |
161 | The test is unnecessary otherwise, but the cost is teensy, | |
162 | compared with decoding/extraction. */ | |
163 | UHI insn = GETIMEMUHI (current_cpu, pc); | |
164 | extract16 (current_cpu, pc, insn & 0x7fff, sc, FAST_P); | |
165 | #endif | |
166 | } | |
167 | else | |
168 | { | |
169 | USI insn = GETIMEMUSI (current_cpu, pc); | |
170 | /* ??? wilson, insns are 32 bits, unless MEMB with displacement, which | |
171 | has high bit set, bit 12 set, and mode of 5, 12, 13, 14, or 15. */ | |
172 | if (((SI) insn > 0) | |
173 | || ! (((insn & 0x3000) == 0x3000) | |
174 | || ((insn & 0x3C00) == 0x1400))) | |
175 | { | |
176 | extract32 (current_cpu, pc, insn, sc, FAST_P); | |
177 | } | |
178 | else | |
179 | { | |
180 | UDI llinsn = (((UDI) insn << 32) || GETIMEMUSI (current_cpu, pc+4)); | |
181 | extract64 (current_cpu, pc, llinsn, sc, FAST_P); | |
182 | } | |
183 | } | |
184 | } | |
185 | EOF | |
186 | ||
187 | ;; | |
188 | ||
189 | xextract-pbb) | |
190 | ||
191 | # Inputs: current_cpu, pc, sc, max_insns, FAST_P | |
192 | # Outputs: sc, pc | |
193 | # sc must be left pointing past the last created entry. | |
194 | # pc must be left pointing past the last created entry. | |
195 | # If the pbb is terminated by a cti insn, SET_CTI_VPC(sc) must be called | |
196 | # to record the vpc of the cti insn. | |
197 | # SET_INSN_COUNT(n) must be called to record number of real insns. | |
198 | ||
199 | cat <<EOF | |
200 | { | |
201 | const IDESC *idesc; | |
202 | int icount = 0; | |
203 | ||
204 | if ((pc & 3) != 0) | |
205 | { | |
206 | abort (); | |
207 | #if 0 | |
208 | /* This only occurs when single stepping. | |
209 | The test is unnecessary otherwise, but the cost is teensy, | |
210 | compared with decoding/extraction. */ | |
211 | UHI insn = GETIMEMUHI (current_cpu, pc); | |
212 | idesc = extract16 (current_cpu, pc, insn & 0x7fff, &sc->argbuf, FAST_P); | |
213 | ++sc; | |
214 | --max_insns; | |
215 | ++icount; | |
216 | pc += 2; | |
217 | if (IDESC_CTI_P (idesc)) | |
218 | { | |
219 | SET_CTI_VPC (sc - 1); | |
220 | goto Finish; | |
221 | } | |
222 | #endif | |
223 | } | |
224 | ||
225 | while (max_insns > 0) | |
226 | { | |
227 | USI insn = GETIMEMUSI (current_cpu, pc); | |
228 | #if 0 | |
229 | /* ??? wilson, insns are 32 bits, unless MEMB with displacement, which | |
230 | has high bit set, bit 12 set, and mode of 5, 12, 13, 14, or 15. */ | |
231 | if (((SI) insn > 0) | |
232 | || ! (((insn & 0x3000) == 0x3000) | |
233 | || ((insn & 0x3C00) == 0x1400))) | |
234 | { | |
235 | idesc = extract32 (current_cpu, pc, insn, &sc->argbuf, FAST_P); | |
236 | ++sc; | |
237 | --max_insns; | |
238 | ++icount; | |
239 | pc += 4; | |
240 | if (IDESC_CTI_P (idesc)) | |
241 | { | |
242 | SET_CTI_VPC (sc - 1); | |
243 | break; | |
244 | } | |
245 | } | |
246 | else | |
247 | { | |
248 | idesc = extract64 (current_cpu, pc, insn, &sc->argbuf, FAST_P); | |
249 | ++sc; | |
250 | --max_insns; | |
251 | ++icount; | |
252 | pc += 8; | |
253 | if (IDESC_CTI_P (idesc)) | |
254 | { | |
255 | SET_CTI_VPC (sc - 1); | |
256 | break; | |
257 | } | |
258 | } | |
259 | #else | |
260 | idesc = extract32 (current_cpu, pc, insn, &sc->argbuf, FAST_P); | |
261 | ++sc; | |
262 | --max_insns; | |
263 | ++icount; | |
264 | pc += idesc->length; | |
265 | if (IDESC_CTI_P (idesc)) | |
266 | { | |
267 | SET_CTI_VPC (sc - 1); | |
268 | break; | |
269 | } | |
270 | } | |
271 | #endif | |
272 | Finish: | |
273 | SET_INSN_COUNT (icount); | |
274 | } | |
275 | EOF | |
276 | ||
277 | ;; | |
278 | ||
279 | xfull-exec-* | xfast-exec-*) | |
280 | ||
281 | # Inputs: current_cpu, vpc, FAST_P | |
282 | # Outputs: vpc | |
283 | # vpc is the virtual program counter. | |
284 | ||
285 | cat <<EOF | |
286 | #if (! FAST_P && WITH_SEM_SWITCH_FULL) || (FAST_P && WITH_SEM_SWITCH_FAST) | |
287 | #define DEFINE_SWITCH | |
288 | #include "sem-switch.c" | |
289 | #else | |
290 | vpc = execute (current_cpu, vpc, FAST_P); | |
291 | #endif | |
292 | EOF | |
293 | ||
294 | ;; | |
295 | ||
296 | *) | |
297 | echo "Invalid argument to mainloop.in: $1" >&2 | |
298 | exit 1 | |
299 | ;; | |
300 | ||
301 | esac |