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c906108c SS |
1 | /* Simulator instruction semantics for i960base. |
2 | ||
3 | THIS FILE IS MACHINE GENERATED WITH CGEN. | |
4 | ||
5 | Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc. | |
6 | ||
7 | This file is part of the GNU Simulators. | |
8 | ||
9 | This program is free software; you can redistribute it and/or modify | |
10 | it under the terms of the GNU General Public License as published by | |
11 | the Free Software Foundation; either version 2, or (at your option) | |
12 | any later version. | |
13 | ||
14 | This program is distributed in the hope that it will be useful, | |
15 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | GNU General Public License for more details. | |
18 | ||
19 | You should have received a copy of the GNU General Public License along | |
20 | with this program; if not, write to the Free Software Foundation, Inc., | |
21 | 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. | |
22 | ||
23 | */ | |
24 | ||
25 | #ifdef DEFINE_LABELS | |
26 | ||
27 | /* The labels have the case they have because the enum of insn types | |
28 | is all uppercase and in the non-stdc case the insn symbol is built | |
29 | into the enum name. */ | |
30 | ||
31 | static struct { | |
32 | int index; | |
33 | void *label; | |
34 | } labels[] = { | |
35 | { I960BASE_INSN_X_INVALID, && case_sem_INSN_X_INVALID }, | |
36 | { I960BASE_INSN_X_AFTER, && case_sem_INSN_X_AFTER }, | |
37 | { I960BASE_INSN_X_BEFORE, && case_sem_INSN_X_BEFORE }, | |
38 | { I960BASE_INSN_X_CTI_CHAIN, && case_sem_INSN_X_CTI_CHAIN }, | |
39 | { I960BASE_INSN_X_CHAIN, && case_sem_INSN_X_CHAIN }, | |
40 | { I960BASE_INSN_X_BEGIN, && case_sem_INSN_X_BEGIN }, | |
41 | { I960BASE_INSN_MULO, && case_sem_INSN_MULO }, | |
42 | { I960BASE_INSN_MULO1, && case_sem_INSN_MULO1 }, | |
43 | { I960BASE_INSN_MULO2, && case_sem_INSN_MULO2 }, | |
44 | { I960BASE_INSN_MULO3, && case_sem_INSN_MULO3 }, | |
45 | { I960BASE_INSN_REMO, && case_sem_INSN_REMO }, | |
46 | { I960BASE_INSN_REMO1, && case_sem_INSN_REMO1 }, | |
47 | { I960BASE_INSN_REMO2, && case_sem_INSN_REMO2 }, | |
48 | { I960BASE_INSN_REMO3, && case_sem_INSN_REMO3 }, | |
49 | { I960BASE_INSN_DIVO, && case_sem_INSN_DIVO }, | |
50 | { I960BASE_INSN_DIVO1, && case_sem_INSN_DIVO1 }, | |
51 | { I960BASE_INSN_DIVO2, && case_sem_INSN_DIVO2 }, | |
52 | { I960BASE_INSN_DIVO3, && case_sem_INSN_DIVO3 }, | |
53 | { I960BASE_INSN_REMI, && case_sem_INSN_REMI }, | |
54 | { I960BASE_INSN_REMI1, && case_sem_INSN_REMI1 }, | |
55 | { I960BASE_INSN_REMI2, && case_sem_INSN_REMI2 }, | |
56 | { I960BASE_INSN_REMI3, && case_sem_INSN_REMI3 }, | |
57 | { I960BASE_INSN_DIVI, && case_sem_INSN_DIVI }, | |
58 | { I960BASE_INSN_DIVI1, && case_sem_INSN_DIVI1 }, | |
59 | { I960BASE_INSN_DIVI2, && case_sem_INSN_DIVI2 }, | |
60 | { I960BASE_INSN_DIVI3, && case_sem_INSN_DIVI3 }, | |
61 | { I960BASE_INSN_ADDO, && case_sem_INSN_ADDO }, | |
62 | { I960BASE_INSN_ADDO1, && case_sem_INSN_ADDO1 }, | |
63 | { I960BASE_INSN_ADDO2, && case_sem_INSN_ADDO2 }, | |
64 | { I960BASE_INSN_ADDO3, && case_sem_INSN_ADDO3 }, | |
65 | { I960BASE_INSN_SUBO, && case_sem_INSN_SUBO }, | |
66 | { I960BASE_INSN_SUBO1, && case_sem_INSN_SUBO1 }, | |
67 | { I960BASE_INSN_SUBO2, && case_sem_INSN_SUBO2 }, | |
68 | { I960BASE_INSN_SUBO3, && case_sem_INSN_SUBO3 }, | |
69 | { I960BASE_INSN_NOTBIT, && case_sem_INSN_NOTBIT }, | |
70 | { I960BASE_INSN_NOTBIT1, && case_sem_INSN_NOTBIT1 }, | |
71 | { I960BASE_INSN_NOTBIT2, && case_sem_INSN_NOTBIT2 }, | |
72 | { I960BASE_INSN_NOTBIT3, && case_sem_INSN_NOTBIT3 }, | |
73 | { I960BASE_INSN_AND, && case_sem_INSN_AND }, | |
74 | { I960BASE_INSN_AND1, && case_sem_INSN_AND1 }, | |
75 | { I960BASE_INSN_AND2, && case_sem_INSN_AND2 }, | |
76 | { I960BASE_INSN_AND3, && case_sem_INSN_AND3 }, | |
77 | { I960BASE_INSN_ANDNOT, && case_sem_INSN_ANDNOT }, | |
78 | { I960BASE_INSN_ANDNOT1, && case_sem_INSN_ANDNOT1 }, | |
79 | { I960BASE_INSN_ANDNOT2, && case_sem_INSN_ANDNOT2 }, | |
80 | { I960BASE_INSN_ANDNOT3, && case_sem_INSN_ANDNOT3 }, | |
81 | { I960BASE_INSN_SETBIT, && case_sem_INSN_SETBIT }, | |
82 | { I960BASE_INSN_SETBIT1, && case_sem_INSN_SETBIT1 }, | |
83 | { I960BASE_INSN_SETBIT2, && case_sem_INSN_SETBIT2 }, | |
84 | { I960BASE_INSN_SETBIT3, && case_sem_INSN_SETBIT3 }, | |
85 | { I960BASE_INSN_NOTAND, && case_sem_INSN_NOTAND }, | |
86 | { I960BASE_INSN_NOTAND1, && case_sem_INSN_NOTAND1 }, | |
87 | { I960BASE_INSN_NOTAND2, && case_sem_INSN_NOTAND2 }, | |
88 | { I960BASE_INSN_NOTAND3, && case_sem_INSN_NOTAND3 }, | |
89 | { I960BASE_INSN_XOR, && case_sem_INSN_XOR }, | |
90 | { I960BASE_INSN_XOR1, && case_sem_INSN_XOR1 }, | |
91 | { I960BASE_INSN_XOR2, && case_sem_INSN_XOR2 }, | |
92 | { I960BASE_INSN_XOR3, && case_sem_INSN_XOR3 }, | |
93 | { I960BASE_INSN_OR, && case_sem_INSN_OR }, | |
94 | { I960BASE_INSN_OR1, && case_sem_INSN_OR1 }, | |
95 | { I960BASE_INSN_OR2, && case_sem_INSN_OR2 }, | |
96 | { I960BASE_INSN_OR3, && case_sem_INSN_OR3 }, | |
97 | { I960BASE_INSN_NOR, && case_sem_INSN_NOR }, | |
98 | { I960BASE_INSN_NOR1, && case_sem_INSN_NOR1 }, | |
99 | { I960BASE_INSN_NOR2, && case_sem_INSN_NOR2 }, | |
100 | { I960BASE_INSN_NOR3, && case_sem_INSN_NOR3 }, | |
7a292a7a SS |
101 | { I960BASE_INSN_XNOR, && case_sem_INSN_XNOR }, |
102 | { I960BASE_INSN_XNOR1, && case_sem_INSN_XNOR1 }, | |
103 | { I960BASE_INSN_XNOR2, && case_sem_INSN_XNOR2 }, | |
104 | { I960BASE_INSN_XNOR3, && case_sem_INSN_XNOR3 }, | |
c906108c SS |
105 | { I960BASE_INSN_NOT, && case_sem_INSN_NOT }, |
106 | { I960BASE_INSN_NOT1, && case_sem_INSN_NOT1 }, | |
107 | { I960BASE_INSN_NOT2, && case_sem_INSN_NOT2 }, | |
108 | { I960BASE_INSN_NOT3, && case_sem_INSN_NOT3 }, | |
7a292a7a SS |
109 | { I960BASE_INSN_ORNOT, && case_sem_INSN_ORNOT }, |
110 | { I960BASE_INSN_ORNOT1, && case_sem_INSN_ORNOT1 }, | |
111 | { I960BASE_INSN_ORNOT2, && case_sem_INSN_ORNOT2 }, | |
112 | { I960BASE_INSN_ORNOT3, && case_sem_INSN_ORNOT3 }, | |
c906108c SS |
113 | { I960BASE_INSN_CLRBIT, && case_sem_INSN_CLRBIT }, |
114 | { I960BASE_INSN_CLRBIT1, && case_sem_INSN_CLRBIT1 }, | |
115 | { I960BASE_INSN_CLRBIT2, && case_sem_INSN_CLRBIT2 }, | |
116 | { I960BASE_INSN_CLRBIT3, && case_sem_INSN_CLRBIT3 }, | |
117 | { I960BASE_INSN_SHLO, && case_sem_INSN_SHLO }, | |
118 | { I960BASE_INSN_SHLO1, && case_sem_INSN_SHLO1 }, | |
119 | { I960BASE_INSN_SHLO2, && case_sem_INSN_SHLO2 }, | |
120 | { I960BASE_INSN_SHLO3, && case_sem_INSN_SHLO3 }, | |
121 | { I960BASE_INSN_SHRO, && case_sem_INSN_SHRO }, | |
122 | { I960BASE_INSN_SHRO1, && case_sem_INSN_SHRO1 }, | |
123 | { I960BASE_INSN_SHRO2, && case_sem_INSN_SHRO2 }, | |
124 | { I960BASE_INSN_SHRO3, && case_sem_INSN_SHRO3 }, | |
125 | { I960BASE_INSN_SHLI, && case_sem_INSN_SHLI }, | |
126 | { I960BASE_INSN_SHLI1, && case_sem_INSN_SHLI1 }, | |
127 | { I960BASE_INSN_SHLI2, && case_sem_INSN_SHLI2 }, | |
128 | { I960BASE_INSN_SHLI3, && case_sem_INSN_SHLI3 }, | |
129 | { I960BASE_INSN_SHRI, && case_sem_INSN_SHRI }, | |
130 | { I960BASE_INSN_SHRI1, && case_sem_INSN_SHRI1 }, | |
131 | { I960BASE_INSN_SHRI2, && case_sem_INSN_SHRI2 }, | |
132 | { I960BASE_INSN_SHRI3, && case_sem_INSN_SHRI3 }, | |
133 | { I960BASE_INSN_EMUL, && case_sem_INSN_EMUL }, | |
134 | { I960BASE_INSN_EMUL1, && case_sem_INSN_EMUL1 }, | |
135 | { I960BASE_INSN_EMUL2, && case_sem_INSN_EMUL2 }, | |
136 | { I960BASE_INSN_EMUL3, && case_sem_INSN_EMUL3 }, | |
137 | { I960BASE_INSN_MOV, && case_sem_INSN_MOV }, | |
138 | { I960BASE_INSN_MOV1, && case_sem_INSN_MOV1 }, | |
139 | { I960BASE_INSN_MOVL, && case_sem_INSN_MOVL }, | |
140 | { I960BASE_INSN_MOVL1, && case_sem_INSN_MOVL1 }, | |
141 | { I960BASE_INSN_MOVT, && case_sem_INSN_MOVT }, | |
142 | { I960BASE_INSN_MOVT1, && case_sem_INSN_MOVT1 }, | |
143 | { I960BASE_INSN_MOVQ, && case_sem_INSN_MOVQ }, | |
144 | { I960BASE_INSN_MOVQ1, && case_sem_INSN_MOVQ1 }, | |
145 | { I960BASE_INSN_MODPC, && case_sem_INSN_MODPC }, | |
146 | { I960BASE_INSN_MODAC, && case_sem_INSN_MODAC }, | |
147 | { I960BASE_INSN_LDA_OFFSET, && case_sem_INSN_LDA_OFFSET }, | |
148 | { I960BASE_INSN_LDA_INDIRECT_OFFSET, && case_sem_INSN_LDA_INDIRECT_OFFSET }, | |
149 | { I960BASE_INSN_LDA_INDIRECT, && case_sem_INSN_LDA_INDIRECT }, | |
150 | { I960BASE_INSN_LDA_INDIRECT_INDEX, && case_sem_INSN_LDA_INDIRECT_INDEX }, | |
151 | { I960BASE_INSN_LDA_DISP, && case_sem_INSN_LDA_DISP }, | |
152 | { I960BASE_INSN_LDA_INDIRECT_DISP, && case_sem_INSN_LDA_INDIRECT_DISP }, | |
153 | { I960BASE_INSN_LDA_INDEX_DISP, && case_sem_INSN_LDA_INDEX_DISP }, | |
154 | { I960BASE_INSN_LDA_INDIRECT_INDEX_DISP, && case_sem_INSN_LDA_INDIRECT_INDEX_DISP }, | |
155 | { I960BASE_INSN_LD_OFFSET, && case_sem_INSN_LD_OFFSET }, | |
156 | { I960BASE_INSN_LD_INDIRECT_OFFSET, && case_sem_INSN_LD_INDIRECT_OFFSET }, | |
157 | { I960BASE_INSN_LD_INDIRECT, && case_sem_INSN_LD_INDIRECT }, | |
158 | { I960BASE_INSN_LD_INDIRECT_INDEX, && case_sem_INSN_LD_INDIRECT_INDEX }, | |
159 | { I960BASE_INSN_LD_DISP, && case_sem_INSN_LD_DISP }, | |
160 | { I960BASE_INSN_LD_INDIRECT_DISP, && case_sem_INSN_LD_INDIRECT_DISP }, | |
161 | { I960BASE_INSN_LD_INDEX_DISP, && case_sem_INSN_LD_INDEX_DISP }, | |
162 | { I960BASE_INSN_LD_INDIRECT_INDEX_DISP, && case_sem_INSN_LD_INDIRECT_INDEX_DISP }, | |
163 | { I960BASE_INSN_LDOB_OFFSET, && case_sem_INSN_LDOB_OFFSET }, | |
164 | { I960BASE_INSN_LDOB_INDIRECT_OFFSET, && case_sem_INSN_LDOB_INDIRECT_OFFSET }, | |
165 | { I960BASE_INSN_LDOB_INDIRECT, && case_sem_INSN_LDOB_INDIRECT }, | |
166 | { I960BASE_INSN_LDOB_INDIRECT_INDEX, && case_sem_INSN_LDOB_INDIRECT_INDEX }, | |
167 | { I960BASE_INSN_LDOB_DISP, && case_sem_INSN_LDOB_DISP }, | |
168 | { I960BASE_INSN_LDOB_INDIRECT_DISP, && case_sem_INSN_LDOB_INDIRECT_DISP }, | |
169 | { I960BASE_INSN_LDOB_INDEX_DISP, && case_sem_INSN_LDOB_INDEX_DISP }, | |
170 | { I960BASE_INSN_LDOB_INDIRECT_INDEX_DISP, && case_sem_INSN_LDOB_INDIRECT_INDEX_DISP }, | |
171 | { I960BASE_INSN_LDOS_OFFSET, && case_sem_INSN_LDOS_OFFSET }, | |
172 | { I960BASE_INSN_LDOS_INDIRECT_OFFSET, && case_sem_INSN_LDOS_INDIRECT_OFFSET }, | |
173 | { I960BASE_INSN_LDOS_INDIRECT, && case_sem_INSN_LDOS_INDIRECT }, | |
174 | { I960BASE_INSN_LDOS_INDIRECT_INDEX, && case_sem_INSN_LDOS_INDIRECT_INDEX }, | |
175 | { I960BASE_INSN_LDOS_DISP, && case_sem_INSN_LDOS_DISP }, | |
176 | { I960BASE_INSN_LDOS_INDIRECT_DISP, && case_sem_INSN_LDOS_INDIRECT_DISP }, | |
177 | { I960BASE_INSN_LDOS_INDEX_DISP, && case_sem_INSN_LDOS_INDEX_DISP }, | |
178 | { I960BASE_INSN_LDOS_INDIRECT_INDEX_DISP, && case_sem_INSN_LDOS_INDIRECT_INDEX_DISP }, | |
179 | { I960BASE_INSN_LDIB_OFFSET, && case_sem_INSN_LDIB_OFFSET }, | |
180 | { I960BASE_INSN_LDIB_INDIRECT_OFFSET, && case_sem_INSN_LDIB_INDIRECT_OFFSET }, | |
181 | { I960BASE_INSN_LDIB_INDIRECT, && case_sem_INSN_LDIB_INDIRECT }, | |
182 | { I960BASE_INSN_LDIB_INDIRECT_INDEX, && case_sem_INSN_LDIB_INDIRECT_INDEX }, | |
183 | { I960BASE_INSN_LDIB_DISP, && case_sem_INSN_LDIB_DISP }, | |
184 | { I960BASE_INSN_LDIB_INDIRECT_DISP, && case_sem_INSN_LDIB_INDIRECT_DISP }, | |
185 | { I960BASE_INSN_LDIB_INDEX_DISP, && case_sem_INSN_LDIB_INDEX_DISP }, | |
186 | { I960BASE_INSN_LDIB_INDIRECT_INDEX_DISP, && case_sem_INSN_LDIB_INDIRECT_INDEX_DISP }, | |
187 | { I960BASE_INSN_LDIS_OFFSET, && case_sem_INSN_LDIS_OFFSET }, | |
188 | { I960BASE_INSN_LDIS_INDIRECT_OFFSET, && case_sem_INSN_LDIS_INDIRECT_OFFSET }, | |
189 | { I960BASE_INSN_LDIS_INDIRECT, && case_sem_INSN_LDIS_INDIRECT }, | |
190 | { I960BASE_INSN_LDIS_INDIRECT_INDEX, && case_sem_INSN_LDIS_INDIRECT_INDEX }, | |
191 | { I960BASE_INSN_LDIS_DISP, && case_sem_INSN_LDIS_DISP }, | |
192 | { I960BASE_INSN_LDIS_INDIRECT_DISP, && case_sem_INSN_LDIS_INDIRECT_DISP }, | |
193 | { I960BASE_INSN_LDIS_INDEX_DISP, && case_sem_INSN_LDIS_INDEX_DISP }, | |
194 | { I960BASE_INSN_LDIS_INDIRECT_INDEX_DISP, && case_sem_INSN_LDIS_INDIRECT_INDEX_DISP }, | |
195 | { I960BASE_INSN_LDL_OFFSET, && case_sem_INSN_LDL_OFFSET }, | |
196 | { I960BASE_INSN_LDL_INDIRECT_OFFSET, && case_sem_INSN_LDL_INDIRECT_OFFSET }, | |
197 | { I960BASE_INSN_LDL_INDIRECT, && case_sem_INSN_LDL_INDIRECT }, | |
198 | { I960BASE_INSN_LDL_INDIRECT_INDEX, && case_sem_INSN_LDL_INDIRECT_INDEX }, | |
199 | { I960BASE_INSN_LDL_DISP, && case_sem_INSN_LDL_DISP }, | |
200 | { I960BASE_INSN_LDL_INDIRECT_DISP, && case_sem_INSN_LDL_INDIRECT_DISP }, | |
201 | { I960BASE_INSN_LDL_INDEX_DISP, && case_sem_INSN_LDL_INDEX_DISP }, | |
202 | { I960BASE_INSN_LDL_INDIRECT_INDEX_DISP, && case_sem_INSN_LDL_INDIRECT_INDEX_DISP }, | |
203 | { I960BASE_INSN_LDT_OFFSET, && case_sem_INSN_LDT_OFFSET }, | |
204 | { I960BASE_INSN_LDT_INDIRECT_OFFSET, && case_sem_INSN_LDT_INDIRECT_OFFSET }, | |
205 | { I960BASE_INSN_LDT_INDIRECT, && case_sem_INSN_LDT_INDIRECT }, | |
206 | { I960BASE_INSN_LDT_INDIRECT_INDEX, && case_sem_INSN_LDT_INDIRECT_INDEX }, | |
207 | { I960BASE_INSN_LDT_DISP, && case_sem_INSN_LDT_DISP }, | |
208 | { I960BASE_INSN_LDT_INDIRECT_DISP, && case_sem_INSN_LDT_INDIRECT_DISP }, | |
209 | { I960BASE_INSN_LDT_INDEX_DISP, && case_sem_INSN_LDT_INDEX_DISP }, | |
210 | { I960BASE_INSN_LDT_INDIRECT_INDEX_DISP, && case_sem_INSN_LDT_INDIRECT_INDEX_DISP }, | |
211 | { I960BASE_INSN_LDQ_OFFSET, && case_sem_INSN_LDQ_OFFSET }, | |
212 | { I960BASE_INSN_LDQ_INDIRECT_OFFSET, && case_sem_INSN_LDQ_INDIRECT_OFFSET }, | |
213 | { I960BASE_INSN_LDQ_INDIRECT, && case_sem_INSN_LDQ_INDIRECT }, | |
214 | { I960BASE_INSN_LDQ_INDIRECT_INDEX, && case_sem_INSN_LDQ_INDIRECT_INDEX }, | |
215 | { I960BASE_INSN_LDQ_DISP, && case_sem_INSN_LDQ_DISP }, | |
216 | { I960BASE_INSN_LDQ_INDIRECT_DISP, && case_sem_INSN_LDQ_INDIRECT_DISP }, | |
217 | { I960BASE_INSN_LDQ_INDEX_DISP, && case_sem_INSN_LDQ_INDEX_DISP }, | |
218 | { I960BASE_INSN_LDQ_INDIRECT_INDEX_DISP, && case_sem_INSN_LDQ_INDIRECT_INDEX_DISP }, | |
219 | { I960BASE_INSN_ST_OFFSET, && case_sem_INSN_ST_OFFSET }, | |
220 | { I960BASE_INSN_ST_INDIRECT_OFFSET, && case_sem_INSN_ST_INDIRECT_OFFSET }, | |
221 | { I960BASE_INSN_ST_INDIRECT, && case_sem_INSN_ST_INDIRECT }, | |
222 | { I960BASE_INSN_ST_INDIRECT_INDEX, && case_sem_INSN_ST_INDIRECT_INDEX }, | |
223 | { I960BASE_INSN_ST_DISP, && case_sem_INSN_ST_DISP }, | |
224 | { I960BASE_INSN_ST_INDIRECT_DISP, && case_sem_INSN_ST_INDIRECT_DISP }, | |
225 | { I960BASE_INSN_ST_INDEX_DISP, && case_sem_INSN_ST_INDEX_DISP }, | |
226 | { I960BASE_INSN_ST_INDIRECT_INDEX_DISP, && case_sem_INSN_ST_INDIRECT_INDEX_DISP }, | |
227 | { I960BASE_INSN_STOB_OFFSET, && case_sem_INSN_STOB_OFFSET }, | |
228 | { I960BASE_INSN_STOB_INDIRECT_OFFSET, && case_sem_INSN_STOB_INDIRECT_OFFSET }, | |
229 | { I960BASE_INSN_STOB_INDIRECT, && case_sem_INSN_STOB_INDIRECT }, | |
230 | { I960BASE_INSN_STOB_INDIRECT_INDEX, && case_sem_INSN_STOB_INDIRECT_INDEX }, | |
231 | { I960BASE_INSN_STOB_DISP, && case_sem_INSN_STOB_DISP }, | |
232 | { I960BASE_INSN_STOB_INDIRECT_DISP, && case_sem_INSN_STOB_INDIRECT_DISP }, | |
233 | { I960BASE_INSN_STOB_INDEX_DISP, && case_sem_INSN_STOB_INDEX_DISP }, | |
234 | { I960BASE_INSN_STOB_INDIRECT_INDEX_DISP, && case_sem_INSN_STOB_INDIRECT_INDEX_DISP }, | |
235 | { I960BASE_INSN_STOS_OFFSET, && case_sem_INSN_STOS_OFFSET }, | |
236 | { I960BASE_INSN_STOS_INDIRECT_OFFSET, && case_sem_INSN_STOS_INDIRECT_OFFSET }, | |
237 | { I960BASE_INSN_STOS_INDIRECT, && case_sem_INSN_STOS_INDIRECT }, | |
238 | { I960BASE_INSN_STOS_INDIRECT_INDEX, && case_sem_INSN_STOS_INDIRECT_INDEX }, | |
239 | { I960BASE_INSN_STOS_DISP, && case_sem_INSN_STOS_DISP }, | |
240 | { I960BASE_INSN_STOS_INDIRECT_DISP, && case_sem_INSN_STOS_INDIRECT_DISP }, | |
241 | { I960BASE_INSN_STOS_INDEX_DISP, && case_sem_INSN_STOS_INDEX_DISP }, | |
242 | { I960BASE_INSN_STOS_INDIRECT_INDEX_DISP, && case_sem_INSN_STOS_INDIRECT_INDEX_DISP }, | |
243 | { I960BASE_INSN_STL_OFFSET, && case_sem_INSN_STL_OFFSET }, | |
244 | { I960BASE_INSN_STL_INDIRECT_OFFSET, && case_sem_INSN_STL_INDIRECT_OFFSET }, | |
245 | { I960BASE_INSN_STL_INDIRECT, && case_sem_INSN_STL_INDIRECT }, | |
246 | { I960BASE_INSN_STL_INDIRECT_INDEX, && case_sem_INSN_STL_INDIRECT_INDEX }, | |
247 | { I960BASE_INSN_STL_DISP, && case_sem_INSN_STL_DISP }, | |
248 | { I960BASE_INSN_STL_INDIRECT_DISP, && case_sem_INSN_STL_INDIRECT_DISP }, | |
249 | { I960BASE_INSN_STL_INDEX_DISP, && case_sem_INSN_STL_INDEX_DISP }, | |
250 | { I960BASE_INSN_STL_INDIRECT_INDEX_DISP, && case_sem_INSN_STL_INDIRECT_INDEX_DISP }, | |
251 | { I960BASE_INSN_STT_OFFSET, && case_sem_INSN_STT_OFFSET }, | |
252 | { I960BASE_INSN_STT_INDIRECT_OFFSET, && case_sem_INSN_STT_INDIRECT_OFFSET }, | |
253 | { I960BASE_INSN_STT_INDIRECT, && case_sem_INSN_STT_INDIRECT }, | |
254 | { I960BASE_INSN_STT_INDIRECT_INDEX, && case_sem_INSN_STT_INDIRECT_INDEX }, | |
255 | { I960BASE_INSN_STT_DISP, && case_sem_INSN_STT_DISP }, | |
256 | { I960BASE_INSN_STT_INDIRECT_DISP, && case_sem_INSN_STT_INDIRECT_DISP }, | |
257 | { I960BASE_INSN_STT_INDEX_DISP, && case_sem_INSN_STT_INDEX_DISP }, | |
258 | { I960BASE_INSN_STT_INDIRECT_INDEX_DISP, && case_sem_INSN_STT_INDIRECT_INDEX_DISP }, | |
259 | { I960BASE_INSN_STQ_OFFSET, && case_sem_INSN_STQ_OFFSET }, | |
260 | { I960BASE_INSN_STQ_INDIRECT_OFFSET, && case_sem_INSN_STQ_INDIRECT_OFFSET }, | |
261 | { I960BASE_INSN_STQ_INDIRECT, && case_sem_INSN_STQ_INDIRECT }, | |
262 | { I960BASE_INSN_STQ_INDIRECT_INDEX, && case_sem_INSN_STQ_INDIRECT_INDEX }, | |
263 | { I960BASE_INSN_STQ_DISP, && case_sem_INSN_STQ_DISP }, | |
264 | { I960BASE_INSN_STQ_INDIRECT_DISP, && case_sem_INSN_STQ_INDIRECT_DISP }, | |
265 | { I960BASE_INSN_STQ_INDEX_DISP, && case_sem_INSN_STQ_INDEX_DISP }, | |
266 | { I960BASE_INSN_STQ_INDIRECT_INDEX_DISP, && case_sem_INSN_STQ_INDIRECT_INDEX_DISP }, | |
267 | { I960BASE_INSN_CMPOBE_REG, && case_sem_INSN_CMPOBE_REG }, | |
268 | { I960BASE_INSN_CMPOBE_LIT, && case_sem_INSN_CMPOBE_LIT }, | |
269 | { I960BASE_INSN_CMPOBNE_REG, && case_sem_INSN_CMPOBNE_REG }, | |
270 | { I960BASE_INSN_CMPOBNE_LIT, && case_sem_INSN_CMPOBNE_LIT }, | |
271 | { I960BASE_INSN_CMPOBL_REG, && case_sem_INSN_CMPOBL_REG }, | |
272 | { I960BASE_INSN_CMPOBL_LIT, && case_sem_INSN_CMPOBL_LIT }, | |
273 | { I960BASE_INSN_CMPOBLE_REG, && case_sem_INSN_CMPOBLE_REG }, | |
274 | { I960BASE_INSN_CMPOBLE_LIT, && case_sem_INSN_CMPOBLE_LIT }, | |
275 | { I960BASE_INSN_CMPOBG_REG, && case_sem_INSN_CMPOBG_REG }, | |
276 | { I960BASE_INSN_CMPOBG_LIT, && case_sem_INSN_CMPOBG_LIT }, | |
277 | { I960BASE_INSN_CMPOBGE_REG, && case_sem_INSN_CMPOBGE_REG }, | |
278 | { I960BASE_INSN_CMPOBGE_LIT, && case_sem_INSN_CMPOBGE_LIT }, | |
279 | { I960BASE_INSN_CMPIBE_REG, && case_sem_INSN_CMPIBE_REG }, | |
280 | { I960BASE_INSN_CMPIBE_LIT, && case_sem_INSN_CMPIBE_LIT }, | |
281 | { I960BASE_INSN_CMPIBNE_REG, && case_sem_INSN_CMPIBNE_REG }, | |
282 | { I960BASE_INSN_CMPIBNE_LIT, && case_sem_INSN_CMPIBNE_LIT }, | |
283 | { I960BASE_INSN_CMPIBL_REG, && case_sem_INSN_CMPIBL_REG }, | |
284 | { I960BASE_INSN_CMPIBL_LIT, && case_sem_INSN_CMPIBL_LIT }, | |
285 | { I960BASE_INSN_CMPIBLE_REG, && case_sem_INSN_CMPIBLE_REG }, | |
286 | { I960BASE_INSN_CMPIBLE_LIT, && case_sem_INSN_CMPIBLE_LIT }, | |
287 | { I960BASE_INSN_CMPIBG_REG, && case_sem_INSN_CMPIBG_REG }, | |
288 | { I960BASE_INSN_CMPIBG_LIT, && case_sem_INSN_CMPIBG_LIT }, | |
289 | { I960BASE_INSN_CMPIBGE_REG, && case_sem_INSN_CMPIBGE_REG }, | |
290 | { I960BASE_INSN_CMPIBGE_LIT, && case_sem_INSN_CMPIBGE_LIT }, | |
291 | { I960BASE_INSN_BBC_REG, && case_sem_INSN_BBC_REG }, | |
292 | { I960BASE_INSN_BBC_LIT, && case_sem_INSN_BBC_LIT }, | |
293 | { I960BASE_INSN_BBS_REG, && case_sem_INSN_BBS_REG }, | |
294 | { I960BASE_INSN_BBS_LIT, && case_sem_INSN_BBS_LIT }, | |
295 | { I960BASE_INSN_CMPI, && case_sem_INSN_CMPI }, | |
296 | { I960BASE_INSN_CMPI1, && case_sem_INSN_CMPI1 }, | |
297 | { I960BASE_INSN_CMPI2, && case_sem_INSN_CMPI2 }, | |
298 | { I960BASE_INSN_CMPI3, && case_sem_INSN_CMPI3 }, | |
299 | { I960BASE_INSN_CMPO, && case_sem_INSN_CMPO }, | |
300 | { I960BASE_INSN_CMPO1, && case_sem_INSN_CMPO1 }, | |
301 | { I960BASE_INSN_CMPO2, && case_sem_INSN_CMPO2 }, | |
302 | { I960BASE_INSN_CMPO3, && case_sem_INSN_CMPO3 }, | |
303 | { I960BASE_INSN_TESTNO_REG, && case_sem_INSN_TESTNO_REG }, | |
304 | { I960BASE_INSN_TESTG_REG, && case_sem_INSN_TESTG_REG }, | |
305 | { I960BASE_INSN_TESTE_REG, && case_sem_INSN_TESTE_REG }, | |
306 | { I960BASE_INSN_TESTGE_REG, && case_sem_INSN_TESTGE_REG }, | |
307 | { I960BASE_INSN_TESTL_REG, && case_sem_INSN_TESTL_REG }, | |
308 | { I960BASE_INSN_TESTNE_REG, && case_sem_INSN_TESTNE_REG }, | |
309 | { I960BASE_INSN_TESTLE_REG, && case_sem_INSN_TESTLE_REG }, | |
310 | { I960BASE_INSN_TESTO_REG, && case_sem_INSN_TESTO_REG }, | |
311 | { I960BASE_INSN_BNO, && case_sem_INSN_BNO }, | |
312 | { I960BASE_INSN_BG, && case_sem_INSN_BG }, | |
313 | { I960BASE_INSN_BE, && case_sem_INSN_BE }, | |
314 | { I960BASE_INSN_BGE, && case_sem_INSN_BGE }, | |
315 | { I960BASE_INSN_BL, && case_sem_INSN_BL }, | |
316 | { I960BASE_INSN_BNE, && case_sem_INSN_BNE }, | |
317 | { I960BASE_INSN_BLE, && case_sem_INSN_BLE }, | |
318 | { I960BASE_INSN_BO, && case_sem_INSN_BO }, | |
319 | { I960BASE_INSN_B, && case_sem_INSN_B }, | |
320 | { I960BASE_INSN_BX_INDIRECT_OFFSET, && case_sem_INSN_BX_INDIRECT_OFFSET }, | |
321 | { I960BASE_INSN_BX_INDIRECT, && case_sem_INSN_BX_INDIRECT }, | |
322 | { I960BASE_INSN_BX_INDIRECT_INDEX, && case_sem_INSN_BX_INDIRECT_INDEX }, | |
323 | { I960BASE_INSN_BX_DISP, && case_sem_INSN_BX_DISP }, | |
324 | { I960BASE_INSN_BX_INDIRECT_DISP, && case_sem_INSN_BX_INDIRECT_DISP }, | |
325 | { I960BASE_INSN_CALLX_DISP, && case_sem_INSN_CALLX_DISP }, | |
326 | { I960BASE_INSN_CALLX_INDIRECT, && case_sem_INSN_CALLX_INDIRECT }, | |
327 | { I960BASE_INSN_CALLX_INDIRECT_OFFSET, && case_sem_INSN_CALLX_INDIRECT_OFFSET }, | |
328 | { I960BASE_INSN_RET, && case_sem_INSN_RET }, | |
329 | { I960BASE_INSN_CALLS, && case_sem_INSN_CALLS }, | |
330 | { I960BASE_INSN_FMARK, && case_sem_INSN_FMARK }, | |
331 | { I960BASE_INSN_FLUSHREG, && case_sem_INSN_FLUSHREG }, | |
332 | { 0, 0 } | |
333 | }; | |
334 | int i; | |
335 | ||
336 | for (i = 0; labels[i].label != 0; ++i) | |
96baa820 | 337 | { |
c906108c | 338 | #if FAST_P |
96baa820 | 339 | CPU_IDESC (current_cpu) [labels[i].index].sem_fast_lab = labels[i].label; |
c906108c | 340 | #else |
96baa820 | 341 | CPU_IDESC (current_cpu) [labels[i].index].sem_full_lab = labels[i].label; |
c906108c | 342 | #endif |
96baa820 | 343 | } |
c906108c SS |
344 | |
345 | #undef DEFINE_LABELS | |
346 | #endif /* DEFINE_LABELS */ | |
347 | ||
348 | #ifdef DEFINE_SWITCH | |
349 | ||
350 | /* If hyper-fast [well not unnecessarily slow] execution is selected, turn | |
351 | off frills like tracing and profiling. */ | |
352 | /* FIXME: A better way would be to have TRACE_RESULT check for something | |
353 | that can cause it to be optimized out. Another way would be to emit | |
354 | special handlers into the instruction "stream". */ | |
355 | ||
356 | #if FAST_P | |
357 | #undef TRACE_RESULT | |
358 | #define TRACE_RESULT(cpu, abuf, name, type, val) | |
359 | #endif | |
360 | ||
361 | #undef GET_ATTR | |
362 | #define GET_ATTR(cpu, num, attr) CGEN_ATTR_VALUE (NULL, abuf->idesc->attrs, CGEN_INSN_##attr) | |
363 | ||
364 | { | |
365 | ||
366 | #if WITH_SCACHE_PBB | |
367 | ||
368 | /* Branch to next handler without going around main loop. */ | |
369 | #define NEXT(vpc) goto * SEM_ARGBUF (vpc) -> semantic.sem_case | |
370 | SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) | |
371 | ||
372 | #else /* ! WITH_SCACHE_PBB */ | |
373 | ||
374 | #define NEXT(vpc) BREAK (sem) | |
375 | #ifdef __GNUC__ | |
376 | #if FAST_P | |
377 | SWITCH (sem, SEM_ARGBUF (sc) -> idesc->sem_fast_lab) | |
378 | #else | |
379 | SWITCH (sem, SEM_ARGBUF (sc) -> idesc->sem_full_lab) | |
380 | #endif | |
381 | #else | |
382 | SWITCH (sem, SEM_ARGBUF (sc) -> idesc->num) | |
383 | #endif | |
384 | ||
385 | #endif /* ! WITH_SCACHE_PBB */ | |
386 | ||
387 | { | |
388 | ||
389 | CASE (sem, INSN_X_INVALID) : /* --invalid-- */ | |
390 | { | |
391 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
392 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
393 | #define FLD(f) abuf->fields.fmt_empty.f | |
394 | int UNUSED written = 0; | |
395 | IADDR UNUSED pc = abuf->addr; | |
396 | vpc = SEM_NEXT_VPC (sem_arg, pc, 0); | |
397 | ||
398 | { | |
399 | #if WITH_SCACHE | |
400 | /* Update the recorded pc in the cpu state struct. */ | |
401 | SET_H_PC (pc); | |
402 | #endif | |
403 | sim_engine_invalid_insn (current_cpu, pc); | |
404 | sim_io_error (CPU_STATE (current_cpu), "invalid insn not handled\n"); | |
405 | /* NOTREACHED */ | |
406 | } | |
407 | ||
408 | #undef FLD | |
409 | } | |
410 | NEXT (vpc); | |
411 | ||
412 | CASE (sem, INSN_X_AFTER) : /* --after-- */ | |
413 | { | |
414 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
415 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
416 | #define FLD(f) abuf->fields.fmt_empty.f | |
417 | int UNUSED written = 0; | |
418 | IADDR UNUSED pc = abuf->addr; | |
419 | vpc = SEM_NEXT_VPC (sem_arg, pc, 0); | |
420 | ||
421 | { | |
422 | #if WITH_SCACHE_PBB_I960BASE | |
423 | i960base_pbb_after (current_cpu, sem_arg); | |
424 | #endif | |
425 | } | |
426 | ||
427 | #undef FLD | |
428 | } | |
429 | NEXT (vpc); | |
430 | ||
431 | CASE (sem, INSN_X_BEFORE) : /* --before-- */ | |
432 | { | |
433 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
434 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
435 | #define FLD(f) abuf->fields.fmt_empty.f | |
436 | int UNUSED written = 0; | |
437 | IADDR UNUSED pc = abuf->addr; | |
438 | vpc = SEM_NEXT_VPC (sem_arg, pc, 0); | |
439 | ||
440 | { | |
441 | #if WITH_SCACHE_PBB_I960BASE | |
442 | i960base_pbb_before (current_cpu, sem_arg); | |
443 | #endif | |
444 | } | |
445 | ||
446 | #undef FLD | |
447 | } | |
448 | NEXT (vpc); | |
449 | ||
450 | CASE (sem, INSN_X_CTI_CHAIN) : /* --cti-chain-- */ | |
451 | { | |
452 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
453 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
454 | #define FLD(f) abuf->fields.fmt_empty.f | |
455 | int UNUSED written = 0; | |
456 | IADDR UNUSED pc = abuf->addr; | |
457 | vpc = SEM_NEXT_VPC (sem_arg, pc, 0); | |
458 | ||
459 | { | |
460 | #if WITH_SCACHE_PBB_I960BASE | |
461 | #ifdef DEFINE_SWITCH | |
462 | vpc = i960base_pbb_cti_chain (current_cpu, sem_arg, | |
96baa820 | 463 | pbb_br_type, pbb_br_npc); |
c906108c SS |
464 | BREAK (sem); |
465 | #else | |
466 | /* FIXME: Allow provision of explicit ifmt spec in insn spec. */ | |
467 | vpc = i960base_pbb_cti_chain (current_cpu, sem_arg, | |
96baa820 | 468 | CPU_PBB_BR_TYPE (current_cpu), |
c906108c SS |
469 | CPU_PBB_BR_NPC (current_cpu)); |
470 | #endif | |
471 | #endif | |
472 | } | |
473 | ||
474 | #undef FLD | |
475 | } | |
476 | NEXT (vpc); | |
477 | ||
478 | CASE (sem, INSN_X_CHAIN) : /* --chain-- */ | |
479 | { | |
480 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
481 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
482 | #define FLD(f) abuf->fields.fmt_empty.f | |
483 | int UNUSED written = 0; | |
484 | IADDR UNUSED pc = abuf->addr; | |
485 | vpc = SEM_NEXT_VPC (sem_arg, pc, 0); | |
486 | ||
487 | { | |
488 | #if WITH_SCACHE_PBB_I960BASE | |
489 | vpc = i960base_pbb_chain (current_cpu, sem_arg); | |
490 | #ifdef DEFINE_SWITCH | |
491 | BREAK (sem); | |
492 | #endif | |
493 | #endif | |
494 | } | |
495 | ||
496 | #undef FLD | |
497 | } | |
498 | NEXT (vpc); | |
499 | ||
500 | CASE (sem, INSN_X_BEGIN) : /* --begin-- */ | |
501 | { | |
502 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
503 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
504 | #define FLD(f) abuf->fields.fmt_empty.f | |
505 | int UNUSED written = 0; | |
506 | IADDR UNUSED pc = abuf->addr; | |
507 | vpc = SEM_NEXT_VPC (sem_arg, pc, 0); | |
508 | ||
509 | { | |
510 | #if WITH_SCACHE_PBB_I960BASE | |
511 | #ifdef DEFINE_SWITCH | |
512 | /* In the switch case FAST_P is a constant, allowing several optimizations | |
513 | in any called inline functions. */ | |
514 | vpc = i960base_pbb_begin (current_cpu, FAST_P); | |
515 | #else | |
516 | vpc = i960base_pbb_begin (current_cpu, STATE_RUN_FAST_P (CPU_STATE (current_cpu))); | |
517 | #endif | |
518 | #endif | |
519 | } | |
520 | ||
521 | #undef FLD | |
522 | } | |
523 | NEXT (vpc); | |
524 | ||
525 | CASE (sem, INSN_MULO) : /* mulo $src1, $src2, $dst */ | |
526 | { | |
527 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
528 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 529 | #define FLD(f) abuf->fields.sfmt_emul.f |
c906108c SS |
530 | int UNUSED written = 0; |
531 | IADDR UNUSED pc = abuf->addr; | |
532 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
533 | ||
534 | { | |
535 | SI opval = MULSI (* FLD (i_src1), * FLD (i_src2)); | |
536 | * FLD (i_dst) = opval; | |
537 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
538 | } | |
539 | ||
540 | #undef FLD | |
541 | } | |
542 | NEXT (vpc); | |
543 | ||
544 | CASE (sem, INSN_MULO1) : /* mulo $lit1, $src2, $dst */ | |
545 | { | |
546 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
547 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 548 | #define FLD(f) abuf->fields.sfmt_emul1.f |
c906108c SS |
549 | int UNUSED written = 0; |
550 | IADDR UNUSED pc = abuf->addr; | |
551 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
552 | ||
553 | { | |
554 | SI opval = MULSI (FLD (f_src1), * FLD (i_src2)); | |
555 | * FLD (i_dst) = opval; | |
556 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
557 | } | |
558 | ||
559 | #undef FLD | |
560 | } | |
561 | NEXT (vpc); | |
562 | ||
563 | CASE (sem, INSN_MULO2) : /* mulo $src1, $lit2, $dst */ | |
564 | { | |
565 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
566 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 567 | #define FLD(f) abuf->fields.sfmt_emul2.f |
c906108c SS |
568 | int UNUSED written = 0; |
569 | IADDR UNUSED pc = abuf->addr; | |
570 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
571 | ||
572 | { | |
573 | SI opval = MULSI (* FLD (i_src1), FLD (f_src2)); | |
574 | * FLD (i_dst) = opval; | |
575 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
576 | } | |
577 | ||
578 | #undef FLD | |
579 | } | |
580 | NEXT (vpc); | |
581 | ||
582 | CASE (sem, INSN_MULO3) : /* mulo $lit1, $lit2, $dst */ | |
583 | { | |
584 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
585 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 586 | #define FLD(f) abuf->fields.sfmt_emul3.f |
c906108c SS |
587 | int UNUSED written = 0; |
588 | IADDR UNUSED pc = abuf->addr; | |
589 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
590 | ||
591 | { | |
592 | SI opval = MULSI (FLD (f_src1), FLD (f_src2)); | |
593 | * FLD (i_dst) = opval; | |
594 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
595 | } | |
596 | ||
597 | #undef FLD | |
598 | } | |
599 | NEXT (vpc); | |
600 | ||
601 | CASE (sem, INSN_REMO) : /* remo $src1, $src2, $dst */ | |
602 | { | |
603 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
604 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 605 | #define FLD(f) abuf->fields.sfmt_emul.f |
c906108c SS |
606 | int UNUSED written = 0; |
607 | IADDR UNUSED pc = abuf->addr; | |
608 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
609 | ||
610 | { | |
611 | SI opval = UMODSI (* FLD (i_src2), * FLD (i_src1)); | |
612 | * FLD (i_dst) = opval; | |
613 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
614 | } | |
615 | ||
616 | #undef FLD | |
617 | } | |
618 | NEXT (vpc); | |
619 | ||
620 | CASE (sem, INSN_REMO1) : /* remo $lit1, $src2, $dst */ | |
621 | { | |
622 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
623 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 624 | #define FLD(f) abuf->fields.sfmt_emul1.f |
c906108c SS |
625 | int UNUSED written = 0; |
626 | IADDR UNUSED pc = abuf->addr; | |
627 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
628 | ||
629 | { | |
630 | SI opval = UMODSI (* FLD (i_src2), FLD (f_src1)); | |
631 | * FLD (i_dst) = opval; | |
632 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
633 | } | |
634 | ||
635 | #undef FLD | |
636 | } | |
637 | NEXT (vpc); | |
638 | ||
639 | CASE (sem, INSN_REMO2) : /* remo $src1, $lit2, $dst */ | |
640 | { | |
641 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
642 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 643 | #define FLD(f) abuf->fields.sfmt_emul2.f |
c906108c SS |
644 | int UNUSED written = 0; |
645 | IADDR UNUSED pc = abuf->addr; | |
646 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
647 | ||
648 | { | |
649 | SI opval = UMODSI (FLD (f_src2), * FLD (i_src1)); | |
650 | * FLD (i_dst) = opval; | |
651 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
652 | } | |
653 | ||
654 | #undef FLD | |
655 | } | |
656 | NEXT (vpc); | |
657 | ||
658 | CASE (sem, INSN_REMO3) : /* remo $lit1, $lit2, $dst */ | |
659 | { | |
660 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
661 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 662 | #define FLD(f) abuf->fields.sfmt_emul3.f |
c906108c SS |
663 | int UNUSED written = 0; |
664 | IADDR UNUSED pc = abuf->addr; | |
665 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
666 | ||
667 | { | |
668 | SI opval = UMODSI (FLD (f_src2), FLD (f_src1)); | |
669 | * FLD (i_dst) = opval; | |
670 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
671 | } | |
672 | ||
673 | #undef FLD | |
674 | } | |
675 | NEXT (vpc); | |
676 | ||
677 | CASE (sem, INSN_DIVO) : /* divo $src1, $src2, $dst */ | |
678 | { | |
679 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
680 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 681 | #define FLD(f) abuf->fields.sfmt_emul.f |
c906108c SS |
682 | int UNUSED written = 0; |
683 | IADDR UNUSED pc = abuf->addr; | |
684 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
685 | ||
686 | { | |
687 | SI opval = UDIVSI (* FLD (i_src2), * FLD (i_src1)); | |
688 | * FLD (i_dst) = opval; | |
689 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
690 | } | |
691 | ||
692 | #undef FLD | |
693 | } | |
694 | NEXT (vpc); | |
695 | ||
696 | CASE (sem, INSN_DIVO1) : /* divo $lit1, $src2, $dst */ | |
697 | { | |
698 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
699 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 700 | #define FLD(f) abuf->fields.sfmt_emul1.f |
c906108c SS |
701 | int UNUSED written = 0; |
702 | IADDR UNUSED pc = abuf->addr; | |
703 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
704 | ||
705 | { | |
706 | SI opval = UDIVSI (* FLD (i_src2), FLD (f_src1)); | |
707 | * FLD (i_dst) = opval; | |
708 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
709 | } | |
710 | ||
711 | #undef FLD | |
712 | } | |
713 | NEXT (vpc); | |
714 | ||
715 | CASE (sem, INSN_DIVO2) : /* divo $src1, $lit2, $dst */ | |
716 | { | |
717 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
718 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 719 | #define FLD(f) abuf->fields.sfmt_emul2.f |
c906108c SS |
720 | int UNUSED written = 0; |
721 | IADDR UNUSED pc = abuf->addr; | |
722 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
723 | ||
724 | { | |
725 | SI opval = UDIVSI (FLD (f_src2), * FLD (i_src1)); | |
726 | * FLD (i_dst) = opval; | |
727 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
728 | } | |
729 | ||
730 | #undef FLD | |
731 | } | |
732 | NEXT (vpc); | |
733 | ||
734 | CASE (sem, INSN_DIVO3) : /* divo $lit1, $lit2, $dst */ | |
735 | { | |
736 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
737 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 738 | #define FLD(f) abuf->fields.sfmt_emul3.f |
c906108c SS |
739 | int UNUSED written = 0; |
740 | IADDR UNUSED pc = abuf->addr; | |
741 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
742 | ||
743 | { | |
744 | SI opval = UDIVSI (FLD (f_src2), FLD (f_src1)); | |
745 | * FLD (i_dst) = opval; | |
746 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
747 | } | |
748 | ||
749 | #undef FLD | |
750 | } | |
751 | NEXT (vpc); | |
752 | ||
753 | CASE (sem, INSN_REMI) : /* remi $src1, $src2, $dst */ | |
754 | { | |
755 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
756 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 757 | #define FLD(f) abuf->fields.sfmt_emul.f |
c906108c SS |
758 | int UNUSED written = 0; |
759 | IADDR UNUSED pc = abuf->addr; | |
760 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
761 | ||
762 | { | |
763 | SI opval = MODSI (* FLD (i_src2), * FLD (i_src1)); | |
764 | * FLD (i_dst) = opval; | |
765 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
766 | } | |
767 | ||
768 | #undef FLD | |
769 | } | |
770 | NEXT (vpc); | |
771 | ||
772 | CASE (sem, INSN_REMI1) : /* remi $lit1, $src2, $dst */ | |
773 | { | |
774 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
775 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 776 | #define FLD(f) abuf->fields.sfmt_emul1.f |
c906108c SS |
777 | int UNUSED written = 0; |
778 | IADDR UNUSED pc = abuf->addr; | |
779 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
780 | ||
781 | { | |
782 | SI opval = MODSI (* FLD (i_src2), FLD (f_src1)); | |
783 | * FLD (i_dst) = opval; | |
784 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
785 | } | |
786 | ||
787 | #undef FLD | |
788 | } | |
789 | NEXT (vpc); | |
790 | ||
791 | CASE (sem, INSN_REMI2) : /* remi $src1, $lit2, $dst */ | |
792 | { | |
793 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
794 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 795 | #define FLD(f) abuf->fields.sfmt_emul2.f |
c906108c SS |
796 | int UNUSED written = 0; |
797 | IADDR UNUSED pc = abuf->addr; | |
798 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
799 | ||
800 | { | |
801 | SI opval = MODSI (FLD (f_src2), * FLD (i_src1)); | |
802 | * FLD (i_dst) = opval; | |
803 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
804 | } | |
805 | ||
806 | #undef FLD | |
807 | } | |
808 | NEXT (vpc); | |
809 | ||
810 | CASE (sem, INSN_REMI3) : /* remi $lit1, $lit2, $dst */ | |
811 | { | |
812 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
813 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 814 | #define FLD(f) abuf->fields.sfmt_emul3.f |
c906108c SS |
815 | int UNUSED written = 0; |
816 | IADDR UNUSED pc = abuf->addr; | |
817 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
818 | ||
819 | { | |
820 | SI opval = MODSI (FLD (f_src2), FLD (f_src1)); | |
821 | * FLD (i_dst) = opval; | |
822 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
823 | } | |
824 | ||
825 | #undef FLD | |
826 | } | |
827 | NEXT (vpc); | |
828 | ||
829 | CASE (sem, INSN_DIVI) : /* divi $src1, $src2, $dst */ | |
830 | { | |
831 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
832 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 833 | #define FLD(f) abuf->fields.sfmt_emul.f |
c906108c SS |
834 | int UNUSED written = 0; |
835 | IADDR UNUSED pc = abuf->addr; | |
836 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
837 | ||
838 | { | |
839 | SI opval = DIVSI (* FLD (i_src2), * FLD (i_src1)); | |
840 | * FLD (i_dst) = opval; | |
841 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
842 | } | |
843 | ||
844 | #undef FLD | |
845 | } | |
846 | NEXT (vpc); | |
847 | ||
848 | CASE (sem, INSN_DIVI1) : /* divi $lit1, $src2, $dst */ | |
849 | { | |
850 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
851 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 852 | #define FLD(f) abuf->fields.sfmt_emul1.f |
c906108c SS |
853 | int UNUSED written = 0; |
854 | IADDR UNUSED pc = abuf->addr; | |
855 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
856 | ||
857 | { | |
858 | SI opval = DIVSI (* FLD (i_src2), FLD (f_src1)); | |
859 | * FLD (i_dst) = opval; | |
860 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
861 | } | |
862 | ||
863 | #undef FLD | |
864 | } | |
865 | NEXT (vpc); | |
866 | ||
867 | CASE (sem, INSN_DIVI2) : /* divi $src1, $lit2, $dst */ | |
868 | { | |
869 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
870 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 871 | #define FLD(f) abuf->fields.sfmt_emul2.f |
c906108c SS |
872 | int UNUSED written = 0; |
873 | IADDR UNUSED pc = abuf->addr; | |
874 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
875 | ||
876 | { | |
877 | SI opval = DIVSI (FLD (f_src2), * FLD (i_src1)); | |
878 | * FLD (i_dst) = opval; | |
879 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
880 | } | |
881 | ||
882 | #undef FLD | |
883 | } | |
884 | NEXT (vpc); | |
885 | ||
886 | CASE (sem, INSN_DIVI3) : /* divi $lit1, $lit2, $dst */ | |
887 | { | |
888 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
889 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 890 | #define FLD(f) abuf->fields.sfmt_emul3.f |
c906108c SS |
891 | int UNUSED written = 0; |
892 | IADDR UNUSED pc = abuf->addr; | |
893 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
894 | ||
895 | { | |
896 | SI opval = DIVSI (FLD (f_src2), FLD (f_src1)); | |
897 | * FLD (i_dst) = opval; | |
898 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
899 | } | |
900 | ||
901 | #undef FLD | |
902 | } | |
903 | NEXT (vpc); | |
904 | ||
905 | CASE (sem, INSN_ADDO) : /* addo $src1, $src2, $dst */ | |
906 | { | |
907 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
908 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 909 | #define FLD(f) abuf->fields.sfmt_emul.f |
c906108c SS |
910 | int UNUSED written = 0; |
911 | IADDR UNUSED pc = abuf->addr; | |
912 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
913 | ||
914 | { | |
915 | SI opval = ADDSI (* FLD (i_src1), * FLD (i_src2)); | |
916 | * FLD (i_dst) = opval; | |
917 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
918 | } | |
919 | ||
920 | #undef FLD | |
921 | } | |
922 | NEXT (vpc); | |
923 | ||
924 | CASE (sem, INSN_ADDO1) : /* addo $lit1, $src2, $dst */ | |
925 | { | |
926 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
927 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 928 | #define FLD(f) abuf->fields.sfmt_emul1.f |
c906108c SS |
929 | int UNUSED written = 0; |
930 | IADDR UNUSED pc = abuf->addr; | |
931 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
932 | ||
933 | { | |
934 | SI opval = ADDSI (FLD (f_src1), * FLD (i_src2)); | |
935 | * FLD (i_dst) = opval; | |
936 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
937 | } | |
938 | ||
939 | #undef FLD | |
940 | } | |
941 | NEXT (vpc); | |
942 | ||
943 | CASE (sem, INSN_ADDO2) : /* addo $src1, $lit2, $dst */ | |
944 | { | |
945 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
946 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 947 | #define FLD(f) abuf->fields.sfmt_emul2.f |
c906108c SS |
948 | int UNUSED written = 0; |
949 | IADDR UNUSED pc = abuf->addr; | |
950 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
951 | ||
952 | { | |
953 | SI opval = ADDSI (* FLD (i_src1), FLD (f_src2)); | |
954 | * FLD (i_dst) = opval; | |
955 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
956 | } | |
957 | ||
958 | #undef FLD | |
959 | } | |
960 | NEXT (vpc); | |
961 | ||
962 | CASE (sem, INSN_ADDO3) : /* addo $lit1, $lit2, $dst */ | |
963 | { | |
964 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
965 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 966 | #define FLD(f) abuf->fields.sfmt_emul3.f |
c906108c SS |
967 | int UNUSED written = 0; |
968 | IADDR UNUSED pc = abuf->addr; | |
969 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
970 | ||
971 | { | |
972 | SI opval = ADDSI (FLD (f_src1), FLD (f_src2)); | |
973 | * FLD (i_dst) = opval; | |
974 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
975 | } | |
976 | ||
977 | #undef FLD | |
978 | } | |
979 | NEXT (vpc); | |
980 | ||
981 | CASE (sem, INSN_SUBO) : /* subo $src1, $src2, $dst */ | |
982 | { | |
983 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
984 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 985 | #define FLD(f) abuf->fields.sfmt_emul.f |
c906108c SS |
986 | int UNUSED written = 0; |
987 | IADDR UNUSED pc = abuf->addr; | |
988 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
989 | ||
990 | { | |
991 | SI opval = SUBSI (* FLD (i_src2), * FLD (i_src1)); | |
992 | * FLD (i_dst) = opval; | |
993 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
994 | } | |
995 | ||
996 | #undef FLD | |
997 | } | |
998 | NEXT (vpc); | |
999 | ||
1000 | CASE (sem, INSN_SUBO1) : /* subo $lit1, $src2, $dst */ | |
1001 | { | |
1002 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1003 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1004 | #define FLD(f) abuf->fields.sfmt_emul1.f |
c906108c SS |
1005 | int UNUSED written = 0; |
1006 | IADDR UNUSED pc = abuf->addr; | |
1007 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1008 | ||
1009 | { | |
1010 | SI opval = SUBSI (* FLD (i_src2), FLD (f_src1)); | |
1011 | * FLD (i_dst) = opval; | |
1012 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1013 | } | |
1014 | ||
1015 | #undef FLD | |
1016 | } | |
1017 | NEXT (vpc); | |
1018 | ||
1019 | CASE (sem, INSN_SUBO2) : /* subo $src1, $lit2, $dst */ | |
1020 | { | |
1021 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1022 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1023 | #define FLD(f) abuf->fields.sfmt_emul2.f |
c906108c SS |
1024 | int UNUSED written = 0; |
1025 | IADDR UNUSED pc = abuf->addr; | |
1026 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1027 | ||
1028 | { | |
1029 | SI opval = SUBSI (FLD (f_src2), * FLD (i_src1)); | |
1030 | * FLD (i_dst) = opval; | |
1031 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1032 | } | |
1033 | ||
1034 | #undef FLD | |
1035 | } | |
1036 | NEXT (vpc); | |
1037 | ||
1038 | CASE (sem, INSN_SUBO3) : /* subo $lit1, $lit2, $dst */ | |
1039 | { | |
1040 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1041 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1042 | #define FLD(f) abuf->fields.sfmt_emul3.f |
c906108c SS |
1043 | int UNUSED written = 0; |
1044 | IADDR UNUSED pc = abuf->addr; | |
1045 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1046 | ||
1047 | { | |
1048 | SI opval = SUBSI (FLD (f_src2), FLD (f_src1)); | |
1049 | * FLD (i_dst) = opval; | |
1050 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1051 | } | |
1052 | ||
1053 | #undef FLD | |
1054 | } | |
1055 | NEXT (vpc); | |
1056 | ||
1057 | CASE (sem, INSN_NOTBIT) : /* notbit $src1, $src2, $dst */ | |
1058 | { | |
1059 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1060 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1061 | #define FLD(f) abuf->fields.sfmt_emul.f |
c906108c SS |
1062 | int UNUSED written = 0; |
1063 | IADDR UNUSED pc = abuf->addr; | |
1064 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1065 | ||
1066 | { | |
1067 | SI opval = XORSI (SLLSI (1, * FLD (i_src1)), * FLD (i_src2)); | |
1068 | * FLD (i_dst) = opval; | |
1069 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1070 | } | |
1071 | ||
1072 | #undef FLD | |
1073 | } | |
1074 | NEXT (vpc); | |
1075 | ||
1076 | CASE (sem, INSN_NOTBIT1) : /* notbit $lit1, $src2, $dst */ | |
1077 | { | |
1078 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1079 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1080 | #define FLD(f) abuf->fields.sfmt_emul1.f |
c906108c SS |
1081 | int UNUSED written = 0; |
1082 | IADDR UNUSED pc = abuf->addr; | |
1083 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1084 | ||
1085 | { | |
1086 | SI opval = XORSI (SLLSI (1, FLD (f_src1)), * FLD (i_src2)); | |
1087 | * FLD (i_dst) = opval; | |
1088 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1089 | } | |
1090 | ||
1091 | #undef FLD | |
1092 | } | |
1093 | NEXT (vpc); | |
1094 | ||
1095 | CASE (sem, INSN_NOTBIT2) : /* notbit $src1, $lit2, $dst */ | |
1096 | { | |
1097 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1098 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1099 | #define FLD(f) abuf->fields.sfmt_emul2.f |
c906108c SS |
1100 | int UNUSED written = 0; |
1101 | IADDR UNUSED pc = abuf->addr; | |
1102 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1103 | ||
1104 | { | |
1105 | SI opval = XORSI (SLLSI (1, * FLD (i_src1)), FLD (f_src2)); | |
1106 | * FLD (i_dst) = opval; | |
1107 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1108 | } | |
1109 | ||
1110 | #undef FLD | |
1111 | } | |
1112 | NEXT (vpc); | |
1113 | ||
1114 | CASE (sem, INSN_NOTBIT3) : /* notbit $lit1, $lit2, $dst */ | |
1115 | { | |
1116 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1117 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1118 | #define FLD(f) abuf->fields.sfmt_emul3.f |
c906108c SS |
1119 | int UNUSED written = 0; |
1120 | IADDR UNUSED pc = abuf->addr; | |
1121 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1122 | ||
1123 | { | |
1124 | SI opval = XORSI (SLLSI (1, FLD (f_src1)), FLD (f_src2)); | |
1125 | * FLD (i_dst) = opval; | |
1126 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1127 | } | |
1128 | ||
1129 | #undef FLD | |
1130 | } | |
1131 | NEXT (vpc); | |
1132 | ||
1133 | CASE (sem, INSN_AND) : /* and $src1, $src2, $dst */ | |
1134 | { | |
1135 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1136 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1137 | #define FLD(f) abuf->fields.sfmt_emul.f |
c906108c SS |
1138 | int UNUSED written = 0; |
1139 | IADDR UNUSED pc = abuf->addr; | |
1140 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1141 | ||
1142 | { | |
1143 | SI opval = ANDSI (* FLD (i_src1), * FLD (i_src2)); | |
1144 | * FLD (i_dst) = opval; | |
1145 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1146 | } | |
1147 | ||
1148 | #undef FLD | |
1149 | } | |
1150 | NEXT (vpc); | |
1151 | ||
1152 | CASE (sem, INSN_AND1) : /* and $lit1, $src2, $dst */ | |
1153 | { | |
1154 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1155 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1156 | #define FLD(f) abuf->fields.sfmt_emul1.f |
c906108c SS |
1157 | int UNUSED written = 0; |
1158 | IADDR UNUSED pc = abuf->addr; | |
1159 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1160 | ||
1161 | { | |
1162 | SI opval = ANDSI (FLD (f_src1), * FLD (i_src2)); | |
1163 | * FLD (i_dst) = opval; | |
1164 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1165 | } | |
1166 | ||
1167 | #undef FLD | |
1168 | } | |
1169 | NEXT (vpc); | |
1170 | ||
1171 | CASE (sem, INSN_AND2) : /* and $src1, $lit2, $dst */ | |
1172 | { | |
1173 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1174 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1175 | #define FLD(f) abuf->fields.sfmt_emul2.f |
c906108c SS |
1176 | int UNUSED written = 0; |
1177 | IADDR UNUSED pc = abuf->addr; | |
1178 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1179 | ||
1180 | { | |
1181 | SI opval = ANDSI (* FLD (i_src1), FLD (f_src2)); | |
1182 | * FLD (i_dst) = opval; | |
1183 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1184 | } | |
1185 | ||
1186 | #undef FLD | |
1187 | } | |
1188 | NEXT (vpc); | |
1189 | ||
1190 | CASE (sem, INSN_AND3) : /* and $lit1, $lit2, $dst */ | |
1191 | { | |
1192 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1193 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1194 | #define FLD(f) abuf->fields.sfmt_emul3.f |
c906108c SS |
1195 | int UNUSED written = 0; |
1196 | IADDR UNUSED pc = abuf->addr; | |
1197 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1198 | ||
1199 | { | |
1200 | SI opval = ANDSI (FLD (f_src1), FLD (f_src2)); | |
1201 | * FLD (i_dst) = opval; | |
1202 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1203 | } | |
1204 | ||
1205 | #undef FLD | |
1206 | } | |
1207 | NEXT (vpc); | |
1208 | ||
1209 | CASE (sem, INSN_ANDNOT) : /* andnot $src1, $src2, $dst */ | |
1210 | { | |
1211 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1212 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1213 | #define FLD(f) abuf->fields.sfmt_emul.f |
c906108c SS |
1214 | int UNUSED written = 0; |
1215 | IADDR UNUSED pc = abuf->addr; | |
1216 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1217 | ||
1218 | { | |
1219 | SI opval = ANDSI (* FLD (i_src2), INVSI (* FLD (i_src1))); | |
1220 | * FLD (i_dst) = opval; | |
1221 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1222 | } | |
1223 | ||
1224 | #undef FLD | |
1225 | } | |
1226 | NEXT (vpc); | |
1227 | ||
1228 | CASE (sem, INSN_ANDNOT1) : /* andnot $lit1, $src2, $dst */ | |
1229 | { | |
1230 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1231 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1232 | #define FLD(f) abuf->fields.sfmt_emul1.f |
c906108c SS |
1233 | int UNUSED written = 0; |
1234 | IADDR UNUSED pc = abuf->addr; | |
1235 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1236 | ||
1237 | { | |
1238 | SI opval = ANDSI (* FLD (i_src2), INVSI (FLD (f_src1))); | |
1239 | * FLD (i_dst) = opval; | |
1240 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1241 | } | |
1242 | ||
1243 | #undef FLD | |
1244 | } | |
1245 | NEXT (vpc); | |
1246 | ||
1247 | CASE (sem, INSN_ANDNOT2) : /* andnot $src1, $lit2, $dst */ | |
1248 | { | |
1249 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1250 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1251 | #define FLD(f) abuf->fields.sfmt_emul2.f |
c906108c SS |
1252 | int UNUSED written = 0; |
1253 | IADDR UNUSED pc = abuf->addr; | |
1254 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1255 | ||
1256 | { | |
1257 | SI opval = ANDSI (FLD (f_src2), INVSI (* FLD (i_src1))); | |
1258 | * FLD (i_dst) = opval; | |
1259 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1260 | } | |
1261 | ||
1262 | #undef FLD | |
1263 | } | |
1264 | NEXT (vpc); | |
1265 | ||
1266 | CASE (sem, INSN_ANDNOT3) : /* andnot $lit1, $lit2, $dst */ | |
1267 | { | |
1268 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1269 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1270 | #define FLD(f) abuf->fields.sfmt_emul3.f |
c906108c SS |
1271 | int UNUSED written = 0; |
1272 | IADDR UNUSED pc = abuf->addr; | |
1273 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1274 | ||
1275 | { | |
1276 | SI opval = ANDSI (FLD (f_src2), INVSI (FLD (f_src1))); | |
1277 | * FLD (i_dst) = opval; | |
1278 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1279 | } | |
1280 | ||
1281 | #undef FLD | |
1282 | } | |
1283 | NEXT (vpc); | |
1284 | ||
1285 | CASE (sem, INSN_SETBIT) : /* setbit $src1, $src2, $dst */ | |
1286 | { | |
1287 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1288 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1289 | #define FLD(f) abuf->fields.sfmt_emul.f |
c906108c SS |
1290 | int UNUSED written = 0; |
1291 | IADDR UNUSED pc = abuf->addr; | |
1292 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1293 | ||
1294 | { | |
1295 | SI opval = ORSI (SLLSI (1, * FLD (i_src1)), * FLD (i_src2)); | |
1296 | * FLD (i_dst) = opval; | |
1297 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1298 | } | |
1299 | ||
1300 | #undef FLD | |
1301 | } | |
1302 | NEXT (vpc); | |
1303 | ||
1304 | CASE (sem, INSN_SETBIT1) : /* setbit $lit1, $src2, $dst */ | |
1305 | { | |
1306 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1307 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1308 | #define FLD(f) abuf->fields.sfmt_emul1.f |
c906108c SS |
1309 | int UNUSED written = 0; |
1310 | IADDR UNUSED pc = abuf->addr; | |
1311 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1312 | ||
1313 | { | |
1314 | SI opval = ORSI (SLLSI (1, FLD (f_src1)), * FLD (i_src2)); | |
1315 | * FLD (i_dst) = opval; | |
1316 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1317 | } | |
1318 | ||
1319 | #undef FLD | |
1320 | } | |
1321 | NEXT (vpc); | |
1322 | ||
1323 | CASE (sem, INSN_SETBIT2) : /* setbit $src1, $lit2, $dst */ | |
1324 | { | |
1325 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1326 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1327 | #define FLD(f) abuf->fields.sfmt_emul2.f |
c906108c SS |
1328 | int UNUSED written = 0; |
1329 | IADDR UNUSED pc = abuf->addr; | |
1330 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1331 | ||
1332 | { | |
1333 | SI opval = ORSI (SLLSI (1, * FLD (i_src1)), FLD (f_src2)); | |
1334 | * FLD (i_dst) = opval; | |
1335 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1336 | } | |
1337 | ||
1338 | #undef FLD | |
1339 | } | |
1340 | NEXT (vpc); | |
1341 | ||
1342 | CASE (sem, INSN_SETBIT3) : /* setbit $lit1, $lit2, $dst */ | |
1343 | { | |
1344 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1345 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1346 | #define FLD(f) abuf->fields.sfmt_emul3.f |
c906108c SS |
1347 | int UNUSED written = 0; |
1348 | IADDR UNUSED pc = abuf->addr; | |
1349 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1350 | ||
1351 | { | |
1352 | SI opval = ORSI (SLLSI (1, FLD (f_src1)), FLD (f_src2)); | |
1353 | * FLD (i_dst) = opval; | |
1354 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1355 | } | |
1356 | ||
1357 | #undef FLD | |
1358 | } | |
1359 | NEXT (vpc); | |
1360 | ||
1361 | CASE (sem, INSN_NOTAND) : /* notand $src1, $src2, $dst */ | |
1362 | { | |
1363 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1364 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1365 | #define FLD(f) abuf->fields.sfmt_emul.f |
c906108c SS |
1366 | int UNUSED written = 0; |
1367 | IADDR UNUSED pc = abuf->addr; | |
1368 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1369 | ||
1370 | { | |
1371 | SI opval = ANDSI (INVSI (* FLD (i_src2)), * FLD (i_src1)); | |
1372 | * FLD (i_dst) = opval; | |
1373 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1374 | } | |
1375 | ||
1376 | #undef FLD | |
1377 | } | |
1378 | NEXT (vpc); | |
1379 | ||
1380 | CASE (sem, INSN_NOTAND1) : /* notand $lit1, $src2, $dst */ | |
1381 | { | |
1382 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1383 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1384 | #define FLD(f) abuf->fields.sfmt_emul1.f |
c906108c SS |
1385 | int UNUSED written = 0; |
1386 | IADDR UNUSED pc = abuf->addr; | |
1387 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1388 | ||
1389 | { | |
1390 | SI opval = ANDSI (INVSI (* FLD (i_src2)), FLD (f_src1)); | |
1391 | * FLD (i_dst) = opval; | |
1392 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1393 | } | |
1394 | ||
1395 | #undef FLD | |
1396 | } | |
1397 | NEXT (vpc); | |
1398 | ||
1399 | CASE (sem, INSN_NOTAND2) : /* notand $src1, $lit2, $dst */ | |
1400 | { | |
1401 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1402 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1403 | #define FLD(f) abuf->fields.sfmt_emul2.f |
c906108c SS |
1404 | int UNUSED written = 0; |
1405 | IADDR UNUSED pc = abuf->addr; | |
1406 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1407 | ||
1408 | { | |
1409 | SI opval = ANDSI (INVSI (FLD (f_src2)), * FLD (i_src1)); | |
1410 | * FLD (i_dst) = opval; | |
1411 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1412 | } | |
1413 | ||
1414 | #undef FLD | |
1415 | } | |
1416 | NEXT (vpc); | |
1417 | ||
1418 | CASE (sem, INSN_NOTAND3) : /* notand $lit1, $lit2, $dst */ | |
1419 | { | |
1420 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1421 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1422 | #define FLD(f) abuf->fields.sfmt_emul3.f |
c906108c SS |
1423 | int UNUSED written = 0; |
1424 | IADDR UNUSED pc = abuf->addr; | |
1425 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1426 | ||
1427 | { | |
1428 | SI opval = ANDSI (INVSI (FLD (f_src2)), FLD (f_src1)); | |
1429 | * FLD (i_dst) = opval; | |
1430 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1431 | } | |
1432 | ||
1433 | #undef FLD | |
1434 | } | |
1435 | NEXT (vpc); | |
1436 | ||
1437 | CASE (sem, INSN_XOR) : /* xor $src1, $src2, $dst */ | |
1438 | { | |
1439 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1440 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1441 | #define FLD(f) abuf->fields.sfmt_emul.f |
c906108c SS |
1442 | int UNUSED written = 0; |
1443 | IADDR UNUSED pc = abuf->addr; | |
1444 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1445 | ||
1446 | { | |
1447 | SI opval = XORSI (* FLD (i_src1), * FLD (i_src2)); | |
1448 | * FLD (i_dst) = opval; | |
1449 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1450 | } | |
1451 | ||
1452 | #undef FLD | |
1453 | } | |
1454 | NEXT (vpc); | |
1455 | ||
1456 | CASE (sem, INSN_XOR1) : /* xor $lit1, $src2, $dst */ | |
1457 | { | |
1458 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1459 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1460 | #define FLD(f) abuf->fields.sfmt_emul1.f |
c906108c SS |
1461 | int UNUSED written = 0; |
1462 | IADDR UNUSED pc = abuf->addr; | |
1463 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1464 | ||
1465 | { | |
1466 | SI opval = XORSI (FLD (f_src1), * FLD (i_src2)); | |
1467 | * FLD (i_dst) = opval; | |
1468 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1469 | } | |
1470 | ||
1471 | #undef FLD | |
1472 | } | |
1473 | NEXT (vpc); | |
1474 | ||
1475 | CASE (sem, INSN_XOR2) : /* xor $src1, $lit2, $dst */ | |
1476 | { | |
1477 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1478 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1479 | #define FLD(f) abuf->fields.sfmt_emul2.f |
c906108c SS |
1480 | int UNUSED written = 0; |
1481 | IADDR UNUSED pc = abuf->addr; | |
1482 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1483 | ||
1484 | { | |
1485 | SI opval = XORSI (* FLD (i_src1), FLD (f_src2)); | |
1486 | * FLD (i_dst) = opval; | |
1487 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1488 | } | |
1489 | ||
1490 | #undef FLD | |
1491 | } | |
1492 | NEXT (vpc); | |
1493 | ||
1494 | CASE (sem, INSN_XOR3) : /* xor $lit1, $lit2, $dst */ | |
1495 | { | |
1496 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1497 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1498 | #define FLD(f) abuf->fields.sfmt_emul3.f |
c906108c SS |
1499 | int UNUSED written = 0; |
1500 | IADDR UNUSED pc = abuf->addr; | |
1501 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1502 | ||
1503 | { | |
1504 | SI opval = XORSI (FLD (f_src1), FLD (f_src2)); | |
1505 | * FLD (i_dst) = opval; | |
1506 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1507 | } | |
1508 | ||
1509 | #undef FLD | |
1510 | } | |
1511 | NEXT (vpc); | |
1512 | ||
1513 | CASE (sem, INSN_OR) : /* or $src1, $src2, $dst */ | |
1514 | { | |
1515 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1516 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1517 | #define FLD(f) abuf->fields.sfmt_emul.f |
c906108c SS |
1518 | int UNUSED written = 0; |
1519 | IADDR UNUSED pc = abuf->addr; | |
1520 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1521 | ||
1522 | { | |
1523 | SI opval = ORSI (* FLD (i_src1), * FLD (i_src2)); | |
1524 | * FLD (i_dst) = opval; | |
1525 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1526 | } | |
1527 | ||
1528 | #undef FLD | |
1529 | } | |
1530 | NEXT (vpc); | |
1531 | ||
1532 | CASE (sem, INSN_OR1) : /* or $lit1, $src2, $dst */ | |
1533 | { | |
1534 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1535 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1536 | #define FLD(f) abuf->fields.sfmt_emul1.f |
c906108c SS |
1537 | int UNUSED written = 0; |
1538 | IADDR UNUSED pc = abuf->addr; | |
1539 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1540 | ||
1541 | { | |
1542 | SI opval = ORSI (FLD (f_src1), * FLD (i_src2)); | |
1543 | * FLD (i_dst) = opval; | |
1544 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1545 | } | |
1546 | ||
1547 | #undef FLD | |
1548 | } | |
1549 | NEXT (vpc); | |
1550 | ||
1551 | CASE (sem, INSN_OR2) : /* or $src1, $lit2, $dst */ | |
1552 | { | |
1553 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1554 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1555 | #define FLD(f) abuf->fields.sfmt_emul2.f |
c906108c SS |
1556 | int UNUSED written = 0; |
1557 | IADDR UNUSED pc = abuf->addr; | |
1558 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1559 | ||
1560 | { | |
1561 | SI opval = ORSI (* FLD (i_src1), FLD (f_src2)); | |
1562 | * FLD (i_dst) = opval; | |
1563 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1564 | } | |
1565 | ||
1566 | #undef FLD | |
1567 | } | |
1568 | NEXT (vpc); | |
1569 | ||
1570 | CASE (sem, INSN_OR3) : /* or $lit1, $lit2, $dst */ | |
1571 | { | |
1572 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1573 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1574 | #define FLD(f) abuf->fields.sfmt_emul3.f |
c906108c SS |
1575 | int UNUSED written = 0; |
1576 | IADDR UNUSED pc = abuf->addr; | |
1577 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1578 | ||
1579 | { | |
1580 | SI opval = ORSI (FLD (f_src1), FLD (f_src2)); | |
1581 | * FLD (i_dst) = opval; | |
1582 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1583 | } | |
1584 | ||
1585 | #undef FLD | |
1586 | } | |
1587 | NEXT (vpc); | |
1588 | ||
1589 | CASE (sem, INSN_NOR) : /* nor $src1, $src2, $dst */ | |
1590 | { | |
1591 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1592 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1593 | #define FLD(f) abuf->fields.sfmt_emul.f |
c906108c SS |
1594 | int UNUSED written = 0; |
1595 | IADDR UNUSED pc = abuf->addr; | |
1596 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1597 | ||
1598 | { | |
1599 | SI opval = ANDSI (INVSI (* FLD (i_src2)), INVSI (* FLD (i_src1))); | |
1600 | * FLD (i_dst) = opval; | |
1601 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1602 | } | |
1603 | ||
1604 | #undef FLD | |
1605 | } | |
1606 | NEXT (vpc); | |
1607 | ||
1608 | CASE (sem, INSN_NOR1) : /* nor $lit1, $src2, $dst */ | |
1609 | { | |
1610 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1611 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1612 | #define FLD(f) abuf->fields.sfmt_emul1.f |
c906108c SS |
1613 | int UNUSED written = 0; |
1614 | IADDR UNUSED pc = abuf->addr; | |
1615 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1616 | ||
1617 | { | |
1618 | SI opval = ANDSI (INVSI (* FLD (i_src2)), INVSI (FLD (f_src1))); | |
1619 | * FLD (i_dst) = opval; | |
1620 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1621 | } | |
1622 | ||
1623 | #undef FLD | |
1624 | } | |
1625 | NEXT (vpc); | |
1626 | ||
1627 | CASE (sem, INSN_NOR2) : /* nor $src1, $lit2, $dst */ | |
1628 | { | |
1629 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1630 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1631 | #define FLD(f) abuf->fields.sfmt_emul2.f |
c906108c SS |
1632 | int UNUSED written = 0; |
1633 | IADDR UNUSED pc = abuf->addr; | |
1634 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1635 | ||
1636 | { | |
1637 | SI opval = ANDSI (INVSI (FLD (f_src2)), INVSI (* FLD (i_src1))); | |
1638 | * FLD (i_dst) = opval; | |
1639 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1640 | } | |
1641 | ||
1642 | #undef FLD | |
1643 | } | |
1644 | NEXT (vpc); | |
1645 | ||
1646 | CASE (sem, INSN_NOR3) : /* nor $lit1, $lit2, $dst */ | |
1647 | { | |
1648 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1649 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1650 | #define FLD(f) abuf->fields.sfmt_emul3.f |
c906108c SS |
1651 | int UNUSED written = 0; |
1652 | IADDR UNUSED pc = abuf->addr; | |
1653 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1654 | ||
1655 | { | |
1656 | SI opval = ANDSI (INVSI (FLD (f_src2)), INVSI (FLD (f_src1))); | |
1657 | * FLD (i_dst) = opval; | |
1658 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1659 | } | |
1660 | ||
7a292a7a SS |
1661 | #undef FLD |
1662 | } | |
1663 | NEXT (vpc); | |
1664 | ||
1665 | CASE (sem, INSN_XNOR) : /* xnor $src1, $src2, $dst */ | |
1666 | { | |
1667 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1668 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1669 | #define FLD(f) abuf->fields.sfmt_emul.f |
7a292a7a SS |
1670 | int UNUSED written = 0; |
1671 | IADDR UNUSED pc = abuf->addr; | |
1672 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1673 | ||
1674 | { | |
1675 | SI opval = INVSI (XORSI (* FLD (i_src1), * FLD (i_src2))); | |
1676 | * FLD (i_dst) = opval; | |
1677 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1678 | } | |
1679 | ||
1680 | #undef FLD | |
1681 | } | |
1682 | NEXT (vpc); | |
1683 | ||
1684 | CASE (sem, INSN_XNOR1) : /* xnor $lit1, $src2, $dst */ | |
1685 | { | |
1686 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1687 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1688 | #define FLD(f) abuf->fields.sfmt_emul1.f |
7a292a7a SS |
1689 | int UNUSED written = 0; |
1690 | IADDR UNUSED pc = abuf->addr; | |
1691 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1692 | ||
1693 | { | |
1694 | SI opval = INVSI (XORSI (FLD (f_src1), * FLD (i_src2))); | |
1695 | * FLD (i_dst) = opval; | |
1696 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1697 | } | |
1698 | ||
1699 | #undef FLD | |
1700 | } | |
1701 | NEXT (vpc); | |
1702 | ||
1703 | CASE (sem, INSN_XNOR2) : /* xnor $src1, $lit2, $dst */ | |
1704 | { | |
1705 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1706 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1707 | #define FLD(f) abuf->fields.sfmt_emul2.f |
7a292a7a SS |
1708 | int UNUSED written = 0; |
1709 | IADDR UNUSED pc = abuf->addr; | |
1710 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1711 | ||
1712 | { | |
1713 | SI opval = INVSI (XORSI (* FLD (i_src1), FLD (f_src2))); | |
1714 | * FLD (i_dst) = opval; | |
1715 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1716 | } | |
1717 | ||
1718 | #undef FLD | |
1719 | } | |
1720 | NEXT (vpc); | |
1721 | ||
1722 | CASE (sem, INSN_XNOR3) : /* xnor $lit1, $lit2, $dst */ | |
1723 | { | |
1724 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1725 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1726 | #define FLD(f) abuf->fields.sfmt_emul3.f |
7a292a7a SS |
1727 | int UNUSED written = 0; |
1728 | IADDR UNUSED pc = abuf->addr; | |
1729 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1730 | ||
1731 | { | |
1732 | SI opval = INVSI (XORSI (FLD (f_src1), FLD (f_src2))); | |
1733 | * FLD (i_dst) = opval; | |
1734 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1735 | } | |
1736 | ||
c906108c SS |
1737 | #undef FLD |
1738 | } | |
1739 | NEXT (vpc); | |
1740 | ||
1741 | CASE (sem, INSN_NOT) : /* not $src1, $src2, $dst */ | |
1742 | { | |
1743 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1744 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1745 | #define FLD(f) abuf->fields.sfmt_emul2.f |
c906108c SS |
1746 | int UNUSED written = 0; |
1747 | IADDR UNUSED pc = abuf->addr; | |
1748 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1749 | ||
1750 | { | |
1751 | SI opval = INVSI (* FLD (i_src1)); | |
1752 | * FLD (i_dst) = opval; | |
1753 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1754 | } | |
1755 | ||
1756 | #undef FLD | |
1757 | } | |
1758 | NEXT (vpc); | |
1759 | ||
1760 | CASE (sem, INSN_NOT1) : /* not $lit1, $src2, $dst */ | |
1761 | { | |
1762 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1763 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1764 | #define FLD(f) abuf->fields.sfmt_emul3.f |
c906108c SS |
1765 | int UNUSED written = 0; |
1766 | IADDR UNUSED pc = abuf->addr; | |
1767 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1768 | ||
1769 | { | |
1770 | SI opval = INVSI (FLD (f_src1)); | |
1771 | * FLD (i_dst) = opval; | |
1772 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1773 | } | |
1774 | ||
1775 | #undef FLD | |
1776 | } | |
1777 | NEXT (vpc); | |
1778 | ||
1779 | CASE (sem, INSN_NOT2) : /* not $src1, $lit2, $dst */ | |
1780 | { | |
1781 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1782 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1783 | #define FLD(f) abuf->fields.sfmt_emul2.f |
c906108c SS |
1784 | int UNUSED written = 0; |
1785 | IADDR UNUSED pc = abuf->addr; | |
1786 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1787 | ||
1788 | { | |
1789 | SI opval = INVSI (* FLD (i_src1)); | |
1790 | * FLD (i_dst) = opval; | |
1791 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1792 | } | |
1793 | ||
1794 | #undef FLD | |
1795 | } | |
1796 | NEXT (vpc); | |
1797 | ||
1798 | CASE (sem, INSN_NOT3) : /* not $lit1, $lit2, $dst */ | |
1799 | { | |
1800 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1801 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1802 | #define FLD(f) abuf->fields.sfmt_emul3.f |
c906108c SS |
1803 | int UNUSED written = 0; |
1804 | IADDR UNUSED pc = abuf->addr; | |
1805 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1806 | ||
1807 | { | |
1808 | SI opval = INVSI (FLD (f_src1)); | |
1809 | * FLD (i_dst) = opval; | |
1810 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1811 | } | |
1812 | ||
7a292a7a SS |
1813 | #undef FLD |
1814 | } | |
1815 | NEXT (vpc); | |
1816 | ||
1817 | CASE (sem, INSN_ORNOT) : /* ornot $src1, $src2, $dst */ | |
1818 | { | |
1819 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1820 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1821 | #define FLD(f) abuf->fields.sfmt_emul.f |
7a292a7a SS |
1822 | int UNUSED written = 0; |
1823 | IADDR UNUSED pc = abuf->addr; | |
1824 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1825 | ||
1826 | { | |
1827 | SI opval = ORSI (* FLD (i_src2), INVSI (* FLD (i_src1))); | |
1828 | * FLD (i_dst) = opval; | |
1829 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1830 | } | |
1831 | ||
1832 | #undef FLD | |
1833 | } | |
1834 | NEXT (vpc); | |
1835 | ||
1836 | CASE (sem, INSN_ORNOT1) : /* ornot $lit1, $src2, $dst */ | |
1837 | { | |
1838 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1839 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1840 | #define FLD(f) abuf->fields.sfmt_emul1.f |
7a292a7a SS |
1841 | int UNUSED written = 0; |
1842 | IADDR UNUSED pc = abuf->addr; | |
1843 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1844 | ||
1845 | { | |
1846 | SI opval = ORSI (* FLD (i_src2), INVSI (FLD (f_src1))); | |
1847 | * FLD (i_dst) = opval; | |
1848 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1849 | } | |
1850 | ||
1851 | #undef FLD | |
1852 | } | |
1853 | NEXT (vpc); | |
1854 | ||
1855 | CASE (sem, INSN_ORNOT2) : /* ornot $src1, $lit2, $dst */ | |
1856 | { | |
1857 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1858 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1859 | #define FLD(f) abuf->fields.sfmt_emul2.f |
7a292a7a SS |
1860 | int UNUSED written = 0; |
1861 | IADDR UNUSED pc = abuf->addr; | |
1862 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1863 | ||
1864 | { | |
1865 | SI opval = ORSI (FLD (f_src2), INVSI (* FLD (i_src1))); | |
1866 | * FLD (i_dst) = opval; | |
1867 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1868 | } | |
1869 | ||
1870 | #undef FLD | |
1871 | } | |
1872 | NEXT (vpc); | |
1873 | ||
1874 | CASE (sem, INSN_ORNOT3) : /* ornot $lit1, $lit2, $dst */ | |
1875 | { | |
1876 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1877 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1878 | #define FLD(f) abuf->fields.sfmt_emul3.f |
7a292a7a SS |
1879 | int UNUSED written = 0; |
1880 | IADDR UNUSED pc = abuf->addr; | |
1881 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1882 | ||
1883 | { | |
1884 | SI opval = ORSI (FLD (f_src2), INVSI (FLD (f_src1))); | |
1885 | * FLD (i_dst) = opval; | |
1886 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1887 | } | |
1888 | ||
c906108c SS |
1889 | #undef FLD |
1890 | } | |
1891 | NEXT (vpc); | |
1892 | ||
1893 | CASE (sem, INSN_CLRBIT) : /* clrbit $src1, $src2, $dst */ | |
1894 | { | |
1895 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1896 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1897 | #define FLD(f) abuf->fields.sfmt_emul.f |
c906108c SS |
1898 | int UNUSED written = 0; |
1899 | IADDR UNUSED pc = abuf->addr; | |
1900 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1901 | ||
1902 | { | |
1903 | SI opval = ANDSI (INVSI (SLLSI (1, * FLD (i_src1))), * FLD (i_src2)); | |
1904 | * FLD (i_dst) = opval; | |
1905 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1906 | } | |
1907 | ||
1908 | #undef FLD | |
1909 | } | |
1910 | NEXT (vpc); | |
1911 | ||
1912 | CASE (sem, INSN_CLRBIT1) : /* clrbit $lit1, $src2, $dst */ | |
1913 | { | |
1914 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1915 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1916 | #define FLD(f) abuf->fields.sfmt_emul1.f |
c906108c SS |
1917 | int UNUSED written = 0; |
1918 | IADDR UNUSED pc = abuf->addr; | |
1919 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1920 | ||
1921 | { | |
1922 | SI opval = ANDSI (INVSI (SLLSI (1, FLD (f_src1))), * FLD (i_src2)); | |
1923 | * FLD (i_dst) = opval; | |
1924 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1925 | } | |
1926 | ||
1927 | #undef FLD | |
1928 | } | |
1929 | NEXT (vpc); | |
1930 | ||
1931 | CASE (sem, INSN_CLRBIT2) : /* clrbit $src1, $lit2, $dst */ | |
1932 | { | |
1933 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1934 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1935 | #define FLD(f) abuf->fields.sfmt_emul2.f |
c906108c SS |
1936 | int UNUSED written = 0; |
1937 | IADDR UNUSED pc = abuf->addr; | |
1938 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1939 | ||
1940 | { | |
1941 | SI opval = ANDSI (INVSI (SLLSI (1, * FLD (i_src1))), FLD (f_src2)); | |
1942 | * FLD (i_dst) = opval; | |
1943 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1944 | } | |
1945 | ||
1946 | #undef FLD | |
1947 | } | |
1948 | NEXT (vpc); | |
1949 | ||
1950 | CASE (sem, INSN_CLRBIT3) : /* clrbit $lit1, $lit2, $dst */ | |
1951 | { | |
1952 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1953 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1954 | #define FLD(f) abuf->fields.sfmt_emul3.f |
c906108c SS |
1955 | int UNUSED written = 0; |
1956 | IADDR UNUSED pc = abuf->addr; | |
1957 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1958 | ||
1959 | { | |
1960 | SI opval = ANDSI (INVSI (SLLSI (1, FLD (f_src1))), FLD (f_src2)); | |
1961 | * FLD (i_dst) = opval; | |
1962 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1963 | } | |
1964 | ||
1965 | #undef FLD | |
1966 | } | |
1967 | NEXT (vpc); | |
1968 | ||
1969 | CASE (sem, INSN_SHLO) : /* shlo $src1, $src2, $dst */ | |
1970 | { | |
1971 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1972 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1973 | #define FLD(f) abuf->fields.sfmt_emul.f |
c906108c SS |
1974 | int UNUSED written = 0; |
1975 | IADDR UNUSED pc = abuf->addr; | |
1976 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1977 | ||
1978 | { | |
7a292a7a | 1979 | SI opval = (GEUSI (* FLD (i_src1), 32)) ? (0) : (SLLSI (* FLD (i_src2), * FLD (i_src1))); |
c906108c SS |
1980 | * FLD (i_dst) = opval; |
1981 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
1982 | } | |
1983 | ||
1984 | #undef FLD | |
1985 | } | |
1986 | NEXT (vpc); | |
1987 | ||
1988 | CASE (sem, INSN_SHLO1) : /* shlo $lit1, $src2, $dst */ | |
1989 | { | |
1990 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
1991 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 1992 | #define FLD(f) abuf->fields.sfmt_emul1.f |
c906108c SS |
1993 | int UNUSED written = 0; |
1994 | IADDR UNUSED pc = abuf->addr; | |
1995 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1996 | ||
1997 | { | |
7a292a7a | 1998 | SI opval = (GEUSI (FLD (f_src1), 32)) ? (0) : (SLLSI (* FLD (i_src2), FLD (f_src1))); |
c906108c SS |
1999 | * FLD (i_dst) = opval; |
2000 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2001 | } | |
2002 | ||
2003 | #undef FLD | |
2004 | } | |
2005 | NEXT (vpc); | |
2006 | ||
2007 | CASE (sem, INSN_SHLO2) : /* shlo $src1, $lit2, $dst */ | |
2008 | { | |
2009 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2010 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2011 | #define FLD(f) abuf->fields.sfmt_emul2.f |
c906108c SS |
2012 | int UNUSED written = 0; |
2013 | IADDR UNUSED pc = abuf->addr; | |
2014 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2015 | ||
2016 | { | |
7a292a7a | 2017 | SI opval = (GEUSI (* FLD (i_src1), 32)) ? (0) : (SLLSI (FLD (f_src2), * FLD (i_src1))); |
c906108c SS |
2018 | * FLD (i_dst) = opval; |
2019 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2020 | } | |
2021 | ||
2022 | #undef FLD | |
2023 | } | |
2024 | NEXT (vpc); | |
2025 | ||
2026 | CASE (sem, INSN_SHLO3) : /* shlo $lit1, $lit2, $dst */ | |
2027 | { | |
2028 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2029 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2030 | #define FLD(f) abuf->fields.sfmt_emul3.f |
c906108c SS |
2031 | int UNUSED written = 0; |
2032 | IADDR UNUSED pc = abuf->addr; | |
2033 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2034 | ||
2035 | { | |
7a292a7a | 2036 | SI opval = (GEUSI (FLD (f_src1), 32)) ? (0) : (SLLSI (FLD (f_src2), FLD (f_src1))); |
c906108c SS |
2037 | * FLD (i_dst) = opval; |
2038 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2039 | } | |
2040 | ||
2041 | #undef FLD | |
2042 | } | |
2043 | NEXT (vpc); | |
2044 | ||
2045 | CASE (sem, INSN_SHRO) : /* shro $src1, $src2, $dst */ | |
2046 | { | |
2047 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2048 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2049 | #define FLD(f) abuf->fields.sfmt_emul.f |
c906108c SS |
2050 | int UNUSED written = 0; |
2051 | IADDR UNUSED pc = abuf->addr; | |
2052 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2053 | ||
2054 | { | |
7a292a7a | 2055 | SI opval = (GEUSI (* FLD (i_src1), 32)) ? (0) : (SRLSI (* FLD (i_src2), * FLD (i_src1))); |
c906108c SS |
2056 | * FLD (i_dst) = opval; |
2057 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2058 | } | |
2059 | ||
2060 | #undef FLD | |
2061 | } | |
2062 | NEXT (vpc); | |
2063 | ||
2064 | CASE (sem, INSN_SHRO1) : /* shro $lit1, $src2, $dst */ | |
2065 | { | |
2066 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2067 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2068 | #define FLD(f) abuf->fields.sfmt_emul1.f |
c906108c SS |
2069 | int UNUSED written = 0; |
2070 | IADDR UNUSED pc = abuf->addr; | |
2071 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2072 | ||
2073 | { | |
7a292a7a | 2074 | SI opval = (GEUSI (FLD (f_src1), 32)) ? (0) : (SRLSI (* FLD (i_src2), FLD (f_src1))); |
c906108c SS |
2075 | * FLD (i_dst) = opval; |
2076 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2077 | } | |
2078 | ||
2079 | #undef FLD | |
2080 | } | |
2081 | NEXT (vpc); | |
2082 | ||
2083 | CASE (sem, INSN_SHRO2) : /* shro $src1, $lit2, $dst */ | |
2084 | { | |
2085 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2086 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2087 | #define FLD(f) abuf->fields.sfmt_emul2.f |
c906108c SS |
2088 | int UNUSED written = 0; |
2089 | IADDR UNUSED pc = abuf->addr; | |
2090 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2091 | ||
2092 | { | |
7a292a7a | 2093 | SI opval = (GEUSI (* FLD (i_src1), 32)) ? (0) : (SRLSI (FLD (f_src2), * FLD (i_src1))); |
c906108c SS |
2094 | * FLD (i_dst) = opval; |
2095 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2096 | } | |
2097 | ||
2098 | #undef FLD | |
2099 | } | |
2100 | NEXT (vpc); | |
2101 | ||
2102 | CASE (sem, INSN_SHRO3) : /* shro $lit1, $lit2, $dst */ | |
2103 | { | |
2104 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2105 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2106 | #define FLD(f) abuf->fields.sfmt_emul3.f |
c906108c SS |
2107 | int UNUSED written = 0; |
2108 | IADDR UNUSED pc = abuf->addr; | |
2109 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2110 | ||
2111 | { | |
7a292a7a | 2112 | SI opval = (GEUSI (FLD (f_src1), 32)) ? (0) : (SRLSI (FLD (f_src2), FLD (f_src1))); |
c906108c SS |
2113 | * FLD (i_dst) = opval; |
2114 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2115 | } | |
2116 | ||
2117 | #undef FLD | |
2118 | } | |
2119 | NEXT (vpc); | |
2120 | ||
2121 | CASE (sem, INSN_SHLI) : /* shli $src1, $src2, $dst */ | |
2122 | { | |
2123 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2124 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2125 | #define FLD(f) abuf->fields.sfmt_emul.f |
c906108c SS |
2126 | int UNUSED written = 0; |
2127 | IADDR UNUSED pc = abuf->addr; | |
2128 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2129 | ||
2130 | { | |
7a292a7a | 2131 | SI opval = (GEUSI (* FLD (i_src1), 32)) ? (0) : (SLLSI (* FLD (i_src2), * FLD (i_src1))); |
c906108c SS |
2132 | * FLD (i_dst) = opval; |
2133 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2134 | } | |
2135 | ||
2136 | #undef FLD | |
2137 | } | |
2138 | NEXT (vpc); | |
2139 | ||
2140 | CASE (sem, INSN_SHLI1) : /* shli $lit1, $src2, $dst */ | |
2141 | { | |
2142 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2143 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2144 | #define FLD(f) abuf->fields.sfmt_emul1.f |
c906108c SS |
2145 | int UNUSED written = 0; |
2146 | IADDR UNUSED pc = abuf->addr; | |
2147 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2148 | ||
2149 | { | |
7a292a7a | 2150 | SI opval = (GEUSI (FLD (f_src1), 32)) ? (0) : (SLLSI (* FLD (i_src2), FLD (f_src1))); |
c906108c SS |
2151 | * FLD (i_dst) = opval; |
2152 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2153 | } | |
2154 | ||
2155 | #undef FLD | |
2156 | } | |
2157 | NEXT (vpc); | |
2158 | ||
2159 | CASE (sem, INSN_SHLI2) : /* shli $src1, $lit2, $dst */ | |
2160 | { | |
2161 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2162 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2163 | #define FLD(f) abuf->fields.sfmt_emul2.f |
c906108c SS |
2164 | int UNUSED written = 0; |
2165 | IADDR UNUSED pc = abuf->addr; | |
2166 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2167 | ||
2168 | { | |
7a292a7a | 2169 | SI opval = (GEUSI (* FLD (i_src1), 32)) ? (0) : (SLLSI (FLD (f_src2), * FLD (i_src1))); |
c906108c SS |
2170 | * FLD (i_dst) = opval; |
2171 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2172 | } | |
2173 | ||
2174 | #undef FLD | |
2175 | } | |
2176 | NEXT (vpc); | |
2177 | ||
2178 | CASE (sem, INSN_SHLI3) : /* shli $lit1, $lit2, $dst */ | |
2179 | { | |
2180 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2181 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2182 | #define FLD(f) abuf->fields.sfmt_emul3.f |
c906108c SS |
2183 | int UNUSED written = 0; |
2184 | IADDR UNUSED pc = abuf->addr; | |
2185 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2186 | ||
2187 | { | |
7a292a7a | 2188 | SI opval = (GEUSI (FLD (f_src1), 32)) ? (0) : (SLLSI (FLD (f_src2), FLD (f_src1))); |
c906108c SS |
2189 | * FLD (i_dst) = opval; |
2190 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2191 | } | |
2192 | ||
2193 | #undef FLD | |
2194 | } | |
2195 | NEXT (vpc); | |
2196 | ||
2197 | CASE (sem, INSN_SHRI) : /* shri $src1, $src2, $dst */ | |
2198 | { | |
2199 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2200 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2201 | #define FLD(f) abuf->fields.sfmt_emul.f |
c906108c SS |
2202 | int UNUSED written = 0; |
2203 | IADDR UNUSED pc = abuf->addr; | |
2204 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2205 | ||
2206 | { | |
7a292a7a | 2207 | SI opval = (GEUSI (* FLD (i_src1), 32)) ? (SRASI (* FLD (i_src2), 31)) : (SRASI (* FLD (i_src2), * FLD (i_src1))); |
c906108c SS |
2208 | * FLD (i_dst) = opval; |
2209 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2210 | } | |
2211 | ||
2212 | #undef FLD | |
2213 | } | |
2214 | NEXT (vpc); | |
2215 | ||
2216 | CASE (sem, INSN_SHRI1) : /* shri $lit1, $src2, $dst */ | |
2217 | { | |
2218 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2219 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2220 | #define FLD(f) abuf->fields.sfmt_emul1.f |
c906108c SS |
2221 | int UNUSED written = 0; |
2222 | IADDR UNUSED pc = abuf->addr; | |
2223 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2224 | ||
2225 | { | |
7a292a7a | 2226 | SI opval = (GEUSI (FLD (f_src1), 32)) ? (SRASI (* FLD (i_src2), 31)) : (SRASI (* FLD (i_src2), FLD (f_src1))); |
c906108c SS |
2227 | * FLD (i_dst) = opval; |
2228 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2229 | } | |
2230 | ||
2231 | #undef FLD | |
2232 | } | |
2233 | NEXT (vpc); | |
2234 | ||
2235 | CASE (sem, INSN_SHRI2) : /* shri $src1, $lit2, $dst */ | |
2236 | { | |
2237 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2238 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2239 | #define FLD(f) abuf->fields.sfmt_emul2.f |
c906108c SS |
2240 | int UNUSED written = 0; |
2241 | IADDR UNUSED pc = abuf->addr; | |
2242 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2243 | ||
2244 | { | |
7a292a7a | 2245 | SI opval = (GEUSI (* FLD (i_src1), 32)) ? (SRASI (FLD (f_src2), 31)) : (SRASI (FLD (f_src2), * FLD (i_src1))); |
c906108c SS |
2246 | * FLD (i_dst) = opval; |
2247 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2248 | } | |
2249 | ||
2250 | #undef FLD | |
2251 | } | |
2252 | NEXT (vpc); | |
2253 | ||
2254 | CASE (sem, INSN_SHRI3) : /* shri $lit1, $lit2, $dst */ | |
2255 | { | |
2256 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2257 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2258 | #define FLD(f) abuf->fields.sfmt_emul3.f |
c906108c SS |
2259 | int UNUSED written = 0; |
2260 | IADDR UNUSED pc = abuf->addr; | |
2261 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2262 | ||
2263 | { | |
7a292a7a | 2264 | SI opval = (GEUSI (FLD (f_src1), 32)) ? (SRASI (FLD (f_src2), 31)) : (SRASI (FLD (f_src2), FLD (f_src1))); |
c906108c SS |
2265 | * FLD (i_dst) = opval; |
2266 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2267 | } | |
2268 | ||
2269 | #undef FLD | |
2270 | } | |
2271 | NEXT (vpc); | |
2272 | ||
2273 | CASE (sem, INSN_EMUL) : /* emul $src1, $src2, $dst */ | |
2274 | { | |
2275 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2276 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2277 | #define FLD(f) abuf->fields.sfmt_emul.f |
c906108c SS |
2278 | int UNUSED written = 0; |
2279 | IADDR UNUSED pc = abuf->addr; | |
2280 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2281 | ||
7a292a7a | 2282 | { |
c906108c | 2283 | DI tmp_temp; |
7a292a7a | 2284 | SI tmp_dregno; |
c906108c SS |
2285 | tmp_temp = MULDI (ZEXTSIDI (* FLD (i_src1)), ZEXTSIDI (* FLD (i_src2))); |
2286 | tmp_dregno = FLD (f_srcdst); | |
2287 | { | |
2288 | SI opval = TRUNCDISI (tmp_temp); | |
2289 | * FLD (i_dst) = opval; | |
2290 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2291 | } | |
2292 | { | |
2293 | SI opval = TRUNCDISI (SRLDI (tmp_temp, 32)); | |
2294 | CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; | |
7a292a7a | 2295 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-1", 'x', opval); |
c906108c | 2296 | } |
7a292a7a | 2297 | } |
c906108c SS |
2298 | |
2299 | #undef FLD | |
2300 | } | |
2301 | NEXT (vpc); | |
2302 | ||
2303 | CASE (sem, INSN_EMUL1) : /* emul $lit1, $src2, $dst */ | |
2304 | { | |
2305 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2306 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2307 | #define FLD(f) abuf->fields.sfmt_emul1.f |
c906108c SS |
2308 | int UNUSED written = 0; |
2309 | IADDR UNUSED pc = abuf->addr; | |
2310 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2311 | ||
7a292a7a | 2312 | { |
c906108c | 2313 | DI tmp_temp; |
7a292a7a | 2314 | SI tmp_dregno; |
c906108c SS |
2315 | tmp_temp = MULDI (ZEXTSIDI (FLD (f_src1)), ZEXTSIDI (* FLD (i_src2))); |
2316 | tmp_dregno = FLD (f_srcdst); | |
2317 | { | |
2318 | SI opval = TRUNCDISI (tmp_temp); | |
2319 | * FLD (i_dst) = opval; | |
2320 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2321 | } | |
2322 | { | |
2323 | SI opval = TRUNCDISI (SRLDI (tmp_temp, 32)); | |
2324 | CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; | |
7a292a7a | 2325 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-1", 'x', opval); |
c906108c | 2326 | } |
7a292a7a | 2327 | } |
c906108c SS |
2328 | |
2329 | #undef FLD | |
2330 | } | |
2331 | NEXT (vpc); | |
2332 | ||
2333 | CASE (sem, INSN_EMUL2) : /* emul $src1, $lit2, $dst */ | |
2334 | { | |
2335 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2336 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2337 | #define FLD(f) abuf->fields.sfmt_emul2.f |
c906108c SS |
2338 | int UNUSED written = 0; |
2339 | IADDR UNUSED pc = abuf->addr; | |
2340 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2341 | ||
7a292a7a | 2342 | { |
c906108c | 2343 | DI tmp_temp; |
7a292a7a | 2344 | SI tmp_dregno; |
c906108c SS |
2345 | tmp_temp = MULDI (ZEXTSIDI (* FLD (i_src1)), ZEXTSIDI (FLD (f_src2))); |
2346 | tmp_dregno = FLD (f_srcdst); | |
2347 | { | |
2348 | SI opval = TRUNCDISI (tmp_temp); | |
2349 | * FLD (i_dst) = opval; | |
2350 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2351 | } | |
2352 | { | |
2353 | SI opval = TRUNCDISI (SRLDI (tmp_temp, 32)); | |
2354 | CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; | |
7a292a7a | 2355 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-1", 'x', opval); |
c906108c | 2356 | } |
7a292a7a | 2357 | } |
c906108c SS |
2358 | |
2359 | #undef FLD | |
2360 | } | |
2361 | NEXT (vpc); | |
2362 | ||
2363 | CASE (sem, INSN_EMUL3) : /* emul $lit1, $lit2, $dst */ | |
2364 | { | |
2365 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2366 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2367 | #define FLD(f) abuf->fields.sfmt_emul3.f |
c906108c SS |
2368 | int UNUSED written = 0; |
2369 | IADDR UNUSED pc = abuf->addr; | |
2370 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2371 | ||
7a292a7a | 2372 | { |
c906108c | 2373 | DI tmp_temp; |
7a292a7a | 2374 | SI tmp_dregno; |
c906108c SS |
2375 | tmp_temp = MULDI (ZEXTSIDI (FLD (f_src1)), ZEXTSIDI (FLD (f_src2))); |
2376 | tmp_dregno = FLD (f_srcdst); | |
2377 | { | |
2378 | SI opval = TRUNCDISI (tmp_temp); | |
2379 | * FLD (i_dst) = opval; | |
2380 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2381 | } | |
2382 | { | |
2383 | SI opval = TRUNCDISI (SRLDI (tmp_temp, 32)); | |
2384 | CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; | |
7a292a7a | 2385 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-1", 'x', opval); |
c906108c | 2386 | } |
7a292a7a | 2387 | } |
c906108c SS |
2388 | |
2389 | #undef FLD | |
2390 | } | |
2391 | NEXT (vpc); | |
2392 | ||
2393 | CASE (sem, INSN_MOV) : /* mov $src1, $dst */ | |
2394 | { | |
2395 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2396 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2397 | #define FLD(f) abuf->fields.sfmt_emul2.f |
c906108c SS |
2398 | int UNUSED written = 0; |
2399 | IADDR UNUSED pc = abuf->addr; | |
2400 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2401 | ||
2402 | { | |
2403 | SI opval = * FLD (i_src1); | |
2404 | * FLD (i_dst) = opval; | |
2405 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2406 | } | |
2407 | ||
2408 | #undef FLD | |
2409 | } | |
2410 | NEXT (vpc); | |
2411 | ||
2412 | CASE (sem, INSN_MOV1) : /* mov $lit1, $dst */ | |
2413 | { | |
2414 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2415 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2416 | #define FLD(f) abuf->fields.sfmt_emul3.f |
c906108c SS |
2417 | int UNUSED written = 0; |
2418 | IADDR UNUSED pc = abuf->addr; | |
2419 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2420 | ||
2421 | { | |
2422 | SI opval = FLD (f_src1); | |
2423 | * FLD (i_dst) = opval; | |
2424 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2425 | } | |
2426 | ||
2427 | #undef FLD | |
2428 | } | |
2429 | NEXT (vpc); | |
2430 | ||
2431 | CASE (sem, INSN_MOVL) : /* movl $src1, $dst */ | |
2432 | { | |
2433 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2434 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2435 | #define FLD(f) abuf->fields.sfmt_movq.f |
c906108c SS |
2436 | int UNUSED written = 0; |
2437 | IADDR UNUSED pc = abuf->addr; | |
2438 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2439 | ||
7a292a7a | 2440 | { |
c906108c | 2441 | SI tmp_dregno; |
7a292a7a | 2442 | SI tmp_sregno; |
c906108c SS |
2443 | tmp_dregno = FLD (f_srcdst); |
2444 | tmp_sregno = FLD (f_src1); | |
2445 | { | |
2446 | SI opval = * FLD (i_src1); | |
2447 | * FLD (i_dst) = opval; | |
2448 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2449 | } | |
2450 | { | |
2451 | SI opval = CPU (h_gr[((FLD (f_src1)) + (1))]); | |
2452 | CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; | |
7a292a7a | 2453 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-1", 'x', opval); |
c906108c | 2454 | } |
7a292a7a | 2455 | } |
c906108c SS |
2456 | |
2457 | #undef FLD | |
2458 | } | |
2459 | NEXT (vpc); | |
2460 | ||
2461 | CASE (sem, INSN_MOVL1) : /* movl $lit1, $dst */ | |
2462 | { | |
2463 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2464 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2465 | #define FLD(f) abuf->fields.sfmt_emul3.f |
c906108c SS |
2466 | int UNUSED written = 0; |
2467 | IADDR UNUSED pc = abuf->addr; | |
2468 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2469 | ||
7a292a7a | 2470 | { |
c906108c SS |
2471 | SI tmp_dregno; |
2472 | tmp_dregno = FLD (f_srcdst); | |
2473 | { | |
2474 | SI opval = FLD (f_src1); | |
2475 | * FLD (i_dst) = opval; | |
2476 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2477 | } | |
2478 | { | |
2479 | SI opval = 0; | |
2480 | CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; | |
7a292a7a | 2481 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-1", 'x', opval); |
c906108c | 2482 | } |
7a292a7a | 2483 | } |
c906108c SS |
2484 | |
2485 | #undef FLD | |
2486 | } | |
2487 | NEXT (vpc); | |
2488 | ||
2489 | CASE (sem, INSN_MOVT) : /* movt $src1, $dst */ | |
2490 | { | |
2491 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2492 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2493 | #define FLD(f) abuf->fields.sfmt_movq.f |
c906108c SS |
2494 | int UNUSED written = 0; |
2495 | IADDR UNUSED pc = abuf->addr; | |
2496 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2497 | ||
7a292a7a | 2498 | { |
c906108c | 2499 | SI tmp_dregno; |
7a292a7a | 2500 | SI tmp_sregno; |
c906108c SS |
2501 | tmp_dregno = FLD (f_srcdst); |
2502 | tmp_sregno = FLD (f_src1); | |
2503 | { | |
2504 | SI opval = * FLD (i_src1); | |
2505 | * FLD (i_dst) = opval; | |
2506 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2507 | } | |
2508 | { | |
2509 | SI opval = CPU (h_gr[((FLD (f_src1)) + (1))]); | |
2510 | CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; | |
7a292a7a | 2511 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-1", 'x', opval); |
c906108c SS |
2512 | } |
2513 | { | |
2514 | SI opval = CPU (h_gr[((FLD (f_src1)) + (2))]); | |
2515 | CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval; | |
7a292a7a | 2516 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-2", 'x', opval); |
c906108c | 2517 | } |
7a292a7a | 2518 | } |
c906108c SS |
2519 | |
2520 | #undef FLD | |
2521 | } | |
2522 | NEXT (vpc); | |
2523 | ||
2524 | CASE (sem, INSN_MOVT1) : /* movt $lit1, $dst */ | |
2525 | { | |
2526 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2527 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2528 | #define FLD(f) abuf->fields.sfmt_movq.f |
c906108c SS |
2529 | int UNUSED written = 0; |
2530 | IADDR UNUSED pc = abuf->addr; | |
2531 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2532 | ||
7a292a7a | 2533 | { |
c906108c SS |
2534 | SI tmp_dregno; |
2535 | tmp_dregno = FLD (f_srcdst); | |
2536 | { | |
2537 | SI opval = FLD (f_src1); | |
2538 | * FLD (i_dst) = opval; | |
2539 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2540 | } | |
2541 | { | |
2542 | SI opval = 0; | |
2543 | CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; | |
7a292a7a | 2544 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-1", 'x', opval); |
c906108c SS |
2545 | } |
2546 | { | |
2547 | SI opval = 0; | |
2548 | CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval; | |
7a292a7a | 2549 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-2", 'x', opval); |
c906108c | 2550 | } |
7a292a7a | 2551 | } |
c906108c SS |
2552 | |
2553 | #undef FLD | |
2554 | } | |
2555 | NEXT (vpc); | |
2556 | ||
2557 | CASE (sem, INSN_MOVQ) : /* movq $src1, $dst */ | |
2558 | { | |
2559 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2560 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2561 | #define FLD(f) abuf->fields.sfmt_movq.f |
c906108c SS |
2562 | int UNUSED written = 0; |
2563 | IADDR UNUSED pc = abuf->addr; | |
2564 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2565 | ||
7a292a7a | 2566 | { |
c906108c | 2567 | SI tmp_dregno; |
7a292a7a | 2568 | SI tmp_sregno; |
c906108c SS |
2569 | tmp_dregno = FLD (f_srcdst); |
2570 | tmp_sregno = FLD (f_src1); | |
2571 | { | |
2572 | SI opval = * FLD (i_src1); | |
2573 | * FLD (i_dst) = opval; | |
2574 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2575 | } | |
2576 | { | |
2577 | SI opval = CPU (h_gr[((FLD (f_src1)) + (1))]); | |
2578 | CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; | |
7a292a7a | 2579 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-1", 'x', opval); |
c906108c SS |
2580 | } |
2581 | { | |
2582 | SI opval = CPU (h_gr[((FLD (f_src1)) + (2))]); | |
2583 | CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval; | |
7a292a7a | 2584 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-2", 'x', opval); |
c906108c SS |
2585 | } |
2586 | { | |
2587 | SI opval = CPU (h_gr[((FLD (f_src1)) + (3))]); | |
2588 | CPU (h_gr[((FLD (f_srcdst)) + (3))]) = opval; | |
7a292a7a | 2589 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-3", 'x', opval); |
c906108c | 2590 | } |
7a292a7a | 2591 | } |
c906108c SS |
2592 | |
2593 | #undef FLD | |
2594 | } | |
2595 | NEXT (vpc); | |
2596 | ||
2597 | CASE (sem, INSN_MOVQ1) : /* movq $lit1, $dst */ | |
2598 | { | |
2599 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2600 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2601 | #define FLD(f) abuf->fields.sfmt_movq.f |
c906108c SS |
2602 | int UNUSED written = 0; |
2603 | IADDR UNUSED pc = abuf->addr; | |
2604 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2605 | ||
7a292a7a | 2606 | { |
c906108c SS |
2607 | SI tmp_dregno; |
2608 | tmp_dregno = FLD (f_srcdst); | |
2609 | { | |
2610 | SI opval = FLD (f_src1); | |
2611 | * FLD (i_dst) = opval; | |
2612 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2613 | } | |
2614 | { | |
2615 | SI opval = 0; | |
2616 | CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; | |
7a292a7a | 2617 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-1", 'x', opval); |
c906108c SS |
2618 | } |
2619 | { | |
2620 | SI opval = 0; | |
2621 | CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval; | |
7a292a7a | 2622 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-2", 'x', opval); |
c906108c SS |
2623 | } |
2624 | { | |
2625 | SI opval = 0; | |
2626 | CPU (h_gr[((FLD (f_srcdst)) + (3))]) = opval; | |
7a292a7a | 2627 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-3", 'x', opval); |
c906108c | 2628 | } |
7a292a7a | 2629 | } |
c906108c SS |
2630 | |
2631 | #undef FLD | |
2632 | } | |
2633 | NEXT (vpc); | |
2634 | ||
2635 | CASE (sem, INSN_MODPC) : /* modpc $src1, $src2, $dst */ | |
2636 | { | |
2637 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2638 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2639 | #define FLD(f) abuf->fields.sfmt_emul1.f |
c906108c SS |
2640 | int UNUSED written = 0; |
2641 | IADDR UNUSED pc = abuf->addr; | |
2642 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2643 | ||
2644 | { | |
2645 | SI opval = * FLD (i_src2); | |
2646 | * FLD (i_dst) = opval; | |
2647 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2648 | } | |
2649 | ||
2650 | #undef FLD | |
2651 | } | |
2652 | NEXT (vpc); | |
2653 | ||
2654 | CASE (sem, INSN_MODAC) : /* modac $src1, $src2, $dst */ | |
2655 | { | |
2656 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2657 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2658 | #define FLD(f) abuf->fields.sfmt_emul1.f |
c906108c SS |
2659 | int UNUSED written = 0; |
2660 | IADDR UNUSED pc = abuf->addr; | |
2661 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2662 | ||
2663 | { | |
2664 | SI opval = * FLD (i_src2); | |
2665 | * FLD (i_dst) = opval; | |
2666 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2667 | } | |
2668 | ||
2669 | #undef FLD | |
2670 | } | |
2671 | NEXT (vpc); | |
2672 | ||
2673 | CASE (sem, INSN_LDA_OFFSET) : /* lda $offset, $dst */ | |
2674 | { | |
2675 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2676 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2677 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f |
c906108c SS |
2678 | int UNUSED written = 0; |
2679 | IADDR UNUSED pc = abuf->addr; | |
2680 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2681 | ||
2682 | { | |
2683 | SI opval = FLD (f_offset); | |
2684 | * FLD (i_dst) = opval; | |
2685 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2686 | } | |
2687 | ||
2688 | #undef FLD | |
2689 | } | |
2690 | NEXT (vpc); | |
2691 | ||
2692 | CASE (sem, INSN_LDA_INDIRECT_OFFSET) : /* lda $offset($abase), $dst */ | |
2693 | { | |
2694 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2695 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2696 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f |
c906108c SS |
2697 | int UNUSED written = 0; |
2698 | IADDR UNUSED pc = abuf->addr; | |
2699 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2700 | ||
2701 | { | |
2702 | SI opval = ADDSI (FLD (f_offset), * FLD (i_abase)); | |
2703 | * FLD (i_dst) = opval; | |
2704 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2705 | } | |
2706 | ||
2707 | #undef FLD | |
2708 | } | |
2709 | NEXT (vpc); | |
2710 | ||
2711 | CASE (sem, INSN_LDA_INDIRECT) : /* lda ($abase), $dst */ | |
2712 | { | |
2713 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2714 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2715 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f |
c906108c SS |
2716 | int UNUSED written = 0; |
2717 | IADDR UNUSED pc = abuf->addr; | |
2718 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2719 | ||
2720 | { | |
2721 | SI opval = * FLD (i_abase); | |
2722 | * FLD (i_dst) = opval; | |
2723 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2724 | } | |
2725 | ||
2726 | #undef FLD | |
2727 | } | |
2728 | NEXT (vpc); | |
2729 | ||
2730 | CASE (sem, INSN_LDA_INDIRECT_INDEX) : /* lda ($abase)[$index*S$scale], $dst */ | |
2731 | { | |
2732 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2733 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2734 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
c906108c SS |
2735 | int UNUSED written = 0; |
2736 | IADDR UNUSED pc = abuf->addr; | |
2737 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2738 | ||
2739 | { | |
2740 | SI opval = ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))); | |
2741 | * FLD (i_dst) = opval; | |
2742 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2743 | } | |
2744 | ||
2745 | #undef FLD | |
2746 | } | |
2747 | NEXT (vpc); | |
2748 | ||
2749 | CASE (sem, INSN_LDA_DISP) : /* lda $optdisp, $dst */ | |
2750 | { | |
2751 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2752 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2753 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
c906108c SS |
2754 | int UNUSED written = 0; |
2755 | IADDR UNUSED pc = abuf->addr; | |
2756 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
2757 | ||
2758 | { | |
2759 | SI opval = FLD (f_optdisp); | |
2760 | * FLD (i_dst) = opval; | |
2761 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2762 | } | |
2763 | ||
2764 | #undef FLD | |
2765 | } | |
2766 | NEXT (vpc); | |
2767 | ||
2768 | CASE (sem, INSN_LDA_INDIRECT_DISP) : /* lda $optdisp($abase), $dst */ | |
2769 | { | |
2770 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2771 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2772 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
c906108c SS |
2773 | int UNUSED written = 0; |
2774 | IADDR UNUSED pc = abuf->addr; | |
2775 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
2776 | ||
2777 | { | |
2778 | SI opval = ADDSI (FLD (f_optdisp), * FLD (i_abase)); | |
2779 | * FLD (i_dst) = opval; | |
2780 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2781 | } | |
2782 | ||
2783 | #undef FLD | |
2784 | } | |
2785 | NEXT (vpc); | |
2786 | ||
2787 | CASE (sem, INSN_LDA_INDEX_DISP) : /* lda $optdisp[$index*S$scale], $dst */ | |
2788 | { | |
2789 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2790 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2791 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
c906108c SS |
2792 | int UNUSED written = 0; |
2793 | IADDR UNUSED pc = abuf->addr; | |
2794 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
2795 | ||
2796 | { | |
2797 | SI opval = ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))); | |
2798 | * FLD (i_dst) = opval; | |
2799 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2800 | } | |
2801 | ||
2802 | #undef FLD | |
2803 | } | |
2804 | NEXT (vpc); | |
2805 | ||
2806 | CASE (sem, INSN_LDA_INDIRECT_INDEX_DISP) : /* lda $optdisp($abase)[$index*S$scale], $dst */ | |
2807 | { | |
2808 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2809 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2810 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
c906108c SS |
2811 | int UNUSED written = 0; |
2812 | IADDR UNUSED pc = abuf->addr; | |
2813 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
2814 | ||
2815 | { | |
2816 | SI opval = ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))); | |
2817 | * FLD (i_dst) = opval; | |
2818 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2819 | } | |
2820 | ||
2821 | #undef FLD | |
2822 | } | |
2823 | NEXT (vpc); | |
2824 | ||
2825 | CASE (sem, INSN_LD_OFFSET) : /* ld $offset, $dst */ | |
2826 | { | |
2827 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2828 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2829 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f |
c906108c SS |
2830 | int UNUSED written = 0; |
2831 | IADDR UNUSED pc = abuf->addr; | |
2832 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2833 | ||
2834 | { | |
2835 | SI opval = GETMEMSI (current_cpu, pc, FLD (f_offset)); | |
2836 | * FLD (i_dst) = opval; | |
2837 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2838 | } | |
2839 | ||
2840 | #undef FLD | |
2841 | } | |
2842 | NEXT (vpc); | |
2843 | ||
2844 | CASE (sem, INSN_LD_INDIRECT_OFFSET) : /* ld $offset($abase), $dst */ | |
2845 | { | |
2846 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2847 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2848 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f |
c906108c SS |
2849 | int UNUSED written = 0; |
2850 | IADDR UNUSED pc = abuf->addr; | |
2851 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2852 | ||
2853 | { | |
2854 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (FLD (f_offset), * FLD (i_abase))); | |
2855 | * FLD (i_dst) = opval; | |
2856 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2857 | } | |
2858 | ||
2859 | #undef FLD | |
2860 | } | |
2861 | NEXT (vpc); | |
2862 | ||
2863 | CASE (sem, INSN_LD_INDIRECT) : /* ld ($abase), $dst */ | |
2864 | { | |
2865 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2866 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2867 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f |
c906108c SS |
2868 | int UNUSED written = 0; |
2869 | IADDR UNUSED pc = abuf->addr; | |
2870 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2871 | ||
2872 | { | |
2873 | SI opval = GETMEMSI (current_cpu, pc, * FLD (i_abase)); | |
2874 | * FLD (i_dst) = opval; | |
2875 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2876 | } | |
2877 | ||
2878 | #undef FLD | |
2879 | } | |
2880 | NEXT (vpc); | |
2881 | ||
2882 | CASE (sem, INSN_LD_INDIRECT_INDEX) : /* ld ($abase)[$index*S$scale], $dst */ | |
2883 | { | |
2884 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2885 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2886 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
c906108c SS |
2887 | int UNUSED written = 0; |
2888 | IADDR UNUSED pc = abuf->addr; | |
2889 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2890 | ||
2891 | { | |
2892 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))); | |
2893 | * FLD (i_dst) = opval; | |
2894 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2895 | } | |
2896 | ||
2897 | #undef FLD | |
2898 | } | |
2899 | NEXT (vpc); | |
2900 | ||
2901 | CASE (sem, INSN_LD_DISP) : /* ld $optdisp, $dst */ | |
2902 | { | |
2903 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2904 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2905 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
c906108c SS |
2906 | int UNUSED written = 0; |
2907 | IADDR UNUSED pc = abuf->addr; | |
2908 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
2909 | ||
2910 | { | |
2911 | SI opval = GETMEMSI (current_cpu, pc, FLD (f_optdisp)); | |
2912 | * FLD (i_dst) = opval; | |
2913 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2914 | } | |
2915 | ||
2916 | #undef FLD | |
2917 | } | |
2918 | NEXT (vpc); | |
2919 | ||
2920 | CASE (sem, INSN_LD_INDIRECT_DISP) : /* ld $optdisp($abase), $dst */ | |
2921 | { | |
2922 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2923 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2924 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
c906108c SS |
2925 | int UNUSED written = 0; |
2926 | IADDR UNUSED pc = abuf->addr; | |
2927 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
2928 | ||
2929 | { | |
2930 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), * FLD (i_abase))); | |
2931 | * FLD (i_dst) = opval; | |
2932 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2933 | } | |
2934 | ||
2935 | #undef FLD | |
2936 | } | |
2937 | NEXT (vpc); | |
2938 | ||
2939 | CASE (sem, INSN_LD_INDEX_DISP) : /* ld $optdisp[$index*S$scale], $dst */ | |
2940 | { | |
2941 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2942 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2943 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
c906108c SS |
2944 | int UNUSED written = 0; |
2945 | IADDR UNUSED pc = abuf->addr; | |
2946 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
2947 | ||
2948 | { | |
2949 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))); | |
2950 | * FLD (i_dst) = opval; | |
2951 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2952 | } | |
2953 | ||
2954 | #undef FLD | |
2955 | } | |
2956 | NEXT (vpc); | |
2957 | ||
2958 | CASE (sem, INSN_LD_INDIRECT_INDEX_DISP) : /* ld $optdisp($abase)[$index*S$scale], $dst */ | |
2959 | { | |
2960 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2961 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2962 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
c906108c SS |
2963 | int UNUSED written = 0; |
2964 | IADDR UNUSED pc = abuf->addr; | |
2965 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
2966 | ||
2967 | { | |
2968 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))))); | |
2969 | * FLD (i_dst) = opval; | |
2970 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2971 | } | |
2972 | ||
2973 | #undef FLD | |
2974 | } | |
2975 | NEXT (vpc); | |
2976 | ||
2977 | CASE (sem, INSN_LDOB_OFFSET) : /* ldob $offset, $dst */ | |
2978 | { | |
2979 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2980 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 2981 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f |
c906108c SS |
2982 | int UNUSED written = 0; |
2983 | IADDR UNUSED pc = abuf->addr; | |
2984 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
2985 | ||
2986 | { | |
2987 | SI opval = GETMEMUQI (current_cpu, pc, FLD (f_offset)); | |
2988 | * FLD (i_dst) = opval; | |
2989 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
2990 | } | |
2991 | ||
2992 | #undef FLD | |
2993 | } | |
2994 | NEXT (vpc); | |
2995 | ||
2996 | CASE (sem, INSN_LDOB_INDIRECT_OFFSET) : /* ldob $offset($abase), $dst */ | |
2997 | { | |
2998 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
2999 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3000 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f |
c906108c SS |
3001 | int UNUSED written = 0; |
3002 | IADDR UNUSED pc = abuf->addr; | |
3003 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
3004 | ||
3005 | { | |
3006 | SI opval = GETMEMUQI (current_cpu, pc, ADDSI (FLD (f_offset), * FLD (i_abase))); | |
3007 | * FLD (i_dst) = opval; | |
3008 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3009 | } | |
3010 | ||
3011 | #undef FLD | |
3012 | } | |
3013 | NEXT (vpc); | |
3014 | ||
3015 | CASE (sem, INSN_LDOB_INDIRECT) : /* ldob ($abase), $dst */ | |
3016 | { | |
3017 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3018 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3019 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f |
c906108c SS |
3020 | int UNUSED written = 0; |
3021 | IADDR UNUSED pc = abuf->addr; | |
3022 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
3023 | ||
3024 | { | |
3025 | SI opval = GETMEMUQI (current_cpu, pc, * FLD (i_abase)); | |
3026 | * FLD (i_dst) = opval; | |
3027 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3028 | } | |
3029 | ||
3030 | #undef FLD | |
3031 | } | |
3032 | NEXT (vpc); | |
3033 | ||
3034 | CASE (sem, INSN_LDOB_INDIRECT_INDEX) : /* ldob ($abase)[$index*S$scale], $dst */ | |
3035 | { | |
3036 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3037 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3038 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
c906108c SS |
3039 | int UNUSED written = 0; |
3040 | IADDR UNUSED pc = abuf->addr; | |
3041 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
3042 | ||
3043 | { | |
3044 | SI opval = GETMEMUQI (current_cpu, pc, ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))); | |
3045 | * FLD (i_dst) = opval; | |
3046 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3047 | } | |
3048 | ||
3049 | #undef FLD | |
3050 | } | |
3051 | NEXT (vpc); | |
3052 | ||
3053 | CASE (sem, INSN_LDOB_DISP) : /* ldob $optdisp, $dst */ | |
3054 | { | |
3055 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3056 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3057 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
c906108c SS |
3058 | int UNUSED written = 0; |
3059 | IADDR UNUSED pc = abuf->addr; | |
3060 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
3061 | ||
3062 | { | |
3063 | SI opval = GETMEMUQI (current_cpu, pc, FLD (f_optdisp)); | |
3064 | * FLD (i_dst) = opval; | |
3065 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3066 | } | |
3067 | ||
3068 | #undef FLD | |
3069 | } | |
3070 | NEXT (vpc); | |
3071 | ||
3072 | CASE (sem, INSN_LDOB_INDIRECT_DISP) : /* ldob $optdisp($abase), $dst */ | |
3073 | { | |
3074 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3075 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3076 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
c906108c SS |
3077 | int UNUSED written = 0; |
3078 | IADDR UNUSED pc = abuf->addr; | |
3079 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
3080 | ||
3081 | { | |
3082 | SI opval = GETMEMUQI (current_cpu, pc, ADDSI (FLD (f_optdisp), * FLD (i_abase))); | |
3083 | * FLD (i_dst) = opval; | |
3084 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3085 | } | |
3086 | ||
3087 | #undef FLD | |
3088 | } | |
3089 | NEXT (vpc); | |
3090 | ||
3091 | CASE (sem, INSN_LDOB_INDEX_DISP) : /* ldob $optdisp[$index*S$scale], $dst */ | |
3092 | { | |
3093 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3094 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3095 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
c906108c SS |
3096 | int UNUSED written = 0; |
3097 | IADDR UNUSED pc = abuf->addr; | |
3098 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
3099 | ||
3100 | { | |
3101 | SI opval = GETMEMUQI (current_cpu, pc, ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))); | |
3102 | * FLD (i_dst) = opval; | |
3103 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3104 | } | |
3105 | ||
3106 | #undef FLD | |
3107 | } | |
3108 | NEXT (vpc); | |
3109 | ||
3110 | CASE (sem, INSN_LDOB_INDIRECT_INDEX_DISP) : /* ldob $optdisp($abase)[$index*S$scale], $dst */ | |
3111 | { | |
3112 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3113 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3114 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
c906108c SS |
3115 | int UNUSED written = 0; |
3116 | IADDR UNUSED pc = abuf->addr; | |
3117 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
3118 | ||
3119 | { | |
3120 | SI opval = GETMEMUQI (current_cpu, pc, ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))))); | |
3121 | * FLD (i_dst) = opval; | |
3122 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3123 | } | |
3124 | ||
3125 | #undef FLD | |
3126 | } | |
3127 | NEXT (vpc); | |
3128 | ||
3129 | CASE (sem, INSN_LDOS_OFFSET) : /* ldos $offset, $dst */ | |
3130 | { | |
3131 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3132 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3133 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f |
c906108c SS |
3134 | int UNUSED written = 0; |
3135 | IADDR UNUSED pc = abuf->addr; | |
3136 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
3137 | ||
3138 | { | |
3139 | SI opval = GETMEMUHI (current_cpu, pc, FLD (f_offset)); | |
3140 | * FLD (i_dst) = opval; | |
3141 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3142 | } | |
3143 | ||
3144 | #undef FLD | |
3145 | } | |
3146 | NEXT (vpc); | |
3147 | ||
3148 | CASE (sem, INSN_LDOS_INDIRECT_OFFSET) : /* ldos $offset($abase), $dst */ | |
3149 | { | |
3150 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3151 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3152 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f |
c906108c SS |
3153 | int UNUSED written = 0; |
3154 | IADDR UNUSED pc = abuf->addr; | |
3155 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
3156 | ||
3157 | { | |
3158 | SI opval = GETMEMUHI (current_cpu, pc, ADDSI (FLD (f_offset), * FLD (i_abase))); | |
3159 | * FLD (i_dst) = opval; | |
3160 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3161 | } | |
3162 | ||
3163 | #undef FLD | |
3164 | } | |
3165 | NEXT (vpc); | |
3166 | ||
3167 | CASE (sem, INSN_LDOS_INDIRECT) : /* ldos ($abase), $dst */ | |
3168 | { | |
3169 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3170 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3171 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f |
c906108c SS |
3172 | int UNUSED written = 0; |
3173 | IADDR UNUSED pc = abuf->addr; | |
3174 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
3175 | ||
3176 | { | |
3177 | SI opval = GETMEMUHI (current_cpu, pc, * FLD (i_abase)); | |
3178 | * FLD (i_dst) = opval; | |
3179 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3180 | } | |
3181 | ||
3182 | #undef FLD | |
3183 | } | |
3184 | NEXT (vpc); | |
3185 | ||
3186 | CASE (sem, INSN_LDOS_INDIRECT_INDEX) : /* ldos ($abase)[$index*S$scale], $dst */ | |
3187 | { | |
3188 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3189 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3190 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
c906108c SS |
3191 | int UNUSED written = 0; |
3192 | IADDR UNUSED pc = abuf->addr; | |
3193 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
3194 | ||
3195 | { | |
3196 | SI opval = GETMEMUHI (current_cpu, pc, ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))); | |
3197 | * FLD (i_dst) = opval; | |
3198 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3199 | } | |
3200 | ||
3201 | #undef FLD | |
3202 | } | |
3203 | NEXT (vpc); | |
3204 | ||
3205 | CASE (sem, INSN_LDOS_DISP) : /* ldos $optdisp, $dst */ | |
3206 | { | |
3207 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3208 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3209 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
c906108c SS |
3210 | int UNUSED written = 0; |
3211 | IADDR UNUSED pc = abuf->addr; | |
3212 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
3213 | ||
3214 | { | |
3215 | SI opval = GETMEMUHI (current_cpu, pc, FLD (f_optdisp)); | |
3216 | * FLD (i_dst) = opval; | |
3217 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3218 | } | |
3219 | ||
3220 | #undef FLD | |
3221 | } | |
3222 | NEXT (vpc); | |
3223 | ||
3224 | CASE (sem, INSN_LDOS_INDIRECT_DISP) : /* ldos $optdisp($abase), $dst */ | |
3225 | { | |
3226 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3227 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3228 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
c906108c SS |
3229 | int UNUSED written = 0; |
3230 | IADDR UNUSED pc = abuf->addr; | |
3231 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
3232 | ||
3233 | { | |
3234 | SI opval = GETMEMUHI (current_cpu, pc, ADDSI (FLD (f_optdisp), * FLD (i_abase))); | |
3235 | * FLD (i_dst) = opval; | |
3236 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3237 | } | |
3238 | ||
3239 | #undef FLD | |
3240 | } | |
3241 | NEXT (vpc); | |
3242 | ||
3243 | CASE (sem, INSN_LDOS_INDEX_DISP) : /* ldos $optdisp[$index*S$scale], $dst */ | |
3244 | { | |
3245 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3246 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3247 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
c906108c SS |
3248 | int UNUSED written = 0; |
3249 | IADDR UNUSED pc = abuf->addr; | |
3250 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
3251 | ||
3252 | { | |
3253 | SI opval = GETMEMUHI (current_cpu, pc, ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))); | |
3254 | * FLD (i_dst) = opval; | |
3255 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3256 | } | |
3257 | ||
3258 | #undef FLD | |
3259 | } | |
3260 | NEXT (vpc); | |
3261 | ||
3262 | CASE (sem, INSN_LDOS_INDIRECT_INDEX_DISP) : /* ldos $optdisp($abase)[$index*S$scale], $dst */ | |
3263 | { | |
3264 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3265 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3266 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
c906108c SS |
3267 | int UNUSED written = 0; |
3268 | IADDR UNUSED pc = abuf->addr; | |
3269 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
3270 | ||
3271 | { | |
3272 | SI opval = GETMEMUHI (current_cpu, pc, ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))))); | |
3273 | * FLD (i_dst) = opval; | |
3274 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3275 | } | |
3276 | ||
3277 | #undef FLD | |
3278 | } | |
3279 | NEXT (vpc); | |
3280 | ||
3281 | CASE (sem, INSN_LDIB_OFFSET) : /* ldib $offset, $dst */ | |
3282 | { | |
3283 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3284 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3285 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f |
c906108c SS |
3286 | int UNUSED written = 0; |
3287 | IADDR UNUSED pc = abuf->addr; | |
3288 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
3289 | ||
3290 | { | |
3291 | SI opval = GETMEMQI (current_cpu, pc, FLD (f_offset)); | |
3292 | * FLD (i_dst) = opval; | |
3293 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3294 | } | |
3295 | ||
3296 | #undef FLD | |
3297 | } | |
3298 | NEXT (vpc); | |
3299 | ||
3300 | CASE (sem, INSN_LDIB_INDIRECT_OFFSET) : /* ldib $offset($abase), $dst */ | |
3301 | { | |
3302 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3303 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3304 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f |
c906108c SS |
3305 | int UNUSED written = 0; |
3306 | IADDR UNUSED pc = abuf->addr; | |
3307 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
3308 | ||
3309 | { | |
3310 | SI opval = GETMEMQI (current_cpu, pc, ADDSI (FLD (f_offset), * FLD (i_abase))); | |
3311 | * FLD (i_dst) = opval; | |
3312 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3313 | } | |
3314 | ||
3315 | #undef FLD | |
3316 | } | |
3317 | NEXT (vpc); | |
3318 | ||
3319 | CASE (sem, INSN_LDIB_INDIRECT) : /* ldib ($abase), $dst */ | |
3320 | { | |
3321 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3322 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3323 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f |
c906108c SS |
3324 | int UNUSED written = 0; |
3325 | IADDR UNUSED pc = abuf->addr; | |
3326 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
3327 | ||
3328 | { | |
3329 | SI opval = GETMEMQI (current_cpu, pc, * FLD (i_abase)); | |
3330 | * FLD (i_dst) = opval; | |
3331 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3332 | } | |
3333 | ||
3334 | #undef FLD | |
3335 | } | |
3336 | NEXT (vpc); | |
3337 | ||
3338 | CASE (sem, INSN_LDIB_INDIRECT_INDEX) : /* ldib ($abase)[$index*S$scale], $dst */ | |
3339 | { | |
3340 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3341 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3342 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
c906108c SS |
3343 | int UNUSED written = 0; |
3344 | IADDR UNUSED pc = abuf->addr; | |
3345 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
3346 | ||
3347 | { | |
3348 | SI opval = GETMEMQI (current_cpu, pc, ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))); | |
3349 | * FLD (i_dst) = opval; | |
3350 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3351 | } | |
3352 | ||
3353 | #undef FLD | |
3354 | } | |
3355 | NEXT (vpc); | |
3356 | ||
3357 | CASE (sem, INSN_LDIB_DISP) : /* ldib $optdisp, $dst */ | |
3358 | { | |
3359 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3360 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3361 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
c906108c SS |
3362 | int UNUSED written = 0; |
3363 | IADDR UNUSED pc = abuf->addr; | |
3364 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
3365 | ||
3366 | { | |
3367 | SI opval = GETMEMQI (current_cpu, pc, FLD (f_optdisp)); | |
3368 | * FLD (i_dst) = opval; | |
3369 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3370 | } | |
3371 | ||
3372 | #undef FLD | |
3373 | } | |
3374 | NEXT (vpc); | |
3375 | ||
3376 | CASE (sem, INSN_LDIB_INDIRECT_DISP) : /* ldib $optdisp($abase), $dst */ | |
3377 | { | |
3378 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3379 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3380 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
c906108c SS |
3381 | int UNUSED written = 0; |
3382 | IADDR UNUSED pc = abuf->addr; | |
3383 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
3384 | ||
3385 | { | |
3386 | SI opval = GETMEMQI (current_cpu, pc, ADDSI (FLD (f_optdisp), * FLD (i_abase))); | |
3387 | * FLD (i_dst) = opval; | |
3388 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3389 | } | |
3390 | ||
3391 | #undef FLD | |
3392 | } | |
3393 | NEXT (vpc); | |
3394 | ||
3395 | CASE (sem, INSN_LDIB_INDEX_DISP) : /* ldib $optdisp[$index*S$scale], $dst */ | |
3396 | { | |
3397 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3398 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3399 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
c906108c SS |
3400 | int UNUSED written = 0; |
3401 | IADDR UNUSED pc = abuf->addr; | |
3402 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
3403 | ||
3404 | { | |
3405 | SI opval = GETMEMQI (current_cpu, pc, ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))); | |
3406 | * FLD (i_dst) = opval; | |
3407 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3408 | } | |
3409 | ||
3410 | #undef FLD | |
3411 | } | |
3412 | NEXT (vpc); | |
3413 | ||
3414 | CASE (sem, INSN_LDIB_INDIRECT_INDEX_DISP) : /* ldib $optdisp($abase)[$index*S$scale], $dst */ | |
3415 | { | |
3416 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3417 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3418 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
c906108c SS |
3419 | int UNUSED written = 0; |
3420 | IADDR UNUSED pc = abuf->addr; | |
3421 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
3422 | ||
3423 | { | |
3424 | SI opval = GETMEMQI (current_cpu, pc, ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))))); | |
3425 | * FLD (i_dst) = opval; | |
3426 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3427 | } | |
3428 | ||
3429 | #undef FLD | |
3430 | } | |
3431 | NEXT (vpc); | |
3432 | ||
3433 | CASE (sem, INSN_LDIS_OFFSET) : /* ldis $offset, $dst */ | |
3434 | { | |
3435 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3436 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3437 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f |
c906108c SS |
3438 | int UNUSED written = 0; |
3439 | IADDR UNUSED pc = abuf->addr; | |
3440 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
3441 | ||
3442 | { | |
3443 | SI opval = GETMEMHI (current_cpu, pc, FLD (f_offset)); | |
3444 | * FLD (i_dst) = opval; | |
3445 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3446 | } | |
3447 | ||
3448 | #undef FLD | |
3449 | } | |
3450 | NEXT (vpc); | |
3451 | ||
3452 | CASE (sem, INSN_LDIS_INDIRECT_OFFSET) : /* ldis $offset($abase), $dst */ | |
3453 | { | |
3454 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3455 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3456 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f |
c906108c SS |
3457 | int UNUSED written = 0; |
3458 | IADDR UNUSED pc = abuf->addr; | |
3459 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
3460 | ||
3461 | { | |
3462 | SI opval = GETMEMHI (current_cpu, pc, ADDSI (FLD (f_offset), * FLD (i_abase))); | |
3463 | * FLD (i_dst) = opval; | |
3464 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3465 | } | |
3466 | ||
3467 | #undef FLD | |
3468 | } | |
3469 | NEXT (vpc); | |
3470 | ||
3471 | CASE (sem, INSN_LDIS_INDIRECT) : /* ldis ($abase), $dst */ | |
3472 | { | |
3473 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3474 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3475 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f |
c906108c SS |
3476 | int UNUSED written = 0; |
3477 | IADDR UNUSED pc = abuf->addr; | |
3478 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
3479 | ||
3480 | { | |
3481 | SI opval = GETMEMHI (current_cpu, pc, * FLD (i_abase)); | |
3482 | * FLD (i_dst) = opval; | |
3483 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3484 | } | |
3485 | ||
3486 | #undef FLD | |
3487 | } | |
3488 | NEXT (vpc); | |
3489 | ||
3490 | CASE (sem, INSN_LDIS_INDIRECT_INDEX) : /* ldis ($abase)[$index*S$scale], $dst */ | |
3491 | { | |
3492 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3493 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3494 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
c906108c SS |
3495 | int UNUSED written = 0; |
3496 | IADDR UNUSED pc = abuf->addr; | |
3497 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
3498 | ||
3499 | { | |
3500 | SI opval = GETMEMHI (current_cpu, pc, ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))); | |
3501 | * FLD (i_dst) = opval; | |
3502 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3503 | } | |
3504 | ||
3505 | #undef FLD | |
3506 | } | |
3507 | NEXT (vpc); | |
3508 | ||
3509 | CASE (sem, INSN_LDIS_DISP) : /* ldis $optdisp, $dst */ | |
3510 | { | |
3511 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3512 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3513 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
c906108c SS |
3514 | int UNUSED written = 0; |
3515 | IADDR UNUSED pc = abuf->addr; | |
3516 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
3517 | ||
3518 | { | |
3519 | SI opval = GETMEMHI (current_cpu, pc, FLD (f_optdisp)); | |
3520 | * FLD (i_dst) = opval; | |
3521 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3522 | } | |
3523 | ||
3524 | #undef FLD | |
3525 | } | |
3526 | NEXT (vpc); | |
3527 | ||
3528 | CASE (sem, INSN_LDIS_INDIRECT_DISP) : /* ldis $optdisp($abase), $dst */ | |
3529 | { | |
3530 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3531 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3532 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
c906108c SS |
3533 | int UNUSED written = 0; |
3534 | IADDR UNUSED pc = abuf->addr; | |
3535 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
3536 | ||
3537 | { | |
3538 | SI opval = GETMEMHI (current_cpu, pc, ADDSI (FLD (f_optdisp), * FLD (i_abase))); | |
3539 | * FLD (i_dst) = opval; | |
3540 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3541 | } | |
3542 | ||
3543 | #undef FLD | |
3544 | } | |
3545 | NEXT (vpc); | |
3546 | ||
3547 | CASE (sem, INSN_LDIS_INDEX_DISP) : /* ldis $optdisp[$index*S$scale], $dst */ | |
3548 | { | |
3549 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3550 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3551 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
c906108c SS |
3552 | int UNUSED written = 0; |
3553 | IADDR UNUSED pc = abuf->addr; | |
3554 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
3555 | ||
3556 | { | |
3557 | SI opval = GETMEMHI (current_cpu, pc, ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))); | |
3558 | * FLD (i_dst) = opval; | |
3559 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3560 | } | |
3561 | ||
3562 | #undef FLD | |
3563 | } | |
3564 | NEXT (vpc); | |
3565 | ||
3566 | CASE (sem, INSN_LDIS_INDIRECT_INDEX_DISP) : /* ldis $optdisp($abase)[$index*S$scale], $dst */ | |
3567 | { | |
3568 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3569 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3570 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
c906108c SS |
3571 | int UNUSED written = 0; |
3572 | IADDR UNUSED pc = abuf->addr; | |
3573 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
3574 | ||
3575 | { | |
3576 | SI opval = GETMEMHI (current_cpu, pc, ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))))); | |
3577 | * FLD (i_dst) = opval; | |
3578 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3579 | } | |
3580 | ||
3581 | #undef FLD | |
3582 | } | |
3583 | NEXT (vpc); | |
3584 | ||
3585 | CASE (sem, INSN_LDL_OFFSET) : /* ldl $offset, $dst */ | |
3586 | { | |
3587 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3588 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3589 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f |
c906108c SS |
3590 | int UNUSED written = 0; |
3591 | IADDR UNUSED pc = abuf->addr; | |
3592 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
3593 | ||
7a292a7a | 3594 | { |
c906108c | 3595 | SI tmp_temp; |
7a292a7a | 3596 | SI tmp_dregno; |
c906108c SS |
3597 | tmp_dregno = FLD (f_srcdst); |
3598 | tmp_temp = FLD (f_offset); | |
3599 | { | |
3600 | SI opval = GETMEMSI (current_cpu, pc, tmp_temp); | |
3601 | * FLD (i_dst) = opval; | |
3602 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3603 | } | |
3604 | { | |
3605 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); | |
3606 | CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; | |
7a292a7a | 3607 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-1", 'x', opval); |
c906108c | 3608 | } |
7a292a7a | 3609 | } |
c906108c SS |
3610 | |
3611 | #undef FLD | |
3612 | } | |
3613 | NEXT (vpc); | |
3614 | ||
3615 | CASE (sem, INSN_LDL_INDIRECT_OFFSET) : /* ldl $offset($abase), $dst */ | |
3616 | { | |
3617 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3618 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3619 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f |
c906108c SS |
3620 | int UNUSED written = 0; |
3621 | IADDR UNUSED pc = abuf->addr; | |
3622 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
3623 | ||
7a292a7a | 3624 | { |
c906108c | 3625 | SI tmp_temp; |
7a292a7a | 3626 | SI tmp_dregno; |
c906108c SS |
3627 | tmp_dregno = FLD (f_srcdst); |
3628 | tmp_temp = ADDSI (FLD (f_offset), * FLD (i_abase)); | |
3629 | { | |
3630 | SI opval = GETMEMSI (current_cpu, pc, tmp_temp); | |
3631 | * FLD (i_dst) = opval; | |
3632 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3633 | } | |
3634 | { | |
3635 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); | |
3636 | CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; | |
7a292a7a | 3637 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-1", 'x', opval); |
c906108c | 3638 | } |
7a292a7a | 3639 | } |
c906108c SS |
3640 | |
3641 | #undef FLD | |
3642 | } | |
3643 | NEXT (vpc); | |
3644 | ||
3645 | CASE (sem, INSN_LDL_INDIRECT) : /* ldl ($abase), $dst */ | |
3646 | { | |
3647 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3648 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3649 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f |
c906108c SS |
3650 | int UNUSED written = 0; |
3651 | IADDR UNUSED pc = abuf->addr; | |
3652 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
3653 | ||
7a292a7a | 3654 | { |
c906108c | 3655 | SI tmp_temp; |
7a292a7a | 3656 | SI tmp_dregno; |
c906108c SS |
3657 | tmp_dregno = FLD (f_srcdst); |
3658 | tmp_temp = * FLD (i_abase); | |
3659 | { | |
3660 | SI opval = GETMEMSI (current_cpu, pc, tmp_temp); | |
3661 | * FLD (i_dst) = opval; | |
3662 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3663 | } | |
3664 | { | |
3665 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); | |
3666 | CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; | |
7a292a7a | 3667 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-1", 'x', opval); |
c906108c | 3668 | } |
7a292a7a | 3669 | } |
c906108c SS |
3670 | |
3671 | #undef FLD | |
3672 | } | |
3673 | NEXT (vpc); | |
3674 | ||
3675 | CASE (sem, INSN_LDL_INDIRECT_INDEX) : /* ldl ($abase)[$index*S$scale], $dst */ | |
3676 | { | |
3677 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3678 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3679 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
c906108c SS |
3680 | int UNUSED written = 0; |
3681 | IADDR UNUSED pc = abuf->addr; | |
3682 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
3683 | ||
7a292a7a | 3684 | { |
c906108c | 3685 | SI tmp_temp; |
7a292a7a | 3686 | SI tmp_dregno; |
c906108c SS |
3687 | tmp_dregno = FLD (f_srcdst); |
3688 | tmp_temp = ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))); | |
3689 | { | |
3690 | SI opval = GETMEMSI (current_cpu, pc, tmp_temp); | |
3691 | * FLD (i_dst) = opval; | |
3692 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3693 | } | |
3694 | { | |
3695 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); | |
3696 | CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; | |
7a292a7a | 3697 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-1", 'x', opval); |
c906108c | 3698 | } |
7a292a7a | 3699 | } |
c906108c SS |
3700 | |
3701 | #undef FLD | |
3702 | } | |
3703 | NEXT (vpc); | |
3704 | ||
3705 | CASE (sem, INSN_LDL_DISP) : /* ldl $optdisp, $dst */ | |
3706 | { | |
3707 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3708 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3709 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
c906108c SS |
3710 | int UNUSED written = 0; |
3711 | IADDR UNUSED pc = abuf->addr; | |
3712 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
3713 | ||
7a292a7a | 3714 | { |
c906108c | 3715 | SI tmp_temp; |
7a292a7a | 3716 | SI tmp_dregno; |
c906108c SS |
3717 | tmp_dregno = FLD (f_srcdst); |
3718 | tmp_temp = FLD (f_optdisp); | |
3719 | { | |
3720 | SI opval = GETMEMSI (current_cpu, pc, tmp_temp); | |
3721 | * FLD (i_dst) = opval; | |
3722 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3723 | } | |
3724 | { | |
3725 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); | |
3726 | CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; | |
7a292a7a | 3727 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-1", 'x', opval); |
c906108c | 3728 | } |
7a292a7a | 3729 | } |
c906108c SS |
3730 | |
3731 | #undef FLD | |
3732 | } | |
3733 | NEXT (vpc); | |
3734 | ||
3735 | CASE (sem, INSN_LDL_INDIRECT_DISP) : /* ldl $optdisp($abase), $dst */ | |
3736 | { | |
3737 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3738 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3739 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
c906108c SS |
3740 | int UNUSED written = 0; |
3741 | IADDR UNUSED pc = abuf->addr; | |
3742 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
3743 | ||
7a292a7a | 3744 | { |
c906108c | 3745 | SI tmp_temp; |
7a292a7a | 3746 | SI tmp_dregno; |
c906108c SS |
3747 | tmp_dregno = FLD (f_srcdst); |
3748 | tmp_temp = ADDSI (FLD (f_optdisp), * FLD (i_abase)); | |
3749 | { | |
3750 | SI opval = GETMEMSI (current_cpu, pc, tmp_temp); | |
3751 | * FLD (i_dst) = opval; | |
3752 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3753 | } | |
3754 | { | |
3755 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); | |
3756 | CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; | |
7a292a7a | 3757 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-1", 'x', opval); |
c906108c | 3758 | } |
7a292a7a | 3759 | } |
c906108c SS |
3760 | |
3761 | #undef FLD | |
3762 | } | |
3763 | NEXT (vpc); | |
3764 | ||
3765 | CASE (sem, INSN_LDL_INDEX_DISP) : /* ldl $optdisp[$index*S$scale], $dst */ | |
3766 | { | |
3767 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3768 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3769 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
c906108c SS |
3770 | int UNUSED written = 0; |
3771 | IADDR UNUSED pc = abuf->addr; | |
3772 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
3773 | ||
7a292a7a | 3774 | { |
c906108c | 3775 | SI tmp_temp; |
7a292a7a | 3776 | SI tmp_dregno; |
c906108c SS |
3777 | tmp_dregno = FLD (f_srcdst); |
3778 | tmp_temp = ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))); | |
3779 | { | |
3780 | SI opval = GETMEMSI (current_cpu, pc, tmp_temp); | |
3781 | * FLD (i_dst) = opval; | |
3782 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3783 | } | |
3784 | { | |
3785 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); | |
3786 | CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; | |
7a292a7a | 3787 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-1", 'x', opval); |
c906108c | 3788 | } |
7a292a7a | 3789 | } |
c906108c SS |
3790 | |
3791 | #undef FLD | |
3792 | } | |
3793 | NEXT (vpc); | |
3794 | ||
3795 | CASE (sem, INSN_LDL_INDIRECT_INDEX_DISP) : /* ldl $optdisp($abase)[$index*S$scale], $dst */ | |
3796 | { | |
3797 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3798 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3799 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
c906108c SS |
3800 | int UNUSED written = 0; |
3801 | IADDR UNUSED pc = abuf->addr; | |
3802 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
3803 | ||
7a292a7a | 3804 | { |
c906108c | 3805 | SI tmp_temp; |
7a292a7a | 3806 | SI tmp_dregno; |
c906108c SS |
3807 | tmp_dregno = FLD (f_srcdst); |
3808 | tmp_temp = ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))); | |
3809 | { | |
3810 | SI opval = GETMEMSI (current_cpu, pc, tmp_temp); | |
3811 | * FLD (i_dst) = opval; | |
3812 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3813 | } | |
3814 | { | |
3815 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); | |
3816 | CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; | |
7a292a7a | 3817 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-1", 'x', opval); |
c906108c | 3818 | } |
7a292a7a | 3819 | } |
c906108c SS |
3820 | |
3821 | #undef FLD | |
3822 | } | |
3823 | NEXT (vpc); | |
3824 | ||
3825 | CASE (sem, INSN_LDT_OFFSET) : /* ldt $offset, $dst */ | |
3826 | { | |
3827 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3828 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3829 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f |
c906108c SS |
3830 | int UNUSED written = 0; |
3831 | IADDR UNUSED pc = abuf->addr; | |
3832 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
3833 | ||
7a292a7a | 3834 | { |
c906108c | 3835 | SI tmp_temp; |
7a292a7a | 3836 | SI tmp_dregno; |
c906108c SS |
3837 | tmp_dregno = FLD (f_srcdst); |
3838 | tmp_temp = FLD (f_offset); | |
3839 | { | |
3840 | SI opval = GETMEMSI (current_cpu, pc, tmp_temp); | |
3841 | * FLD (i_dst) = opval; | |
3842 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3843 | } | |
3844 | { | |
3845 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); | |
3846 | CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; | |
7a292a7a | 3847 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-1", 'x', opval); |
c906108c SS |
3848 | } |
3849 | { | |
3850 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8)); | |
3851 | CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval; | |
7a292a7a | 3852 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-2", 'x', opval); |
c906108c | 3853 | } |
7a292a7a | 3854 | } |
c906108c SS |
3855 | |
3856 | #undef FLD | |
3857 | } | |
3858 | NEXT (vpc); | |
3859 | ||
3860 | CASE (sem, INSN_LDT_INDIRECT_OFFSET) : /* ldt $offset($abase), $dst */ | |
3861 | { | |
3862 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3863 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3864 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f |
c906108c SS |
3865 | int UNUSED written = 0; |
3866 | IADDR UNUSED pc = abuf->addr; | |
3867 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
3868 | ||
7a292a7a | 3869 | { |
c906108c | 3870 | SI tmp_temp; |
7a292a7a | 3871 | SI tmp_dregno; |
c906108c SS |
3872 | tmp_dregno = FLD (f_srcdst); |
3873 | tmp_temp = ADDSI (FLD (f_offset), * FLD (i_abase)); | |
3874 | { | |
3875 | SI opval = GETMEMSI (current_cpu, pc, tmp_temp); | |
3876 | * FLD (i_dst) = opval; | |
3877 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3878 | } | |
3879 | { | |
3880 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); | |
3881 | CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; | |
7a292a7a | 3882 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-1", 'x', opval); |
c906108c SS |
3883 | } |
3884 | { | |
3885 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8)); | |
3886 | CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval; | |
7a292a7a | 3887 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-2", 'x', opval); |
c906108c | 3888 | } |
7a292a7a | 3889 | } |
c906108c SS |
3890 | |
3891 | #undef FLD | |
3892 | } | |
3893 | NEXT (vpc); | |
3894 | ||
3895 | CASE (sem, INSN_LDT_INDIRECT) : /* ldt ($abase), $dst */ | |
3896 | { | |
3897 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3898 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3899 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f |
c906108c SS |
3900 | int UNUSED written = 0; |
3901 | IADDR UNUSED pc = abuf->addr; | |
3902 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
3903 | ||
7a292a7a | 3904 | { |
c906108c | 3905 | SI tmp_temp; |
7a292a7a | 3906 | SI tmp_dregno; |
c906108c SS |
3907 | tmp_dregno = FLD (f_srcdst); |
3908 | tmp_temp = * FLD (i_abase); | |
3909 | { | |
3910 | SI opval = GETMEMSI (current_cpu, pc, tmp_temp); | |
3911 | * FLD (i_dst) = opval; | |
3912 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3913 | } | |
3914 | { | |
3915 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); | |
3916 | CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; | |
7a292a7a | 3917 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-1", 'x', opval); |
c906108c SS |
3918 | } |
3919 | { | |
3920 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8)); | |
3921 | CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval; | |
7a292a7a | 3922 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-2", 'x', opval); |
c906108c | 3923 | } |
7a292a7a | 3924 | } |
c906108c SS |
3925 | |
3926 | #undef FLD | |
3927 | } | |
3928 | NEXT (vpc); | |
3929 | ||
3930 | CASE (sem, INSN_LDT_INDIRECT_INDEX) : /* ldt ($abase)[$index*S$scale], $dst */ | |
3931 | { | |
3932 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3933 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3934 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
c906108c SS |
3935 | int UNUSED written = 0; |
3936 | IADDR UNUSED pc = abuf->addr; | |
3937 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
3938 | ||
7a292a7a | 3939 | { |
c906108c | 3940 | SI tmp_temp; |
7a292a7a | 3941 | SI tmp_dregno; |
c906108c SS |
3942 | tmp_dregno = FLD (f_srcdst); |
3943 | tmp_temp = ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))); | |
3944 | { | |
3945 | SI opval = GETMEMSI (current_cpu, pc, tmp_temp); | |
3946 | * FLD (i_dst) = opval; | |
3947 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3948 | } | |
3949 | { | |
3950 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); | |
3951 | CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; | |
7a292a7a | 3952 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-1", 'x', opval); |
c906108c SS |
3953 | } |
3954 | { | |
3955 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8)); | |
3956 | CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval; | |
7a292a7a | 3957 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-2", 'x', opval); |
c906108c | 3958 | } |
7a292a7a | 3959 | } |
c906108c SS |
3960 | |
3961 | #undef FLD | |
3962 | } | |
3963 | NEXT (vpc); | |
3964 | ||
3965 | CASE (sem, INSN_LDT_DISP) : /* ldt $optdisp, $dst */ | |
3966 | { | |
3967 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
3968 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 3969 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
c906108c SS |
3970 | int UNUSED written = 0; |
3971 | IADDR UNUSED pc = abuf->addr; | |
3972 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
3973 | ||
7a292a7a | 3974 | { |
c906108c | 3975 | SI tmp_temp; |
7a292a7a | 3976 | SI tmp_dregno; |
c906108c SS |
3977 | tmp_dregno = FLD (f_srcdst); |
3978 | tmp_temp = FLD (f_optdisp); | |
3979 | { | |
3980 | SI opval = GETMEMSI (current_cpu, pc, tmp_temp); | |
3981 | * FLD (i_dst) = opval; | |
3982 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
3983 | } | |
3984 | { | |
3985 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); | |
3986 | CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; | |
7a292a7a | 3987 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-1", 'x', opval); |
c906108c SS |
3988 | } |
3989 | { | |
3990 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8)); | |
3991 | CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval; | |
7a292a7a | 3992 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-2", 'x', opval); |
c906108c | 3993 | } |
7a292a7a | 3994 | } |
c906108c SS |
3995 | |
3996 | #undef FLD | |
3997 | } | |
3998 | NEXT (vpc); | |
3999 | ||
4000 | CASE (sem, INSN_LDT_INDIRECT_DISP) : /* ldt $optdisp($abase), $dst */ | |
4001 | { | |
4002 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4003 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4004 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
c906108c SS |
4005 | int UNUSED written = 0; |
4006 | IADDR UNUSED pc = abuf->addr; | |
4007 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
4008 | ||
7a292a7a | 4009 | { |
c906108c | 4010 | SI tmp_temp; |
7a292a7a | 4011 | SI tmp_dregno; |
c906108c SS |
4012 | tmp_dregno = FLD (f_srcdst); |
4013 | tmp_temp = ADDSI (FLD (f_optdisp), * FLD (i_abase)); | |
4014 | { | |
4015 | SI opval = GETMEMSI (current_cpu, pc, tmp_temp); | |
4016 | * FLD (i_dst) = opval; | |
4017 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
4018 | } | |
4019 | { | |
4020 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); | |
4021 | CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; | |
7a292a7a | 4022 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-1", 'x', opval); |
c906108c SS |
4023 | } |
4024 | { | |
4025 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8)); | |
4026 | CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval; | |
7a292a7a | 4027 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-2", 'x', opval); |
c906108c | 4028 | } |
7a292a7a | 4029 | } |
c906108c SS |
4030 | |
4031 | #undef FLD | |
4032 | } | |
4033 | NEXT (vpc); | |
4034 | ||
4035 | CASE (sem, INSN_LDT_INDEX_DISP) : /* ldt $optdisp[$index*S$scale], $dst */ | |
4036 | { | |
4037 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4038 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4039 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
c906108c SS |
4040 | int UNUSED written = 0; |
4041 | IADDR UNUSED pc = abuf->addr; | |
4042 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
4043 | ||
7a292a7a | 4044 | { |
c906108c | 4045 | SI tmp_temp; |
7a292a7a | 4046 | SI tmp_dregno; |
c906108c SS |
4047 | tmp_dregno = FLD (f_srcdst); |
4048 | tmp_temp = ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))); | |
4049 | { | |
4050 | SI opval = GETMEMSI (current_cpu, pc, tmp_temp); | |
4051 | * FLD (i_dst) = opval; | |
4052 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
4053 | } | |
4054 | { | |
4055 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); | |
4056 | CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; | |
7a292a7a | 4057 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-1", 'x', opval); |
c906108c SS |
4058 | } |
4059 | { | |
4060 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8)); | |
4061 | CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval; | |
7a292a7a | 4062 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-2", 'x', opval); |
c906108c | 4063 | } |
7a292a7a | 4064 | } |
c906108c SS |
4065 | |
4066 | #undef FLD | |
4067 | } | |
4068 | NEXT (vpc); | |
4069 | ||
4070 | CASE (sem, INSN_LDT_INDIRECT_INDEX_DISP) : /* ldt $optdisp($abase)[$index*S$scale], $dst */ | |
4071 | { | |
4072 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4073 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4074 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
c906108c SS |
4075 | int UNUSED written = 0; |
4076 | IADDR UNUSED pc = abuf->addr; | |
4077 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
4078 | ||
7a292a7a | 4079 | { |
c906108c | 4080 | SI tmp_temp; |
7a292a7a | 4081 | SI tmp_dregno; |
c906108c SS |
4082 | tmp_dregno = FLD (f_srcdst); |
4083 | tmp_temp = ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))); | |
4084 | { | |
4085 | SI opval = GETMEMSI (current_cpu, pc, tmp_temp); | |
4086 | * FLD (i_dst) = opval; | |
4087 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
4088 | } | |
4089 | { | |
4090 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); | |
4091 | CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; | |
7a292a7a | 4092 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-1", 'x', opval); |
c906108c SS |
4093 | } |
4094 | { | |
4095 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8)); | |
4096 | CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval; | |
7a292a7a | 4097 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-2", 'x', opval); |
c906108c | 4098 | } |
7a292a7a | 4099 | } |
c906108c SS |
4100 | |
4101 | #undef FLD | |
4102 | } | |
4103 | NEXT (vpc); | |
4104 | ||
4105 | CASE (sem, INSN_LDQ_OFFSET) : /* ldq $offset, $dst */ | |
4106 | { | |
4107 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4108 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4109 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f |
c906108c SS |
4110 | int UNUSED written = 0; |
4111 | IADDR UNUSED pc = abuf->addr; | |
4112 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
4113 | ||
7a292a7a | 4114 | { |
c906108c | 4115 | SI tmp_temp; |
7a292a7a | 4116 | SI tmp_dregno; |
c906108c SS |
4117 | tmp_dregno = FLD (f_srcdst); |
4118 | tmp_temp = FLD (f_offset); | |
4119 | { | |
4120 | SI opval = GETMEMSI (current_cpu, pc, tmp_temp); | |
4121 | * FLD (i_dst) = opval; | |
4122 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
4123 | } | |
4124 | { | |
4125 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); | |
4126 | CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; | |
7a292a7a | 4127 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-1", 'x', opval); |
c906108c SS |
4128 | } |
4129 | { | |
4130 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8)); | |
4131 | CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval; | |
7a292a7a | 4132 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-2", 'x', opval); |
c906108c SS |
4133 | } |
4134 | { | |
4135 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 12)); | |
4136 | CPU (h_gr[((FLD (f_srcdst)) + (3))]) = opval; | |
7a292a7a | 4137 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-3", 'x', opval); |
c906108c | 4138 | } |
7a292a7a | 4139 | } |
c906108c SS |
4140 | |
4141 | #undef FLD | |
4142 | } | |
4143 | NEXT (vpc); | |
4144 | ||
4145 | CASE (sem, INSN_LDQ_INDIRECT_OFFSET) : /* ldq $offset($abase), $dst */ | |
4146 | { | |
4147 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4148 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4149 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f |
c906108c SS |
4150 | int UNUSED written = 0; |
4151 | IADDR UNUSED pc = abuf->addr; | |
4152 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
4153 | ||
7a292a7a | 4154 | { |
c906108c | 4155 | SI tmp_temp; |
7a292a7a | 4156 | SI tmp_dregno; |
c906108c SS |
4157 | tmp_dregno = FLD (f_srcdst); |
4158 | tmp_temp = ADDSI (FLD (f_offset), * FLD (i_abase)); | |
4159 | { | |
4160 | SI opval = GETMEMSI (current_cpu, pc, tmp_temp); | |
4161 | * FLD (i_dst) = opval; | |
4162 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
4163 | } | |
4164 | { | |
4165 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); | |
4166 | CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; | |
7a292a7a | 4167 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-1", 'x', opval); |
c906108c SS |
4168 | } |
4169 | { | |
4170 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8)); | |
4171 | CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval; | |
7a292a7a | 4172 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-2", 'x', opval); |
c906108c SS |
4173 | } |
4174 | { | |
4175 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 12)); | |
4176 | CPU (h_gr[((FLD (f_srcdst)) + (3))]) = opval; | |
7a292a7a | 4177 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-3", 'x', opval); |
c906108c | 4178 | } |
7a292a7a | 4179 | } |
c906108c SS |
4180 | |
4181 | #undef FLD | |
4182 | } | |
4183 | NEXT (vpc); | |
4184 | ||
4185 | CASE (sem, INSN_LDQ_INDIRECT) : /* ldq ($abase), $dst */ | |
4186 | { | |
4187 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4188 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4189 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_offset.f |
c906108c SS |
4190 | int UNUSED written = 0; |
4191 | IADDR UNUSED pc = abuf->addr; | |
4192 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
4193 | ||
7a292a7a | 4194 | { |
c906108c | 4195 | SI tmp_temp; |
7a292a7a | 4196 | SI tmp_dregno; |
c906108c SS |
4197 | tmp_dregno = FLD (f_srcdst); |
4198 | tmp_temp = * FLD (i_abase); | |
4199 | { | |
4200 | SI opval = GETMEMSI (current_cpu, pc, tmp_temp); | |
4201 | * FLD (i_dst) = opval; | |
4202 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
4203 | } | |
4204 | { | |
4205 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); | |
4206 | CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; | |
7a292a7a | 4207 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-1", 'x', opval); |
c906108c SS |
4208 | } |
4209 | { | |
4210 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8)); | |
4211 | CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval; | |
7a292a7a | 4212 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-2", 'x', opval); |
c906108c SS |
4213 | } |
4214 | { | |
4215 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 12)); | |
4216 | CPU (h_gr[((FLD (f_srcdst)) + (3))]) = opval; | |
7a292a7a | 4217 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-3", 'x', opval); |
c906108c | 4218 | } |
7a292a7a | 4219 | } |
c906108c SS |
4220 | |
4221 | #undef FLD | |
4222 | } | |
4223 | NEXT (vpc); | |
4224 | ||
4225 | CASE (sem, INSN_LDQ_INDIRECT_INDEX) : /* ldq ($abase)[$index*S$scale], $dst */ | |
4226 | { | |
4227 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4228 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4229 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
c906108c SS |
4230 | int UNUSED written = 0; |
4231 | IADDR UNUSED pc = abuf->addr; | |
4232 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
4233 | ||
7a292a7a | 4234 | { |
c906108c | 4235 | SI tmp_temp; |
7a292a7a | 4236 | SI tmp_dregno; |
c906108c SS |
4237 | tmp_dregno = FLD (f_srcdst); |
4238 | tmp_temp = ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))); | |
4239 | { | |
4240 | SI opval = GETMEMSI (current_cpu, pc, tmp_temp); | |
4241 | * FLD (i_dst) = opval; | |
4242 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
4243 | } | |
4244 | { | |
4245 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); | |
4246 | CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; | |
7a292a7a | 4247 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-1", 'x', opval); |
c906108c SS |
4248 | } |
4249 | { | |
4250 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8)); | |
4251 | CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval; | |
7a292a7a | 4252 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-2", 'x', opval); |
c906108c SS |
4253 | } |
4254 | { | |
4255 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 12)); | |
4256 | CPU (h_gr[((FLD (f_srcdst)) + (3))]) = opval; | |
7a292a7a | 4257 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-3", 'x', opval); |
c906108c | 4258 | } |
7a292a7a | 4259 | } |
c906108c SS |
4260 | |
4261 | #undef FLD | |
4262 | } | |
4263 | NEXT (vpc); | |
4264 | ||
4265 | CASE (sem, INSN_LDQ_DISP) : /* ldq $optdisp, $dst */ | |
4266 | { | |
4267 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4268 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4269 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
c906108c SS |
4270 | int UNUSED written = 0; |
4271 | IADDR UNUSED pc = abuf->addr; | |
4272 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
4273 | ||
7a292a7a | 4274 | { |
c906108c | 4275 | SI tmp_temp; |
7a292a7a | 4276 | SI tmp_dregno; |
c906108c SS |
4277 | tmp_dregno = FLD (f_srcdst); |
4278 | tmp_temp = FLD (f_optdisp); | |
4279 | { | |
4280 | SI opval = GETMEMSI (current_cpu, pc, tmp_temp); | |
4281 | * FLD (i_dst) = opval; | |
4282 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
4283 | } | |
4284 | { | |
4285 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); | |
4286 | CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; | |
7a292a7a | 4287 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-1", 'x', opval); |
c906108c SS |
4288 | } |
4289 | { | |
4290 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8)); | |
4291 | CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval; | |
7a292a7a | 4292 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-2", 'x', opval); |
c906108c SS |
4293 | } |
4294 | { | |
4295 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 12)); | |
4296 | CPU (h_gr[((FLD (f_srcdst)) + (3))]) = opval; | |
7a292a7a | 4297 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-3", 'x', opval); |
c906108c | 4298 | } |
7a292a7a | 4299 | } |
c906108c SS |
4300 | |
4301 | #undef FLD | |
4302 | } | |
4303 | NEXT (vpc); | |
4304 | ||
4305 | CASE (sem, INSN_LDQ_INDIRECT_DISP) : /* ldq $optdisp($abase), $dst */ | |
4306 | { | |
4307 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4308 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4309 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
c906108c SS |
4310 | int UNUSED written = 0; |
4311 | IADDR UNUSED pc = abuf->addr; | |
4312 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
4313 | ||
7a292a7a | 4314 | { |
c906108c | 4315 | SI tmp_temp; |
7a292a7a | 4316 | SI tmp_dregno; |
c906108c SS |
4317 | tmp_dregno = FLD (f_srcdst); |
4318 | tmp_temp = ADDSI (FLD (f_optdisp), * FLD (i_abase)); | |
4319 | { | |
4320 | SI opval = GETMEMSI (current_cpu, pc, tmp_temp); | |
4321 | * FLD (i_dst) = opval; | |
4322 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
4323 | } | |
4324 | { | |
4325 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); | |
4326 | CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; | |
7a292a7a | 4327 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-1", 'x', opval); |
c906108c SS |
4328 | } |
4329 | { | |
4330 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8)); | |
4331 | CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval; | |
7a292a7a | 4332 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-2", 'x', opval); |
c906108c SS |
4333 | } |
4334 | { | |
4335 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 12)); | |
4336 | CPU (h_gr[((FLD (f_srcdst)) + (3))]) = opval; | |
7a292a7a | 4337 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-3", 'x', opval); |
c906108c | 4338 | } |
7a292a7a | 4339 | } |
c906108c SS |
4340 | |
4341 | #undef FLD | |
4342 | } | |
4343 | NEXT (vpc); | |
4344 | ||
4345 | CASE (sem, INSN_LDQ_INDEX_DISP) : /* ldq $optdisp[$index*S$scale], $dst */ | |
4346 | { | |
4347 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4348 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4349 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
c906108c SS |
4350 | int UNUSED written = 0; |
4351 | IADDR UNUSED pc = abuf->addr; | |
4352 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
4353 | ||
7a292a7a | 4354 | { |
c906108c | 4355 | SI tmp_temp; |
7a292a7a | 4356 | SI tmp_dregno; |
c906108c SS |
4357 | tmp_dregno = FLD (f_srcdst); |
4358 | tmp_temp = ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))); | |
4359 | { | |
4360 | SI opval = GETMEMSI (current_cpu, pc, tmp_temp); | |
4361 | * FLD (i_dst) = opval; | |
4362 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
4363 | } | |
4364 | { | |
4365 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); | |
4366 | CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; | |
7a292a7a | 4367 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-1", 'x', opval); |
c906108c SS |
4368 | } |
4369 | { | |
4370 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8)); | |
4371 | CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval; | |
7a292a7a | 4372 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-2", 'x', opval); |
c906108c SS |
4373 | } |
4374 | { | |
4375 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 12)); | |
4376 | CPU (h_gr[((FLD (f_srcdst)) + (3))]) = opval; | |
7a292a7a | 4377 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-3", 'x', opval); |
c906108c | 4378 | } |
7a292a7a | 4379 | } |
c906108c SS |
4380 | |
4381 | #undef FLD | |
4382 | } | |
4383 | NEXT (vpc); | |
4384 | ||
4385 | CASE (sem, INSN_LDQ_INDIRECT_INDEX_DISP) : /* ldq $optdisp($abase)[$index*S$scale], $dst */ | |
4386 | { | |
4387 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4388 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4389 | #define FLD(f) abuf->fields.sfmt_ldq_indirect_index_disp.f |
c906108c SS |
4390 | int UNUSED written = 0; |
4391 | IADDR UNUSED pc = abuf->addr; | |
4392 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
4393 | ||
7a292a7a | 4394 | { |
c906108c | 4395 | SI tmp_temp; |
7a292a7a | 4396 | SI tmp_dregno; |
c906108c SS |
4397 | tmp_dregno = FLD (f_srcdst); |
4398 | tmp_temp = ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))); | |
4399 | { | |
4400 | SI opval = GETMEMSI (current_cpu, pc, tmp_temp); | |
4401 | * FLD (i_dst) = opval; | |
4402 | TRACE_RESULT (current_cpu, abuf, "dst", 'x', opval); | |
4403 | } | |
4404 | { | |
4405 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 4)); | |
4406 | CPU (h_gr[((FLD (f_srcdst)) + (1))]) = opval; | |
7a292a7a | 4407 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-1", 'x', opval); |
c906108c SS |
4408 | } |
4409 | { | |
4410 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 8)); | |
4411 | CPU (h_gr[((FLD (f_srcdst)) + (2))]) = opval; | |
7a292a7a | 4412 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-2", 'x', opval); |
c906108c SS |
4413 | } |
4414 | { | |
4415 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (tmp_temp, 12)); | |
4416 | CPU (h_gr[((FLD (f_srcdst)) + (3))]) = opval; | |
7a292a7a | 4417 | TRACE_RESULT (current_cpu, abuf, "gr-add:-VM-index-of-dst-3", 'x', opval); |
c906108c | 4418 | } |
7a292a7a | 4419 | } |
c906108c SS |
4420 | |
4421 | #undef FLD | |
4422 | } | |
4423 | NEXT (vpc); | |
4424 | ||
4425 | CASE (sem, INSN_ST_OFFSET) : /* st $st_src, $offset */ | |
4426 | { | |
4427 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4428 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4429 | #define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f |
c906108c SS |
4430 | int UNUSED written = 0; |
4431 | IADDR UNUSED pc = abuf->addr; | |
4432 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
4433 | ||
4434 | { | |
4435 | SI opval = * FLD (i_st_src); | |
4436 | SETMEMSI (current_cpu, pc, FLD (f_offset), opval); | |
4437 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4438 | } | |
4439 | ||
4440 | #undef FLD | |
4441 | } | |
4442 | NEXT (vpc); | |
4443 | ||
4444 | CASE (sem, INSN_ST_INDIRECT_OFFSET) : /* st $st_src, $offset($abase) */ | |
4445 | { | |
4446 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4447 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4448 | #define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f |
c906108c SS |
4449 | int UNUSED written = 0; |
4450 | IADDR UNUSED pc = abuf->addr; | |
4451 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
4452 | ||
4453 | { | |
4454 | SI opval = * FLD (i_st_src); | |
4455 | SETMEMSI (current_cpu, pc, ADDSI (FLD (f_offset), * FLD (i_abase)), opval); | |
4456 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4457 | } | |
4458 | ||
4459 | #undef FLD | |
4460 | } | |
4461 | NEXT (vpc); | |
4462 | ||
4463 | CASE (sem, INSN_ST_INDIRECT) : /* st $st_src, ($abase) */ | |
4464 | { | |
4465 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4466 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4467 | #define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f |
c906108c SS |
4468 | int UNUSED written = 0; |
4469 | IADDR UNUSED pc = abuf->addr; | |
4470 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
4471 | ||
4472 | { | |
4473 | SI opval = * FLD (i_st_src); | |
4474 | SETMEMSI (current_cpu, pc, * FLD (i_abase), opval); | |
4475 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4476 | } | |
4477 | ||
4478 | #undef FLD | |
4479 | } | |
4480 | NEXT (vpc); | |
4481 | ||
4482 | CASE (sem, INSN_ST_INDIRECT_INDEX) : /* st $st_src, ($abase)[$index*S$scale] */ | |
4483 | { | |
4484 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4485 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4486 | #define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f |
c906108c SS |
4487 | int UNUSED written = 0; |
4488 | IADDR UNUSED pc = abuf->addr; | |
4489 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
4490 | ||
4491 | { | |
4492 | SI opval = * FLD (i_st_src); | |
4493 | SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), opval); | |
4494 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4495 | } | |
4496 | ||
4497 | #undef FLD | |
4498 | } | |
4499 | NEXT (vpc); | |
4500 | ||
4501 | CASE (sem, INSN_ST_DISP) : /* st $st_src, $optdisp */ | |
4502 | { | |
4503 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4504 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4505 | #define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f |
c906108c SS |
4506 | int UNUSED written = 0; |
4507 | IADDR UNUSED pc = abuf->addr; | |
4508 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
4509 | ||
4510 | { | |
4511 | SI opval = * FLD (i_st_src); | |
4512 | SETMEMSI (current_cpu, pc, FLD (f_optdisp), opval); | |
4513 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4514 | } | |
4515 | ||
4516 | #undef FLD | |
4517 | } | |
4518 | NEXT (vpc); | |
4519 | ||
4520 | CASE (sem, INSN_ST_INDIRECT_DISP) : /* st $st_src, $optdisp($abase) */ | |
4521 | { | |
4522 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4523 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4524 | #define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f |
c906108c SS |
4525 | int UNUSED written = 0; |
4526 | IADDR UNUSED pc = abuf->addr; | |
4527 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
4528 | ||
4529 | { | |
4530 | SI opval = * FLD (i_st_src); | |
4531 | SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), * FLD (i_abase)), opval); | |
4532 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4533 | } | |
4534 | ||
4535 | #undef FLD | |
4536 | } | |
4537 | NEXT (vpc); | |
4538 | ||
4539 | CASE (sem, INSN_ST_INDEX_DISP) : /* st $st_src, $optdisp[$index*S$scale */ | |
4540 | { | |
4541 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4542 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4543 | #define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f |
c906108c SS |
4544 | int UNUSED written = 0; |
4545 | IADDR UNUSED pc = abuf->addr; | |
4546 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
4547 | ||
4548 | { | |
4549 | SI opval = * FLD (i_st_src); | |
4550 | SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), opval); | |
4551 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4552 | } | |
4553 | ||
4554 | #undef FLD | |
4555 | } | |
4556 | NEXT (vpc); | |
4557 | ||
4558 | CASE (sem, INSN_ST_INDIRECT_INDEX_DISP) : /* st $st_src, $optdisp($abase)[$index*S$scale] */ | |
4559 | { | |
4560 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4561 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4562 | #define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f |
c906108c SS |
4563 | int UNUSED written = 0; |
4564 | IADDR UNUSED pc = abuf->addr; | |
4565 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
4566 | ||
4567 | { | |
4568 | SI opval = * FLD (i_st_src); | |
4569 | SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))), opval); | |
4570 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4571 | } | |
4572 | ||
4573 | #undef FLD | |
4574 | } | |
4575 | NEXT (vpc); | |
4576 | ||
4577 | CASE (sem, INSN_STOB_OFFSET) : /* stob $st_src, $offset */ | |
4578 | { | |
4579 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4580 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4581 | #define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f |
c906108c SS |
4582 | int UNUSED written = 0; |
4583 | IADDR UNUSED pc = abuf->addr; | |
4584 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
4585 | ||
4586 | { | |
4587 | QI opval = * FLD (i_st_src); | |
4588 | SETMEMQI (current_cpu, pc, FLD (f_offset), opval); | |
4589 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4590 | } | |
4591 | ||
4592 | #undef FLD | |
4593 | } | |
4594 | NEXT (vpc); | |
4595 | ||
4596 | CASE (sem, INSN_STOB_INDIRECT_OFFSET) : /* stob $st_src, $offset($abase) */ | |
4597 | { | |
4598 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4599 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4600 | #define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f |
c906108c SS |
4601 | int UNUSED written = 0; |
4602 | IADDR UNUSED pc = abuf->addr; | |
4603 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
4604 | ||
4605 | { | |
4606 | QI opval = * FLD (i_st_src); | |
4607 | SETMEMQI (current_cpu, pc, ADDSI (FLD (f_offset), * FLD (i_abase)), opval); | |
4608 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4609 | } | |
4610 | ||
4611 | #undef FLD | |
4612 | } | |
4613 | NEXT (vpc); | |
4614 | ||
4615 | CASE (sem, INSN_STOB_INDIRECT) : /* stob $st_src, ($abase) */ | |
4616 | { | |
4617 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4618 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4619 | #define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f |
c906108c SS |
4620 | int UNUSED written = 0; |
4621 | IADDR UNUSED pc = abuf->addr; | |
4622 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
4623 | ||
4624 | { | |
4625 | QI opval = * FLD (i_st_src); | |
4626 | SETMEMQI (current_cpu, pc, * FLD (i_abase), opval); | |
4627 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4628 | } | |
4629 | ||
4630 | #undef FLD | |
4631 | } | |
4632 | NEXT (vpc); | |
4633 | ||
4634 | CASE (sem, INSN_STOB_INDIRECT_INDEX) : /* stob $st_src, ($abase)[$index*S$scale] */ | |
4635 | { | |
4636 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4637 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4638 | #define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f |
c906108c SS |
4639 | int UNUSED written = 0; |
4640 | IADDR UNUSED pc = abuf->addr; | |
4641 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
4642 | ||
4643 | { | |
4644 | QI opval = * FLD (i_st_src); | |
4645 | SETMEMQI (current_cpu, pc, ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), opval); | |
4646 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4647 | } | |
4648 | ||
4649 | #undef FLD | |
4650 | } | |
4651 | NEXT (vpc); | |
4652 | ||
4653 | CASE (sem, INSN_STOB_DISP) : /* stob $st_src, $optdisp */ | |
4654 | { | |
4655 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4656 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4657 | #define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f |
c906108c SS |
4658 | int UNUSED written = 0; |
4659 | IADDR UNUSED pc = abuf->addr; | |
4660 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
4661 | ||
4662 | { | |
4663 | QI opval = * FLD (i_st_src); | |
4664 | SETMEMQI (current_cpu, pc, FLD (f_optdisp), opval); | |
4665 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4666 | } | |
4667 | ||
4668 | #undef FLD | |
4669 | } | |
4670 | NEXT (vpc); | |
4671 | ||
4672 | CASE (sem, INSN_STOB_INDIRECT_DISP) : /* stob $st_src, $optdisp($abase) */ | |
4673 | { | |
4674 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4675 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4676 | #define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f |
c906108c SS |
4677 | int UNUSED written = 0; |
4678 | IADDR UNUSED pc = abuf->addr; | |
4679 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
4680 | ||
4681 | { | |
4682 | QI opval = * FLD (i_st_src); | |
4683 | SETMEMQI (current_cpu, pc, ADDSI (FLD (f_optdisp), * FLD (i_abase)), opval); | |
4684 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4685 | } | |
4686 | ||
4687 | #undef FLD | |
4688 | } | |
4689 | NEXT (vpc); | |
4690 | ||
4691 | CASE (sem, INSN_STOB_INDEX_DISP) : /* stob $st_src, $optdisp[$index*S$scale */ | |
4692 | { | |
4693 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4694 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4695 | #define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f |
c906108c SS |
4696 | int UNUSED written = 0; |
4697 | IADDR UNUSED pc = abuf->addr; | |
4698 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
4699 | ||
4700 | { | |
4701 | QI opval = * FLD (i_st_src); | |
4702 | SETMEMQI (current_cpu, pc, ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), opval); | |
4703 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4704 | } | |
4705 | ||
4706 | #undef FLD | |
4707 | } | |
4708 | NEXT (vpc); | |
4709 | ||
4710 | CASE (sem, INSN_STOB_INDIRECT_INDEX_DISP) : /* stob $st_src, $optdisp($abase)[$index*S$scale] */ | |
4711 | { | |
4712 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4713 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4714 | #define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f |
c906108c SS |
4715 | int UNUSED written = 0; |
4716 | IADDR UNUSED pc = abuf->addr; | |
4717 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
4718 | ||
4719 | { | |
4720 | QI opval = * FLD (i_st_src); | |
4721 | SETMEMQI (current_cpu, pc, ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))), opval); | |
4722 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4723 | } | |
4724 | ||
4725 | #undef FLD | |
4726 | } | |
4727 | NEXT (vpc); | |
4728 | ||
4729 | CASE (sem, INSN_STOS_OFFSET) : /* stos $st_src, $offset */ | |
4730 | { | |
4731 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4732 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4733 | #define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f |
c906108c SS |
4734 | int UNUSED written = 0; |
4735 | IADDR UNUSED pc = abuf->addr; | |
4736 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
4737 | ||
4738 | { | |
4739 | HI opval = * FLD (i_st_src); | |
4740 | SETMEMHI (current_cpu, pc, FLD (f_offset), opval); | |
4741 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4742 | } | |
4743 | ||
4744 | #undef FLD | |
4745 | } | |
4746 | NEXT (vpc); | |
4747 | ||
4748 | CASE (sem, INSN_STOS_INDIRECT_OFFSET) : /* stos $st_src, $offset($abase) */ | |
4749 | { | |
4750 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4751 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4752 | #define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f |
c906108c SS |
4753 | int UNUSED written = 0; |
4754 | IADDR UNUSED pc = abuf->addr; | |
4755 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
4756 | ||
4757 | { | |
4758 | HI opval = * FLD (i_st_src); | |
4759 | SETMEMHI (current_cpu, pc, ADDSI (FLD (f_offset), * FLD (i_abase)), opval); | |
4760 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4761 | } | |
4762 | ||
4763 | #undef FLD | |
4764 | } | |
4765 | NEXT (vpc); | |
4766 | ||
4767 | CASE (sem, INSN_STOS_INDIRECT) : /* stos $st_src, ($abase) */ | |
4768 | { | |
4769 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4770 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4771 | #define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f |
c906108c SS |
4772 | int UNUSED written = 0; |
4773 | IADDR UNUSED pc = abuf->addr; | |
4774 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
4775 | ||
4776 | { | |
4777 | HI opval = * FLD (i_st_src); | |
4778 | SETMEMHI (current_cpu, pc, * FLD (i_abase), opval); | |
4779 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4780 | } | |
4781 | ||
4782 | #undef FLD | |
4783 | } | |
4784 | NEXT (vpc); | |
4785 | ||
4786 | CASE (sem, INSN_STOS_INDIRECT_INDEX) : /* stos $st_src, ($abase)[$index*S$scale] */ | |
4787 | { | |
4788 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4789 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4790 | #define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f |
c906108c SS |
4791 | int UNUSED written = 0; |
4792 | IADDR UNUSED pc = abuf->addr; | |
4793 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
4794 | ||
4795 | { | |
4796 | HI opval = * FLD (i_st_src); | |
4797 | SETMEMHI (current_cpu, pc, ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), opval); | |
4798 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4799 | } | |
4800 | ||
4801 | #undef FLD | |
4802 | } | |
4803 | NEXT (vpc); | |
4804 | ||
4805 | CASE (sem, INSN_STOS_DISP) : /* stos $st_src, $optdisp */ | |
4806 | { | |
4807 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4808 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4809 | #define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f |
c906108c SS |
4810 | int UNUSED written = 0; |
4811 | IADDR UNUSED pc = abuf->addr; | |
4812 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
4813 | ||
4814 | { | |
4815 | HI opval = * FLD (i_st_src); | |
4816 | SETMEMHI (current_cpu, pc, FLD (f_optdisp), opval); | |
4817 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4818 | } | |
4819 | ||
4820 | #undef FLD | |
4821 | } | |
4822 | NEXT (vpc); | |
4823 | ||
4824 | CASE (sem, INSN_STOS_INDIRECT_DISP) : /* stos $st_src, $optdisp($abase) */ | |
4825 | { | |
4826 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4827 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4828 | #define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f |
c906108c SS |
4829 | int UNUSED written = 0; |
4830 | IADDR UNUSED pc = abuf->addr; | |
4831 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
4832 | ||
4833 | { | |
4834 | HI opval = * FLD (i_st_src); | |
4835 | SETMEMHI (current_cpu, pc, ADDSI (FLD (f_optdisp), * FLD (i_abase)), opval); | |
4836 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4837 | } | |
4838 | ||
4839 | #undef FLD | |
4840 | } | |
4841 | NEXT (vpc); | |
4842 | ||
4843 | CASE (sem, INSN_STOS_INDEX_DISP) : /* stos $st_src, $optdisp[$index*S$scale */ | |
4844 | { | |
4845 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4846 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4847 | #define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f |
c906108c SS |
4848 | int UNUSED written = 0; |
4849 | IADDR UNUSED pc = abuf->addr; | |
4850 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
4851 | ||
4852 | { | |
4853 | HI opval = * FLD (i_st_src); | |
4854 | SETMEMHI (current_cpu, pc, ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), opval); | |
4855 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4856 | } | |
4857 | ||
4858 | #undef FLD | |
4859 | } | |
4860 | NEXT (vpc); | |
4861 | ||
4862 | CASE (sem, INSN_STOS_INDIRECT_INDEX_DISP) : /* stos $st_src, $optdisp($abase)[$index*S$scale] */ | |
4863 | { | |
4864 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4865 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4866 | #define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f |
c906108c SS |
4867 | int UNUSED written = 0; |
4868 | IADDR UNUSED pc = abuf->addr; | |
4869 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
4870 | ||
4871 | { | |
4872 | HI opval = * FLD (i_st_src); | |
4873 | SETMEMHI (current_cpu, pc, ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))), opval); | |
4874 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4875 | } | |
4876 | ||
4877 | #undef FLD | |
4878 | } | |
4879 | NEXT (vpc); | |
4880 | ||
4881 | CASE (sem, INSN_STL_OFFSET) : /* stl $st_src, $offset */ | |
4882 | { | |
4883 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4884 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4885 | #define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f |
c906108c SS |
4886 | int UNUSED written = 0; |
4887 | IADDR UNUSED pc = abuf->addr; | |
4888 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
4889 | ||
7a292a7a | 4890 | { |
c906108c SS |
4891 | SI tmp_sregno; |
4892 | tmp_sregno = FLD (f_srcdst); | |
4893 | { | |
4894 | SI opval = * FLD (i_st_src); | |
4895 | SETMEMSI (current_cpu, pc, FLD (f_offset), opval); | |
4896 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4897 | } | |
4898 | { | |
4899 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); | |
4900 | SETMEMSI (current_cpu, pc, ADDSI (FLD (f_offset), 4), opval); | |
4901 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4902 | } | |
7a292a7a | 4903 | } |
c906108c SS |
4904 | |
4905 | #undef FLD | |
4906 | } | |
4907 | NEXT (vpc); | |
4908 | ||
4909 | CASE (sem, INSN_STL_INDIRECT_OFFSET) : /* stl $st_src, $offset($abase) */ | |
4910 | { | |
4911 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4912 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4913 | #define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f |
c906108c SS |
4914 | int UNUSED written = 0; |
4915 | IADDR UNUSED pc = abuf->addr; | |
4916 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
4917 | ||
7a292a7a | 4918 | { |
c906108c SS |
4919 | SI tmp_sregno; |
4920 | tmp_sregno = FLD (f_srcdst); | |
4921 | { | |
4922 | SI opval = * FLD (i_st_src); | |
4923 | SETMEMSI (current_cpu, pc, ADDSI (FLD (f_offset), * FLD (i_abase)), opval); | |
4924 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4925 | } | |
4926 | { | |
4927 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); | |
4928 | SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_offset), * FLD (i_abase)), 4), opval); | |
4929 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4930 | } | |
7a292a7a | 4931 | } |
c906108c SS |
4932 | |
4933 | #undef FLD | |
4934 | } | |
4935 | NEXT (vpc); | |
4936 | ||
4937 | CASE (sem, INSN_STL_INDIRECT) : /* stl $st_src, ($abase) */ | |
4938 | { | |
4939 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4940 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4941 | #define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f |
c906108c SS |
4942 | int UNUSED written = 0; |
4943 | IADDR UNUSED pc = abuf->addr; | |
4944 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
4945 | ||
7a292a7a | 4946 | { |
c906108c SS |
4947 | SI tmp_sregno; |
4948 | tmp_sregno = FLD (f_srcdst); | |
4949 | { | |
4950 | SI opval = * FLD (i_st_src); | |
4951 | SETMEMSI (current_cpu, pc, * FLD (i_abase), opval); | |
4952 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4953 | } | |
4954 | { | |
4955 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); | |
4956 | SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_abase), 4), opval); | |
4957 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4958 | } | |
7a292a7a | 4959 | } |
c906108c SS |
4960 | |
4961 | #undef FLD | |
4962 | } | |
4963 | NEXT (vpc); | |
4964 | ||
4965 | CASE (sem, INSN_STL_INDIRECT_INDEX) : /* stl $st_src, ($abase)[$index*S$scale] */ | |
4966 | { | |
4967 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4968 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4969 | #define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f |
c906108c SS |
4970 | int UNUSED written = 0; |
4971 | IADDR UNUSED pc = abuf->addr; | |
4972 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
4973 | ||
7a292a7a | 4974 | { |
c906108c SS |
4975 | SI tmp_sregno; |
4976 | tmp_sregno = FLD (f_srcdst); | |
4977 | { | |
4978 | SI opval = * FLD (i_st_src); | |
4979 | SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), opval); | |
4980 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4981 | } | |
4982 | { | |
4983 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); | |
4984 | SETMEMSI (current_cpu, pc, ADDSI (ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), 4), opval); | |
4985 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
4986 | } | |
7a292a7a | 4987 | } |
c906108c SS |
4988 | |
4989 | #undef FLD | |
4990 | } | |
4991 | NEXT (vpc); | |
4992 | ||
4993 | CASE (sem, INSN_STL_DISP) : /* stl $st_src, $optdisp */ | |
4994 | { | |
4995 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
4996 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 4997 | #define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f |
c906108c SS |
4998 | int UNUSED written = 0; |
4999 | IADDR UNUSED pc = abuf->addr; | |
5000 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
5001 | ||
7a292a7a | 5002 | { |
c906108c SS |
5003 | SI tmp_sregno; |
5004 | tmp_sregno = FLD (f_srcdst); | |
5005 | { | |
5006 | SI opval = * FLD (i_st_src); | |
5007 | SETMEMSI (current_cpu, pc, FLD (f_optdisp), opval); | |
5008 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5009 | } | |
5010 | { | |
5011 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); | |
5012 | SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), 4), opval); | |
5013 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5014 | } | |
7a292a7a | 5015 | } |
c906108c SS |
5016 | |
5017 | #undef FLD | |
5018 | } | |
5019 | NEXT (vpc); | |
5020 | ||
5021 | CASE (sem, INSN_STL_INDIRECT_DISP) : /* stl $st_src, $optdisp($abase) */ | |
5022 | { | |
5023 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5024 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 5025 | #define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f |
c906108c SS |
5026 | int UNUSED written = 0; |
5027 | IADDR UNUSED pc = abuf->addr; | |
5028 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
5029 | ||
7a292a7a | 5030 | { |
c906108c SS |
5031 | SI tmp_sregno; |
5032 | tmp_sregno = FLD (f_srcdst); | |
5033 | { | |
5034 | SI opval = * FLD (i_st_src); | |
5035 | SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), * FLD (i_abase)), opval); | |
5036 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5037 | } | |
5038 | { | |
5039 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); | |
5040 | SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), * FLD (i_abase)), 4), opval); | |
5041 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5042 | } | |
7a292a7a | 5043 | } |
c906108c SS |
5044 | |
5045 | #undef FLD | |
5046 | } | |
5047 | NEXT (vpc); | |
5048 | ||
5049 | CASE (sem, INSN_STL_INDEX_DISP) : /* stl $st_src, $optdisp[$index*S$scale */ | |
5050 | { | |
5051 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5052 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 5053 | #define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f |
c906108c SS |
5054 | int UNUSED written = 0; |
5055 | IADDR UNUSED pc = abuf->addr; | |
5056 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
5057 | ||
7a292a7a | 5058 | { |
c906108c SS |
5059 | SI tmp_sregno; |
5060 | tmp_sregno = FLD (f_srcdst); | |
5061 | { | |
5062 | SI opval = * FLD (i_st_src); | |
5063 | SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), opval); | |
5064 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5065 | } | |
5066 | { | |
5067 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); | |
5068 | SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), 4), opval); | |
5069 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5070 | } | |
7a292a7a | 5071 | } |
c906108c SS |
5072 | |
5073 | #undef FLD | |
5074 | } | |
5075 | NEXT (vpc); | |
5076 | ||
5077 | CASE (sem, INSN_STL_INDIRECT_INDEX_DISP) : /* stl $st_src, $optdisp($abase)[$index*S$scale] */ | |
5078 | { | |
5079 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5080 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 5081 | #define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f |
c906108c SS |
5082 | int UNUSED written = 0; |
5083 | IADDR UNUSED pc = abuf->addr; | |
5084 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
5085 | ||
7a292a7a | 5086 | { |
c906108c SS |
5087 | SI tmp_sregno; |
5088 | tmp_sregno = FLD (f_srcdst); | |
5089 | { | |
5090 | SI opval = * FLD (i_st_src); | |
5091 | SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))), opval); | |
5092 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5093 | } | |
5094 | { | |
5095 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); | |
5096 | SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))), 4), opval); | |
5097 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5098 | } | |
7a292a7a | 5099 | } |
c906108c SS |
5100 | |
5101 | #undef FLD | |
5102 | } | |
5103 | NEXT (vpc); | |
5104 | ||
5105 | CASE (sem, INSN_STT_OFFSET) : /* stt $st_src, $offset */ | |
5106 | { | |
5107 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5108 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 5109 | #define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f |
c906108c SS |
5110 | int UNUSED written = 0; |
5111 | IADDR UNUSED pc = abuf->addr; | |
5112 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
5113 | ||
7a292a7a | 5114 | { |
c906108c SS |
5115 | SI tmp_sregno; |
5116 | tmp_sregno = FLD (f_srcdst); | |
5117 | { | |
5118 | SI opval = * FLD (i_st_src); | |
5119 | SETMEMSI (current_cpu, pc, FLD (f_offset), opval); | |
5120 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5121 | } | |
5122 | { | |
5123 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); | |
5124 | SETMEMSI (current_cpu, pc, ADDSI (FLD (f_offset), 4), opval); | |
5125 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5126 | } | |
5127 | { | |
5128 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]); | |
5129 | SETMEMSI (current_cpu, pc, ADDSI (FLD (f_offset), 8), opval); | |
5130 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5131 | } | |
7a292a7a | 5132 | } |
c906108c SS |
5133 | |
5134 | #undef FLD | |
5135 | } | |
5136 | NEXT (vpc); | |
5137 | ||
5138 | CASE (sem, INSN_STT_INDIRECT_OFFSET) : /* stt $st_src, $offset($abase) */ | |
5139 | { | |
5140 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5141 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 5142 | #define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f |
c906108c SS |
5143 | int UNUSED written = 0; |
5144 | IADDR UNUSED pc = abuf->addr; | |
5145 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
5146 | ||
7a292a7a | 5147 | { |
c906108c SS |
5148 | SI tmp_sregno; |
5149 | tmp_sregno = FLD (f_srcdst); | |
5150 | { | |
5151 | SI opval = * FLD (i_st_src); | |
5152 | SETMEMSI (current_cpu, pc, ADDSI (FLD (f_offset), * FLD (i_abase)), opval); | |
5153 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5154 | } | |
5155 | { | |
5156 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); | |
5157 | SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_offset), * FLD (i_abase)), 4), opval); | |
5158 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5159 | } | |
5160 | { | |
5161 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]); | |
5162 | SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_offset), * FLD (i_abase)), 8), opval); | |
5163 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5164 | } | |
7a292a7a | 5165 | } |
c906108c SS |
5166 | |
5167 | #undef FLD | |
5168 | } | |
5169 | NEXT (vpc); | |
5170 | ||
5171 | CASE (sem, INSN_STT_INDIRECT) : /* stt $st_src, ($abase) */ | |
5172 | { | |
5173 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5174 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 5175 | #define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f |
c906108c SS |
5176 | int UNUSED written = 0; |
5177 | IADDR UNUSED pc = abuf->addr; | |
5178 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
5179 | ||
7a292a7a | 5180 | { |
c906108c SS |
5181 | SI tmp_sregno; |
5182 | tmp_sregno = FLD (f_srcdst); | |
5183 | { | |
5184 | SI opval = * FLD (i_st_src); | |
5185 | SETMEMSI (current_cpu, pc, * FLD (i_abase), opval); | |
5186 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5187 | } | |
5188 | { | |
5189 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); | |
5190 | SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_abase), 4), opval); | |
5191 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5192 | } | |
5193 | { | |
5194 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]); | |
5195 | SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_abase), 8), opval); | |
5196 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5197 | } | |
7a292a7a | 5198 | } |
c906108c SS |
5199 | |
5200 | #undef FLD | |
5201 | } | |
5202 | NEXT (vpc); | |
5203 | ||
5204 | CASE (sem, INSN_STT_INDIRECT_INDEX) : /* stt $st_src, ($abase)[$index*S$scale] */ | |
5205 | { | |
5206 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5207 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 5208 | #define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f |
c906108c SS |
5209 | int UNUSED written = 0; |
5210 | IADDR UNUSED pc = abuf->addr; | |
5211 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
5212 | ||
7a292a7a | 5213 | { |
c906108c SS |
5214 | SI tmp_sregno; |
5215 | tmp_sregno = FLD (f_srcdst); | |
5216 | { | |
5217 | SI opval = * FLD (i_st_src); | |
5218 | SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), opval); | |
5219 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5220 | } | |
5221 | { | |
5222 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); | |
5223 | SETMEMSI (current_cpu, pc, ADDSI (ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), 4), opval); | |
5224 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5225 | } | |
5226 | { | |
5227 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]); | |
5228 | SETMEMSI (current_cpu, pc, ADDSI (ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), 8), opval); | |
5229 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5230 | } | |
7a292a7a | 5231 | } |
c906108c SS |
5232 | |
5233 | #undef FLD | |
5234 | } | |
5235 | NEXT (vpc); | |
5236 | ||
5237 | CASE (sem, INSN_STT_DISP) : /* stt $st_src, $optdisp */ | |
5238 | { | |
5239 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5240 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 5241 | #define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f |
c906108c SS |
5242 | int UNUSED written = 0; |
5243 | IADDR UNUSED pc = abuf->addr; | |
5244 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
5245 | ||
7a292a7a | 5246 | { |
c906108c SS |
5247 | SI tmp_sregno; |
5248 | tmp_sregno = FLD (f_srcdst); | |
5249 | { | |
5250 | SI opval = * FLD (i_st_src); | |
5251 | SETMEMSI (current_cpu, pc, FLD (f_optdisp), opval); | |
5252 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5253 | } | |
5254 | { | |
5255 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); | |
5256 | SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), 4), opval); | |
5257 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5258 | } | |
5259 | { | |
5260 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]); | |
5261 | SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), 8), opval); | |
5262 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5263 | } | |
7a292a7a | 5264 | } |
c906108c SS |
5265 | |
5266 | #undef FLD | |
5267 | } | |
5268 | NEXT (vpc); | |
5269 | ||
5270 | CASE (sem, INSN_STT_INDIRECT_DISP) : /* stt $st_src, $optdisp($abase) */ | |
5271 | { | |
5272 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5273 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 5274 | #define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f |
c906108c SS |
5275 | int UNUSED written = 0; |
5276 | IADDR UNUSED pc = abuf->addr; | |
5277 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
5278 | ||
7a292a7a | 5279 | { |
c906108c SS |
5280 | SI tmp_sregno; |
5281 | tmp_sregno = FLD (f_srcdst); | |
5282 | { | |
5283 | SI opval = * FLD (i_st_src); | |
5284 | SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), * FLD (i_abase)), opval); | |
5285 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5286 | } | |
5287 | { | |
5288 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); | |
5289 | SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), * FLD (i_abase)), 4), opval); | |
5290 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5291 | } | |
5292 | { | |
5293 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]); | |
5294 | SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), * FLD (i_abase)), 8), opval); | |
5295 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5296 | } | |
7a292a7a | 5297 | } |
c906108c SS |
5298 | |
5299 | #undef FLD | |
5300 | } | |
5301 | NEXT (vpc); | |
5302 | ||
5303 | CASE (sem, INSN_STT_INDEX_DISP) : /* stt $st_src, $optdisp[$index*S$scale */ | |
5304 | { | |
5305 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5306 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 5307 | #define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f |
c906108c SS |
5308 | int UNUSED written = 0; |
5309 | IADDR UNUSED pc = abuf->addr; | |
5310 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
5311 | ||
7a292a7a | 5312 | { |
c906108c SS |
5313 | SI tmp_sregno; |
5314 | tmp_sregno = FLD (f_srcdst); | |
5315 | { | |
5316 | SI opval = * FLD (i_st_src); | |
5317 | SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), opval); | |
5318 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5319 | } | |
5320 | { | |
5321 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); | |
5322 | SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), 4), opval); | |
5323 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5324 | } | |
5325 | { | |
5326 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]); | |
5327 | SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), 8), opval); | |
5328 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5329 | } | |
7a292a7a | 5330 | } |
c906108c SS |
5331 | |
5332 | #undef FLD | |
5333 | } | |
5334 | NEXT (vpc); | |
5335 | ||
5336 | CASE (sem, INSN_STT_INDIRECT_INDEX_DISP) : /* stt $st_src, $optdisp($abase)[$index*S$scale] */ | |
5337 | { | |
5338 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5339 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 5340 | #define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f |
c906108c SS |
5341 | int UNUSED written = 0; |
5342 | IADDR UNUSED pc = abuf->addr; | |
5343 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
5344 | ||
7a292a7a | 5345 | { |
c906108c SS |
5346 | SI tmp_sregno; |
5347 | tmp_sregno = FLD (f_srcdst); | |
5348 | { | |
5349 | SI opval = * FLD (i_st_src); | |
5350 | SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))), opval); | |
5351 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5352 | } | |
5353 | { | |
5354 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); | |
5355 | SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))), 4), opval); | |
5356 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5357 | } | |
5358 | { | |
5359 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]); | |
5360 | SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))), 8), opval); | |
5361 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5362 | } | |
7a292a7a | 5363 | } |
c906108c SS |
5364 | |
5365 | #undef FLD | |
5366 | } | |
5367 | NEXT (vpc); | |
5368 | ||
5369 | CASE (sem, INSN_STQ_OFFSET) : /* stq $st_src, $offset */ | |
5370 | { | |
5371 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5372 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 5373 | #define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f |
c906108c SS |
5374 | int UNUSED written = 0; |
5375 | IADDR UNUSED pc = abuf->addr; | |
5376 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
5377 | ||
7a292a7a | 5378 | { |
c906108c SS |
5379 | SI tmp_sregno; |
5380 | tmp_sregno = FLD (f_srcdst); | |
5381 | { | |
5382 | SI opval = * FLD (i_st_src); | |
5383 | SETMEMSI (current_cpu, pc, FLD (f_offset), opval); | |
5384 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5385 | } | |
5386 | { | |
5387 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); | |
5388 | SETMEMSI (current_cpu, pc, ADDSI (FLD (f_offset), 4), opval); | |
5389 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5390 | } | |
5391 | { | |
5392 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]); | |
5393 | SETMEMSI (current_cpu, pc, ADDSI (FLD (f_offset), 8), opval); | |
5394 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5395 | } | |
5396 | { | |
5397 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (3))]); | |
5398 | SETMEMSI (current_cpu, pc, ADDSI (FLD (f_offset), 12), opval); | |
5399 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5400 | } | |
7a292a7a | 5401 | } |
c906108c SS |
5402 | |
5403 | #undef FLD | |
5404 | } | |
5405 | NEXT (vpc); | |
5406 | ||
5407 | CASE (sem, INSN_STQ_INDIRECT_OFFSET) : /* stq $st_src, $offset($abase) */ | |
5408 | { | |
5409 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5410 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 5411 | #define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f |
c906108c SS |
5412 | int UNUSED written = 0; |
5413 | IADDR UNUSED pc = abuf->addr; | |
5414 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
5415 | ||
7a292a7a | 5416 | { |
c906108c SS |
5417 | SI tmp_sregno; |
5418 | tmp_sregno = FLD (f_srcdst); | |
5419 | { | |
5420 | SI opval = * FLD (i_st_src); | |
5421 | SETMEMSI (current_cpu, pc, ADDSI (FLD (f_offset), * FLD (i_abase)), opval); | |
5422 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5423 | } | |
5424 | { | |
5425 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); | |
5426 | SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_offset), * FLD (i_abase)), 4), opval); | |
5427 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5428 | } | |
5429 | { | |
5430 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]); | |
5431 | SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_offset), * FLD (i_abase)), 8), opval); | |
5432 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5433 | } | |
5434 | { | |
5435 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (3))]); | |
5436 | SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_offset), * FLD (i_abase)), 12), opval); | |
5437 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5438 | } | |
7a292a7a | 5439 | } |
c906108c SS |
5440 | |
5441 | #undef FLD | |
5442 | } | |
5443 | NEXT (vpc); | |
5444 | ||
5445 | CASE (sem, INSN_STQ_INDIRECT) : /* stq $st_src, ($abase) */ | |
5446 | { | |
5447 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5448 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 5449 | #define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f |
c906108c SS |
5450 | int UNUSED written = 0; |
5451 | IADDR UNUSED pc = abuf->addr; | |
5452 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
5453 | ||
7a292a7a | 5454 | { |
c906108c SS |
5455 | SI tmp_sregno; |
5456 | tmp_sregno = FLD (f_srcdst); | |
5457 | { | |
5458 | SI opval = * FLD (i_st_src); | |
5459 | SETMEMSI (current_cpu, pc, * FLD (i_abase), opval); | |
5460 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5461 | } | |
5462 | { | |
5463 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); | |
5464 | SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_abase), 4), opval); | |
5465 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5466 | } | |
5467 | { | |
5468 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]); | |
5469 | SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_abase), 8), opval); | |
5470 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5471 | } | |
5472 | { | |
5473 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (3))]); | |
5474 | SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_abase), 12), opval); | |
5475 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5476 | } | |
7a292a7a | 5477 | } |
c906108c SS |
5478 | |
5479 | #undef FLD | |
5480 | } | |
5481 | NEXT (vpc); | |
5482 | ||
5483 | CASE (sem, INSN_STQ_INDIRECT_INDEX) : /* stq $st_src, ($abase)[$index*S$scale] */ | |
5484 | { | |
5485 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5486 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 5487 | #define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f |
c906108c SS |
5488 | int UNUSED written = 0; |
5489 | IADDR UNUSED pc = abuf->addr; | |
5490 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
5491 | ||
7a292a7a | 5492 | { |
c906108c SS |
5493 | SI tmp_sregno; |
5494 | tmp_sregno = FLD (f_srcdst); | |
5495 | { | |
5496 | SI opval = * FLD (i_st_src); | |
5497 | SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), opval); | |
5498 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5499 | } | |
5500 | { | |
5501 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); | |
5502 | SETMEMSI (current_cpu, pc, ADDSI (ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), 4), opval); | |
5503 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5504 | } | |
5505 | { | |
5506 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]); | |
5507 | SETMEMSI (current_cpu, pc, ADDSI (ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), 8), opval); | |
5508 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5509 | } | |
5510 | { | |
5511 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (3))]); | |
5512 | SETMEMSI (current_cpu, pc, ADDSI (ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), 12), opval); | |
5513 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5514 | } | |
7a292a7a | 5515 | } |
c906108c SS |
5516 | |
5517 | #undef FLD | |
5518 | } | |
5519 | NEXT (vpc); | |
5520 | ||
5521 | CASE (sem, INSN_STQ_DISP) : /* stq $st_src, $optdisp */ | |
5522 | { | |
5523 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5524 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 5525 | #define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f |
c906108c SS |
5526 | int UNUSED written = 0; |
5527 | IADDR UNUSED pc = abuf->addr; | |
5528 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
5529 | ||
7a292a7a | 5530 | { |
c906108c SS |
5531 | SI tmp_sregno; |
5532 | tmp_sregno = FLD (f_srcdst); | |
5533 | { | |
5534 | SI opval = * FLD (i_st_src); | |
5535 | SETMEMSI (current_cpu, pc, FLD (f_optdisp), opval); | |
5536 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5537 | } | |
5538 | { | |
5539 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); | |
5540 | SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), 4), opval); | |
5541 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5542 | } | |
5543 | { | |
5544 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]); | |
5545 | SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), 8), opval); | |
5546 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5547 | } | |
5548 | { | |
5549 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (3))]); | |
5550 | SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), 12), opval); | |
5551 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5552 | } | |
7a292a7a | 5553 | } |
c906108c SS |
5554 | |
5555 | #undef FLD | |
5556 | } | |
5557 | NEXT (vpc); | |
5558 | ||
5559 | CASE (sem, INSN_STQ_INDIRECT_DISP) : /* stq $st_src, $optdisp($abase) */ | |
5560 | { | |
5561 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5562 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 5563 | #define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f |
c906108c SS |
5564 | int UNUSED written = 0; |
5565 | IADDR UNUSED pc = abuf->addr; | |
5566 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
5567 | ||
7a292a7a | 5568 | { |
c906108c SS |
5569 | SI tmp_sregno; |
5570 | tmp_sregno = FLD (f_srcdst); | |
5571 | { | |
5572 | SI opval = * FLD (i_st_src); | |
5573 | SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), * FLD (i_abase)), opval); | |
5574 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5575 | } | |
5576 | { | |
5577 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); | |
5578 | SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), * FLD (i_abase)), 4), opval); | |
5579 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5580 | } | |
5581 | { | |
5582 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]); | |
5583 | SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), * FLD (i_abase)), 8), opval); | |
5584 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5585 | } | |
5586 | { | |
5587 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (3))]); | |
5588 | SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), * FLD (i_abase)), 12), opval); | |
5589 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5590 | } | |
7a292a7a | 5591 | } |
c906108c SS |
5592 | |
5593 | #undef FLD | |
5594 | } | |
5595 | NEXT (vpc); | |
5596 | ||
5597 | CASE (sem, INSN_STQ_INDEX_DISP) : /* stq $st_src, $optdisp[$index*S$scale */ | |
5598 | { | |
5599 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5600 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 5601 | #define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f |
c906108c SS |
5602 | int UNUSED written = 0; |
5603 | IADDR UNUSED pc = abuf->addr; | |
5604 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
5605 | ||
7a292a7a | 5606 | { |
c906108c SS |
5607 | SI tmp_sregno; |
5608 | tmp_sregno = FLD (f_srcdst); | |
5609 | { | |
5610 | SI opval = * FLD (i_st_src); | |
5611 | SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), opval); | |
5612 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5613 | } | |
5614 | { | |
5615 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); | |
5616 | SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), 4), opval); | |
5617 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5618 | } | |
5619 | { | |
5620 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]); | |
5621 | SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), 8), opval); | |
5622 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5623 | } | |
5624 | { | |
5625 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (3))]); | |
5626 | SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))), 12), opval); | |
5627 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5628 | } | |
7a292a7a | 5629 | } |
c906108c SS |
5630 | |
5631 | #undef FLD | |
5632 | } | |
5633 | NEXT (vpc); | |
5634 | ||
5635 | CASE (sem, INSN_STQ_INDIRECT_INDEX_DISP) : /* stq $st_src, $optdisp($abase)[$index*S$scale] */ | |
5636 | { | |
5637 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5638 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 5639 | #define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f |
c906108c SS |
5640 | int UNUSED written = 0; |
5641 | IADDR UNUSED pc = abuf->addr; | |
5642 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
5643 | ||
7a292a7a | 5644 | { |
c906108c SS |
5645 | SI tmp_sregno; |
5646 | tmp_sregno = FLD (f_srcdst); | |
5647 | { | |
5648 | SI opval = * FLD (i_st_src); | |
5649 | SETMEMSI (current_cpu, pc, ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))), opval); | |
5650 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5651 | } | |
5652 | { | |
5653 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (1))]); | |
5654 | SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))), 4), opval); | |
5655 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5656 | } | |
5657 | { | |
5658 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (2))]); | |
5659 | SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))), 8), opval); | |
5660 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5661 | } | |
5662 | { | |
5663 | SI opval = CPU (h_gr[((FLD (f_srcdst)) + (3))]); | |
5664 | SETMEMSI (current_cpu, pc, ADDSI (ADDSI (FLD (f_optdisp), ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale))))), 12), opval); | |
5665 | TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); | |
5666 | } | |
7a292a7a | 5667 | } |
c906108c SS |
5668 | |
5669 | #undef FLD | |
5670 | } | |
5671 | NEXT (vpc); | |
5672 | ||
5673 | CASE (sem, INSN_CMPOBE_REG) : /* cmpobe $br_src1, $br_src2, $br_disp */ | |
5674 | { | |
5675 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5676 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 5677 | #define FLD(f) abuf->fields.sfmt_cmpobe_reg.f |
c906108c SS |
5678 | int UNUSED written = 0; |
5679 | IADDR UNUSED pc = abuf->addr; | |
5680 | SEM_BRANCH_INIT | |
5681 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
5682 | ||
5683 | if (EQSI (* FLD (i_br_src1), * FLD (i_br_src2))) { | |
5684 | { | |
5685 | USI opval = FLD (i_br_disp); | |
96baa820 | 5686 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
5687 | written |= (1 << 3); |
5688 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
5689 | } | |
5690 | } | |
5691 | ||
5692 | abuf->written = written; | |
5693 | SEM_BRANCH_FINI (vpc); | |
5694 | #undef FLD | |
5695 | } | |
5696 | NEXT (vpc); | |
5697 | ||
5698 | CASE (sem, INSN_CMPOBE_LIT) : /* cmpobe $br_lit1, $br_src2, $br_disp */ | |
5699 | { | |
5700 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5701 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 5702 | #define FLD(f) abuf->fields.sfmt_cmpobe_lit.f |
c906108c SS |
5703 | int UNUSED written = 0; |
5704 | IADDR UNUSED pc = abuf->addr; | |
5705 | SEM_BRANCH_INIT | |
5706 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
5707 | ||
5708 | if (EQSI (FLD (f_br_src1), * FLD (i_br_src2))) { | |
5709 | { | |
5710 | USI opval = FLD (i_br_disp); | |
96baa820 | 5711 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
5712 | written |= (1 << 3); |
5713 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
5714 | } | |
5715 | } | |
5716 | ||
5717 | abuf->written = written; | |
5718 | SEM_BRANCH_FINI (vpc); | |
5719 | #undef FLD | |
5720 | } | |
5721 | NEXT (vpc); | |
5722 | ||
5723 | CASE (sem, INSN_CMPOBNE_REG) : /* cmpobne $br_src1, $br_src2, $br_disp */ | |
5724 | { | |
5725 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5726 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 5727 | #define FLD(f) abuf->fields.sfmt_cmpobe_reg.f |
c906108c SS |
5728 | int UNUSED written = 0; |
5729 | IADDR UNUSED pc = abuf->addr; | |
5730 | SEM_BRANCH_INIT | |
5731 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
5732 | ||
5733 | if (NESI (* FLD (i_br_src1), * FLD (i_br_src2))) { | |
5734 | { | |
5735 | USI opval = FLD (i_br_disp); | |
96baa820 | 5736 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
5737 | written |= (1 << 3); |
5738 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
5739 | } | |
5740 | } | |
5741 | ||
5742 | abuf->written = written; | |
5743 | SEM_BRANCH_FINI (vpc); | |
5744 | #undef FLD | |
5745 | } | |
5746 | NEXT (vpc); | |
5747 | ||
5748 | CASE (sem, INSN_CMPOBNE_LIT) : /* cmpobne $br_lit1, $br_src2, $br_disp */ | |
5749 | { | |
5750 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5751 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 5752 | #define FLD(f) abuf->fields.sfmt_cmpobe_lit.f |
c906108c SS |
5753 | int UNUSED written = 0; |
5754 | IADDR UNUSED pc = abuf->addr; | |
5755 | SEM_BRANCH_INIT | |
5756 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
5757 | ||
5758 | if (NESI (FLD (f_br_src1), * FLD (i_br_src2))) { | |
5759 | { | |
5760 | USI opval = FLD (i_br_disp); | |
96baa820 | 5761 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
5762 | written |= (1 << 3); |
5763 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
5764 | } | |
5765 | } | |
5766 | ||
5767 | abuf->written = written; | |
5768 | SEM_BRANCH_FINI (vpc); | |
5769 | #undef FLD | |
5770 | } | |
5771 | NEXT (vpc); | |
5772 | ||
5773 | CASE (sem, INSN_CMPOBL_REG) : /* cmpobl $br_src1, $br_src2, $br_disp */ | |
5774 | { | |
5775 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5776 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 5777 | #define FLD(f) abuf->fields.sfmt_cmpobe_reg.f |
c906108c SS |
5778 | int UNUSED written = 0; |
5779 | IADDR UNUSED pc = abuf->addr; | |
5780 | SEM_BRANCH_INIT | |
5781 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
5782 | ||
5783 | if (LTUSI (* FLD (i_br_src1), * FLD (i_br_src2))) { | |
5784 | { | |
5785 | USI opval = FLD (i_br_disp); | |
96baa820 | 5786 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
5787 | written |= (1 << 3); |
5788 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
5789 | } | |
5790 | } | |
5791 | ||
5792 | abuf->written = written; | |
5793 | SEM_BRANCH_FINI (vpc); | |
5794 | #undef FLD | |
5795 | } | |
5796 | NEXT (vpc); | |
5797 | ||
5798 | CASE (sem, INSN_CMPOBL_LIT) : /* cmpobl $br_lit1, $br_src2, $br_disp */ | |
5799 | { | |
5800 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5801 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 5802 | #define FLD(f) abuf->fields.sfmt_cmpobe_lit.f |
c906108c SS |
5803 | int UNUSED written = 0; |
5804 | IADDR UNUSED pc = abuf->addr; | |
5805 | SEM_BRANCH_INIT | |
5806 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
5807 | ||
5808 | if (LTUSI (FLD (f_br_src1), * FLD (i_br_src2))) { | |
5809 | { | |
5810 | USI opval = FLD (i_br_disp); | |
96baa820 | 5811 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
5812 | written |= (1 << 3); |
5813 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
5814 | } | |
5815 | } | |
5816 | ||
5817 | abuf->written = written; | |
5818 | SEM_BRANCH_FINI (vpc); | |
5819 | #undef FLD | |
5820 | } | |
5821 | NEXT (vpc); | |
5822 | ||
5823 | CASE (sem, INSN_CMPOBLE_REG) : /* cmpoble $br_src1, $br_src2, $br_disp */ | |
5824 | { | |
5825 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5826 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 5827 | #define FLD(f) abuf->fields.sfmt_cmpobe_reg.f |
c906108c SS |
5828 | int UNUSED written = 0; |
5829 | IADDR UNUSED pc = abuf->addr; | |
5830 | SEM_BRANCH_INIT | |
5831 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
5832 | ||
5833 | if (LEUSI (* FLD (i_br_src1), * FLD (i_br_src2))) { | |
5834 | { | |
5835 | USI opval = FLD (i_br_disp); | |
96baa820 | 5836 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
5837 | written |= (1 << 3); |
5838 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
5839 | } | |
5840 | } | |
5841 | ||
5842 | abuf->written = written; | |
5843 | SEM_BRANCH_FINI (vpc); | |
5844 | #undef FLD | |
5845 | } | |
5846 | NEXT (vpc); | |
5847 | ||
5848 | CASE (sem, INSN_CMPOBLE_LIT) : /* cmpoble $br_lit1, $br_src2, $br_disp */ | |
5849 | { | |
5850 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5851 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 5852 | #define FLD(f) abuf->fields.sfmt_cmpobe_lit.f |
c906108c SS |
5853 | int UNUSED written = 0; |
5854 | IADDR UNUSED pc = abuf->addr; | |
5855 | SEM_BRANCH_INIT | |
5856 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
5857 | ||
5858 | if (LEUSI (FLD (f_br_src1), * FLD (i_br_src2))) { | |
5859 | { | |
5860 | USI opval = FLD (i_br_disp); | |
96baa820 | 5861 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
5862 | written |= (1 << 3); |
5863 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
5864 | } | |
5865 | } | |
5866 | ||
5867 | abuf->written = written; | |
5868 | SEM_BRANCH_FINI (vpc); | |
5869 | #undef FLD | |
5870 | } | |
5871 | NEXT (vpc); | |
5872 | ||
5873 | CASE (sem, INSN_CMPOBG_REG) : /* cmpobg $br_src1, $br_src2, $br_disp */ | |
5874 | { | |
5875 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5876 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 5877 | #define FLD(f) abuf->fields.sfmt_cmpobe_reg.f |
c906108c SS |
5878 | int UNUSED written = 0; |
5879 | IADDR UNUSED pc = abuf->addr; | |
5880 | SEM_BRANCH_INIT | |
5881 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
5882 | ||
5883 | if (GTUSI (* FLD (i_br_src1), * FLD (i_br_src2))) { | |
5884 | { | |
5885 | USI opval = FLD (i_br_disp); | |
96baa820 | 5886 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
5887 | written |= (1 << 3); |
5888 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
5889 | } | |
5890 | } | |
5891 | ||
5892 | abuf->written = written; | |
5893 | SEM_BRANCH_FINI (vpc); | |
5894 | #undef FLD | |
5895 | } | |
5896 | NEXT (vpc); | |
5897 | ||
5898 | CASE (sem, INSN_CMPOBG_LIT) : /* cmpobg $br_lit1, $br_src2, $br_disp */ | |
5899 | { | |
5900 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5901 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 5902 | #define FLD(f) abuf->fields.sfmt_cmpobe_lit.f |
c906108c SS |
5903 | int UNUSED written = 0; |
5904 | IADDR UNUSED pc = abuf->addr; | |
5905 | SEM_BRANCH_INIT | |
5906 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
5907 | ||
5908 | if (GTUSI (FLD (f_br_src1), * FLD (i_br_src2))) { | |
5909 | { | |
5910 | USI opval = FLD (i_br_disp); | |
96baa820 | 5911 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
5912 | written |= (1 << 3); |
5913 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
5914 | } | |
5915 | } | |
5916 | ||
5917 | abuf->written = written; | |
5918 | SEM_BRANCH_FINI (vpc); | |
5919 | #undef FLD | |
5920 | } | |
5921 | NEXT (vpc); | |
5922 | ||
5923 | CASE (sem, INSN_CMPOBGE_REG) : /* cmpobge $br_src1, $br_src2, $br_disp */ | |
5924 | { | |
5925 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5926 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 5927 | #define FLD(f) abuf->fields.sfmt_cmpobe_reg.f |
c906108c SS |
5928 | int UNUSED written = 0; |
5929 | IADDR UNUSED pc = abuf->addr; | |
5930 | SEM_BRANCH_INIT | |
5931 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
5932 | ||
5933 | if (GEUSI (* FLD (i_br_src1), * FLD (i_br_src2))) { | |
5934 | { | |
5935 | USI opval = FLD (i_br_disp); | |
96baa820 | 5936 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
5937 | written |= (1 << 3); |
5938 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
5939 | } | |
5940 | } | |
5941 | ||
5942 | abuf->written = written; | |
5943 | SEM_BRANCH_FINI (vpc); | |
5944 | #undef FLD | |
5945 | } | |
5946 | NEXT (vpc); | |
5947 | ||
5948 | CASE (sem, INSN_CMPOBGE_LIT) : /* cmpobge $br_lit1, $br_src2, $br_disp */ | |
5949 | { | |
5950 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5951 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 5952 | #define FLD(f) abuf->fields.sfmt_cmpobe_lit.f |
c906108c SS |
5953 | int UNUSED written = 0; |
5954 | IADDR UNUSED pc = abuf->addr; | |
5955 | SEM_BRANCH_INIT | |
5956 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
5957 | ||
5958 | if (GEUSI (FLD (f_br_src1), * FLD (i_br_src2))) { | |
5959 | { | |
5960 | USI opval = FLD (i_br_disp); | |
96baa820 | 5961 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
5962 | written |= (1 << 3); |
5963 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
5964 | } | |
5965 | } | |
5966 | ||
5967 | abuf->written = written; | |
5968 | SEM_BRANCH_FINI (vpc); | |
5969 | #undef FLD | |
5970 | } | |
5971 | NEXT (vpc); | |
5972 | ||
5973 | CASE (sem, INSN_CMPIBE_REG) : /* cmpibe $br_src1, $br_src2, $br_disp */ | |
5974 | { | |
5975 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
5976 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 5977 | #define FLD(f) abuf->fields.sfmt_cmpobe_reg.f |
c906108c SS |
5978 | int UNUSED written = 0; |
5979 | IADDR UNUSED pc = abuf->addr; | |
5980 | SEM_BRANCH_INIT | |
5981 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
5982 | ||
5983 | if (EQSI (* FLD (i_br_src1), * FLD (i_br_src2))) { | |
5984 | { | |
5985 | USI opval = FLD (i_br_disp); | |
96baa820 | 5986 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
5987 | written |= (1 << 3); |
5988 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
5989 | } | |
5990 | } | |
5991 | ||
5992 | abuf->written = written; | |
5993 | SEM_BRANCH_FINI (vpc); | |
5994 | #undef FLD | |
5995 | } | |
5996 | NEXT (vpc); | |
5997 | ||
5998 | CASE (sem, INSN_CMPIBE_LIT) : /* cmpibe $br_lit1, $br_src2, $br_disp */ | |
5999 | { | |
6000 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6001 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 6002 | #define FLD(f) abuf->fields.sfmt_cmpobe_lit.f |
c906108c SS |
6003 | int UNUSED written = 0; |
6004 | IADDR UNUSED pc = abuf->addr; | |
6005 | SEM_BRANCH_INIT | |
6006 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6007 | ||
6008 | if (EQSI (FLD (f_br_src1), * FLD (i_br_src2))) { | |
6009 | { | |
6010 | USI opval = FLD (i_br_disp); | |
96baa820 | 6011 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
6012 | written |= (1 << 3); |
6013 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
6014 | } | |
6015 | } | |
6016 | ||
6017 | abuf->written = written; | |
6018 | SEM_BRANCH_FINI (vpc); | |
6019 | #undef FLD | |
6020 | } | |
6021 | NEXT (vpc); | |
6022 | ||
6023 | CASE (sem, INSN_CMPIBNE_REG) : /* cmpibne $br_src1, $br_src2, $br_disp */ | |
6024 | { | |
6025 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6026 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 6027 | #define FLD(f) abuf->fields.sfmt_cmpobe_reg.f |
c906108c SS |
6028 | int UNUSED written = 0; |
6029 | IADDR UNUSED pc = abuf->addr; | |
6030 | SEM_BRANCH_INIT | |
6031 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6032 | ||
6033 | if (NESI (* FLD (i_br_src1), * FLD (i_br_src2))) { | |
6034 | { | |
6035 | USI opval = FLD (i_br_disp); | |
96baa820 | 6036 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
6037 | written |= (1 << 3); |
6038 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
6039 | } | |
6040 | } | |
6041 | ||
6042 | abuf->written = written; | |
6043 | SEM_BRANCH_FINI (vpc); | |
6044 | #undef FLD | |
6045 | } | |
6046 | NEXT (vpc); | |
6047 | ||
6048 | CASE (sem, INSN_CMPIBNE_LIT) : /* cmpibne $br_lit1, $br_src2, $br_disp */ | |
6049 | { | |
6050 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6051 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 6052 | #define FLD(f) abuf->fields.sfmt_cmpobe_lit.f |
c906108c SS |
6053 | int UNUSED written = 0; |
6054 | IADDR UNUSED pc = abuf->addr; | |
6055 | SEM_BRANCH_INIT | |
6056 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6057 | ||
6058 | if (NESI (FLD (f_br_src1), * FLD (i_br_src2))) { | |
6059 | { | |
6060 | USI opval = FLD (i_br_disp); | |
96baa820 | 6061 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
6062 | written |= (1 << 3); |
6063 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
6064 | } | |
6065 | } | |
6066 | ||
6067 | abuf->written = written; | |
6068 | SEM_BRANCH_FINI (vpc); | |
6069 | #undef FLD | |
6070 | } | |
6071 | NEXT (vpc); | |
6072 | ||
6073 | CASE (sem, INSN_CMPIBL_REG) : /* cmpibl $br_src1, $br_src2, $br_disp */ | |
6074 | { | |
6075 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6076 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 6077 | #define FLD(f) abuf->fields.sfmt_cmpobe_reg.f |
c906108c SS |
6078 | int UNUSED written = 0; |
6079 | IADDR UNUSED pc = abuf->addr; | |
6080 | SEM_BRANCH_INIT | |
6081 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6082 | ||
6083 | if (LTSI (* FLD (i_br_src1), * FLD (i_br_src2))) { | |
6084 | { | |
6085 | USI opval = FLD (i_br_disp); | |
96baa820 | 6086 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
6087 | written |= (1 << 3); |
6088 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
6089 | } | |
6090 | } | |
6091 | ||
6092 | abuf->written = written; | |
6093 | SEM_BRANCH_FINI (vpc); | |
6094 | #undef FLD | |
6095 | } | |
6096 | NEXT (vpc); | |
6097 | ||
6098 | CASE (sem, INSN_CMPIBL_LIT) : /* cmpibl $br_lit1, $br_src2, $br_disp */ | |
6099 | { | |
6100 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6101 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 6102 | #define FLD(f) abuf->fields.sfmt_cmpobe_lit.f |
c906108c SS |
6103 | int UNUSED written = 0; |
6104 | IADDR UNUSED pc = abuf->addr; | |
6105 | SEM_BRANCH_INIT | |
6106 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6107 | ||
6108 | if (LTSI (FLD (f_br_src1), * FLD (i_br_src2))) { | |
6109 | { | |
6110 | USI opval = FLD (i_br_disp); | |
96baa820 | 6111 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
6112 | written |= (1 << 3); |
6113 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
6114 | } | |
6115 | } | |
6116 | ||
6117 | abuf->written = written; | |
6118 | SEM_BRANCH_FINI (vpc); | |
6119 | #undef FLD | |
6120 | } | |
6121 | NEXT (vpc); | |
6122 | ||
6123 | CASE (sem, INSN_CMPIBLE_REG) : /* cmpible $br_src1, $br_src2, $br_disp */ | |
6124 | { | |
6125 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6126 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 6127 | #define FLD(f) abuf->fields.sfmt_cmpobe_reg.f |
c906108c SS |
6128 | int UNUSED written = 0; |
6129 | IADDR UNUSED pc = abuf->addr; | |
6130 | SEM_BRANCH_INIT | |
6131 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6132 | ||
6133 | if (LESI (* FLD (i_br_src1), * FLD (i_br_src2))) { | |
6134 | { | |
6135 | USI opval = FLD (i_br_disp); | |
96baa820 | 6136 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
6137 | written |= (1 << 3); |
6138 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
6139 | } | |
6140 | } | |
6141 | ||
6142 | abuf->written = written; | |
6143 | SEM_BRANCH_FINI (vpc); | |
6144 | #undef FLD | |
6145 | } | |
6146 | NEXT (vpc); | |
6147 | ||
6148 | CASE (sem, INSN_CMPIBLE_LIT) : /* cmpible $br_lit1, $br_src2, $br_disp */ | |
6149 | { | |
6150 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6151 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 6152 | #define FLD(f) abuf->fields.sfmt_cmpobe_lit.f |
c906108c SS |
6153 | int UNUSED written = 0; |
6154 | IADDR UNUSED pc = abuf->addr; | |
6155 | SEM_BRANCH_INIT | |
6156 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6157 | ||
6158 | if (LESI (FLD (f_br_src1), * FLD (i_br_src2))) { | |
6159 | { | |
6160 | USI opval = FLD (i_br_disp); | |
96baa820 | 6161 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
6162 | written |= (1 << 3); |
6163 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
6164 | } | |
6165 | } | |
6166 | ||
6167 | abuf->written = written; | |
6168 | SEM_BRANCH_FINI (vpc); | |
6169 | #undef FLD | |
6170 | } | |
6171 | NEXT (vpc); | |
6172 | ||
6173 | CASE (sem, INSN_CMPIBG_REG) : /* cmpibg $br_src1, $br_src2, $br_disp */ | |
6174 | { | |
6175 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6176 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 6177 | #define FLD(f) abuf->fields.sfmt_cmpobe_reg.f |
c906108c SS |
6178 | int UNUSED written = 0; |
6179 | IADDR UNUSED pc = abuf->addr; | |
6180 | SEM_BRANCH_INIT | |
6181 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6182 | ||
6183 | if (GTSI (* FLD (i_br_src1), * FLD (i_br_src2))) { | |
6184 | { | |
6185 | USI opval = FLD (i_br_disp); | |
96baa820 | 6186 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
6187 | written |= (1 << 3); |
6188 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
6189 | } | |
6190 | } | |
6191 | ||
6192 | abuf->written = written; | |
6193 | SEM_BRANCH_FINI (vpc); | |
6194 | #undef FLD | |
6195 | } | |
6196 | NEXT (vpc); | |
6197 | ||
6198 | CASE (sem, INSN_CMPIBG_LIT) : /* cmpibg $br_lit1, $br_src2, $br_disp */ | |
6199 | { | |
6200 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6201 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 6202 | #define FLD(f) abuf->fields.sfmt_cmpobe_lit.f |
c906108c SS |
6203 | int UNUSED written = 0; |
6204 | IADDR UNUSED pc = abuf->addr; | |
6205 | SEM_BRANCH_INIT | |
6206 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6207 | ||
6208 | if (GTSI (FLD (f_br_src1), * FLD (i_br_src2))) { | |
6209 | { | |
6210 | USI opval = FLD (i_br_disp); | |
96baa820 | 6211 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
6212 | written |= (1 << 3); |
6213 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
6214 | } | |
6215 | } | |
6216 | ||
6217 | abuf->written = written; | |
6218 | SEM_BRANCH_FINI (vpc); | |
6219 | #undef FLD | |
6220 | } | |
6221 | NEXT (vpc); | |
6222 | ||
6223 | CASE (sem, INSN_CMPIBGE_REG) : /* cmpibge $br_src1, $br_src2, $br_disp */ | |
6224 | { | |
6225 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6226 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 6227 | #define FLD(f) abuf->fields.sfmt_cmpobe_reg.f |
c906108c SS |
6228 | int UNUSED written = 0; |
6229 | IADDR UNUSED pc = abuf->addr; | |
6230 | SEM_BRANCH_INIT | |
6231 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6232 | ||
6233 | if (GESI (* FLD (i_br_src1), * FLD (i_br_src2))) { | |
6234 | { | |
6235 | USI opval = FLD (i_br_disp); | |
96baa820 | 6236 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
6237 | written |= (1 << 3); |
6238 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
6239 | } | |
6240 | } | |
6241 | ||
6242 | abuf->written = written; | |
6243 | SEM_BRANCH_FINI (vpc); | |
6244 | #undef FLD | |
6245 | } | |
6246 | NEXT (vpc); | |
6247 | ||
6248 | CASE (sem, INSN_CMPIBGE_LIT) : /* cmpibge $br_lit1, $br_src2, $br_disp */ | |
6249 | { | |
6250 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6251 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 6252 | #define FLD(f) abuf->fields.sfmt_cmpobe_lit.f |
c906108c SS |
6253 | int UNUSED written = 0; |
6254 | IADDR UNUSED pc = abuf->addr; | |
6255 | SEM_BRANCH_INIT | |
6256 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6257 | ||
6258 | if (GESI (FLD (f_br_src1), * FLD (i_br_src2))) { | |
6259 | { | |
6260 | USI opval = FLD (i_br_disp); | |
96baa820 | 6261 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
6262 | written |= (1 << 3); |
6263 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
6264 | } | |
6265 | } | |
6266 | ||
6267 | abuf->written = written; | |
6268 | SEM_BRANCH_FINI (vpc); | |
6269 | #undef FLD | |
6270 | } | |
6271 | NEXT (vpc); | |
6272 | ||
6273 | CASE (sem, INSN_BBC_REG) : /* bbc $br_src1, $br_src2, $br_disp */ | |
6274 | { | |
6275 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6276 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 6277 | #define FLD(f) abuf->fields.sfmt_cmpobe_reg.f |
c906108c SS |
6278 | int UNUSED written = 0; |
6279 | IADDR UNUSED pc = abuf->addr; | |
6280 | SEM_BRANCH_INIT | |
6281 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6282 | ||
6283 | if (EQSI (ANDSI (SLLSI (1, * FLD (i_br_src1)), * FLD (i_br_src2)), 0)) { | |
6284 | { | |
6285 | USI opval = FLD (i_br_disp); | |
96baa820 | 6286 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
6287 | written |= (1 << 3); |
6288 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
6289 | } | |
6290 | } | |
6291 | ||
6292 | abuf->written = written; | |
6293 | SEM_BRANCH_FINI (vpc); | |
6294 | #undef FLD | |
6295 | } | |
6296 | NEXT (vpc); | |
6297 | ||
6298 | CASE (sem, INSN_BBC_LIT) : /* bbc $br_lit1, $br_src2, $br_disp */ | |
6299 | { | |
6300 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6301 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 6302 | #define FLD(f) abuf->fields.sfmt_cmpobe_lit.f |
c906108c SS |
6303 | int UNUSED written = 0; |
6304 | IADDR UNUSED pc = abuf->addr; | |
6305 | SEM_BRANCH_INIT | |
6306 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6307 | ||
6308 | if (EQSI (ANDSI (SLLSI (1, FLD (f_br_src1)), * FLD (i_br_src2)), 0)) { | |
6309 | { | |
6310 | USI opval = FLD (i_br_disp); | |
96baa820 | 6311 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
6312 | written |= (1 << 3); |
6313 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
6314 | } | |
6315 | } | |
6316 | ||
6317 | abuf->written = written; | |
6318 | SEM_BRANCH_FINI (vpc); | |
6319 | #undef FLD | |
6320 | } | |
6321 | NEXT (vpc); | |
6322 | ||
6323 | CASE (sem, INSN_BBS_REG) : /* bbs $br_src1, $br_src2, $br_disp */ | |
6324 | { | |
6325 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6326 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 6327 | #define FLD(f) abuf->fields.sfmt_cmpobe_reg.f |
c906108c SS |
6328 | int UNUSED written = 0; |
6329 | IADDR UNUSED pc = abuf->addr; | |
6330 | SEM_BRANCH_INIT | |
6331 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6332 | ||
6333 | if (NESI (ANDSI (SLLSI (1, * FLD (i_br_src1)), * FLD (i_br_src2)), 0)) { | |
6334 | { | |
6335 | USI opval = FLD (i_br_disp); | |
96baa820 | 6336 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
6337 | written |= (1 << 3); |
6338 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
6339 | } | |
6340 | } | |
6341 | ||
6342 | abuf->written = written; | |
6343 | SEM_BRANCH_FINI (vpc); | |
6344 | #undef FLD | |
6345 | } | |
6346 | NEXT (vpc); | |
6347 | ||
6348 | CASE (sem, INSN_BBS_LIT) : /* bbs $br_lit1, $br_src2, $br_disp */ | |
6349 | { | |
6350 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6351 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 6352 | #define FLD(f) abuf->fields.sfmt_cmpobe_lit.f |
c906108c SS |
6353 | int UNUSED written = 0; |
6354 | IADDR UNUSED pc = abuf->addr; | |
6355 | SEM_BRANCH_INIT | |
6356 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6357 | ||
6358 | if (NESI (ANDSI (SLLSI (1, FLD (f_br_src1)), * FLD (i_br_src2)), 0)) { | |
6359 | { | |
6360 | USI opval = FLD (i_br_disp); | |
96baa820 | 6361 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
6362 | written |= (1 << 3); |
6363 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
6364 | } | |
6365 | } | |
6366 | ||
6367 | abuf->written = written; | |
6368 | SEM_BRANCH_FINI (vpc); | |
6369 | #undef FLD | |
6370 | } | |
6371 | NEXT (vpc); | |
6372 | ||
6373 | CASE (sem, INSN_CMPI) : /* cmpi $src1, $src2 */ | |
6374 | { | |
6375 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6376 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 6377 | #define FLD(f) abuf->fields.sfmt_emul.f |
c906108c SS |
6378 | int UNUSED written = 0; |
6379 | IADDR UNUSED pc = abuf->addr; | |
6380 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6381 | ||
6382 | { | |
6383 | SI opval = (LTSI (* FLD (i_src1), * FLD (i_src2))) ? (4) : (EQSI (* FLD (i_src1), * FLD (i_src2))) ? (2) : (1); | |
6384 | CPU (h_cc) = opval; | |
7a292a7a | 6385 | TRACE_RESULT (current_cpu, abuf, "cc", 'x', opval); |
c906108c SS |
6386 | } |
6387 | ||
6388 | #undef FLD | |
6389 | } | |
6390 | NEXT (vpc); | |
6391 | ||
6392 | CASE (sem, INSN_CMPI1) : /* cmpi $lit1, $src2 */ | |
6393 | { | |
6394 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6395 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 6396 | #define FLD(f) abuf->fields.sfmt_emul1.f |
c906108c SS |
6397 | int UNUSED written = 0; |
6398 | IADDR UNUSED pc = abuf->addr; | |
6399 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6400 | ||
6401 | { | |
6402 | SI opval = (LTSI (FLD (f_src1), * FLD (i_src2))) ? (4) : (EQSI (FLD (f_src1), * FLD (i_src2))) ? (2) : (1); | |
6403 | CPU (h_cc) = opval; | |
7a292a7a | 6404 | TRACE_RESULT (current_cpu, abuf, "cc", 'x', opval); |
c906108c SS |
6405 | } |
6406 | ||
6407 | #undef FLD | |
6408 | } | |
6409 | NEXT (vpc); | |
6410 | ||
6411 | CASE (sem, INSN_CMPI2) : /* cmpi $src1, $lit2 */ | |
6412 | { | |
6413 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6414 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 6415 | #define FLD(f) abuf->fields.sfmt_emul2.f |
c906108c SS |
6416 | int UNUSED written = 0; |
6417 | IADDR UNUSED pc = abuf->addr; | |
6418 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6419 | ||
6420 | { | |
6421 | SI opval = (LTSI (* FLD (i_src1), FLD (f_src2))) ? (4) : (EQSI (* FLD (i_src1), FLD (f_src2))) ? (2) : (1); | |
6422 | CPU (h_cc) = opval; | |
7a292a7a | 6423 | TRACE_RESULT (current_cpu, abuf, "cc", 'x', opval); |
c906108c SS |
6424 | } |
6425 | ||
6426 | #undef FLD | |
6427 | } | |
6428 | NEXT (vpc); | |
6429 | ||
6430 | CASE (sem, INSN_CMPI3) : /* cmpi $lit1, $lit2 */ | |
6431 | { | |
6432 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6433 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 6434 | #define FLD(f) abuf->fields.sfmt_emul3.f |
c906108c SS |
6435 | int UNUSED written = 0; |
6436 | IADDR UNUSED pc = abuf->addr; | |
6437 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6438 | ||
6439 | { | |
6440 | SI opval = (LTSI (FLD (f_src1), FLD (f_src2))) ? (4) : (EQSI (FLD (f_src1), FLD (f_src2))) ? (2) : (1); | |
6441 | CPU (h_cc) = opval; | |
7a292a7a | 6442 | TRACE_RESULT (current_cpu, abuf, "cc", 'x', opval); |
c906108c SS |
6443 | } |
6444 | ||
6445 | #undef FLD | |
6446 | } | |
6447 | NEXT (vpc); | |
6448 | ||
6449 | CASE (sem, INSN_CMPO) : /* cmpo $src1, $src2 */ | |
6450 | { | |
6451 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6452 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 6453 | #define FLD(f) abuf->fields.sfmt_emul.f |
c906108c SS |
6454 | int UNUSED written = 0; |
6455 | IADDR UNUSED pc = abuf->addr; | |
6456 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6457 | ||
6458 | { | |
6459 | SI opval = (LTUSI (* FLD (i_src1), * FLD (i_src2))) ? (4) : (EQSI (* FLD (i_src1), * FLD (i_src2))) ? (2) : (1); | |
6460 | CPU (h_cc) = opval; | |
7a292a7a | 6461 | TRACE_RESULT (current_cpu, abuf, "cc", 'x', opval); |
c906108c SS |
6462 | } |
6463 | ||
6464 | #undef FLD | |
6465 | } | |
6466 | NEXT (vpc); | |
6467 | ||
6468 | CASE (sem, INSN_CMPO1) : /* cmpo $lit1, $src2 */ | |
6469 | { | |
6470 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6471 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 6472 | #define FLD(f) abuf->fields.sfmt_emul1.f |
c906108c SS |
6473 | int UNUSED written = 0; |
6474 | IADDR UNUSED pc = abuf->addr; | |
6475 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6476 | ||
6477 | { | |
6478 | SI opval = (LTUSI (FLD (f_src1), * FLD (i_src2))) ? (4) : (EQSI (FLD (f_src1), * FLD (i_src2))) ? (2) : (1); | |
6479 | CPU (h_cc) = opval; | |
7a292a7a | 6480 | TRACE_RESULT (current_cpu, abuf, "cc", 'x', opval); |
c906108c SS |
6481 | } |
6482 | ||
6483 | #undef FLD | |
6484 | } | |
6485 | NEXT (vpc); | |
6486 | ||
6487 | CASE (sem, INSN_CMPO2) : /* cmpo $src1, $lit2 */ | |
6488 | { | |
6489 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6490 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 6491 | #define FLD(f) abuf->fields.sfmt_emul2.f |
c906108c SS |
6492 | int UNUSED written = 0; |
6493 | IADDR UNUSED pc = abuf->addr; | |
6494 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6495 | ||
6496 | { | |
6497 | SI opval = (LTUSI (* FLD (i_src1), FLD (f_src2))) ? (4) : (EQSI (* FLD (i_src1), FLD (f_src2))) ? (2) : (1); | |
6498 | CPU (h_cc) = opval; | |
7a292a7a | 6499 | TRACE_RESULT (current_cpu, abuf, "cc", 'x', opval); |
c906108c SS |
6500 | } |
6501 | ||
6502 | #undef FLD | |
6503 | } | |
6504 | NEXT (vpc); | |
6505 | ||
6506 | CASE (sem, INSN_CMPO3) : /* cmpo $lit1, $lit2 */ | |
6507 | { | |
6508 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6509 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 6510 | #define FLD(f) abuf->fields.sfmt_emul3.f |
c906108c SS |
6511 | int UNUSED written = 0; |
6512 | IADDR UNUSED pc = abuf->addr; | |
6513 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6514 | ||
6515 | { | |
6516 | SI opval = (LTUSI (FLD (f_src1), FLD (f_src2))) ? (4) : (EQSI (FLD (f_src1), FLD (f_src2))) ? (2) : (1); | |
6517 | CPU (h_cc) = opval; | |
7a292a7a | 6518 | TRACE_RESULT (current_cpu, abuf, "cc", 'x', opval); |
c906108c SS |
6519 | } |
6520 | ||
6521 | #undef FLD | |
6522 | } | |
6523 | NEXT (vpc); | |
6524 | ||
6525 | CASE (sem, INSN_TESTNO_REG) : /* testno $br_src1 */ | |
6526 | { | |
6527 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6528 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 6529 | #define FLD(f) abuf->fields.sfmt_testno_reg.f |
c906108c SS |
6530 | int UNUSED written = 0; |
6531 | IADDR UNUSED pc = abuf->addr; | |
6532 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6533 | ||
6534 | { | |
6535 | SI opval = EQSI (CPU (h_cc), 0); | |
6536 | * FLD (i_br_src1) = opval; | |
6537 | TRACE_RESULT (current_cpu, abuf, "br_src1", 'x', opval); | |
6538 | } | |
6539 | ||
6540 | #undef FLD | |
6541 | } | |
6542 | NEXT (vpc); | |
6543 | ||
6544 | CASE (sem, INSN_TESTG_REG) : /* testg $br_src1 */ | |
6545 | { | |
6546 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6547 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 6548 | #define FLD(f) abuf->fields.sfmt_testno_reg.f |
c906108c SS |
6549 | int UNUSED written = 0; |
6550 | IADDR UNUSED pc = abuf->addr; | |
6551 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6552 | ||
6553 | { | |
6554 | SI opval = NESI (ANDSI (CPU (h_cc), 1), 0); | |
6555 | * FLD (i_br_src1) = opval; | |
6556 | TRACE_RESULT (current_cpu, abuf, "br_src1", 'x', opval); | |
6557 | } | |
6558 | ||
6559 | #undef FLD | |
6560 | } | |
6561 | NEXT (vpc); | |
6562 | ||
6563 | CASE (sem, INSN_TESTE_REG) : /* teste $br_src1 */ | |
6564 | { | |
6565 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6566 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 6567 | #define FLD(f) abuf->fields.sfmt_testno_reg.f |
c906108c SS |
6568 | int UNUSED written = 0; |
6569 | IADDR UNUSED pc = abuf->addr; | |
6570 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6571 | ||
6572 | { | |
6573 | SI opval = NESI (ANDSI (CPU (h_cc), 2), 0); | |
6574 | * FLD (i_br_src1) = opval; | |
6575 | TRACE_RESULT (current_cpu, abuf, "br_src1", 'x', opval); | |
6576 | } | |
6577 | ||
6578 | #undef FLD | |
6579 | } | |
6580 | NEXT (vpc); | |
6581 | ||
6582 | CASE (sem, INSN_TESTGE_REG) : /* testge $br_src1 */ | |
6583 | { | |
6584 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6585 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 6586 | #define FLD(f) abuf->fields.sfmt_testno_reg.f |
c906108c SS |
6587 | int UNUSED written = 0; |
6588 | IADDR UNUSED pc = abuf->addr; | |
6589 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6590 | ||
6591 | { | |
6592 | SI opval = NESI (ANDSI (CPU (h_cc), 3), 0); | |
6593 | * FLD (i_br_src1) = opval; | |
6594 | TRACE_RESULT (current_cpu, abuf, "br_src1", 'x', opval); | |
6595 | } | |
6596 | ||
6597 | #undef FLD | |
6598 | } | |
6599 | NEXT (vpc); | |
6600 | ||
6601 | CASE (sem, INSN_TESTL_REG) : /* testl $br_src1 */ | |
6602 | { | |
6603 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6604 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 6605 | #define FLD(f) abuf->fields.sfmt_testno_reg.f |
c906108c SS |
6606 | int UNUSED written = 0; |
6607 | IADDR UNUSED pc = abuf->addr; | |
6608 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6609 | ||
6610 | { | |
6611 | SI opval = NESI (ANDSI (CPU (h_cc), 4), 0); | |
6612 | * FLD (i_br_src1) = opval; | |
6613 | TRACE_RESULT (current_cpu, abuf, "br_src1", 'x', opval); | |
6614 | } | |
6615 | ||
6616 | #undef FLD | |
6617 | } | |
6618 | NEXT (vpc); | |
6619 | ||
6620 | CASE (sem, INSN_TESTNE_REG) : /* testne $br_src1 */ | |
6621 | { | |
6622 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6623 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 6624 | #define FLD(f) abuf->fields.sfmt_testno_reg.f |
c906108c SS |
6625 | int UNUSED written = 0; |
6626 | IADDR UNUSED pc = abuf->addr; | |
6627 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6628 | ||
6629 | { | |
6630 | SI opval = NESI (ANDSI (CPU (h_cc), 5), 0); | |
6631 | * FLD (i_br_src1) = opval; | |
6632 | TRACE_RESULT (current_cpu, abuf, "br_src1", 'x', opval); | |
6633 | } | |
6634 | ||
6635 | #undef FLD | |
6636 | } | |
6637 | NEXT (vpc); | |
6638 | ||
6639 | CASE (sem, INSN_TESTLE_REG) : /* testle $br_src1 */ | |
6640 | { | |
6641 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6642 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 6643 | #define FLD(f) abuf->fields.sfmt_testno_reg.f |
c906108c SS |
6644 | int UNUSED written = 0; |
6645 | IADDR UNUSED pc = abuf->addr; | |
6646 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6647 | ||
6648 | { | |
6649 | SI opval = NESI (ANDSI (CPU (h_cc), 6), 0); | |
6650 | * FLD (i_br_src1) = opval; | |
6651 | TRACE_RESULT (current_cpu, abuf, "br_src1", 'x', opval); | |
6652 | } | |
6653 | ||
6654 | #undef FLD | |
6655 | } | |
6656 | NEXT (vpc); | |
6657 | ||
6658 | CASE (sem, INSN_TESTO_REG) : /* testo $br_src1 */ | |
6659 | { | |
6660 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6661 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 6662 | #define FLD(f) abuf->fields.sfmt_testno_reg.f |
c906108c SS |
6663 | int UNUSED written = 0; |
6664 | IADDR UNUSED pc = abuf->addr; | |
6665 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6666 | ||
6667 | { | |
6668 | SI opval = NESI (ANDSI (CPU (h_cc), 7), 0); | |
6669 | * FLD (i_br_src1) = opval; | |
6670 | TRACE_RESULT (current_cpu, abuf, "br_src1", 'x', opval); | |
6671 | } | |
6672 | ||
6673 | #undef FLD | |
6674 | } | |
6675 | NEXT (vpc); | |
6676 | ||
6677 | CASE (sem, INSN_BNO) : /* bno $ctrl_disp */ | |
6678 | { | |
6679 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6680 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 6681 | #define FLD(f) abuf->fields.sfmt_bno.f |
c906108c SS |
6682 | int UNUSED written = 0; |
6683 | IADDR UNUSED pc = abuf->addr; | |
6684 | SEM_BRANCH_INIT | |
6685 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6686 | ||
6687 | if (EQSI (CPU (h_cc), 0)) { | |
6688 | { | |
6689 | USI opval = FLD (i_ctrl_disp); | |
96baa820 | 6690 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
6691 | written |= (1 << 2); |
6692 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
6693 | } | |
6694 | } | |
6695 | ||
6696 | abuf->written = written; | |
6697 | SEM_BRANCH_FINI (vpc); | |
6698 | #undef FLD | |
6699 | } | |
6700 | NEXT (vpc); | |
6701 | ||
6702 | CASE (sem, INSN_BG) : /* bg $ctrl_disp */ | |
6703 | { | |
6704 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6705 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 6706 | #define FLD(f) abuf->fields.sfmt_bno.f |
c906108c SS |
6707 | int UNUSED written = 0; |
6708 | IADDR UNUSED pc = abuf->addr; | |
6709 | SEM_BRANCH_INIT | |
6710 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6711 | ||
6712 | if (NESI (ANDSI (CPU (h_cc), 1), 0)) { | |
6713 | { | |
6714 | USI opval = FLD (i_ctrl_disp); | |
96baa820 | 6715 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
6716 | written |= (1 << 2); |
6717 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
6718 | } | |
6719 | } | |
6720 | ||
6721 | abuf->written = written; | |
6722 | SEM_BRANCH_FINI (vpc); | |
6723 | #undef FLD | |
6724 | } | |
6725 | NEXT (vpc); | |
6726 | ||
6727 | CASE (sem, INSN_BE) : /* be $ctrl_disp */ | |
6728 | { | |
6729 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6730 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 6731 | #define FLD(f) abuf->fields.sfmt_bno.f |
c906108c SS |
6732 | int UNUSED written = 0; |
6733 | IADDR UNUSED pc = abuf->addr; | |
6734 | SEM_BRANCH_INIT | |
6735 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6736 | ||
6737 | if (NESI (ANDSI (CPU (h_cc), 2), 0)) { | |
6738 | { | |
6739 | USI opval = FLD (i_ctrl_disp); | |
96baa820 | 6740 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
6741 | written |= (1 << 2); |
6742 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
6743 | } | |
6744 | } | |
6745 | ||
6746 | abuf->written = written; | |
6747 | SEM_BRANCH_FINI (vpc); | |
6748 | #undef FLD | |
6749 | } | |
6750 | NEXT (vpc); | |
6751 | ||
6752 | CASE (sem, INSN_BGE) : /* bge $ctrl_disp */ | |
6753 | { | |
6754 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6755 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 6756 | #define FLD(f) abuf->fields.sfmt_bno.f |
c906108c SS |
6757 | int UNUSED written = 0; |
6758 | IADDR UNUSED pc = abuf->addr; | |
6759 | SEM_BRANCH_INIT | |
6760 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6761 | ||
6762 | if (NESI (ANDSI (CPU (h_cc), 3), 0)) { | |
6763 | { | |
6764 | USI opval = FLD (i_ctrl_disp); | |
96baa820 | 6765 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
6766 | written |= (1 << 2); |
6767 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
6768 | } | |
6769 | } | |
6770 | ||
6771 | abuf->written = written; | |
6772 | SEM_BRANCH_FINI (vpc); | |
6773 | #undef FLD | |
6774 | } | |
6775 | NEXT (vpc); | |
6776 | ||
6777 | CASE (sem, INSN_BL) : /* bl $ctrl_disp */ | |
6778 | { | |
6779 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6780 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 6781 | #define FLD(f) abuf->fields.sfmt_bno.f |
c906108c SS |
6782 | int UNUSED written = 0; |
6783 | IADDR UNUSED pc = abuf->addr; | |
6784 | SEM_BRANCH_INIT | |
6785 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6786 | ||
6787 | if (NESI (ANDSI (CPU (h_cc), 4), 0)) { | |
6788 | { | |
6789 | USI opval = FLD (i_ctrl_disp); | |
96baa820 | 6790 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
6791 | written |= (1 << 2); |
6792 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
6793 | } | |
6794 | } | |
6795 | ||
6796 | abuf->written = written; | |
6797 | SEM_BRANCH_FINI (vpc); | |
6798 | #undef FLD | |
6799 | } | |
6800 | NEXT (vpc); | |
6801 | ||
6802 | CASE (sem, INSN_BNE) : /* bne $ctrl_disp */ | |
6803 | { | |
6804 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6805 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 6806 | #define FLD(f) abuf->fields.sfmt_bno.f |
c906108c SS |
6807 | int UNUSED written = 0; |
6808 | IADDR UNUSED pc = abuf->addr; | |
6809 | SEM_BRANCH_INIT | |
6810 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6811 | ||
6812 | if (NESI (ANDSI (CPU (h_cc), 5), 0)) { | |
6813 | { | |
6814 | USI opval = FLD (i_ctrl_disp); | |
96baa820 | 6815 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
6816 | written |= (1 << 2); |
6817 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
6818 | } | |
6819 | } | |
6820 | ||
6821 | abuf->written = written; | |
6822 | SEM_BRANCH_FINI (vpc); | |
6823 | #undef FLD | |
6824 | } | |
6825 | NEXT (vpc); | |
6826 | ||
6827 | CASE (sem, INSN_BLE) : /* ble $ctrl_disp */ | |
6828 | { | |
6829 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6830 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 6831 | #define FLD(f) abuf->fields.sfmt_bno.f |
c906108c SS |
6832 | int UNUSED written = 0; |
6833 | IADDR UNUSED pc = abuf->addr; | |
6834 | SEM_BRANCH_INIT | |
6835 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6836 | ||
6837 | if (NESI (ANDSI (CPU (h_cc), 6), 0)) { | |
6838 | { | |
6839 | USI opval = FLD (i_ctrl_disp); | |
96baa820 | 6840 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
6841 | written |= (1 << 2); |
6842 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
6843 | } | |
6844 | } | |
6845 | ||
6846 | abuf->written = written; | |
6847 | SEM_BRANCH_FINI (vpc); | |
6848 | #undef FLD | |
6849 | } | |
6850 | NEXT (vpc); | |
6851 | ||
6852 | CASE (sem, INSN_BO) : /* bo $ctrl_disp */ | |
6853 | { | |
6854 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6855 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 6856 | #define FLD(f) abuf->fields.sfmt_bno.f |
c906108c SS |
6857 | int UNUSED written = 0; |
6858 | IADDR UNUSED pc = abuf->addr; | |
6859 | SEM_BRANCH_INIT | |
6860 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6861 | ||
6862 | if (NESI (ANDSI (CPU (h_cc), 7), 0)) { | |
6863 | { | |
6864 | USI opval = FLD (i_ctrl_disp); | |
96baa820 | 6865 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
6866 | written |= (1 << 2); |
6867 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
6868 | } | |
6869 | } | |
6870 | ||
6871 | abuf->written = written; | |
6872 | SEM_BRANCH_FINI (vpc); | |
6873 | #undef FLD | |
6874 | } | |
6875 | NEXT (vpc); | |
6876 | ||
6877 | CASE (sem, INSN_B) : /* b $ctrl_disp */ | |
6878 | { | |
6879 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6880 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 6881 | #define FLD(f) abuf->fields.sfmt_bno.f |
c906108c SS |
6882 | int UNUSED written = 0; |
6883 | IADDR UNUSED pc = abuf->addr; | |
6884 | SEM_BRANCH_INIT | |
6885 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6886 | ||
6887 | { | |
6888 | USI opval = FLD (i_ctrl_disp); | |
96baa820 | 6889 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
6890 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); |
6891 | } | |
6892 | ||
6893 | SEM_BRANCH_FINI (vpc); | |
6894 | #undef FLD | |
6895 | } | |
6896 | NEXT (vpc); | |
6897 | ||
6898 | CASE (sem, INSN_BX_INDIRECT_OFFSET) : /* bx $offset($abase) */ | |
6899 | { | |
6900 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6901 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 6902 | #define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f |
c906108c SS |
6903 | int UNUSED written = 0; |
6904 | IADDR UNUSED pc = abuf->addr; | |
6905 | SEM_BRANCH_INIT | |
6906 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6907 | ||
6908 | { | |
6909 | USI opval = ADDSI (FLD (f_offset), * FLD (i_abase)); | |
6910 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
6911 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
6912 | } | |
6913 | ||
6914 | SEM_BRANCH_FINI (vpc); | |
6915 | #undef FLD | |
6916 | } | |
6917 | NEXT (vpc); | |
6918 | ||
6919 | CASE (sem, INSN_BX_INDIRECT) : /* bx ($abase) */ | |
6920 | { | |
6921 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6922 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 6923 | #define FLD(f) abuf->fields.sfmt_stq_indirect_offset.f |
c906108c SS |
6924 | int UNUSED written = 0; |
6925 | IADDR UNUSED pc = abuf->addr; | |
6926 | SEM_BRANCH_INIT | |
6927 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6928 | ||
6929 | { | |
6930 | USI opval = * FLD (i_abase); | |
6931 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
6932 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
6933 | } | |
6934 | ||
6935 | SEM_BRANCH_FINI (vpc); | |
6936 | #undef FLD | |
6937 | } | |
6938 | NEXT (vpc); | |
6939 | ||
6940 | CASE (sem, INSN_BX_INDIRECT_INDEX) : /* bx ($abase)[$index*S$scale] */ | |
6941 | { | |
6942 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6943 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 6944 | #define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f |
c906108c SS |
6945 | int UNUSED written = 0; |
6946 | IADDR UNUSED pc = abuf->addr; | |
6947 | SEM_BRANCH_INIT | |
6948 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
6949 | ||
6950 | { | |
6951 | USI opval = ADDSI (* FLD (i_abase), MULSI (* FLD (i_index), SLLSI (1, FLD (f_scale)))); | |
6952 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
6953 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
6954 | } | |
6955 | ||
6956 | SEM_BRANCH_FINI (vpc); | |
6957 | #undef FLD | |
6958 | } | |
6959 | NEXT (vpc); | |
6960 | ||
6961 | CASE (sem, INSN_BX_DISP) : /* bx $optdisp */ | |
6962 | { | |
6963 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6964 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 6965 | #define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f |
c906108c SS |
6966 | int UNUSED written = 0; |
6967 | IADDR UNUSED pc = abuf->addr; | |
6968 | SEM_BRANCH_INIT | |
6969 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
6970 | ||
6971 | { | |
6972 | USI opval = FLD (f_optdisp); | |
96baa820 | 6973 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
6974 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); |
6975 | } | |
6976 | ||
6977 | SEM_BRANCH_FINI (vpc); | |
6978 | #undef FLD | |
6979 | } | |
6980 | NEXT (vpc); | |
6981 | ||
6982 | CASE (sem, INSN_BX_INDIRECT_DISP) : /* bx $optdisp($abase) */ | |
6983 | { | |
6984 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
6985 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 6986 | #define FLD(f) abuf->fields.sfmt_stq_indirect_index_disp.f |
c906108c SS |
6987 | int UNUSED written = 0; |
6988 | IADDR UNUSED pc = abuf->addr; | |
6989 | SEM_BRANCH_INIT | |
6990 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
6991 | ||
6992 | { | |
6993 | USI opval = ADDSI (FLD (f_optdisp), * FLD (i_abase)); | |
6994 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
6995 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
6996 | } | |
6997 | ||
6998 | SEM_BRANCH_FINI (vpc); | |
6999 | #undef FLD | |
7000 | } | |
7001 | NEXT (vpc); | |
7002 | ||
7003 | CASE (sem, INSN_CALLX_DISP) : /* callx $optdisp */ | |
7004 | { | |
7005 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
7006 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 7007 | #define FLD(f) abuf->fields.sfmt_callx_disp.f |
c906108c SS |
7008 | int UNUSED written = 0; |
7009 | IADDR UNUSED pc = abuf->addr; | |
7010 | SEM_BRANCH_INIT | |
7011 | vpc = SEM_NEXT_VPC (sem_arg, pc, 8); | |
7012 | ||
7a292a7a | 7013 | { |
c906108c SS |
7014 | SI tmp_temp; |
7015 | tmp_temp = ANDSI (ADDSI (CPU (h_gr[((UINT) 1)]), 63), INVSI (63)); | |
7016 | { | |
7017 | SI opval = ADDSI (pc, 8); | |
7018 | CPU (h_gr[((UINT) 2)]) = opval; | |
7019 | TRACE_RESULT (current_cpu, abuf, "gr-2", 'x', opval); | |
7020 | } | |
7021 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 0), CPU (h_gr[((UINT) 0)])); | |
7022 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 4), CPU (h_gr[((UINT) 1)])); | |
7023 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 8), CPU (h_gr[((UINT) 2)])); | |
7024 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 12), CPU (h_gr[((UINT) 3)])); | |
7025 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 16), CPU (h_gr[((UINT) 4)])); | |
7026 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 20), CPU (h_gr[((UINT) 5)])); | |
7027 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 24), CPU (h_gr[((UINT) 6)])); | |
7028 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 28), CPU (h_gr[((UINT) 7)])); | |
7029 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 32), CPU (h_gr[((UINT) 8)])); | |
7030 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 36), CPU (h_gr[((UINT) 9)])); | |
7031 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 40), CPU (h_gr[((UINT) 10)])); | |
7032 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 44), CPU (h_gr[((UINT) 11)])); | |
7033 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 48), CPU (h_gr[((UINT) 12)])); | |
7034 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 52), CPU (h_gr[((UINT) 13)])); | |
7035 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 56), CPU (h_gr[((UINT) 14)])); | |
7036 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 60), CPU (h_gr[((UINT) 15)])); | |
7037 | { | |
7038 | USI opval = FLD (f_optdisp); | |
96baa820 | 7039 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); |
c906108c SS |
7040 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); |
7041 | } | |
7042 | CPU (h_gr[((UINT) 0)]) = 0xdeadbeef; | |
7043 | CPU (h_gr[((UINT) 1)]) = 0xdeadbeef; | |
7044 | CPU (h_gr[((UINT) 2)]) = 0xdeadbeef; | |
7045 | CPU (h_gr[((UINT) 3)]) = 0xdeadbeef; | |
7046 | CPU (h_gr[((UINT) 4)]) = 0xdeadbeef; | |
7047 | CPU (h_gr[((UINT) 5)]) = 0xdeadbeef; | |
7048 | CPU (h_gr[((UINT) 6)]) = 0xdeadbeef; | |
7049 | CPU (h_gr[((UINT) 7)]) = 0xdeadbeef; | |
7050 | CPU (h_gr[((UINT) 8)]) = 0xdeadbeef; | |
7051 | CPU (h_gr[((UINT) 9)]) = 0xdeadbeef; | |
7052 | CPU (h_gr[((UINT) 10)]) = 0xdeadbeef; | |
7053 | CPU (h_gr[((UINT) 11)]) = 0xdeadbeef; | |
7054 | CPU (h_gr[((UINT) 12)]) = 0xdeadbeef; | |
7055 | CPU (h_gr[((UINT) 13)]) = 0xdeadbeef; | |
7056 | CPU (h_gr[((UINT) 14)]) = 0xdeadbeef; | |
7057 | CPU (h_gr[((UINT) 15)]) = 0xdeadbeef; | |
7058 | { | |
7059 | SI opval = CPU (h_gr[((UINT) 31)]); | |
7060 | CPU (h_gr[((UINT) 0)]) = opval; | |
7061 | TRACE_RESULT (current_cpu, abuf, "gr-0", 'x', opval); | |
7062 | } | |
7063 | { | |
7064 | SI opval = tmp_temp; | |
7065 | CPU (h_gr[((UINT) 31)]) = opval; | |
7066 | TRACE_RESULT (current_cpu, abuf, "gr-31", 'x', opval); | |
7067 | } | |
7068 | { | |
7069 | SI opval = ADDSI (tmp_temp, 64); | |
7070 | CPU (h_gr[((UINT) 1)]) = opval; | |
7071 | TRACE_RESULT (current_cpu, abuf, "gr-1", 'x', opval); | |
7072 | } | |
7a292a7a | 7073 | } |
c906108c SS |
7074 | |
7075 | SEM_BRANCH_FINI (vpc); | |
7076 | #undef FLD | |
7077 | } | |
7078 | NEXT (vpc); | |
7079 | ||
7080 | CASE (sem, INSN_CALLX_INDIRECT) : /* callx ($abase) */ | |
7081 | { | |
7082 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
7083 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 7084 | #define FLD(f) abuf->fields.sfmt_callx_indirect_offset.f |
c906108c SS |
7085 | int UNUSED written = 0; |
7086 | IADDR UNUSED pc = abuf->addr; | |
7087 | SEM_BRANCH_INIT | |
7088 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
7089 | ||
7a292a7a | 7090 | { |
c906108c SS |
7091 | SI tmp_temp; |
7092 | tmp_temp = ANDSI (ADDSI (CPU (h_gr[((UINT) 1)]), 63), INVSI (63)); | |
7093 | { | |
7094 | SI opval = ADDSI (pc, 4); | |
7095 | CPU (h_gr[((UINT) 2)]) = opval; | |
7096 | TRACE_RESULT (current_cpu, abuf, "gr-2", 'x', opval); | |
7097 | } | |
7098 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 0), CPU (h_gr[((UINT) 0)])); | |
7099 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 4), CPU (h_gr[((UINT) 1)])); | |
7100 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 8), CPU (h_gr[((UINT) 2)])); | |
7101 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 12), CPU (h_gr[((UINT) 3)])); | |
7102 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 16), CPU (h_gr[((UINT) 4)])); | |
7103 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 20), CPU (h_gr[((UINT) 5)])); | |
7104 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 24), CPU (h_gr[((UINT) 6)])); | |
7105 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 28), CPU (h_gr[((UINT) 7)])); | |
7106 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 32), CPU (h_gr[((UINT) 8)])); | |
7107 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 36), CPU (h_gr[((UINT) 9)])); | |
7108 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 40), CPU (h_gr[((UINT) 10)])); | |
7109 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 44), CPU (h_gr[((UINT) 11)])); | |
7110 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 48), CPU (h_gr[((UINT) 12)])); | |
7111 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 52), CPU (h_gr[((UINT) 13)])); | |
7112 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 56), CPU (h_gr[((UINT) 14)])); | |
7113 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 60), CPU (h_gr[((UINT) 15)])); | |
7114 | { | |
7115 | USI opval = * FLD (i_abase); | |
7116 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
7117 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
7118 | } | |
7119 | CPU (h_gr[((UINT) 0)]) = 0xdeadbeef; | |
7120 | CPU (h_gr[((UINT) 1)]) = 0xdeadbeef; | |
7121 | CPU (h_gr[((UINT) 2)]) = 0xdeadbeef; | |
7122 | CPU (h_gr[((UINT) 3)]) = 0xdeadbeef; | |
7123 | CPU (h_gr[((UINT) 4)]) = 0xdeadbeef; | |
7124 | CPU (h_gr[((UINT) 5)]) = 0xdeadbeef; | |
7125 | CPU (h_gr[((UINT) 6)]) = 0xdeadbeef; | |
7126 | CPU (h_gr[((UINT) 7)]) = 0xdeadbeef; | |
7127 | CPU (h_gr[((UINT) 8)]) = 0xdeadbeef; | |
7128 | CPU (h_gr[((UINT) 9)]) = 0xdeadbeef; | |
7129 | CPU (h_gr[((UINT) 10)]) = 0xdeadbeef; | |
7130 | CPU (h_gr[((UINT) 11)]) = 0xdeadbeef; | |
7131 | CPU (h_gr[((UINT) 12)]) = 0xdeadbeef; | |
7132 | CPU (h_gr[((UINT) 13)]) = 0xdeadbeef; | |
7133 | CPU (h_gr[((UINT) 14)]) = 0xdeadbeef; | |
7134 | CPU (h_gr[((UINT) 15)]) = 0xdeadbeef; | |
7135 | { | |
7136 | SI opval = CPU (h_gr[((UINT) 31)]); | |
7137 | CPU (h_gr[((UINT) 0)]) = opval; | |
7138 | TRACE_RESULT (current_cpu, abuf, "gr-0", 'x', opval); | |
7139 | } | |
7140 | { | |
7141 | SI opval = tmp_temp; | |
7142 | CPU (h_gr[((UINT) 31)]) = opval; | |
7143 | TRACE_RESULT (current_cpu, abuf, "gr-31", 'x', opval); | |
7144 | } | |
7145 | { | |
7146 | SI opval = ADDSI (tmp_temp, 64); | |
7147 | CPU (h_gr[((UINT) 1)]) = opval; | |
7148 | TRACE_RESULT (current_cpu, abuf, "gr-1", 'x', opval); | |
7149 | } | |
7a292a7a | 7150 | } |
c906108c SS |
7151 | |
7152 | SEM_BRANCH_FINI (vpc); | |
7153 | #undef FLD | |
7154 | } | |
7155 | NEXT (vpc); | |
7156 | ||
7157 | CASE (sem, INSN_CALLX_INDIRECT_OFFSET) : /* callx $offset($abase) */ | |
7158 | { | |
7159 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
7160 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 7161 | #define FLD(f) abuf->fields.sfmt_callx_indirect_offset.f |
c906108c SS |
7162 | int UNUSED written = 0; |
7163 | IADDR UNUSED pc = abuf->addr; | |
7164 | SEM_BRANCH_INIT | |
7165 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
7166 | ||
7a292a7a | 7167 | { |
c906108c SS |
7168 | SI tmp_temp; |
7169 | tmp_temp = ANDSI (ADDSI (CPU (h_gr[((UINT) 1)]), 63), INVSI (63)); | |
7170 | { | |
7171 | SI opval = ADDSI (pc, 4); | |
7172 | CPU (h_gr[((UINT) 2)]) = opval; | |
7173 | TRACE_RESULT (current_cpu, abuf, "gr-2", 'x', opval); | |
7174 | } | |
7175 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 0), CPU (h_gr[((UINT) 0)])); | |
7176 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 4), CPU (h_gr[((UINT) 1)])); | |
7177 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 8), CPU (h_gr[((UINT) 2)])); | |
7178 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 12), CPU (h_gr[((UINT) 3)])); | |
7179 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 16), CPU (h_gr[((UINT) 4)])); | |
7180 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 20), CPU (h_gr[((UINT) 5)])); | |
7181 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 24), CPU (h_gr[((UINT) 6)])); | |
7182 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 28), CPU (h_gr[((UINT) 7)])); | |
7183 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 32), CPU (h_gr[((UINT) 8)])); | |
7184 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 36), CPU (h_gr[((UINT) 9)])); | |
7185 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 40), CPU (h_gr[((UINT) 10)])); | |
7186 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 44), CPU (h_gr[((UINT) 11)])); | |
7187 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 48), CPU (h_gr[((UINT) 12)])); | |
7188 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 52), CPU (h_gr[((UINT) 13)])); | |
7189 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 56), CPU (h_gr[((UINT) 14)])); | |
7190 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 60), CPU (h_gr[((UINT) 15)])); | |
7191 | { | |
7192 | USI opval = ADDSI (FLD (f_offset), * FLD (i_abase)); | |
7193 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
7194 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
7195 | } | |
7196 | CPU (h_gr[((UINT) 0)]) = 0xdeadbeef; | |
7197 | CPU (h_gr[((UINT) 1)]) = 0xdeadbeef; | |
7198 | CPU (h_gr[((UINT) 2)]) = 0xdeadbeef; | |
7199 | CPU (h_gr[((UINT) 3)]) = 0xdeadbeef; | |
7200 | CPU (h_gr[((UINT) 4)]) = 0xdeadbeef; | |
7201 | CPU (h_gr[((UINT) 5)]) = 0xdeadbeef; | |
7202 | CPU (h_gr[((UINT) 6)]) = 0xdeadbeef; | |
7203 | CPU (h_gr[((UINT) 7)]) = 0xdeadbeef; | |
7204 | CPU (h_gr[((UINT) 8)]) = 0xdeadbeef; | |
7205 | CPU (h_gr[((UINT) 9)]) = 0xdeadbeef; | |
7206 | CPU (h_gr[((UINT) 10)]) = 0xdeadbeef; | |
7207 | CPU (h_gr[((UINT) 11)]) = 0xdeadbeef; | |
7208 | CPU (h_gr[((UINT) 12)]) = 0xdeadbeef; | |
7209 | CPU (h_gr[((UINT) 13)]) = 0xdeadbeef; | |
7210 | CPU (h_gr[((UINT) 14)]) = 0xdeadbeef; | |
7211 | CPU (h_gr[((UINT) 15)]) = 0xdeadbeef; | |
7212 | { | |
7213 | SI opval = CPU (h_gr[((UINT) 31)]); | |
7214 | CPU (h_gr[((UINT) 0)]) = opval; | |
7215 | TRACE_RESULT (current_cpu, abuf, "gr-0", 'x', opval); | |
7216 | } | |
7217 | { | |
7218 | SI opval = tmp_temp; | |
7219 | CPU (h_gr[((UINT) 31)]) = opval; | |
7220 | TRACE_RESULT (current_cpu, abuf, "gr-31", 'x', opval); | |
7221 | } | |
7222 | { | |
7223 | SI opval = ADDSI (tmp_temp, 64); | |
7224 | CPU (h_gr[((UINT) 1)]) = opval; | |
7225 | TRACE_RESULT (current_cpu, abuf, "gr-1", 'x', opval); | |
7226 | } | |
7a292a7a | 7227 | } |
c906108c SS |
7228 | |
7229 | SEM_BRANCH_FINI (vpc); | |
7230 | #undef FLD | |
7231 | } | |
7232 | NEXT (vpc); | |
7233 | ||
7234 | CASE (sem, INSN_RET) : /* ret */ | |
7235 | { | |
7236 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
7237 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 7238 | #define FLD(f) abuf->fields.sfmt_callx_disp.f |
c906108c SS |
7239 | int UNUSED written = 0; |
7240 | IADDR UNUSED pc = abuf->addr; | |
7241 | SEM_BRANCH_INIT | |
7242 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
7243 | ||
7a292a7a | 7244 | { |
c906108c SS |
7245 | { |
7246 | SI opval = CPU (h_gr[((UINT) 0)]); | |
7247 | CPU (h_gr[((UINT) 31)]) = opval; | |
7248 | TRACE_RESULT (current_cpu, abuf, "gr-31", 'x', opval); | |
7249 | } | |
7250 | CPU (h_gr[((UINT) 0)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 0)); | |
7251 | CPU (h_gr[((UINT) 1)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 4)); | |
7252 | CPU (h_gr[((UINT) 2)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 8)); | |
7253 | CPU (h_gr[((UINT) 3)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 12)); | |
7254 | CPU (h_gr[((UINT) 4)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 16)); | |
7255 | CPU (h_gr[((UINT) 5)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 20)); | |
7256 | CPU (h_gr[((UINT) 6)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 24)); | |
7257 | CPU (h_gr[((UINT) 7)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 28)); | |
7258 | CPU (h_gr[((UINT) 8)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 32)); | |
7259 | CPU (h_gr[((UINT) 9)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 36)); | |
7260 | CPU (h_gr[((UINT) 10)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 40)); | |
7261 | CPU (h_gr[((UINT) 11)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 44)); | |
7262 | CPU (h_gr[((UINT) 12)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 48)); | |
7263 | CPU (h_gr[((UINT) 13)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 52)); | |
7264 | CPU (h_gr[((UINT) 14)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 56)); | |
7265 | CPU (h_gr[((UINT) 15)]) = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[((UINT) 31)]), 60)); | |
7266 | { | |
7267 | USI opval = CPU (h_gr[((UINT) 2)]); | |
7268 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
7269 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
7270 | } | |
7a292a7a | 7271 | } |
c906108c SS |
7272 | |
7273 | SEM_BRANCH_FINI (vpc); | |
7274 | #undef FLD | |
7275 | } | |
7276 | NEXT (vpc); | |
7277 | ||
7278 | CASE (sem, INSN_CALLS) : /* calls $src1 */ | |
7279 | { | |
7280 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
7281 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 7282 | #define FLD(f) abuf->fields.sfmt_emul2.f |
c906108c SS |
7283 | int UNUSED written = 0; |
7284 | IADDR UNUSED pc = abuf->addr; | |
7285 | SEM_BRANCH_INIT | |
7286 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
7287 | ||
7288 | { | |
7289 | SI opval = i960_trap (current_cpu, pc, * FLD (i_src1)); | |
7290 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
7291 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
7292 | } | |
7293 | ||
7294 | SEM_BRANCH_FINI (vpc); | |
7295 | #undef FLD | |
7296 | } | |
7297 | NEXT (vpc); | |
7298 | ||
7299 | CASE (sem, INSN_FMARK) : /* fmark */ | |
7300 | { | |
7301 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
7302 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 7303 | #define FLD(f) abuf->fields.fmt_empty.f |
c906108c SS |
7304 | int UNUSED written = 0; |
7305 | IADDR UNUSED pc = abuf->addr; | |
7306 | SEM_BRANCH_INIT | |
7307 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
7308 | ||
7309 | { | |
7310 | SI opval = i960_breakpoint (current_cpu, pc); | |
7311 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
7312 | TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); | |
7313 | } | |
7314 | ||
7315 | SEM_BRANCH_FINI (vpc); | |
7316 | #undef FLD | |
7317 | } | |
7318 | NEXT (vpc); | |
7319 | ||
7320 | CASE (sem, INSN_FLUSHREG) : /* flushreg */ | |
7321 | { | |
7322 | SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); | |
7323 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
96baa820 | 7324 | #define FLD(f) abuf->fields.fmt_empty.f |
c906108c SS |
7325 | int UNUSED written = 0; |
7326 | IADDR UNUSED pc = abuf->addr; | |
7327 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
7328 | ||
7329 | do { } while (0); /*nop*/ | |
7330 | ||
7331 | #undef FLD | |
7332 | } | |
7333 | NEXT (vpc); | |
7334 | ||
7335 | ||
7336 | } | |
7337 | ENDSWITCH (sem) /* End of semantic switch. */ | |
7338 | ||
7339 | /* At this point `vpc' contains the next insn to execute. */ | |
7340 | } | |
7341 | ||
7342 | #undef DEFINE_SWITCH | |
7343 | #endif /* DEFINE_SWITCH */ |