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2f2e6c5d AC |
1 | /* This file is part of the program psim. |
2 | ||
278bda40 | 3 | Copyright (C) 1994-1998, Andrew Cagney <cagney@highland.com.au> |
2f2e6c5d AC |
4 | |
5 | This program is free software; you can redistribute it and/or modify | |
6 | it under the terms of the GNU General Public License as published by | |
7 | the Free Software Foundation; either version 2 of the License, or | |
8 | (at your option) any later version. | |
9 | ||
10 | This program is distributed in the hope that it will be useful, | |
11 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
13 | GNU General Public License for more details. | |
14 | ||
15 | You should have received a copy of the GNU General Public License | |
16 | along with this program; if not, write to the Free Software | |
17 | Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. | |
18 | ||
19 | */ | |
20 | ||
8782bfcf | 21 | /* code-generation options: */ |
2f2e6c5d AC |
22 | |
23 | typedef enum { | |
24 | ||
25 | /* Transfer control to an instructions semantic code using the the | |
26 | standard call/return mechanism */ | |
27 | ||
8782bfcf | 28 | generate_calls, |
2f2e6c5d AC |
29 | |
30 | /* Transfer control to an instructions semantic code using | |
31 | (computed) goto's instead of the more conventional call/return | |
32 | mechanism */ | |
33 | ||
8782bfcf | 34 | generate_jumps, |
2f2e6c5d AC |
35 | |
36 | } igen_code; | |
37 | ||
8782bfcf AC |
38 | typedef enum { |
39 | nia_is_cia_plus_one, | |
40 | nia_is_void, | |
41 | nia_is_invalid, | |
42 | } igen_nia; | |
2f2e6c5d | 43 | |
2f2e6c5d AC |
44 | |
45 | ||
8782bfcf AC |
46 | typedef struct _igen_gen_options igen_gen_options; |
47 | struct _igen_gen_options { | |
48 | int direct_access; | |
49 | int semantic_icache; | |
50 | int insn_in_icache; | |
51 | int conditional_issue; | |
52 | int slot_verification; | |
53 | int delayed_branch; | |
2f2e6c5d | 54 | |
8782bfcf AC |
55 | /* If zeroing a register, which one? */ |
56 | int zero_reg; | |
57 | int zero_reg_nr; | |
2f2e6c5d | 58 | |
8782bfcf AC |
59 | /* should multiple simulators be generated? */ |
60 | int multi_sim; | |
2f2e6c5d | 61 | |
278bda40 AC |
62 | /* name of the default multi-sim model */ |
63 | char *default_model; | |
64 | ||
8782bfcf AC |
65 | /* should the simulator support multi word instructions and if so, |
66 | what is the max nr of words. */ | |
67 | int multi_word; | |
2f2e6c5d | 68 | |
8782bfcf AC |
69 | /* SMP? Should the generated code include SMP support (>0) and if |
70 | so, for how many processors? */ | |
71 | int smp; | |
2f2e6c5d | 72 | |
8782bfcf AC |
73 | /* how should the next instruction address be computed? */ |
74 | igen_nia nia; | |
2f2e6c5d | 75 | |
8782bfcf AC |
76 | /* nr of instructions in the decoded instruction cache */ |
77 | int icache; | |
78 | int icache_size; | |
2f2e6c5d | 79 | |
8782bfcf AC |
80 | /* see above */ |
81 | igen_code code; | |
82 | }; | |
2f2e6c5d AC |
83 | |
84 | ||
8782bfcf AC |
85 | typedef struct _igen_trace_options igen_trace_options; |
86 | struct _igen_trace_options { | |
87 | int rule_selection; | |
88 | int rule_rejection; | |
346a3d6c AC |
89 | int insn_insertion; |
90 | int insn_expansion; | |
8782bfcf AC |
91 | int entries; |
92 | int combine; | |
93 | }; | |
2f2e6c5d | 94 | |
278bda40 AC |
95 | typedef struct _igen_name { |
96 | char *u; | |
97 | char *l; | |
98 | } igen_name; | |
99 | typedef struct _igen_module { | |
100 | igen_name prefix; | |
101 | igen_name suffix; | |
102 | } igen_module; | |
103 | ||
104 | typedef struct _igen_module_options { | |
105 | igen_module global; | |
106 | igen_module engine; | |
107 | igen_module icache; | |
108 | igen_module idecode; | |
109 | igen_module itable; | |
110 | igen_module semantics; | |
111 | igen_module support; | |
112 | } igen_module_options; | |
8782bfcf AC |
113 | |
114 | typedef struct _igen_decode_options igen_decode_options ; | |
115 | struct _igen_decode_options { | |
116 | ||
117 | /* Combine tables? Should the generator make a second pass through | |
118 | each generated table looking for any sub-entries that contain the | |
119 | same instructions. Those entries being merged into a single | |
120 | table */ | |
121 | int combine; | |
122 | ||
123 | /* Instruction expansion? Should the semantic code for each | |
124 | instruction, when the oportunity arrises, be expanded according | |
125 | to the variable opcode files that the instruction decode process | |
126 | renders constant */ | |
127 | int duplicate; | |
128 | ||
129 | /* Treat reserved fields as constant (zero) instead of ignoring | |
130 | their value when determining decode tables */ | |
131 | int zero_reserved; | |
132 | ||
133 | /* Convert any padded switch rules into goto_switch */ | |
134 | int switch_as_goto; | |
135 | ||
136 | /* Force all tables to be generated with this lookup mechanism */ | |
137 | char *overriding_gen; | |
138 | }; | |
2f2e6c5d AC |
139 | |
140 | ||
8782bfcf AC |
141 | typedef struct _igen_warn_options igen_warn_options; |
142 | struct _igen_warn_options { | |
278bda40 AC |
143 | |
144 | /* Issue warning about discarded instructions */ | |
8782bfcf | 145 | int discard; |
278bda40 AC |
146 | |
147 | /* Issue warning about invalid instruction widths */ | |
148 | int width; | |
8782bfcf | 149 | }; |
2f2e6c5d | 150 | |
2f2e6c5d | 151 | |
278bda40 | 152 | |
8782bfcf AC |
153 | typedef struct _igen_options igen_options; |
154 | struct _igen_options { | |
2f2e6c5d | 155 | |
8782bfcf AC |
156 | /* What does the instruction look like - bit ordering, size, widths or |
157 | offesets */ | |
158 | int hi_bit_nr; | |
159 | int insn_bit_size; | |
160 | int insn_specifying_widths; | |
2f2e6c5d | 161 | |
8782bfcf | 162 | /* what should global names be prefixed with? */ |
278bda40 | 163 | igen_module_options module; |
2f2e6c5d | 164 | |
8782bfcf AC |
165 | /* See above for options and flags */ |
166 | igen_gen_options gen; | |
2f2e6c5d | 167 | |
8782bfcf AC |
168 | /* See above for trace options */ |
169 | igen_trace_options trace; | |
2f2e6c5d | 170 | |
278bda40 AC |
171 | /* See above for include options */ |
172 | table_include *include; | |
173 | ||
8782bfcf AC |
174 | /* See above for decode options */ |
175 | igen_decode_options decode; | |
2f2e6c5d | 176 | |
8782bfcf AC |
177 | /* Filter set to be used on the flag field of the instruction table */ |
178 | filter *flags_filter; | |
2f2e6c5d | 179 | |
8782bfcf AC |
180 | /* See above for warn options */ |
181 | igen_warn_options warn; | |
2f2e6c5d | 182 | |
8782bfcf AC |
183 | /* Be more picky about the input */ |
184 | error_func (*warning); | |
2f2e6c5d | 185 | |
8782bfcf AC |
186 | /* Model (processor) set - like flags_filter. Used to select the |
187 | specific ISA within a processor family. */ | |
188 | filter *model_filter; | |
2f2e6c5d | 189 | |
8782bfcf AC |
190 | /* Format name set */ |
191 | filter *format_name_filter; | |
192 | }; | |
2f2e6c5d | 193 | |
8782bfcf AC |
194 | extern igen_options options; |
195 | ||
196 | /* default options - hopefully backward compatible */ \ | |
278bda40 | 197 | #define INIT_OPTIONS() \ |
8782bfcf | 198 | do { \ |
278bda40 AC |
199 | memset (&options, 0, sizeof options); \ |
200 | memset (&options.warn, -1, sizeof (options.warn)); \ | |
201 | options.hi_bit_nr = 0; \ | |
202 | options.insn_bit_size = default_insn_bit_size; \ | |
203 | options.insn_specifying_widths = 0; \ | |
204 | options.module.global.prefix.u = ""; \ | |
205 | options.module.global.prefix.l = ""; \ | |
206 | /* the prefixes */ \ | |
207 | options.module.engine = options.module.global; \ | |
208 | options.module.icache = options.module.global; \ | |
209 | options.module.idecode = options.module.global; \ | |
210 | options.module.itable = options.module.global; \ | |
211 | options.module.semantics = options.module.global; \ | |
212 | options.module.support = options.module.global; \ | |
213 | /* the suffixes */ \ | |
214 | options.module.engine.suffix.l = "engine"; \ | |
215 | options.module.engine.suffix.u = "ENGINE"; \ | |
216 | options.module.icache.suffix.l = "icache"; \ | |
217 | options.module.icache.suffix.u = "ICACHE"; \ | |
218 | options.module.idecode.suffix.l = "idecode"; \ | |
219 | options.module.idecode.suffix.u = "IDECODE"; \ | |
220 | options.module.itable.suffix.l = "itable"; \ | |
221 | options.module.itable.suffix.u = "ITABLE"; \ | |
222 | options.module.semantics.suffix.l = "semantics"; \ | |
223 | options.module.semantics.suffix.u = "SEMANTICS"; \ | |
224 | options.module.support.suffix.l = "support"; \ | |
225 | options.module.support.suffix.u = "SUPPORT"; \ | |
226 | /* misc stuff */ \ | |
227 | options.gen.code = generate_calls; \ | |
228 | options.gen.icache_size = 1024; \ | |
229 | options.warning = warning; \ | |
8782bfcf | 230 | } while (0) |