Commit | Line | Data |
---|---|---|
d436cab7 DE |
1 | 2010-01-01 Doug Evans <dje@sebabeach.org> |
2 | ||
f9b98caf | 3 | * mloop.in: Fix copyright year update snafu. |
d436cab7 | 4 | |
197fa1aa DE |
5 | 2009-11-22 Doug Evans <dje@sebabeach.org> |
6 | ||
7 | * cpu.h: Regenerate. | |
8 | * cpuall.h: Regenerate. | |
9 | * decode.c: Regenerate. | |
10 | * decode.h: Regenerate. | |
11 | ||
1a5691a5 DE |
12 | 2009-11-03 Doug Evans <dje@sebabeach.org> |
13 | ||
14 | * arch.c: Regenerate. | |
15 | * arch.h: Regenerate. | |
16 | * cpu.c: Regenerate. | |
17 | * cpu.h: Regenerate. | |
18 | * cpuall.h: Regenerate. | |
19 | * decode.c: Regenerate. | |
20 | * decode.h: Regenerate. | |
21 | * model.c: Regenerate. | |
22 | * sem-switch.c: Regenerate. | |
23 | * sem.c: Regenerate. | |
24 | ||
d6416cdc RW |
25 | 2009-08-22 Ralf Wildenhues <Ralf.Wildenhues@gmx.de> |
26 | ||
81ecdfbb RW |
27 | * config.in: Regenerate. |
28 | * configure: Likewise. | |
29 | ||
d6416cdc RW |
30 | * configure: Regenerate. |
31 | ||
6a8b8615 DE |
32 | 2009-07-12 Doug Evans <dje@sebabeach.org> |
33 | ||
34 | * Makefile.in (stamp-arch): Use $(CPU_DIR) instead of $(CGEN_CPU_DIR). | |
35 | (stamp-cpu): Ditto. | |
36 | ||
8065377a DE |
37 | 2009-07-07 Doug Evans <dje@sebabeach.org> |
38 | ||
39 | * Makefile.in (stamp-arch): Pass archfile to cgen-arch. | |
40 | (stamp-cpu): Pass archfile to cgen-cpu-decode. | |
41 | ||
b5bd9624 HPN |
42 | 2008-07-11 Hans-Peter Nilsson <hp@axis.com> |
43 | ||
44 | * configure: Regenerate to track ../common/common.m4 changes. | |
45 | * config.in: Ditto. | |
46 | ||
6efef468 JM |
47 | 2008-06-06 Vladimir Prus <vladimir@codesourcery.com> |
48 | Daniel Jacobowitz <dan@codesourcery.com> | |
49 | Joseph Myers <joseph@codesourcery.com> | |
50 | ||
51 | * configure: Regenerate. | |
52 | ||
edc5d9ec HPN |
53 | 2006-12-21 Hans-Peter Nilsson <hp@axis.com> |
54 | ||
55 | * acconfig.h: Remove. | |
56 | * config.in: Regenerate. | |
57 | ||
e85e3205 RE |
58 | 2006-06-13 Richard Earnshaw <rearnsha@arm.com> |
59 | ||
60 | * configure: Regenerated. | |
61 | ||
2f0122dc DJ |
62 | 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com> |
63 | ||
64 | * configure: Regenerated. | |
65 | ||
20e95c23 DJ |
66 | 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com> |
67 | ||
68 | * configure: Regenerated. | |
69 | ||
2b193c4a MK |
70 | 2005-03-23 Mark Kettenis <kettenis@gnu.org> |
71 | ||
72 | * configure: Regenerate. | |
73 | ||
edece237 CV |
74 | 2005-02-21 Corinna Vinschen <vinschen@redhat.com> |
75 | ||
76 | * iq2000.c: Eliminate need to include gdb/sim-iq2000.h. | |
77 | ||
78 | 2005-02-18 Corinna Vinschen <vinschen@redhat.com> | |
79 | ||
80 | * configure.ac: Rename from configure.in and pull up to autoconf 2.59. | |
81 | * configure: Regenerate. | |
82 | ||
83 | 2002-03-18 Jeff Johnston <jjohnstn@redhat.com> | |
84 | ||
85 | * sem-switch.c: Regenerated. | |
86 | * sem.c: Ditto. | |
87 | ||
88 | 2002-01-28 Jeff Johnston <jjohnstn@redhat.com> | |
89 | ||
90 | * arch.c: Regenerated. | |
91 | * arch.h: Ditto. | |
92 | * cpu.c: Ditto. | |
93 | * cpu.h: Ditto. | |
94 | * cpuall.h: Ditto. | |
95 | * decode.c: Ditto. | |
96 | * decode.h: Ditto. | |
97 | * model.c: Ditto. | |
98 | * sem-switch.c: Ditto. | |
99 | * sem.c: Ditto. | |
100 | ||
101 | 2001-11-16 Jeff Johnston <jjohnstn@redhat.com> | |
102 | ||
103 | * decode.c: Regenerated after putting orui into machine-specific | |
104 | files. | |
105 | * decode.h: Ditto. | |
106 | * model.c: Ditto. | |
107 | * sem-switch.c: Ditto. | |
108 | * sem.c: Ditto. | |
109 | ||
110 | 2001-11-13 Jeff Johnston <jjohnstn@redhat.com> | |
111 | ||
112 | * cpu.h: Regenerated after changing jump and branch operands | |
113 | so that no bit masking is performed. | |
114 | * decode.c: Ditto. | |
115 | * iq2000.c (get_h_pc): Change to return h_pc directly. | |
116 | (set_h_pc): Change to always set the insn mask bit. | |
117 | * sim-if.c (iq2000bf_disassemble_insn): Change to pass the | |
118 | pc untouched. | |
119 | (sim_create_inferior): Changed so starting address is taken | |
120 | directly from link. If not specified, start address is | |
121 | 0 with insn mask set on. | |
122 | ||
123 | 2001-11-08 Jeff Johnston <jjohnstn@redhat.com> | |
124 | ||
125 | * cpu.h: Regenerated after making jump operand UINT. | |
126 | * decode.c: Ditto. | |
127 | ||
128 | 2001-10-31 Jeff Johnston <jjohnstn@redhat.com> | |
129 | ||
130 | * sem-switch.c: Regenerated after fixing lb, lbu, lh, lw, | |
131 | sb, sh, and sw insns handling of offset operand. | |
132 | * sem.c: Ditto. | |
133 | ||
134 | 2001-10-30 Jeff Johnston <jjohnstn@redhat.com> | |
135 | ||
136 | * cpu.c: Regenerated. | |
137 | * cpu.h: Ditto. | |
138 | * decode.c: Ditto. | |
139 | * sem-switch.c: Ditto. | |
140 | * sem.c: Ditto. | |
141 | * iq2000.c (get_h_pc): New routine. | |
142 | (set_h_pc): Ditto. | |
143 | (fetch_str): Translate cpu data addresses to data area. | |
144 | (do_syscall): Ditto. | |
145 | (iq2000bf_fetch_register): Use get_h_pc. | |
146 | (iq2000bf_store_register): Use set_h_pc. | |
147 | * mloop.in: Change all calls to GETIMEMxxx to use CPU2INSN | |
148 | on the pc value passed first. | |
149 | * sim-if.c (iq2000bf_disassemble_insn): New function. | |
150 | (sim_open): Add extra memory region for insn memory vs data memory. | |
151 | Also change disassembler to be iq2000bf_disassemble_insn. | |
152 | (sim_create_inferior): Translate start address using INSN2CPU macro. | |
153 | * sim-main.h (CPU2INSN, CPU2DATA, INSN2CPU, DATA2CPU): New macros | |
154 | to translate between Harvard and cpu addresses. | |
155 | ||
156 | 2001-10-26 Jeff Johnston <jjohnstn@redhat.com> | |
157 | ||
158 | * sem-switch.c: Regenerated after reverting addiu | |
159 | change. | |
160 | * sem.c: Ditto. | |
161 | ||
162 | 2001-10-25 Jeff Johnston <jjohnstn@redhat.com> | |
163 | ||
164 | * Makefile.in: Add -UHAVE_CPU_IQ10 for time-being until | |
165 | iq10 simulator merged here. | |
166 | * cpu.h: Regenerated after fixing addiu insn. | |
167 | * cpuall.h: Ditto. | |
168 | * decode.c: Ditto. | |
169 | * decode.h: Ditto. | |
170 | * model.c: Ditto. | |
171 | * sem-switch.c: Ditto. | |
172 | * sem.c: Ditto. | |
173 | ||
174 | 2001-09-12 Stan Cox <scox@redhat.com> | |
175 | ||
176 | * iq2000/{cpu.c, cpu.h, decode.c, decode.h, model.c, sem-switch.c, | |
177 | sem.c}: Regen'd. | |
178 | * iq2000.c (do_syscall): Support system traps. | |
179 | ||
180 | 2001-07-05 Ben Elliston <bje@redhat.com> | |
181 | ||
182 | * Makefile.in (stamp-arch): Use $(CGEN_CPU_DIR). | |
183 | (stamp-cpu): Likewise. | |
184 | ||
185 | 2001-04-02 Ben Elliston <bje@redhat.com> | |
186 | ||
187 | * arch.c, arch.h: Regnerate to track recent cgen improvements. | |
188 | * cpu.c, cpu.h, cpuall.h, decode.c, decode.h: Likewise. | |
189 | * model.c, sem-switch.c, sem.c: Likewise. | |
190 | ||
191 | 2001-01-22 Ben Elliston <bje@redhat.com> | |
192 | ||
193 | * cpu.h, decode.c, decode.h, model.c: Regenerate. | |
194 | * sem.c, sem-switch.c: Likewise. | |
195 | ||
196 | * arch.c, arch.h, cpu.c, cpu.h, cpuall.h: Regenerate. | |
197 | * decode.c, decode.h, model.c, sem.c, sem-switch.c: Likewise. | |
198 | ||
199 | 2000-07-05 Ben Elliston <bje@redhat.com> | |
200 | ||
201 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
202 | ||
203 | 2000-07-04 Ben Elliston <bje@redhat.com> | |
204 | ||
205 | * sem.c, sem-switch.c: Regenerate. | |
206 | ||
207 | * iq2000.c (do_break): Use sim_engine_halt (). | |
208 | * arch.c, decode.c, decode.h, sem.c, sem-switch.c: Regenerate. | |
209 | ||
210 | 2000-07-03 Ben Elliston <bje@redhat.com> | |
211 | ||
212 | * iq2000.c (do_syscall): Examine syscall register (nominally %11). | |
213 | (do_break): Handle breakpoints. | |
214 | * tconfig.in (SIM_HAVE_BREAKPOINTS): Define. | |
215 | (SIM_BREAKPOINT, SIM_BREAKPOINT_SIZE): Likewise. | |
216 | ||
217 | 2000-06-29 Andrew Cagney <cagney@redhat.com> | |
218 | ||
219 | * iq2000.c (iq2000bf_fetch_register): Implement. | |
220 | (iq2000bf_store_register): Ditto. | |
221 | ||
222 | 2000-05-17 Ben Elliston <bje@redhat.com> | |
223 | ||
224 | * mloop.in (extract-simple, extract-scache): Use SEM_SKIP_COMPILE | |
225 | to set the skip count for the (skip ..) rtx. | |
226 | (extract-pbb): Likewise. | |
227 | (extract-pbb): Include the delay slot instruction of all CTI | |
228 | instructions in the pbb, not just those that may nullify their | |
229 | delay slot (eg. likely branches). | |
230 | ||
231 | * sem.c, sem-switch.c: Regenerate. | |
232 | ||
233 | 2000-05-16 Ben Elliston <bje@redhat.com> | |
234 | ||
235 | * arch.c, cpu.c, cpu.h, decode.c, decode.h: Regenerate. | |
236 | * sem.c, sem-switch.c: Likewise. | |
237 | * mloop.in (extract-pbb): Prohibit branch instructions in the | |
238 | delay slot of branch likely instructions. | |
239 | ||
240 | 2000-05-16 Ben Elliston <bje@redhat.com> | |
241 | ||
242 | * Makefile.in: New file. | |
243 | * configure.in: Ditto. | |
244 | * acconfig.h: Ditto. | |
245 | * config.in, configure: Generate. | |
246 | * arch.c, arch.h, cpu.c, cpu.h, cpuall.h: Ditto. | |
247 | * decode.c, decode.h: Ditto. | |
248 | * model.c, sem-switch.c, sem.c: Ditto. | |
249 | * mloop.in: New file. | |
250 | * iq2000.c: Ditto. | |
251 | * iq2000-sim.h: Ditto. | |
252 | * sim-if.c: Ditto. | |
253 | * sim-main.h: Ditto. | |
254 | * tconfig.in: Ditto |