Commit | Line | Data |
---|---|---|
edece237 | 1 | /* Main simulator entry points specific to the IQ2000. |
618f726f | 2 | Copyright (C) 2000-2016 Free Software Foundation, Inc. |
edece237 CV |
3 | Contributed by Cygnus Solutions. |
4 | ||
5 | This file is part of the GNU simulators. | |
6 | ||
7 | This program is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
4744ac1b JB |
9 | the Free Software Foundation; either version 3 of the License, or |
10 | (at your option) any later version. | |
edece237 CV |
11 | |
12 | This program is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
4744ac1b JB |
17 | You should have received a copy of the GNU General Public License |
18 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ | |
edece237 CV |
19 | |
20 | #include "sim-main.h" | |
21 | #ifdef HAVE_STDLIB_H | |
22 | #include <stdlib.h> | |
23 | #endif | |
24 | #include "sim-options.h" | |
25 | #include "libiberty.h" | |
26 | #include "bfd.h" | |
27 | ||
28 | static void free_state (SIM_DESC); | |
edece237 CV |
29 | \f |
30 | /* Cover function for sim_cgen_disassemble_insn. */ | |
31 | ||
32 | void | |
33 | iq2000bf_disassemble_insn (SIM_CPU *cpu, const CGEN_INSN *insn, | |
34 | const ARGBUF *abuf, IADDR pc, char *buf) | |
35 | { | |
36 | sim_cgen_disassemble_insn(cpu, insn, abuf, pc, buf); | |
37 | } | |
38 | ||
39 | /* Cover function of sim_state_free to free the cpu buffers as well. */ | |
40 | ||
41 | static void | |
42 | free_state (SIM_DESC sd) | |
43 | { | |
44 | if (STATE_MODULES (sd) != NULL) | |
45 | sim_module_uninstall (sd); | |
46 | sim_cpu_free_all (sd); | |
47 | sim_state_free (sd); | |
48 | } | |
49 | ||
50 | /* Create an instance of the simulator. */ | |
51 | ||
52 | SIM_DESC | |
53 | sim_open (kind, callback, abfd, argv) | |
54 | SIM_OPEN_KIND kind; | |
55 | host_callback *callback; | |
56 | struct bfd *abfd; | |
57 | char **argv; | |
58 | { | |
59 | char c; | |
60 | int i; | |
61 | SIM_DESC sd = sim_state_alloc (kind, callback); | |
62 | ||
63 | /* The cpu data is kept in a separately allocated chunk of memory. */ | |
64 | if (sim_cpu_alloc_all (sd, 1, cgen_cpu_max_extra_bytes ()) != SIM_RC_OK) | |
65 | { | |
66 | free_state (sd); | |
67 | return 0; | |
68 | } | |
69 | ||
70 | #if 0 /* FIXME: pc is in mach-specific struct */ | |
71 | /* FIXME: watchpoints code shouldn't need this */ | |
72 | { | |
73 | SIM_CPU *current_cpu = STATE_CPU (sd, 0); | |
74 | STATE_WATCHPOINTS (sd)->pc = &(PC); | |
75 | STATE_WATCHPOINTS (sd)->sizeof_pc = sizeof (PC); | |
76 | } | |
77 | #endif | |
78 | ||
79 | if (sim_pre_argv_init (sd, argv[0]) != SIM_RC_OK) | |
80 | { | |
81 | free_state (sd); | |
82 | return 0; | |
83 | } | |
84 | ||
edece237 CV |
85 | /* getopt will print the error message so we just have to exit if this fails. |
86 | FIXME: Hmmm... in the case of gdb we need getopt to call | |
87 | print_filtered. */ | |
88 | if (sim_parse_args (sd, argv) != SIM_RC_OK) | |
89 | { | |
90 | free_state (sd); | |
91 | return 0; | |
92 | } | |
93 | ||
94 | /* Allocate core managed memory. */ | |
95 | sim_do_commandf (sd, "memory region 0x%lx,0x%lx", IQ2000_INSN_VALUE, IQ2000_INSN_MEM_SIZE); | |
96 | sim_do_commandf (sd, "memory region 0x%lx,0x%lx", IQ2000_DATA_VALUE, IQ2000_DATA_MEM_SIZE); | |
97 | ||
98 | /* check for/establish the reference program image */ | |
99 | if (sim_analyze_program (sd, | |
100 | (STATE_PROG_ARGV (sd) != NULL | |
101 | ? *STATE_PROG_ARGV (sd) | |
102 | : NULL), | |
103 | abfd) != SIM_RC_OK) | |
104 | { | |
105 | free_state (sd); | |
106 | return 0; | |
107 | } | |
108 | ||
109 | /* Establish any remaining configuration options. */ | |
110 | if (sim_config (sd) != SIM_RC_OK) | |
111 | { | |
112 | free_state (sd); | |
113 | return 0; | |
114 | } | |
115 | ||
116 | if (sim_post_argv_init (sd) != SIM_RC_OK) | |
117 | { | |
118 | free_state (sd); | |
119 | return 0; | |
120 | } | |
121 | ||
122 | /* Open a copy of the cpu descriptor table. */ | |
123 | { | |
124 | CGEN_CPU_DESC cd = iq2000_cgen_cpu_open_1 (STATE_ARCHITECTURE (sd)->printable_name, | |
125 | CGEN_ENDIAN_BIG); | |
126 | ||
127 | for (i = 0; i < MAX_NR_PROCESSORS; ++i) | |
128 | { | |
129 | SIM_CPU *cpu = STATE_CPU (sd, i); | |
130 | CPU_CPU_DESC (cpu) = cd; | |
131 | CPU_DISASSEMBLER (cpu) = iq2000bf_disassemble_insn; | |
132 | } | |
133 | iq2000_cgen_init_dis (cd); | |
134 | } | |
135 | ||
136 | /* Initialize various cgen things not done by common framework. | |
137 | Must be done after iq2000_cgen_cpu_open. */ | |
138 | cgen_init (sd); | |
139 | ||
edece237 CV |
140 | return sd; |
141 | } | |
edece237 CV |
142 | \f |
143 | SIM_RC | |
144 | sim_create_inferior (sd, abfd, argv, envp) | |
145 | SIM_DESC sd; | |
146 | struct bfd *abfd; | |
147 | char **argv; | |
148 | char **envp; | |
149 | { | |
150 | SIM_CPU *current_cpu = STATE_CPU (sd, 0); | |
151 | SIM_ADDR addr; | |
152 | ||
153 | if (abfd != NULL) | |
154 | addr = bfd_get_start_address (abfd); | |
155 | else | |
156 | addr = CPU2INSN(0); | |
157 | sim_pc_set (current_cpu, addr); | |
158 | ||
0e967299 MF |
159 | /* Standalone mode (i.e. `run`) will take care of the argv for us in |
160 | sim_open() -> sim_parse_args(). But in debug mode (i.e. 'target sim' | |
161 | with `gdb`), we need to handle it because the user can change the | |
162 | argv on the fly via gdb's 'run'. */ | |
163 | if (STATE_PROG_ARGV (sd) != argv) | |
164 | { | |
165 | freeargv (STATE_PROG_ARGV (sd)); | |
166 | STATE_PROG_ARGV (sd) = dupargv (argv); | |
167 | } | |
edece237 CV |
168 | |
169 | return SIM_RC_OK; | |
170 | } |