Commit | Line | Data |
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c28c63d8 JB |
1 | /* Simulator instruction semantics for lm32bf. |
2 | ||
3 | THIS FILE IS MACHINE GENERATED WITH CGEN. | |
4 | ||
42a4f53d | 5 | Copyright 1996-2019 Free Software Foundation, Inc. |
c28c63d8 JB |
6 | |
7 | This file is part of the GNU simulators. | |
8 | ||
fb067cad DE |
9 | This file is free software; you can redistribute it and/or modify |
10 | it under the terms of the GNU General Public License as published by | |
11 | the Free Software Foundation; either version 3, or (at your option) | |
12 | any later version. | |
c28c63d8 | 13 | |
fb067cad DE |
14 | It is distributed in the hope that it will be useful, but WITHOUT |
15 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY | |
16 | or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public | |
17 | License for more details. | |
c28c63d8 | 18 | |
fb067cad | 19 | You should have received a copy of the GNU General Public License along |
51b318de | 20 | with this program; if not, see <http://www.gnu.org/licenses/>. |
c28c63d8 JB |
21 | |
22 | */ | |
23 | ||
24 | #define WANT_CPU lm32bf | |
25 | #define WANT_CPU_LM32BF | |
26 | ||
27 | #include "sim-main.h" | |
28 | #include "cgen-mem.h" | |
29 | #include "cgen-ops.h" | |
30 | ||
31 | #undef GET_ATTR | |
c28c63d8 | 32 | #define GET_ATTR(cpu, num, attr) CGEN_ATTR_VALUE (NULL, abuf->idesc->attrs, CGEN_INSN_##attr) |
c28c63d8 JB |
33 | |
34 | /* This is used so that we can compile two copies of the semantic code, | |
35 | one with full feature support and one without that runs fast(er). | |
36 | FAST_P, when desired, is defined on the command line, -DFAST_P=1. */ | |
37 | #if FAST_P | |
38 | #define SEM_FN_NAME(cpu,fn) XCONCAT3 (cpu,_semf_,fn) | |
db7858e2 MF |
39 | #undef CGEN_TRACE_RESULT |
40 | #define CGEN_TRACE_RESULT(cpu, abuf, name, type, val) | |
c28c63d8 JB |
41 | #else |
42 | #define SEM_FN_NAME(cpu,fn) XCONCAT3 (cpu,_sem_,fn) | |
43 | #endif | |
44 | ||
45 | /* x-invalid: --invalid-- */ | |
46 | ||
47 | static SEM_PC | |
48 | SEM_FN_NAME (lm32bf,x_invalid) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
49 | { | |
2310652a | 50 | #define FLD(f) abuf->fields.sfmt_empty.f |
c28c63d8 JB |
51 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
52 | int UNUSED written = 0; | |
53 | IADDR UNUSED pc = abuf->addr; | |
54 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0); | |
55 | ||
56 | { | |
57 | /* Update the recorded pc in the cpu state struct. | |
58 | Only necessary for WITH_SCACHE case, but to avoid the | |
59 | conditional compilation .... */ | |
60 | SET_H_PC (pc); | |
61 | /* Virtual insns have zero size. Overwrite vpc with address of next insn | |
62 | using the default-insn-bitsize spec. When executing insns in parallel | |
63 | we may want to queue the fault and continue execution. */ | |
64 | vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
65 | vpc = sim_engine_invalid_insn (current_cpu, pc, vpc); | |
66 | } | |
67 | ||
68 | return vpc; | |
69 | #undef FLD | |
70 | } | |
71 | ||
72 | /* x-after: --after-- */ | |
73 | ||
74 | static SEM_PC | |
75 | SEM_FN_NAME (lm32bf,x_after) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
76 | { | |
2310652a | 77 | #define FLD(f) abuf->fields.sfmt_empty.f |
c28c63d8 JB |
78 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
79 | int UNUSED written = 0; | |
80 | IADDR UNUSED pc = abuf->addr; | |
81 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0); | |
82 | ||
83 | { | |
84 | #if WITH_SCACHE_PBB_LM32BF | |
85 | lm32bf_pbb_after (current_cpu, sem_arg); | |
86 | #endif | |
87 | } | |
88 | ||
89 | return vpc; | |
90 | #undef FLD | |
91 | } | |
92 | ||
93 | /* x-before: --before-- */ | |
94 | ||
95 | static SEM_PC | |
96 | SEM_FN_NAME (lm32bf,x_before) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
97 | { | |
2310652a | 98 | #define FLD(f) abuf->fields.sfmt_empty.f |
c28c63d8 JB |
99 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
100 | int UNUSED written = 0; | |
101 | IADDR UNUSED pc = abuf->addr; | |
102 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0); | |
103 | ||
104 | { | |
105 | #if WITH_SCACHE_PBB_LM32BF | |
106 | lm32bf_pbb_before (current_cpu, sem_arg); | |
107 | #endif | |
108 | } | |
109 | ||
110 | return vpc; | |
111 | #undef FLD | |
112 | } | |
113 | ||
114 | /* x-cti-chain: --cti-chain-- */ | |
115 | ||
116 | static SEM_PC | |
117 | SEM_FN_NAME (lm32bf,x_cti_chain) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
118 | { | |
2310652a | 119 | #define FLD(f) abuf->fields.sfmt_empty.f |
c28c63d8 JB |
120 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
121 | int UNUSED written = 0; | |
122 | IADDR UNUSED pc = abuf->addr; | |
123 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0); | |
124 | ||
125 | { | |
126 | #if WITH_SCACHE_PBB_LM32BF | |
127 | #ifdef DEFINE_SWITCH | |
128 | vpc = lm32bf_pbb_cti_chain (current_cpu, sem_arg, | |
129 | pbb_br_type, pbb_br_npc); | |
130 | BREAK (sem); | |
131 | #else | |
132 | /* FIXME: Allow provision of explicit ifmt spec in insn spec. */ | |
133 | vpc = lm32bf_pbb_cti_chain (current_cpu, sem_arg, | |
134 | CPU_PBB_BR_TYPE (current_cpu), | |
135 | CPU_PBB_BR_NPC (current_cpu)); | |
136 | #endif | |
137 | #endif | |
138 | } | |
139 | ||
140 | return vpc; | |
141 | #undef FLD | |
142 | } | |
143 | ||
144 | /* x-chain: --chain-- */ | |
145 | ||
146 | static SEM_PC | |
147 | SEM_FN_NAME (lm32bf,x_chain) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
148 | { | |
2310652a | 149 | #define FLD(f) abuf->fields.sfmt_empty.f |
c28c63d8 JB |
150 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
151 | int UNUSED written = 0; | |
152 | IADDR UNUSED pc = abuf->addr; | |
153 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0); | |
154 | ||
155 | { | |
156 | #if WITH_SCACHE_PBB_LM32BF | |
157 | vpc = lm32bf_pbb_chain (current_cpu, sem_arg); | |
158 | #ifdef DEFINE_SWITCH | |
159 | BREAK (sem); | |
160 | #endif | |
161 | #endif | |
162 | } | |
163 | ||
164 | return vpc; | |
165 | #undef FLD | |
166 | } | |
167 | ||
168 | /* x-begin: --begin-- */ | |
169 | ||
170 | static SEM_PC | |
171 | SEM_FN_NAME (lm32bf,x_begin) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
172 | { | |
2310652a | 173 | #define FLD(f) abuf->fields.sfmt_empty.f |
c28c63d8 JB |
174 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
175 | int UNUSED written = 0; | |
176 | IADDR UNUSED pc = abuf->addr; | |
177 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0); | |
178 | ||
179 | { | |
180 | #if WITH_SCACHE_PBB_LM32BF | |
181 | #if defined DEFINE_SWITCH || defined FAST_P | |
182 | /* In the switch case FAST_P is a constant, allowing several optimizations | |
183 | in any called inline functions. */ | |
184 | vpc = lm32bf_pbb_begin (current_cpu, FAST_P); | |
185 | #else | |
186 | #if 0 /* cgen engine can't handle dynamic fast/full switching yet. */ | |
187 | vpc = lm32bf_pbb_begin (current_cpu, STATE_RUN_FAST_P (CPU_STATE (current_cpu))); | |
188 | #else | |
189 | vpc = lm32bf_pbb_begin (current_cpu, 0); | |
190 | #endif | |
191 | #endif | |
192 | #endif | |
193 | } | |
194 | ||
195 | return vpc; | |
196 | #undef FLD | |
197 | } | |
198 | ||
199 | /* add: add $r2,$r0,$r1 */ | |
200 | ||
201 | static SEM_PC | |
202 | SEM_FN_NAME (lm32bf,add) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
203 | { | |
204 | #define FLD(f) abuf->fields.sfmt_user.f | |
205 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
206 | int UNUSED written = 0; | |
207 | IADDR UNUSED pc = abuf->addr; | |
208 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
209 | ||
210 | { | |
211 | SI opval = ADDSI (CPU (h_gr[FLD (f_r0)]), CPU (h_gr[FLD (f_r1)])); | |
212 | CPU (h_gr[FLD (f_r2)]) = opval; | |
db7858e2 | 213 | CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); |
c28c63d8 JB |
214 | } |
215 | ||
216 | return vpc; | |
217 | #undef FLD | |
218 | } | |
219 | ||
220 | /* addi: addi $r1,$r0,$imm */ | |
221 | ||
222 | static SEM_PC | |
223 | SEM_FN_NAME (lm32bf,addi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
224 | { | |
225 | #define FLD(f) abuf->fields.sfmt_addi.f | |
226 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
227 | int UNUSED written = 0; | |
228 | IADDR UNUSED pc = abuf->addr; | |
229 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
230 | ||
231 | { | |
232 | SI opval = ADDSI (CPU (h_gr[FLD (f_r0)]), EXTHISI (TRUNCSIHI (FLD (f_imm)))); | |
233 | CPU (h_gr[FLD (f_r1)]) = opval; | |
db7858e2 | 234 | CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); |
c28c63d8 JB |
235 | } |
236 | ||
237 | return vpc; | |
238 | #undef FLD | |
239 | } | |
240 | ||
241 | /* and: and $r2,$r0,$r1 */ | |
242 | ||
243 | static SEM_PC | |
244 | SEM_FN_NAME (lm32bf,and) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
245 | { | |
246 | #define FLD(f) abuf->fields.sfmt_user.f | |
247 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
248 | int UNUSED written = 0; | |
249 | IADDR UNUSED pc = abuf->addr; | |
250 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
251 | ||
252 | { | |
253 | SI opval = ANDSI (CPU (h_gr[FLD (f_r0)]), CPU (h_gr[FLD (f_r1)])); | |
254 | CPU (h_gr[FLD (f_r2)]) = opval; | |
db7858e2 | 255 | CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); |
c28c63d8 JB |
256 | } |
257 | ||
258 | return vpc; | |
259 | #undef FLD | |
260 | } | |
261 | ||
262 | /* andi: andi $r1,$r0,$uimm */ | |
263 | ||
264 | static SEM_PC | |
265 | SEM_FN_NAME (lm32bf,andi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
266 | { | |
267 | #define FLD(f) abuf->fields.sfmt_andi.f | |
268 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
269 | int UNUSED written = 0; | |
270 | IADDR UNUSED pc = abuf->addr; | |
271 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
272 | ||
273 | { | |
274 | SI opval = ANDSI (CPU (h_gr[FLD (f_r0)]), ZEXTSISI (FLD (f_uimm))); | |
275 | CPU (h_gr[FLD (f_r1)]) = opval; | |
db7858e2 | 276 | CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); |
c28c63d8 JB |
277 | } |
278 | ||
279 | return vpc; | |
280 | #undef FLD | |
281 | } | |
282 | ||
283 | /* andhii: andhi $r1,$r0,$hi16 */ | |
284 | ||
285 | static SEM_PC | |
286 | SEM_FN_NAME (lm32bf,andhii) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
287 | { | |
288 | #define FLD(f) abuf->fields.sfmt_andi.f | |
289 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
290 | int UNUSED written = 0; | |
291 | IADDR UNUSED pc = abuf->addr; | |
292 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
293 | ||
294 | { | |
295 | SI opval = ANDSI (CPU (h_gr[FLD (f_r0)]), SLLSI (FLD (f_uimm), 16)); | |
296 | CPU (h_gr[FLD (f_r1)]) = opval; | |
db7858e2 | 297 | CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); |
c28c63d8 JB |
298 | } |
299 | ||
300 | return vpc; | |
301 | #undef FLD | |
302 | } | |
303 | ||
304 | /* b: b $r0 */ | |
305 | ||
306 | static SEM_PC | |
307 | SEM_FN_NAME (lm32bf,b) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
308 | { | |
309 | #define FLD(f) abuf->fields.sfmt_be.f | |
310 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
311 | int UNUSED written = 0; | |
312 | IADDR UNUSED pc = abuf->addr; | |
313 | SEM_BRANCH_INIT | |
314 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
315 | ||
316 | { | |
317 | USI opval = lm32bf_b_insn (current_cpu, CPU (h_gr[FLD (f_r0)]), FLD (f_r0)); | |
318 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
db7858e2 | 319 | CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); |
c28c63d8 JB |
320 | } |
321 | ||
322 | SEM_BRANCH_FINI (vpc); | |
323 | return vpc; | |
324 | #undef FLD | |
325 | } | |
326 | ||
327 | /* bi: bi $call */ | |
328 | ||
329 | static SEM_PC | |
330 | SEM_FN_NAME (lm32bf,bi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
331 | { | |
332 | #define FLD(f) abuf->fields.sfmt_bi.f | |
333 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
334 | int UNUSED written = 0; | |
335 | IADDR UNUSED pc = abuf->addr; | |
336 | SEM_BRANCH_INIT | |
337 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
338 | ||
339 | { | |
340 | USI opval = EXTSISI (FLD (i_call)); | |
341 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
db7858e2 | 342 | CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); |
c28c63d8 JB |
343 | } |
344 | ||
345 | SEM_BRANCH_FINI (vpc); | |
346 | return vpc; | |
347 | #undef FLD | |
348 | } | |
349 | ||
350 | /* be: be $r0,$r1,$branch */ | |
351 | ||
352 | static SEM_PC | |
353 | SEM_FN_NAME (lm32bf,be) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
354 | { | |
355 | #define FLD(f) abuf->fields.sfmt_be.f | |
356 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
357 | int UNUSED written = 0; | |
358 | IADDR UNUSED pc = abuf->addr; | |
359 | SEM_BRANCH_INIT | |
360 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
361 | ||
362 | if (EQSI (CPU (h_gr[FLD (f_r0)]), CPU (h_gr[FLD (f_r1)]))) { | |
363 | { | |
364 | USI opval = FLD (i_branch); | |
365 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); | |
366 | written |= (1 << 3); | |
db7858e2 | 367 | CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); |
c28c63d8 JB |
368 | } |
369 | } | |
370 | ||
371 | abuf->written = written; | |
372 | SEM_BRANCH_FINI (vpc); | |
373 | return vpc; | |
374 | #undef FLD | |
375 | } | |
376 | ||
377 | /* bg: bg $r0,$r1,$branch */ | |
378 | ||
379 | static SEM_PC | |
380 | SEM_FN_NAME (lm32bf,bg) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
381 | { | |
382 | #define FLD(f) abuf->fields.sfmt_be.f | |
383 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
384 | int UNUSED written = 0; | |
385 | IADDR UNUSED pc = abuf->addr; | |
386 | SEM_BRANCH_INIT | |
387 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
388 | ||
389 | if (GTSI (CPU (h_gr[FLD (f_r0)]), CPU (h_gr[FLD (f_r1)]))) { | |
390 | { | |
391 | USI opval = FLD (i_branch); | |
392 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); | |
393 | written |= (1 << 3); | |
db7858e2 | 394 | CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); |
c28c63d8 JB |
395 | } |
396 | } | |
397 | ||
398 | abuf->written = written; | |
399 | SEM_BRANCH_FINI (vpc); | |
400 | return vpc; | |
401 | #undef FLD | |
402 | } | |
403 | ||
404 | /* bge: bge $r0,$r1,$branch */ | |
405 | ||
406 | static SEM_PC | |
407 | SEM_FN_NAME (lm32bf,bge) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
408 | { | |
409 | #define FLD(f) abuf->fields.sfmt_be.f | |
410 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
411 | int UNUSED written = 0; | |
412 | IADDR UNUSED pc = abuf->addr; | |
413 | SEM_BRANCH_INIT | |
414 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
415 | ||
416 | if (GESI (CPU (h_gr[FLD (f_r0)]), CPU (h_gr[FLD (f_r1)]))) { | |
417 | { | |
418 | USI opval = FLD (i_branch); | |
419 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); | |
420 | written |= (1 << 3); | |
db7858e2 | 421 | CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); |
c28c63d8 JB |
422 | } |
423 | } | |
424 | ||
425 | abuf->written = written; | |
426 | SEM_BRANCH_FINI (vpc); | |
427 | return vpc; | |
428 | #undef FLD | |
429 | } | |
430 | ||
431 | /* bgeu: bgeu $r0,$r1,$branch */ | |
432 | ||
433 | static SEM_PC | |
434 | SEM_FN_NAME (lm32bf,bgeu) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
435 | { | |
436 | #define FLD(f) abuf->fields.sfmt_be.f | |
437 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
438 | int UNUSED written = 0; | |
439 | IADDR UNUSED pc = abuf->addr; | |
440 | SEM_BRANCH_INIT | |
441 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
442 | ||
443 | if (GEUSI (CPU (h_gr[FLD (f_r0)]), CPU (h_gr[FLD (f_r1)]))) { | |
444 | { | |
445 | USI opval = FLD (i_branch); | |
446 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); | |
447 | written |= (1 << 3); | |
db7858e2 | 448 | CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); |
c28c63d8 JB |
449 | } |
450 | } | |
451 | ||
452 | abuf->written = written; | |
453 | SEM_BRANCH_FINI (vpc); | |
454 | return vpc; | |
455 | #undef FLD | |
456 | } | |
457 | ||
458 | /* bgu: bgu $r0,$r1,$branch */ | |
459 | ||
460 | static SEM_PC | |
461 | SEM_FN_NAME (lm32bf,bgu) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
462 | { | |
463 | #define FLD(f) abuf->fields.sfmt_be.f | |
464 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
465 | int UNUSED written = 0; | |
466 | IADDR UNUSED pc = abuf->addr; | |
467 | SEM_BRANCH_INIT | |
468 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
469 | ||
470 | if (GTUSI (CPU (h_gr[FLD (f_r0)]), CPU (h_gr[FLD (f_r1)]))) { | |
471 | { | |
472 | USI opval = FLD (i_branch); | |
473 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); | |
474 | written |= (1 << 3); | |
db7858e2 | 475 | CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); |
c28c63d8 JB |
476 | } |
477 | } | |
478 | ||
479 | abuf->written = written; | |
480 | SEM_BRANCH_FINI (vpc); | |
481 | return vpc; | |
482 | #undef FLD | |
483 | } | |
484 | ||
485 | /* bne: bne $r0,$r1,$branch */ | |
486 | ||
487 | static SEM_PC | |
488 | SEM_FN_NAME (lm32bf,bne) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
489 | { | |
490 | #define FLD(f) abuf->fields.sfmt_be.f | |
491 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
492 | int UNUSED written = 0; | |
493 | IADDR UNUSED pc = abuf->addr; | |
494 | SEM_BRANCH_INIT | |
495 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
496 | ||
497 | if (NESI (CPU (h_gr[FLD (f_r0)]), CPU (h_gr[FLD (f_r1)]))) { | |
498 | { | |
499 | USI opval = FLD (i_branch); | |
500 | SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); | |
501 | written |= (1 << 3); | |
db7858e2 | 502 | CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); |
c28c63d8 JB |
503 | } |
504 | } | |
505 | ||
506 | abuf->written = written; | |
507 | SEM_BRANCH_FINI (vpc); | |
508 | return vpc; | |
509 | #undef FLD | |
510 | } | |
511 | ||
512 | /* call: call $r0 */ | |
513 | ||
514 | static SEM_PC | |
515 | SEM_FN_NAME (lm32bf,call) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
516 | { | |
517 | #define FLD(f) abuf->fields.sfmt_be.f | |
518 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
519 | int UNUSED written = 0; | |
520 | IADDR UNUSED pc = abuf->addr; | |
521 | SEM_BRANCH_INIT | |
522 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
523 | ||
524 | { | |
525 | { | |
526 | SI opval = ADDSI (pc, 4); | |
527 | CPU (h_gr[((UINT) 29)]) = opval; | |
db7858e2 | 528 | CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); |
c28c63d8 JB |
529 | } |
530 | { | |
531 | USI opval = CPU (h_gr[FLD (f_r0)]); | |
532 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
db7858e2 | 533 | CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); |
c28c63d8 JB |
534 | } |
535 | } | |
536 | ||
537 | SEM_BRANCH_FINI (vpc); | |
538 | return vpc; | |
539 | #undef FLD | |
540 | } | |
541 | ||
542 | /* calli: calli $call */ | |
543 | ||
544 | static SEM_PC | |
545 | SEM_FN_NAME (lm32bf,calli) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
546 | { | |
547 | #define FLD(f) abuf->fields.sfmt_bi.f | |
548 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
549 | int UNUSED written = 0; | |
550 | IADDR UNUSED pc = abuf->addr; | |
551 | SEM_BRANCH_INIT | |
552 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
553 | ||
554 | { | |
555 | { | |
556 | SI opval = ADDSI (pc, 4); | |
557 | CPU (h_gr[((UINT) 29)]) = opval; | |
db7858e2 | 558 | CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); |
c28c63d8 JB |
559 | } |
560 | { | |
561 | USI opval = EXTSISI (FLD (i_call)); | |
562 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
db7858e2 | 563 | CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); |
c28c63d8 JB |
564 | } |
565 | } | |
566 | ||
567 | SEM_BRANCH_FINI (vpc); | |
568 | return vpc; | |
569 | #undef FLD | |
570 | } | |
571 | ||
572 | /* cmpe: cmpe $r2,$r0,$r1 */ | |
573 | ||
574 | static SEM_PC | |
575 | SEM_FN_NAME (lm32bf,cmpe) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
576 | { | |
577 | #define FLD(f) abuf->fields.sfmt_user.f | |
578 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
579 | int UNUSED written = 0; | |
580 | IADDR UNUSED pc = abuf->addr; | |
581 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
582 | ||
583 | { | |
584 | SI opval = EQSI (CPU (h_gr[FLD (f_r0)]), CPU (h_gr[FLD (f_r1)])); | |
585 | CPU (h_gr[FLD (f_r2)]) = opval; | |
db7858e2 | 586 | CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); |
c28c63d8 JB |
587 | } |
588 | ||
589 | return vpc; | |
590 | #undef FLD | |
591 | } | |
592 | ||
593 | /* cmpei: cmpei $r1,$r0,$imm */ | |
594 | ||
595 | static SEM_PC | |
596 | SEM_FN_NAME (lm32bf,cmpei) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
597 | { | |
598 | #define FLD(f) abuf->fields.sfmt_addi.f | |
599 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
600 | int UNUSED written = 0; | |
601 | IADDR UNUSED pc = abuf->addr; | |
602 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
603 | ||
604 | { | |
605 | SI opval = EQSI (CPU (h_gr[FLD (f_r0)]), EXTHISI (TRUNCSIHI (FLD (f_imm)))); | |
606 | CPU (h_gr[FLD (f_r1)]) = opval; | |
db7858e2 | 607 | CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); |
c28c63d8 JB |
608 | } |
609 | ||
610 | return vpc; | |
611 | #undef FLD | |
612 | } | |
613 | ||
614 | /* cmpg: cmpg $r2,$r0,$r1 */ | |
615 | ||
616 | static SEM_PC | |
617 | SEM_FN_NAME (lm32bf,cmpg) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
618 | { | |
619 | #define FLD(f) abuf->fields.sfmt_user.f | |
620 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
621 | int UNUSED written = 0; | |
622 | IADDR UNUSED pc = abuf->addr; | |
623 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
624 | ||
625 | { | |
626 | SI opval = GTSI (CPU (h_gr[FLD (f_r0)]), CPU (h_gr[FLD (f_r1)])); | |
627 | CPU (h_gr[FLD (f_r2)]) = opval; | |
db7858e2 | 628 | CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); |
c28c63d8 JB |
629 | } |
630 | ||
631 | return vpc; | |
632 | #undef FLD | |
633 | } | |
634 | ||
635 | /* cmpgi: cmpgi $r1,$r0,$imm */ | |
636 | ||
637 | static SEM_PC | |
638 | SEM_FN_NAME (lm32bf,cmpgi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
639 | { | |
640 | #define FLD(f) abuf->fields.sfmt_addi.f | |
641 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
642 | int UNUSED written = 0; | |
643 | IADDR UNUSED pc = abuf->addr; | |
644 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
645 | ||
646 | { | |
647 | SI opval = GTSI (CPU (h_gr[FLD (f_r0)]), EXTHISI (TRUNCSIHI (FLD (f_imm)))); | |
648 | CPU (h_gr[FLD (f_r1)]) = opval; | |
db7858e2 | 649 | CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); |
c28c63d8 JB |
650 | } |
651 | ||
652 | return vpc; | |
653 | #undef FLD | |
654 | } | |
655 | ||
656 | /* cmpge: cmpge $r2,$r0,$r1 */ | |
657 | ||
658 | static SEM_PC | |
659 | SEM_FN_NAME (lm32bf,cmpge) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
660 | { | |
661 | #define FLD(f) abuf->fields.sfmt_user.f | |
662 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
663 | int UNUSED written = 0; | |
664 | IADDR UNUSED pc = abuf->addr; | |
665 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
666 | ||
667 | { | |
668 | SI opval = GESI (CPU (h_gr[FLD (f_r0)]), CPU (h_gr[FLD (f_r1)])); | |
669 | CPU (h_gr[FLD (f_r2)]) = opval; | |
db7858e2 | 670 | CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); |
c28c63d8 JB |
671 | } |
672 | ||
673 | return vpc; | |
674 | #undef FLD | |
675 | } | |
676 | ||
677 | /* cmpgei: cmpgei $r1,$r0,$imm */ | |
678 | ||
679 | static SEM_PC | |
680 | SEM_FN_NAME (lm32bf,cmpgei) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
681 | { | |
682 | #define FLD(f) abuf->fields.sfmt_addi.f | |
683 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
684 | int UNUSED written = 0; | |
685 | IADDR UNUSED pc = abuf->addr; | |
686 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
687 | ||
688 | { | |
689 | SI opval = GESI (CPU (h_gr[FLD (f_r0)]), EXTHISI (TRUNCSIHI (FLD (f_imm)))); | |
690 | CPU (h_gr[FLD (f_r1)]) = opval; | |
db7858e2 | 691 | CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); |
c28c63d8 JB |
692 | } |
693 | ||
694 | return vpc; | |
695 | #undef FLD | |
696 | } | |
697 | ||
698 | /* cmpgeu: cmpgeu $r2,$r0,$r1 */ | |
699 | ||
700 | static SEM_PC | |
701 | SEM_FN_NAME (lm32bf,cmpgeu) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
702 | { | |
703 | #define FLD(f) abuf->fields.sfmt_user.f | |
704 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
705 | int UNUSED written = 0; | |
706 | IADDR UNUSED pc = abuf->addr; | |
707 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
708 | ||
709 | { | |
710 | SI opval = GEUSI (CPU (h_gr[FLD (f_r0)]), CPU (h_gr[FLD (f_r1)])); | |
711 | CPU (h_gr[FLD (f_r2)]) = opval; | |
db7858e2 | 712 | CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); |
c28c63d8 JB |
713 | } |
714 | ||
715 | return vpc; | |
716 | #undef FLD | |
717 | } | |
718 | ||
719 | /* cmpgeui: cmpgeui $r1,$r0,$uimm */ | |
720 | ||
721 | static SEM_PC | |
722 | SEM_FN_NAME (lm32bf,cmpgeui) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
723 | { | |
724 | #define FLD(f) abuf->fields.sfmt_andi.f | |
725 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
726 | int UNUSED written = 0; | |
727 | IADDR UNUSED pc = abuf->addr; | |
728 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
729 | ||
730 | { | |
731 | SI opval = GEUSI (CPU (h_gr[FLD (f_r0)]), ZEXTSISI (FLD (f_uimm))); | |
732 | CPU (h_gr[FLD (f_r1)]) = opval; | |
db7858e2 | 733 | CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); |
c28c63d8 JB |
734 | } |
735 | ||
736 | return vpc; | |
737 | #undef FLD | |
738 | } | |
739 | ||
740 | /* cmpgu: cmpgu $r2,$r0,$r1 */ | |
741 | ||
742 | static SEM_PC | |
743 | SEM_FN_NAME (lm32bf,cmpgu) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
744 | { | |
745 | #define FLD(f) abuf->fields.sfmt_user.f | |
746 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
747 | int UNUSED written = 0; | |
748 | IADDR UNUSED pc = abuf->addr; | |
749 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
750 | ||
751 | { | |
752 | SI opval = GTUSI (CPU (h_gr[FLD (f_r0)]), CPU (h_gr[FLD (f_r1)])); | |
753 | CPU (h_gr[FLD (f_r2)]) = opval; | |
db7858e2 | 754 | CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); |
c28c63d8 JB |
755 | } |
756 | ||
757 | return vpc; | |
758 | #undef FLD | |
759 | } | |
760 | ||
761 | /* cmpgui: cmpgui $r1,$r0,$uimm */ | |
762 | ||
763 | static SEM_PC | |
764 | SEM_FN_NAME (lm32bf,cmpgui) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
765 | { | |
766 | #define FLD(f) abuf->fields.sfmt_andi.f | |
767 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
768 | int UNUSED written = 0; | |
769 | IADDR UNUSED pc = abuf->addr; | |
770 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
771 | ||
772 | { | |
773 | SI opval = GTUSI (CPU (h_gr[FLD (f_r0)]), ZEXTSISI (FLD (f_uimm))); | |
774 | CPU (h_gr[FLD (f_r1)]) = opval; | |
db7858e2 | 775 | CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); |
c28c63d8 JB |
776 | } |
777 | ||
778 | return vpc; | |
779 | #undef FLD | |
780 | } | |
781 | ||
782 | /* cmpne: cmpne $r2,$r0,$r1 */ | |
783 | ||
784 | static SEM_PC | |
785 | SEM_FN_NAME (lm32bf,cmpne) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
786 | { | |
787 | #define FLD(f) abuf->fields.sfmt_user.f | |
788 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
789 | int UNUSED written = 0; | |
790 | IADDR UNUSED pc = abuf->addr; | |
791 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
792 | ||
793 | { | |
794 | SI opval = NESI (CPU (h_gr[FLD (f_r0)]), CPU (h_gr[FLD (f_r1)])); | |
795 | CPU (h_gr[FLD (f_r2)]) = opval; | |
db7858e2 | 796 | CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); |
c28c63d8 JB |
797 | } |
798 | ||
799 | return vpc; | |
800 | #undef FLD | |
801 | } | |
802 | ||
803 | /* cmpnei: cmpnei $r1,$r0,$imm */ | |
804 | ||
805 | static SEM_PC | |
806 | SEM_FN_NAME (lm32bf,cmpnei) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
807 | { | |
808 | #define FLD(f) abuf->fields.sfmt_addi.f | |
809 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
810 | int UNUSED written = 0; | |
811 | IADDR UNUSED pc = abuf->addr; | |
812 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
813 | ||
814 | { | |
815 | SI opval = NESI (CPU (h_gr[FLD (f_r0)]), EXTHISI (TRUNCSIHI (FLD (f_imm)))); | |
816 | CPU (h_gr[FLD (f_r1)]) = opval; | |
db7858e2 | 817 | CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); |
c28c63d8 JB |
818 | } |
819 | ||
820 | return vpc; | |
821 | #undef FLD | |
822 | } | |
823 | ||
824 | /* divu: divu $r2,$r0,$r1 */ | |
825 | ||
826 | static SEM_PC | |
827 | SEM_FN_NAME (lm32bf,divu) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
828 | { | |
829 | #define FLD(f) abuf->fields.sfmt_user.f | |
830 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
831 | int UNUSED written = 0; | |
832 | IADDR UNUSED pc = abuf->addr; | |
833 | SEM_BRANCH_INIT | |
834 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
835 | ||
836 | { | |
837 | USI opval = lm32bf_divu_insn (current_cpu, pc, FLD (f_r0), FLD (f_r1), FLD (f_r2)); | |
838 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
db7858e2 | 839 | CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); |
c28c63d8 JB |
840 | } |
841 | ||
842 | SEM_BRANCH_FINI (vpc); | |
843 | return vpc; | |
844 | #undef FLD | |
845 | } | |
846 | ||
847 | /* lb: lb $r1,($r0+$imm) */ | |
848 | ||
849 | static SEM_PC | |
850 | SEM_FN_NAME (lm32bf,lb) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
851 | { | |
852 | #define FLD(f) abuf->fields.sfmt_addi.f | |
853 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
854 | int UNUSED written = 0; | |
855 | IADDR UNUSED pc = abuf->addr; | |
856 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
857 | ||
858 | { | |
859 | SI opval = EXTQISI (GETMEMQI (current_cpu, pc, ADDSI (CPU (h_gr[FLD (f_r0)]), EXTHISI (TRUNCSIHI (FLD (f_imm)))))); | |
860 | CPU (h_gr[FLD (f_r1)]) = opval; | |
db7858e2 | 861 | CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); |
c28c63d8 JB |
862 | } |
863 | ||
864 | return vpc; | |
865 | #undef FLD | |
866 | } | |
867 | ||
868 | /* lbu: lbu $r1,($r0+$imm) */ | |
869 | ||
870 | static SEM_PC | |
871 | SEM_FN_NAME (lm32bf,lbu) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
872 | { | |
873 | #define FLD(f) abuf->fields.sfmt_addi.f | |
874 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
875 | int UNUSED written = 0; | |
876 | IADDR UNUSED pc = abuf->addr; | |
877 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
878 | ||
879 | { | |
880 | SI opval = ZEXTQISI (GETMEMQI (current_cpu, pc, ADDSI (CPU (h_gr[FLD (f_r0)]), EXTHISI (TRUNCSIHI (FLD (f_imm)))))); | |
881 | CPU (h_gr[FLD (f_r1)]) = opval; | |
db7858e2 | 882 | CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); |
c28c63d8 JB |
883 | } |
884 | ||
885 | return vpc; | |
886 | #undef FLD | |
887 | } | |
888 | ||
889 | /* lh: lh $r1,($r0+$imm) */ | |
890 | ||
891 | static SEM_PC | |
892 | SEM_FN_NAME (lm32bf,lh) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
893 | { | |
894 | #define FLD(f) abuf->fields.sfmt_addi.f | |
895 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
896 | int UNUSED written = 0; | |
897 | IADDR UNUSED pc = abuf->addr; | |
898 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
899 | ||
900 | { | |
901 | SI opval = EXTHISI (GETMEMHI (current_cpu, pc, ADDSI (CPU (h_gr[FLD (f_r0)]), EXTHISI (TRUNCSIHI (FLD (f_imm)))))); | |
902 | CPU (h_gr[FLD (f_r1)]) = opval; | |
db7858e2 | 903 | CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); |
c28c63d8 JB |
904 | } |
905 | ||
906 | return vpc; | |
907 | #undef FLD | |
908 | } | |
909 | ||
910 | /* lhu: lhu $r1,($r0+$imm) */ | |
911 | ||
912 | static SEM_PC | |
913 | SEM_FN_NAME (lm32bf,lhu) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
914 | { | |
915 | #define FLD(f) abuf->fields.sfmt_addi.f | |
916 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
917 | int UNUSED written = 0; | |
918 | IADDR UNUSED pc = abuf->addr; | |
919 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
920 | ||
921 | { | |
922 | SI opval = ZEXTHISI (GETMEMHI (current_cpu, pc, ADDSI (CPU (h_gr[FLD (f_r0)]), EXTHISI (TRUNCSIHI (FLD (f_imm)))))); | |
923 | CPU (h_gr[FLD (f_r1)]) = opval; | |
db7858e2 | 924 | CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); |
c28c63d8 JB |
925 | } |
926 | ||
927 | return vpc; | |
928 | #undef FLD | |
929 | } | |
930 | ||
931 | /* lw: lw $r1,($r0+$imm) */ | |
932 | ||
933 | static SEM_PC | |
934 | SEM_FN_NAME (lm32bf,lw) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
935 | { | |
936 | #define FLD(f) abuf->fields.sfmt_addi.f | |
937 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
938 | int UNUSED written = 0; | |
939 | IADDR UNUSED pc = abuf->addr; | |
940 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
941 | ||
942 | { | |
943 | SI opval = GETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[FLD (f_r0)]), EXTHISI (TRUNCSIHI (FLD (f_imm))))); | |
944 | CPU (h_gr[FLD (f_r1)]) = opval; | |
db7858e2 | 945 | CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); |
c28c63d8 JB |
946 | } |
947 | ||
948 | return vpc; | |
949 | #undef FLD | |
950 | } | |
951 | ||
952 | /* modu: modu $r2,$r0,$r1 */ | |
953 | ||
954 | static SEM_PC | |
955 | SEM_FN_NAME (lm32bf,modu) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
956 | { | |
957 | #define FLD(f) abuf->fields.sfmt_user.f | |
958 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
959 | int UNUSED written = 0; | |
960 | IADDR UNUSED pc = abuf->addr; | |
961 | SEM_BRANCH_INIT | |
962 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
963 | ||
964 | { | |
965 | USI opval = lm32bf_modu_insn (current_cpu, pc, FLD (f_r0), FLD (f_r1), FLD (f_r2)); | |
966 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
db7858e2 | 967 | CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); |
c28c63d8 JB |
968 | } |
969 | ||
970 | SEM_BRANCH_FINI (vpc); | |
971 | return vpc; | |
972 | #undef FLD | |
973 | } | |
974 | ||
975 | /* mul: mul $r2,$r0,$r1 */ | |
976 | ||
977 | static SEM_PC | |
978 | SEM_FN_NAME (lm32bf,mul) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
979 | { | |
980 | #define FLD(f) abuf->fields.sfmt_user.f | |
981 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
982 | int UNUSED written = 0; | |
983 | IADDR UNUSED pc = abuf->addr; | |
984 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
985 | ||
986 | { | |
987 | SI opval = MULSI (CPU (h_gr[FLD (f_r0)]), CPU (h_gr[FLD (f_r1)])); | |
988 | CPU (h_gr[FLD (f_r2)]) = opval; | |
db7858e2 | 989 | CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); |
c28c63d8 JB |
990 | } |
991 | ||
992 | return vpc; | |
993 | #undef FLD | |
994 | } | |
995 | ||
996 | /* muli: muli $r1,$r0,$imm */ | |
997 | ||
998 | static SEM_PC | |
999 | SEM_FN_NAME (lm32bf,muli) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1000 | { | |
1001 | #define FLD(f) abuf->fields.sfmt_addi.f | |
1002 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1003 | int UNUSED written = 0; | |
1004 | IADDR UNUSED pc = abuf->addr; | |
1005 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1006 | ||
1007 | { | |
1008 | SI opval = MULSI (CPU (h_gr[FLD (f_r0)]), EXTHISI (TRUNCSIHI (FLD (f_imm)))); | |
1009 | CPU (h_gr[FLD (f_r1)]) = opval; | |
db7858e2 | 1010 | CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); |
c28c63d8 JB |
1011 | } |
1012 | ||
1013 | return vpc; | |
1014 | #undef FLD | |
1015 | } | |
1016 | ||
1017 | /* nor: nor $r2,$r0,$r1 */ | |
1018 | ||
1019 | static SEM_PC | |
1020 | SEM_FN_NAME (lm32bf,nor) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1021 | { | |
1022 | #define FLD(f) abuf->fields.sfmt_user.f | |
1023 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1024 | int UNUSED written = 0; | |
1025 | IADDR UNUSED pc = abuf->addr; | |
1026 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1027 | ||
1028 | { | |
1029 | SI opval = INVSI (ORSI (CPU (h_gr[FLD (f_r0)]), CPU (h_gr[FLD (f_r1)]))); | |
1030 | CPU (h_gr[FLD (f_r2)]) = opval; | |
db7858e2 | 1031 | CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); |
c28c63d8 JB |
1032 | } |
1033 | ||
1034 | return vpc; | |
1035 | #undef FLD | |
1036 | } | |
1037 | ||
1038 | /* nori: nori $r1,$r0,$uimm */ | |
1039 | ||
1040 | static SEM_PC | |
1041 | SEM_FN_NAME (lm32bf,nori) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1042 | { | |
1043 | #define FLD(f) abuf->fields.sfmt_andi.f | |
1044 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1045 | int UNUSED written = 0; | |
1046 | IADDR UNUSED pc = abuf->addr; | |
1047 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1048 | ||
1049 | { | |
1050 | SI opval = INVSI (ORSI (CPU (h_gr[FLD (f_r0)]), ZEXTSISI (FLD (f_uimm)))); | |
1051 | CPU (h_gr[FLD (f_r1)]) = opval; | |
db7858e2 | 1052 | CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); |
c28c63d8 JB |
1053 | } |
1054 | ||
1055 | return vpc; | |
1056 | #undef FLD | |
1057 | } | |
1058 | ||
1059 | /* or: or $r2,$r0,$r1 */ | |
1060 | ||
1061 | static SEM_PC | |
1062 | SEM_FN_NAME (lm32bf,or) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1063 | { | |
1064 | #define FLD(f) abuf->fields.sfmt_user.f | |
1065 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1066 | int UNUSED written = 0; | |
1067 | IADDR UNUSED pc = abuf->addr; | |
1068 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1069 | ||
1070 | { | |
1071 | SI opval = ORSI (CPU (h_gr[FLD (f_r0)]), CPU (h_gr[FLD (f_r1)])); | |
1072 | CPU (h_gr[FLD (f_r2)]) = opval; | |
db7858e2 | 1073 | CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); |
c28c63d8 JB |
1074 | } |
1075 | ||
1076 | return vpc; | |
1077 | #undef FLD | |
1078 | } | |
1079 | ||
1080 | /* ori: ori $r1,$r0,$lo16 */ | |
1081 | ||
1082 | static SEM_PC | |
1083 | SEM_FN_NAME (lm32bf,ori) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1084 | { | |
1085 | #define FLD(f) abuf->fields.sfmt_andi.f | |
1086 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1087 | int UNUSED written = 0; | |
1088 | IADDR UNUSED pc = abuf->addr; | |
1089 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1090 | ||
1091 | { | |
1092 | SI opval = ORSI (CPU (h_gr[FLD (f_r0)]), ZEXTSISI (FLD (f_uimm))); | |
1093 | CPU (h_gr[FLD (f_r1)]) = opval; | |
db7858e2 | 1094 | CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); |
c28c63d8 JB |
1095 | } |
1096 | ||
1097 | return vpc; | |
1098 | #undef FLD | |
1099 | } | |
1100 | ||
1101 | /* orhii: orhi $r1,$r0,$hi16 */ | |
1102 | ||
1103 | static SEM_PC | |
1104 | SEM_FN_NAME (lm32bf,orhii) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1105 | { | |
1106 | #define FLD(f) abuf->fields.sfmt_andi.f | |
1107 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1108 | int UNUSED written = 0; | |
1109 | IADDR UNUSED pc = abuf->addr; | |
1110 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1111 | ||
1112 | { | |
1113 | SI opval = ORSI (CPU (h_gr[FLD (f_r0)]), SLLSI (FLD (f_uimm), 16)); | |
1114 | CPU (h_gr[FLD (f_r1)]) = opval; | |
db7858e2 | 1115 | CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); |
c28c63d8 JB |
1116 | } |
1117 | ||
1118 | return vpc; | |
1119 | #undef FLD | |
1120 | } | |
1121 | ||
1122 | /* rcsr: rcsr $r2,$csr */ | |
1123 | ||
1124 | static SEM_PC | |
1125 | SEM_FN_NAME (lm32bf,rcsr) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1126 | { | |
1127 | #define FLD(f) abuf->fields.sfmt_rcsr.f | |
1128 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1129 | int UNUSED written = 0; | |
1130 | IADDR UNUSED pc = abuf->addr; | |
1131 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1132 | ||
1133 | { | |
1134 | SI opval = CPU (h_csr[FLD (f_csr)]); | |
1135 | CPU (h_gr[FLD (f_r2)]) = opval; | |
db7858e2 | 1136 | CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); |
c28c63d8 JB |
1137 | } |
1138 | ||
1139 | return vpc; | |
1140 | #undef FLD | |
1141 | } | |
1142 | ||
1143 | /* sb: sb ($r0+$imm),$r1 */ | |
1144 | ||
1145 | static SEM_PC | |
1146 | SEM_FN_NAME (lm32bf,sb) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1147 | { | |
1148 | #define FLD(f) abuf->fields.sfmt_addi.f | |
1149 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1150 | int UNUSED written = 0; | |
1151 | IADDR UNUSED pc = abuf->addr; | |
1152 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1153 | ||
1154 | { | |
1155 | QI opval = CPU (h_gr[FLD (f_r1)]); | |
1156 | SETMEMQI (current_cpu, pc, ADDSI (CPU (h_gr[FLD (f_r0)]), EXTHISI (TRUNCSIHI (FLD (f_imm)))), opval); | |
db7858e2 | 1157 | CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); |
c28c63d8 JB |
1158 | } |
1159 | ||
1160 | return vpc; | |
1161 | #undef FLD | |
1162 | } | |
1163 | ||
1164 | /* sextb: sextb $r2,$r0 */ | |
1165 | ||
1166 | static SEM_PC | |
1167 | SEM_FN_NAME (lm32bf,sextb) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1168 | { | |
1169 | #define FLD(f) abuf->fields.sfmt_user.f | |
1170 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1171 | int UNUSED written = 0; | |
1172 | IADDR UNUSED pc = abuf->addr; | |
1173 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1174 | ||
1175 | { | |
1176 | SI opval = EXTQISI (TRUNCSIQI (CPU (h_gr[FLD (f_r0)]))); | |
1177 | CPU (h_gr[FLD (f_r2)]) = opval; | |
db7858e2 | 1178 | CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); |
c28c63d8 JB |
1179 | } |
1180 | ||
1181 | return vpc; | |
1182 | #undef FLD | |
1183 | } | |
1184 | ||
1185 | /* sexth: sexth $r2,$r0 */ | |
1186 | ||
1187 | static SEM_PC | |
1188 | SEM_FN_NAME (lm32bf,sexth) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1189 | { | |
1190 | #define FLD(f) abuf->fields.sfmt_user.f | |
1191 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1192 | int UNUSED written = 0; | |
1193 | IADDR UNUSED pc = abuf->addr; | |
1194 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1195 | ||
1196 | { | |
1197 | SI opval = EXTHISI (TRUNCSIHI (CPU (h_gr[FLD (f_r0)]))); | |
1198 | CPU (h_gr[FLD (f_r2)]) = opval; | |
db7858e2 | 1199 | CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); |
c28c63d8 JB |
1200 | } |
1201 | ||
1202 | return vpc; | |
1203 | #undef FLD | |
1204 | } | |
1205 | ||
1206 | /* sh: sh ($r0+$imm),$r1 */ | |
1207 | ||
1208 | static SEM_PC | |
1209 | SEM_FN_NAME (lm32bf,sh) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1210 | { | |
1211 | #define FLD(f) abuf->fields.sfmt_addi.f | |
1212 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1213 | int UNUSED written = 0; | |
1214 | IADDR UNUSED pc = abuf->addr; | |
1215 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1216 | ||
1217 | { | |
1218 | HI opval = CPU (h_gr[FLD (f_r1)]); | |
1219 | SETMEMHI (current_cpu, pc, ADDSI (CPU (h_gr[FLD (f_r0)]), EXTHISI (TRUNCSIHI (FLD (f_imm)))), opval); | |
db7858e2 | 1220 | CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); |
c28c63d8 JB |
1221 | } |
1222 | ||
1223 | return vpc; | |
1224 | #undef FLD | |
1225 | } | |
1226 | ||
1227 | /* sl: sl $r2,$r0,$r1 */ | |
1228 | ||
1229 | static SEM_PC | |
1230 | SEM_FN_NAME (lm32bf,sl) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1231 | { | |
1232 | #define FLD(f) abuf->fields.sfmt_user.f | |
1233 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1234 | int UNUSED written = 0; | |
1235 | IADDR UNUSED pc = abuf->addr; | |
1236 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1237 | ||
1238 | { | |
1239 | SI opval = SLLSI (CPU (h_gr[FLD (f_r0)]), CPU (h_gr[FLD (f_r1)])); | |
1240 | CPU (h_gr[FLD (f_r2)]) = opval; | |
db7858e2 | 1241 | CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); |
c28c63d8 JB |
1242 | } |
1243 | ||
1244 | return vpc; | |
1245 | #undef FLD | |
1246 | } | |
1247 | ||
1248 | /* sli: sli $r1,$r0,$imm */ | |
1249 | ||
1250 | static SEM_PC | |
1251 | SEM_FN_NAME (lm32bf,sli) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1252 | { | |
1253 | #define FLD(f) abuf->fields.sfmt_addi.f | |
1254 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1255 | int UNUSED written = 0; | |
1256 | IADDR UNUSED pc = abuf->addr; | |
1257 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1258 | ||
1259 | { | |
1260 | SI opval = SLLSI (CPU (h_gr[FLD (f_r0)]), FLD (f_imm)); | |
1261 | CPU (h_gr[FLD (f_r1)]) = opval; | |
db7858e2 | 1262 | CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); |
c28c63d8 JB |
1263 | } |
1264 | ||
1265 | return vpc; | |
1266 | #undef FLD | |
1267 | } | |
1268 | ||
1269 | /* sr: sr $r2,$r0,$r1 */ | |
1270 | ||
1271 | static SEM_PC | |
1272 | SEM_FN_NAME (lm32bf,sr) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1273 | { | |
1274 | #define FLD(f) abuf->fields.sfmt_user.f | |
1275 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1276 | int UNUSED written = 0; | |
1277 | IADDR UNUSED pc = abuf->addr; | |
1278 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1279 | ||
1280 | { | |
1281 | SI opval = SRASI (CPU (h_gr[FLD (f_r0)]), CPU (h_gr[FLD (f_r1)])); | |
1282 | CPU (h_gr[FLD (f_r2)]) = opval; | |
db7858e2 | 1283 | CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); |
c28c63d8 JB |
1284 | } |
1285 | ||
1286 | return vpc; | |
1287 | #undef FLD | |
1288 | } | |
1289 | ||
1290 | /* sri: sri $r1,$r0,$imm */ | |
1291 | ||
1292 | static SEM_PC | |
1293 | SEM_FN_NAME (lm32bf,sri) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1294 | { | |
1295 | #define FLD(f) abuf->fields.sfmt_addi.f | |
1296 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1297 | int UNUSED written = 0; | |
1298 | IADDR UNUSED pc = abuf->addr; | |
1299 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1300 | ||
1301 | { | |
1302 | SI opval = SRASI (CPU (h_gr[FLD (f_r0)]), FLD (f_imm)); | |
1303 | CPU (h_gr[FLD (f_r1)]) = opval; | |
db7858e2 | 1304 | CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); |
c28c63d8 JB |
1305 | } |
1306 | ||
1307 | return vpc; | |
1308 | #undef FLD | |
1309 | } | |
1310 | ||
1311 | /* sru: sru $r2,$r0,$r1 */ | |
1312 | ||
1313 | static SEM_PC | |
1314 | SEM_FN_NAME (lm32bf,sru) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1315 | { | |
1316 | #define FLD(f) abuf->fields.sfmt_user.f | |
1317 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1318 | int UNUSED written = 0; | |
1319 | IADDR UNUSED pc = abuf->addr; | |
1320 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1321 | ||
1322 | { | |
1323 | SI opval = SRLSI (CPU (h_gr[FLD (f_r0)]), CPU (h_gr[FLD (f_r1)])); | |
1324 | CPU (h_gr[FLD (f_r2)]) = opval; | |
db7858e2 | 1325 | CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); |
c28c63d8 JB |
1326 | } |
1327 | ||
1328 | return vpc; | |
1329 | #undef FLD | |
1330 | } | |
1331 | ||
1332 | /* srui: srui $r1,$r0,$imm */ | |
1333 | ||
1334 | static SEM_PC | |
1335 | SEM_FN_NAME (lm32bf,srui) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1336 | { | |
1337 | #define FLD(f) abuf->fields.sfmt_addi.f | |
1338 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1339 | int UNUSED written = 0; | |
1340 | IADDR UNUSED pc = abuf->addr; | |
1341 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1342 | ||
1343 | { | |
1344 | SI opval = SRLSI (CPU (h_gr[FLD (f_r0)]), FLD (f_imm)); | |
1345 | CPU (h_gr[FLD (f_r1)]) = opval; | |
db7858e2 | 1346 | CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); |
c28c63d8 JB |
1347 | } |
1348 | ||
1349 | return vpc; | |
1350 | #undef FLD | |
1351 | } | |
1352 | ||
1353 | /* sub: sub $r2,$r0,$r1 */ | |
1354 | ||
1355 | static SEM_PC | |
1356 | SEM_FN_NAME (lm32bf,sub) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1357 | { | |
1358 | #define FLD(f) abuf->fields.sfmt_user.f | |
1359 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1360 | int UNUSED written = 0; | |
1361 | IADDR UNUSED pc = abuf->addr; | |
1362 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1363 | ||
1364 | { | |
1365 | SI opval = SUBSI (CPU (h_gr[FLD (f_r0)]), CPU (h_gr[FLD (f_r1)])); | |
1366 | CPU (h_gr[FLD (f_r2)]) = opval; | |
db7858e2 | 1367 | CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); |
c28c63d8 JB |
1368 | } |
1369 | ||
1370 | return vpc; | |
1371 | #undef FLD | |
1372 | } | |
1373 | ||
1374 | /* sw: sw ($r0+$imm),$r1 */ | |
1375 | ||
1376 | static SEM_PC | |
1377 | SEM_FN_NAME (lm32bf,sw) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1378 | { | |
1379 | #define FLD(f) abuf->fields.sfmt_addi.f | |
1380 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1381 | int UNUSED written = 0; | |
1382 | IADDR UNUSED pc = abuf->addr; | |
1383 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1384 | ||
1385 | { | |
1386 | SI opval = CPU (h_gr[FLD (f_r1)]); | |
1387 | SETMEMSI (current_cpu, pc, ADDSI (CPU (h_gr[FLD (f_r0)]), EXTHISI (TRUNCSIHI (FLD (f_imm)))), opval); | |
db7858e2 | 1388 | CGEN_TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); |
c28c63d8 JB |
1389 | } |
1390 | ||
1391 | return vpc; | |
1392 | #undef FLD | |
1393 | } | |
1394 | ||
1395 | /* user: user $r2,$r0,$r1,$user */ | |
1396 | ||
1397 | static SEM_PC | |
1398 | SEM_FN_NAME (lm32bf,user) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1399 | { | |
1400 | #define FLD(f) abuf->fields.sfmt_user.f | |
1401 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1402 | int UNUSED written = 0; | |
1403 | IADDR UNUSED pc = abuf->addr; | |
1404 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1405 | ||
1406 | { | |
1407 | SI opval = lm32bf_user_insn (current_cpu, CPU (h_gr[FLD (f_r0)]), CPU (h_gr[FLD (f_r1)]), FLD (f_user)); | |
1408 | CPU (h_gr[FLD (f_r2)]) = opval; | |
db7858e2 | 1409 | CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); |
c28c63d8 JB |
1410 | } |
1411 | ||
1412 | return vpc; | |
1413 | #undef FLD | |
1414 | } | |
1415 | ||
1416 | /* wcsr: wcsr $csr,$r1 */ | |
1417 | ||
1418 | static SEM_PC | |
1419 | SEM_FN_NAME (lm32bf,wcsr) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1420 | { | |
1421 | #define FLD(f) abuf->fields.sfmt_wcsr.f | |
1422 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1423 | int UNUSED written = 0; | |
1424 | IADDR UNUSED pc = abuf->addr; | |
1425 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1426 | ||
1427 | lm32bf_wcsr_insn (current_cpu, FLD (f_csr), CPU (h_gr[FLD (f_r1)])); | |
1428 | ||
1429 | return vpc; | |
1430 | #undef FLD | |
1431 | } | |
1432 | ||
1433 | /* xor: xor $r2,$r0,$r1 */ | |
1434 | ||
1435 | static SEM_PC | |
1436 | SEM_FN_NAME (lm32bf,xor) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1437 | { | |
1438 | #define FLD(f) abuf->fields.sfmt_user.f | |
1439 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1440 | int UNUSED written = 0; | |
1441 | IADDR UNUSED pc = abuf->addr; | |
1442 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1443 | ||
1444 | { | |
1445 | SI opval = XORSI (CPU (h_gr[FLD (f_r0)]), CPU (h_gr[FLD (f_r1)])); | |
1446 | CPU (h_gr[FLD (f_r2)]) = opval; | |
db7858e2 | 1447 | CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); |
c28c63d8 JB |
1448 | } |
1449 | ||
1450 | return vpc; | |
1451 | #undef FLD | |
1452 | } | |
1453 | ||
1454 | /* xori: xori $r1,$r0,$uimm */ | |
1455 | ||
1456 | static SEM_PC | |
1457 | SEM_FN_NAME (lm32bf,xori) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1458 | { | |
1459 | #define FLD(f) abuf->fields.sfmt_andi.f | |
1460 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1461 | int UNUSED written = 0; | |
1462 | IADDR UNUSED pc = abuf->addr; | |
1463 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1464 | ||
1465 | { | |
1466 | SI opval = XORSI (CPU (h_gr[FLD (f_r0)]), ZEXTSISI (FLD (f_uimm))); | |
1467 | CPU (h_gr[FLD (f_r1)]) = opval; | |
db7858e2 | 1468 | CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); |
c28c63d8 JB |
1469 | } |
1470 | ||
1471 | return vpc; | |
1472 | #undef FLD | |
1473 | } | |
1474 | ||
1475 | /* xnor: xnor $r2,$r0,$r1 */ | |
1476 | ||
1477 | static SEM_PC | |
1478 | SEM_FN_NAME (lm32bf,xnor) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1479 | { | |
1480 | #define FLD(f) abuf->fields.sfmt_user.f | |
1481 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1482 | int UNUSED written = 0; | |
1483 | IADDR UNUSED pc = abuf->addr; | |
1484 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1485 | ||
1486 | { | |
1487 | SI opval = INVSI (XORSI (CPU (h_gr[FLD (f_r0)]), CPU (h_gr[FLD (f_r1)]))); | |
1488 | CPU (h_gr[FLD (f_r2)]) = opval; | |
db7858e2 | 1489 | CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); |
c28c63d8 JB |
1490 | } |
1491 | ||
1492 | return vpc; | |
1493 | #undef FLD | |
1494 | } | |
1495 | ||
1496 | /* xnori: xnori $r1,$r0,$uimm */ | |
1497 | ||
1498 | static SEM_PC | |
1499 | SEM_FN_NAME (lm32bf,xnori) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1500 | { | |
1501 | #define FLD(f) abuf->fields.sfmt_andi.f | |
1502 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); | |
1503 | int UNUSED written = 0; | |
1504 | IADDR UNUSED pc = abuf->addr; | |
1505 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1506 | ||
1507 | { | |
1508 | SI opval = INVSI (XORSI (CPU (h_gr[FLD (f_r0)]), ZEXTSISI (FLD (f_uimm)))); | |
1509 | CPU (h_gr[FLD (f_r1)]) = opval; | |
db7858e2 | 1510 | CGEN_TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); |
c28c63d8 JB |
1511 | } |
1512 | ||
1513 | return vpc; | |
1514 | #undef FLD | |
1515 | } | |
1516 | ||
1517 | /* break: break */ | |
1518 | ||
1519 | static SEM_PC | |
1520 | SEM_FN_NAME (lm32bf,break) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1521 | { | |
2310652a | 1522 | #define FLD(f) abuf->fields.sfmt_empty.f |
c28c63d8 JB |
1523 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
1524 | int UNUSED written = 0; | |
1525 | IADDR UNUSED pc = abuf->addr; | |
1526 | SEM_BRANCH_INIT | |
1527 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1528 | ||
1529 | { | |
1530 | USI opval = lm32bf_break_insn (current_cpu, pc); | |
1531 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
db7858e2 | 1532 | CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); |
c28c63d8 JB |
1533 | } |
1534 | ||
1535 | SEM_BRANCH_FINI (vpc); | |
1536 | return vpc; | |
1537 | #undef FLD | |
1538 | } | |
1539 | ||
1540 | /* scall: scall */ | |
1541 | ||
1542 | static SEM_PC | |
1543 | SEM_FN_NAME (lm32bf,scall) (SIM_CPU *current_cpu, SEM_ARG sem_arg) | |
1544 | { | |
2310652a | 1545 | #define FLD(f) abuf->fields.sfmt_empty.f |
c28c63d8 JB |
1546 | ARGBUF *abuf = SEM_ARGBUF (sem_arg); |
1547 | int UNUSED written = 0; | |
1548 | IADDR UNUSED pc = abuf->addr; | |
1549 | SEM_BRANCH_INIT | |
1550 | SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); | |
1551 | ||
1552 | { | |
1553 | USI opval = lm32bf_scall_insn (current_cpu, pc); | |
1554 | SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); | |
db7858e2 | 1555 | CGEN_TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); |
c28c63d8 JB |
1556 | } |
1557 | ||
1558 | SEM_BRANCH_FINI (vpc); | |
1559 | return vpc; | |
1560 | #undef FLD | |
1561 | } | |
1562 | ||
1563 | /* Table of all semantic fns. */ | |
1564 | ||
1565 | static const struct sem_fn_desc sem_fns[] = { | |
1566 | { LM32BF_INSN_X_INVALID, SEM_FN_NAME (lm32bf,x_invalid) }, | |
1567 | { LM32BF_INSN_X_AFTER, SEM_FN_NAME (lm32bf,x_after) }, | |
1568 | { LM32BF_INSN_X_BEFORE, SEM_FN_NAME (lm32bf,x_before) }, | |
1569 | { LM32BF_INSN_X_CTI_CHAIN, SEM_FN_NAME (lm32bf,x_cti_chain) }, | |
1570 | { LM32BF_INSN_X_CHAIN, SEM_FN_NAME (lm32bf,x_chain) }, | |
1571 | { LM32BF_INSN_X_BEGIN, SEM_FN_NAME (lm32bf,x_begin) }, | |
1572 | { LM32BF_INSN_ADD, SEM_FN_NAME (lm32bf,add) }, | |
1573 | { LM32BF_INSN_ADDI, SEM_FN_NAME (lm32bf,addi) }, | |
1574 | { LM32BF_INSN_AND, SEM_FN_NAME (lm32bf,and) }, | |
1575 | { LM32BF_INSN_ANDI, SEM_FN_NAME (lm32bf,andi) }, | |
1576 | { LM32BF_INSN_ANDHII, SEM_FN_NAME (lm32bf,andhii) }, | |
1577 | { LM32BF_INSN_B, SEM_FN_NAME (lm32bf,b) }, | |
1578 | { LM32BF_INSN_BI, SEM_FN_NAME (lm32bf,bi) }, | |
1579 | { LM32BF_INSN_BE, SEM_FN_NAME (lm32bf,be) }, | |
1580 | { LM32BF_INSN_BG, SEM_FN_NAME (lm32bf,bg) }, | |
1581 | { LM32BF_INSN_BGE, SEM_FN_NAME (lm32bf,bge) }, | |
1582 | { LM32BF_INSN_BGEU, SEM_FN_NAME (lm32bf,bgeu) }, | |
1583 | { LM32BF_INSN_BGU, SEM_FN_NAME (lm32bf,bgu) }, | |
1584 | { LM32BF_INSN_BNE, SEM_FN_NAME (lm32bf,bne) }, | |
1585 | { LM32BF_INSN_CALL, SEM_FN_NAME (lm32bf,call) }, | |
1586 | { LM32BF_INSN_CALLI, SEM_FN_NAME (lm32bf,calli) }, | |
1587 | { LM32BF_INSN_CMPE, SEM_FN_NAME (lm32bf,cmpe) }, | |
1588 | { LM32BF_INSN_CMPEI, SEM_FN_NAME (lm32bf,cmpei) }, | |
1589 | { LM32BF_INSN_CMPG, SEM_FN_NAME (lm32bf,cmpg) }, | |
1590 | { LM32BF_INSN_CMPGI, SEM_FN_NAME (lm32bf,cmpgi) }, | |
1591 | { LM32BF_INSN_CMPGE, SEM_FN_NAME (lm32bf,cmpge) }, | |
1592 | { LM32BF_INSN_CMPGEI, SEM_FN_NAME (lm32bf,cmpgei) }, | |
1593 | { LM32BF_INSN_CMPGEU, SEM_FN_NAME (lm32bf,cmpgeu) }, | |
1594 | { LM32BF_INSN_CMPGEUI, SEM_FN_NAME (lm32bf,cmpgeui) }, | |
1595 | { LM32BF_INSN_CMPGU, SEM_FN_NAME (lm32bf,cmpgu) }, | |
1596 | { LM32BF_INSN_CMPGUI, SEM_FN_NAME (lm32bf,cmpgui) }, | |
1597 | { LM32BF_INSN_CMPNE, SEM_FN_NAME (lm32bf,cmpne) }, | |
1598 | { LM32BF_INSN_CMPNEI, SEM_FN_NAME (lm32bf,cmpnei) }, | |
1599 | { LM32BF_INSN_DIVU, SEM_FN_NAME (lm32bf,divu) }, | |
1600 | { LM32BF_INSN_LB, SEM_FN_NAME (lm32bf,lb) }, | |
1601 | { LM32BF_INSN_LBU, SEM_FN_NAME (lm32bf,lbu) }, | |
1602 | { LM32BF_INSN_LH, SEM_FN_NAME (lm32bf,lh) }, | |
1603 | { LM32BF_INSN_LHU, SEM_FN_NAME (lm32bf,lhu) }, | |
1604 | { LM32BF_INSN_LW, SEM_FN_NAME (lm32bf,lw) }, | |
1605 | { LM32BF_INSN_MODU, SEM_FN_NAME (lm32bf,modu) }, | |
1606 | { LM32BF_INSN_MUL, SEM_FN_NAME (lm32bf,mul) }, | |
1607 | { LM32BF_INSN_MULI, SEM_FN_NAME (lm32bf,muli) }, | |
1608 | { LM32BF_INSN_NOR, SEM_FN_NAME (lm32bf,nor) }, | |
1609 | { LM32BF_INSN_NORI, SEM_FN_NAME (lm32bf,nori) }, | |
1610 | { LM32BF_INSN_OR, SEM_FN_NAME (lm32bf,or) }, | |
1611 | { LM32BF_INSN_ORI, SEM_FN_NAME (lm32bf,ori) }, | |
1612 | { LM32BF_INSN_ORHII, SEM_FN_NAME (lm32bf,orhii) }, | |
1613 | { LM32BF_INSN_RCSR, SEM_FN_NAME (lm32bf,rcsr) }, | |
1614 | { LM32BF_INSN_SB, SEM_FN_NAME (lm32bf,sb) }, | |
1615 | { LM32BF_INSN_SEXTB, SEM_FN_NAME (lm32bf,sextb) }, | |
1616 | { LM32BF_INSN_SEXTH, SEM_FN_NAME (lm32bf,sexth) }, | |
1617 | { LM32BF_INSN_SH, SEM_FN_NAME (lm32bf,sh) }, | |
1618 | { LM32BF_INSN_SL, SEM_FN_NAME (lm32bf,sl) }, | |
1619 | { LM32BF_INSN_SLI, SEM_FN_NAME (lm32bf,sli) }, | |
1620 | { LM32BF_INSN_SR, SEM_FN_NAME (lm32bf,sr) }, | |
1621 | { LM32BF_INSN_SRI, SEM_FN_NAME (lm32bf,sri) }, | |
1622 | { LM32BF_INSN_SRU, SEM_FN_NAME (lm32bf,sru) }, | |
1623 | { LM32BF_INSN_SRUI, SEM_FN_NAME (lm32bf,srui) }, | |
1624 | { LM32BF_INSN_SUB, SEM_FN_NAME (lm32bf,sub) }, | |
1625 | { LM32BF_INSN_SW, SEM_FN_NAME (lm32bf,sw) }, | |
1626 | { LM32BF_INSN_USER, SEM_FN_NAME (lm32bf,user) }, | |
1627 | { LM32BF_INSN_WCSR, SEM_FN_NAME (lm32bf,wcsr) }, | |
1628 | { LM32BF_INSN_XOR, SEM_FN_NAME (lm32bf,xor) }, | |
1629 | { LM32BF_INSN_XORI, SEM_FN_NAME (lm32bf,xori) }, | |
1630 | { LM32BF_INSN_XNOR, SEM_FN_NAME (lm32bf,xnor) }, | |
1631 | { LM32BF_INSN_XNORI, SEM_FN_NAME (lm32bf,xnori) }, | |
1632 | { LM32BF_INSN_BREAK, SEM_FN_NAME (lm32bf,break) }, | |
1633 | { LM32BF_INSN_SCALL, SEM_FN_NAME (lm32bf,scall) }, | |
1634 | { 0, 0 } | |
1635 | }; | |
1636 | ||
1637 | /* Add the semantic fns to IDESC_TABLE. */ | |
1638 | ||
1639 | void | |
1640 | SEM_FN_NAME (lm32bf,init_idesc_table) (SIM_CPU *current_cpu) | |
1641 | { | |
1642 | IDESC *idesc_table = CPU_IDESC (current_cpu); | |
1643 | const struct sem_fn_desc *sf; | |
1644 | int mach_num = MACH_NUM (CPU_MACH (current_cpu)); | |
1645 | ||
1646 | for (sf = &sem_fns[0]; sf->fn != 0; ++sf) | |
1647 | { | |
1648 | const CGEN_INSN *insn = idesc_table[sf->index].idata; | |
1649 | int valid_p = (CGEN_INSN_VIRTUAL_P (insn) | |
1650 | || CGEN_INSN_MACH_HAS_P (insn, mach_num)); | |
1651 | #if FAST_P | |
1652 | if (valid_p) | |
1653 | idesc_table[sf->index].sem_fast = sf->fn; | |
1654 | else | |
1655 | idesc_table[sf->index].sem_fast = SEM_FN_NAME (lm32bf,x_invalid); | |
1656 | #else | |
1657 | if (valid_p) | |
1658 | idesc_table[sf->index].sem_full = sf->fn; | |
1659 | else | |
1660 | idesc_table[sf->index].sem_full = SEM_FN_NAME (lm32bf,x_invalid); | |
1661 | #endif | |
1662 | } | |
1663 | } | |
1664 |