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fafce69a | 1 | # Makefile template for Configure for the m32r simulator |
369fba30 | 2 | # Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc. |
fafce69a AC |
3 | # Contributed by Cygnus Support. |
4 | # | |
5 | # This file is part of GDB, the GNU debugger. | |
6 | # | |
7 | # This program is free software; you can redistribute it and/or modify | |
8 | # it under the terms of the GNU General Public License as published by | |
9 | # the Free Software Foundation; either version 2 of the License, or | |
10 | # (at your option) any later version. | |
11 | # | |
12 | # This program is distributed in the hope that it will be useful, | |
13 | # but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | # GNU General Public License for more details. | |
16 | # | |
17 | # You should have received a copy of the GNU General Public License along | |
18 | # with this program; if not, write to the Free Software Foundation, Inc., | |
19 | # 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. | |
20 | ||
21 | ## COMMON_PRE_CONFIG_FRAG | |
22 | ||
0e701ac3 | 23 | M32R_OBJS = m32r.o cpu.o decode.o extract.o sem.o model.o mloop.o |
369fba30 | 24 | # start-sanitize-m32rx |
0e701ac3 | 25 | M32RX_OBJS = m32rx.o cpux.o decodex.o semx.o modelx.o mloopx.o |
369fba30 DE |
26 | # end-sanitize-m32rx |
27 | ||
177dedfb DE |
28 | CONFIG_DEVICES = dv-sockser.o |
29 | CONFIG_DEVICES = | |
30 | ||
369fba30 DE |
31 | SIM_OBJS = \ |
32 | $(SIM_NEW_COMMON_OBJS) \ | |
0e701ac3 AC |
33 | sim-engine.o \ |
34 | sim-hload.o \ | |
35 | sim-hrw.o \ | |
36 | sim-model.o \ | |
37 | sim-reason.o \ | |
369fba30 DE |
38 | cgen-utils.o cgen-trace.o cgen-scache.o \ |
39 | sim-if.o arch.o \ | |
177dedfb | 40 | $(M32R_OBJS) \ |
8e420152 DE |
41 | $(start-sanitize-m32rx) \ |
42 | $(M32RX_OBJS) \ | |
43 | $(end-sanitize-m32rx) \ | |
177dedfb DE |
44 | devices.o \ |
45 | $(CONFIG_DEVICES) | |
fafce69a AC |
46 | |
47 | # Extra headers included by sim-main.h. | |
48 | SIM_EXTRA_DEPS = \ | |
49 | $(srcdir)/../common/cgen-types.h \ | |
50 | $(srcdir)/../common/cgen-sim.h \ | |
51 | $(srcdir)/../common/cgen-trace.h \ | |
599bae21 | 52 | arch.h cpuall.h m32r-sim.h cpu-opc.h |
fafce69a | 53 | |
369fba30 | 54 | SIM_EXTRA_CFLAGS = |
fafce69a AC |
55 | |
56 | SIM_RUN_OBJS = nrun.o | |
57 | SIM_EXTRA_CLEAN = m32r-clean | |
58 | ||
0e701ac3 AC |
59 | # This selects the m32r newlib/libgloss syscall definitions. |
60 | NL_TARGET = -DNL_TARGET_m32r | |
61 | ||
fafce69a AC |
62 | ## COMMON_POST_CONFIG_FRAG |
63 | ||
369fba30 DE |
64 | arch = m32r |
65 | ||
fafce69a AC |
66 | MAIN_INCLUDE_DEPS = \ |
67 | sim-main.h \ | |
68 | $(srcdir)/../common/sim-config.h \ | |
69 | $(srcdir)/../common/sim-base.h \ | |
70 | $(srcdir)/../common/sim-basics.h \ | |
71 | $(srcdir)/../common/sim-module.h \ | |
72 | $(srcdir)/../common/sim-trace.h \ | |
73 | $(srcdir)/../common/sim-profile.h \ | |
74 | tconfig.h | |
75 | INCLUDE_DEPS = $(MAIN_INCLUDE_DEPS) $(SIM_EXTRA_DEPS) cpu-sim.h | |
369fba30 DE |
76 | OPS_INCLUDE_DEPS = \ |
77 | $(srcdir)/../common/cgen-mem.h \ | |
78 | $(srcdir)/../common/cgen-ops.h | |
fafce69a AC |
79 | |
80 | sim-if.o: sim-if.c $(INCLUDE_DEPS) $(srcdir)/../common/sim-core.h | |
fafce69a | 81 | |
599bae21 | 82 | arch.o: arch.c $(INCLUDE_DEPS) |
369fba30 DE |
83 | |
84 | # M32R objs | |
85 | ||
177dedfb | 86 | m32r.o: m32r.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpu.h decode.h |
b8a9943d | 87 | |
369fba30 DE |
88 | # FIXME: Use of `mono' is wip. |
89 | mloop.c: $(srcdir)/../common/genmloop.sh mloop.in Makefile | |
90 | rm -f mloop.c | |
b8a9943d DE |
91 | $(SHELL) $(srcdir)/../common/genmloop.sh $(SHELL) \ |
92 | -mono -scache -fast m32r $(srcdir)/mloop.in \ | |
93 | | sed -e 's/@cpu@/m32r/' -e 's/@CPU@/M32R/' >mloop.c | |
177dedfb | 94 | mloop.o: mloop.c sem-switch.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpu.h decode.h |
369fba30 | 95 | |
0e701ac3 | 96 | cpu.o: cpu.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpu.h |
177dedfb DE |
97 | decode.o: decode.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpu.h decode.h |
98 | extract.o: extract.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpu.h decode.h | |
b8a9943d | 99 | $(CC) -c $(srcdir)/extract.c $(ALL_CFLAGS) -DSCACHE_P |
177dedfb | 100 | sem.o: sem.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpu.h decode.h |
0e701ac3 | 101 | $(CC) -c $(srcdir)/sem.c $(ALL_CFLAGS) -DSCACHE_P |
177dedfb | 102 | model.o: model.c $(INCLUDE_DEPS) cpu.h decode.h |
369fba30 | 103 | |
b8a9943d DE |
104 | #sem-cache.o: sem.c decode.h $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpu.h |
105 | # $(CC) -c $(srcdir)/sem.c -o sem-cache.o -DSCACHE_P $(ALL_CFLAGS) | |
369fba30 DE |
106 | |
107 | # start-sanitize-m32rx | |
108 | # M32RX objs | |
109 | ||
177dedfb | 110 | m32rx.o: m32rx.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpux.h decodex.h |
b8a9943d | 111 | |
fafce69a | 112 | # FIXME: Use of `mono' is wip. |
369fba30 DE |
113 | mloopx.c: $(srcdir)/../common/genmloop.sh mloopx.in Makefile |
114 | rm -f mloopx.c | |
b8a9943d | 115 | $(SHELL) $(srcdir)/../common/genmloop.sh $(SHELL) \ |
0e701ac3 | 116 | -mono -no-scache -no-fast -parallel \ |
b8a9943d DE |
117 | m32r $(srcdir)/mloopx.in \ |
118 | | sed -e 's/@cpu@/m32rx/' -e 's/@CPU@/M32RX/' >mloopx.c | |
177dedfb | 119 | mloopx.o: mloopx.c readx.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpux.h decodex.h |
fafce69a | 120 | |
177dedfb DE |
121 | cpux.o: cpux.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpux.h decodex.h |
122 | decodex.o: decodex.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpux.h decodex.h | |
123 | semx.o: semx.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpux.h decodex.h | |
124 | modelx.o: modelx.c $(INCLUDE_DEPS) cpux.h decodex.h | |
369fba30 | 125 | # end-sanitize-m32rx |
fafce69a AC |
126 | |
127 | m32r-clean: | |
369fba30 DE |
128 | rm -f mloop.c stamp-arch stamp-cpu stamp-decode |
129 | # start-sanitize-m32rx | |
130 | rm -f mloopx.c stamp-xcpu stamp-xdecode | |
131 | # end-sanitize-m32rx | |
132 | rm -f tmp-* | |
133 | ||
134 | # start-sanitize-cygnus | |
177dedfb DE |
135 | # cgen support, enable with --enable-cgen-maint |
136 | CGEN_MAINT = ; @true | |
137 | # The following line is commented in or out depending upon --enable-cgen-maint. | |
138 | @cgen_maint@CGEN_MAINT = | |
369fba30 DE |
139 | |
140 | stamp-arch: $(CGEN_MAIN_SCM) $(srccgen)/m32r.cpu | |
141 | $(MAKE) cgen-arch | |
142 | touch stamp-arch | |
177dedfb | 143 | arch.h arch.c cpuall.h: $(CGEN_MAINT) stamp-arch |
369fba30 DE |
144 | @true |
145 | ||
146 | stamp-cpu: $(CGEN_MAIN_SCM) $(CGEN_CPU_SCM) $(srccgen)/m32r.cpu | |
147 | $(MAKE) cgen-cpu cpu=m32r mach=m32r SUFFIX= FLAGS="with-scache,with-profile fn" EXTRAFILES="$(CGEN_CPU_EXTR) $(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)" | |
148 | touch stamp-cpu | |
177dedfb | 149 | cpu.h extract.c sem.c sem-switch.c model.c: $(CGEN_MAINT) stamp-cpu |
369fba30 DE |
150 | @true |
151 | ||
152 | stamp-decode: $(CGEN_MAIN_SCM) $(CGEN_DECODE_SCM) $(srccgen)/m32r.cpu | |
153 | $(MAKE) cgen-decode cpu=m32r mach=m32r SUFFIX= FLAGS="with-scache,with-profile fn" | |
154 | touch stamp-decode | |
177dedfb | 155 | decode.h decode.c: $(CGEN_MAINT) stamp-decode |
369fba30 | 156 | @true |
177dedfb | 157 | # end-sanitize-cygnus |
369fba30 DE |
158 | |
159 | # start-sanitize-m32rx | |
160 | stamp-xcpu: $(CGEN_MAIN_SCM) $(CGEN_CPU_SCM) $(srccgen)/m32r.cpu | |
177dedfb | 161 | $(MAKE) cgen-cpu cpu=m32rx mach=m32rx SUFFIX=x FLAGS="with-profile fn" EXTRAFILES="$(CGEN_CPU_READ) $(CGEN_CPU_SEM)" |
369fba30 | 162 | touch stamp-xcpu |
177dedfb | 163 | cpux.h readx.c semx.c modelx.c: $(CGEN_MAINT) stamp-xcpu |
369fba30 DE |
164 | @true |
165 | ||
166 | stamp-xdecode: $(CGEN_MAIN_SCM) $(CGEN_DECODE_SCM) $(srccgen)/m32r.cpu | |
167 | $(MAKE) cgen-decode cpu=m32rx mach=m32rx SUFFIX=x | |
168 | touch stamp-xdecode | |
177dedfb | 169 | decodex.h decodex.c: $(CGEN_MAINT) stamp-xdecode |
369fba30 DE |
170 | @true |
171 | # end-sanitize-m32rx |