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1 | # Makefile template for Configure for the m32r simulator |
2 | # Copyright (C) 1996, 1997 Free Software Foundation, Inc. | |
3 | # Contributed by Cygnus Support. | |
4 | # | |
5 | # This file is part of GDB, the GNU debugger. | |
6 | # | |
7 | # This program is free software; you can redistribute it and/or modify | |
8 | # it under the terms of the GNU General Public License as published by | |
9 | # the Free Software Foundation; either version 2 of the License, or | |
10 | # (at your option) any later version. | |
11 | # | |
12 | # This program is distributed in the hope that it will be useful, | |
13 | # but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | # GNU General Public License for more details. | |
16 | # | |
17 | # You should have received a copy of the GNU General Public License along | |
18 | # with this program; if not, write to the Free Software Foundation, Inc., | |
19 | # 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. | |
20 | ||
21 | ## COMMON_PRE_CONFIG_FRAG | |
22 | ||
23 | SIM_OBJS = sim-if.o m32r.o mainloop.o \ | |
24 | decode.o extract.o semantics.o seman-cache.o model.o \ | |
25 | sim-io.o sim-utils.o sim-load.o sim-abort.o sim-watch.o \ | |
26 | sim-module.o sim-options.o sim-trace.o sim-profile.o sim-model.o \ | |
27 | sim-core.o sim-events.o sim-endian.o sim-bits.o sim-config.o \ | |
28 | sim-hload.o \ | |
29 | cgen-utils.o cgen-trace.o cgen-scache.o | |
30 | ||
31 | # Extra headers included by sim-main.h. | |
32 | SIM_EXTRA_DEPS = \ | |
33 | $(srcdir)/../common/cgen-types.h \ | |
34 | $(srcdir)/../common/cgen-sim.h \ | |
35 | $(srcdir)/../common/cgen-trace.h \ | |
36 | arch-defs.h | |
37 | ||
38 | SIM_ENDIAN = @sim_endian@ | |
39 | SIM_HOSTENDIAN = @sim_hostendian@ | |
40 | SIM_SCACHE = @sim_scache@ | |
41 | SIM_DEFAULT_MODEL = @sim_default_model@ | |
42 | SIM_EXTRA_CFLAGS = \ | |
43 | $(SIM_ENDIAN) $(SIM_HOSTENDIAN) \ | |
44 | $(SIM_SCACHE) $(SIM_DEFAULT_MODEL) | |
45 | ||
46 | SIM_RUN_OBJS = nrun.o | |
47 | SIM_EXTRA_CLEAN = m32r-clean | |
48 | ||
49 | ## COMMON_POST_CONFIG_FRAG | |
50 | ||
51 | CPU = m32r | |
52 | MAIN_INCLUDE_DEPS = \ | |
53 | sim-main.h \ | |
54 | $(srcdir)/../common/sim-config.h \ | |
55 | $(srcdir)/../common/sim-base.h \ | |
56 | $(srcdir)/../common/sim-basics.h \ | |
57 | $(srcdir)/../common/sim-module.h \ | |
58 | $(srcdir)/../common/sim-trace.h \ | |
59 | $(srcdir)/../common/sim-profile.h \ | |
60 | tconfig.h | |
61 | INCLUDE_DEPS = $(MAIN_INCLUDE_DEPS) $(SIM_EXTRA_DEPS) cpu-sim.h | |
62 | OPS_INCLUDE_DEPS = mem-ops.h sem-ops.h | |
63 | ||
64 | sim-if.o: sim-if.c $(INCLUDE_DEPS) $(srcdir)/../common/sim-core.h | |
65 | m32r.o: m32r.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) | |
66 | ||
67 | # FIXME: Use of `mono' is wip. | |
68 | mainloop.c: $(srcdir)/../common/genmloop.sh mainloop.in | |
69 | rm -f mainloop.c | |
70 | $(SHELL) $(srcdir)/../common/genmloop.sh mono $(CPU) $(srcdir)/mainloop.in >mainloop.c | |
71 | mainloop.o: mainloop.c sem-switch.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) \ | |
72 | $(srcdir)/../common/cgen-scache.h | |
73 | ||
74 | decode.o: decode.c decode.h $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpu-opc.h | |
75 | extract.o: extract.c decode.h $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) | |
76 | semantics.o: semantics.c decode.h $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) | |
77 | model.o: model.c $(INCLUDE_DEPS) cpu-opc.h | |
78 | ||
79 | # wip | |
80 | #extr-cache.o: extract.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) | |
81 | # $(CC) -c $(srcdir)/extract.c -o extr-cache.o -DSCACHE_P $(ALL_CFLAGS) | |
82 | seman-cache.o: semantics.c decode.h $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) | |
83 | $(CC) -c $(srcdir)/semantics.c -o seman-cache.o -DSCACHE_P $(ALL_CFLAGS) | |
84 | ||
85 | m32r-clean: | |
86 | rm -f mainloop.c |