projects / deliverable / binutils-gdb.git / blame
| Commit | Line | Data |
|---|---|---|
| c906108c SS |
1 | /* Simulator header for m32r. |
| 2 | ||
| 3 | THIS FILE IS MACHINE GENERATED WITH CGEN. | |
| 4 | ||
| 5 | Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc. | |
| 6 | ||
| 7 | This file is part of the GNU Simulators. | |
| 8 | ||
| 9 | This program is free software; you can redistribute it and/or modify | |
| 10 | it under the terms of the GNU General Public License as published by | |
| 11 | the Free Software Foundation; either version 2, or (at your option) | |
| 12 | any later version. | |
| 13 | ||
| 14 | This program is distributed in the hope that it will be useful, | |
| 15 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 16 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 17 | GNU General Public License for more details. | |
| 18 | ||
| 19 | You should have received a copy of the GNU General Public License along | |
| 20 | with this program; if not, write to the Free Software Foundation, Inc., | |
| 21 | 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. | |
| 22 | ||
| 23 | */ | |
| 24 | ||
| 25 | #ifndef M32R_ARCH_H | |
| 26 | #define M32R_ARCH_H | |
| 27 | ||
| 28 | #define TARGET_BIG_ENDIAN 1 | |
| 29 | ||
| 30 | /* Cover fns for register access. */ | |
| 31 | USI a_m32r_h_pc_get (SIM_CPU *); | |
| 32 | void a_m32r_h_pc_set (SIM_CPU *, USI); | |
| 33 | SI a_m32r_h_gr_get (SIM_CPU *, UINT); | |
| 34 | void a_m32r_h_gr_set (SIM_CPU *, UINT, SI); | |
| 35 | USI a_m32r_h_cr_get (SIM_CPU *, UINT); | |
| 36 | void a_m32r_h_cr_set (SIM_CPU *, UINT, USI); | |
| 37 | DI a_m32r_h_accum_get (SIM_CPU *); | |
| 38 | void a_m32r_h_accum_set (SIM_CPU *, DI); | |
| 39 | DI a_m32r_h_accums_get (SIM_CPU *, UINT); | |
| 40 | void a_m32r_h_accums_set (SIM_CPU *, UINT, DI); | |
| 41 | BI a_m32r_h_cond_get (SIM_CPU *); | |
| 42 | void a_m32r_h_cond_set (SIM_CPU *, BI); | |
| 43 | UQI a_m32r_h_psw_get (SIM_CPU *); | |
| 44 | void a_m32r_h_psw_set (SIM_CPU *, UQI); | |
| 45 | UQI a_m32r_h_bpsw_get (SIM_CPU *); | |
| 46 | void a_m32r_h_bpsw_set (SIM_CPU *, UQI); | |
| 47 | UQI a_m32r_h_bbpsw_get (SIM_CPU *); | |
| 48 | void a_m32r_h_bbpsw_set (SIM_CPU *, UQI); | |
| 49 | BI a_m32r_h_lock_get (SIM_CPU *); | |
| 50 | void a_m32r_h_lock_set (SIM_CPU *, BI); | |
| 51 | ||
| 52 | /* Enum declaration for model types. */ | |
| 53 | typedef enum model_type { | |
| 54 | MODEL_M32R_D, MODEL_TEST | |
| 55 | , MODEL_MAX | |
| 56 | } MODEL_TYPE; | |
| 57 | ||
| 58 | #define MAX_MODELS ((int) MODEL_MAX) | |
| 59 | ||
| 60 | /* Enum declaration for unit types. */ | |
| 61 | typedef enum unit_type { | |
| 62 | UNIT_NONE, UNIT_M32R_D_U_STORE, UNIT_M32R_D_U_LOAD, UNIT_M32R_D_U_CTI | |
| 63 | , UNIT_M32R_D_U_MAC, UNIT_M32R_D_U_CMP, UNIT_M32R_D_U_EXEC, UNIT_TEST_U_EXEC | |
| 64 | , UNIT_MAX | |
| 65 | } UNIT_TYPE; | |
| 66 | ||
| 67 | #define MAX_UNITS (2) | |
| 68 | ||
| 69 | #endif /* M32R_ARCH_H */ |