Commit | Line | Data |
---|---|---|
c906108c SS |
1 | /* Simulator instruction decoder for m32rbf. |
2 | ||
3 | THIS FILE IS MACHINE GENERATED WITH CGEN. | |
4 | ||
16b47b25 | 5 | Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc. |
c906108c | 6 | |
378af1d6 | 7 | This file is part of the GNU simulators. |
c906108c SS |
8 | |
9 | This program is free software; you can redistribute it and/or modify | |
10 | it under the terms of the GNU General Public License as published by | |
11 | the Free Software Foundation; either version 2, or (at your option) | |
12 | any later version. | |
13 | ||
14 | This program is distributed in the hope that it will be useful, | |
15 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | GNU General Public License for more details. | |
18 | ||
19 | You should have received a copy of the GNU General Public License along | |
20 | with this program; if not, write to the Free Software Foundation, Inc., | |
21 | 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. | |
22 | ||
23 | */ | |
24 | ||
25 | #define WANT_CPU m32rbf | |
26 | #define WANT_CPU_M32RBF | |
27 | ||
28 | #include "sim-main.h" | |
29 | #include "sim-assert.h" | |
30 | ||
c906108c SS |
31 | /* The instruction descriptor array. |
32 | This is computed at runtime. Space for it is not malloc'd to save a | |
33 | teensy bit of cpu in the decoder. Moving it to malloc space is trivial | |
34 | but won't be done until necessary (we don't currently support the runtime | |
35 | addition of instructions nor an SMP machine with different cpus). */ | |
57465455 | 36 | static IDESC m32rbf_insn_data[M32RBF_INSN__MAX]; |
c906108c | 37 | |
c906108c SS |
38 | /* Commas between elements are contained in the macros. |
39 | Some of these are conditionally compiled out. */ | |
40 | ||
41 | static const struct insn_sem m32rbf_insn_sem[] = | |
42 | { | |
96baa820 JM |
43 | { VIRTUAL_INSN_X_INVALID, M32RBF_INSN_X_INVALID, M32RBF_SFMT_EMPTY }, |
44 | { VIRTUAL_INSN_X_AFTER, M32RBF_INSN_X_AFTER, M32RBF_SFMT_EMPTY }, | |
45 | { VIRTUAL_INSN_X_BEFORE, M32RBF_INSN_X_BEFORE, M32RBF_SFMT_EMPTY }, | |
46 | { VIRTUAL_INSN_X_CTI_CHAIN, M32RBF_INSN_X_CTI_CHAIN, M32RBF_SFMT_EMPTY }, | |
47 | { VIRTUAL_INSN_X_CHAIN, M32RBF_INSN_X_CHAIN, M32RBF_SFMT_EMPTY }, | |
48 | { VIRTUAL_INSN_X_BEGIN, M32RBF_INSN_X_BEGIN, M32RBF_SFMT_EMPTY }, | |
49 | { M32R_INSN_ADD, M32RBF_INSN_ADD, M32RBF_SFMT_ADD }, | |
50 | { M32R_INSN_ADD3, M32RBF_INSN_ADD3, M32RBF_SFMT_ADD3 }, | |
51 | { M32R_INSN_AND, M32RBF_INSN_AND, M32RBF_SFMT_ADD }, | |
52 | { M32R_INSN_AND3, M32RBF_INSN_AND3, M32RBF_SFMT_AND3 }, | |
53 | { M32R_INSN_OR, M32RBF_INSN_OR, M32RBF_SFMT_ADD }, | |
54 | { M32R_INSN_OR3, M32RBF_INSN_OR3, M32RBF_SFMT_OR3 }, | |
55 | { M32R_INSN_XOR, M32RBF_INSN_XOR, M32RBF_SFMT_ADD }, | |
56 | { M32R_INSN_XOR3, M32RBF_INSN_XOR3, M32RBF_SFMT_AND3 }, | |
57 | { M32R_INSN_ADDI, M32RBF_INSN_ADDI, M32RBF_SFMT_ADDI }, | |
58 | { M32R_INSN_ADDV, M32RBF_INSN_ADDV, M32RBF_SFMT_ADDV }, | |
59 | { M32R_INSN_ADDV3, M32RBF_INSN_ADDV3, M32RBF_SFMT_ADDV3 }, | |
60 | { M32R_INSN_ADDX, M32RBF_INSN_ADDX, M32RBF_SFMT_ADDX }, | |
61 | { M32R_INSN_BC8, M32RBF_INSN_BC8, M32RBF_SFMT_BC8 }, | |
62 | { M32R_INSN_BC24, M32RBF_INSN_BC24, M32RBF_SFMT_BC24 }, | |
63 | { M32R_INSN_BEQ, M32RBF_INSN_BEQ, M32RBF_SFMT_BEQ }, | |
64 | { M32R_INSN_BEQZ, M32RBF_INSN_BEQZ, M32RBF_SFMT_BEQZ }, | |
65 | { M32R_INSN_BGEZ, M32RBF_INSN_BGEZ, M32RBF_SFMT_BEQZ }, | |
66 | { M32R_INSN_BGTZ, M32RBF_INSN_BGTZ, M32RBF_SFMT_BEQZ }, | |
67 | { M32R_INSN_BLEZ, M32RBF_INSN_BLEZ, M32RBF_SFMT_BEQZ }, | |
68 | { M32R_INSN_BLTZ, M32RBF_INSN_BLTZ, M32RBF_SFMT_BEQZ }, | |
69 | { M32R_INSN_BNEZ, M32RBF_INSN_BNEZ, M32RBF_SFMT_BEQZ }, | |
70 | { M32R_INSN_BL8, M32RBF_INSN_BL8, M32RBF_SFMT_BL8 }, | |
71 | { M32R_INSN_BL24, M32RBF_INSN_BL24, M32RBF_SFMT_BL24 }, | |
72 | { M32R_INSN_BNC8, M32RBF_INSN_BNC8, M32RBF_SFMT_BC8 }, | |
73 | { M32R_INSN_BNC24, M32RBF_INSN_BNC24, M32RBF_SFMT_BC24 }, | |
74 | { M32R_INSN_BNE, M32RBF_INSN_BNE, M32RBF_SFMT_BEQ }, | |
75 | { M32R_INSN_BRA8, M32RBF_INSN_BRA8, M32RBF_SFMT_BRA8 }, | |
76 | { M32R_INSN_BRA24, M32RBF_INSN_BRA24, M32RBF_SFMT_BRA24 }, | |
77 | { M32R_INSN_CMP, M32RBF_INSN_CMP, M32RBF_SFMT_CMP }, | |
78 | { M32R_INSN_CMPI, M32RBF_INSN_CMPI, M32RBF_SFMT_CMPI }, | |
79 | { M32R_INSN_CMPU, M32RBF_INSN_CMPU, M32RBF_SFMT_CMP }, | |
80 | { M32R_INSN_CMPUI, M32RBF_INSN_CMPUI, M32RBF_SFMT_CMPI }, | |
81 | { M32R_INSN_DIV, M32RBF_INSN_DIV, M32RBF_SFMT_DIV }, | |
82 | { M32R_INSN_DIVU, M32RBF_INSN_DIVU, M32RBF_SFMT_DIV }, | |
83 | { M32R_INSN_REM, M32RBF_INSN_REM, M32RBF_SFMT_DIV }, | |
84 | { M32R_INSN_REMU, M32RBF_INSN_REMU, M32RBF_SFMT_DIV }, | |
85 | { M32R_INSN_JL, M32RBF_INSN_JL, M32RBF_SFMT_JL }, | |
86 | { M32R_INSN_JMP, M32RBF_INSN_JMP, M32RBF_SFMT_JMP }, | |
87 | { M32R_INSN_LD, M32RBF_INSN_LD, M32RBF_SFMT_LD }, | |
88 | { M32R_INSN_LD_D, M32RBF_INSN_LD_D, M32RBF_SFMT_LD_D }, | |
378af1d6 DB |
89 | { M32R_INSN_LDB, M32RBF_INSN_LDB, M32RBF_SFMT_LDB }, |
90 | { M32R_INSN_LDB_D, M32RBF_INSN_LDB_D, M32RBF_SFMT_LDB_D }, | |
91 | { M32R_INSN_LDH, M32RBF_INSN_LDH, M32RBF_SFMT_LDH }, | |
92 | { M32R_INSN_LDH_D, M32RBF_INSN_LDH_D, M32RBF_SFMT_LDH_D }, | |
93 | { M32R_INSN_LDUB, M32RBF_INSN_LDUB, M32RBF_SFMT_LDB }, | |
94 | { M32R_INSN_LDUB_D, M32RBF_INSN_LDUB_D, M32RBF_SFMT_LDB_D }, | |
95 | { M32R_INSN_LDUH, M32RBF_INSN_LDUH, M32RBF_SFMT_LDH }, | |
96 | { M32R_INSN_LDUH_D, M32RBF_INSN_LDUH_D, M32RBF_SFMT_LDH_D }, | |
96baa820 JM |
97 | { M32R_INSN_LD_PLUS, M32RBF_INSN_LD_PLUS, M32RBF_SFMT_LD_PLUS }, |
98 | { M32R_INSN_LD24, M32RBF_INSN_LD24, M32RBF_SFMT_LD24 }, | |
99 | { M32R_INSN_LDI8, M32RBF_INSN_LDI8, M32RBF_SFMT_LDI8 }, | |
100 | { M32R_INSN_LDI16, M32RBF_INSN_LDI16, M32RBF_SFMT_LDI16 }, | |
101 | { M32R_INSN_LOCK, M32RBF_INSN_LOCK, M32RBF_SFMT_LOCK }, | |
102 | { M32R_INSN_MACHI, M32RBF_INSN_MACHI, M32RBF_SFMT_MACHI }, | |
103 | { M32R_INSN_MACLO, M32RBF_INSN_MACLO, M32RBF_SFMT_MACHI }, | |
104 | { M32R_INSN_MACWHI, M32RBF_INSN_MACWHI, M32RBF_SFMT_MACHI }, | |
105 | { M32R_INSN_MACWLO, M32RBF_INSN_MACWLO, M32RBF_SFMT_MACHI }, | |
106 | { M32R_INSN_MUL, M32RBF_INSN_MUL, M32RBF_SFMT_ADD }, | |
107 | { M32R_INSN_MULHI, M32RBF_INSN_MULHI, M32RBF_SFMT_MULHI }, | |
108 | { M32R_INSN_MULLO, M32RBF_INSN_MULLO, M32RBF_SFMT_MULHI }, | |
109 | { M32R_INSN_MULWHI, M32RBF_INSN_MULWHI, M32RBF_SFMT_MULHI }, | |
110 | { M32R_INSN_MULWLO, M32RBF_INSN_MULWLO, M32RBF_SFMT_MULHI }, | |
111 | { M32R_INSN_MV, M32RBF_INSN_MV, M32RBF_SFMT_MV }, | |
112 | { M32R_INSN_MVFACHI, M32RBF_INSN_MVFACHI, M32RBF_SFMT_MVFACHI }, | |
113 | { M32R_INSN_MVFACLO, M32RBF_INSN_MVFACLO, M32RBF_SFMT_MVFACHI }, | |
114 | { M32R_INSN_MVFACMI, M32RBF_INSN_MVFACMI, M32RBF_SFMT_MVFACHI }, | |
115 | { M32R_INSN_MVFC, M32RBF_INSN_MVFC, M32RBF_SFMT_MVFC }, | |
116 | { M32R_INSN_MVTACHI, M32RBF_INSN_MVTACHI, M32RBF_SFMT_MVTACHI }, | |
117 | { M32R_INSN_MVTACLO, M32RBF_INSN_MVTACLO, M32RBF_SFMT_MVTACHI }, | |
118 | { M32R_INSN_MVTC, M32RBF_INSN_MVTC, M32RBF_SFMT_MVTC }, | |
119 | { M32R_INSN_NEG, M32RBF_INSN_NEG, M32RBF_SFMT_MV }, | |
120 | { M32R_INSN_NOP, M32RBF_INSN_NOP, M32RBF_SFMT_NOP }, | |
121 | { M32R_INSN_NOT, M32RBF_INSN_NOT, M32RBF_SFMT_MV }, | |
122 | { M32R_INSN_RAC, M32RBF_INSN_RAC, M32RBF_SFMT_RAC }, | |
123 | { M32R_INSN_RACH, M32RBF_INSN_RACH, M32RBF_SFMT_RAC }, | |
124 | { M32R_INSN_RTE, M32RBF_INSN_RTE, M32RBF_SFMT_RTE }, | |
125 | { M32R_INSN_SETH, M32RBF_INSN_SETH, M32RBF_SFMT_SETH }, | |
126 | { M32R_INSN_SLL, M32RBF_INSN_SLL, M32RBF_SFMT_ADD }, | |
127 | { M32R_INSN_SLL3, M32RBF_INSN_SLL3, M32RBF_SFMT_SLL3 }, | |
128 | { M32R_INSN_SLLI, M32RBF_INSN_SLLI, M32RBF_SFMT_SLLI }, | |
129 | { M32R_INSN_SRA, M32RBF_INSN_SRA, M32RBF_SFMT_ADD }, | |
130 | { M32R_INSN_SRA3, M32RBF_INSN_SRA3, M32RBF_SFMT_SLL3 }, | |
131 | { M32R_INSN_SRAI, M32RBF_INSN_SRAI, M32RBF_SFMT_SLLI }, | |
132 | { M32R_INSN_SRL, M32RBF_INSN_SRL, M32RBF_SFMT_ADD }, | |
133 | { M32R_INSN_SRL3, M32RBF_INSN_SRL3, M32RBF_SFMT_SLL3 }, | |
134 | { M32R_INSN_SRLI, M32RBF_INSN_SRLI, M32RBF_SFMT_SLLI }, | |
135 | { M32R_INSN_ST, M32RBF_INSN_ST, M32RBF_SFMT_ST }, | |
136 | { M32R_INSN_ST_D, M32RBF_INSN_ST_D, M32RBF_SFMT_ST_D }, | |
137 | { M32R_INSN_STB, M32RBF_INSN_STB, M32RBF_SFMT_STB }, | |
138 | { M32R_INSN_STB_D, M32RBF_INSN_STB_D, M32RBF_SFMT_STB_D }, | |
139 | { M32R_INSN_STH, M32RBF_INSN_STH, M32RBF_SFMT_STH }, | |
140 | { M32R_INSN_STH_D, M32RBF_INSN_STH_D, M32RBF_SFMT_STH_D }, | |
141 | { M32R_INSN_ST_PLUS, M32RBF_INSN_ST_PLUS, M32RBF_SFMT_ST_PLUS }, | |
142 | { M32R_INSN_ST_MINUS, M32RBF_INSN_ST_MINUS, M32RBF_SFMT_ST_PLUS }, | |
143 | { M32R_INSN_SUB, M32RBF_INSN_SUB, M32RBF_SFMT_ADD }, | |
144 | { M32R_INSN_SUBV, M32RBF_INSN_SUBV, M32RBF_SFMT_ADDV }, | |
145 | { M32R_INSN_SUBX, M32RBF_INSN_SUBX, M32RBF_SFMT_ADDX }, | |
146 | { M32R_INSN_TRAP, M32RBF_INSN_TRAP, M32RBF_SFMT_TRAP }, | |
147 | { M32R_INSN_UNLOCK, M32RBF_INSN_UNLOCK, M32RBF_SFMT_UNLOCK }, | |
16b47b25 NC |
148 | { M32R_INSN_CLRPSW, M32RBF_INSN_CLRPSW, M32RBF_SFMT_CLRPSW }, |
149 | { M32R_INSN_SETPSW, M32RBF_INSN_SETPSW, M32RBF_SFMT_SETPSW }, | |
150 | { M32R_INSN_BSET, M32RBF_INSN_BSET, M32RBF_SFMT_BSET }, | |
151 | { M32R_INSN_BCLR, M32RBF_INSN_BCLR, M32RBF_SFMT_BSET }, | |
152 | { M32R_INSN_BTST, M32RBF_INSN_BTST, M32RBF_SFMT_BTST }, | |
c906108c SS |
153 | }; |
154 | ||
96baa820 JM |
155 | static const struct insn_sem m32rbf_insn_sem_invalid = { |
156 | VIRTUAL_INSN_X_INVALID, M32RBF_INSN_X_INVALID, M32RBF_SFMT_EMPTY | |
c906108c SS |
157 | }; |
158 | ||
c906108c SS |
159 | /* Initialize an IDESC from the compile-time computable parts. */ |
160 | ||
161 | static INLINE void | |
162 | init_idesc (SIM_CPU *cpu, IDESC *id, const struct insn_sem *t) | |
163 | { | |
164 | const CGEN_INSN *insn_table = CGEN_CPU_INSN_TABLE (CPU_CPU_DESC (cpu))->init_entries; | |
165 | ||
166 | id->num = t->index; | |
96baa820 | 167 | id->sfmt = t->sfmt; |
c906108c SS |
168 | if ((int) t->type <= 0) |
169 | id->idata = & cgen_virtual_insn_table[- (int) t->type]; | |
170 | else | |
171 | id->idata = & insn_table[t->type]; | |
172 | id->attrs = CGEN_INSN_ATTRS (id->idata); | |
173 | /* Oh my god, a magic number. */ | |
174 | id->length = CGEN_INSN_BITSIZE (id->idata) / 8; | |
96baa820 | 175 | |
c906108c SS |
176 | #if WITH_PROFILE_MODEL_P |
177 | id->timing = & MODEL_TIMING (CPU_MODEL (cpu)) [t->index]; | |
178 | { | |
179 | SIM_DESC sd = CPU_STATE (cpu); | |
180 | SIM_ASSERT (t->index == id->timing->num); | |
181 | } | |
182 | #endif | |
96baa820 JM |
183 | |
184 | /* Semantic pointers are initialized elsewhere. */ | |
c906108c SS |
185 | } |
186 | ||
187 | /* Initialize the instruction descriptor table. */ | |
188 | ||
189 | void | |
190 | m32rbf_init_idesc_table (SIM_CPU *cpu) | |
191 | { | |
192 | IDESC *id,*tabend; | |
193 | const struct insn_sem *t,*tend; | |
57465455 | 194 | int tabsize = M32RBF_INSN__MAX; |
c906108c SS |
195 | IDESC *table = m32rbf_insn_data; |
196 | ||
197 | memset (table, 0, tabsize * sizeof (IDESC)); | |
198 | ||
199 | /* First set all entries to the `invalid insn'. */ | |
200 | t = & m32rbf_insn_sem_invalid; | |
201 | for (id = table, tabend = table + tabsize; id < tabend; ++id) | |
202 | init_idesc (cpu, id, t); | |
203 | ||
204 | /* Now fill in the values for the chosen cpu. */ | |
205 | for (t = m32rbf_insn_sem, tend = t + sizeof (m32rbf_insn_sem) / sizeof (*t); | |
206 | t != tend; ++t) | |
207 | { | |
208 | init_idesc (cpu, & table[t->index], t); | |
209 | } | |
210 | ||
211 | /* Link the IDESC table into the cpu. */ | |
212 | CPU_IDESC (cpu) = table; | |
213 | } | |
214 | ||
c906108c SS |
215 | /* Given an instruction, return a pointer to its IDESC entry. */ |
216 | ||
217 | const IDESC * | |
218 | m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, | |
219 | CGEN_INSN_INT base_insn, CGEN_INSN_INT entire_insn, | |
220 | ARGBUF *abuf) | |
221 | { | |
7a292a7a SS |
222 | /* Result of decoder. */ |
223 | M32RBF_INSN_TYPE itype; | |
c906108c SS |
224 | |
225 | { | |
c906108c | 226 | CGEN_INSN_INT insn = base_insn; |
c906108c SS |
227 | |
228 | { | |
7a292a7a SS |
229 | unsigned int val = (((insn >> 8) & (15 << 4)) | ((insn >> 4) & (15 << 0))); |
230 | switch (val) | |
231 | { | |
57465455 DE |
232 | case 0 : itype = M32RBF_INSN_SUBV; goto extract_sfmt_addv; |
233 | case 1 : itype = M32RBF_INSN_SUBX; goto extract_sfmt_addx; | |
234 | case 2 : itype = M32RBF_INSN_SUB; goto extract_sfmt_add; | |
235 | case 3 : itype = M32RBF_INSN_NEG; goto extract_sfmt_mv; | |
236 | case 4 : itype = M32RBF_INSN_CMP; goto extract_sfmt_cmp; | |
237 | case 5 : itype = M32RBF_INSN_CMPU; goto extract_sfmt_cmp; | |
238 | case 8 : itype = M32RBF_INSN_ADDV; goto extract_sfmt_addv; | |
239 | case 9 : itype = M32RBF_INSN_ADDX; goto extract_sfmt_addx; | |
240 | case 10 : itype = M32RBF_INSN_ADD; goto extract_sfmt_add; | |
241 | case 11 : itype = M32RBF_INSN_NOT; goto extract_sfmt_mv; | |
242 | case 12 : itype = M32RBF_INSN_AND; goto extract_sfmt_add; | |
243 | case 13 : itype = M32RBF_INSN_XOR; goto extract_sfmt_add; | |
244 | case 14 : itype = M32RBF_INSN_OR; goto extract_sfmt_add; | |
16b47b25 | 245 | case 15 : itype = M32RBF_INSN_BTST; goto extract_sfmt_btst; |
57465455 DE |
246 | case 16 : itype = M32RBF_INSN_SRL; goto extract_sfmt_add; |
247 | case 18 : itype = M32RBF_INSN_SRA; goto extract_sfmt_add; | |
248 | case 20 : itype = M32RBF_INSN_SLL; goto extract_sfmt_add; | |
249 | case 22 : itype = M32RBF_INSN_MUL; goto extract_sfmt_add; | |
250 | case 24 : itype = M32RBF_INSN_MV; goto extract_sfmt_mv; | |
251 | case 25 : itype = M32RBF_INSN_MVFC; goto extract_sfmt_mvfc; | |
252 | case 26 : itype = M32RBF_INSN_MVTC; goto extract_sfmt_mvtc; | |
378af1d6 | 253 | case 28 : |
c906108c | 254 | { |
55552082 | 255 | unsigned int val = (((insn >> 8) & (1 << 0))); |
7a292a7a | 256 | switch (val) |
c906108c | 257 | { |
57465455 DE |
258 | case 0 : itype = M32RBF_INSN_JL; goto extract_sfmt_jl; |
259 | case 1 : itype = M32RBF_INSN_JMP; goto extract_sfmt_jmp; | |
378af1d6 | 260 | default : itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty; |
c906108c | 261 | } |
7a292a7a | 262 | } |
57465455 DE |
263 | case 29 : itype = M32RBF_INSN_RTE; goto extract_sfmt_rte; |
264 | case 31 : itype = M32RBF_INSN_TRAP; goto extract_sfmt_trap; | |
265 | case 32 : itype = M32RBF_INSN_STB; goto extract_sfmt_stb; | |
266 | case 34 : itype = M32RBF_INSN_STH; goto extract_sfmt_sth; | |
267 | case 36 : itype = M32RBF_INSN_ST; goto extract_sfmt_st; | |
268 | case 37 : itype = M32RBF_INSN_UNLOCK; goto extract_sfmt_unlock; | |
269 | case 38 : itype = M32RBF_INSN_ST_PLUS; goto extract_sfmt_st_plus; | |
270 | case 39 : itype = M32RBF_INSN_ST_MINUS; goto extract_sfmt_st_plus; | |
271 | case 40 : itype = M32RBF_INSN_LDB; goto extract_sfmt_ldb; | |
272 | case 41 : itype = M32RBF_INSN_LDUB; goto extract_sfmt_ldb; | |
273 | case 42 : itype = M32RBF_INSN_LDH; goto extract_sfmt_ldh; | |
274 | case 43 : itype = M32RBF_INSN_LDUH; goto extract_sfmt_ldh; | |
275 | case 44 : itype = M32RBF_INSN_LD; goto extract_sfmt_ld; | |
276 | case 45 : itype = M32RBF_INSN_LOCK; goto extract_sfmt_lock; | |
277 | case 46 : itype = M32RBF_INSN_LD_PLUS; goto extract_sfmt_ld_plus; | |
278 | case 48 : itype = M32RBF_INSN_MULHI; goto extract_sfmt_mulhi; | |
279 | case 49 : itype = M32RBF_INSN_MULLO; goto extract_sfmt_mulhi; | |
280 | case 50 : itype = M32RBF_INSN_MULWHI; goto extract_sfmt_mulhi; | |
281 | case 51 : itype = M32RBF_INSN_MULWLO; goto extract_sfmt_mulhi; | |
282 | case 52 : itype = M32RBF_INSN_MACHI; goto extract_sfmt_machi; | |
283 | case 53 : itype = M32RBF_INSN_MACLO; goto extract_sfmt_machi; | |
284 | case 54 : itype = M32RBF_INSN_MACWHI; goto extract_sfmt_machi; | |
285 | case 55 : itype = M32RBF_INSN_MACWLO; goto extract_sfmt_machi; | |
378af1d6 | 286 | case 64 : /* fall through */ |
7a292a7a SS |
287 | case 65 : /* fall through */ |
288 | case 66 : /* fall through */ | |
289 | case 67 : /* fall through */ | |
290 | case 68 : /* fall through */ | |
291 | case 69 : /* fall through */ | |
292 | case 70 : /* fall through */ | |
293 | case 71 : /* fall through */ | |
294 | case 72 : /* fall through */ | |
295 | case 73 : /* fall through */ | |
296 | case 74 : /* fall through */ | |
297 | case 75 : /* fall through */ | |
298 | case 76 : /* fall through */ | |
299 | case 77 : /* fall through */ | |
300 | case 78 : /* fall through */ | |
57465455 | 301 | case 79 : itype = M32RBF_INSN_ADDI; goto extract_sfmt_addi; |
378af1d6 | 302 | case 80 : /* fall through */ |
57465455 | 303 | case 81 : itype = M32RBF_INSN_SRLI; goto extract_sfmt_slli; |
378af1d6 | 304 | case 82 : /* fall through */ |
57465455 | 305 | case 83 : itype = M32RBF_INSN_SRAI; goto extract_sfmt_slli; |
378af1d6 | 306 | case 84 : /* fall through */ |
57465455 | 307 | case 85 : itype = M32RBF_INSN_SLLI; goto extract_sfmt_slli; |
378af1d6 | 308 | case 87 : |
7a292a7a | 309 | { |
55552082 | 310 | unsigned int val = (((insn >> 0) & (1 << 0))); |
7a292a7a | 311 | switch (val) |
c906108c | 312 | { |
57465455 DE |
313 | case 0 : itype = M32RBF_INSN_MVTACHI; goto extract_sfmt_mvtachi; |
314 | case 1 : itype = M32RBF_INSN_MVTACLO; goto extract_sfmt_mvtachi; | |
378af1d6 | 315 | default : itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty; |
c906108c | 316 | } |
7a292a7a | 317 | } |
57465455 DE |
318 | case 88 : itype = M32RBF_INSN_RACH; goto extract_sfmt_rac; |
319 | case 89 : itype = M32RBF_INSN_RAC; goto extract_sfmt_rac; | |
378af1d6 | 320 | case 95 : |
7a292a7a | 321 | { |
55552082 | 322 | unsigned int val = (((insn >> 0) & (3 << 0))); |
7a292a7a | 323 | switch (val) |
c906108c | 324 | { |
57465455 DE |
325 | case 0 : itype = M32RBF_INSN_MVFACHI; goto extract_sfmt_mvfachi; |
326 | case 1 : itype = M32RBF_INSN_MVFACLO; goto extract_sfmt_mvfachi; | |
327 | case 2 : itype = M32RBF_INSN_MVFACMI; goto extract_sfmt_mvfachi; | |
378af1d6 | 328 | default : itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty; |
c906108c | 329 | } |
7a292a7a SS |
330 | } |
331 | case 96 : /* fall through */ | |
332 | case 97 : /* fall through */ | |
333 | case 98 : /* fall through */ | |
334 | case 99 : /* fall through */ | |
335 | case 100 : /* fall through */ | |
336 | case 101 : /* fall through */ | |
337 | case 102 : /* fall through */ | |
338 | case 103 : /* fall through */ | |
339 | case 104 : /* fall through */ | |
340 | case 105 : /* fall through */ | |
341 | case 106 : /* fall through */ | |
342 | case 107 : /* fall through */ | |
343 | case 108 : /* fall through */ | |
344 | case 109 : /* fall through */ | |
345 | case 110 : /* fall through */ | |
57465455 | 346 | case 111 : itype = M32RBF_INSN_LDI8; goto extract_sfmt_ldi8; |
378af1d6 | 347 | case 112 : |
7a292a7a SS |
348 | { |
349 | unsigned int val = (((insn >> 8) & (15 << 0))); | |
350 | switch (val) | |
c906108c | 351 | { |
57465455 | 352 | case 0 : itype = M32RBF_INSN_NOP; goto extract_sfmt_nop; |
16b47b25 NC |
353 | case 1 : itype = M32RBF_INSN_SETPSW; goto extract_sfmt_setpsw; |
354 | case 2 : itype = M32RBF_INSN_CLRPSW; goto extract_sfmt_clrpsw; | |
57465455 DE |
355 | case 12 : itype = M32RBF_INSN_BC8; goto extract_sfmt_bc8; |
356 | case 13 : itype = M32RBF_INSN_BNC8; goto extract_sfmt_bc8; | |
357 | case 14 : itype = M32RBF_INSN_BL8; goto extract_sfmt_bl8; | |
358 | case 15 : itype = M32RBF_INSN_BRA8; goto extract_sfmt_bra8; | |
378af1d6 | 359 | default : itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty; |
c906108c | 360 | } |
7a292a7a SS |
361 | } |
362 | case 113 : /* fall through */ | |
363 | case 114 : /* fall through */ | |
364 | case 115 : /* fall through */ | |
365 | case 116 : /* fall through */ | |
366 | case 117 : /* fall through */ | |
367 | case 118 : /* fall through */ | |
368 | case 119 : /* fall through */ | |
369 | case 120 : /* fall through */ | |
370 | case 121 : /* fall through */ | |
371 | case 122 : /* fall through */ | |
372 | case 123 : /* fall through */ | |
373 | case 124 : /* fall through */ | |
374 | case 125 : /* fall through */ | |
375 | case 126 : /* fall through */ | |
376 | case 127 : | |
377 | { | |
16b47b25 | 378 | unsigned int val = (((insn >> 8) & (15 << 0))); |
7a292a7a | 379 | switch (val) |
c906108c | 380 | { |
16b47b25 NC |
381 | case 1 : itype = M32RBF_INSN_SETPSW; goto extract_sfmt_setpsw; |
382 | case 2 : itype = M32RBF_INSN_CLRPSW; goto extract_sfmt_clrpsw; | |
383 | case 12 : itype = M32RBF_INSN_BC8; goto extract_sfmt_bc8; | |
384 | case 13 : itype = M32RBF_INSN_BNC8; goto extract_sfmt_bc8; | |
385 | case 14 : itype = M32RBF_INSN_BL8; goto extract_sfmt_bl8; | |
386 | case 15 : itype = M32RBF_INSN_BRA8; goto extract_sfmt_bra8; | |
378af1d6 | 387 | default : itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty; |
c906108c | 388 | } |
7a292a7a | 389 | } |
57465455 DE |
390 | case 132 : itype = M32RBF_INSN_CMPI; goto extract_sfmt_cmpi; |
391 | case 133 : itype = M32RBF_INSN_CMPUI; goto extract_sfmt_cmpi; | |
392 | case 136 : itype = M32RBF_INSN_ADDV3; goto extract_sfmt_addv3; | |
393 | case 138 : itype = M32RBF_INSN_ADD3; goto extract_sfmt_add3; | |
394 | case 140 : itype = M32RBF_INSN_AND3; goto extract_sfmt_and3; | |
395 | case 141 : itype = M32RBF_INSN_XOR3; goto extract_sfmt_and3; | |
396 | case 142 : itype = M32RBF_INSN_OR3; goto extract_sfmt_or3; | |
397 | case 144 : itype = M32RBF_INSN_DIV; goto extract_sfmt_div; | |
398 | case 145 : itype = M32RBF_INSN_DIVU; goto extract_sfmt_div; | |
399 | case 146 : itype = M32RBF_INSN_REM; goto extract_sfmt_div; | |
400 | case 147 : itype = M32RBF_INSN_REMU; goto extract_sfmt_div; | |
401 | case 152 : itype = M32RBF_INSN_SRL3; goto extract_sfmt_sll3; | |
402 | case 154 : itype = M32RBF_INSN_SRA3; goto extract_sfmt_sll3; | |
403 | case 156 : itype = M32RBF_INSN_SLL3; goto extract_sfmt_sll3; | |
404 | case 159 : itype = M32RBF_INSN_LDI16; goto extract_sfmt_ldi16; | |
405 | case 160 : itype = M32RBF_INSN_STB_D; goto extract_sfmt_stb_d; | |
406 | case 162 : itype = M32RBF_INSN_STH_D; goto extract_sfmt_sth_d; | |
407 | case 164 : itype = M32RBF_INSN_ST_D; goto extract_sfmt_st_d; | |
16b47b25 NC |
408 | case 166 : itype = M32RBF_INSN_BSET; goto extract_sfmt_bset; |
409 | case 167 : itype = M32RBF_INSN_BCLR; goto extract_sfmt_bset; | |
57465455 DE |
410 | case 168 : itype = M32RBF_INSN_LDB_D; goto extract_sfmt_ldb_d; |
411 | case 169 : itype = M32RBF_INSN_LDUB_D; goto extract_sfmt_ldb_d; | |
412 | case 170 : itype = M32RBF_INSN_LDH_D; goto extract_sfmt_ldh_d; | |
413 | case 171 : itype = M32RBF_INSN_LDUH_D; goto extract_sfmt_ldh_d; | |
414 | case 172 : itype = M32RBF_INSN_LD_D; goto extract_sfmt_ld_d; | |
415 | case 176 : itype = M32RBF_INSN_BEQ; goto extract_sfmt_beq; | |
416 | case 177 : itype = M32RBF_INSN_BNE; goto extract_sfmt_beq; | |
417 | case 184 : itype = M32RBF_INSN_BEQZ; goto extract_sfmt_beqz; | |
418 | case 185 : itype = M32RBF_INSN_BNEZ; goto extract_sfmt_beqz; | |
419 | case 186 : itype = M32RBF_INSN_BLTZ; goto extract_sfmt_beqz; | |
420 | case 187 : itype = M32RBF_INSN_BGEZ; goto extract_sfmt_beqz; | |
421 | case 188 : itype = M32RBF_INSN_BLEZ; goto extract_sfmt_beqz; | |
422 | case 189 : itype = M32RBF_INSN_BGTZ; goto extract_sfmt_beqz; | |
423 | case 220 : itype = M32RBF_INSN_SETH; goto extract_sfmt_seth; | |
378af1d6 | 424 | case 224 : /* fall through */ |
7a292a7a SS |
425 | case 225 : /* fall through */ |
426 | case 226 : /* fall through */ | |
427 | case 227 : /* fall through */ | |
428 | case 228 : /* fall through */ | |
429 | case 229 : /* fall through */ | |
430 | case 230 : /* fall through */ | |
431 | case 231 : /* fall through */ | |
432 | case 232 : /* fall through */ | |
433 | case 233 : /* fall through */ | |
434 | case 234 : /* fall through */ | |
435 | case 235 : /* fall through */ | |
436 | case 236 : /* fall through */ | |
437 | case 237 : /* fall through */ | |
438 | case 238 : /* fall through */ | |
57465455 | 439 | case 239 : itype = M32RBF_INSN_LD24; goto extract_sfmt_ld24; |
378af1d6 | 440 | case 240 : /* fall through */ |
7a292a7a SS |
441 | case 241 : /* fall through */ |
442 | case 242 : /* fall through */ | |
443 | case 243 : /* fall through */ | |
444 | case 244 : /* fall through */ | |
445 | case 245 : /* fall through */ | |
446 | case 246 : /* fall through */ | |
447 | case 247 : /* fall through */ | |
448 | case 248 : /* fall through */ | |
449 | case 249 : /* fall through */ | |
450 | case 250 : /* fall through */ | |
451 | case 251 : /* fall through */ | |
452 | case 252 : /* fall through */ | |
453 | case 253 : /* fall through */ | |
454 | case 254 : /* fall through */ | |
455 | case 255 : | |
456 | { | |
55552082 | 457 | unsigned int val = (((insn >> 8) & (3 << 0))); |
7a292a7a | 458 | switch (val) |
c906108c | 459 | { |
57465455 DE |
460 | case 0 : itype = M32RBF_INSN_BC24; goto extract_sfmt_bc24; |
461 | case 1 : itype = M32RBF_INSN_BNC24; goto extract_sfmt_bc24; | |
462 | case 2 : itype = M32RBF_INSN_BL24; goto extract_sfmt_bl24; | |
463 | case 3 : itype = M32RBF_INSN_BRA24; goto extract_sfmt_bra24; | |
378af1d6 | 464 | default : itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty; |
c906108c | 465 | } |
c906108c | 466 | } |
96baa820 | 467 | default : itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty; |
7a292a7a | 468 | } |
c906108c | 469 | } |
c906108c SS |
470 | } |
471 | ||
472 | /* The instruction has been decoded, now extract the fields. */ | |
473 | ||
96baa820 | 474 | extract_sfmt_empty: |
c906108c | 475 | { |
7a292a7a | 476 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 477 | #define FLD(f) abuf->fields.fmt_empty.f |
c906108c | 478 | |
c906108c SS |
479 | |
480 | /* Record the fields for the semantic handler. */ | |
96baa820 | 481 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_empty", (char *) 0)); |
c906108c SS |
482 | |
483 | #undef FLD | |
7a292a7a | 484 | return idesc; |
c906108c SS |
485 | } |
486 | ||
96baa820 | 487 | extract_sfmt_add: |
c906108c | 488 | { |
7a292a7a | 489 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 490 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
491 | #define FLD(f) abuf->fields.sfmt_add.f |
492 | UINT f_r1; | |
493 | UINT f_r2; | |
c906108c | 494 | |
96baa820 JM |
495 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
496 | f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); | |
c906108c SS |
497 | |
498 | /* Record the fields for the semantic handler. */ | |
de8f5985 DB |
499 | FLD (f_r1) = f_r1; |
500 | FLD (f_r2) = f_r2; | |
c906108c SS |
501 | FLD (i_dr) = & CPU (h_gr)[f_r1]; |
502 | FLD (i_sr) = & CPU (h_gr)[f_r2]; | |
de8f5985 | 503 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_add", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0)); |
c906108c SS |
504 | |
505 | #if WITH_PROFILE_MODEL_P | |
506 | /* Record the fields for profiling. */ | |
507 | if (PROFILE_MODEL_P (current_cpu)) | |
508 | { | |
509 | FLD (in_dr) = f_r1; | |
510 | FLD (in_sr) = f_r2; | |
511 | FLD (out_dr) = f_r1; | |
512 | } | |
513 | #endif | |
514 | #undef FLD | |
7a292a7a | 515 | return idesc; |
c906108c SS |
516 | } |
517 | ||
96baa820 | 518 | extract_sfmt_add3: |
c906108c | 519 | { |
7a292a7a | 520 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 521 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
522 | #define FLD(f) abuf->fields.sfmt_add3.f |
523 | UINT f_r1; | |
524 | UINT f_r2; | |
525 | INT f_simm16; | |
c906108c | 526 | |
96baa820 JM |
527 | f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); |
528 | f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); | |
529 | f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); | |
c906108c SS |
530 | |
531 | /* Record the fields for the semantic handler. */ | |
532 | FLD (f_simm16) = f_simm16; | |
de8f5985 DB |
533 | FLD (f_r2) = f_r2; |
534 | FLD (f_r1) = f_r1; | |
c906108c SS |
535 | FLD (i_sr) = & CPU (h_gr)[f_r2]; |
536 | FLD (i_dr) = & CPU (h_gr)[f_r1]; | |
de8f5985 | 537 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_add3", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); |
c906108c SS |
538 | |
539 | #if WITH_PROFILE_MODEL_P | |
540 | /* Record the fields for profiling. */ | |
541 | if (PROFILE_MODEL_P (current_cpu)) | |
542 | { | |
543 | FLD (in_sr) = f_r2; | |
544 | FLD (out_dr) = f_r1; | |
545 | } | |
546 | #endif | |
547 | #undef FLD | |
7a292a7a | 548 | return idesc; |
c906108c SS |
549 | } |
550 | ||
96baa820 | 551 | extract_sfmt_and3: |
c906108c | 552 | { |
7a292a7a | 553 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 554 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
555 | #define FLD(f) abuf->fields.sfmt_and3.f |
556 | UINT f_r1; | |
557 | UINT f_r2; | |
558 | UINT f_uimm16; | |
c906108c | 559 | |
96baa820 JM |
560 | f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); |
561 | f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); | |
562 | f_uimm16 = EXTRACT_MSB0_UINT (insn, 32, 16, 16); | |
c906108c SS |
563 | |
564 | /* Record the fields for the semantic handler. */ | |
de8f5985 | 565 | FLD (f_r2) = f_r2; |
c906108c | 566 | FLD (f_uimm16) = f_uimm16; |
de8f5985 | 567 | FLD (f_r1) = f_r1; |
c906108c SS |
568 | FLD (i_sr) = & CPU (h_gr)[f_r2]; |
569 | FLD (i_dr) = & CPU (h_gr)[f_r1]; | |
de8f5985 | 570 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_and3", "f_r2 0x%x", 'x', f_r2, "f_uimm16 0x%x", 'x', f_uimm16, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); |
c906108c SS |
571 | |
572 | #if WITH_PROFILE_MODEL_P | |
573 | /* Record the fields for profiling. */ | |
574 | if (PROFILE_MODEL_P (current_cpu)) | |
575 | { | |
576 | FLD (in_sr) = f_r2; | |
577 | FLD (out_dr) = f_r1; | |
578 | } | |
579 | #endif | |
580 | #undef FLD | |
7a292a7a | 581 | return idesc; |
c906108c SS |
582 | } |
583 | ||
96baa820 | 584 | extract_sfmt_or3: |
c906108c | 585 | { |
7a292a7a | 586 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 587 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
588 | #define FLD(f) abuf->fields.sfmt_and3.f |
589 | UINT f_r1; | |
590 | UINT f_r2; | |
591 | UINT f_uimm16; | |
c906108c | 592 | |
96baa820 JM |
593 | f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); |
594 | f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); | |
595 | f_uimm16 = EXTRACT_MSB0_UINT (insn, 32, 16, 16); | |
c906108c SS |
596 | |
597 | /* Record the fields for the semantic handler. */ | |
de8f5985 | 598 | FLD (f_r2) = f_r2; |
c906108c | 599 | FLD (f_uimm16) = f_uimm16; |
de8f5985 | 600 | FLD (f_r1) = f_r1; |
c906108c SS |
601 | FLD (i_sr) = & CPU (h_gr)[f_r2]; |
602 | FLD (i_dr) = & CPU (h_gr)[f_r1]; | |
de8f5985 | 603 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_or3", "f_r2 0x%x", 'x', f_r2, "f_uimm16 0x%x", 'x', f_uimm16, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); |
c906108c SS |
604 | |
605 | #if WITH_PROFILE_MODEL_P | |
606 | /* Record the fields for profiling. */ | |
607 | if (PROFILE_MODEL_P (current_cpu)) | |
608 | { | |
609 | FLD (in_sr) = f_r2; | |
610 | FLD (out_dr) = f_r1; | |
611 | } | |
612 | #endif | |
613 | #undef FLD | |
7a292a7a | 614 | return idesc; |
c906108c SS |
615 | } |
616 | ||
96baa820 | 617 | extract_sfmt_addi: |
c906108c | 618 | { |
7a292a7a | 619 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 620 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
621 | #define FLD(f) abuf->fields.sfmt_addi.f |
622 | UINT f_r1; | |
623 | INT f_simm8; | |
c906108c | 624 | |
96baa820 JM |
625 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
626 | f_simm8 = EXTRACT_MSB0_INT (insn, 16, 8, 8); | |
c906108c SS |
627 | |
628 | /* Record the fields for the semantic handler. */ | |
de8f5985 | 629 | FLD (f_r1) = f_r1; |
c906108c SS |
630 | FLD (f_simm8) = f_simm8; |
631 | FLD (i_dr) = & CPU (h_gr)[f_r1]; | |
de8f5985 | 632 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addi", "f_r1 0x%x", 'x', f_r1, "f_simm8 0x%x", 'x', f_simm8, "dr 0x%x", 'x', f_r1, (char *) 0)); |
c906108c SS |
633 | |
634 | #if WITH_PROFILE_MODEL_P | |
635 | /* Record the fields for profiling. */ | |
636 | if (PROFILE_MODEL_P (current_cpu)) | |
637 | { | |
638 | FLD (in_dr) = f_r1; | |
639 | FLD (out_dr) = f_r1; | |
640 | } | |
641 | #endif | |
642 | #undef FLD | |
7a292a7a | 643 | return idesc; |
c906108c SS |
644 | } |
645 | ||
96baa820 | 646 | extract_sfmt_addv: |
c906108c | 647 | { |
7a292a7a | 648 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 649 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
650 | #define FLD(f) abuf->fields.sfmt_add.f |
651 | UINT f_r1; | |
652 | UINT f_r2; | |
c906108c | 653 | |
96baa820 JM |
654 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
655 | f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); | |
c906108c SS |
656 | |
657 | /* Record the fields for the semantic handler. */ | |
de8f5985 DB |
658 | FLD (f_r1) = f_r1; |
659 | FLD (f_r2) = f_r2; | |
c906108c SS |
660 | FLD (i_dr) = & CPU (h_gr)[f_r1]; |
661 | FLD (i_sr) = & CPU (h_gr)[f_r2]; | |
de8f5985 | 662 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addv", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0)); |
c906108c SS |
663 | |
664 | #if WITH_PROFILE_MODEL_P | |
665 | /* Record the fields for profiling. */ | |
666 | if (PROFILE_MODEL_P (current_cpu)) | |
667 | { | |
668 | FLD (in_dr) = f_r1; | |
669 | FLD (in_sr) = f_r2; | |
670 | FLD (out_dr) = f_r1; | |
671 | } | |
672 | #endif | |
673 | #undef FLD | |
7a292a7a | 674 | return idesc; |
c906108c SS |
675 | } |
676 | ||
96baa820 | 677 | extract_sfmt_addv3: |
c906108c | 678 | { |
7a292a7a | 679 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 680 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
681 | #define FLD(f) abuf->fields.sfmt_add3.f |
682 | UINT f_r1; | |
683 | UINT f_r2; | |
684 | INT f_simm16; | |
c906108c | 685 | |
96baa820 JM |
686 | f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); |
687 | f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); | |
688 | f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); | |
c906108c SS |
689 | |
690 | /* Record the fields for the semantic handler. */ | |
691 | FLD (f_simm16) = f_simm16; | |
de8f5985 DB |
692 | FLD (f_r2) = f_r2; |
693 | FLD (f_r1) = f_r1; | |
c906108c SS |
694 | FLD (i_sr) = & CPU (h_gr)[f_r2]; |
695 | FLD (i_dr) = & CPU (h_gr)[f_r1]; | |
de8f5985 | 696 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addv3", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); |
c906108c SS |
697 | |
698 | #if WITH_PROFILE_MODEL_P | |
699 | /* Record the fields for profiling. */ | |
700 | if (PROFILE_MODEL_P (current_cpu)) | |
701 | { | |
702 | FLD (in_sr) = f_r2; | |
703 | FLD (out_dr) = f_r1; | |
704 | } | |
705 | #endif | |
706 | #undef FLD | |
7a292a7a | 707 | return idesc; |
c906108c SS |
708 | } |
709 | ||
96baa820 | 710 | extract_sfmt_addx: |
c906108c | 711 | { |
7a292a7a | 712 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 713 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
714 | #define FLD(f) abuf->fields.sfmt_add.f |
715 | UINT f_r1; | |
716 | UINT f_r2; | |
c906108c | 717 | |
96baa820 JM |
718 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
719 | f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); | |
c906108c SS |
720 | |
721 | /* Record the fields for the semantic handler. */ | |
de8f5985 DB |
722 | FLD (f_r1) = f_r1; |
723 | FLD (f_r2) = f_r2; | |
c906108c SS |
724 | FLD (i_dr) = & CPU (h_gr)[f_r1]; |
725 | FLD (i_sr) = & CPU (h_gr)[f_r2]; | |
de8f5985 | 726 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addx", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0)); |
c906108c SS |
727 | |
728 | #if WITH_PROFILE_MODEL_P | |
729 | /* Record the fields for profiling. */ | |
730 | if (PROFILE_MODEL_P (current_cpu)) | |
731 | { | |
732 | FLD (in_dr) = f_r1; | |
733 | FLD (in_sr) = f_r2; | |
734 | FLD (out_dr) = f_r1; | |
735 | } | |
736 | #endif | |
737 | #undef FLD | |
7a292a7a | 738 | return idesc; |
c906108c SS |
739 | } |
740 | ||
96baa820 | 741 | extract_sfmt_bc8: |
c906108c | 742 | { |
7a292a7a | 743 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 744 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
745 | #define FLD(f) abuf->fields.sfmt_bl8.f |
746 | SI f_disp8; | |
c906108c | 747 | |
96baa820 | 748 | f_disp8 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4)))); |
c906108c SS |
749 | |
750 | /* Record the fields for the semantic handler. */ | |
751 | FLD (i_disp8) = f_disp8; | |
96baa820 | 752 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bc8", "disp8 0x%x", 'x', f_disp8, (char *) 0)); |
c906108c SS |
753 | |
754 | #if WITH_PROFILE_MODEL_P | |
755 | /* Record the fields for profiling. */ | |
756 | if (PROFILE_MODEL_P (current_cpu)) | |
757 | { | |
758 | } | |
759 | #endif | |
760 | #undef FLD | |
7a292a7a | 761 | return idesc; |
c906108c SS |
762 | } |
763 | ||
96baa820 | 764 | extract_sfmt_bc24: |
c906108c | 765 | { |
7a292a7a | 766 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 767 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
768 | #define FLD(f) abuf->fields.sfmt_bl24.f |
769 | SI f_disp24; | |
c906108c | 770 | |
96baa820 | 771 | f_disp24 = ((((EXTRACT_MSB0_INT (insn, 32, 8, 24)) << (2))) + (pc)); |
c906108c SS |
772 | |
773 | /* Record the fields for the semantic handler. */ | |
774 | FLD (i_disp24) = f_disp24; | |
96baa820 | 775 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bc24", "disp24 0x%x", 'x', f_disp24, (char *) 0)); |
c906108c SS |
776 | |
777 | #if WITH_PROFILE_MODEL_P | |
778 | /* Record the fields for profiling. */ | |
779 | if (PROFILE_MODEL_P (current_cpu)) | |
780 | { | |
781 | } | |
782 | #endif | |
783 | #undef FLD | |
7a292a7a | 784 | return idesc; |
c906108c SS |
785 | } |
786 | ||
96baa820 | 787 | extract_sfmt_beq: |
c906108c | 788 | { |
7a292a7a | 789 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 790 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
791 | #define FLD(f) abuf->fields.sfmt_beq.f |
792 | UINT f_r1; | |
793 | UINT f_r2; | |
794 | SI f_disp16; | |
c906108c | 795 | |
96baa820 JM |
796 | f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); |
797 | f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); | |
798 | f_disp16 = ((((EXTRACT_MSB0_INT (insn, 32, 16, 16)) << (2))) + (pc)); | |
c906108c SS |
799 | |
800 | /* Record the fields for the semantic handler. */ | |
de8f5985 DB |
801 | FLD (f_r1) = f_r1; |
802 | FLD (f_r2) = f_r2; | |
c906108c SS |
803 | FLD (i_disp16) = f_disp16; |
804 | FLD (i_src1) = & CPU (h_gr)[f_r1]; | |
805 | FLD (i_src2) = & CPU (h_gr)[f_r2]; | |
de8f5985 | 806 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_beq", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "disp16 0x%x", 'x', f_disp16, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); |
c906108c SS |
807 | |
808 | #if WITH_PROFILE_MODEL_P | |
809 | /* Record the fields for profiling. */ | |
810 | if (PROFILE_MODEL_P (current_cpu)) | |
811 | { | |
812 | FLD (in_src1) = f_r1; | |
813 | FLD (in_src2) = f_r2; | |
814 | } | |
815 | #endif | |
816 | #undef FLD | |
7a292a7a | 817 | return idesc; |
c906108c SS |
818 | } |
819 | ||
96baa820 | 820 | extract_sfmt_beqz: |
c906108c | 821 | { |
7a292a7a | 822 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 823 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
824 | #define FLD(f) abuf->fields.sfmt_beq.f |
825 | UINT f_r2; | |
826 | SI f_disp16; | |
c906108c | 827 | |
96baa820 JM |
828 | f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); |
829 | f_disp16 = ((((EXTRACT_MSB0_INT (insn, 32, 16, 16)) << (2))) + (pc)); | |
c906108c SS |
830 | |
831 | /* Record the fields for the semantic handler. */ | |
de8f5985 | 832 | FLD (f_r2) = f_r2; |
c906108c SS |
833 | FLD (i_disp16) = f_disp16; |
834 | FLD (i_src2) = & CPU (h_gr)[f_r2]; | |
de8f5985 | 835 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_beqz", "f_r2 0x%x", 'x', f_r2, "disp16 0x%x", 'x', f_disp16, "src2 0x%x", 'x', f_r2, (char *) 0)); |
c906108c SS |
836 | |
837 | #if WITH_PROFILE_MODEL_P | |
838 | /* Record the fields for profiling. */ | |
839 | if (PROFILE_MODEL_P (current_cpu)) | |
840 | { | |
841 | FLD (in_src2) = f_r2; | |
842 | } | |
843 | #endif | |
844 | #undef FLD | |
7a292a7a | 845 | return idesc; |
c906108c SS |
846 | } |
847 | ||
96baa820 | 848 | extract_sfmt_bl8: |
c906108c | 849 | { |
7a292a7a | 850 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 851 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
852 | #define FLD(f) abuf->fields.sfmt_bl8.f |
853 | SI f_disp8; | |
c906108c | 854 | |
96baa820 | 855 | f_disp8 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4)))); |
c906108c SS |
856 | |
857 | /* Record the fields for the semantic handler. */ | |
858 | FLD (i_disp8) = f_disp8; | |
96baa820 | 859 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bl8", "disp8 0x%x", 'x', f_disp8, (char *) 0)); |
c906108c SS |
860 | |
861 | #if WITH_PROFILE_MODEL_P | |
862 | /* Record the fields for profiling. */ | |
863 | if (PROFILE_MODEL_P (current_cpu)) | |
864 | { | |
378af1d6 | 865 | FLD (out_h_gr_SI_14) = 14; |
c906108c SS |
866 | } |
867 | #endif | |
868 | #undef FLD | |
7a292a7a | 869 | return idesc; |
c906108c SS |
870 | } |
871 | ||
96baa820 | 872 | extract_sfmt_bl24: |
c906108c | 873 | { |
7a292a7a | 874 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 875 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
876 | #define FLD(f) abuf->fields.sfmt_bl24.f |
877 | SI f_disp24; | |
c906108c | 878 | |
96baa820 | 879 | f_disp24 = ((((EXTRACT_MSB0_INT (insn, 32, 8, 24)) << (2))) + (pc)); |
c906108c SS |
880 | |
881 | /* Record the fields for the semantic handler. */ | |
882 | FLD (i_disp24) = f_disp24; | |
96baa820 | 883 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bl24", "disp24 0x%x", 'x', f_disp24, (char *) 0)); |
c906108c SS |
884 | |
885 | #if WITH_PROFILE_MODEL_P | |
886 | /* Record the fields for profiling. */ | |
887 | if (PROFILE_MODEL_P (current_cpu)) | |
888 | { | |
378af1d6 | 889 | FLD (out_h_gr_SI_14) = 14; |
c906108c SS |
890 | } |
891 | #endif | |
892 | #undef FLD | |
7a292a7a | 893 | return idesc; |
c906108c SS |
894 | } |
895 | ||
96baa820 | 896 | extract_sfmt_bra8: |
c906108c | 897 | { |
7a292a7a | 898 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 899 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
900 | #define FLD(f) abuf->fields.sfmt_bl8.f |
901 | SI f_disp8; | |
c906108c | 902 | |
96baa820 | 903 | f_disp8 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4)))); |
c906108c SS |
904 | |
905 | /* Record the fields for the semantic handler. */ | |
906 | FLD (i_disp8) = f_disp8; | |
96baa820 | 907 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bra8", "disp8 0x%x", 'x', f_disp8, (char *) 0)); |
c906108c SS |
908 | |
909 | #if WITH_PROFILE_MODEL_P | |
910 | /* Record the fields for profiling. */ | |
911 | if (PROFILE_MODEL_P (current_cpu)) | |
912 | { | |
913 | } | |
914 | #endif | |
915 | #undef FLD | |
7a292a7a | 916 | return idesc; |
c906108c SS |
917 | } |
918 | ||
96baa820 | 919 | extract_sfmt_bra24: |
c906108c | 920 | { |
7a292a7a | 921 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 922 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
923 | #define FLD(f) abuf->fields.sfmt_bl24.f |
924 | SI f_disp24; | |
c906108c | 925 | |
96baa820 | 926 | f_disp24 = ((((EXTRACT_MSB0_INT (insn, 32, 8, 24)) << (2))) + (pc)); |
c906108c SS |
927 | |
928 | /* Record the fields for the semantic handler. */ | |
929 | FLD (i_disp24) = f_disp24; | |
96baa820 | 930 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bra24", "disp24 0x%x", 'x', f_disp24, (char *) 0)); |
c906108c SS |
931 | |
932 | #if WITH_PROFILE_MODEL_P | |
933 | /* Record the fields for profiling. */ | |
934 | if (PROFILE_MODEL_P (current_cpu)) | |
935 | { | |
936 | } | |
937 | #endif | |
938 | #undef FLD | |
7a292a7a | 939 | return idesc; |
c906108c SS |
940 | } |
941 | ||
96baa820 | 942 | extract_sfmt_cmp: |
c906108c | 943 | { |
7a292a7a | 944 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 945 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
946 | #define FLD(f) abuf->fields.sfmt_st_plus.f |
947 | UINT f_r1; | |
948 | UINT f_r2; | |
c906108c | 949 | |
96baa820 JM |
950 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
951 | f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); | |
c906108c SS |
952 | |
953 | /* Record the fields for the semantic handler. */ | |
de8f5985 DB |
954 | FLD (f_r1) = f_r1; |
955 | FLD (f_r2) = f_r2; | |
c906108c SS |
956 | FLD (i_src1) = & CPU (h_gr)[f_r1]; |
957 | FLD (i_src2) = & CPU (h_gr)[f_r2]; | |
de8f5985 | 958 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmp", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); |
c906108c SS |
959 | |
960 | #if WITH_PROFILE_MODEL_P | |
961 | /* Record the fields for profiling. */ | |
962 | if (PROFILE_MODEL_P (current_cpu)) | |
963 | { | |
964 | FLD (in_src1) = f_r1; | |
965 | FLD (in_src2) = f_r2; | |
966 | } | |
967 | #endif | |
968 | #undef FLD | |
7a292a7a | 969 | return idesc; |
c906108c SS |
970 | } |
971 | ||
96baa820 | 972 | extract_sfmt_cmpi: |
c906108c | 973 | { |
7a292a7a | 974 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 975 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
976 | #define FLD(f) abuf->fields.sfmt_st_d.f |
977 | UINT f_r2; | |
978 | INT f_simm16; | |
c906108c | 979 | |
96baa820 JM |
980 | f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); |
981 | f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); | |
c906108c SS |
982 | |
983 | /* Record the fields for the semantic handler. */ | |
984 | FLD (f_simm16) = f_simm16; | |
de8f5985 | 985 | FLD (f_r2) = f_r2; |
c906108c | 986 | FLD (i_src2) = & CPU (h_gr)[f_r2]; |
de8f5985 | 987 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmpi", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "src2 0x%x", 'x', f_r2, (char *) 0)); |
c906108c SS |
988 | |
989 | #if WITH_PROFILE_MODEL_P | |
990 | /* Record the fields for profiling. */ | |
991 | if (PROFILE_MODEL_P (current_cpu)) | |
992 | { | |
993 | FLD (in_src2) = f_r2; | |
994 | } | |
995 | #endif | |
996 | #undef FLD | |
7a292a7a | 997 | return idesc; |
c906108c SS |
998 | } |
999 | ||
96baa820 | 1000 | extract_sfmt_div: |
c906108c | 1001 | { |
7a292a7a | 1002 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1003 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1004 | #define FLD(f) abuf->fields.sfmt_add.f |
1005 | UINT f_r1; | |
1006 | UINT f_r2; | |
c906108c | 1007 | |
96baa820 JM |
1008 | f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); |
1009 | f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); | |
c906108c SS |
1010 | |
1011 | /* Record the fields for the semantic handler. */ | |
de8f5985 DB |
1012 | FLD (f_r1) = f_r1; |
1013 | FLD (f_r2) = f_r2; | |
c906108c SS |
1014 | FLD (i_dr) = & CPU (h_gr)[f_r1]; |
1015 | FLD (i_sr) = & CPU (h_gr)[f_r2]; | |
de8f5985 | 1016 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_div", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0)); |
c906108c SS |
1017 | |
1018 | #if WITH_PROFILE_MODEL_P | |
1019 | /* Record the fields for profiling. */ | |
1020 | if (PROFILE_MODEL_P (current_cpu)) | |
1021 | { | |
1022 | FLD (in_dr) = f_r1; | |
1023 | FLD (in_sr) = f_r2; | |
1024 | FLD (out_dr) = f_r1; | |
1025 | } | |
1026 | #endif | |
1027 | #undef FLD | |
7a292a7a | 1028 | return idesc; |
c906108c SS |
1029 | } |
1030 | ||
96baa820 | 1031 | extract_sfmt_jl: |
c906108c | 1032 | { |
7a292a7a | 1033 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1034 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1035 | #define FLD(f) abuf->fields.sfmt_jl.f |
1036 | UINT f_r2; | |
c906108c | 1037 | |
96baa820 | 1038 | f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); |
c906108c SS |
1039 | |
1040 | /* Record the fields for the semantic handler. */ | |
de8f5985 | 1041 | FLD (f_r2) = f_r2; |
c906108c | 1042 | FLD (i_sr) = & CPU (h_gr)[f_r2]; |
de8f5985 | 1043 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_jl", "f_r2 0x%x", 'x', f_r2, "sr 0x%x", 'x', f_r2, (char *) 0)); |
c906108c SS |
1044 | |
1045 | #if WITH_PROFILE_MODEL_P | |
1046 | /* Record the fields for profiling. */ | |
1047 | if (PROFILE_MODEL_P (current_cpu)) | |
1048 | { | |
1049 | FLD (in_sr) = f_r2; | |
378af1d6 | 1050 | FLD (out_h_gr_SI_14) = 14; |
c906108c SS |
1051 | } |
1052 | #endif | |
1053 | #undef FLD | |
7a292a7a | 1054 | return idesc; |
c906108c SS |
1055 | } |
1056 | ||
96baa820 | 1057 | extract_sfmt_jmp: |
c906108c | 1058 | { |
7a292a7a | 1059 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1060 | CGEN_INSN_INT insn = entire_insn; |
de8f5985 | 1061 | #define FLD(f) abuf->fields.sfmt_jl.f |
96baa820 | 1062 | UINT f_r2; |
c906108c | 1063 | |
96baa820 | 1064 | f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); |
c906108c SS |
1065 | |
1066 | /* Record the fields for the semantic handler. */ | |
de8f5985 | 1067 | FLD (f_r2) = f_r2; |
c906108c | 1068 | FLD (i_sr) = & CPU (h_gr)[f_r2]; |
de8f5985 | 1069 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_jmp", "f_r2 0x%x", 'x', f_r2, "sr 0x%x", 'x', f_r2, (char *) 0)); |
c906108c SS |
1070 | |
1071 | #if WITH_PROFILE_MODEL_P | |
1072 | /* Record the fields for profiling. */ | |
1073 | if (PROFILE_MODEL_P (current_cpu)) | |
1074 | { | |
1075 | FLD (in_sr) = f_r2; | |
c906108c SS |
1076 | } |
1077 | #endif | |
1078 | #undef FLD | |
7a292a7a | 1079 | return idesc; |
c906108c SS |
1080 | } |
1081 | ||
96baa820 | 1082 | extract_sfmt_ld: |
c906108c | 1083 | { |
7a292a7a | 1084 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1085 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1086 | #define FLD(f) abuf->fields.sfmt_ld_plus.f |
1087 | UINT f_r1; | |
1088 | UINT f_r2; | |
c906108c | 1089 | |
96baa820 JM |
1090 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
1091 | f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); | |
c906108c SS |
1092 | |
1093 | /* Record the fields for the semantic handler. */ | |
de8f5985 DB |
1094 | FLD (f_r2) = f_r2; |
1095 | FLD (f_r1) = f_r1; | |
c906108c SS |
1096 | FLD (i_sr) = & CPU (h_gr)[f_r2]; |
1097 | FLD (i_dr) = & CPU (h_gr)[f_r1]; | |
de8f5985 | 1098 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); |
c906108c SS |
1099 | |
1100 | #if WITH_PROFILE_MODEL_P | |
1101 | /* Record the fields for profiling. */ | |
1102 | if (PROFILE_MODEL_P (current_cpu)) | |
1103 | { | |
1104 | FLD (in_sr) = f_r2; | |
1105 | FLD (out_dr) = f_r1; | |
1106 | } | |
1107 | #endif | |
1108 | #undef FLD | |
7a292a7a | 1109 | return idesc; |
c906108c SS |
1110 | } |
1111 | ||
96baa820 | 1112 | extract_sfmt_ld_d: |
c906108c | 1113 | { |
7a292a7a | 1114 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1115 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1116 | #define FLD(f) abuf->fields.sfmt_add3.f |
1117 | UINT f_r1; | |
1118 | UINT f_r2; | |
1119 | INT f_simm16; | |
c906108c | 1120 | |
96baa820 JM |
1121 | f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); |
1122 | f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); | |
1123 | f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); | |
c906108c SS |
1124 | |
1125 | /* Record the fields for the semantic handler. */ | |
1126 | FLD (f_simm16) = f_simm16; | |
de8f5985 DB |
1127 | FLD (f_r2) = f_r2; |
1128 | FLD (f_r1) = f_r1; | |
c906108c SS |
1129 | FLD (i_sr) = & CPU (h_gr)[f_r2]; |
1130 | FLD (i_dr) = & CPU (h_gr)[f_r1]; | |
de8f5985 | 1131 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld_d", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); |
c906108c | 1132 | |
378af1d6 DB |
1133 | #if WITH_PROFILE_MODEL_P |
1134 | /* Record the fields for profiling. */ | |
1135 | if (PROFILE_MODEL_P (current_cpu)) | |
1136 | { | |
1137 | FLD (in_sr) = f_r2; | |
1138 | FLD (out_dr) = f_r1; | |
1139 | } | |
1140 | #endif | |
1141 | #undef FLD | |
1142 | return idesc; | |
1143 | } | |
1144 | ||
1145 | extract_sfmt_ldb: | |
1146 | { | |
1147 | const IDESC *idesc = &m32rbf_insn_data[itype]; | |
1148 | CGEN_INSN_INT insn = entire_insn; | |
1149 | #define FLD(f) abuf->fields.sfmt_ld_plus.f | |
1150 | UINT f_r1; | |
1151 | UINT f_r2; | |
1152 | ||
1153 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); | |
1154 | f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); | |
1155 | ||
1156 | /* Record the fields for the semantic handler. */ | |
1157 | FLD (f_r2) = f_r2; | |
1158 | FLD (f_r1) = f_r1; | |
1159 | FLD (i_sr) = & CPU (h_gr)[f_r2]; | |
1160 | FLD (i_dr) = & CPU (h_gr)[f_r1]; | |
1161 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldb", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); | |
1162 | ||
1163 | #if WITH_PROFILE_MODEL_P | |
1164 | /* Record the fields for profiling. */ | |
1165 | if (PROFILE_MODEL_P (current_cpu)) | |
1166 | { | |
1167 | FLD (in_sr) = f_r2; | |
1168 | FLD (out_dr) = f_r1; | |
1169 | } | |
1170 | #endif | |
1171 | #undef FLD | |
1172 | return idesc; | |
1173 | } | |
1174 | ||
1175 | extract_sfmt_ldb_d: | |
1176 | { | |
1177 | const IDESC *idesc = &m32rbf_insn_data[itype]; | |
1178 | CGEN_INSN_INT insn = entire_insn; | |
1179 | #define FLD(f) abuf->fields.sfmt_add3.f | |
1180 | UINT f_r1; | |
1181 | UINT f_r2; | |
1182 | INT f_simm16; | |
1183 | ||
1184 | f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); | |
1185 | f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); | |
1186 | f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); | |
1187 | ||
1188 | /* Record the fields for the semantic handler. */ | |
1189 | FLD (f_simm16) = f_simm16; | |
1190 | FLD (f_r2) = f_r2; | |
1191 | FLD (f_r1) = f_r1; | |
1192 | FLD (i_sr) = & CPU (h_gr)[f_r2]; | |
1193 | FLD (i_dr) = & CPU (h_gr)[f_r1]; | |
1194 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldb_d", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); | |
1195 | ||
1196 | #if WITH_PROFILE_MODEL_P | |
1197 | /* Record the fields for profiling. */ | |
1198 | if (PROFILE_MODEL_P (current_cpu)) | |
1199 | { | |
1200 | FLD (in_sr) = f_r2; | |
1201 | FLD (out_dr) = f_r1; | |
1202 | } | |
1203 | #endif | |
1204 | #undef FLD | |
1205 | return idesc; | |
1206 | } | |
1207 | ||
1208 | extract_sfmt_ldh: | |
1209 | { | |
1210 | const IDESC *idesc = &m32rbf_insn_data[itype]; | |
1211 | CGEN_INSN_INT insn = entire_insn; | |
1212 | #define FLD(f) abuf->fields.sfmt_ld_plus.f | |
1213 | UINT f_r1; | |
1214 | UINT f_r2; | |
1215 | ||
1216 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); | |
1217 | f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); | |
1218 | ||
1219 | /* Record the fields for the semantic handler. */ | |
1220 | FLD (f_r2) = f_r2; | |
1221 | FLD (f_r1) = f_r1; | |
1222 | FLD (i_sr) = & CPU (h_gr)[f_r2]; | |
1223 | FLD (i_dr) = & CPU (h_gr)[f_r1]; | |
1224 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldh", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); | |
1225 | ||
1226 | #if WITH_PROFILE_MODEL_P | |
1227 | /* Record the fields for profiling. */ | |
1228 | if (PROFILE_MODEL_P (current_cpu)) | |
1229 | { | |
1230 | FLD (in_sr) = f_r2; | |
1231 | FLD (out_dr) = f_r1; | |
1232 | } | |
1233 | #endif | |
1234 | #undef FLD | |
1235 | return idesc; | |
1236 | } | |
1237 | ||
1238 | extract_sfmt_ldh_d: | |
1239 | { | |
1240 | const IDESC *idesc = &m32rbf_insn_data[itype]; | |
1241 | CGEN_INSN_INT insn = entire_insn; | |
1242 | #define FLD(f) abuf->fields.sfmt_add3.f | |
1243 | UINT f_r1; | |
1244 | UINT f_r2; | |
1245 | INT f_simm16; | |
1246 | ||
1247 | f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); | |
1248 | f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); | |
1249 | f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); | |
1250 | ||
1251 | /* Record the fields for the semantic handler. */ | |
1252 | FLD (f_simm16) = f_simm16; | |
1253 | FLD (f_r2) = f_r2; | |
1254 | FLD (f_r1) = f_r1; | |
1255 | FLD (i_sr) = & CPU (h_gr)[f_r2]; | |
1256 | FLD (i_dr) = & CPU (h_gr)[f_r1]; | |
1257 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldh_d", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); | |
1258 | ||
c906108c SS |
1259 | #if WITH_PROFILE_MODEL_P |
1260 | /* Record the fields for profiling. */ | |
1261 | if (PROFILE_MODEL_P (current_cpu)) | |
1262 | { | |
1263 | FLD (in_sr) = f_r2; | |
1264 | FLD (out_dr) = f_r1; | |
1265 | } | |
1266 | #endif | |
1267 | #undef FLD | |
7a292a7a | 1268 | return idesc; |
c906108c SS |
1269 | } |
1270 | ||
96baa820 | 1271 | extract_sfmt_ld_plus: |
c906108c | 1272 | { |
7a292a7a | 1273 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1274 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1275 | #define FLD(f) abuf->fields.sfmt_ld_plus.f |
1276 | UINT f_r1; | |
1277 | UINT f_r2; | |
c906108c | 1278 | |
96baa820 JM |
1279 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
1280 | f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); | |
c906108c SS |
1281 | |
1282 | /* Record the fields for the semantic handler. */ | |
de8f5985 DB |
1283 | FLD (f_r2) = f_r2; |
1284 | FLD (f_r1) = f_r1; | |
c906108c SS |
1285 | FLD (i_sr) = & CPU (h_gr)[f_r2]; |
1286 | FLD (i_dr) = & CPU (h_gr)[f_r1]; | |
de8f5985 | 1287 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld_plus", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); |
c906108c SS |
1288 | |
1289 | #if WITH_PROFILE_MODEL_P | |
1290 | /* Record the fields for profiling. */ | |
1291 | if (PROFILE_MODEL_P (current_cpu)) | |
1292 | { | |
1293 | FLD (in_sr) = f_r2; | |
1294 | FLD (out_dr) = f_r1; | |
1295 | FLD (out_sr) = f_r2; | |
1296 | } | |
1297 | #endif | |
1298 | #undef FLD | |
7a292a7a | 1299 | return idesc; |
c906108c SS |
1300 | } |
1301 | ||
96baa820 | 1302 | extract_sfmt_ld24: |
c906108c | 1303 | { |
7a292a7a | 1304 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1305 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1306 | #define FLD(f) abuf->fields.sfmt_ld24.f |
1307 | UINT f_r1; | |
1308 | UINT f_uimm24; | |
c906108c | 1309 | |
96baa820 JM |
1310 | f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); |
1311 | f_uimm24 = EXTRACT_MSB0_UINT (insn, 32, 8, 24); | |
c906108c SS |
1312 | |
1313 | /* Record the fields for the semantic handler. */ | |
de8f5985 | 1314 | FLD (f_r1) = f_r1; |
c906108c SS |
1315 | FLD (i_uimm24) = f_uimm24; |
1316 | FLD (i_dr) = & CPU (h_gr)[f_r1]; | |
de8f5985 | 1317 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld24", "f_r1 0x%x", 'x', f_r1, "uimm24 0x%x", 'x', f_uimm24, "dr 0x%x", 'x', f_r1, (char *) 0)); |
c906108c SS |
1318 | |
1319 | #if WITH_PROFILE_MODEL_P | |
1320 | /* Record the fields for profiling. */ | |
1321 | if (PROFILE_MODEL_P (current_cpu)) | |
1322 | { | |
1323 | FLD (out_dr) = f_r1; | |
1324 | } | |
1325 | #endif | |
1326 | #undef FLD | |
7a292a7a | 1327 | return idesc; |
c906108c SS |
1328 | } |
1329 | ||
96baa820 | 1330 | extract_sfmt_ldi8: |
c906108c | 1331 | { |
7a292a7a | 1332 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1333 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1334 | #define FLD(f) abuf->fields.sfmt_addi.f |
1335 | UINT f_r1; | |
1336 | INT f_simm8; | |
c906108c | 1337 | |
96baa820 JM |
1338 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
1339 | f_simm8 = EXTRACT_MSB0_INT (insn, 16, 8, 8); | |
c906108c SS |
1340 | |
1341 | /* Record the fields for the semantic handler. */ | |
1342 | FLD (f_simm8) = f_simm8; | |
de8f5985 | 1343 | FLD (f_r1) = f_r1; |
c906108c | 1344 | FLD (i_dr) = & CPU (h_gr)[f_r1]; |
de8f5985 | 1345 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldi8", "f_simm8 0x%x", 'x', f_simm8, "f_r1 0x%x", 'x', f_r1, "dr 0x%x", 'x', f_r1, (char *) 0)); |
c906108c SS |
1346 | |
1347 | #if WITH_PROFILE_MODEL_P | |
1348 | /* Record the fields for profiling. */ | |
1349 | if (PROFILE_MODEL_P (current_cpu)) | |
1350 | { | |
1351 | FLD (out_dr) = f_r1; | |
1352 | } | |
1353 | #endif | |
1354 | #undef FLD | |
7a292a7a | 1355 | return idesc; |
c906108c SS |
1356 | } |
1357 | ||
96baa820 | 1358 | extract_sfmt_ldi16: |
c906108c | 1359 | { |
7a292a7a | 1360 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1361 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1362 | #define FLD(f) abuf->fields.sfmt_add3.f |
1363 | UINT f_r1; | |
1364 | INT f_simm16; | |
c906108c | 1365 | |
96baa820 JM |
1366 | f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); |
1367 | f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); | |
c906108c SS |
1368 | |
1369 | /* Record the fields for the semantic handler. */ | |
1370 | FLD (f_simm16) = f_simm16; | |
de8f5985 | 1371 | FLD (f_r1) = f_r1; |
c906108c | 1372 | FLD (i_dr) = & CPU (h_gr)[f_r1]; |
de8f5985 | 1373 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldi16", "f_simm16 0x%x", 'x', f_simm16, "f_r1 0x%x", 'x', f_r1, "dr 0x%x", 'x', f_r1, (char *) 0)); |
c906108c SS |
1374 | |
1375 | #if WITH_PROFILE_MODEL_P | |
1376 | /* Record the fields for profiling. */ | |
1377 | if (PROFILE_MODEL_P (current_cpu)) | |
1378 | { | |
1379 | FLD (out_dr) = f_r1; | |
1380 | } | |
1381 | #endif | |
1382 | #undef FLD | |
7a292a7a | 1383 | return idesc; |
c906108c SS |
1384 | } |
1385 | ||
96baa820 | 1386 | extract_sfmt_lock: |
c906108c | 1387 | { |
7a292a7a | 1388 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1389 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1390 | #define FLD(f) abuf->fields.sfmt_ld_plus.f |
1391 | UINT f_r1; | |
1392 | UINT f_r2; | |
c906108c | 1393 | |
96baa820 JM |
1394 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
1395 | f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); | |
c906108c SS |
1396 | |
1397 | /* Record the fields for the semantic handler. */ | |
de8f5985 DB |
1398 | FLD (f_r2) = f_r2; |
1399 | FLD (f_r1) = f_r1; | |
c906108c SS |
1400 | FLD (i_sr) = & CPU (h_gr)[f_r2]; |
1401 | FLD (i_dr) = & CPU (h_gr)[f_r1]; | |
de8f5985 | 1402 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_lock", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); |
c906108c SS |
1403 | |
1404 | #if WITH_PROFILE_MODEL_P | |
1405 | /* Record the fields for profiling. */ | |
1406 | if (PROFILE_MODEL_P (current_cpu)) | |
1407 | { | |
1408 | FLD (in_sr) = f_r2; | |
1409 | FLD (out_dr) = f_r1; | |
1410 | } | |
1411 | #endif | |
1412 | #undef FLD | |
7a292a7a | 1413 | return idesc; |
c906108c SS |
1414 | } |
1415 | ||
96baa820 | 1416 | extract_sfmt_machi: |
c906108c | 1417 | { |
7a292a7a | 1418 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1419 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1420 | #define FLD(f) abuf->fields.sfmt_st_plus.f |
1421 | UINT f_r1; | |
1422 | UINT f_r2; | |
c906108c | 1423 | |
96baa820 JM |
1424 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
1425 | f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); | |
c906108c SS |
1426 | |
1427 | /* Record the fields for the semantic handler. */ | |
de8f5985 DB |
1428 | FLD (f_r1) = f_r1; |
1429 | FLD (f_r2) = f_r2; | |
c906108c SS |
1430 | FLD (i_src1) = & CPU (h_gr)[f_r1]; |
1431 | FLD (i_src2) = & CPU (h_gr)[f_r2]; | |
de8f5985 | 1432 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_machi", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); |
c906108c SS |
1433 | |
1434 | #if WITH_PROFILE_MODEL_P | |
1435 | /* Record the fields for profiling. */ | |
1436 | if (PROFILE_MODEL_P (current_cpu)) | |
1437 | { | |
1438 | FLD (in_src1) = f_r1; | |
1439 | FLD (in_src2) = f_r2; | |
1440 | } | |
1441 | #endif | |
1442 | #undef FLD | |
7a292a7a | 1443 | return idesc; |
c906108c SS |
1444 | } |
1445 | ||
96baa820 | 1446 | extract_sfmt_mulhi: |
c906108c | 1447 | { |
7a292a7a | 1448 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1449 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1450 | #define FLD(f) abuf->fields.sfmt_st_plus.f |
1451 | UINT f_r1; | |
1452 | UINT f_r2; | |
c906108c | 1453 | |
96baa820 JM |
1454 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
1455 | f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); | |
c906108c SS |
1456 | |
1457 | /* Record the fields for the semantic handler. */ | |
de8f5985 DB |
1458 | FLD (f_r1) = f_r1; |
1459 | FLD (f_r2) = f_r2; | |
c906108c SS |
1460 | FLD (i_src1) = & CPU (h_gr)[f_r1]; |
1461 | FLD (i_src2) = & CPU (h_gr)[f_r2]; | |
de8f5985 | 1462 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mulhi", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); |
c906108c SS |
1463 | |
1464 | #if WITH_PROFILE_MODEL_P | |
1465 | /* Record the fields for profiling. */ | |
1466 | if (PROFILE_MODEL_P (current_cpu)) | |
1467 | { | |
1468 | FLD (in_src1) = f_r1; | |
1469 | FLD (in_src2) = f_r2; | |
1470 | } | |
1471 | #endif | |
1472 | #undef FLD | |
7a292a7a | 1473 | return idesc; |
c906108c SS |
1474 | } |
1475 | ||
96baa820 | 1476 | extract_sfmt_mv: |
c906108c | 1477 | { |
7a292a7a | 1478 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1479 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1480 | #define FLD(f) abuf->fields.sfmt_ld_plus.f |
1481 | UINT f_r1; | |
1482 | UINT f_r2; | |
c906108c | 1483 | |
96baa820 JM |
1484 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
1485 | f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); | |
c906108c SS |
1486 | |
1487 | /* Record the fields for the semantic handler. */ | |
de8f5985 DB |
1488 | FLD (f_r2) = f_r2; |
1489 | FLD (f_r1) = f_r1; | |
c906108c SS |
1490 | FLD (i_sr) = & CPU (h_gr)[f_r2]; |
1491 | FLD (i_dr) = & CPU (h_gr)[f_r1]; | |
de8f5985 | 1492 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mv", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); |
c906108c SS |
1493 | |
1494 | #if WITH_PROFILE_MODEL_P | |
1495 | /* Record the fields for profiling. */ | |
1496 | if (PROFILE_MODEL_P (current_cpu)) | |
1497 | { | |
1498 | FLD (in_sr) = f_r2; | |
1499 | FLD (out_dr) = f_r1; | |
1500 | } | |
1501 | #endif | |
1502 | #undef FLD | |
7a292a7a | 1503 | return idesc; |
c906108c SS |
1504 | } |
1505 | ||
96baa820 | 1506 | extract_sfmt_mvfachi: |
c906108c | 1507 | { |
7a292a7a | 1508 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1509 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1510 | #define FLD(f) abuf->fields.sfmt_seth.f |
1511 | UINT f_r1; | |
c906108c | 1512 | |
96baa820 | 1513 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
c906108c SS |
1514 | |
1515 | /* Record the fields for the semantic handler. */ | |
de8f5985 | 1516 | FLD (f_r1) = f_r1; |
c906108c | 1517 | FLD (i_dr) = & CPU (h_gr)[f_r1]; |
de8f5985 | 1518 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mvfachi", "f_r1 0x%x", 'x', f_r1, "dr 0x%x", 'x', f_r1, (char *) 0)); |
c906108c SS |
1519 | |
1520 | #if WITH_PROFILE_MODEL_P | |
1521 | /* Record the fields for profiling. */ | |
1522 | if (PROFILE_MODEL_P (current_cpu)) | |
1523 | { | |
1524 | FLD (out_dr) = f_r1; | |
1525 | } | |
1526 | #endif | |
1527 | #undef FLD | |
7a292a7a | 1528 | return idesc; |
c906108c SS |
1529 | } |
1530 | ||
96baa820 | 1531 | extract_sfmt_mvfc: |
c906108c | 1532 | { |
7a292a7a | 1533 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1534 | CGEN_INSN_INT insn = entire_insn; |
de8f5985 | 1535 | #define FLD(f) abuf->fields.sfmt_ld_plus.f |
96baa820 JM |
1536 | UINT f_r1; |
1537 | UINT f_r2; | |
c906108c | 1538 | |
96baa820 JM |
1539 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
1540 | f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); | |
c906108c SS |
1541 | |
1542 | /* Record the fields for the semantic handler. */ | |
1543 | FLD (f_r2) = f_r2; | |
de8f5985 | 1544 | FLD (f_r1) = f_r1; |
c906108c | 1545 | FLD (i_dr) = & CPU (h_gr)[f_r1]; |
de8f5985 | 1546 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mvfc", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "dr 0x%x", 'x', f_r1, (char *) 0)); |
c906108c SS |
1547 | |
1548 | #if WITH_PROFILE_MODEL_P | |
1549 | /* Record the fields for profiling. */ | |
1550 | if (PROFILE_MODEL_P (current_cpu)) | |
1551 | { | |
1552 | FLD (out_dr) = f_r1; | |
1553 | } | |
1554 | #endif | |
1555 | #undef FLD | |
7a292a7a | 1556 | return idesc; |
c906108c SS |
1557 | } |
1558 | ||
96baa820 | 1559 | extract_sfmt_mvtachi: |
c906108c | 1560 | { |
7a292a7a | 1561 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1562 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1563 | #define FLD(f) abuf->fields.sfmt_st_plus.f |
1564 | UINT f_r1; | |
c906108c | 1565 | |
96baa820 | 1566 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
c906108c SS |
1567 | |
1568 | /* Record the fields for the semantic handler. */ | |
de8f5985 | 1569 | FLD (f_r1) = f_r1; |
c906108c | 1570 | FLD (i_src1) = & CPU (h_gr)[f_r1]; |
de8f5985 | 1571 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mvtachi", "f_r1 0x%x", 'x', f_r1, "src1 0x%x", 'x', f_r1, (char *) 0)); |
c906108c SS |
1572 | |
1573 | #if WITH_PROFILE_MODEL_P | |
1574 | /* Record the fields for profiling. */ | |
1575 | if (PROFILE_MODEL_P (current_cpu)) | |
1576 | { | |
1577 | FLD (in_src1) = f_r1; | |
1578 | } | |
1579 | #endif | |
1580 | #undef FLD | |
7a292a7a | 1581 | return idesc; |
c906108c SS |
1582 | } |
1583 | ||
96baa820 | 1584 | extract_sfmt_mvtc: |
c906108c | 1585 | { |
7a292a7a | 1586 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1587 | CGEN_INSN_INT insn = entire_insn; |
de8f5985 | 1588 | #define FLD(f) abuf->fields.sfmt_ld_plus.f |
96baa820 JM |
1589 | UINT f_r1; |
1590 | UINT f_r2; | |
c906108c | 1591 | |
96baa820 JM |
1592 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
1593 | f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); | |
c906108c SS |
1594 | |
1595 | /* Record the fields for the semantic handler. */ | |
de8f5985 | 1596 | FLD (f_r2) = f_r2; |
c906108c SS |
1597 | FLD (f_r1) = f_r1; |
1598 | FLD (i_sr) = & CPU (h_gr)[f_r2]; | |
de8f5985 | 1599 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mvtc", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0)); |
c906108c SS |
1600 | |
1601 | #if WITH_PROFILE_MODEL_P | |
1602 | /* Record the fields for profiling. */ | |
1603 | if (PROFILE_MODEL_P (current_cpu)) | |
1604 | { | |
1605 | FLD (in_sr) = f_r2; | |
1606 | } | |
1607 | #endif | |
1608 | #undef FLD | |
7a292a7a | 1609 | return idesc; |
c906108c SS |
1610 | } |
1611 | ||
96baa820 | 1612 | extract_sfmt_nop: |
c906108c | 1613 | { |
7a292a7a | 1614 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
96baa820 | 1615 | #define FLD(f) abuf->fields.fmt_empty.f |
c906108c | 1616 | |
c906108c SS |
1617 | |
1618 | /* Record the fields for the semantic handler. */ | |
96baa820 | 1619 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_nop", (char *) 0)); |
c906108c SS |
1620 | |
1621 | #undef FLD | |
7a292a7a | 1622 | return idesc; |
c906108c SS |
1623 | } |
1624 | ||
96baa820 | 1625 | extract_sfmt_rac: |
c906108c | 1626 | { |
7a292a7a | 1627 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
96baa820 | 1628 | #define FLD(f) abuf->fields.fmt_empty.f |
c906108c | 1629 | |
c906108c SS |
1630 | |
1631 | /* Record the fields for the semantic handler. */ | |
96baa820 | 1632 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_rac", (char *) 0)); |
c906108c SS |
1633 | |
1634 | #undef FLD | |
7a292a7a | 1635 | return idesc; |
c906108c SS |
1636 | } |
1637 | ||
96baa820 | 1638 | extract_sfmt_rte: |
c906108c | 1639 | { |
7a292a7a | 1640 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
96baa820 | 1641 | #define FLD(f) abuf->fields.fmt_empty.f |
c906108c | 1642 | |
c906108c SS |
1643 | |
1644 | /* Record the fields for the semantic handler. */ | |
96baa820 | 1645 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_rte", (char *) 0)); |
c906108c SS |
1646 | |
1647 | #if WITH_PROFILE_MODEL_P | |
1648 | /* Record the fields for profiling. */ | |
1649 | if (PROFILE_MODEL_P (current_cpu)) | |
1650 | { | |
1651 | } | |
1652 | #endif | |
1653 | #undef FLD | |
7a292a7a | 1654 | return idesc; |
c906108c SS |
1655 | } |
1656 | ||
96baa820 | 1657 | extract_sfmt_seth: |
c906108c | 1658 | { |
7a292a7a | 1659 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1660 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1661 | #define FLD(f) abuf->fields.sfmt_seth.f |
1662 | UINT f_r1; | |
1663 | UINT f_hi16; | |
c906108c | 1664 | |
96baa820 JM |
1665 | f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); |
1666 | f_hi16 = EXTRACT_MSB0_UINT (insn, 32, 16, 16); | |
c906108c SS |
1667 | |
1668 | /* Record the fields for the semantic handler. */ | |
1669 | FLD (f_hi16) = f_hi16; | |
de8f5985 | 1670 | FLD (f_r1) = f_r1; |
c906108c | 1671 | FLD (i_dr) = & CPU (h_gr)[f_r1]; |
de8f5985 | 1672 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_seth", "f_hi16 0x%x", 'x', f_hi16, "f_r1 0x%x", 'x', f_r1, "dr 0x%x", 'x', f_r1, (char *) 0)); |
c906108c SS |
1673 | |
1674 | #if WITH_PROFILE_MODEL_P | |
1675 | /* Record the fields for profiling. */ | |
1676 | if (PROFILE_MODEL_P (current_cpu)) | |
1677 | { | |
1678 | FLD (out_dr) = f_r1; | |
1679 | } | |
1680 | #endif | |
1681 | #undef FLD | |
7a292a7a | 1682 | return idesc; |
c906108c SS |
1683 | } |
1684 | ||
96baa820 | 1685 | extract_sfmt_sll3: |
c906108c | 1686 | { |
7a292a7a | 1687 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1688 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1689 | #define FLD(f) abuf->fields.sfmt_add3.f |
1690 | UINT f_r1; | |
1691 | UINT f_r2; | |
1692 | INT f_simm16; | |
c906108c | 1693 | |
96baa820 JM |
1694 | f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); |
1695 | f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); | |
1696 | f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); | |
c906108c SS |
1697 | |
1698 | /* Record the fields for the semantic handler. */ | |
1699 | FLD (f_simm16) = f_simm16; | |
de8f5985 DB |
1700 | FLD (f_r2) = f_r2; |
1701 | FLD (f_r1) = f_r1; | |
c906108c SS |
1702 | FLD (i_sr) = & CPU (h_gr)[f_r2]; |
1703 | FLD (i_dr) = & CPU (h_gr)[f_r1]; | |
de8f5985 | 1704 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_sll3", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); |
c906108c SS |
1705 | |
1706 | #if WITH_PROFILE_MODEL_P | |
1707 | /* Record the fields for profiling. */ | |
1708 | if (PROFILE_MODEL_P (current_cpu)) | |
1709 | { | |
1710 | FLD (in_sr) = f_r2; | |
1711 | FLD (out_dr) = f_r1; | |
1712 | } | |
1713 | #endif | |
1714 | #undef FLD | |
7a292a7a | 1715 | return idesc; |
c906108c SS |
1716 | } |
1717 | ||
96baa820 | 1718 | extract_sfmt_slli: |
c906108c | 1719 | { |
7a292a7a | 1720 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1721 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1722 | #define FLD(f) abuf->fields.sfmt_slli.f |
1723 | UINT f_r1; | |
1724 | UINT f_uimm5; | |
c906108c | 1725 | |
96baa820 JM |
1726 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
1727 | f_uimm5 = EXTRACT_MSB0_UINT (insn, 16, 11, 5); | |
c906108c SS |
1728 | |
1729 | /* Record the fields for the semantic handler. */ | |
de8f5985 | 1730 | FLD (f_r1) = f_r1; |
c906108c SS |
1731 | FLD (f_uimm5) = f_uimm5; |
1732 | FLD (i_dr) = & CPU (h_gr)[f_r1]; | |
de8f5985 | 1733 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_slli", "f_r1 0x%x", 'x', f_r1, "f_uimm5 0x%x", 'x', f_uimm5, "dr 0x%x", 'x', f_r1, (char *) 0)); |
c906108c SS |
1734 | |
1735 | #if WITH_PROFILE_MODEL_P | |
1736 | /* Record the fields for profiling. */ | |
1737 | if (PROFILE_MODEL_P (current_cpu)) | |
1738 | { | |
1739 | FLD (in_dr) = f_r1; | |
1740 | FLD (out_dr) = f_r1; | |
1741 | } | |
1742 | #endif | |
1743 | #undef FLD | |
7a292a7a | 1744 | return idesc; |
c906108c SS |
1745 | } |
1746 | ||
96baa820 | 1747 | extract_sfmt_st: |
c906108c | 1748 | { |
7a292a7a | 1749 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1750 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1751 | #define FLD(f) abuf->fields.sfmt_st_plus.f |
1752 | UINT f_r1; | |
1753 | UINT f_r2; | |
c906108c | 1754 | |
96baa820 JM |
1755 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
1756 | f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); | |
c906108c SS |
1757 | |
1758 | /* Record the fields for the semantic handler. */ | |
de8f5985 DB |
1759 | FLD (f_r1) = f_r1; |
1760 | FLD (f_r2) = f_r2; | |
c906108c SS |
1761 | FLD (i_src1) = & CPU (h_gr)[f_r1]; |
1762 | FLD (i_src2) = & CPU (h_gr)[f_r2]; | |
de8f5985 | 1763 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_st", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); |
c906108c SS |
1764 | |
1765 | #if WITH_PROFILE_MODEL_P | |
1766 | /* Record the fields for profiling. */ | |
1767 | if (PROFILE_MODEL_P (current_cpu)) | |
1768 | { | |
1769 | FLD (in_src1) = f_r1; | |
1770 | FLD (in_src2) = f_r2; | |
1771 | } | |
1772 | #endif | |
1773 | #undef FLD | |
7a292a7a | 1774 | return idesc; |
c906108c SS |
1775 | } |
1776 | ||
96baa820 | 1777 | extract_sfmt_st_d: |
c906108c | 1778 | { |
7a292a7a | 1779 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1780 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1781 | #define FLD(f) abuf->fields.sfmt_st_d.f |
1782 | UINT f_r1; | |
1783 | UINT f_r2; | |
1784 | INT f_simm16; | |
c906108c | 1785 | |
96baa820 JM |
1786 | f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); |
1787 | f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); | |
1788 | f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); | |
c906108c SS |
1789 | |
1790 | /* Record the fields for the semantic handler. */ | |
1791 | FLD (f_simm16) = f_simm16; | |
de8f5985 DB |
1792 | FLD (f_r1) = f_r1; |
1793 | FLD (f_r2) = f_r2; | |
c906108c SS |
1794 | FLD (i_src1) = & CPU (h_gr)[f_r1]; |
1795 | FLD (i_src2) = & CPU (h_gr)[f_r2]; | |
de8f5985 | 1796 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_st_d", "f_simm16 0x%x", 'x', f_simm16, "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); |
c906108c SS |
1797 | |
1798 | #if WITH_PROFILE_MODEL_P | |
1799 | /* Record the fields for profiling. */ | |
1800 | if (PROFILE_MODEL_P (current_cpu)) | |
1801 | { | |
1802 | FLD (in_src1) = f_r1; | |
1803 | FLD (in_src2) = f_r2; | |
1804 | } | |
1805 | #endif | |
1806 | #undef FLD | |
7a292a7a | 1807 | return idesc; |
c906108c SS |
1808 | } |
1809 | ||
96baa820 | 1810 | extract_sfmt_stb: |
c906108c | 1811 | { |
7a292a7a | 1812 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1813 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1814 | #define FLD(f) abuf->fields.sfmt_st_plus.f |
1815 | UINT f_r1; | |
1816 | UINT f_r2; | |
c906108c | 1817 | |
96baa820 JM |
1818 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
1819 | f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); | |
c906108c SS |
1820 | |
1821 | /* Record the fields for the semantic handler. */ | |
de8f5985 DB |
1822 | FLD (f_r1) = f_r1; |
1823 | FLD (f_r2) = f_r2; | |
c906108c SS |
1824 | FLD (i_src1) = & CPU (h_gr)[f_r1]; |
1825 | FLD (i_src2) = & CPU (h_gr)[f_r2]; | |
de8f5985 | 1826 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stb", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); |
c906108c SS |
1827 | |
1828 | #if WITH_PROFILE_MODEL_P | |
1829 | /* Record the fields for profiling. */ | |
1830 | if (PROFILE_MODEL_P (current_cpu)) | |
1831 | { | |
1832 | FLD (in_src1) = f_r1; | |
1833 | FLD (in_src2) = f_r2; | |
1834 | } | |
1835 | #endif | |
1836 | #undef FLD | |
7a292a7a | 1837 | return idesc; |
c906108c SS |
1838 | } |
1839 | ||
96baa820 | 1840 | extract_sfmt_stb_d: |
c906108c | 1841 | { |
7a292a7a | 1842 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1843 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1844 | #define FLD(f) abuf->fields.sfmt_st_d.f |
1845 | UINT f_r1; | |
1846 | UINT f_r2; | |
1847 | INT f_simm16; | |
c906108c | 1848 | |
96baa820 JM |
1849 | f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); |
1850 | f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); | |
1851 | f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); | |
c906108c SS |
1852 | |
1853 | /* Record the fields for the semantic handler. */ | |
1854 | FLD (f_simm16) = f_simm16; | |
de8f5985 DB |
1855 | FLD (f_r1) = f_r1; |
1856 | FLD (f_r2) = f_r2; | |
c906108c SS |
1857 | FLD (i_src1) = & CPU (h_gr)[f_r1]; |
1858 | FLD (i_src2) = & CPU (h_gr)[f_r2]; | |
de8f5985 | 1859 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stb_d", "f_simm16 0x%x", 'x', f_simm16, "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); |
c906108c SS |
1860 | |
1861 | #if WITH_PROFILE_MODEL_P | |
1862 | /* Record the fields for profiling. */ | |
1863 | if (PROFILE_MODEL_P (current_cpu)) | |
1864 | { | |
1865 | FLD (in_src1) = f_r1; | |
1866 | FLD (in_src2) = f_r2; | |
1867 | } | |
1868 | #endif | |
1869 | #undef FLD | |
7a292a7a | 1870 | return idesc; |
c906108c SS |
1871 | } |
1872 | ||
96baa820 | 1873 | extract_sfmt_sth: |
c906108c | 1874 | { |
7a292a7a | 1875 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1876 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1877 | #define FLD(f) abuf->fields.sfmt_st_plus.f |
1878 | UINT f_r1; | |
1879 | UINT f_r2; | |
c906108c | 1880 | |
96baa820 JM |
1881 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
1882 | f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); | |
c906108c SS |
1883 | |
1884 | /* Record the fields for the semantic handler. */ | |
de8f5985 DB |
1885 | FLD (f_r1) = f_r1; |
1886 | FLD (f_r2) = f_r2; | |
c906108c SS |
1887 | FLD (i_src1) = & CPU (h_gr)[f_r1]; |
1888 | FLD (i_src2) = & CPU (h_gr)[f_r2]; | |
de8f5985 | 1889 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_sth", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); |
c906108c SS |
1890 | |
1891 | #if WITH_PROFILE_MODEL_P | |
1892 | /* Record the fields for profiling. */ | |
1893 | if (PROFILE_MODEL_P (current_cpu)) | |
1894 | { | |
1895 | FLD (in_src1) = f_r1; | |
1896 | FLD (in_src2) = f_r2; | |
1897 | } | |
1898 | #endif | |
1899 | #undef FLD | |
7a292a7a | 1900 | return idesc; |
c906108c SS |
1901 | } |
1902 | ||
96baa820 | 1903 | extract_sfmt_sth_d: |
c906108c | 1904 | { |
7a292a7a | 1905 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1906 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1907 | #define FLD(f) abuf->fields.sfmt_st_d.f |
1908 | UINT f_r1; | |
1909 | UINT f_r2; | |
1910 | INT f_simm16; | |
c906108c | 1911 | |
96baa820 JM |
1912 | f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); |
1913 | f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); | |
1914 | f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); | |
c906108c SS |
1915 | |
1916 | /* Record the fields for the semantic handler. */ | |
1917 | FLD (f_simm16) = f_simm16; | |
de8f5985 DB |
1918 | FLD (f_r1) = f_r1; |
1919 | FLD (f_r2) = f_r2; | |
c906108c SS |
1920 | FLD (i_src1) = & CPU (h_gr)[f_r1]; |
1921 | FLD (i_src2) = & CPU (h_gr)[f_r2]; | |
de8f5985 | 1922 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_sth_d", "f_simm16 0x%x", 'x', f_simm16, "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); |
c906108c SS |
1923 | |
1924 | #if WITH_PROFILE_MODEL_P | |
1925 | /* Record the fields for profiling. */ | |
1926 | if (PROFILE_MODEL_P (current_cpu)) | |
1927 | { | |
1928 | FLD (in_src1) = f_r1; | |
1929 | FLD (in_src2) = f_r2; | |
1930 | } | |
1931 | #endif | |
1932 | #undef FLD | |
7a292a7a | 1933 | return idesc; |
c906108c SS |
1934 | } |
1935 | ||
96baa820 | 1936 | extract_sfmt_st_plus: |
c906108c | 1937 | { |
7a292a7a | 1938 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1939 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1940 | #define FLD(f) abuf->fields.sfmt_st_plus.f |
1941 | UINT f_r1; | |
1942 | UINT f_r2; | |
c906108c | 1943 | |
96baa820 JM |
1944 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
1945 | f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); | |
c906108c SS |
1946 | |
1947 | /* Record the fields for the semantic handler. */ | |
de8f5985 DB |
1948 | FLD (f_r1) = f_r1; |
1949 | FLD (f_r2) = f_r2; | |
c906108c SS |
1950 | FLD (i_src1) = & CPU (h_gr)[f_r1]; |
1951 | FLD (i_src2) = & CPU (h_gr)[f_r2]; | |
de8f5985 | 1952 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_st_plus", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); |
c906108c SS |
1953 | |
1954 | #if WITH_PROFILE_MODEL_P | |
1955 | /* Record the fields for profiling. */ | |
1956 | if (PROFILE_MODEL_P (current_cpu)) | |
1957 | { | |
1958 | FLD (in_src1) = f_r1; | |
1959 | FLD (in_src2) = f_r2; | |
1960 | FLD (out_src2) = f_r2; | |
1961 | } | |
1962 | #endif | |
1963 | #undef FLD | |
7a292a7a | 1964 | return idesc; |
c906108c SS |
1965 | } |
1966 | ||
96baa820 | 1967 | extract_sfmt_trap: |
c906108c | 1968 | { |
7a292a7a | 1969 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1970 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1971 | #define FLD(f) abuf->fields.sfmt_trap.f |
1972 | UINT f_uimm4; | |
c906108c | 1973 | |
96baa820 | 1974 | f_uimm4 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); |
c906108c SS |
1975 | |
1976 | /* Record the fields for the semantic handler. */ | |
1977 | FLD (f_uimm4) = f_uimm4; | |
96baa820 | 1978 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_trap", "f_uimm4 0x%x", 'x', f_uimm4, (char *) 0)); |
c906108c SS |
1979 | |
1980 | #if WITH_PROFILE_MODEL_P | |
1981 | /* Record the fields for profiling. */ | |
1982 | if (PROFILE_MODEL_P (current_cpu)) | |
1983 | { | |
1984 | } | |
1985 | #endif | |
1986 | #undef FLD | |
7a292a7a | 1987 | return idesc; |
c906108c SS |
1988 | } |
1989 | ||
96baa820 | 1990 | extract_sfmt_unlock: |
c906108c | 1991 | { |
7a292a7a | 1992 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1993 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1994 | #define FLD(f) abuf->fields.sfmt_st_plus.f |
1995 | UINT f_r1; | |
1996 | UINT f_r2; | |
c906108c | 1997 | |
96baa820 JM |
1998 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
1999 | f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); | |
c906108c SS |
2000 | |
2001 | /* Record the fields for the semantic handler. */ | |
de8f5985 DB |
2002 | FLD (f_r1) = f_r1; |
2003 | FLD (f_r2) = f_r2; | |
c906108c SS |
2004 | FLD (i_src1) = & CPU (h_gr)[f_r1]; |
2005 | FLD (i_src2) = & CPU (h_gr)[f_r2]; | |
de8f5985 | 2006 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_unlock", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); |
c906108c SS |
2007 | |
2008 | #if WITH_PROFILE_MODEL_P | |
2009 | /* Record the fields for profiling. */ | |
2010 | if (PROFILE_MODEL_P (current_cpu)) | |
2011 | { | |
2012 | FLD (in_src1) = f_r1; | |
2013 | FLD (in_src2) = f_r2; | |
2014 | } | |
2015 | #endif | |
16b47b25 NC |
2016 | #undef FLD |
2017 | return idesc; | |
2018 | } | |
2019 | ||
2020 | extract_sfmt_clrpsw: | |
2021 | { | |
2022 | const IDESC *idesc = &m32rbf_insn_data[itype]; | |
2023 | CGEN_INSN_INT insn = entire_insn; | |
2024 | #define FLD(f) abuf->fields.sfmt_clrpsw.f | |
2025 | UINT f_uimm8; | |
2026 | ||
2027 | f_uimm8 = EXTRACT_MSB0_UINT (insn, 16, 8, 8); | |
2028 | ||
2029 | /* Record the fields for the semantic handler. */ | |
2030 | FLD (f_uimm8) = f_uimm8; | |
2031 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_clrpsw", "f_uimm8 0x%x", 'x', f_uimm8, (char *) 0)); | |
2032 | ||
2033 | #undef FLD | |
2034 | return idesc; | |
2035 | } | |
2036 | ||
2037 | extract_sfmt_setpsw: | |
2038 | { | |
2039 | const IDESC *idesc = &m32rbf_insn_data[itype]; | |
2040 | CGEN_INSN_INT insn = entire_insn; | |
2041 | #define FLD(f) abuf->fields.sfmt_clrpsw.f | |
2042 | UINT f_uimm8; | |
2043 | ||
2044 | f_uimm8 = EXTRACT_MSB0_UINT (insn, 16, 8, 8); | |
2045 | ||
2046 | /* Record the fields for the semantic handler. */ | |
2047 | FLD (f_uimm8) = f_uimm8; | |
2048 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_setpsw", "f_uimm8 0x%x", 'x', f_uimm8, (char *) 0)); | |
2049 | ||
2050 | #undef FLD | |
2051 | return idesc; | |
2052 | } | |
2053 | ||
2054 | extract_sfmt_bset: | |
2055 | { | |
2056 | const IDESC *idesc = &m32rbf_insn_data[itype]; | |
2057 | CGEN_INSN_INT insn = entire_insn; | |
2058 | #define FLD(f) abuf->fields.sfmt_bset.f | |
2059 | UINT f_uimm3; | |
2060 | UINT f_r2; | |
2061 | INT f_simm16; | |
2062 | ||
2063 | f_uimm3 = EXTRACT_MSB0_UINT (insn, 32, 5, 3); | |
2064 | f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); | |
2065 | f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); | |
2066 | ||
2067 | /* Record the fields for the semantic handler. */ | |
2068 | FLD (f_simm16) = f_simm16; | |
2069 | FLD (f_r2) = f_r2; | |
2070 | FLD (f_uimm3) = f_uimm3; | |
2071 | FLD (i_sr) = & CPU (h_gr)[f_r2]; | |
2072 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bset", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "f_uimm3 0x%x", 'x', f_uimm3, "sr 0x%x", 'x', f_r2, (char *) 0)); | |
2073 | ||
2074 | #if WITH_PROFILE_MODEL_P | |
2075 | /* Record the fields for profiling. */ | |
2076 | if (PROFILE_MODEL_P (current_cpu)) | |
2077 | { | |
2078 | FLD (in_sr) = f_r2; | |
2079 | } | |
2080 | #endif | |
2081 | #undef FLD | |
2082 | return idesc; | |
2083 | } | |
2084 | ||
2085 | extract_sfmt_btst: | |
2086 | { | |
2087 | const IDESC *idesc = &m32rbf_insn_data[itype]; | |
2088 | CGEN_INSN_INT insn = entire_insn; | |
2089 | #define FLD(f) abuf->fields.sfmt_bset.f | |
2090 | UINT f_uimm3; | |
2091 | UINT f_r2; | |
2092 | ||
2093 | f_uimm3 = EXTRACT_MSB0_UINT (insn, 16, 5, 3); | |
2094 | f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); | |
2095 | ||
2096 | /* Record the fields for the semantic handler. */ | |
2097 | FLD (f_r2) = f_r2; | |
2098 | FLD (f_uimm3) = f_uimm3; | |
2099 | FLD (i_sr) = & CPU (h_gr)[f_r2]; | |
2100 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_btst", "f_r2 0x%x", 'x', f_r2, "f_uimm3 0x%x", 'x', f_uimm3, "sr 0x%x", 'x', f_r2, (char *) 0)); | |
2101 | ||
2102 | #if WITH_PROFILE_MODEL_P | |
2103 | /* Record the fields for profiling. */ | |
2104 | if (PROFILE_MODEL_P (current_cpu)) | |
2105 | { | |
2106 | FLD (in_sr) = f_r2; | |
2107 | } | |
2108 | #endif | |
c906108c | 2109 | #undef FLD |
7a292a7a | 2110 | return idesc; |
c906108c SS |
2111 | } |
2112 | ||
c906108c | 2113 | } |