Commit | Line | Data |
---|---|---|
c906108c SS |
1 | /* Simulator instruction decoder for m32rbf. |
2 | ||
3 | THIS FILE IS MACHINE GENERATED WITH CGEN. | |
4 | ||
16b47b25 | 5 | Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc. |
c906108c | 6 | |
378af1d6 | 7 | This file is part of the GNU simulators. |
c906108c SS |
8 | |
9 | This program is free software; you can redistribute it and/or modify | |
10 | it under the terms of the GNU General Public License as published by | |
4744ac1b JB |
11 | the Free Software Foundation; either version 3 of the License, or |
12 | (at your option) any later version. | |
c906108c SS |
13 | |
14 | This program is distributed in the hope that it will be useful, | |
15 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | GNU General Public License for more details. | |
18 | ||
4744ac1b JB |
19 | You should have received a copy of the GNU General Public License |
20 | along with this program. If not, see <http://www.gnu.org/licenses/>. | |
c906108c SS |
21 | |
22 | */ | |
23 | ||
24 | #define WANT_CPU m32rbf | |
25 | #define WANT_CPU_M32RBF | |
26 | ||
27 | #include "sim-main.h" | |
28 | #include "sim-assert.h" | |
29 | ||
c906108c SS |
30 | /* The instruction descriptor array. |
31 | This is computed at runtime. Space for it is not malloc'd to save a | |
32 | teensy bit of cpu in the decoder. Moving it to malloc space is trivial | |
33 | but won't be done until necessary (we don't currently support the runtime | |
34 | addition of instructions nor an SMP machine with different cpus). */ | |
57465455 | 35 | static IDESC m32rbf_insn_data[M32RBF_INSN__MAX]; |
c906108c | 36 | |
c906108c SS |
37 | /* Commas between elements are contained in the macros. |
38 | Some of these are conditionally compiled out. */ | |
39 | ||
40 | static const struct insn_sem m32rbf_insn_sem[] = | |
41 | { | |
96baa820 JM |
42 | { VIRTUAL_INSN_X_INVALID, M32RBF_INSN_X_INVALID, M32RBF_SFMT_EMPTY }, |
43 | { VIRTUAL_INSN_X_AFTER, M32RBF_INSN_X_AFTER, M32RBF_SFMT_EMPTY }, | |
44 | { VIRTUAL_INSN_X_BEFORE, M32RBF_INSN_X_BEFORE, M32RBF_SFMT_EMPTY }, | |
45 | { VIRTUAL_INSN_X_CTI_CHAIN, M32RBF_INSN_X_CTI_CHAIN, M32RBF_SFMT_EMPTY }, | |
46 | { VIRTUAL_INSN_X_CHAIN, M32RBF_INSN_X_CHAIN, M32RBF_SFMT_EMPTY }, | |
47 | { VIRTUAL_INSN_X_BEGIN, M32RBF_INSN_X_BEGIN, M32RBF_SFMT_EMPTY }, | |
48 | { M32R_INSN_ADD, M32RBF_INSN_ADD, M32RBF_SFMT_ADD }, | |
49 | { M32R_INSN_ADD3, M32RBF_INSN_ADD3, M32RBF_SFMT_ADD3 }, | |
50 | { M32R_INSN_AND, M32RBF_INSN_AND, M32RBF_SFMT_ADD }, | |
51 | { M32R_INSN_AND3, M32RBF_INSN_AND3, M32RBF_SFMT_AND3 }, | |
52 | { M32R_INSN_OR, M32RBF_INSN_OR, M32RBF_SFMT_ADD }, | |
53 | { M32R_INSN_OR3, M32RBF_INSN_OR3, M32RBF_SFMT_OR3 }, | |
54 | { M32R_INSN_XOR, M32RBF_INSN_XOR, M32RBF_SFMT_ADD }, | |
55 | { M32R_INSN_XOR3, M32RBF_INSN_XOR3, M32RBF_SFMT_AND3 }, | |
56 | { M32R_INSN_ADDI, M32RBF_INSN_ADDI, M32RBF_SFMT_ADDI }, | |
57 | { M32R_INSN_ADDV, M32RBF_INSN_ADDV, M32RBF_SFMT_ADDV }, | |
58 | { M32R_INSN_ADDV3, M32RBF_INSN_ADDV3, M32RBF_SFMT_ADDV3 }, | |
59 | { M32R_INSN_ADDX, M32RBF_INSN_ADDX, M32RBF_SFMT_ADDX }, | |
60 | { M32R_INSN_BC8, M32RBF_INSN_BC8, M32RBF_SFMT_BC8 }, | |
61 | { M32R_INSN_BC24, M32RBF_INSN_BC24, M32RBF_SFMT_BC24 }, | |
62 | { M32R_INSN_BEQ, M32RBF_INSN_BEQ, M32RBF_SFMT_BEQ }, | |
63 | { M32R_INSN_BEQZ, M32RBF_INSN_BEQZ, M32RBF_SFMT_BEQZ }, | |
64 | { M32R_INSN_BGEZ, M32RBF_INSN_BGEZ, M32RBF_SFMT_BEQZ }, | |
65 | { M32R_INSN_BGTZ, M32RBF_INSN_BGTZ, M32RBF_SFMT_BEQZ }, | |
66 | { M32R_INSN_BLEZ, M32RBF_INSN_BLEZ, M32RBF_SFMT_BEQZ }, | |
67 | { M32R_INSN_BLTZ, M32RBF_INSN_BLTZ, M32RBF_SFMT_BEQZ }, | |
68 | { M32R_INSN_BNEZ, M32RBF_INSN_BNEZ, M32RBF_SFMT_BEQZ }, | |
69 | { M32R_INSN_BL8, M32RBF_INSN_BL8, M32RBF_SFMT_BL8 }, | |
70 | { M32R_INSN_BL24, M32RBF_INSN_BL24, M32RBF_SFMT_BL24 }, | |
71 | { M32R_INSN_BNC8, M32RBF_INSN_BNC8, M32RBF_SFMT_BC8 }, | |
72 | { M32R_INSN_BNC24, M32RBF_INSN_BNC24, M32RBF_SFMT_BC24 }, | |
73 | { M32R_INSN_BNE, M32RBF_INSN_BNE, M32RBF_SFMT_BEQ }, | |
74 | { M32R_INSN_BRA8, M32RBF_INSN_BRA8, M32RBF_SFMT_BRA8 }, | |
75 | { M32R_INSN_BRA24, M32RBF_INSN_BRA24, M32RBF_SFMT_BRA24 }, | |
76 | { M32R_INSN_CMP, M32RBF_INSN_CMP, M32RBF_SFMT_CMP }, | |
77 | { M32R_INSN_CMPI, M32RBF_INSN_CMPI, M32RBF_SFMT_CMPI }, | |
78 | { M32R_INSN_CMPU, M32RBF_INSN_CMPU, M32RBF_SFMT_CMP }, | |
79 | { M32R_INSN_CMPUI, M32RBF_INSN_CMPUI, M32RBF_SFMT_CMPI }, | |
80 | { M32R_INSN_DIV, M32RBF_INSN_DIV, M32RBF_SFMT_DIV }, | |
81 | { M32R_INSN_DIVU, M32RBF_INSN_DIVU, M32RBF_SFMT_DIV }, | |
82 | { M32R_INSN_REM, M32RBF_INSN_REM, M32RBF_SFMT_DIV }, | |
83 | { M32R_INSN_REMU, M32RBF_INSN_REMU, M32RBF_SFMT_DIV }, | |
84 | { M32R_INSN_JL, M32RBF_INSN_JL, M32RBF_SFMT_JL }, | |
85 | { M32R_INSN_JMP, M32RBF_INSN_JMP, M32RBF_SFMT_JMP }, | |
86 | { M32R_INSN_LD, M32RBF_INSN_LD, M32RBF_SFMT_LD }, | |
87 | { M32R_INSN_LD_D, M32RBF_INSN_LD_D, M32RBF_SFMT_LD_D }, | |
378af1d6 DB |
88 | { M32R_INSN_LDB, M32RBF_INSN_LDB, M32RBF_SFMT_LDB }, |
89 | { M32R_INSN_LDB_D, M32RBF_INSN_LDB_D, M32RBF_SFMT_LDB_D }, | |
90 | { M32R_INSN_LDH, M32RBF_INSN_LDH, M32RBF_SFMT_LDH }, | |
91 | { M32R_INSN_LDH_D, M32RBF_INSN_LDH_D, M32RBF_SFMT_LDH_D }, | |
92 | { M32R_INSN_LDUB, M32RBF_INSN_LDUB, M32RBF_SFMT_LDB }, | |
93 | { M32R_INSN_LDUB_D, M32RBF_INSN_LDUB_D, M32RBF_SFMT_LDB_D }, | |
94 | { M32R_INSN_LDUH, M32RBF_INSN_LDUH, M32RBF_SFMT_LDH }, | |
95 | { M32R_INSN_LDUH_D, M32RBF_INSN_LDUH_D, M32RBF_SFMT_LDH_D }, | |
96baa820 JM |
96 | { M32R_INSN_LD_PLUS, M32RBF_INSN_LD_PLUS, M32RBF_SFMT_LD_PLUS }, |
97 | { M32R_INSN_LD24, M32RBF_INSN_LD24, M32RBF_SFMT_LD24 }, | |
98 | { M32R_INSN_LDI8, M32RBF_INSN_LDI8, M32RBF_SFMT_LDI8 }, | |
99 | { M32R_INSN_LDI16, M32RBF_INSN_LDI16, M32RBF_SFMT_LDI16 }, | |
100 | { M32R_INSN_LOCK, M32RBF_INSN_LOCK, M32RBF_SFMT_LOCK }, | |
101 | { M32R_INSN_MACHI, M32RBF_INSN_MACHI, M32RBF_SFMT_MACHI }, | |
102 | { M32R_INSN_MACLO, M32RBF_INSN_MACLO, M32RBF_SFMT_MACHI }, | |
103 | { M32R_INSN_MACWHI, M32RBF_INSN_MACWHI, M32RBF_SFMT_MACHI }, | |
104 | { M32R_INSN_MACWLO, M32RBF_INSN_MACWLO, M32RBF_SFMT_MACHI }, | |
105 | { M32R_INSN_MUL, M32RBF_INSN_MUL, M32RBF_SFMT_ADD }, | |
106 | { M32R_INSN_MULHI, M32RBF_INSN_MULHI, M32RBF_SFMT_MULHI }, | |
107 | { M32R_INSN_MULLO, M32RBF_INSN_MULLO, M32RBF_SFMT_MULHI }, | |
108 | { M32R_INSN_MULWHI, M32RBF_INSN_MULWHI, M32RBF_SFMT_MULHI }, | |
109 | { M32R_INSN_MULWLO, M32RBF_INSN_MULWLO, M32RBF_SFMT_MULHI }, | |
110 | { M32R_INSN_MV, M32RBF_INSN_MV, M32RBF_SFMT_MV }, | |
111 | { M32R_INSN_MVFACHI, M32RBF_INSN_MVFACHI, M32RBF_SFMT_MVFACHI }, | |
112 | { M32R_INSN_MVFACLO, M32RBF_INSN_MVFACLO, M32RBF_SFMT_MVFACHI }, | |
113 | { M32R_INSN_MVFACMI, M32RBF_INSN_MVFACMI, M32RBF_SFMT_MVFACHI }, | |
114 | { M32R_INSN_MVFC, M32RBF_INSN_MVFC, M32RBF_SFMT_MVFC }, | |
115 | { M32R_INSN_MVTACHI, M32RBF_INSN_MVTACHI, M32RBF_SFMT_MVTACHI }, | |
116 | { M32R_INSN_MVTACLO, M32RBF_INSN_MVTACLO, M32RBF_SFMT_MVTACHI }, | |
117 | { M32R_INSN_MVTC, M32RBF_INSN_MVTC, M32RBF_SFMT_MVTC }, | |
118 | { M32R_INSN_NEG, M32RBF_INSN_NEG, M32RBF_SFMT_MV }, | |
119 | { M32R_INSN_NOP, M32RBF_INSN_NOP, M32RBF_SFMT_NOP }, | |
120 | { M32R_INSN_NOT, M32RBF_INSN_NOT, M32RBF_SFMT_MV }, | |
121 | { M32R_INSN_RAC, M32RBF_INSN_RAC, M32RBF_SFMT_RAC }, | |
122 | { M32R_INSN_RACH, M32RBF_INSN_RACH, M32RBF_SFMT_RAC }, | |
123 | { M32R_INSN_RTE, M32RBF_INSN_RTE, M32RBF_SFMT_RTE }, | |
124 | { M32R_INSN_SETH, M32RBF_INSN_SETH, M32RBF_SFMT_SETH }, | |
125 | { M32R_INSN_SLL, M32RBF_INSN_SLL, M32RBF_SFMT_ADD }, | |
126 | { M32R_INSN_SLL3, M32RBF_INSN_SLL3, M32RBF_SFMT_SLL3 }, | |
127 | { M32R_INSN_SLLI, M32RBF_INSN_SLLI, M32RBF_SFMT_SLLI }, | |
128 | { M32R_INSN_SRA, M32RBF_INSN_SRA, M32RBF_SFMT_ADD }, | |
129 | { M32R_INSN_SRA3, M32RBF_INSN_SRA3, M32RBF_SFMT_SLL3 }, | |
130 | { M32R_INSN_SRAI, M32RBF_INSN_SRAI, M32RBF_SFMT_SLLI }, | |
131 | { M32R_INSN_SRL, M32RBF_INSN_SRL, M32RBF_SFMT_ADD }, | |
132 | { M32R_INSN_SRL3, M32RBF_INSN_SRL3, M32RBF_SFMT_SLL3 }, | |
133 | { M32R_INSN_SRLI, M32RBF_INSN_SRLI, M32RBF_SFMT_SLLI }, | |
134 | { M32R_INSN_ST, M32RBF_INSN_ST, M32RBF_SFMT_ST }, | |
135 | { M32R_INSN_ST_D, M32RBF_INSN_ST_D, M32RBF_SFMT_ST_D }, | |
136 | { M32R_INSN_STB, M32RBF_INSN_STB, M32RBF_SFMT_STB }, | |
137 | { M32R_INSN_STB_D, M32RBF_INSN_STB_D, M32RBF_SFMT_STB_D }, | |
138 | { M32R_INSN_STH, M32RBF_INSN_STH, M32RBF_SFMT_STH }, | |
139 | { M32R_INSN_STH_D, M32RBF_INSN_STH_D, M32RBF_SFMT_STH_D }, | |
140 | { M32R_INSN_ST_PLUS, M32RBF_INSN_ST_PLUS, M32RBF_SFMT_ST_PLUS }, | |
141 | { M32R_INSN_ST_MINUS, M32RBF_INSN_ST_MINUS, M32RBF_SFMT_ST_PLUS }, | |
142 | { M32R_INSN_SUB, M32RBF_INSN_SUB, M32RBF_SFMT_ADD }, | |
143 | { M32R_INSN_SUBV, M32RBF_INSN_SUBV, M32RBF_SFMT_ADDV }, | |
144 | { M32R_INSN_SUBX, M32RBF_INSN_SUBX, M32RBF_SFMT_ADDX }, | |
145 | { M32R_INSN_TRAP, M32RBF_INSN_TRAP, M32RBF_SFMT_TRAP }, | |
146 | { M32R_INSN_UNLOCK, M32RBF_INSN_UNLOCK, M32RBF_SFMT_UNLOCK }, | |
16b47b25 NC |
147 | { M32R_INSN_CLRPSW, M32RBF_INSN_CLRPSW, M32RBF_SFMT_CLRPSW }, |
148 | { M32R_INSN_SETPSW, M32RBF_INSN_SETPSW, M32RBF_SFMT_SETPSW }, | |
149 | { M32R_INSN_BSET, M32RBF_INSN_BSET, M32RBF_SFMT_BSET }, | |
150 | { M32R_INSN_BCLR, M32RBF_INSN_BCLR, M32RBF_SFMT_BSET }, | |
151 | { M32R_INSN_BTST, M32RBF_INSN_BTST, M32RBF_SFMT_BTST }, | |
c906108c SS |
152 | }; |
153 | ||
96baa820 JM |
154 | static const struct insn_sem m32rbf_insn_sem_invalid = { |
155 | VIRTUAL_INSN_X_INVALID, M32RBF_INSN_X_INVALID, M32RBF_SFMT_EMPTY | |
c906108c SS |
156 | }; |
157 | ||
c906108c SS |
158 | /* Initialize an IDESC from the compile-time computable parts. */ |
159 | ||
160 | static INLINE void | |
161 | init_idesc (SIM_CPU *cpu, IDESC *id, const struct insn_sem *t) | |
162 | { | |
163 | const CGEN_INSN *insn_table = CGEN_CPU_INSN_TABLE (CPU_CPU_DESC (cpu))->init_entries; | |
164 | ||
165 | id->num = t->index; | |
96baa820 | 166 | id->sfmt = t->sfmt; |
c906108c SS |
167 | if ((int) t->type <= 0) |
168 | id->idata = & cgen_virtual_insn_table[- (int) t->type]; | |
169 | else | |
170 | id->idata = & insn_table[t->type]; | |
171 | id->attrs = CGEN_INSN_ATTRS (id->idata); | |
172 | /* Oh my god, a magic number. */ | |
173 | id->length = CGEN_INSN_BITSIZE (id->idata) / 8; | |
96baa820 | 174 | |
c906108c SS |
175 | #if WITH_PROFILE_MODEL_P |
176 | id->timing = & MODEL_TIMING (CPU_MODEL (cpu)) [t->index]; | |
177 | { | |
178 | SIM_DESC sd = CPU_STATE (cpu); | |
179 | SIM_ASSERT (t->index == id->timing->num); | |
180 | } | |
181 | #endif | |
96baa820 JM |
182 | |
183 | /* Semantic pointers are initialized elsewhere. */ | |
c906108c SS |
184 | } |
185 | ||
186 | /* Initialize the instruction descriptor table. */ | |
187 | ||
188 | void | |
189 | m32rbf_init_idesc_table (SIM_CPU *cpu) | |
190 | { | |
191 | IDESC *id,*tabend; | |
192 | const struct insn_sem *t,*tend; | |
57465455 | 193 | int tabsize = M32RBF_INSN__MAX; |
c906108c SS |
194 | IDESC *table = m32rbf_insn_data; |
195 | ||
196 | memset (table, 0, tabsize * sizeof (IDESC)); | |
197 | ||
198 | /* First set all entries to the `invalid insn'. */ | |
199 | t = & m32rbf_insn_sem_invalid; | |
200 | for (id = table, tabend = table + tabsize; id < tabend; ++id) | |
201 | init_idesc (cpu, id, t); | |
202 | ||
203 | /* Now fill in the values for the chosen cpu. */ | |
204 | for (t = m32rbf_insn_sem, tend = t + sizeof (m32rbf_insn_sem) / sizeof (*t); | |
205 | t != tend; ++t) | |
206 | { | |
207 | init_idesc (cpu, & table[t->index], t); | |
208 | } | |
209 | ||
210 | /* Link the IDESC table into the cpu. */ | |
211 | CPU_IDESC (cpu) = table; | |
212 | } | |
213 | ||
c906108c SS |
214 | /* Given an instruction, return a pointer to its IDESC entry. */ |
215 | ||
216 | const IDESC * | |
217 | m32rbf_decode (SIM_CPU *current_cpu, IADDR pc, | |
218 | CGEN_INSN_INT base_insn, CGEN_INSN_INT entire_insn, | |
219 | ARGBUF *abuf) | |
220 | { | |
7a292a7a SS |
221 | /* Result of decoder. */ |
222 | M32RBF_INSN_TYPE itype; | |
c906108c SS |
223 | |
224 | { | |
c906108c | 225 | CGEN_INSN_INT insn = base_insn; |
c906108c SS |
226 | |
227 | { | |
7a292a7a SS |
228 | unsigned int val = (((insn >> 8) & (15 << 4)) | ((insn >> 4) & (15 << 0))); |
229 | switch (val) | |
230 | { | |
57465455 DE |
231 | case 0 : itype = M32RBF_INSN_SUBV; goto extract_sfmt_addv; |
232 | case 1 : itype = M32RBF_INSN_SUBX; goto extract_sfmt_addx; | |
233 | case 2 : itype = M32RBF_INSN_SUB; goto extract_sfmt_add; | |
234 | case 3 : itype = M32RBF_INSN_NEG; goto extract_sfmt_mv; | |
235 | case 4 : itype = M32RBF_INSN_CMP; goto extract_sfmt_cmp; | |
236 | case 5 : itype = M32RBF_INSN_CMPU; goto extract_sfmt_cmp; | |
237 | case 8 : itype = M32RBF_INSN_ADDV; goto extract_sfmt_addv; | |
238 | case 9 : itype = M32RBF_INSN_ADDX; goto extract_sfmt_addx; | |
239 | case 10 : itype = M32RBF_INSN_ADD; goto extract_sfmt_add; | |
240 | case 11 : itype = M32RBF_INSN_NOT; goto extract_sfmt_mv; | |
241 | case 12 : itype = M32RBF_INSN_AND; goto extract_sfmt_add; | |
242 | case 13 : itype = M32RBF_INSN_XOR; goto extract_sfmt_add; | |
243 | case 14 : itype = M32RBF_INSN_OR; goto extract_sfmt_add; | |
16b47b25 | 244 | case 15 : itype = M32RBF_INSN_BTST; goto extract_sfmt_btst; |
57465455 DE |
245 | case 16 : itype = M32RBF_INSN_SRL; goto extract_sfmt_add; |
246 | case 18 : itype = M32RBF_INSN_SRA; goto extract_sfmt_add; | |
247 | case 20 : itype = M32RBF_INSN_SLL; goto extract_sfmt_add; | |
248 | case 22 : itype = M32RBF_INSN_MUL; goto extract_sfmt_add; | |
249 | case 24 : itype = M32RBF_INSN_MV; goto extract_sfmt_mv; | |
250 | case 25 : itype = M32RBF_INSN_MVFC; goto extract_sfmt_mvfc; | |
251 | case 26 : itype = M32RBF_INSN_MVTC; goto extract_sfmt_mvtc; | |
378af1d6 | 252 | case 28 : |
c906108c | 253 | { |
55552082 | 254 | unsigned int val = (((insn >> 8) & (1 << 0))); |
7a292a7a | 255 | switch (val) |
c906108c | 256 | { |
57465455 DE |
257 | case 0 : itype = M32RBF_INSN_JL; goto extract_sfmt_jl; |
258 | case 1 : itype = M32RBF_INSN_JMP; goto extract_sfmt_jmp; | |
378af1d6 | 259 | default : itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty; |
c906108c | 260 | } |
7a292a7a | 261 | } |
57465455 DE |
262 | case 29 : itype = M32RBF_INSN_RTE; goto extract_sfmt_rte; |
263 | case 31 : itype = M32RBF_INSN_TRAP; goto extract_sfmt_trap; | |
264 | case 32 : itype = M32RBF_INSN_STB; goto extract_sfmt_stb; | |
265 | case 34 : itype = M32RBF_INSN_STH; goto extract_sfmt_sth; | |
266 | case 36 : itype = M32RBF_INSN_ST; goto extract_sfmt_st; | |
267 | case 37 : itype = M32RBF_INSN_UNLOCK; goto extract_sfmt_unlock; | |
268 | case 38 : itype = M32RBF_INSN_ST_PLUS; goto extract_sfmt_st_plus; | |
269 | case 39 : itype = M32RBF_INSN_ST_MINUS; goto extract_sfmt_st_plus; | |
270 | case 40 : itype = M32RBF_INSN_LDB; goto extract_sfmt_ldb; | |
271 | case 41 : itype = M32RBF_INSN_LDUB; goto extract_sfmt_ldb; | |
272 | case 42 : itype = M32RBF_INSN_LDH; goto extract_sfmt_ldh; | |
273 | case 43 : itype = M32RBF_INSN_LDUH; goto extract_sfmt_ldh; | |
274 | case 44 : itype = M32RBF_INSN_LD; goto extract_sfmt_ld; | |
275 | case 45 : itype = M32RBF_INSN_LOCK; goto extract_sfmt_lock; | |
276 | case 46 : itype = M32RBF_INSN_LD_PLUS; goto extract_sfmt_ld_plus; | |
277 | case 48 : itype = M32RBF_INSN_MULHI; goto extract_sfmt_mulhi; | |
278 | case 49 : itype = M32RBF_INSN_MULLO; goto extract_sfmt_mulhi; | |
279 | case 50 : itype = M32RBF_INSN_MULWHI; goto extract_sfmt_mulhi; | |
280 | case 51 : itype = M32RBF_INSN_MULWLO; goto extract_sfmt_mulhi; | |
281 | case 52 : itype = M32RBF_INSN_MACHI; goto extract_sfmt_machi; | |
282 | case 53 : itype = M32RBF_INSN_MACLO; goto extract_sfmt_machi; | |
283 | case 54 : itype = M32RBF_INSN_MACWHI; goto extract_sfmt_machi; | |
284 | case 55 : itype = M32RBF_INSN_MACWLO; goto extract_sfmt_machi; | |
378af1d6 | 285 | case 64 : /* fall through */ |
7a292a7a SS |
286 | case 65 : /* fall through */ |
287 | case 66 : /* fall through */ | |
288 | case 67 : /* fall through */ | |
289 | case 68 : /* fall through */ | |
290 | case 69 : /* fall through */ | |
291 | case 70 : /* fall through */ | |
292 | case 71 : /* fall through */ | |
293 | case 72 : /* fall through */ | |
294 | case 73 : /* fall through */ | |
295 | case 74 : /* fall through */ | |
296 | case 75 : /* fall through */ | |
297 | case 76 : /* fall through */ | |
298 | case 77 : /* fall through */ | |
299 | case 78 : /* fall through */ | |
57465455 | 300 | case 79 : itype = M32RBF_INSN_ADDI; goto extract_sfmt_addi; |
378af1d6 | 301 | case 80 : /* fall through */ |
57465455 | 302 | case 81 : itype = M32RBF_INSN_SRLI; goto extract_sfmt_slli; |
378af1d6 | 303 | case 82 : /* fall through */ |
57465455 | 304 | case 83 : itype = M32RBF_INSN_SRAI; goto extract_sfmt_slli; |
378af1d6 | 305 | case 84 : /* fall through */ |
57465455 | 306 | case 85 : itype = M32RBF_INSN_SLLI; goto extract_sfmt_slli; |
378af1d6 | 307 | case 87 : |
7a292a7a | 308 | { |
55552082 | 309 | unsigned int val = (((insn >> 0) & (1 << 0))); |
7a292a7a | 310 | switch (val) |
c906108c | 311 | { |
57465455 DE |
312 | case 0 : itype = M32RBF_INSN_MVTACHI; goto extract_sfmt_mvtachi; |
313 | case 1 : itype = M32RBF_INSN_MVTACLO; goto extract_sfmt_mvtachi; | |
378af1d6 | 314 | default : itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty; |
c906108c | 315 | } |
7a292a7a | 316 | } |
57465455 DE |
317 | case 88 : itype = M32RBF_INSN_RACH; goto extract_sfmt_rac; |
318 | case 89 : itype = M32RBF_INSN_RAC; goto extract_sfmt_rac; | |
378af1d6 | 319 | case 95 : |
7a292a7a | 320 | { |
55552082 | 321 | unsigned int val = (((insn >> 0) & (3 << 0))); |
7a292a7a | 322 | switch (val) |
c906108c | 323 | { |
57465455 DE |
324 | case 0 : itype = M32RBF_INSN_MVFACHI; goto extract_sfmt_mvfachi; |
325 | case 1 : itype = M32RBF_INSN_MVFACLO; goto extract_sfmt_mvfachi; | |
326 | case 2 : itype = M32RBF_INSN_MVFACMI; goto extract_sfmt_mvfachi; | |
378af1d6 | 327 | default : itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty; |
c906108c | 328 | } |
7a292a7a SS |
329 | } |
330 | case 96 : /* fall through */ | |
331 | case 97 : /* fall through */ | |
332 | case 98 : /* fall through */ | |
333 | case 99 : /* fall through */ | |
334 | case 100 : /* fall through */ | |
335 | case 101 : /* fall through */ | |
336 | case 102 : /* fall through */ | |
337 | case 103 : /* fall through */ | |
338 | case 104 : /* fall through */ | |
339 | case 105 : /* fall through */ | |
340 | case 106 : /* fall through */ | |
341 | case 107 : /* fall through */ | |
342 | case 108 : /* fall through */ | |
343 | case 109 : /* fall through */ | |
344 | case 110 : /* fall through */ | |
57465455 | 345 | case 111 : itype = M32RBF_INSN_LDI8; goto extract_sfmt_ldi8; |
378af1d6 | 346 | case 112 : |
7a292a7a SS |
347 | { |
348 | unsigned int val = (((insn >> 8) & (15 << 0))); | |
349 | switch (val) | |
c906108c | 350 | { |
57465455 | 351 | case 0 : itype = M32RBF_INSN_NOP; goto extract_sfmt_nop; |
16b47b25 NC |
352 | case 1 : itype = M32RBF_INSN_SETPSW; goto extract_sfmt_setpsw; |
353 | case 2 : itype = M32RBF_INSN_CLRPSW; goto extract_sfmt_clrpsw; | |
57465455 DE |
354 | case 12 : itype = M32RBF_INSN_BC8; goto extract_sfmt_bc8; |
355 | case 13 : itype = M32RBF_INSN_BNC8; goto extract_sfmt_bc8; | |
356 | case 14 : itype = M32RBF_INSN_BL8; goto extract_sfmt_bl8; | |
357 | case 15 : itype = M32RBF_INSN_BRA8; goto extract_sfmt_bra8; | |
378af1d6 | 358 | default : itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty; |
c906108c | 359 | } |
7a292a7a SS |
360 | } |
361 | case 113 : /* fall through */ | |
362 | case 114 : /* fall through */ | |
363 | case 115 : /* fall through */ | |
364 | case 116 : /* fall through */ | |
365 | case 117 : /* fall through */ | |
366 | case 118 : /* fall through */ | |
367 | case 119 : /* fall through */ | |
368 | case 120 : /* fall through */ | |
369 | case 121 : /* fall through */ | |
370 | case 122 : /* fall through */ | |
371 | case 123 : /* fall through */ | |
372 | case 124 : /* fall through */ | |
373 | case 125 : /* fall through */ | |
374 | case 126 : /* fall through */ | |
375 | case 127 : | |
376 | { | |
16b47b25 | 377 | unsigned int val = (((insn >> 8) & (15 << 0))); |
7a292a7a | 378 | switch (val) |
c906108c | 379 | { |
16b47b25 NC |
380 | case 1 : itype = M32RBF_INSN_SETPSW; goto extract_sfmt_setpsw; |
381 | case 2 : itype = M32RBF_INSN_CLRPSW; goto extract_sfmt_clrpsw; | |
382 | case 12 : itype = M32RBF_INSN_BC8; goto extract_sfmt_bc8; | |
383 | case 13 : itype = M32RBF_INSN_BNC8; goto extract_sfmt_bc8; | |
384 | case 14 : itype = M32RBF_INSN_BL8; goto extract_sfmt_bl8; | |
385 | case 15 : itype = M32RBF_INSN_BRA8; goto extract_sfmt_bra8; | |
378af1d6 | 386 | default : itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty; |
c906108c | 387 | } |
7a292a7a | 388 | } |
57465455 DE |
389 | case 132 : itype = M32RBF_INSN_CMPI; goto extract_sfmt_cmpi; |
390 | case 133 : itype = M32RBF_INSN_CMPUI; goto extract_sfmt_cmpi; | |
391 | case 136 : itype = M32RBF_INSN_ADDV3; goto extract_sfmt_addv3; | |
392 | case 138 : itype = M32RBF_INSN_ADD3; goto extract_sfmt_add3; | |
393 | case 140 : itype = M32RBF_INSN_AND3; goto extract_sfmt_and3; | |
394 | case 141 : itype = M32RBF_INSN_XOR3; goto extract_sfmt_and3; | |
395 | case 142 : itype = M32RBF_INSN_OR3; goto extract_sfmt_or3; | |
396 | case 144 : itype = M32RBF_INSN_DIV; goto extract_sfmt_div; | |
397 | case 145 : itype = M32RBF_INSN_DIVU; goto extract_sfmt_div; | |
398 | case 146 : itype = M32RBF_INSN_REM; goto extract_sfmt_div; | |
399 | case 147 : itype = M32RBF_INSN_REMU; goto extract_sfmt_div; | |
400 | case 152 : itype = M32RBF_INSN_SRL3; goto extract_sfmt_sll3; | |
401 | case 154 : itype = M32RBF_INSN_SRA3; goto extract_sfmt_sll3; | |
402 | case 156 : itype = M32RBF_INSN_SLL3; goto extract_sfmt_sll3; | |
403 | case 159 : itype = M32RBF_INSN_LDI16; goto extract_sfmt_ldi16; | |
404 | case 160 : itype = M32RBF_INSN_STB_D; goto extract_sfmt_stb_d; | |
405 | case 162 : itype = M32RBF_INSN_STH_D; goto extract_sfmt_sth_d; | |
406 | case 164 : itype = M32RBF_INSN_ST_D; goto extract_sfmt_st_d; | |
16b47b25 NC |
407 | case 166 : itype = M32RBF_INSN_BSET; goto extract_sfmt_bset; |
408 | case 167 : itype = M32RBF_INSN_BCLR; goto extract_sfmt_bset; | |
57465455 DE |
409 | case 168 : itype = M32RBF_INSN_LDB_D; goto extract_sfmt_ldb_d; |
410 | case 169 : itype = M32RBF_INSN_LDUB_D; goto extract_sfmt_ldb_d; | |
411 | case 170 : itype = M32RBF_INSN_LDH_D; goto extract_sfmt_ldh_d; | |
412 | case 171 : itype = M32RBF_INSN_LDUH_D; goto extract_sfmt_ldh_d; | |
413 | case 172 : itype = M32RBF_INSN_LD_D; goto extract_sfmt_ld_d; | |
414 | case 176 : itype = M32RBF_INSN_BEQ; goto extract_sfmt_beq; | |
415 | case 177 : itype = M32RBF_INSN_BNE; goto extract_sfmt_beq; | |
416 | case 184 : itype = M32RBF_INSN_BEQZ; goto extract_sfmt_beqz; | |
417 | case 185 : itype = M32RBF_INSN_BNEZ; goto extract_sfmt_beqz; | |
418 | case 186 : itype = M32RBF_INSN_BLTZ; goto extract_sfmt_beqz; | |
419 | case 187 : itype = M32RBF_INSN_BGEZ; goto extract_sfmt_beqz; | |
420 | case 188 : itype = M32RBF_INSN_BLEZ; goto extract_sfmt_beqz; | |
421 | case 189 : itype = M32RBF_INSN_BGTZ; goto extract_sfmt_beqz; | |
422 | case 220 : itype = M32RBF_INSN_SETH; goto extract_sfmt_seth; | |
378af1d6 | 423 | case 224 : /* fall through */ |
7a292a7a SS |
424 | case 225 : /* fall through */ |
425 | case 226 : /* fall through */ | |
426 | case 227 : /* fall through */ | |
427 | case 228 : /* fall through */ | |
428 | case 229 : /* fall through */ | |
429 | case 230 : /* fall through */ | |
430 | case 231 : /* fall through */ | |
431 | case 232 : /* fall through */ | |
432 | case 233 : /* fall through */ | |
433 | case 234 : /* fall through */ | |
434 | case 235 : /* fall through */ | |
435 | case 236 : /* fall through */ | |
436 | case 237 : /* fall through */ | |
437 | case 238 : /* fall through */ | |
57465455 | 438 | case 239 : itype = M32RBF_INSN_LD24; goto extract_sfmt_ld24; |
378af1d6 | 439 | case 240 : /* fall through */ |
7a292a7a SS |
440 | case 241 : /* fall through */ |
441 | case 242 : /* fall through */ | |
442 | case 243 : /* fall through */ | |
443 | case 244 : /* fall through */ | |
444 | case 245 : /* fall through */ | |
445 | case 246 : /* fall through */ | |
446 | case 247 : /* fall through */ | |
447 | case 248 : /* fall through */ | |
448 | case 249 : /* fall through */ | |
449 | case 250 : /* fall through */ | |
450 | case 251 : /* fall through */ | |
451 | case 252 : /* fall through */ | |
452 | case 253 : /* fall through */ | |
453 | case 254 : /* fall through */ | |
454 | case 255 : | |
455 | { | |
55552082 | 456 | unsigned int val = (((insn >> 8) & (3 << 0))); |
7a292a7a | 457 | switch (val) |
c906108c | 458 | { |
57465455 DE |
459 | case 0 : itype = M32RBF_INSN_BC24; goto extract_sfmt_bc24; |
460 | case 1 : itype = M32RBF_INSN_BNC24; goto extract_sfmt_bc24; | |
461 | case 2 : itype = M32RBF_INSN_BL24; goto extract_sfmt_bl24; | |
462 | case 3 : itype = M32RBF_INSN_BRA24; goto extract_sfmt_bra24; | |
378af1d6 | 463 | default : itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty; |
c906108c | 464 | } |
c906108c | 465 | } |
96baa820 | 466 | default : itype = M32RBF_INSN_X_INVALID; goto extract_sfmt_empty; |
7a292a7a | 467 | } |
c906108c | 468 | } |
c906108c SS |
469 | } |
470 | ||
471 | /* The instruction has been decoded, now extract the fields. */ | |
472 | ||
96baa820 | 473 | extract_sfmt_empty: |
c906108c | 474 | { |
7a292a7a | 475 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 476 | #define FLD(f) abuf->fields.fmt_empty.f |
c906108c | 477 | |
c906108c SS |
478 | |
479 | /* Record the fields for the semantic handler. */ | |
96baa820 | 480 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_empty", (char *) 0)); |
c906108c SS |
481 | |
482 | #undef FLD | |
7a292a7a | 483 | return idesc; |
c906108c SS |
484 | } |
485 | ||
96baa820 | 486 | extract_sfmt_add: |
c906108c | 487 | { |
7a292a7a | 488 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 489 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
490 | #define FLD(f) abuf->fields.sfmt_add.f |
491 | UINT f_r1; | |
492 | UINT f_r2; | |
c906108c | 493 | |
96baa820 JM |
494 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
495 | f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); | |
c906108c SS |
496 | |
497 | /* Record the fields for the semantic handler. */ | |
de8f5985 DB |
498 | FLD (f_r1) = f_r1; |
499 | FLD (f_r2) = f_r2; | |
c906108c SS |
500 | FLD (i_dr) = & CPU (h_gr)[f_r1]; |
501 | FLD (i_sr) = & CPU (h_gr)[f_r2]; | |
de8f5985 | 502 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_add", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0)); |
c906108c SS |
503 | |
504 | #if WITH_PROFILE_MODEL_P | |
505 | /* Record the fields for profiling. */ | |
506 | if (PROFILE_MODEL_P (current_cpu)) | |
507 | { | |
508 | FLD (in_dr) = f_r1; | |
509 | FLD (in_sr) = f_r2; | |
510 | FLD (out_dr) = f_r1; | |
511 | } | |
512 | #endif | |
513 | #undef FLD | |
7a292a7a | 514 | return idesc; |
c906108c SS |
515 | } |
516 | ||
96baa820 | 517 | extract_sfmt_add3: |
c906108c | 518 | { |
7a292a7a | 519 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 520 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
521 | #define FLD(f) abuf->fields.sfmt_add3.f |
522 | UINT f_r1; | |
523 | UINT f_r2; | |
524 | INT f_simm16; | |
c906108c | 525 | |
96baa820 JM |
526 | f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); |
527 | f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); | |
528 | f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); | |
c906108c SS |
529 | |
530 | /* Record the fields for the semantic handler. */ | |
531 | FLD (f_simm16) = f_simm16; | |
de8f5985 DB |
532 | FLD (f_r2) = f_r2; |
533 | FLD (f_r1) = f_r1; | |
c906108c SS |
534 | FLD (i_sr) = & CPU (h_gr)[f_r2]; |
535 | FLD (i_dr) = & CPU (h_gr)[f_r1]; | |
de8f5985 | 536 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_add3", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); |
c906108c SS |
537 | |
538 | #if WITH_PROFILE_MODEL_P | |
539 | /* Record the fields for profiling. */ | |
540 | if (PROFILE_MODEL_P (current_cpu)) | |
541 | { | |
542 | FLD (in_sr) = f_r2; | |
543 | FLD (out_dr) = f_r1; | |
544 | } | |
545 | #endif | |
546 | #undef FLD | |
7a292a7a | 547 | return idesc; |
c906108c SS |
548 | } |
549 | ||
96baa820 | 550 | extract_sfmt_and3: |
c906108c | 551 | { |
7a292a7a | 552 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 553 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
554 | #define FLD(f) abuf->fields.sfmt_and3.f |
555 | UINT f_r1; | |
556 | UINT f_r2; | |
557 | UINT f_uimm16; | |
c906108c | 558 | |
96baa820 JM |
559 | f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); |
560 | f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); | |
561 | f_uimm16 = EXTRACT_MSB0_UINT (insn, 32, 16, 16); | |
c906108c SS |
562 | |
563 | /* Record the fields for the semantic handler. */ | |
de8f5985 | 564 | FLD (f_r2) = f_r2; |
c906108c | 565 | FLD (f_uimm16) = f_uimm16; |
de8f5985 | 566 | FLD (f_r1) = f_r1; |
c906108c SS |
567 | FLD (i_sr) = & CPU (h_gr)[f_r2]; |
568 | FLD (i_dr) = & CPU (h_gr)[f_r1]; | |
de8f5985 | 569 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_and3", "f_r2 0x%x", 'x', f_r2, "f_uimm16 0x%x", 'x', f_uimm16, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); |
c906108c SS |
570 | |
571 | #if WITH_PROFILE_MODEL_P | |
572 | /* Record the fields for profiling. */ | |
573 | if (PROFILE_MODEL_P (current_cpu)) | |
574 | { | |
575 | FLD (in_sr) = f_r2; | |
576 | FLD (out_dr) = f_r1; | |
577 | } | |
578 | #endif | |
579 | #undef FLD | |
7a292a7a | 580 | return idesc; |
c906108c SS |
581 | } |
582 | ||
96baa820 | 583 | extract_sfmt_or3: |
c906108c | 584 | { |
7a292a7a | 585 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 586 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
587 | #define FLD(f) abuf->fields.sfmt_and3.f |
588 | UINT f_r1; | |
589 | UINT f_r2; | |
590 | UINT f_uimm16; | |
c906108c | 591 | |
96baa820 JM |
592 | f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); |
593 | f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); | |
594 | f_uimm16 = EXTRACT_MSB0_UINT (insn, 32, 16, 16); | |
c906108c SS |
595 | |
596 | /* Record the fields for the semantic handler. */ | |
de8f5985 | 597 | FLD (f_r2) = f_r2; |
c906108c | 598 | FLD (f_uimm16) = f_uimm16; |
de8f5985 | 599 | FLD (f_r1) = f_r1; |
c906108c SS |
600 | FLD (i_sr) = & CPU (h_gr)[f_r2]; |
601 | FLD (i_dr) = & CPU (h_gr)[f_r1]; | |
de8f5985 | 602 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_or3", "f_r2 0x%x", 'x', f_r2, "f_uimm16 0x%x", 'x', f_uimm16, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); |
c906108c SS |
603 | |
604 | #if WITH_PROFILE_MODEL_P | |
605 | /* Record the fields for profiling. */ | |
606 | if (PROFILE_MODEL_P (current_cpu)) | |
607 | { | |
608 | FLD (in_sr) = f_r2; | |
609 | FLD (out_dr) = f_r1; | |
610 | } | |
611 | #endif | |
612 | #undef FLD | |
7a292a7a | 613 | return idesc; |
c906108c SS |
614 | } |
615 | ||
96baa820 | 616 | extract_sfmt_addi: |
c906108c | 617 | { |
7a292a7a | 618 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 619 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
620 | #define FLD(f) abuf->fields.sfmt_addi.f |
621 | UINT f_r1; | |
622 | INT f_simm8; | |
c906108c | 623 | |
96baa820 JM |
624 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
625 | f_simm8 = EXTRACT_MSB0_INT (insn, 16, 8, 8); | |
c906108c SS |
626 | |
627 | /* Record the fields for the semantic handler. */ | |
de8f5985 | 628 | FLD (f_r1) = f_r1; |
c906108c SS |
629 | FLD (f_simm8) = f_simm8; |
630 | FLD (i_dr) = & CPU (h_gr)[f_r1]; | |
de8f5985 | 631 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addi", "f_r1 0x%x", 'x', f_r1, "f_simm8 0x%x", 'x', f_simm8, "dr 0x%x", 'x', f_r1, (char *) 0)); |
c906108c SS |
632 | |
633 | #if WITH_PROFILE_MODEL_P | |
634 | /* Record the fields for profiling. */ | |
635 | if (PROFILE_MODEL_P (current_cpu)) | |
636 | { | |
637 | FLD (in_dr) = f_r1; | |
638 | FLD (out_dr) = f_r1; | |
639 | } | |
640 | #endif | |
641 | #undef FLD | |
7a292a7a | 642 | return idesc; |
c906108c SS |
643 | } |
644 | ||
96baa820 | 645 | extract_sfmt_addv: |
c906108c | 646 | { |
7a292a7a | 647 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 648 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
649 | #define FLD(f) abuf->fields.sfmt_add.f |
650 | UINT f_r1; | |
651 | UINT f_r2; | |
c906108c | 652 | |
96baa820 JM |
653 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
654 | f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); | |
c906108c SS |
655 | |
656 | /* Record the fields for the semantic handler. */ | |
de8f5985 DB |
657 | FLD (f_r1) = f_r1; |
658 | FLD (f_r2) = f_r2; | |
c906108c SS |
659 | FLD (i_dr) = & CPU (h_gr)[f_r1]; |
660 | FLD (i_sr) = & CPU (h_gr)[f_r2]; | |
de8f5985 | 661 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addv", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0)); |
c906108c SS |
662 | |
663 | #if WITH_PROFILE_MODEL_P | |
664 | /* Record the fields for profiling. */ | |
665 | if (PROFILE_MODEL_P (current_cpu)) | |
666 | { | |
667 | FLD (in_dr) = f_r1; | |
668 | FLD (in_sr) = f_r2; | |
669 | FLD (out_dr) = f_r1; | |
670 | } | |
671 | #endif | |
672 | #undef FLD | |
7a292a7a | 673 | return idesc; |
c906108c SS |
674 | } |
675 | ||
96baa820 | 676 | extract_sfmt_addv3: |
c906108c | 677 | { |
7a292a7a | 678 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 679 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
680 | #define FLD(f) abuf->fields.sfmt_add3.f |
681 | UINT f_r1; | |
682 | UINT f_r2; | |
683 | INT f_simm16; | |
c906108c | 684 | |
96baa820 JM |
685 | f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); |
686 | f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); | |
687 | f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); | |
c906108c SS |
688 | |
689 | /* Record the fields for the semantic handler. */ | |
690 | FLD (f_simm16) = f_simm16; | |
de8f5985 DB |
691 | FLD (f_r2) = f_r2; |
692 | FLD (f_r1) = f_r1; | |
c906108c SS |
693 | FLD (i_sr) = & CPU (h_gr)[f_r2]; |
694 | FLD (i_dr) = & CPU (h_gr)[f_r1]; | |
de8f5985 | 695 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addv3", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); |
c906108c SS |
696 | |
697 | #if WITH_PROFILE_MODEL_P | |
698 | /* Record the fields for profiling. */ | |
699 | if (PROFILE_MODEL_P (current_cpu)) | |
700 | { | |
701 | FLD (in_sr) = f_r2; | |
702 | FLD (out_dr) = f_r1; | |
703 | } | |
704 | #endif | |
705 | #undef FLD | |
7a292a7a | 706 | return idesc; |
c906108c SS |
707 | } |
708 | ||
96baa820 | 709 | extract_sfmt_addx: |
c906108c | 710 | { |
7a292a7a | 711 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 712 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
713 | #define FLD(f) abuf->fields.sfmt_add.f |
714 | UINT f_r1; | |
715 | UINT f_r2; | |
c906108c | 716 | |
96baa820 JM |
717 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
718 | f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); | |
c906108c SS |
719 | |
720 | /* Record the fields for the semantic handler. */ | |
de8f5985 DB |
721 | FLD (f_r1) = f_r1; |
722 | FLD (f_r2) = f_r2; | |
c906108c SS |
723 | FLD (i_dr) = & CPU (h_gr)[f_r1]; |
724 | FLD (i_sr) = & CPU (h_gr)[f_r2]; | |
de8f5985 | 725 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_addx", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0)); |
c906108c SS |
726 | |
727 | #if WITH_PROFILE_MODEL_P | |
728 | /* Record the fields for profiling. */ | |
729 | if (PROFILE_MODEL_P (current_cpu)) | |
730 | { | |
731 | FLD (in_dr) = f_r1; | |
732 | FLD (in_sr) = f_r2; | |
733 | FLD (out_dr) = f_r1; | |
734 | } | |
735 | #endif | |
736 | #undef FLD | |
7a292a7a | 737 | return idesc; |
c906108c SS |
738 | } |
739 | ||
96baa820 | 740 | extract_sfmt_bc8: |
c906108c | 741 | { |
7a292a7a | 742 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 743 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
744 | #define FLD(f) abuf->fields.sfmt_bl8.f |
745 | SI f_disp8; | |
c906108c | 746 | |
96baa820 | 747 | f_disp8 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4)))); |
c906108c SS |
748 | |
749 | /* Record the fields for the semantic handler. */ | |
750 | FLD (i_disp8) = f_disp8; | |
96baa820 | 751 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bc8", "disp8 0x%x", 'x', f_disp8, (char *) 0)); |
c906108c SS |
752 | |
753 | #if WITH_PROFILE_MODEL_P | |
754 | /* Record the fields for profiling. */ | |
755 | if (PROFILE_MODEL_P (current_cpu)) | |
756 | { | |
757 | } | |
758 | #endif | |
759 | #undef FLD | |
7a292a7a | 760 | return idesc; |
c906108c SS |
761 | } |
762 | ||
96baa820 | 763 | extract_sfmt_bc24: |
c906108c | 764 | { |
7a292a7a | 765 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 766 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
767 | #define FLD(f) abuf->fields.sfmt_bl24.f |
768 | SI f_disp24; | |
c906108c | 769 | |
96baa820 | 770 | f_disp24 = ((((EXTRACT_MSB0_INT (insn, 32, 8, 24)) << (2))) + (pc)); |
c906108c SS |
771 | |
772 | /* Record the fields for the semantic handler. */ | |
773 | FLD (i_disp24) = f_disp24; | |
96baa820 | 774 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bc24", "disp24 0x%x", 'x', f_disp24, (char *) 0)); |
c906108c SS |
775 | |
776 | #if WITH_PROFILE_MODEL_P | |
777 | /* Record the fields for profiling. */ | |
778 | if (PROFILE_MODEL_P (current_cpu)) | |
779 | { | |
780 | } | |
781 | #endif | |
782 | #undef FLD | |
7a292a7a | 783 | return idesc; |
c906108c SS |
784 | } |
785 | ||
96baa820 | 786 | extract_sfmt_beq: |
c906108c | 787 | { |
7a292a7a | 788 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 789 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
790 | #define FLD(f) abuf->fields.sfmt_beq.f |
791 | UINT f_r1; | |
792 | UINT f_r2; | |
793 | SI f_disp16; | |
c906108c | 794 | |
96baa820 JM |
795 | f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); |
796 | f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); | |
797 | f_disp16 = ((((EXTRACT_MSB0_INT (insn, 32, 16, 16)) << (2))) + (pc)); | |
c906108c SS |
798 | |
799 | /* Record the fields for the semantic handler. */ | |
de8f5985 DB |
800 | FLD (f_r1) = f_r1; |
801 | FLD (f_r2) = f_r2; | |
c906108c SS |
802 | FLD (i_disp16) = f_disp16; |
803 | FLD (i_src1) = & CPU (h_gr)[f_r1]; | |
804 | FLD (i_src2) = & CPU (h_gr)[f_r2]; | |
de8f5985 | 805 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_beq", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "disp16 0x%x", 'x', f_disp16, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); |
c906108c SS |
806 | |
807 | #if WITH_PROFILE_MODEL_P | |
808 | /* Record the fields for profiling. */ | |
809 | if (PROFILE_MODEL_P (current_cpu)) | |
810 | { | |
811 | FLD (in_src1) = f_r1; | |
812 | FLD (in_src2) = f_r2; | |
813 | } | |
814 | #endif | |
815 | #undef FLD | |
7a292a7a | 816 | return idesc; |
c906108c SS |
817 | } |
818 | ||
96baa820 | 819 | extract_sfmt_beqz: |
c906108c | 820 | { |
7a292a7a | 821 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 822 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
823 | #define FLD(f) abuf->fields.sfmt_beq.f |
824 | UINT f_r2; | |
825 | SI f_disp16; | |
c906108c | 826 | |
96baa820 JM |
827 | f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); |
828 | f_disp16 = ((((EXTRACT_MSB0_INT (insn, 32, 16, 16)) << (2))) + (pc)); | |
c906108c SS |
829 | |
830 | /* Record the fields for the semantic handler. */ | |
de8f5985 | 831 | FLD (f_r2) = f_r2; |
c906108c SS |
832 | FLD (i_disp16) = f_disp16; |
833 | FLD (i_src2) = & CPU (h_gr)[f_r2]; | |
de8f5985 | 834 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_beqz", "f_r2 0x%x", 'x', f_r2, "disp16 0x%x", 'x', f_disp16, "src2 0x%x", 'x', f_r2, (char *) 0)); |
c906108c SS |
835 | |
836 | #if WITH_PROFILE_MODEL_P | |
837 | /* Record the fields for profiling. */ | |
838 | if (PROFILE_MODEL_P (current_cpu)) | |
839 | { | |
840 | FLD (in_src2) = f_r2; | |
841 | } | |
842 | #endif | |
843 | #undef FLD | |
7a292a7a | 844 | return idesc; |
c906108c SS |
845 | } |
846 | ||
96baa820 | 847 | extract_sfmt_bl8: |
c906108c | 848 | { |
7a292a7a | 849 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 850 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
851 | #define FLD(f) abuf->fields.sfmt_bl8.f |
852 | SI f_disp8; | |
c906108c | 853 | |
96baa820 | 854 | f_disp8 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4)))); |
c906108c SS |
855 | |
856 | /* Record the fields for the semantic handler. */ | |
857 | FLD (i_disp8) = f_disp8; | |
96baa820 | 858 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bl8", "disp8 0x%x", 'x', f_disp8, (char *) 0)); |
c906108c SS |
859 | |
860 | #if WITH_PROFILE_MODEL_P | |
861 | /* Record the fields for profiling. */ | |
862 | if (PROFILE_MODEL_P (current_cpu)) | |
863 | { | |
378af1d6 | 864 | FLD (out_h_gr_SI_14) = 14; |
c906108c SS |
865 | } |
866 | #endif | |
867 | #undef FLD | |
7a292a7a | 868 | return idesc; |
c906108c SS |
869 | } |
870 | ||
96baa820 | 871 | extract_sfmt_bl24: |
c906108c | 872 | { |
7a292a7a | 873 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 874 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
875 | #define FLD(f) abuf->fields.sfmt_bl24.f |
876 | SI f_disp24; | |
c906108c | 877 | |
96baa820 | 878 | f_disp24 = ((((EXTRACT_MSB0_INT (insn, 32, 8, 24)) << (2))) + (pc)); |
c906108c SS |
879 | |
880 | /* Record the fields for the semantic handler. */ | |
881 | FLD (i_disp24) = f_disp24; | |
96baa820 | 882 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bl24", "disp24 0x%x", 'x', f_disp24, (char *) 0)); |
c906108c SS |
883 | |
884 | #if WITH_PROFILE_MODEL_P | |
885 | /* Record the fields for profiling. */ | |
886 | if (PROFILE_MODEL_P (current_cpu)) | |
887 | { | |
378af1d6 | 888 | FLD (out_h_gr_SI_14) = 14; |
c906108c SS |
889 | } |
890 | #endif | |
891 | #undef FLD | |
7a292a7a | 892 | return idesc; |
c906108c SS |
893 | } |
894 | ||
96baa820 | 895 | extract_sfmt_bra8: |
c906108c | 896 | { |
7a292a7a | 897 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 898 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
899 | #define FLD(f) abuf->fields.sfmt_bl8.f |
900 | SI f_disp8; | |
c906108c | 901 | |
96baa820 | 902 | f_disp8 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4)))); |
c906108c SS |
903 | |
904 | /* Record the fields for the semantic handler. */ | |
905 | FLD (i_disp8) = f_disp8; | |
96baa820 | 906 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bra8", "disp8 0x%x", 'x', f_disp8, (char *) 0)); |
c906108c SS |
907 | |
908 | #if WITH_PROFILE_MODEL_P | |
909 | /* Record the fields for profiling. */ | |
910 | if (PROFILE_MODEL_P (current_cpu)) | |
911 | { | |
912 | } | |
913 | #endif | |
914 | #undef FLD | |
7a292a7a | 915 | return idesc; |
c906108c SS |
916 | } |
917 | ||
96baa820 | 918 | extract_sfmt_bra24: |
c906108c | 919 | { |
7a292a7a | 920 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 921 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
922 | #define FLD(f) abuf->fields.sfmt_bl24.f |
923 | SI f_disp24; | |
c906108c | 924 | |
96baa820 | 925 | f_disp24 = ((((EXTRACT_MSB0_INT (insn, 32, 8, 24)) << (2))) + (pc)); |
c906108c SS |
926 | |
927 | /* Record the fields for the semantic handler. */ | |
928 | FLD (i_disp24) = f_disp24; | |
96baa820 | 929 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bra24", "disp24 0x%x", 'x', f_disp24, (char *) 0)); |
c906108c SS |
930 | |
931 | #if WITH_PROFILE_MODEL_P | |
932 | /* Record the fields for profiling. */ | |
933 | if (PROFILE_MODEL_P (current_cpu)) | |
934 | { | |
935 | } | |
936 | #endif | |
937 | #undef FLD | |
7a292a7a | 938 | return idesc; |
c906108c SS |
939 | } |
940 | ||
96baa820 | 941 | extract_sfmt_cmp: |
c906108c | 942 | { |
7a292a7a | 943 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 944 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
945 | #define FLD(f) abuf->fields.sfmt_st_plus.f |
946 | UINT f_r1; | |
947 | UINT f_r2; | |
c906108c | 948 | |
96baa820 JM |
949 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
950 | f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); | |
c906108c SS |
951 | |
952 | /* Record the fields for the semantic handler. */ | |
de8f5985 DB |
953 | FLD (f_r1) = f_r1; |
954 | FLD (f_r2) = f_r2; | |
c906108c SS |
955 | FLD (i_src1) = & CPU (h_gr)[f_r1]; |
956 | FLD (i_src2) = & CPU (h_gr)[f_r2]; | |
de8f5985 | 957 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmp", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); |
c906108c SS |
958 | |
959 | #if WITH_PROFILE_MODEL_P | |
960 | /* Record the fields for profiling. */ | |
961 | if (PROFILE_MODEL_P (current_cpu)) | |
962 | { | |
963 | FLD (in_src1) = f_r1; | |
964 | FLD (in_src2) = f_r2; | |
965 | } | |
966 | #endif | |
967 | #undef FLD | |
7a292a7a | 968 | return idesc; |
c906108c SS |
969 | } |
970 | ||
96baa820 | 971 | extract_sfmt_cmpi: |
c906108c | 972 | { |
7a292a7a | 973 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 974 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
975 | #define FLD(f) abuf->fields.sfmt_st_d.f |
976 | UINT f_r2; | |
977 | INT f_simm16; | |
c906108c | 978 | |
96baa820 JM |
979 | f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); |
980 | f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); | |
c906108c SS |
981 | |
982 | /* Record the fields for the semantic handler. */ | |
983 | FLD (f_simm16) = f_simm16; | |
de8f5985 | 984 | FLD (f_r2) = f_r2; |
c906108c | 985 | FLD (i_src2) = & CPU (h_gr)[f_r2]; |
de8f5985 | 986 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_cmpi", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "src2 0x%x", 'x', f_r2, (char *) 0)); |
c906108c SS |
987 | |
988 | #if WITH_PROFILE_MODEL_P | |
989 | /* Record the fields for profiling. */ | |
990 | if (PROFILE_MODEL_P (current_cpu)) | |
991 | { | |
992 | FLD (in_src2) = f_r2; | |
993 | } | |
994 | #endif | |
995 | #undef FLD | |
7a292a7a | 996 | return idesc; |
c906108c SS |
997 | } |
998 | ||
96baa820 | 999 | extract_sfmt_div: |
c906108c | 1000 | { |
7a292a7a | 1001 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1002 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1003 | #define FLD(f) abuf->fields.sfmt_add.f |
1004 | UINT f_r1; | |
1005 | UINT f_r2; | |
c906108c | 1006 | |
96baa820 JM |
1007 | f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); |
1008 | f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); | |
c906108c SS |
1009 | |
1010 | /* Record the fields for the semantic handler. */ | |
de8f5985 DB |
1011 | FLD (f_r1) = f_r1; |
1012 | FLD (f_r2) = f_r2; | |
c906108c SS |
1013 | FLD (i_dr) = & CPU (h_gr)[f_r1]; |
1014 | FLD (i_sr) = & CPU (h_gr)[f_r2]; | |
de8f5985 | 1015 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_div", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0)); |
c906108c SS |
1016 | |
1017 | #if WITH_PROFILE_MODEL_P | |
1018 | /* Record the fields for profiling. */ | |
1019 | if (PROFILE_MODEL_P (current_cpu)) | |
1020 | { | |
1021 | FLD (in_dr) = f_r1; | |
1022 | FLD (in_sr) = f_r2; | |
1023 | FLD (out_dr) = f_r1; | |
1024 | } | |
1025 | #endif | |
1026 | #undef FLD | |
7a292a7a | 1027 | return idesc; |
c906108c SS |
1028 | } |
1029 | ||
96baa820 | 1030 | extract_sfmt_jl: |
c906108c | 1031 | { |
7a292a7a | 1032 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1033 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1034 | #define FLD(f) abuf->fields.sfmt_jl.f |
1035 | UINT f_r2; | |
c906108c | 1036 | |
96baa820 | 1037 | f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); |
c906108c SS |
1038 | |
1039 | /* Record the fields for the semantic handler. */ | |
de8f5985 | 1040 | FLD (f_r2) = f_r2; |
c906108c | 1041 | FLD (i_sr) = & CPU (h_gr)[f_r2]; |
de8f5985 | 1042 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_jl", "f_r2 0x%x", 'x', f_r2, "sr 0x%x", 'x', f_r2, (char *) 0)); |
c906108c SS |
1043 | |
1044 | #if WITH_PROFILE_MODEL_P | |
1045 | /* Record the fields for profiling. */ | |
1046 | if (PROFILE_MODEL_P (current_cpu)) | |
1047 | { | |
1048 | FLD (in_sr) = f_r2; | |
378af1d6 | 1049 | FLD (out_h_gr_SI_14) = 14; |
c906108c SS |
1050 | } |
1051 | #endif | |
1052 | #undef FLD | |
7a292a7a | 1053 | return idesc; |
c906108c SS |
1054 | } |
1055 | ||
96baa820 | 1056 | extract_sfmt_jmp: |
c906108c | 1057 | { |
7a292a7a | 1058 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1059 | CGEN_INSN_INT insn = entire_insn; |
de8f5985 | 1060 | #define FLD(f) abuf->fields.sfmt_jl.f |
96baa820 | 1061 | UINT f_r2; |
c906108c | 1062 | |
96baa820 | 1063 | f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); |
c906108c SS |
1064 | |
1065 | /* Record the fields for the semantic handler. */ | |
de8f5985 | 1066 | FLD (f_r2) = f_r2; |
c906108c | 1067 | FLD (i_sr) = & CPU (h_gr)[f_r2]; |
de8f5985 | 1068 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_jmp", "f_r2 0x%x", 'x', f_r2, "sr 0x%x", 'x', f_r2, (char *) 0)); |
c906108c SS |
1069 | |
1070 | #if WITH_PROFILE_MODEL_P | |
1071 | /* Record the fields for profiling. */ | |
1072 | if (PROFILE_MODEL_P (current_cpu)) | |
1073 | { | |
1074 | FLD (in_sr) = f_r2; | |
c906108c SS |
1075 | } |
1076 | #endif | |
1077 | #undef FLD | |
7a292a7a | 1078 | return idesc; |
c906108c SS |
1079 | } |
1080 | ||
96baa820 | 1081 | extract_sfmt_ld: |
c906108c | 1082 | { |
7a292a7a | 1083 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1084 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1085 | #define FLD(f) abuf->fields.sfmt_ld_plus.f |
1086 | UINT f_r1; | |
1087 | UINT f_r2; | |
c906108c | 1088 | |
96baa820 JM |
1089 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
1090 | f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); | |
c906108c SS |
1091 | |
1092 | /* Record the fields for the semantic handler. */ | |
de8f5985 DB |
1093 | FLD (f_r2) = f_r2; |
1094 | FLD (f_r1) = f_r1; | |
c906108c SS |
1095 | FLD (i_sr) = & CPU (h_gr)[f_r2]; |
1096 | FLD (i_dr) = & CPU (h_gr)[f_r1]; | |
de8f5985 | 1097 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); |
c906108c SS |
1098 | |
1099 | #if WITH_PROFILE_MODEL_P | |
1100 | /* Record the fields for profiling. */ | |
1101 | if (PROFILE_MODEL_P (current_cpu)) | |
1102 | { | |
1103 | FLD (in_sr) = f_r2; | |
1104 | FLD (out_dr) = f_r1; | |
1105 | } | |
1106 | #endif | |
1107 | #undef FLD | |
7a292a7a | 1108 | return idesc; |
c906108c SS |
1109 | } |
1110 | ||
96baa820 | 1111 | extract_sfmt_ld_d: |
c906108c | 1112 | { |
7a292a7a | 1113 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1114 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1115 | #define FLD(f) abuf->fields.sfmt_add3.f |
1116 | UINT f_r1; | |
1117 | UINT f_r2; | |
1118 | INT f_simm16; | |
c906108c | 1119 | |
96baa820 JM |
1120 | f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); |
1121 | f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); | |
1122 | f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); | |
c906108c SS |
1123 | |
1124 | /* Record the fields for the semantic handler. */ | |
1125 | FLD (f_simm16) = f_simm16; | |
de8f5985 DB |
1126 | FLD (f_r2) = f_r2; |
1127 | FLD (f_r1) = f_r1; | |
c906108c SS |
1128 | FLD (i_sr) = & CPU (h_gr)[f_r2]; |
1129 | FLD (i_dr) = & CPU (h_gr)[f_r1]; | |
de8f5985 | 1130 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld_d", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); |
c906108c | 1131 | |
378af1d6 DB |
1132 | #if WITH_PROFILE_MODEL_P |
1133 | /* Record the fields for profiling. */ | |
1134 | if (PROFILE_MODEL_P (current_cpu)) | |
1135 | { | |
1136 | FLD (in_sr) = f_r2; | |
1137 | FLD (out_dr) = f_r1; | |
1138 | } | |
1139 | #endif | |
1140 | #undef FLD | |
1141 | return idesc; | |
1142 | } | |
1143 | ||
1144 | extract_sfmt_ldb: | |
1145 | { | |
1146 | const IDESC *idesc = &m32rbf_insn_data[itype]; | |
1147 | CGEN_INSN_INT insn = entire_insn; | |
1148 | #define FLD(f) abuf->fields.sfmt_ld_plus.f | |
1149 | UINT f_r1; | |
1150 | UINT f_r2; | |
1151 | ||
1152 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); | |
1153 | f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); | |
1154 | ||
1155 | /* Record the fields for the semantic handler. */ | |
1156 | FLD (f_r2) = f_r2; | |
1157 | FLD (f_r1) = f_r1; | |
1158 | FLD (i_sr) = & CPU (h_gr)[f_r2]; | |
1159 | FLD (i_dr) = & CPU (h_gr)[f_r1]; | |
1160 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldb", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); | |
1161 | ||
1162 | #if WITH_PROFILE_MODEL_P | |
1163 | /* Record the fields for profiling. */ | |
1164 | if (PROFILE_MODEL_P (current_cpu)) | |
1165 | { | |
1166 | FLD (in_sr) = f_r2; | |
1167 | FLD (out_dr) = f_r1; | |
1168 | } | |
1169 | #endif | |
1170 | #undef FLD | |
1171 | return idesc; | |
1172 | } | |
1173 | ||
1174 | extract_sfmt_ldb_d: | |
1175 | { | |
1176 | const IDESC *idesc = &m32rbf_insn_data[itype]; | |
1177 | CGEN_INSN_INT insn = entire_insn; | |
1178 | #define FLD(f) abuf->fields.sfmt_add3.f | |
1179 | UINT f_r1; | |
1180 | UINT f_r2; | |
1181 | INT f_simm16; | |
1182 | ||
1183 | f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); | |
1184 | f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); | |
1185 | f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); | |
1186 | ||
1187 | /* Record the fields for the semantic handler. */ | |
1188 | FLD (f_simm16) = f_simm16; | |
1189 | FLD (f_r2) = f_r2; | |
1190 | FLD (f_r1) = f_r1; | |
1191 | FLD (i_sr) = & CPU (h_gr)[f_r2]; | |
1192 | FLD (i_dr) = & CPU (h_gr)[f_r1]; | |
1193 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldb_d", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); | |
1194 | ||
1195 | #if WITH_PROFILE_MODEL_P | |
1196 | /* Record the fields for profiling. */ | |
1197 | if (PROFILE_MODEL_P (current_cpu)) | |
1198 | { | |
1199 | FLD (in_sr) = f_r2; | |
1200 | FLD (out_dr) = f_r1; | |
1201 | } | |
1202 | #endif | |
1203 | #undef FLD | |
1204 | return idesc; | |
1205 | } | |
1206 | ||
1207 | extract_sfmt_ldh: | |
1208 | { | |
1209 | const IDESC *idesc = &m32rbf_insn_data[itype]; | |
1210 | CGEN_INSN_INT insn = entire_insn; | |
1211 | #define FLD(f) abuf->fields.sfmt_ld_plus.f | |
1212 | UINT f_r1; | |
1213 | UINT f_r2; | |
1214 | ||
1215 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); | |
1216 | f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); | |
1217 | ||
1218 | /* Record the fields for the semantic handler. */ | |
1219 | FLD (f_r2) = f_r2; | |
1220 | FLD (f_r1) = f_r1; | |
1221 | FLD (i_sr) = & CPU (h_gr)[f_r2]; | |
1222 | FLD (i_dr) = & CPU (h_gr)[f_r1]; | |
1223 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldh", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); | |
1224 | ||
1225 | #if WITH_PROFILE_MODEL_P | |
1226 | /* Record the fields for profiling. */ | |
1227 | if (PROFILE_MODEL_P (current_cpu)) | |
1228 | { | |
1229 | FLD (in_sr) = f_r2; | |
1230 | FLD (out_dr) = f_r1; | |
1231 | } | |
1232 | #endif | |
1233 | #undef FLD | |
1234 | return idesc; | |
1235 | } | |
1236 | ||
1237 | extract_sfmt_ldh_d: | |
1238 | { | |
1239 | const IDESC *idesc = &m32rbf_insn_data[itype]; | |
1240 | CGEN_INSN_INT insn = entire_insn; | |
1241 | #define FLD(f) abuf->fields.sfmt_add3.f | |
1242 | UINT f_r1; | |
1243 | UINT f_r2; | |
1244 | INT f_simm16; | |
1245 | ||
1246 | f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); | |
1247 | f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); | |
1248 | f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); | |
1249 | ||
1250 | /* Record the fields for the semantic handler. */ | |
1251 | FLD (f_simm16) = f_simm16; | |
1252 | FLD (f_r2) = f_r2; | |
1253 | FLD (f_r1) = f_r1; | |
1254 | FLD (i_sr) = & CPU (h_gr)[f_r2]; | |
1255 | FLD (i_dr) = & CPU (h_gr)[f_r1]; | |
1256 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldh_d", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); | |
1257 | ||
c906108c SS |
1258 | #if WITH_PROFILE_MODEL_P |
1259 | /* Record the fields for profiling. */ | |
1260 | if (PROFILE_MODEL_P (current_cpu)) | |
1261 | { | |
1262 | FLD (in_sr) = f_r2; | |
1263 | FLD (out_dr) = f_r1; | |
1264 | } | |
1265 | #endif | |
1266 | #undef FLD | |
7a292a7a | 1267 | return idesc; |
c906108c SS |
1268 | } |
1269 | ||
96baa820 | 1270 | extract_sfmt_ld_plus: |
c906108c | 1271 | { |
7a292a7a | 1272 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1273 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1274 | #define FLD(f) abuf->fields.sfmt_ld_plus.f |
1275 | UINT f_r1; | |
1276 | UINT f_r2; | |
c906108c | 1277 | |
96baa820 JM |
1278 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
1279 | f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); | |
c906108c SS |
1280 | |
1281 | /* Record the fields for the semantic handler. */ | |
de8f5985 DB |
1282 | FLD (f_r2) = f_r2; |
1283 | FLD (f_r1) = f_r1; | |
c906108c SS |
1284 | FLD (i_sr) = & CPU (h_gr)[f_r2]; |
1285 | FLD (i_dr) = & CPU (h_gr)[f_r1]; | |
de8f5985 | 1286 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld_plus", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); |
c906108c SS |
1287 | |
1288 | #if WITH_PROFILE_MODEL_P | |
1289 | /* Record the fields for profiling. */ | |
1290 | if (PROFILE_MODEL_P (current_cpu)) | |
1291 | { | |
1292 | FLD (in_sr) = f_r2; | |
1293 | FLD (out_dr) = f_r1; | |
1294 | FLD (out_sr) = f_r2; | |
1295 | } | |
1296 | #endif | |
1297 | #undef FLD | |
7a292a7a | 1298 | return idesc; |
c906108c SS |
1299 | } |
1300 | ||
96baa820 | 1301 | extract_sfmt_ld24: |
c906108c | 1302 | { |
7a292a7a | 1303 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1304 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1305 | #define FLD(f) abuf->fields.sfmt_ld24.f |
1306 | UINT f_r1; | |
1307 | UINT f_uimm24; | |
c906108c | 1308 | |
96baa820 JM |
1309 | f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); |
1310 | f_uimm24 = EXTRACT_MSB0_UINT (insn, 32, 8, 24); | |
c906108c SS |
1311 | |
1312 | /* Record the fields for the semantic handler. */ | |
de8f5985 | 1313 | FLD (f_r1) = f_r1; |
c906108c SS |
1314 | FLD (i_uimm24) = f_uimm24; |
1315 | FLD (i_dr) = & CPU (h_gr)[f_r1]; | |
de8f5985 | 1316 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ld24", "f_r1 0x%x", 'x', f_r1, "uimm24 0x%x", 'x', f_uimm24, "dr 0x%x", 'x', f_r1, (char *) 0)); |
c906108c SS |
1317 | |
1318 | #if WITH_PROFILE_MODEL_P | |
1319 | /* Record the fields for profiling. */ | |
1320 | if (PROFILE_MODEL_P (current_cpu)) | |
1321 | { | |
1322 | FLD (out_dr) = f_r1; | |
1323 | } | |
1324 | #endif | |
1325 | #undef FLD | |
7a292a7a | 1326 | return idesc; |
c906108c SS |
1327 | } |
1328 | ||
96baa820 | 1329 | extract_sfmt_ldi8: |
c906108c | 1330 | { |
7a292a7a | 1331 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1332 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1333 | #define FLD(f) abuf->fields.sfmt_addi.f |
1334 | UINT f_r1; | |
1335 | INT f_simm8; | |
c906108c | 1336 | |
96baa820 JM |
1337 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
1338 | f_simm8 = EXTRACT_MSB0_INT (insn, 16, 8, 8); | |
c906108c SS |
1339 | |
1340 | /* Record the fields for the semantic handler. */ | |
1341 | FLD (f_simm8) = f_simm8; | |
de8f5985 | 1342 | FLD (f_r1) = f_r1; |
c906108c | 1343 | FLD (i_dr) = & CPU (h_gr)[f_r1]; |
de8f5985 | 1344 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldi8", "f_simm8 0x%x", 'x', f_simm8, "f_r1 0x%x", 'x', f_r1, "dr 0x%x", 'x', f_r1, (char *) 0)); |
c906108c SS |
1345 | |
1346 | #if WITH_PROFILE_MODEL_P | |
1347 | /* Record the fields for profiling. */ | |
1348 | if (PROFILE_MODEL_P (current_cpu)) | |
1349 | { | |
1350 | FLD (out_dr) = f_r1; | |
1351 | } | |
1352 | #endif | |
1353 | #undef FLD | |
7a292a7a | 1354 | return idesc; |
c906108c SS |
1355 | } |
1356 | ||
96baa820 | 1357 | extract_sfmt_ldi16: |
c906108c | 1358 | { |
7a292a7a | 1359 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1360 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1361 | #define FLD(f) abuf->fields.sfmt_add3.f |
1362 | UINT f_r1; | |
1363 | INT f_simm16; | |
c906108c | 1364 | |
96baa820 JM |
1365 | f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); |
1366 | f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); | |
c906108c SS |
1367 | |
1368 | /* Record the fields for the semantic handler. */ | |
1369 | FLD (f_simm16) = f_simm16; | |
de8f5985 | 1370 | FLD (f_r1) = f_r1; |
c906108c | 1371 | FLD (i_dr) = & CPU (h_gr)[f_r1]; |
de8f5985 | 1372 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_ldi16", "f_simm16 0x%x", 'x', f_simm16, "f_r1 0x%x", 'x', f_r1, "dr 0x%x", 'x', f_r1, (char *) 0)); |
c906108c SS |
1373 | |
1374 | #if WITH_PROFILE_MODEL_P | |
1375 | /* Record the fields for profiling. */ | |
1376 | if (PROFILE_MODEL_P (current_cpu)) | |
1377 | { | |
1378 | FLD (out_dr) = f_r1; | |
1379 | } | |
1380 | #endif | |
1381 | #undef FLD | |
7a292a7a | 1382 | return idesc; |
c906108c SS |
1383 | } |
1384 | ||
96baa820 | 1385 | extract_sfmt_lock: |
c906108c | 1386 | { |
7a292a7a | 1387 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1388 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1389 | #define FLD(f) abuf->fields.sfmt_ld_plus.f |
1390 | UINT f_r1; | |
1391 | UINT f_r2; | |
c906108c | 1392 | |
96baa820 JM |
1393 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
1394 | f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); | |
c906108c SS |
1395 | |
1396 | /* Record the fields for the semantic handler. */ | |
de8f5985 DB |
1397 | FLD (f_r2) = f_r2; |
1398 | FLD (f_r1) = f_r1; | |
c906108c SS |
1399 | FLD (i_sr) = & CPU (h_gr)[f_r2]; |
1400 | FLD (i_dr) = & CPU (h_gr)[f_r1]; | |
de8f5985 | 1401 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_lock", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); |
c906108c SS |
1402 | |
1403 | #if WITH_PROFILE_MODEL_P | |
1404 | /* Record the fields for profiling. */ | |
1405 | if (PROFILE_MODEL_P (current_cpu)) | |
1406 | { | |
1407 | FLD (in_sr) = f_r2; | |
1408 | FLD (out_dr) = f_r1; | |
1409 | } | |
1410 | #endif | |
1411 | #undef FLD | |
7a292a7a | 1412 | return idesc; |
c906108c SS |
1413 | } |
1414 | ||
96baa820 | 1415 | extract_sfmt_machi: |
c906108c | 1416 | { |
7a292a7a | 1417 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1418 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1419 | #define FLD(f) abuf->fields.sfmt_st_plus.f |
1420 | UINT f_r1; | |
1421 | UINT f_r2; | |
c906108c | 1422 | |
96baa820 JM |
1423 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
1424 | f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); | |
c906108c SS |
1425 | |
1426 | /* Record the fields for the semantic handler. */ | |
de8f5985 DB |
1427 | FLD (f_r1) = f_r1; |
1428 | FLD (f_r2) = f_r2; | |
c906108c SS |
1429 | FLD (i_src1) = & CPU (h_gr)[f_r1]; |
1430 | FLD (i_src2) = & CPU (h_gr)[f_r2]; | |
de8f5985 | 1431 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_machi", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); |
c906108c SS |
1432 | |
1433 | #if WITH_PROFILE_MODEL_P | |
1434 | /* Record the fields for profiling. */ | |
1435 | if (PROFILE_MODEL_P (current_cpu)) | |
1436 | { | |
1437 | FLD (in_src1) = f_r1; | |
1438 | FLD (in_src2) = f_r2; | |
1439 | } | |
1440 | #endif | |
1441 | #undef FLD | |
7a292a7a | 1442 | return idesc; |
c906108c SS |
1443 | } |
1444 | ||
96baa820 | 1445 | extract_sfmt_mulhi: |
c906108c | 1446 | { |
7a292a7a | 1447 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1448 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1449 | #define FLD(f) abuf->fields.sfmt_st_plus.f |
1450 | UINT f_r1; | |
1451 | UINT f_r2; | |
c906108c | 1452 | |
96baa820 JM |
1453 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
1454 | f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); | |
c906108c SS |
1455 | |
1456 | /* Record the fields for the semantic handler. */ | |
de8f5985 DB |
1457 | FLD (f_r1) = f_r1; |
1458 | FLD (f_r2) = f_r2; | |
c906108c SS |
1459 | FLD (i_src1) = & CPU (h_gr)[f_r1]; |
1460 | FLD (i_src2) = & CPU (h_gr)[f_r2]; | |
de8f5985 | 1461 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mulhi", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); |
c906108c SS |
1462 | |
1463 | #if WITH_PROFILE_MODEL_P | |
1464 | /* Record the fields for profiling. */ | |
1465 | if (PROFILE_MODEL_P (current_cpu)) | |
1466 | { | |
1467 | FLD (in_src1) = f_r1; | |
1468 | FLD (in_src2) = f_r2; | |
1469 | } | |
1470 | #endif | |
1471 | #undef FLD | |
7a292a7a | 1472 | return idesc; |
c906108c SS |
1473 | } |
1474 | ||
96baa820 | 1475 | extract_sfmt_mv: |
c906108c | 1476 | { |
7a292a7a | 1477 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1478 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1479 | #define FLD(f) abuf->fields.sfmt_ld_plus.f |
1480 | UINT f_r1; | |
1481 | UINT f_r2; | |
c906108c | 1482 | |
96baa820 JM |
1483 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
1484 | f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); | |
c906108c SS |
1485 | |
1486 | /* Record the fields for the semantic handler. */ | |
de8f5985 DB |
1487 | FLD (f_r2) = f_r2; |
1488 | FLD (f_r1) = f_r1; | |
c906108c SS |
1489 | FLD (i_sr) = & CPU (h_gr)[f_r2]; |
1490 | FLD (i_dr) = & CPU (h_gr)[f_r1]; | |
de8f5985 | 1491 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mv", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); |
c906108c SS |
1492 | |
1493 | #if WITH_PROFILE_MODEL_P | |
1494 | /* Record the fields for profiling. */ | |
1495 | if (PROFILE_MODEL_P (current_cpu)) | |
1496 | { | |
1497 | FLD (in_sr) = f_r2; | |
1498 | FLD (out_dr) = f_r1; | |
1499 | } | |
1500 | #endif | |
1501 | #undef FLD | |
7a292a7a | 1502 | return idesc; |
c906108c SS |
1503 | } |
1504 | ||
96baa820 | 1505 | extract_sfmt_mvfachi: |
c906108c | 1506 | { |
7a292a7a | 1507 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1508 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1509 | #define FLD(f) abuf->fields.sfmt_seth.f |
1510 | UINT f_r1; | |
c906108c | 1511 | |
96baa820 | 1512 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
c906108c SS |
1513 | |
1514 | /* Record the fields for the semantic handler. */ | |
de8f5985 | 1515 | FLD (f_r1) = f_r1; |
c906108c | 1516 | FLD (i_dr) = & CPU (h_gr)[f_r1]; |
de8f5985 | 1517 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mvfachi", "f_r1 0x%x", 'x', f_r1, "dr 0x%x", 'x', f_r1, (char *) 0)); |
c906108c SS |
1518 | |
1519 | #if WITH_PROFILE_MODEL_P | |
1520 | /* Record the fields for profiling. */ | |
1521 | if (PROFILE_MODEL_P (current_cpu)) | |
1522 | { | |
1523 | FLD (out_dr) = f_r1; | |
1524 | } | |
1525 | #endif | |
1526 | #undef FLD | |
7a292a7a | 1527 | return idesc; |
c906108c SS |
1528 | } |
1529 | ||
96baa820 | 1530 | extract_sfmt_mvfc: |
c906108c | 1531 | { |
7a292a7a | 1532 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1533 | CGEN_INSN_INT insn = entire_insn; |
de8f5985 | 1534 | #define FLD(f) abuf->fields.sfmt_ld_plus.f |
96baa820 JM |
1535 | UINT f_r1; |
1536 | UINT f_r2; | |
c906108c | 1537 | |
96baa820 JM |
1538 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
1539 | f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); | |
c906108c SS |
1540 | |
1541 | /* Record the fields for the semantic handler. */ | |
1542 | FLD (f_r2) = f_r2; | |
de8f5985 | 1543 | FLD (f_r1) = f_r1; |
c906108c | 1544 | FLD (i_dr) = & CPU (h_gr)[f_r1]; |
de8f5985 | 1545 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mvfc", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "dr 0x%x", 'x', f_r1, (char *) 0)); |
c906108c SS |
1546 | |
1547 | #if WITH_PROFILE_MODEL_P | |
1548 | /* Record the fields for profiling. */ | |
1549 | if (PROFILE_MODEL_P (current_cpu)) | |
1550 | { | |
1551 | FLD (out_dr) = f_r1; | |
1552 | } | |
1553 | #endif | |
1554 | #undef FLD | |
7a292a7a | 1555 | return idesc; |
c906108c SS |
1556 | } |
1557 | ||
96baa820 | 1558 | extract_sfmt_mvtachi: |
c906108c | 1559 | { |
7a292a7a | 1560 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1561 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1562 | #define FLD(f) abuf->fields.sfmt_st_plus.f |
1563 | UINT f_r1; | |
c906108c | 1564 | |
96baa820 | 1565 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
c906108c SS |
1566 | |
1567 | /* Record the fields for the semantic handler. */ | |
de8f5985 | 1568 | FLD (f_r1) = f_r1; |
c906108c | 1569 | FLD (i_src1) = & CPU (h_gr)[f_r1]; |
de8f5985 | 1570 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mvtachi", "f_r1 0x%x", 'x', f_r1, "src1 0x%x", 'x', f_r1, (char *) 0)); |
c906108c SS |
1571 | |
1572 | #if WITH_PROFILE_MODEL_P | |
1573 | /* Record the fields for profiling. */ | |
1574 | if (PROFILE_MODEL_P (current_cpu)) | |
1575 | { | |
1576 | FLD (in_src1) = f_r1; | |
1577 | } | |
1578 | #endif | |
1579 | #undef FLD | |
7a292a7a | 1580 | return idesc; |
c906108c SS |
1581 | } |
1582 | ||
96baa820 | 1583 | extract_sfmt_mvtc: |
c906108c | 1584 | { |
7a292a7a | 1585 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1586 | CGEN_INSN_INT insn = entire_insn; |
de8f5985 | 1587 | #define FLD(f) abuf->fields.sfmt_ld_plus.f |
96baa820 JM |
1588 | UINT f_r1; |
1589 | UINT f_r2; | |
c906108c | 1590 | |
96baa820 JM |
1591 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
1592 | f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); | |
c906108c SS |
1593 | |
1594 | /* Record the fields for the semantic handler. */ | |
de8f5985 | 1595 | FLD (f_r2) = f_r2; |
c906108c SS |
1596 | FLD (f_r1) = f_r1; |
1597 | FLD (i_sr) = & CPU (h_gr)[f_r2]; | |
de8f5985 | 1598 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_mvtc", "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, (char *) 0)); |
c906108c SS |
1599 | |
1600 | #if WITH_PROFILE_MODEL_P | |
1601 | /* Record the fields for profiling. */ | |
1602 | if (PROFILE_MODEL_P (current_cpu)) | |
1603 | { | |
1604 | FLD (in_sr) = f_r2; | |
1605 | } | |
1606 | #endif | |
1607 | #undef FLD | |
7a292a7a | 1608 | return idesc; |
c906108c SS |
1609 | } |
1610 | ||
96baa820 | 1611 | extract_sfmt_nop: |
c906108c | 1612 | { |
7a292a7a | 1613 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
96baa820 | 1614 | #define FLD(f) abuf->fields.fmt_empty.f |
c906108c | 1615 | |
c906108c SS |
1616 | |
1617 | /* Record the fields for the semantic handler. */ | |
96baa820 | 1618 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_nop", (char *) 0)); |
c906108c SS |
1619 | |
1620 | #undef FLD | |
7a292a7a | 1621 | return idesc; |
c906108c SS |
1622 | } |
1623 | ||
96baa820 | 1624 | extract_sfmt_rac: |
c906108c | 1625 | { |
7a292a7a | 1626 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
96baa820 | 1627 | #define FLD(f) abuf->fields.fmt_empty.f |
c906108c | 1628 | |
c906108c SS |
1629 | |
1630 | /* Record the fields for the semantic handler. */ | |
96baa820 | 1631 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_rac", (char *) 0)); |
c906108c SS |
1632 | |
1633 | #undef FLD | |
7a292a7a | 1634 | return idesc; |
c906108c SS |
1635 | } |
1636 | ||
96baa820 | 1637 | extract_sfmt_rte: |
c906108c | 1638 | { |
7a292a7a | 1639 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
96baa820 | 1640 | #define FLD(f) abuf->fields.fmt_empty.f |
c906108c | 1641 | |
c906108c SS |
1642 | |
1643 | /* Record the fields for the semantic handler. */ | |
96baa820 | 1644 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_rte", (char *) 0)); |
c906108c SS |
1645 | |
1646 | #if WITH_PROFILE_MODEL_P | |
1647 | /* Record the fields for profiling. */ | |
1648 | if (PROFILE_MODEL_P (current_cpu)) | |
1649 | { | |
1650 | } | |
1651 | #endif | |
1652 | #undef FLD | |
7a292a7a | 1653 | return idesc; |
c906108c SS |
1654 | } |
1655 | ||
96baa820 | 1656 | extract_sfmt_seth: |
c906108c | 1657 | { |
7a292a7a | 1658 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1659 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1660 | #define FLD(f) abuf->fields.sfmt_seth.f |
1661 | UINT f_r1; | |
1662 | UINT f_hi16; | |
c906108c | 1663 | |
96baa820 JM |
1664 | f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); |
1665 | f_hi16 = EXTRACT_MSB0_UINT (insn, 32, 16, 16); | |
c906108c SS |
1666 | |
1667 | /* Record the fields for the semantic handler. */ | |
1668 | FLD (f_hi16) = f_hi16; | |
de8f5985 | 1669 | FLD (f_r1) = f_r1; |
c906108c | 1670 | FLD (i_dr) = & CPU (h_gr)[f_r1]; |
de8f5985 | 1671 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_seth", "f_hi16 0x%x", 'x', f_hi16, "f_r1 0x%x", 'x', f_r1, "dr 0x%x", 'x', f_r1, (char *) 0)); |
c906108c SS |
1672 | |
1673 | #if WITH_PROFILE_MODEL_P | |
1674 | /* Record the fields for profiling. */ | |
1675 | if (PROFILE_MODEL_P (current_cpu)) | |
1676 | { | |
1677 | FLD (out_dr) = f_r1; | |
1678 | } | |
1679 | #endif | |
1680 | #undef FLD | |
7a292a7a | 1681 | return idesc; |
c906108c SS |
1682 | } |
1683 | ||
96baa820 | 1684 | extract_sfmt_sll3: |
c906108c | 1685 | { |
7a292a7a | 1686 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1687 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1688 | #define FLD(f) abuf->fields.sfmt_add3.f |
1689 | UINT f_r1; | |
1690 | UINT f_r2; | |
1691 | INT f_simm16; | |
c906108c | 1692 | |
96baa820 JM |
1693 | f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); |
1694 | f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); | |
1695 | f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); | |
c906108c SS |
1696 | |
1697 | /* Record the fields for the semantic handler. */ | |
1698 | FLD (f_simm16) = f_simm16; | |
de8f5985 DB |
1699 | FLD (f_r2) = f_r2; |
1700 | FLD (f_r1) = f_r1; | |
c906108c SS |
1701 | FLD (i_sr) = & CPU (h_gr)[f_r2]; |
1702 | FLD (i_dr) = & CPU (h_gr)[f_r1]; | |
de8f5985 | 1703 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_sll3", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "f_r1 0x%x", 'x', f_r1, "sr 0x%x", 'x', f_r2, "dr 0x%x", 'x', f_r1, (char *) 0)); |
c906108c SS |
1704 | |
1705 | #if WITH_PROFILE_MODEL_P | |
1706 | /* Record the fields for profiling. */ | |
1707 | if (PROFILE_MODEL_P (current_cpu)) | |
1708 | { | |
1709 | FLD (in_sr) = f_r2; | |
1710 | FLD (out_dr) = f_r1; | |
1711 | } | |
1712 | #endif | |
1713 | #undef FLD | |
7a292a7a | 1714 | return idesc; |
c906108c SS |
1715 | } |
1716 | ||
96baa820 | 1717 | extract_sfmt_slli: |
c906108c | 1718 | { |
7a292a7a | 1719 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1720 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1721 | #define FLD(f) abuf->fields.sfmt_slli.f |
1722 | UINT f_r1; | |
1723 | UINT f_uimm5; | |
c906108c | 1724 | |
96baa820 JM |
1725 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
1726 | f_uimm5 = EXTRACT_MSB0_UINT (insn, 16, 11, 5); | |
c906108c SS |
1727 | |
1728 | /* Record the fields for the semantic handler. */ | |
de8f5985 | 1729 | FLD (f_r1) = f_r1; |
c906108c SS |
1730 | FLD (f_uimm5) = f_uimm5; |
1731 | FLD (i_dr) = & CPU (h_gr)[f_r1]; | |
de8f5985 | 1732 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_slli", "f_r1 0x%x", 'x', f_r1, "f_uimm5 0x%x", 'x', f_uimm5, "dr 0x%x", 'x', f_r1, (char *) 0)); |
c906108c SS |
1733 | |
1734 | #if WITH_PROFILE_MODEL_P | |
1735 | /* Record the fields for profiling. */ | |
1736 | if (PROFILE_MODEL_P (current_cpu)) | |
1737 | { | |
1738 | FLD (in_dr) = f_r1; | |
1739 | FLD (out_dr) = f_r1; | |
1740 | } | |
1741 | #endif | |
1742 | #undef FLD | |
7a292a7a | 1743 | return idesc; |
c906108c SS |
1744 | } |
1745 | ||
96baa820 | 1746 | extract_sfmt_st: |
c906108c | 1747 | { |
7a292a7a | 1748 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1749 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1750 | #define FLD(f) abuf->fields.sfmt_st_plus.f |
1751 | UINT f_r1; | |
1752 | UINT f_r2; | |
c906108c | 1753 | |
96baa820 JM |
1754 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
1755 | f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); | |
c906108c SS |
1756 | |
1757 | /* Record the fields for the semantic handler. */ | |
de8f5985 DB |
1758 | FLD (f_r1) = f_r1; |
1759 | FLD (f_r2) = f_r2; | |
c906108c SS |
1760 | FLD (i_src1) = & CPU (h_gr)[f_r1]; |
1761 | FLD (i_src2) = & CPU (h_gr)[f_r2]; | |
de8f5985 | 1762 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_st", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); |
c906108c SS |
1763 | |
1764 | #if WITH_PROFILE_MODEL_P | |
1765 | /* Record the fields for profiling. */ | |
1766 | if (PROFILE_MODEL_P (current_cpu)) | |
1767 | { | |
1768 | FLD (in_src1) = f_r1; | |
1769 | FLD (in_src2) = f_r2; | |
1770 | } | |
1771 | #endif | |
1772 | #undef FLD | |
7a292a7a | 1773 | return idesc; |
c906108c SS |
1774 | } |
1775 | ||
96baa820 | 1776 | extract_sfmt_st_d: |
c906108c | 1777 | { |
7a292a7a | 1778 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1779 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1780 | #define FLD(f) abuf->fields.sfmt_st_d.f |
1781 | UINT f_r1; | |
1782 | UINT f_r2; | |
1783 | INT f_simm16; | |
c906108c | 1784 | |
96baa820 JM |
1785 | f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); |
1786 | f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); | |
1787 | f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); | |
c906108c SS |
1788 | |
1789 | /* Record the fields for the semantic handler. */ | |
1790 | FLD (f_simm16) = f_simm16; | |
de8f5985 DB |
1791 | FLD (f_r1) = f_r1; |
1792 | FLD (f_r2) = f_r2; | |
c906108c SS |
1793 | FLD (i_src1) = & CPU (h_gr)[f_r1]; |
1794 | FLD (i_src2) = & CPU (h_gr)[f_r2]; | |
de8f5985 | 1795 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_st_d", "f_simm16 0x%x", 'x', f_simm16, "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); |
c906108c SS |
1796 | |
1797 | #if WITH_PROFILE_MODEL_P | |
1798 | /* Record the fields for profiling. */ | |
1799 | if (PROFILE_MODEL_P (current_cpu)) | |
1800 | { | |
1801 | FLD (in_src1) = f_r1; | |
1802 | FLD (in_src2) = f_r2; | |
1803 | } | |
1804 | #endif | |
1805 | #undef FLD | |
7a292a7a | 1806 | return idesc; |
c906108c SS |
1807 | } |
1808 | ||
96baa820 | 1809 | extract_sfmt_stb: |
c906108c | 1810 | { |
7a292a7a | 1811 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1812 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1813 | #define FLD(f) abuf->fields.sfmt_st_plus.f |
1814 | UINT f_r1; | |
1815 | UINT f_r2; | |
c906108c | 1816 | |
96baa820 JM |
1817 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
1818 | f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); | |
c906108c SS |
1819 | |
1820 | /* Record the fields for the semantic handler. */ | |
de8f5985 DB |
1821 | FLD (f_r1) = f_r1; |
1822 | FLD (f_r2) = f_r2; | |
c906108c SS |
1823 | FLD (i_src1) = & CPU (h_gr)[f_r1]; |
1824 | FLD (i_src2) = & CPU (h_gr)[f_r2]; | |
de8f5985 | 1825 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stb", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); |
c906108c SS |
1826 | |
1827 | #if WITH_PROFILE_MODEL_P | |
1828 | /* Record the fields for profiling. */ | |
1829 | if (PROFILE_MODEL_P (current_cpu)) | |
1830 | { | |
1831 | FLD (in_src1) = f_r1; | |
1832 | FLD (in_src2) = f_r2; | |
1833 | } | |
1834 | #endif | |
1835 | #undef FLD | |
7a292a7a | 1836 | return idesc; |
c906108c SS |
1837 | } |
1838 | ||
96baa820 | 1839 | extract_sfmt_stb_d: |
c906108c | 1840 | { |
7a292a7a | 1841 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1842 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1843 | #define FLD(f) abuf->fields.sfmt_st_d.f |
1844 | UINT f_r1; | |
1845 | UINT f_r2; | |
1846 | INT f_simm16; | |
c906108c | 1847 | |
96baa820 JM |
1848 | f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); |
1849 | f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); | |
1850 | f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); | |
c906108c SS |
1851 | |
1852 | /* Record the fields for the semantic handler. */ | |
1853 | FLD (f_simm16) = f_simm16; | |
de8f5985 DB |
1854 | FLD (f_r1) = f_r1; |
1855 | FLD (f_r2) = f_r2; | |
c906108c SS |
1856 | FLD (i_src1) = & CPU (h_gr)[f_r1]; |
1857 | FLD (i_src2) = & CPU (h_gr)[f_r2]; | |
de8f5985 | 1858 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_stb_d", "f_simm16 0x%x", 'x', f_simm16, "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); |
c906108c SS |
1859 | |
1860 | #if WITH_PROFILE_MODEL_P | |
1861 | /* Record the fields for profiling. */ | |
1862 | if (PROFILE_MODEL_P (current_cpu)) | |
1863 | { | |
1864 | FLD (in_src1) = f_r1; | |
1865 | FLD (in_src2) = f_r2; | |
1866 | } | |
1867 | #endif | |
1868 | #undef FLD | |
7a292a7a | 1869 | return idesc; |
c906108c SS |
1870 | } |
1871 | ||
96baa820 | 1872 | extract_sfmt_sth: |
c906108c | 1873 | { |
7a292a7a | 1874 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1875 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1876 | #define FLD(f) abuf->fields.sfmt_st_plus.f |
1877 | UINT f_r1; | |
1878 | UINT f_r2; | |
c906108c | 1879 | |
96baa820 JM |
1880 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
1881 | f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); | |
c906108c SS |
1882 | |
1883 | /* Record the fields for the semantic handler. */ | |
de8f5985 DB |
1884 | FLD (f_r1) = f_r1; |
1885 | FLD (f_r2) = f_r2; | |
c906108c SS |
1886 | FLD (i_src1) = & CPU (h_gr)[f_r1]; |
1887 | FLD (i_src2) = & CPU (h_gr)[f_r2]; | |
de8f5985 | 1888 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_sth", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); |
c906108c SS |
1889 | |
1890 | #if WITH_PROFILE_MODEL_P | |
1891 | /* Record the fields for profiling. */ | |
1892 | if (PROFILE_MODEL_P (current_cpu)) | |
1893 | { | |
1894 | FLD (in_src1) = f_r1; | |
1895 | FLD (in_src2) = f_r2; | |
1896 | } | |
1897 | #endif | |
1898 | #undef FLD | |
7a292a7a | 1899 | return idesc; |
c906108c SS |
1900 | } |
1901 | ||
96baa820 | 1902 | extract_sfmt_sth_d: |
c906108c | 1903 | { |
7a292a7a | 1904 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1905 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1906 | #define FLD(f) abuf->fields.sfmt_st_d.f |
1907 | UINT f_r1; | |
1908 | UINT f_r2; | |
1909 | INT f_simm16; | |
c906108c | 1910 | |
96baa820 JM |
1911 | f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); |
1912 | f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); | |
1913 | f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); | |
c906108c SS |
1914 | |
1915 | /* Record the fields for the semantic handler. */ | |
1916 | FLD (f_simm16) = f_simm16; | |
de8f5985 DB |
1917 | FLD (f_r1) = f_r1; |
1918 | FLD (f_r2) = f_r2; | |
c906108c SS |
1919 | FLD (i_src1) = & CPU (h_gr)[f_r1]; |
1920 | FLD (i_src2) = & CPU (h_gr)[f_r2]; | |
de8f5985 | 1921 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_sth_d", "f_simm16 0x%x", 'x', f_simm16, "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); |
c906108c SS |
1922 | |
1923 | #if WITH_PROFILE_MODEL_P | |
1924 | /* Record the fields for profiling. */ | |
1925 | if (PROFILE_MODEL_P (current_cpu)) | |
1926 | { | |
1927 | FLD (in_src1) = f_r1; | |
1928 | FLD (in_src2) = f_r2; | |
1929 | } | |
1930 | #endif | |
1931 | #undef FLD | |
7a292a7a | 1932 | return idesc; |
c906108c SS |
1933 | } |
1934 | ||
96baa820 | 1935 | extract_sfmt_st_plus: |
c906108c | 1936 | { |
7a292a7a | 1937 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1938 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1939 | #define FLD(f) abuf->fields.sfmt_st_plus.f |
1940 | UINT f_r1; | |
1941 | UINT f_r2; | |
c906108c | 1942 | |
96baa820 JM |
1943 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
1944 | f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); | |
c906108c SS |
1945 | |
1946 | /* Record the fields for the semantic handler. */ | |
de8f5985 DB |
1947 | FLD (f_r1) = f_r1; |
1948 | FLD (f_r2) = f_r2; | |
c906108c SS |
1949 | FLD (i_src1) = & CPU (h_gr)[f_r1]; |
1950 | FLD (i_src2) = & CPU (h_gr)[f_r2]; | |
de8f5985 | 1951 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_st_plus", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); |
c906108c SS |
1952 | |
1953 | #if WITH_PROFILE_MODEL_P | |
1954 | /* Record the fields for profiling. */ | |
1955 | if (PROFILE_MODEL_P (current_cpu)) | |
1956 | { | |
1957 | FLD (in_src1) = f_r1; | |
1958 | FLD (in_src2) = f_r2; | |
1959 | FLD (out_src2) = f_r2; | |
1960 | } | |
1961 | #endif | |
1962 | #undef FLD | |
7a292a7a | 1963 | return idesc; |
c906108c SS |
1964 | } |
1965 | ||
96baa820 | 1966 | extract_sfmt_trap: |
c906108c | 1967 | { |
7a292a7a | 1968 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1969 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1970 | #define FLD(f) abuf->fields.sfmt_trap.f |
1971 | UINT f_uimm4; | |
c906108c | 1972 | |
96baa820 | 1973 | f_uimm4 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); |
c906108c SS |
1974 | |
1975 | /* Record the fields for the semantic handler. */ | |
1976 | FLD (f_uimm4) = f_uimm4; | |
96baa820 | 1977 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_trap", "f_uimm4 0x%x", 'x', f_uimm4, (char *) 0)); |
c906108c SS |
1978 | |
1979 | #if WITH_PROFILE_MODEL_P | |
1980 | /* Record the fields for profiling. */ | |
1981 | if (PROFILE_MODEL_P (current_cpu)) | |
1982 | { | |
1983 | } | |
1984 | #endif | |
1985 | #undef FLD | |
7a292a7a | 1986 | return idesc; |
c906108c SS |
1987 | } |
1988 | ||
96baa820 | 1989 | extract_sfmt_unlock: |
c906108c | 1990 | { |
7a292a7a | 1991 | const IDESC *idesc = &m32rbf_insn_data[itype]; |
c906108c | 1992 | CGEN_INSN_INT insn = entire_insn; |
96baa820 JM |
1993 | #define FLD(f) abuf->fields.sfmt_st_plus.f |
1994 | UINT f_r1; | |
1995 | UINT f_r2; | |
c906108c | 1996 | |
96baa820 JM |
1997 | f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); |
1998 | f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); | |
c906108c SS |
1999 | |
2000 | /* Record the fields for the semantic handler. */ | |
de8f5985 DB |
2001 | FLD (f_r1) = f_r1; |
2002 | FLD (f_r2) = f_r2; | |
c906108c SS |
2003 | FLD (i_src1) = & CPU (h_gr)[f_r1]; |
2004 | FLD (i_src2) = & CPU (h_gr)[f_r2]; | |
de8f5985 | 2005 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_unlock", "f_r1 0x%x", 'x', f_r1, "f_r2 0x%x", 'x', f_r2, "src1 0x%x", 'x', f_r1, "src2 0x%x", 'x', f_r2, (char *) 0)); |
c906108c SS |
2006 | |
2007 | #if WITH_PROFILE_MODEL_P | |
2008 | /* Record the fields for profiling. */ | |
2009 | if (PROFILE_MODEL_P (current_cpu)) | |
2010 | { | |
2011 | FLD (in_src1) = f_r1; | |
2012 | FLD (in_src2) = f_r2; | |
2013 | } | |
2014 | #endif | |
16b47b25 NC |
2015 | #undef FLD |
2016 | return idesc; | |
2017 | } | |
2018 | ||
2019 | extract_sfmt_clrpsw: | |
2020 | { | |
2021 | const IDESC *idesc = &m32rbf_insn_data[itype]; | |
2022 | CGEN_INSN_INT insn = entire_insn; | |
2023 | #define FLD(f) abuf->fields.sfmt_clrpsw.f | |
2024 | UINT f_uimm8; | |
2025 | ||
2026 | f_uimm8 = EXTRACT_MSB0_UINT (insn, 16, 8, 8); | |
2027 | ||
2028 | /* Record the fields for the semantic handler. */ | |
2029 | FLD (f_uimm8) = f_uimm8; | |
2030 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_clrpsw", "f_uimm8 0x%x", 'x', f_uimm8, (char *) 0)); | |
2031 | ||
2032 | #undef FLD | |
2033 | return idesc; | |
2034 | } | |
2035 | ||
2036 | extract_sfmt_setpsw: | |
2037 | { | |
2038 | const IDESC *idesc = &m32rbf_insn_data[itype]; | |
2039 | CGEN_INSN_INT insn = entire_insn; | |
2040 | #define FLD(f) abuf->fields.sfmt_clrpsw.f | |
2041 | UINT f_uimm8; | |
2042 | ||
2043 | f_uimm8 = EXTRACT_MSB0_UINT (insn, 16, 8, 8); | |
2044 | ||
2045 | /* Record the fields for the semantic handler. */ | |
2046 | FLD (f_uimm8) = f_uimm8; | |
2047 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_setpsw", "f_uimm8 0x%x", 'x', f_uimm8, (char *) 0)); | |
2048 | ||
2049 | #undef FLD | |
2050 | return idesc; | |
2051 | } | |
2052 | ||
2053 | extract_sfmt_bset: | |
2054 | { | |
2055 | const IDESC *idesc = &m32rbf_insn_data[itype]; | |
2056 | CGEN_INSN_INT insn = entire_insn; | |
2057 | #define FLD(f) abuf->fields.sfmt_bset.f | |
2058 | UINT f_uimm3; | |
2059 | UINT f_r2; | |
2060 | INT f_simm16; | |
2061 | ||
2062 | f_uimm3 = EXTRACT_MSB0_UINT (insn, 32, 5, 3); | |
2063 | f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); | |
2064 | f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); | |
2065 | ||
2066 | /* Record the fields for the semantic handler. */ | |
2067 | FLD (f_simm16) = f_simm16; | |
2068 | FLD (f_r2) = f_r2; | |
2069 | FLD (f_uimm3) = f_uimm3; | |
2070 | FLD (i_sr) = & CPU (h_gr)[f_r2]; | |
2071 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_bset", "f_simm16 0x%x", 'x', f_simm16, "f_r2 0x%x", 'x', f_r2, "f_uimm3 0x%x", 'x', f_uimm3, "sr 0x%x", 'x', f_r2, (char *) 0)); | |
2072 | ||
2073 | #if WITH_PROFILE_MODEL_P | |
2074 | /* Record the fields for profiling. */ | |
2075 | if (PROFILE_MODEL_P (current_cpu)) | |
2076 | { | |
2077 | FLD (in_sr) = f_r2; | |
2078 | } | |
2079 | #endif | |
2080 | #undef FLD | |
2081 | return idesc; | |
2082 | } | |
2083 | ||
2084 | extract_sfmt_btst: | |
2085 | { | |
2086 | const IDESC *idesc = &m32rbf_insn_data[itype]; | |
2087 | CGEN_INSN_INT insn = entire_insn; | |
2088 | #define FLD(f) abuf->fields.sfmt_bset.f | |
2089 | UINT f_uimm3; | |
2090 | UINT f_r2; | |
2091 | ||
2092 | f_uimm3 = EXTRACT_MSB0_UINT (insn, 16, 5, 3); | |
2093 | f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); | |
2094 | ||
2095 | /* Record the fields for the semantic handler. */ | |
2096 | FLD (f_r2) = f_r2; | |
2097 | FLD (f_uimm3) = f_uimm3; | |
2098 | FLD (i_sr) = & CPU (h_gr)[f_r2]; | |
2099 | TRACE_EXTRACT (current_cpu, abuf, (current_cpu, pc, "sfmt_btst", "f_r2 0x%x", 'x', f_r2, "f_uimm3 0x%x", 'x', f_uimm3, "sr 0x%x", 'x', f_r2, (char *) 0)); | |
2100 | ||
2101 | #if WITH_PROFILE_MODEL_P | |
2102 | /* Record the fields for profiling. */ | |
2103 | if (PROFILE_MODEL_P (current_cpu)) | |
2104 | { | |
2105 | FLD (in_sr) = f_r2; | |
2106 | } | |
2107 | #endif | |
c906108c | 2108 | #undef FLD |
7a292a7a | 2109 | return idesc; |
c906108c SS |
2110 | } |
2111 | ||
c906108c | 2112 | } |